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Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
29#include <linux/i2c/twl4030.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020036#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070037
38#include "twl4030.h"
39
40/*
41 * twl4030 register cache & default register settings
42 */
43static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
44 0x00, /* this register not used */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +020045 0x91, /* REG_CODEC_MODE (0x1) */
Steve Sakomancc175572008-10-30 21:35:26 -070046 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
Grazvydas Ignotas5920b452008-12-02 20:48:58 +020049 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
Steve Sakomancc175572008-10-30 21:35:26 -070052 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
Peter Ujfalusif8d05bd2008-11-24 08:25:45 +020091 0x00, /* REG_SOFTVOL_CTL (0x2F) */
Steve Sakomancc175572008-10-30 21:35:26 -070092 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
Peter Ujfalusif3b5d302009-05-25 11:12:12 +0300118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
Steve Sakomancc175572008-10-30 21:35:26 -0700119};
120
Peter Ujfalusi73939582009-01-29 14:57:50 +0200121/* codec private data */
122struct twl4030_priv {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300123 struct snd_soc_codec codec;
124
Peter Ujfalusi73939582009-01-29 14:57:50 +0200125 unsigned int codec_powered;
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200126 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +0200127
128 struct snd_pcm_substream *master_substream;
129 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +0300130
131 unsigned int configured;
132 unsigned int rate;
133 unsigned int sample_bits;
134 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300135
136 unsigned int sysclk;
137
138 /* Headset output state handling */
139 unsigned int hsl_enabled;
140 unsigned int hsr_enabled;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200141};
142
Steve Sakomancc175572008-10-30 21:35:26 -0700143/*
144 * read twl4030 register cache
145 */
146static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
147 unsigned int reg)
148{
Takashi Iwaid08664f2009-06-04 09:58:18 +0200149 u8 *cache = codec->reg_cache;
Steve Sakomancc175572008-10-30 21:35:26 -0700150
Ian Molton91432e92009-01-17 17:44:23 +0000151 if (reg >= TWL4030_CACHEREGNUM)
152 return -EIO;
153
Steve Sakomancc175572008-10-30 21:35:26 -0700154 return cache[reg];
155}
156
157/*
158 * write twl4030 register cache
159 */
160static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
161 u8 reg, u8 value)
162{
163 u8 *cache = codec->reg_cache;
164
165 if (reg >= TWL4030_CACHEREGNUM)
166 return;
167 cache[reg] = value;
168}
169
170/*
171 * write to the twl4030 register space
172 */
173static int twl4030_write(struct snd_soc_codec *codec,
174 unsigned int reg, unsigned int value)
175{
176 twl4030_write_reg_cache(codec, reg, value);
Peter Ujfalusif3b5d302009-05-25 11:12:12 +0300177 if (likely(reg < TWL4030_REG_SW_SHADOW))
178 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value,
179 reg);
180 else
181 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700182}
183
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200184static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700185{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200186 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300187 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700188
Peter Ujfalusi73939582009-01-29 14:57:50 +0200189 if (enable == twl4030->codec_powered)
190 return;
191
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200192 if (enable)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300193 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200194 else
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300195 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700196
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300197 if (mode >= 0) {
198 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
199 twl4030->codec_powered = enable;
200 }
Steve Sakomancc175572008-10-30 21:35:26 -0700201
202 /* REVISIT: this delay is present in TI sample drivers */
203 /* but there seems to be no TRM requirement for it */
204 udelay(10);
205}
206
207static void twl4030_init_chip(struct snd_soc_codec *codec)
208{
Peter Ujfalusi16a30fb2009-05-29 09:22:37 +0300209 u8 *cache = codec->reg_cache;
Steve Sakomancc175572008-10-30 21:35:26 -0700210 int i;
211
212 /* clear CODECPDZ prior to setting register defaults */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200213 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700214
215 /* set all audio section registers to reasonable defaults */
216 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
Peter Ujfalusi16a30fb2009-05-29 09:22:37 +0300217 twl4030_write(codec, i, cache[i]);
Steve Sakomancc175572008-10-30 21:35:26 -0700218
219}
220
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200221static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200222{
223 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300224 int status;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200225
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200226 if (enable == twl4030->apll_enabled)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200227 return;
228
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200229 if (enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200230 /* Enable PLL */
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300231 status = twl4030_codec_enable_resource(TWL4030_CODEC_RES_APLL);
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200232 else
233 /* Disable PLL */
234 status = twl4030_codec_disable_resource(TWL4030_CODEC_RES_APLL);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300235
236 if (status >= 0)
237 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200238
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200239 twl4030->apll_enabled = enable;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200240}
241
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200242static void twl4030_power_up(struct snd_soc_codec *codec)
243{
Peter Ujfalusi73939582009-01-29 14:57:50 +0200244 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200245 u8 anamicl, regmisc1, byte;
246 int i = 0;
247
Peter Ujfalusi73939582009-01-29 14:57:50 +0200248 if (twl4030->codec_powered)
249 return;
250
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200251 /* set CODECPDZ to turn on codec */
252 twl4030_codec_enable(codec, 1);
253
254 /* initiate offset cancellation */
255 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
256 twl4030_write(codec, TWL4030_REG_ANAMICL,
257 anamicl | TWL4030_CNCL_OFFSET_START);
258
259 /* wait for offset cancellation to complete */
260 do {
261 /* this takes a little while, so don't slam i2c */
262 udelay(2000);
263 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
264 TWL4030_REG_ANAMICL);
265 } while ((i++ < 100) &&
266 ((byte & TWL4030_CNCL_OFFSET_START) ==
267 TWL4030_CNCL_OFFSET_START));
268
269 /* Make sure that the reg_cache has the same value as the HW */
270 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
271
272 /* anti-pop when changing analog gain */
273 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
274 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
275 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
276
277 /* toggle CODECPDZ as per TRM */
278 twl4030_codec_enable(codec, 0);
279 twl4030_codec_enable(codec, 1);
280}
281
Peter Ujfalusi73939582009-01-29 14:57:50 +0200282/*
283 * Unconditional power down
284 */
Peter Ujfalusi006f367e2009-01-27 11:29:43 +0200285static void twl4030_power_down(struct snd_soc_codec *codec)
286{
287 /* power down */
288 twl4030_codec_enable(codec, 0);
289}
290
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200291/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900292static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
293 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
294 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
295 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
296 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
297};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200298
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200299/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900300static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
301 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
302 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
303 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
304 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
305};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200306
307/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900308static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
309 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
310 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
311 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
312 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
313};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200314
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200315/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900316static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
317 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
318 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
319 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
320};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200321
322/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900323static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
324 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
325 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
326 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
327};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200328
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200329/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900330static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
331 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
332 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
333 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
334};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200335
336/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900337static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
338 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
339 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
340 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
341};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200342
Peter Ujfalusidf339802008-12-09 12:35:51 +0200343/* Handsfree Left */
344static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900345 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200346
347static const struct soc_enum twl4030_handsfreel_enum =
348 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
349 ARRAY_SIZE(twl4030_handsfreel_texts),
350 twl4030_handsfreel_texts);
351
352static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
353SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
354
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300355/* Handsfree Left virtual mute */
356static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
357 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
358
Peter Ujfalusidf339802008-12-09 12:35:51 +0200359/* Handsfree Right */
360static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900361 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200362
363static const struct soc_enum twl4030_handsfreer_enum =
364 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
365 ARRAY_SIZE(twl4030_handsfreer_texts),
366 twl4030_handsfreer_texts);
367
368static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
369SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
370
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300371/* Handsfree Right virtual mute */
372static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
373 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
374
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300375/* Vibra */
376/* Vibra audio path selection */
377static const char *twl4030_vibra_texts[] =
378 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
379
380static const struct soc_enum twl4030_vibra_enum =
381 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
382 ARRAY_SIZE(twl4030_vibra_texts),
383 twl4030_vibra_texts);
384
385static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
386SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
387
388/* Vibra path selection: local vibrator (PWM) or audio driven */
389static const char *twl4030_vibrapath_texts[] =
390 {"Local vibrator", "Audio"};
391
392static const struct soc_enum twl4030_vibrapath_enum =
393 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
394 ARRAY_SIZE(twl4030_vibrapath_texts),
395 twl4030_vibrapath_texts);
396
397static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
398SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
399
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200400/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900401static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300402 SOC_DAPM_SINGLE("Main Mic Capture Switch",
403 TWL4030_REG_ANAMICL, 0, 1, 0),
404 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
405 TWL4030_REG_ANAMICL, 1, 1, 0),
406 SOC_DAPM_SINGLE("AUXL Capture Switch",
407 TWL4030_REG_ANAMICL, 2, 1, 0),
408 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
409 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900410};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200411
412/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900413static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300414 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
415 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900416};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200417
418/* TX1 L/R Analog/Digital microphone selection */
419static const char *twl4030_micpathtx1_texts[] =
420 {"Analog", "Digimic0"};
421
422static const struct soc_enum twl4030_micpathtx1_enum =
423 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
424 ARRAY_SIZE(twl4030_micpathtx1_texts),
425 twl4030_micpathtx1_texts);
426
427static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
428SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
429
430/* TX2 L/R Analog/Digital microphone selection */
431static const char *twl4030_micpathtx2_texts[] =
432 {"Analog", "Digimic1"};
433
434static const struct soc_enum twl4030_micpathtx2_enum =
435 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
436 ARRAY_SIZE(twl4030_micpathtx2_texts),
437 twl4030_micpathtx2_texts);
438
439static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
440SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
441
Peter Ujfalusi73939582009-01-29 14:57:50 +0200442/* Analog bypass for AudioR1 */
443static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
444 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
445
446/* Analog bypass for AudioL1 */
447static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
448 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
449
450/* Analog bypass for AudioR2 */
451static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
452 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
453
454/* Analog bypass for AudioL2 */
455static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
456 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
457
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500458/* Analog bypass for Voice */
459static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
460 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
461
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200462/* Digital bypass gain, 0 mutes the bypass */
463static const unsigned int twl4030_dapm_dbypass_tlv[] = {
464 TLV_DB_RANGE_HEAD(2),
465 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
466 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
467};
468
469/* Digital bypass left (TX1L -> RX2L) */
470static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
471 SOC_DAPM_SINGLE_TLV("Volume",
472 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
473 twl4030_dapm_dbypass_tlv);
474
475/* Digital bypass right (TX1R -> RX2R) */
476static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
477 SOC_DAPM_SINGLE_TLV("Volume",
478 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
479 twl4030_dapm_dbypass_tlv);
480
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500481/*
482 * Voice Sidetone GAIN volume control:
483 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
484 */
485static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
486
487/* Digital bypass voice: sidetone (VUL -> VDL)*/
488static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
489 SOC_DAPM_SINGLE_TLV("Volume",
490 TWL4030_REG_VSTPGA, 0, 0x29, 0,
491 twl4030_dapm_dbypassv_tlv);
492
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200493static int micpath_event(struct snd_soc_dapm_widget *w,
494 struct snd_kcontrol *kcontrol, int event)
495{
496 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
497 unsigned char adcmicsel, micbias_ctl;
498
499 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
500 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
501 /* Prepare the bits for the given TX path:
502 * shift_l == 0: TX1 microphone path
503 * shift_l == 2: TX2 microphone path */
504 if (e->shift_l) {
505 /* TX2 microphone path */
506 if (adcmicsel & TWL4030_TX2IN_SEL)
507 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
508 else
509 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
510 } else {
511 /* TX1 microphone path */
512 if (adcmicsel & TWL4030_TX1IN_SEL)
513 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
514 else
515 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
516 }
517
518 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
519
520 return 0;
521}
522
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300523/*
524 * Output PGA builder:
525 * Handle the muting and unmuting of the given output (turning off the
526 * amplifier associated with the output pin)
527 * On mute bypass the reg_cache and mute the volume
528 * On unmute: restore the register content
529 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
530 */
531#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
532static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
533 struct snd_kcontrol *kcontrol, int event) \
534{ \
535 u8 reg_val; \
536 \
537 switch (event) { \
538 case SND_SOC_DAPM_POST_PMU: \
539 twl4030_write(w->codec, reg, \
540 twl4030_read_reg_cache(w->codec, reg)); \
541 break; \
542 case SND_SOC_DAPM_POST_PMD: \
543 reg_val = twl4030_read_reg_cache(w->codec, reg); \
544 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
545 reg_val & (~mask), \
546 reg); \
547 break; \
548 } \
549 return 0; \
550}
551
552TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
553TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
554TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
555TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
556TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
557
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300558static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800559{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800560 unsigned char hs_ctl;
561
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300562 hs_ctl = twl4030_read_reg_cache(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800563
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300564 if (ramp) {
565 /* HF ramp-up */
566 hs_ctl |= TWL4030_HF_CTL_REF_EN;
567 twl4030_write(codec, reg, hs_ctl);
568 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800569 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300570 twl4030_write(codec, reg, hs_ctl);
571 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800572 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800573 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300574 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800575 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300576 /* HF ramp-down */
577 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
578 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
579 twl4030_write(codec, reg, hs_ctl);
580 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
581 twl4030_write(codec, reg, hs_ctl);
582 udelay(40);
583 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
584 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800585 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300586}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800587
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300588static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
589 struct snd_kcontrol *kcontrol, int event)
590{
591 switch (event) {
592 case SND_SOC_DAPM_POST_PMU:
593 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
594 break;
595 case SND_SOC_DAPM_POST_PMD:
596 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
597 break;
598 }
599 return 0;
600}
601
602static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
603 struct snd_kcontrol *kcontrol, int event)
604{
605 switch (event) {
606 case SND_SOC_DAPM_POST_PMU:
607 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
608 break;
609 case SND_SOC_DAPM_POST_PMD:
610 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
611 break;
612 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800613 return 0;
614}
615
Jari Vanhala86139a12009-10-29 11:58:09 +0200616static int vibramux_event(struct snd_soc_dapm_widget *w,
617 struct snd_kcontrol *kcontrol, int event)
618{
619 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
620 return 0;
621}
622
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300623static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200624{
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500625 struct snd_soc_device *socdev = codec->socdev;
626 struct twl4030_setup_data *setup = socdev->codec_data;
627
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200628 unsigned char hs_gain, hs_pop;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300629 struct twl4030_priv *twl4030 = codec->private_data;
630 /* Base values for ramp delay calculation: 2^19 - 2^26 */
631 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
632 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200633
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300634 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
635 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200636
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500637 /* Enable external mute control, this dramatically reduces
638 * the pop-noise */
639 if (setup && setup->hs_extmute) {
640 if (setup->set_hs_extmute) {
641 setup->set_hs_extmute(1);
642 } else {
643 hs_pop |= TWL4030_EXTMUTE;
644 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
645 }
646 }
647
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300648 if (ramp) {
649 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200650 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300651 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
652 twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hs_gain);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200653 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300654 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500655 /* Wait ramp delay time + 1, so the VMID can settle */
656 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
657 twl4030->sysclk) + 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300658 } else {
659 /* Headset ramp-down _not_ according to
660 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200661 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300662 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
663 /* Wait ramp delay time + 1, so the VMID can settle */
664 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
665 twl4030->sysclk) + 1);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200666 /* Bypass the reg_cache to mute the headset */
667 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
668 hs_gain & (~0x0f),
669 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300670
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200671 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300672 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
673 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500674
675 /* Disable external mute */
676 if (setup && setup->hs_extmute) {
677 if (setup->set_hs_extmute) {
678 setup->set_hs_extmute(0);
679 } else {
680 hs_pop &= ~TWL4030_EXTMUTE;
681 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
682 }
683 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300684}
685
686static int headsetlpga_event(struct snd_soc_dapm_widget *w,
687 struct snd_kcontrol *kcontrol, int event)
688{
689 struct twl4030_priv *twl4030 = w->codec->private_data;
690
691 switch (event) {
692 case SND_SOC_DAPM_POST_PMU:
693 /* Do the ramp-up only once */
694 if (!twl4030->hsr_enabled)
695 headset_ramp(w->codec, 1);
696
697 twl4030->hsl_enabled = 1;
698 break;
699 case SND_SOC_DAPM_POST_PMD:
700 /* Do the ramp-down only if both headsetL/R is disabled */
701 if (!twl4030->hsr_enabled)
702 headset_ramp(w->codec, 0);
703
704 twl4030->hsl_enabled = 0;
705 break;
706 }
707 return 0;
708}
709
710static int headsetrpga_event(struct snd_soc_dapm_widget *w,
711 struct snd_kcontrol *kcontrol, int event)
712{
713 struct twl4030_priv *twl4030 = w->codec->private_data;
714
715 switch (event) {
716 case SND_SOC_DAPM_POST_PMU:
717 /* Do the ramp-up only once */
718 if (!twl4030->hsl_enabled)
719 headset_ramp(w->codec, 1);
720
721 twl4030->hsr_enabled = 1;
722 break;
723 case SND_SOC_DAPM_POST_PMD:
724 /* Do the ramp-down only if both headsetL/R is disabled */
725 if (!twl4030->hsl_enabled)
726 headset_ramp(w->codec, 0);
727
728 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200729 break;
730 }
731 return 0;
732}
733
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200734/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200735 * Some of the gain controls in TWL (mostly those which are associated with
736 * the outputs) are implemented in an interesting way:
737 * 0x0 : Power down (mute)
738 * 0x1 : 6dB
739 * 0x2 : 0 dB
740 * 0x3 : -6 dB
741 * Inverting not going to help with these.
742 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
743 */
744#define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
745 xinvert, tlv_array) \
746{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
747 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
748 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
749 .tlv.p = (tlv_array), \
750 .info = snd_soc_info_volsw, \
751 .get = snd_soc_get_volsw_twl4030, \
752 .put = snd_soc_put_volsw_twl4030, \
753 .private_value = (unsigned long)&(struct soc_mixer_control) \
754 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
755 .max = xmax, .invert = xinvert} }
756#define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
757 xinvert, tlv_array) \
758{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
759 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
760 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
761 .tlv.p = (tlv_array), \
762 .info = snd_soc_info_volsw_2r, \
763 .get = snd_soc_get_volsw_r2_twl4030,\
764 .put = snd_soc_put_volsw_r2_twl4030, \
765 .private_value = (unsigned long)&(struct soc_mixer_control) \
766 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
Mark Brown64089b82008-12-08 19:17:58 +0000767 .rshift = xshift, .max = xmax, .invert = xinvert} }
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200768#define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
769 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
770 xinvert, tlv_array)
771
772static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
773 struct snd_ctl_elem_value *ucontrol)
774{
775 struct soc_mixer_control *mc =
776 (struct soc_mixer_control *)kcontrol->private_value;
777 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
778 unsigned int reg = mc->reg;
779 unsigned int shift = mc->shift;
780 unsigned int rshift = mc->rshift;
781 int max = mc->max;
782 int mask = (1 << fls(max)) - 1;
783
784 ucontrol->value.integer.value[0] =
785 (snd_soc_read(codec, reg) >> shift) & mask;
786 if (ucontrol->value.integer.value[0])
787 ucontrol->value.integer.value[0] =
788 max + 1 - ucontrol->value.integer.value[0];
789
790 if (shift != rshift) {
791 ucontrol->value.integer.value[1] =
792 (snd_soc_read(codec, reg) >> rshift) & mask;
793 if (ucontrol->value.integer.value[1])
794 ucontrol->value.integer.value[1] =
795 max + 1 - ucontrol->value.integer.value[1];
796 }
797
798 return 0;
799}
800
801static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
802 struct snd_ctl_elem_value *ucontrol)
803{
804 struct soc_mixer_control *mc =
805 (struct soc_mixer_control *)kcontrol->private_value;
806 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
807 unsigned int reg = mc->reg;
808 unsigned int shift = mc->shift;
809 unsigned int rshift = mc->rshift;
810 int max = mc->max;
811 int mask = (1 << fls(max)) - 1;
812 unsigned short val, val2, val_mask;
813
814 val = (ucontrol->value.integer.value[0] & mask);
815
816 val_mask = mask << shift;
817 if (val)
818 val = max + 1 - val;
819 val = val << shift;
820 if (shift != rshift) {
821 val2 = (ucontrol->value.integer.value[1] & mask);
822 val_mask |= mask << rshift;
823 if (val2)
824 val2 = max + 1 - val2;
825 val |= val2 << rshift;
826 }
827 return snd_soc_update_bits(codec, reg, val_mask, val);
828}
829
830static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
831 struct snd_ctl_elem_value *ucontrol)
832{
833 struct soc_mixer_control *mc =
834 (struct soc_mixer_control *)kcontrol->private_value;
835 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
836 unsigned int reg = mc->reg;
837 unsigned int reg2 = mc->rreg;
838 unsigned int shift = mc->shift;
839 int max = mc->max;
840 int mask = (1<<fls(max))-1;
841
842 ucontrol->value.integer.value[0] =
843 (snd_soc_read(codec, reg) >> shift) & mask;
844 ucontrol->value.integer.value[1] =
845 (snd_soc_read(codec, reg2) >> shift) & mask;
846
847 if (ucontrol->value.integer.value[0])
848 ucontrol->value.integer.value[0] =
849 max + 1 - ucontrol->value.integer.value[0];
850 if (ucontrol->value.integer.value[1])
851 ucontrol->value.integer.value[1] =
852 max + 1 - ucontrol->value.integer.value[1];
853
854 return 0;
855}
856
857static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
858 struct snd_ctl_elem_value *ucontrol)
859{
860 struct soc_mixer_control *mc =
861 (struct soc_mixer_control *)kcontrol->private_value;
862 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
863 unsigned int reg = mc->reg;
864 unsigned int reg2 = mc->rreg;
865 unsigned int shift = mc->shift;
866 int max = mc->max;
867 int mask = (1 << fls(max)) - 1;
868 int err;
869 unsigned short val, val2, val_mask;
870
871 val_mask = mask << shift;
872 val = (ucontrol->value.integer.value[0] & mask);
873 val2 = (ucontrol->value.integer.value[1] & mask);
874
875 if (val)
876 val = max + 1 - val;
877 if (val2)
878 val2 = max + 1 - val2;
879
880 val = val << shift;
881 val2 = val2 << shift;
882
883 err = snd_soc_update_bits(codec, reg, val_mask, val);
884 if (err < 0)
885 return err;
886
887 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
888 return err;
889}
890
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500891/* Codec operation modes */
892static const char *twl4030_op_modes_texts[] = {
893 "Option 2 (voice/audio)", "Option 1 (audio)"
894};
895
896static const struct soc_enum twl4030_op_modes_enum =
897 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
898 ARRAY_SIZE(twl4030_op_modes_texts),
899 twl4030_op_modes_texts);
900
Mark Brown423c2382009-06-20 13:54:02 +0100901static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500902 struct snd_ctl_elem_value *ucontrol)
903{
904 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
905 struct twl4030_priv *twl4030 = codec->private_data;
906 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
907 unsigned short val;
908 unsigned short mask, bitmask;
909
910 if (twl4030->configured) {
911 printk(KERN_ERR "twl4030 operation mode cannot be "
912 "changed on-the-fly\n");
913 return -EBUSY;
914 }
915
916 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
917 ;
918 if (ucontrol->value.enumerated.item[0] > e->max - 1)
919 return -EINVAL;
920
921 val = ucontrol->value.enumerated.item[0] << e->shift_l;
922 mask = (bitmask - 1) << e->shift_l;
923 if (e->shift_l != e->shift_r) {
924 if (ucontrol->value.enumerated.item[1] > e->max - 1)
925 return -EINVAL;
926 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
927 mask |= (bitmask - 1) << e->shift_r;
928 }
929
930 return snd_soc_update_bits(codec, e->reg, mask, val);
931}
932
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200933/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200934 * FGAIN volume control:
935 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
936 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200937static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200938
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200939/*
940 * CGAIN volume control:
941 * 0 dB to 12 dB in 6 dB steps
942 * value 2 and 3 means 12 dB
943 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200944static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
945
946/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900947 * Voice Downlink GAIN volume control:
948 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
949 */
950static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
951
952/*
Peter Ujfalusid889a722008-12-01 10:03:46 +0200953 * Analog playback gain
954 * -24 dB to 12 dB in 2 dB steps
955 */
956static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200957
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200958/*
Peter Ujfalusi42902392008-12-01 10:03:47 +0200959 * Gain controls tied to outputs
960 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
961 */
962static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
963
964/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +0900965 * Gain control for earpiece amplifier
966 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
967 */
968static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
969
970/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200971 * Capture gain after the ADCs
972 * from 0 dB to 31 dB in 1 dB steps
973 */
974static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
975
Grazvydas Ignotas5920b452008-12-02 20:48:58 +0200976/*
977 * Gain control for input amplifiers
978 * 0 dB to 30 dB in 6 dB steps
979 */
980static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
981
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -0500982/* AVADC clock priority */
983static const char *twl4030_avadc_clk_priority_texts[] = {
984 "Voice high priority", "HiFi high priority"
985};
986
987static const struct soc_enum twl4030_avadc_clk_priority_enum =
988 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
989 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
990 twl4030_avadc_clk_priority_texts);
991
Peter Ujfalusi89492be2009-03-05 12:48:49 +0200992static const char *twl4030_rampdelay_texts[] = {
993 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
994 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
995 "3495/2581/1748 ms"
996};
997
998static const struct soc_enum twl4030_rampdelay_enum =
999 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1000 ARRAY_SIZE(twl4030_rampdelay_texts),
1001 twl4030_rampdelay_texts);
1002
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001003/* Vibra H-bridge direction mode */
1004static const char *twl4030_vibradirmode_texts[] = {
1005 "Vibra H-bridge direction", "Audio data MSB",
1006};
1007
1008static const struct soc_enum twl4030_vibradirmode_enum =
1009 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1010 ARRAY_SIZE(twl4030_vibradirmode_texts),
1011 twl4030_vibradirmode_texts);
1012
1013/* Vibra H-bridge direction */
1014static const char *twl4030_vibradir_texts[] = {
1015 "Positive polarity", "Negative polarity",
1016};
1017
1018static const struct soc_enum twl4030_vibradir_enum =
1019 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1020 ARRAY_SIZE(twl4030_vibradir_texts),
1021 twl4030_vibradir_texts);
1022
Steve Sakomancc175572008-10-30 21:35:26 -07001023static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001024 /* Codec operation mode control */
1025 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1026 snd_soc_get_enum_double,
1027 snd_soc_put_twl4030_opmode_enum_double),
1028
Peter Ujfalusid889a722008-12-01 10:03:46 +02001029 /* Common playback gain controls */
1030 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1031 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1032 0, 0x3f, 0, digital_fine_tlv),
1033 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1034 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1035 0, 0x3f, 0, digital_fine_tlv),
1036
1037 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1038 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1039 6, 0x2, 0, digital_coarse_tlv),
1040 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1041 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1042 6, 0x2, 0, digital_coarse_tlv),
1043
1044 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1045 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1046 3, 0x12, 1, analog_tlv),
1047 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1048 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1049 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001050 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1051 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1052 1, 1, 0),
1053 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1054 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1055 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001056
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001057 /* Common voice downlink gain controls */
1058 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1059 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1060
1061 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1062 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1063
1064 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1065 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1066
Peter Ujfalusi42902392008-12-01 10:03:47 +02001067 /* Separate output gain controls */
1068 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1069 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1070 4, 3, 0, output_tvl),
1071
1072 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1073 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1074
1075 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1076 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1077 4, 3, 0, output_tvl),
1078
1079 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001080 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001081
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001082 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001083 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001084 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1085 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001086 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1087 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1088 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001089
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001090 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001091 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001092
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001093 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1094
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001095 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001096
1097 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1098 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001099};
1100
Steve Sakomancc175572008-10-30 21:35:26 -07001101static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001102 /* Left channel inputs */
1103 SND_SOC_DAPM_INPUT("MAINMIC"),
1104 SND_SOC_DAPM_INPUT("HSMIC"),
1105 SND_SOC_DAPM_INPUT("AUXL"),
1106 SND_SOC_DAPM_INPUT("CARKITMIC"),
1107 /* Right channel inputs */
1108 SND_SOC_DAPM_INPUT("SUBMIC"),
1109 SND_SOC_DAPM_INPUT("AUXR"),
1110 /* Digital microphones (Stereo) */
1111 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1112 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001113
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001114 /* Outputs */
Steve Sakomancc175572008-10-30 21:35:26 -07001115 SND_SOC_DAPM_OUTPUT("OUTL"),
1116 SND_SOC_DAPM_OUTPUT("OUTR"),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001117 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001118 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1119 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001120 SND_SOC_DAPM_OUTPUT("HSOL"),
1121 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001122 SND_SOC_DAPM_OUTPUT("CARKITL"),
1123 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001124 SND_SOC_DAPM_OUTPUT("HFL"),
1125 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001126 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001127
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001128 /* DACs */
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001129 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001130 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001131 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001132 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001133 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001134 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001135 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001136 SND_SOC_NOPM, 0, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001137 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001138 SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001139
Peter Ujfalusi73939582009-01-29 14:57:50 +02001140 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001141 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1142 &twl4030_dapm_abypassr1_control),
1143 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1144 &twl4030_dapm_abypassl1_control),
1145 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1146 &twl4030_dapm_abypassr2_control),
1147 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1148 &twl4030_dapm_abypassl2_control),
1149 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1150 &twl4030_dapm_abypassv_control),
1151
1152 /* Master analog loopback switch */
1153 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1154 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001155
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001156 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001157 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1158 &twl4030_dapm_dbypassl_control),
1159 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1160 &twl4030_dapm_dbypassr_control),
1161 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1162 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001163
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001164 /* Digital mixers, power control for the physical DACs */
1165 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1166 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1167 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1168 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1169 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1170 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1171 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1172 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1173 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1174 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1175
1176 /* Analog mixers, power control for the physical PGAs */
1177 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1178 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1179 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1180 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1181 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1182 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1183 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1184 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1185 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1186 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001187
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001188 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001189 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001190 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1191 &twl4030_dapm_earpiece_controls[0],
1192 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001193 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1194 0, 0, NULL, 0, earpiecepga_event,
1195 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001196 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001197 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1198 &twl4030_dapm_predrivel_controls[0],
1199 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001200 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1201 0, 0, NULL, 0, predrivelpga_event,
1202 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001203 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1204 &twl4030_dapm_predriver_controls[0],
1205 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001206 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1207 0, 0, NULL, 0, predriverpga_event,
1208 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001209 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001210 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001211 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001212 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1213 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1214 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001215 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1216 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1217 &twl4030_dapm_hsor_controls[0],
1218 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001219 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1220 0, 0, NULL, 0, headsetrpga_event,
1221 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001222 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001223 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1224 &twl4030_dapm_carkitl_controls[0],
1225 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001226 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1227 0, 0, NULL, 0, carkitlpga_event,
1228 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001229 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1230 &twl4030_dapm_carkitr_controls[0],
1231 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001232 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1233 0, 0, NULL, 0, carkitrpga_event,
1234 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001235
1236 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001237 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001238 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1239 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001240 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001241 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001242 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1243 0, 0, NULL, 0, handsfreelpga_event,
1244 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1245 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1246 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001247 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001248 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001249 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1250 0, 0, NULL, 0, handsfreerpga_event,
1251 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001252 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001253 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1254 &twl4030_dapm_vibra_control, vibramux_event,
1255 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001256 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1257 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001258
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001259 /* Introducing four virtual ADC, since TWL4030 have four channel for
1260 capture */
1261 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1262 SND_SOC_NOPM, 0, 0),
1263 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1264 SND_SOC_NOPM, 0, 0),
1265 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1266 SND_SOC_NOPM, 0, 0),
1267 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1268 SND_SOC_NOPM, 0, 0),
1269
1270 /* Analog/Digital mic path selection.
1271 TX1 Left/Right: either analog Left/Right or Digimic0
1272 TX2 Left/Right: either analog Left/Right or Digimic1 */
1273 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1274 &twl4030_dapm_micpathtx1_control, micpath_event,
1275 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1276 SND_SOC_DAPM_POST_REG),
1277 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1278 &twl4030_dapm_micpathtx2_control, micpath_event,
1279 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1280 SND_SOC_DAPM_POST_REG),
1281
Joonyoung Shim97b80962009-05-11 20:36:08 +09001282 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001283 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001284 TWL4030_REG_ANAMICL, 4, 0,
1285 &twl4030_dapm_analoglmic_controls[0],
1286 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001287 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001288 TWL4030_REG_ANAMICR, 4, 0,
1289 &twl4030_dapm_analogrmic_controls[0],
1290 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001291
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001292 SND_SOC_DAPM_PGA("ADC Physical Left",
1293 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1294 SND_SOC_DAPM_PGA("ADC Physical Right",
1295 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001296
1297 SND_SOC_DAPM_PGA("Digimic0 Enable",
1298 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1299 SND_SOC_DAPM_PGA("Digimic1 Enable",
1300 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1301
1302 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1303 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1304 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001305
Steve Sakomancc175572008-10-30 21:35:26 -07001306};
1307
1308static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001309 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1310 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1311 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1312 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1313 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001314
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001315 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1316 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1317 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1318 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1319 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001320
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001321 /* Internal playback routings */
1322 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001323 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1324 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1325 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1326 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001327 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001328 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001329 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1330 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1331 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1332 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001333 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001334 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001335 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1336 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1337 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1338 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001339 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001340 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001341 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1342 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1343 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001344 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001345 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001346 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1347 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1348 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001349 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001350 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001351 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1352 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1353 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001354 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001355 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001356 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1357 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1358 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001359 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001360 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001361 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1362 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1363 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1364 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001365 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1366 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001367 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001368 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1369 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1370 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1371 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001372 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1373 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001374 /* Vibra */
1375 {"Vibra Mux", "AudioL1", "DAC Left1"},
1376 {"Vibra Mux", "AudioR1", "DAC Right1"},
1377 {"Vibra Mux", "AudioL2", "DAC Left2"},
1378 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001379
Steve Sakomancc175572008-10-30 21:35:26 -07001380 /* outputs */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001381 {"OUTL", NULL, "Analog L2 Playback Mixer"},
1382 {"OUTR", NULL, "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001383 {"EARPIECE", NULL, "Earpiece PGA"},
1384 {"PREDRIVEL", NULL, "PredriveL PGA"},
1385 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001386 {"HSOL", NULL, "HeadsetL PGA"},
1387 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001388 {"CARKITL", NULL, "CarkitL PGA"},
1389 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001390 {"HFL", NULL, "HandsfreeL PGA"},
1391 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001392 {"Vibra Route", "Audio", "Vibra Mux"},
1393 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001394
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001395 /* Capture path */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001396 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1397 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1398 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1399 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001400
Peter Ujfalusi90289352009-08-14 08:44:00 +03001401 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1402 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001403
Peter Ujfalusi90289352009-08-14 08:44:00 +03001404 {"ADC Physical Left", NULL, "Analog Left"},
1405 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001406
1407 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1408 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1409
1410 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001411 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001412 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1413 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001414 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001415 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1416 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001417 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001418 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1419 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001420 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001421 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1422
1423 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1424 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1425 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1426 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1427
Peter Ujfalusi73939582009-01-29 14:57:50 +02001428 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001429 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1430 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1431 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1432 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1433 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001434
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001435 /* Supply for the Analog loopbacks */
1436 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1437 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1438 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1439 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1440 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1441
Peter Ujfalusi73939582009-01-29 14:57:50 +02001442 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1443 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1444 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1445 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001446 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001447
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001448 /* Digital bypass routes */
1449 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1450 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001451 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001452
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001453 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1454 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1455 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001456
Steve Sakomancc175572008-10-30 21:35:26 -07001457};
1458
1459static int twl4030_add_widgets(struct snd_soc_codec *codec)
1460{
1461 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1462 ARRAY_SIZE(twl4030_dapm_widgets));
1463
1464 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1465
1466 snd_soc_dapm_new_widgets(codec);
1467 return 0;
1468}
1469
Steve Sakomancc175572008-10-30 21:35:26 -07001470static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1471 enum snd_soc_bias_level level)
1472{
1473 switch (level) {
1474 case SND_SOC_BIAS_ON:
Peter Ujfalusi2845fa12009-10-28 10:57:05 +02001475 twl4030_apll_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001476 break;
1477 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001478 break;
1479 case SND_SOC_BIAS_STANDBY:
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001480 if (codec->bias_level == SND_SOC_BIAS_OFF)
1481 twl4030_power_up(codec);
Peter Ujfalusi2845fa12009-10-28 10:57:05 +02001482 twl4030_apll_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001483 break;
1484 case SND_SOC_BIAS_OFF:
1485 twl4030_power_down(codec);
1486 break;
1487 }
1488 codec->bias_level = level;
1489
1490 return 0;
1491}
1492
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001493static void twl4030_constraints(struct twl4030_priv *twl4030,
1494 struct snd_pcm_substream *mst_substream)
1495{
1496 struct snd_pcm_substream *slv_substream;
1497
1498 /* Pick the stream, which need to be constrained */
1499 if (mst_substream == twl4030->master_substream)
1500 slv_substream = twl4030->slave_substream;
1501 else if (mst_substream == twl4030->slave_substream)
1502 slv_substream = twl4030->master_substream;
1503 else /* This should not happen.. */
1504 return;
1505
1506 /* Set the constraints according to the already configured stream */
1507 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1508 SNDRV_PCM_HW_PARAM_RATE,
1509 twl4030->rate,
1510 twl4030->rate);
1511
1512 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1513 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1514 twl4030->sample_bits,
1515 twl4030->sample_bits);
1516
1517 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1518 SNDRV_PCM_HW_PARAM_CHANNELS,
1519 twl4030->channels,
1520 twl4030->channels);
1521}
1522
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001523/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1524 * capture has to be enabled/disabled. */
1525static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1526 int enable)
1527{
1528 u8 reg, mask;
1529
1530 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1531
1532 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1533 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1534 else
1535 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1536
1537 if (enable)
1538 reg |= mask;
1539 else
1540 reg &= ~mask;
1541
1542 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1543}
1544
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001545static int twl4030_startup(struct snd_pcm_substream *substream,
1546 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001547{
1548 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1549 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001550 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001551 struct twl4030_priv *twl4030 = codec->private_data;
1552
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001553 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001554 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001555 /* The DAI has one configuration for playback and capture, so
1556 * if the DAI has been already configured then constrain this
1557 * substream to match it. */
1558 if (twl4030->configured)
1559 twl4030_constraints(twl4030, twl4030->master_substream);
1560 } else {
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001561 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1562 TWL4030_OPTION_1)) {
1563 /* In option2 4 channel is not supported, set the
1564 * constraint for the first stream for channels, the
1565 * second stream will 'inherit' this cosntraint */
1566 snd_pcm_hw_constraint_minmax(substream->runtime,
1567 SNDRV_PCM_HW_PARAM_CHANNELS,
1568 2, 2);
1569 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001570 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001571 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001572
1573 return 0;
1574}
1575
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001576static void twl4030_shutdown(struct snd_pcm_substream *substream,
1577 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001578{
1579 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1580 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001581 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001582 struct twl4030_priv *twl4030 = codec->private_data;
1583
1584 if (twl4030->master_substream == substream)
1585 twl4030->master_substream = twl4030->slave_substream;
1586
1587 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001588
1589 /* If all streams are closed, or the remaining stream has not yet
1590 * been configured than set the DAI as not configured. */
1591 if (!twl4030->master_substream)
1592 twl4030->configured = 0;
1593 else if (!twl4030->master_substream->runtime->channels)
1594 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001595
1596 /* If the closing substream had 4 channel, do the necessary cleanup */
1597 if (substream->runtime->channels == 4)
1598 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001599}
1600
Steve Sakomancc175572008-10-30 21:35:26 -07001601static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001602 struct snd_pcm_hw_params *params,
1603 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001604{
1605 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1606 struct snd_soc_device *socdev = rtd->socdev;
Mark Brown6627a652009-01-23 22:55:23 +00001607 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001608 struct twl4030_priv *twl4030 = codec->private_data;
Steve Sakomancc175572008-10-30 21:35:26 -07001609 u8 mode, old_mode, format, old_format;
1610
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001611 /* If the substream has 4 channel, do the necessary setup */
1612 if (params_channels(params) == 4) {
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001613 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1614 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1615
1616 /* Safety check: are we in the correct operating mode and
1617 * the interface is in TDM mode? */
1618 if ((mode & TWL4030_OPTION_1) &&
1619 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001620 twl4030_tdm_enable(codec, substream->stream, 1);
1621 else
1622 return -EINVAL;
1623 }
1624
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001625 if (twl4030->configured)
1626 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001627 return 0;
1628
Steve Sakomancc175572008-10-30 21:35:26 -07001629 /* bit rate */
1630 old_mode = twl4030_read_reg_cache(codec,
1631 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1632 mode = old_mode & ~TWL4030_APLL_RATE;
1633
1634 switch (params_rate(params)) {
1635 case 8000:
1636 mode |= TWL4030_APLL_RATE_8000;
1637 break;
1638 case 11025:
1639 mode |= TWL4030_APLL_RATE_11025;
1640 break;
1641 case 12000:
1642 mode |= TWL4030_APLL_RATE_12000;
1643 break;
1644 case 16000:
1645 mode |= TWL4030_APLL_RATE_16000;
1646 break;
1647 case 22050:
1648 mode |= TWL4030_APLL_RATE_22050;
1649 break;
1650 case 24000:
1651 mode |= TWL4030_APLL_RATE_24000;
1652 break;
1653 case 32000:
1654 mode |= TWL4030_APLL_RATE_32000;
1655 break;
1656 case 44100:
1657 mode |= TWL4030_APLL_RATE_44100;
1658 break;
1659 case 48000:
1660 mode |= TWL4030_APLL_RATE_48000;
1661 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001662 case 96000:
1663 mode |= TWL4030_APLL_RATE_96000;
1664 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001665 default:
1666 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1667 params_rate(params));
1668 return -EINVAL;
1669 }
1670
1671 if (mode != old_mode) {
1672 /* change rate and set CODECPDZ */
Peter Ujfalusi73939582009-01-29 14:57:50 +02001673 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001674 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001675 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001676 }
1677
1678 /* sample size */
1679 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1680 format = old_format;
1681 format &= ~TWL4030_DATA_WIDTH;
1682 switch (params_format(params)) {
1683 case SNDRV_PCM_FORMAT_S16_LE:
1684 format |= TWL4030_DATA_WIDTH_16S_16W;
1685 break;
1686 case SNDRV_PCM_FORMAT_S24_LE:
1687 format |= TWL4030_DATA_WIDTH_32S_24W;
1688 break;
1689 default:
1690 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1691 params_format(params));
1692 return -EINVAL;
1693 }
1694
1695 if (format != old_format) {
1696
1697 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001698 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001699
1700 /* change format */
1701 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1702
1703 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001704 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001705 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001706
1707 /* Store the important parameters for the DAI configuration and set
1708 * the DAI as configured */
1709 twl4030->configured = 1;
1710 twl4030->rate = params_rate(params);
1711 twl4030->sample_bits = hw_param_interval(params,
1712 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1713 twl4030->channels = params_channels(params);
1714
1715 /* If both playback and capture streams are open, and one of them
1716 * is setting the hw parameters right now (since we are here), set
1717 * constraints to the other stream to match the current one. */
1718 if (twl4030->slave_substream)
1719 twl4030_constraints(twl4030, substream);
1720
Steve Sakomancc175572008-10-30 21:35:26 -07001721 return 0;
1722}
1723
1724static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1725 int clk_id, unsigned int freq, int dir)
1726{
1727 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001728 struct twl4030_priv *twl4030 = codec->private_data;
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001729 u8 apll_ctrl;
Steve Sakomancc175572008-10-30 21:35:26 -07001730
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001731 apll_ctrl = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
1732 apll_ctrl &= ~TWL4030_APLL_INFREQ;
Steve Sakomancc175572008-10-30 21:35:26 -07001733 switch (freq) {
1734 case 19200000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001735 apll_ctrl |= TWL4030_APLL_INFREQ_19200KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001736 twl4030->sysclk = 19200;
Steve Sakomancc175572008-10-30 21:35:26 -07001737 break;
1738 case 26000000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001739 apll_ctrl |= TWL4030_APLL_INFREQ_26000KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001740 twl4030->sysclk = 26000;
Steve Sakomancc175572008-10-30 21:35:26 -07001741 break;
1742 case 38400000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001743 apll_ctrl |= TWL4030_APLL_INFREQ_38400KHZ;
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001744 twl4030->sysclk = 38400;
Steve Sakomancc175572008-10-30 21:35:26 -07001745 break;
1746 default:
1747 printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n",
1748 freq);
1749 return -EINVAL;
1750 }
1751
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001752 twl4030_write(codec, TWL4030_REG_APLL_CTL, apll_ctrl);
Steve Sakomancc175572008-10-30 21:35:26 -07001753
1754 return 0;
1755}
1756
1757static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1758 unsigned int fmt)
1759{
1760 struct snd_soc_codec *codec = codec_dai->codec;
1761 u8 old_format, format;
1762
1763 /* get format */
1764 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1765 format = old_format;
1766
1767 /* set master/slave audio interface */
1768 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1769 case SND_SOC_DAIFMT_CBM_CFM:
1770 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001771 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001772 break;
1773 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001774 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001775 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001776 break;
1777 default:
1778 return -EINVAL;
1779 }
1780
1781 /* interface format */
1782 format &= ~TWL4030_AIF_FORMAT;
1783 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1784 case SND_SOC_DAIFMT_I2S:
1785 format |= TWL4030_AIF_FORMAT_CODEC;
1786 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001787 case SND_SOC_DAIFMT_DSP_A:
1788 format |= TWL4030_AIF_FORMAT_TDM;
1789 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001790 default:
1791 return -EINVAL;
1792 }
1793
1794 if (format != old_format) {
1795
1796 /* clear CODECPDZ before changing format (codec requirement) */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001797 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001798
1799 /* change format */
1800 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1801
1802 /* set CODECPDZ afterwards */
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +02001803 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001804 }
1805
1806 return 0;
1807}
1808
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001809static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1810{
1811 struct snd_soc_codec *codec = dai->codec;
1812 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1813
1814 if (tristate)
1815 reg |= TWL4030_AIF_TRI_EN;
1816 else
1817 reg &= ~TWL4030_AIF_TRI_EN;
1818
1819 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1820}
1821
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001822/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1823 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1824static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1825 int enable)
1826{
1827 u8 reg, mask;
1828
1829 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1830
1831 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1832 mask = TWL4030_ARXL1_VRX_EN;
1833 else
1834 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1835
1836 if (enable)
1837 reg |= mask;
1838 else
1839 reg &= ~mask;
1840
1841 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1842}
1843
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001844static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1845 struct snd_soc_dai *dai)
1846{
1847 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1848 struct snd_soc_device *socdev = rtd->socdev;
1849 struct snd_soc_codec *codec = socdev->card->codec;
1850 u8 infreq;
1851 u8 mode;
1852
1853 /* If the system master clock is not 26MHz, the voice PCM interface is
1854 * not avilable.
1855 */
1856 infreq = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL)
1857 & TWL4030_APLL_INFREQ;
1858
1859 if (infreq != TWL4030_APLL_INFREQ_26000KHZ) {
1860 printk(KERN_ERR "TWL4030 voice startup: "
1861 "MCLK is not 26MHz, call set_sysclk() on init\n");
1862 return -EINVAL;
1863 }
1864
1865 /* If the codec mode is not option2, the voice PCM interface is not
1866 * avilable.
1867 */
1868 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1869 & TWL4030_OPT_MODE;
1870
1871 if (mode != TWL4030_OPTION_2) {
1872 printk(KERN_ERR "TWL4030 voice startup: "
1873 "the codec mode is not option2\n");
1874 return -EINVAL;
1875 }
1876
1877 return 0;
1878}
1879
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001880static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1881 struct snd_soc_dai *dai)
1882{
1883 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1884 struct snd_soc_device *socdev = rtd->socdev;
1885 struct snd_soc_codec *codec = socdev->card->codec;
1886
1887 /* Enable voice digital filters */
1888 twl4030_voice_enable(codec, substream->stream, 0);
1889}
1890
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001891static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
1892 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1893{
1894 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1895 struct snd_soc_device *socdev = rtd->socdev;
1896 struct snd_soc_codec *codec = socdev->card->codec;
1897 u8 old_mode, mode;
1898
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001899 /* Enable voice digital filters */
1900 twl4030_voice_enable(codec, substream->stream, 1);
1901
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001902 /* bit rate */
1903 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1904 & ~(TWL4030_CODECPDZ);
1905 mode = old_mode;
1906
1907 switch (params_rate(params)) {
1908 case 8000:
1909 mode &= ~(TWL4030_SEL_16K);
1910 break;
1911 case 16000:
1912 mode |= TWL4030_SEL_16K;
1913 break;
1914 default:
1915 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
1916 params_rate(params));
1917 return -EINVAL;
1918 }
1919
1920 if (mode != old_mode) {
1921 /* change rate and set CODECPDZ */
1922 twl4030_codec_enable(codec, 0);
1923 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1924 twl4030_codec_enable(codec, 1);
1925 }
1926
1927 return 0;
1928}
1929
1930static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1931 int clk_id, unsigned int freq, int dir)
1932{
1933 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001934 u8 apll_ctrl;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001935
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001936 apll_ctrl = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
1937 apll_ctrl &= ~TWL4030_APLL_INFREQ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001938 switch (freq) {
1939 case 26000000:
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001940 apll_ctrl |= TWL4030_APLL_INFREQ_26000KHZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001941 break;
1942 default:
1943 printk(KERN_ERR "TWL4030 voice set sysclk: unknown rate %d\n",
1944 freq);
1945 return -EINVAL;
1946 }
1947
Peter Ujfalusid8707ce2009-10-19 15:42:19 +03001948 twl4030_write(codec, TWL4030_REG_APLL_CTL, apll_ctrl);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001949
1950 return 0;
1951}
1952
1953static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1954 unsigned int fmt)
1955{
1956 struct snd_soc_codec *codec = codec_dai->codec;
1957 u8 old_format, format;
1958
1959 /* get format */
1960 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
1961 format = old_format;
1962
1963 /* set master/slave audio interface */
1964 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05001965 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001966 format &= ~(TWL4030_VIF_SLAVE_EN);
1967 break;
1968 case SND_SOC_DAIFMT_CBS_CFS:
1969 format |= TWL4030_VIF_SLAVE_EN;
1970 break;
1971 default:
1972 return -EINVAL;
1973 }
1974
1975 /* clock inversion */
1976 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1977 case SND_SOC_DAIFMT_IB_NF:
1978 format &= ~(TWL4030_VIF_FORMAT);
1979 break;
1980 case SND_SOC_DAIFMT_NB_IF:
1981 format |= TWL4030_VIF_FORMAT;
1982 break;
1983 default:
1984 return -EINVAL;
1985 }
1986
1987 if (format != old_format) {
1988 /* change format and set CODECPDZ */
1989 twl4030_codec_enable(codec, 0);
1990 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
1991 twl4030_codec_enable(codec, 1);
1992 }
1993
1994 return 0;
1995}
1996
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001997static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
1998{
1999 struct snd_soc_codec *codec = dai->codec;
2000 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2001
2002 if (tristate)
2003 reg |= TWL4030_VIF_TRI_EN;
2004 else
2005 reg &= ~TWL4030_VIF_TRI_EN;
2006
2007 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2008}
2009
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002010#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Steve Sakomancc175572008-10-30 21:35:26 -07002011#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2012
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002013static struct snd_soc_dai_ops twl4030_dai_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002014 .startup = twl4030_startup,
2015 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002016 .hw_params = twl4030_hw_params,
2017 .set_sysclk = twl4030_set_dai_sysclk,
2018 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002019 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002020};
2021
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002022static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2023 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002024 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002025 .hw_params = twl4030_voice_hw_params,
2026 .set_sysclk = twl4030_voice_set_dai_sysclk,
2027 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002028 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002029};
2030
2031struct snd_soc_dai twl4030_dai[] = {
2032{
Steve Sakomancc175572008-10-30 21:35:26 -07002033 .name = "twl4030",
2034 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002035 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002036 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002037 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002038 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Steve Sakomancc175572008-10-30 21:35:26 -07002039 .formats = TWL4030_FORMATS,},
2040 .capture = {
2041 .stream_name = "Capture",
2042 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002043 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002044 .rates = TWL4030_RATES,
2045 .formats = TWL4030_FORMATS,},
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002046 .ops = &twl4030_dai_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002047},
2048{
2049 .name = "twl4030 Voice",
2050 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002051 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002052 .channels_min = 1,
2053 .channels_max = 1,
2054 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2055 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2056 .capture = {
2057 .stream_name = "Capture",
2058 .channels_min = 1,
2059 .channels_max = 2,
2060 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2061 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2062 .ops = &twl4030_dai_voice_ops,
2063},
Steve Sakomancc175572008-10-30 21:35:26 -07002064};
2065EXPORT_SYMBOL_GPL(twl4030_dai);
2066
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002067static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
Steve Sakomancc175572008-10-30 21:35:26 -07002068{
2069 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002070 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002071
2072 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2073
2074 return 0;
2075}
2076
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002077static int twl4030_soc_resume(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002078{
2079 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002080 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002081
2082 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2083 twl4030_set_bias_level(codec, codec->suspend_bias_level);
2084 return 0;
2085}
2086
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002087static struct snd_soc_codec *twl4030_codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002088
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002089static int twl4030_soc_probe(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002090{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002091 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002092 struct twl4030_setup_data *setup = socdev->codec_data;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002093 struct snd_soc_codec *codec;
2094 struct twl4030_priv *twl4030;
2095 int ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002096
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002097 BUG_ON(!twl4030_codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002098
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002099 codec = twl4030_codec;
2100 twl4030 = codec->private_data;
2101 socdev->card->codec = codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002102
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002103 /* Configuration for headset ramp delay from setup data */
2104 if (setup) {
2105 unsigned char hs_pop;
2106
2107 if (setup->sysclk)
2108 twl4030->sysclk = setup->sysclk;
2109 else
2110 twl4030->sysclk = 26000;
2111
2112 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
2113 hs_pop &= ~TWL4030_RAMP_DELAY;
2114 hs_pop |= (setup->ramp_delay_value << 2);
2115 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
2116 } else {
2117 twl4030->sysclk = 26000;
2118 }
2119
Steve Sakomancc175572008-10-30 21:35:26 -07002120 /* register pcms */
2121 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2122 if (ret < 0) {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002123 dev_err(&pdev->dev, "failed to create pcms\n");
2124 return ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002125 }
2126
Ian Molton3e8e1952009-01-09 00:23:21 +00002127 snd_soc_add_controls(codec, twl4030_snd_controls,
2128 ARRAY_SIZE(twl4030_snd_controls));
Steve Sakomancc175572008-10-30 21:35:26 -07002129 twl4030_add_widgets(codec);
2130
Mark Brown968a6022008-11-28 11:49:07 +00002131 ret = snd_soc_init_card(socdev);
Steve Sakomancc175572008-10-30 21:35:26 -07002132 if (ret < 0) {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002133 dev_err(&pdev->dev, "failed to register card\n");
Steve Sakomancc175572008-10-30 21:35:26 -07002134 goto card_err;
2135 }
2136
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002137 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002138
2139card_err:
2140 snd_soc_free_pcms(socdev);
2141 snd_soc_dapm_free(socdev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002142
Steve Sakomancc175572008-10-30 21:35:26 -07002143 return ret;
2144}
2145
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002146static int twl4030_soc_remove(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002147{
2148 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002149 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002150
Peter Ujfalusi73939582009-01-29 14:57:50 +02002151 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusic6d1662b2009-01-08 15:52:43 +02002152 snd_soc_free_pcms(socdev);
2153 snd_soc_dapm_free(socdev);
Peter Ujfalusi73939582009-01-29 14:57:50 +02002154 kfree(codec->private_data);
Steve Sakomancc175572008-10-30 21:35:26 -07002155 kfree(codec);
2156
2157 return 0;
2158}
2159
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002160static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2161{
2162 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2163 struct snd_soc_codec *codec;
2164 struct twl4030_priv *twl4030;
2165 int ret;
2166
2167 if (!pdata || !(pdata->audio_mclk == 19200000 ||
2168 pdata->audio_mclk == 26000000 ||
2169 pdata->audio_mclk == 38400000)) {
2170 dev_err(&pdev->dev, "Invalid platform_data\n");
2171 return -EINVAL;
2172 }
2173
2174 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2175 if (twl4030 == NULL) {
2176 dev_err(&pdev->dev, "Can not allocate memroy\n");
2177 return -ENOMEM;
2178 }
2179
2180 codec = &twl4030->codec;
2181 codec->private_data = twl4030;
2182 codec->dev = &pdev->dev;
2183 twl4030_dai[0].dev = &pdev->dev;
2184 twl4030_dai[1].dev = &pdev->dev;
2185
2186 mutex_init(&codec->mutex);
2187 INIT_LIST_HEAD(&codec->dapm_widgets);
2188 INIT_LIST_HEAD(&codec->dapm_paths);
2189
2190 codec->name = "twl4030";
2191 codec->owner = THIS_MODULE;
2192 codec->read = twl4030_read_reg_cache;
2193 codec->write = twl4030_write;
2194 codec->set_bias_level = twl4030_set_bias_level;
2195 codec->dai = twl4030_dai;
2196 codec->num_dai = ARRAY_SIZE(twl4030_dai),
2197 codec->reg_cache_size = sizeof(twl4030_reg);
2198 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2199 GFP_KERNEL);
2200 if (codec->reg_cache == NULL) {
2201 ret = -ENOMEM;
2202 goto error_cache;
2203 }
2204
2205 platform_set_drvdata(pdev, twl4030);
2206 twl4030_codec = codec;
2207
2208 /* Set the defaults, and power up the codec */
2209 twl4030_init_chip(codec);
2210 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2211
2212 ret = snd_soc_register_codec(codec);
2213 if (ret != 0) {
2214 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2215 goto error_codec;
2216 }
2217
2218 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2219 if (ret != 0) {
2220 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2221 snd_soc_unregister_codec(codec);
2222 goto error_codec;
2223 }
2224
2225 return 0;
2226
2227error_codec:
2228 twl4030_power_down(codec);
2229 kfree(codec->reg_cache);
2230error_cache:
2231 kfree(twl4030);
2232 return ret;
2233}
2234
2235static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2236{
2237 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2238
2239 kfree(twl4030);
2240
2241 twl4030_codec = NULL;
2242 return 0;
2243}
2244
2245MODULE_ALIAS("platform:twl4030_codec_audio");
2246
2247static struct platform_driver twl4030_codec_driver = {
2248 .probe = twl4030_codec_probe,
2249 .remove = __devexit_p(twl4030_codec_remove),
2250 .driver = {
2251 .name = "twl4030_codec_audio",
2252 .owner = THIS_MODULE,
2253 },
Steve Sakomancc175572008-10-30 21:35:26 -07002254};
Steve Sakomancc175572008-10-30 21:35:26 -07002255
Takashi Iwai24e07db2008-12-10 07:40:24 +01002256static int __init twl4030_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +00002257{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002258 return platform_driver_register(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002259}
Takashi Iwai24e07db2008-12-10 07:40:24 +01002260module_init(twl4030_modinit);
Mark Brown64089b82008-12-08 19:17:58 +00002261
2262static void __exit twl4030_exit(void)
2263{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002264 platform_driver_unregister(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002265}
2266module_exit(twl4030_exit);
2267
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002268struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2269 .probe = twl4030_soc_probe,
2270 .remove = twl4030_soc_remove,
2271 .suspend = twl4030_soc_suspend,
2272 .resume = twl4030_soc_resume,
2273};
2274EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2275
Steve Sakomancc175572008-10-30 21:35:26 -07002276MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2277MODULE_AUTHOR("Steve Sakoman");
2278MODULE_LICENSE("GPL");