Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 1 | /* |
Rob Clark | 8bb0daf | 2013-02-11 12:43:09 -0500 | [diff] [blame] | 2 | * drivers/gpu/drm/omapdrm/omap_drv.c |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments |
| 5 | * Author: Rob Clark <rob@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License version 2 as published by |
| 9 | * the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 20 | #include <linux/wait.h> |
| 21 | |
| 22 | #include <drm/drm_atomic.h> |
Laurent Pinchart | cef77d4 | 2015-03-05 21:50:00 +0200 | [diff] [blame] | 23 | #include <drm/drm_atomic_helper.h> |
Laurent Pinchart | 2d278f5 | 2015-03-05 21:31:37 +0200 | [diff] [blame] | 24 | #include <drm/drm_crtc_helper.h> |
| 25 | #include <drm/drm_fb_helper.h> |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 26 | |
Andy Gross | 5c13779 | 2012-03-05 10:48:39 -0600 | [diff] [blame] | 27 | #include "omap_dmm_tiler.h" |
Laurent Pinchart | 2d278f5 | 2015-03-05 21:31:37 +0200 | [diff] [blame] | 28 | #include "omap_drv.h" |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 29 | |
| 30 | #define DRIVER_NAME MODULE_NAME |
| 31 | #define DRIVER_DESC "OMAP DRM" |
| 32 | #define DRIVER_DATE "20110917" |
| 33 | #define DRIVER_MAJOR 1 |
| 34 | #define DRIVER_MINOR 0 |
| 35 | #define DRIVER_PATCHLEVEL 0 |
| 36 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 37 | static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS; |
| 38 | |
| 39 | MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs"); |
| 40 | module_param(num_crtc, int, 0600); |
| 41 | |
| 42 | /* |
| 43 | * mode config funcs |
| 44 | */ |
| 45 | |
| 46 | /* Notes about mapping DSS and DRM entities: |
| 47 | * CRTC: overlay |
| 48 | * encoder: manager.. with some extension to allow one primary CRTC |
| 49 | * and zero or more video CRTC's to be mapped to one encoder? |
| 50 | * connector: dssdev.. manager can be attached/detached from different |
| 51 | * devices |
| 52 | */ |
| 53 | |
| 54 | static void omap_fb_output_poll_changed(struct drm_device *dev) |
| 55 | { |
| 56 | struct omap_drm_private *priv = dev->dev_private; |
| 57 | DBG("dev=%p", dev); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 58 | if (priv->fbdev) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 59 | drm_fb_helper_hotplug_event(priv->fbdev); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 60 | } |
| 61 | |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 62 | struct omap_atomic_state_commit { |
| 63 | struct work_struct work; |
| 64 | struct drm_device *dev; |
| 65 | struct drm_atomic_state *state; |
| 66 | u32 crtcs; |
| 67 | }; |
| 68 | |
Tomi Valkeinen | 5f741b3 | 2015-05-29 16:01:18 +0300 | [diff] [blame] | 69 | static void omap_atomic_wait_for_completion(struct drm_device *dev, |
| 70 | struct drm_atomic_state *old_state) |
| 71 | { |
| 72 | struct drm_crtc_state *old_crtc_state; |
| 73 | struct drm_crtc *crtc; |
| 74 | unsigned int i; |
| 75 | int ret; |
| 76 | |
| 77 | for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) { |
| 78 | if (!crtc->state->enable) |
| 79 | continue; |
| 80 | |
| 81 | ret = omap_crtc_wait_pending(crtc); |
| 82 | |
| 83 | if (!ret) |
| 84 | dev_warn(dev->dev, |
| 85 | "atomic complete timeout (pipe %u)!\n", i); |
| 86 | } |
| 87 | } |
| 88 | |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 89 | static void omap_atomic_complete(struct omap_atomic_state_commit *commit) |
| 90 | { |
| 91 | struct drm_device *dev = commit->dev; |
| 92 | struct omap_drm_private *priv = dev->dev_private; |
| 93 | struct drm_atomic_state *old_state = commit->state; |
| 94 | |
| 95 | /* Apply the atomic update. */ |
Laurent Pinchart | 69fb7c8 | 2015-05-28 02:09:56 +0300 | [diff] [blame] | 96 | dispc_runtime_get(); |
| 97 | |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 98 | drm_atomic_helper_commit_modeset_disables(dev, old_state); |
Jyri Sarha | e025d38 | 2017-01-27 12:04:54 +0200 | [diff] [blame^] | 99 | drm_atomic_helper_commit_planes(dev, old_state, 0); |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 100 | drm_atomic_helper_commit_modeset_enables(dev, old_state); |
| 101 | |
Tomi Valkeinen | 5f741b3 | 2015-05-29 16:01:18 +0300 | [diff] [blame] | 102 | omap_atomic_wait_for_completion(dev, old_state); |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 103 | |
| 104 | drm_atomic_helper_cleanup_planes(dev, old_state); |
| 105 | |
Laurent Pinchart | 69fb7c8 | 2015-05-28 02:09:56 +0300 | [diff] [blame] | 106 | dispc_runtime_put(); |
| 107 | |
Chris Wilson | 0853695 | 2016-10-14 13:18:18 +0100 | [diff] [blame] | 108 | drm_atomic_state_put(old_state); |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 109 | |
| 110 | /* Complete the commit, wake up any waiter. */ |
| 111 | spin_lock(&priv->commit.lock); |
| 112 | priv->commit.pending &= ~commit->crtcs; |
| 113 | spin_unlock(&priv->commit.lock); |
| 114 | |
| 115 | wake_up_all(&priv->commit.wait); |
| 116 | |
| 117 | kfree(commit); |
| 118 | } |
| 119 | |
| 120 | static void omap_atomic_work(struct work_struct *work) |
| 121 | { |
| 122 | struct omap_atomic_state_commit *commit = |
| 123 | container_of(work, struct omap_atomic_state_commit, work); |
| 124 | |
| 125 | omap_atomic_complete(commit); |
| 126 | } |
| 127 | |
| 128 | static bool omap_atomic_is_pending(struct omap_drm_private *priv, |
| 129 | struct omap_atomic_state_commit *commit) |
| 130 | { |
| 131 | bool pending; |
| 132 | |
| 133 | spin_lock(&priv->commit.lock); |
| 134 | pending = priv->commit.pending & commit->crtcs; |
| 135 | spin_unlock(&priv->commit.lock); |
| 136 | |
| 137 | return pending; |
| 138 | } |
| 139 | |
| 140 | static int omap_atomic_commit(struct drm_device *dev, |
Maarten Lankhorst | 6fc17fb | 2016-04-26 16:11:39 +0200 | [diff] [blame] | 141 | struct drm_atomic_state *state, bool nonblock) |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 142 | { |
| 143 | struct omap_drm_private *priv = dev->dev_private; |
| 144 | struct omap_atomic_state_commit *commit; |
Daniel Vetter | 8207257 | 2016-06-02 00:06:29 +0200 | [diff] [blame] | 145 | struct drm_crtc *crtc; |
| 146 | struct drm_crtc_state *crtc_state; |
| 147 | int i, ret; |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 148 | |
| 149 | ret = drm_atomic_helper_prepare_planes(dev, state); |
| 150 | if (ret) |
| 151 | return ret; |
| 152 | |
| 153 | /* Allocate the commit object. */ |
| 154 | commit = kzalloc(sizeof(*commit), GFP_KERNEL); |
| 155 | if (commit == NULL) { |
| 156 | ret = -ENOMEM; |
| 157 | goto error; |
| 158 | } |
| 159 | |
| 160 | INIT_WORK(&commit->work, omap_atomic_work); |
| 161 | commit->dev = dev; |
| 162 | commit->state = state; |
| 163 | |
| 164 | /* Wait until all affected CRTCs have completed previous commits and |
| 165 | * mark them as pending. |
| 166 | */ |
Daniel Vetter | 8207257 | 2016-06-02 00:06:29 +0200 | [diff] [blame] | 167 | for_each_crtc_in_state(state, crtc, crtc_state, i) |
| 168 | commit->crtcs |= drm_crtc_mask(crtc); |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 169 | |
| 170 | wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit)); |
| 171 | |
| 172 | spin_lock(&priv->commit.lock); |
| 173 | priv->commit.pending |= commit->crtcs; |
| 174 | spin_unlock(&priv->commit.lock); |
| 175 | |
| 176 | /* Swap the state, this is the point of no return. */ |
Daniel Vetter | 5e84c26 | 2016-06-10 00:06:32 +0200 | [diff] [blame] | 177 | drm_atomic_helper_swap_state(state, true); |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 178 | |
Chris Wilson | 0853695 | 2016-10-14 13:18:18 +0100 | [diff] [blame] | 179 | drm_atomic_state_get(state); |
Maarten Lankhorst | 6fc17fb | 2016-04-26 16:11:39 +0200 | [diff] [blame] | 180 | if (nonblock) |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 181 | schedule_work(&commit->work); |
| 182 | else |
| 183 | omap_atomic_complete(commit); |
| 184 | |
| 185 | return 0; |
| 186 | |
| 187 | error: |
| 188 | drm_atomic_helper_cleanup_planes(dev, state); |
| 189 | return ret; |
| 190 | } |
| 191 | |
Laurent Pinchart | e6ecefa | 2012-05-17 13:27:23 +0200 | [diff] [blame] | 192 | static const struct drm_mode_config_funcs omap_mode_config_funcs = { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 193 | .fb_create = omap_framebuffer_create, |
| 194 | .output_poll_changed = omap_fb_output_poll_changed, |
Laurent Pinchart | cef77d4 | 2015-03-05 21:50:00 +0200 | [diff] [blame] | 195 | .atomic_check = drm_atomic_helper_check, |
Laurent Pinchart | 748471a5 | 2015-03-05 23:42:39 +0200 | [diff] [blame] | 196 | .atomic_commit = omap_atomic_commit, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 197 | }; |
| 198 | |
| 199 | static int get_connector_type(struct omap_dss_device *dssdev) |
| 200 | { |
| 201 | switch (dssdev->type) { |
| 202 | case OMAP_DISPLAY_TYPE_HDMI: |
| 203 | return DRM_MODE_CONNECTOR_HDMIA; |
Tomi Valkeinen | 4635c17 | 2013-05-14 14:14:15 +0300 | [diff] [blame] | 204 | case OMAP_DISPLAY_TYPE_DVI: |
| 205 | return DRM_MODE_CONNECTOR_DVID; |
Sebastian Reichel | 4a64b90 | 2016-03-08 17:39:36 +0100 | [diff] [blame] | 206 | case OMAP_DISPLAY_TYPE_DSI: |
| 207 | return DRM_MODE_CONNECTOR_DSI; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 208 | default: |
| 209 | return DRM_MODE_CONNECTOR_Unknown; |
| 210 | } |
| 211 | } |
| 212 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 213 | static bool channel_used(struct drm_device *dev, enum omap_channel channel) |
| 214 | { |
| 215 | struct omap_drm_private *priv = dev->dev_private; |
| 216 | int i; |
| 217 | |
| 218 | for (i = 0; i < priv->num_crtcs; i++) { |
| 219 | struct drm_crtc *crtc = priv->crtcs[i]; |
| 220 | |
| 221 | if (omap_crtc_channel(crtc) == channel) |
| 222 | return true; |
| 223 | } |
| 224 | |
| 225 | return false; |
| 226 | } |
Archit Taneja | cc823bd | 2014-01-02 14:49:52 +0530 | [diff] [blame] | 227 | static void omap_disconnect_dssdevs(void) |
| 228 | { |
| 229 | struct omap_dss_device *dssdev = NULL; |
| 230 | |
| 231 | for_each_dss_dev(dssdev) |
| 232 | dssdev->driver->disconnect(dssdev); |
| 233 | } |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 234 | |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 235 | static int omap_connect_dssdevs(void) |
| 236 | { |
| 237 | int r; |
| 238 | struct omap_dss_device *dssdev = NULL; |
| 239 | bool no_displays = true; |
| 240 | |
| 241 | for_each_dss_dev(dssdev) { |
| 242 | r = dssdev->driver->connect(dssdev); |
| 243 | if (r == -EPROBE_DEFER) { |
| 244 | omap_dss_put_device(dssdev); |
| 245 | goto cleanup; |
| 246 | } else if (r) { |
| 247 | dev_warn(dssdev->dev, "could not connect display: %s\n", |
| 248 | dssdev->name); |
| 249 | } else { |
| 250 | no_displays = false; |
| 251 | } |
| 252 | } |
| 253 | |
| 254 | if (no_displays) |
| 255 | return -EPROBE_DEFER; |
| 256 | |
| 257 | return 0; |
| 258 | |
| 259 | cleanup: |
| 260 | /* |
| 261 | * if we are deferring probe, we disconnect the devices we previously |
| 262 | * connected |
| 263 | */ |
Archit Taneja | cc823bd | 2014-01-02 14:49:52 +0530 | [diff] [blame] | 264 | omap_disconnect_dssdevs(); |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 265 | |
| 266 | return r; |
| 267 | } |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 268 | |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 269 | static int omap_modeset_create_crtc(struct drm_device *dev, int id, |
Tomi Valkeinen | e43f2c3 | 2016-12-02 16:07:11 +0200 | [diff] [blame] | 270 | enum omap_channel channel, |
| 271 | u32 possible_crtcs) |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 272 | { |
| 273 | struct omap_drm_private *priv = dev->dev_private; |
| 274 | struct drm_plane *plane; |
| 275 | struct drm_crtc *crtc; |
| 276 | |
Tomi Valkeinen | e43f2c3 | 2016-12-02 16:07:11 +0200 | [diff] [blame] | 277 | plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY, |
| 278 | possible_crtcs); |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 279 | if (IS_ERR(plane)) |
| 280 | return PTR_ERR(plane); |
| 281 | |
| 282 | crtc = omap_crtc_init(dev, plane, channel, id); |
| 283 | |
| 284 | BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs)); |
| 285 | priv->crtcs[id] = crtc; |
| 286 | priv->num_crtcs++; |
| 287 | |
| 288 | priv->planes[id] = plane; |
| 289 | priv->num_planes++; |
| 290 | |
| 291 | return 0; |
| 292 | } |
| 293 | |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 294 | static int omap_modeset_init_properties(struct drm_device *dev) |
| 295 | { |
| 296 | struct omap_drm_private *priv = dev->dev_private; |
| 297 | |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 298 | priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3); |
| 299 | if (!priv->zorder_prop) |
| 300 | return -ENOMEM; |
| 301 | |
| 302 | return 0; |
| 303 | } |
| 304 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 305 | static int omap_modeset_init(struct drm_device *dev) |
| 306 | { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 307 | struct omap_drm_private *priv = dev->dev_private; |
| 308 | struct omap_dss_device *dssdev = NULL; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 309 | int num_ovls = dss_feat_get_num_ovls(); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 310 | int num_mgrs = dss_feat_get_num_mgrs(); |
| 311 | int num_crtcs; |
| 312 | int i, id = 0; |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 313 | int ret; |
Tomi Valkeinen | e43f2c3 | 2016-12-02 16:07:11 +0200 | [diff] [blame] | 314 | u32 possible_crtcs; |
Tomi Valkeinen | 04b1fc0 | 2013-05-14 10:55:19 +0300 | [diff] [blame] | 315 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 316 | drm_mode_config_init(dev); |
| 317 | |
Laurent Pinchart | e2cd09b | 2015-03-06 17:16:43 +0200 | [diff] [blame] | 318 | ret = omap_modeset_init_properties(dev); |
| 319 | if (ret < 0) |
| 320 | return ret; |
| 321 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 322 | /* |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 323 | * We usually don't want to create a CRTC for each manager, at least |
| 324 | * not until we have a way to expose private planes to userspace. |
| 325 | * Otherwise there would not be enough video pipes left for drm planes. |
| 326 | * We use the num_crtc argument to limit the number of crtcs we create. |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 327 | */ |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 328 | num_crtcs = min3(num_crtc, num_mgrs, num_ovls); |
Tomi Valkeinen | e43f2c3 | 2016-12-02 16:07:11 +0200 | [diff] [blame] | 329 | possible_crtcs = (1 << num_crtcs) - 1; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 330 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 331 | dssdev = NULL; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 332 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 333 | for_each_dss_dev(dssdev) { |
| 334 | struct drm_connector *connector; |
| 335 | struct drm_encoder *encoder; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 336 | enum omap_channel channel; |
Tomi Valkeinen | 179df15 | 2015-10-21 16:17:23 +0300 | [diff] [blame] | 337 | struct omap_dss_device *out; |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 338 | |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 339 | if (!omapdss_device_is_connected(dssdev)) |
Archit Taneja | 581382e | 2013-03-26 19:15:18 +0530 | [diff] [blame] | 340 | continue; |
Tomi Valkeinen | a7e71e7 | 2013-05-08 16:23:32 +0300 | [diff] [blame] | 341 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 342 | encoder = omap_encoder_init(dev, dssdev); |
| 343 | |
| 344 | if (!encoder) { |
| 345 | dev_err(dev->dev, "could not create encoder: %s\n", |
| 346 | dssdev->name); |
| 347 | return -ENOMEM; |
| 348 | } |
| 349 | |
| 350 | connector = omap_connector_init(dev, |
| 351 | get_connector_type(dssdev), dssdev, encoder); |
| 352 | |
| 353 | if (!connector) { |
| 354 | dev_err(dev->dev, "could not create connector: %s\n", |
| 355 | dssdev->name); |
| 356 | return -ENOMEM; |
| 357 | } |
| 358 | |
| 359 | BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders)); |
| 360 | BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors)); |
| 361 | |
| 362 | priv->encoders[priv->num_encoders++] = encoder; |
| 363 | priv->connectors[priv->num_connectors++] = connector; |
| 364 | |
| 365 | drm_mode_connector_attach_encoder(connector, encoder); |
| 366 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 367 | /* |
| 368 | * if we have reached the limit of the crtcs we are allowed to |
| 369 | * create, let's not try to look for a crtc for this |
| 370 | * panel/encoder and onwards, we will, of course, populate the |
| 371 | * the possible_crtcs field for all the encoders with the final |
| 372 | * set of crtcs we create |
| 373 | */ |
| 374 | if (id == num_crtcs) |
| 375 | continue; |
| 376 | |
| 377 | /* |
| 378 | * get the recommended DISPC channel for this encoder. For now, |
| 379 | * we only try to get create a crtc out of the recommended, the |
| 380 | * other possible channels to which the encoder can connect are |
| 381 | * not considered. |
| 382 | */ |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 383 | |
Tomi Valkeinen | 179df15 | 2015-10-21 16:17:23 +0300 | [diff] [blame] | 384 | out = omapdss_find_output_from_display(dssdev); |
| 385 | channel = out->dispc_channel; |
| 386 | omap_dss_put_device(out); |
| 387 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 388 | /* |
| 389 | * if this channel hasn't already been taken by a previously |
| 390 | * allocated crtc, we create a new crtc for it |
| 391 | */ |
| 392 | if (!channel_used(dev, channel)) { |
Tomi Valkeinen | e43f2c3 | 2016-12-02 16:07:11 +0200 | [diff] [blame] | 393 | ret = omap_modeset_create_crtc(dev, id, channel, |
| 394 | possible_crtcs); |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 395 | if (ret < 0) { |
| 396 | dev_err(dev->dev, |
| 397 | "could not create CRTC (channel %u)\n", |
| 398 | channel); |
| 399 | return ret; |
| 400 | } |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 401 | |
| 402 | id++; |
| 403 | } |
| 404 | } |
| 405 | |
| 406 | /* |
| 407 | * we have allocated crtcs according to the need of the panels/encoders, |
| 408 | * adding more crtcs here if needed |
| 409 | */ |
| 410 | for (; id < num_crtcs; id++) { |
| 411 | |
| 412 | /* find a free manager for this crtc */ |
| 413 | for (i = 0; i < num_mgrs; i++) { |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 414 | if (!channel_used(dev, i)) |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 415 | break; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 416 | } |
| 417 | |
| 418 | if (i == num_mgrs) { |
| 419 | /* this shouldn't really happen */ |
| 420 | dev_err(dev->dev, "no managers left for crtc\n"); |
| 421 | return -ENOMEM; |
| 422 | } |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 423 | |
Tomi Valkeinen | e43f2c3 | 2016-12-02 16:07:11 +0200 | [diff] [blame] | 424 | ret = omap_modeset_create_crtc(dev, id, i, |
| 425 | possible_crtcs); |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 426 | if (ret < 0) { |
| 427 | dev_err(dev->dev, |
| 428 | "could not create CRTC (channel %u)\n", i); |
| 429 | return ret; |
| 430 | } |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 431 | } |
| 432 | |
| 433 | /* |
| 434 | * Create normal planes for the remaining overlays: |
| 435 | */ |
| 436 | for (; id < num_ovls; id++) { |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 437 | struct drm_plane *plane; |
| 438 | |
Tomi Valkeinen | e43f2c3 | 2016-12-02 16:07:11 +0200 | [diff] [blame] | 439 | plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY, |
| 440 | possible_crtcs); |
Laurent Pinchart | fb9a35f | 2015-01-11 16:30:44 +0200 | [diff] [blame] | 441 | if (IS_ERR(plane)) |
| 442 | return PTR_ERR(plane); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 443 | |
| 444 | BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)); |
| 445 | priv->planes[priv->num_planes++] = plane; |
| 446 | } |
| 447 | |
| 448 | for (i = 0; i < priv->num_encoders; i++) { |
| 449 | struct drm_encoder *encoder = priv->encoders[i]; |
| 450 | struct omap_dss_device *dssdev = |
| 451 | omap_encoder_get_dssdev(encoder); |
Tomi Valkeinen | 1f68d9c | 2013-04-19 15:09:34 +0300 | [diff] [blame] | 452 | struct omap_dss_device *output; |
Tomi Valkeinen | be8e8e1 | 2013-04-23 15:35:35 +0300 | [diff] [blame] | 453 | |
| 454 | output = omapdss_find_output_from_display(dssdev); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 455 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 456 | /* figure out which crtc's we can connect the encoder to: */ |
| 457 | encoder->possible_crtcs = 0; |
| 458 | for (id = 0; id < priv->num_crtcs; id++) { |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 459 | struct drm_crtc *crtc = priv->crtcs[id]; |
| 460 | enum omap_channel crtc_channel; |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 461 | |
| 462 | crtc_channel = omap_crtc_channel(crtc); |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 463 | |
Tomi Valkeinen | 1733729 | 2014-09-03 19:25:49 +0000 | [diff] [blame] | 464 | if (output->dispc_channel == crtc_channel) { |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 465 | encoder->possible_crtcs |= (1 << id); |
Tomi Valkeinen | 1733729 | 2014-09-03 19:25:49 +0000 | [diff] [blame] | 466 | break; |
| 467 | } |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 468 | } |
Tomi Valkeinen | 820caab | 2013-04-25 14:53:18 +0300 | [diff] [blame] | 469 | |
| 470 | omap_dss_put_device(output); |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 471 | } |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 472 | |
Archit Taneja | 0d8f371 | 2013-03-26 19:15:19 +0530 | [diff] [blame] | 473 | DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n", |
| 474 | priv->num_planes, priv->num_crtcs, priv->num_encoders, |
| 475 | priv->num_connectors); |
| 476 | |
Rob Clark | 6b8ca4c | 2012-01-08 19:37:37 -0600 | [diff] [blame] | 477 | dev->mode_config.min_width = 32; |
| 478 | dev->mode_config.min_height = 32; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 479 | |
| 480 | /* note: eventually will need some cpu_is_omapXYZ() type stuff here |
| 481 | * to fill in these limits properly on different OMAP generations.. |
| 482 | */ |
| 483 | dev->mode_config.max_width = 2048; |
| 484 | dev->mode_config.max_height = 2048; |
| 485 | |
| 486 | dev->mode_config.funcs = &omap_mode_config_funcs; |
| 487 | |
Laurent Pinchart | 69a1226 | 2015-03-05 21:38:16 +0200 | [diff] [blame] | 488 | drm_mode_config_reset(dev); |
| 489 | |
Laurent Pinchart | 728ae8d | 2015-05-28 00:21:29 +0300 | [diff] [blame] | 490 | omap_drm_irq_install(dev); |
| 491 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 492 | return 0; |
| 493 | } |
| 494 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 495 | /* |
| 496 | * drm ioctl funcs |
| 497 | */ |
| 498 | |
| 499 | |
| 500 | static int ioctl_get_param(struct drm_device *dev, void *data, |
| 501 | struct drm_file *file_priv) |
| 502 | { |
Rob Clark | 5e3b087 | 2012-10-29 09:31:12 +0100 | [diff] [blame] | 503 | struct omap_drm_private *priv = dev->dev_private; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 504 | struct drm_omap_param *args = data; |
| 505 | |
| 506 | DBG("%p: param=%llu", dev, args->param); |
| 507 | |
| 508 | switch (args->param) { |
| 509 | case OMAP_PARAM_CHIPSET_ID: |
Rob Clark | 5e3b087 | 2012-10-29 09:31:12 +0100 | [diff] [blame] | 510 | args->value = priv->omaprev; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 511 | break; |
| 512 | default: |
| 513 | DBG("unknown parameter %lld", args->param); |
| 514 | return -EINVAL; |
| 515 | } |
| 516 | |
| 517 | return 0; |
| 518 | } |
| 519 | |
| 520 | static int ioctl_set_param(struct drm_device *dev, void *data, |
| 521 | struct drm_file *file_priv) |
| 522 | { |
| 523 | struct drm_omap_param *args = data; |
| 524 | |
| 525 | switch (args->param) { |
| 526 | default: |
| 527 | DBG("unknown parameter %lld", args->param); |
| 528 | return -EINVAL; |
| 529 | } |
| 530 | |
| 531 | return 0; |
| 532 | } |
| 533 | |
Laurent Pinchart | ef3f4e9 | 2015-12-14 22:39:36 +0200 | [diff] [blame] | 534 | #define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */ |
| 535 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 536 | static int ioctl_gem_new(struct drm_device *dev, void *data, |
| 537 | struct drm_file *file_priv) |
| 538 | { |
| 539 | struct drm_omap_gem_new *args = data; |
Laurent Pinchart | ef3f4e9 | 2015-12-14 22:39:36 +0200 | [diff] [blame] | 540 | u32 flags = args->flags & OMAP_BO_USER_MASK; |
| 541 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 542 | VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv, |
Laurent Pinchart | ef3f4e9 | 2015-12-14 22:39:36 +0200 | [diff] [blame] | 543 | args->size.bytes, flags); |
| 544 | |
| 545 | return omap_gem_new_handle(dev, file_priv, args->size, flags, |
| 546 | &args->handle); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 547 | } |
| 548 | |
| 549 | static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data, |
| 550 | struct drm_file *file_priv) |
| 551 | { |
| 552 | struct drm_omap_gem_cpu_prep *args = data; |
| 553 | struct drm_gem_object *obj; |
| 554 | int ret; |
| 555 | |
| 556 | VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op); |
| 557 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 558 | obj = drm_gem_object_lookup(file_priv, args->handle); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 559 | if (!obj) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 560 | return -ENOENT; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 561 | |
| 562 | ret = omap_gem_op_sync(obj, args->op); |
| 563 | |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 564 | if (!ret) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 565 | ret = omap_gem_op_start(obj, args->op); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 566 | |
| 567 | drm_gem_object_unreference_unlocked(obj); |
| 568 | |
| 569 | return ret; |
| 570 | } |
| 571 | |
| 572 | static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data, |
| 573 | struct drm_file *file_priv) |
| 574 | { |
| 575 | struct drm_omap_gem_cpu_fini *args = data; |
| 576 | struct drm_gem_object *obj; |
| 577 | int ret; |
| 578 | |
| 579 | VERB("%p:%p: handle=%d", dev, file_priv, args->handle); |
| 580 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 581 | obj = drm_gem_object_lookup(file_priv, args->handle); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 582 | if (!obj) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 583 | return -ENOENT; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 584 | |
| 585 | /* XXX flushy, flushy */ |
| 586 | ret = 0; |
| 587 | |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 588 | if (!ret) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 589 | ret = omap_gem_op_finish(obj, args->op); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 590 | |
| 591 | drm_gem_object_unreference_unlocked(obj); |
| 592 | |
| 593 | return ret; |
| 594 | } |
| 595 | |
| 596 | static int ioctl_gem_info(struct drm_device *dev, void *data, |
| 597 | struct drm_file *file_priv) |
| 598 | { |
| 599 | struct drm_omap_gem_info *args = data; |
| 600 | struct drm_gem_object *obj; |
| 601 | int ret = 0; |
| 602 | |
Rob Clark | f5f9454 | 2012-12-04 13:59:12 -0600 | [diff] [blame] | 603 | VERB("%p:%p: handle=%d", dev, file_priv, args->handle); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 604 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 605 | obj = drm_gem_object_lookup(file_priv, args->handle); |
YAMANE Toshiaki | c7f904b | 2012-11-14 19:30:38 +0900 | [diff] [blame] | 606 | if (!obj) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 607 | return -ENOENT; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 608 | |
Rob Clark | f7f9f45 | 2011-12-05 19:19:22 -0600 | [diff] [blame] | 609 | args->size = omap_gem_mmap_size(obj); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 610 | args->offset = omap_gem_mmap_offset(obj); |
| 611 | |
| 612 | drm_gem_object_unreference_unlocked(obj); |
| 613 | |
| 614 | return ret; |
| 615 | } |
| 616 | |
Rob Clark | baa7094 | 2013-08-02 13:27:49 -0400 | [diff] [blame] | 617 | static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = { |
Daniel Vetter | f8c4714 | 2015-09-08 13:56:30 +0200 | [diff] [blame] | 618 | DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH), |
| 619 | DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 620 | DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH), |
| 621 | DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH), |
| 622 | DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH), |
| 623 | DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH), |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 624 | }; |
| 625 | |
| 626 | /* |
| 627 | * drm driver funcs |
| 628 | */ |
| 629 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 630 | static int dev_open(struct drm_device *dev, struct drm_file *file) |
| 631 | { |
| 632 | file->driver_priv = NULL; |
| 633 | |
| 634 | DBG("open: dev=%p, file=%p", dev, file); |
| 635 | |
| 636 | return 0; |
| 637 | } |
| 638 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 639 | /** |
| 640 | * lastclose - clean up after all DRM clients have exited |
| 641 | * @dev: DRM device |
| 642 | * |
| 643 | * Take care of cleaning up after all DRM clients have exited. In the |
| 644 | * mode setting case, we want to restore the kernel's initial mode (just |
| 645 | * in case the last client left us in a bad state). |
| 646 | */ |
| 647 | static void dev_lastclose(struct drm_device *dev) |
| 648 | { |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 649 | int i; |
| 650 | |
Lukas Wunner | f15a66e | 2015-09-05 11:22:39 +0200 | [diff] [blame] | 651 | /* we don't support vga_switcheroo.. so just make sure the fbdev |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 652 | * mode is active |
| 653 | */ |
| 654 | struct omap_drm_private *priv = dev->dev_private; |
| 655 | int ret; |
| 656 | |
| 657 | DBG("lastclose: dev=%p", dev); |
| 658 | |
Ville Syrjälä | 0da88db | 2016-09-26 19:30:52 +0300 | [diff] [blame] | 659 | /* need to restore default rotation state.. not sure |
| 660 | * if there is a cleaner way to restore properties to |
| 661 | * default state? Maybe a flag that properties should |
| 662 | * automatically be restored to default state on |
| 663 | * lastclose? |
| 664 | */ |
| 665 | for (i = 0; i < priv->num_crtcs; i++) { |
| 666 | struct drm_crtc *crtc = priv->crtcs[i]; |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 667 | |
Ville Syrjälä | 0da88db | 2016-09-26 19:30:52 +0300 | [diff] [blame] | 668 | if (!crtc->primary->rotation_property) |
| 669 | continue; |
| 670 | |
| 671 | drm_object_property_set_value(&crtc->base, |
| 672 | crtc->primary->rotation_property, |
| 673 | DRM_ROTATE_0); |
| 674 | } |
| 675 | |
| 676 | for (i = 0; i < priv->num_planes; i++) { |
| 677 | struct drm_plane *plane = priv->planes[i]; |
| 678 | |
| 679 | if (!plane->rotation_property) |
| 680 | continue; |
| 681 | |
| 682 | drm_object_property_set_value(&plane->base, |
| 683 | plane->rotation_property, |
| 684 | DRM_ROTATE_0); |
Rob Clark | 3c810c6 | 2012-08-15 15:18:01 -0500 | [diff] [blame] | 685 | } |
| 686 | |
Tomi Valkeinen | c7c1aec | 2014-09-25 19:24:26 +0000 | [diff] [blame] | 687 | if (priv->fbdev) { |
| 688 | ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev); |
| 689 | if (ret) |
| 690 | DBG("failed to restore crtc mode"); |
| 691 | } |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 692 | } |
| 693 | |
Laurent Pinchart | 78b6855 | 2012-05-17 13:27:22 +0200 | [diff] [blame] | 694 | static const struct vm_operations_struct omap_gem_vm_ops = { |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 695 | .fault = omap_gem_fault, |
| 696 | .open = drm_gem_vm_open, |
| 697 | .close = drm_gem_vm_close, |
| 698 | }; |
| 699 | |
Rob Clark | ff4f387 | 2012-01-16 12:51:14 -0600 | [diff] [blame] | 700 | static const struct file_operations omapdriver_fops = { |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 701 | .owner = THIS_MODULE, |
| 702 | .open = drm_open, |
| 703 | .unlocked_ioctl = drm_ioctl, |
| 704 | .release = drm_release, |
| 705 | .mmap = omap_gem_mmap, |
| 706 | .poll = drm_poll, |
| 707 | .read = drm_read, |
| 708 | .llseek = noop_llseek, |
Rob Clark | ff4f387 | 2012-01-16 12:51:14 -0600 | [diff] [blame] | 709 | }; |
| 710 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 711 | static struct drm_driver omap_drm_driver = { |
Tomi Valkeinen | 728fea7 | 2015-10-02 11:10:41 +0300 | [diff] [blame] | 712 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | |
| 713 | DRIVER_ATOMIC, |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 714 | .open = dev_open, |
| 715 | .lastclose = dev_lastclose, |
Ville Syrjälä | b44f840 | 2015-09-30 16:46:48 +0300 | [diff] [blame] | 716 | .get_vblank_counter = drm_vblank_no_hw_counter, |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 717 | .enable_vblank = omap_irq_enable_vblank, |
| 718 | .disable_vblank = omap_irq_disable_vblank, |
Andy Gross | 6169a148 | 2011-12-15 21:05:17 -0600 | [diff] [blame] | 719 | #ifdef CONFIG_DEBUG_FS |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 720 | .debugfs_init = omap_debugfs_init, |
Andy Gross | 6169a148 | 2011-12-15 21:05:17 -0600 | [diff] [blame] | 721 | #endif |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 722 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
| 723 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 724 | .gem_prime_export = omap_gem_prime_export, |
| 725 | .gem_prime_import = omap_gem_prime_import, |
| 726 | .gem_free_object = omap_gem_free_object, |
| 727 | .gem_vm_ops = &omap_gem_vm_ops, |
| 728 | .dumb_create = omap_gem_dumb_create, |
| 729 | .dumb_map_offset = omap_gem_dumb_map_offset, |
| 730 | .dumb_destroy = drm_gem_dumb_destroy, |
| 731 | .ioctls = ioctls, |
| 732 | .num_ioctls = DRM_OMAP_NUM_IOCTLS, |
| 733 | .fops = &omapdriver_fops, |
| 734 | .name = DRIVER_NAME, |
| 735 | .desc = DRIVER_DESC, |
| 736 | .date = DRIVER_DATE, |
| 737 | .major = DRIVER_MAJOR, |
| 738 | .minor = DRIVER_MINOR, |
| 739 | .patchlevel = DRIVER_PATCHLEVEL, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 740 | }; |
| 741 | |
Laurent Pinchart | 2f95bc6 | 2016-12-12 11:28:47 +0200 | [diff] [blame] | 742 | static int pdev_probe(struct platform_device *pdev) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 743 | { |
Laurent Pinchart | 2f95bc6 | 2016-12-12 11:28:47 +0200 | [diff] [blame] | 744 | struct omap_drm_platform_data *pdata = pdev->dev.platform_data; |
| 745 | struct omap_drm_private *priv; |
| 746 | struct drm_device *ddev; |
| 747 | unsigned int i; |
| 748 | int ret; |
| 749 | |
| 750 | DBG("%s", pdev->name); |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 751 | |
Tomi Valkeinen | 591a0ac | 2013-05-23 12:07:50 +0300 | [diff] [blame] | 752 | if (omapdss_is_initialized() == false) |
| 753 | return -EPROBE_DEFER; |
| 754 | |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 755 | omap_crtc_pre_init(); |
| 756 | |
Laurent Pinchart | 2f95bc6 | 2016-12-12 11:28:47 +0200 | [diff] [blame] | 757 | ret = omap_connect_dssdevs(); |
| 758 | if (ret) |
| 759 | goto err_crtc_uninit; |
| 760 | |
| 761 | /* Allocate and initialize the driver private structure. */ |
| 762 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
| 763 | if (!priv) { |
| 764 | ret = -ENOMEM; |
| 765 | goto err_disconnect_dssdevs; |
Archit Taneja | 3a01ab2 | 2014-01-02 14:49:51 +0530 | [diff] [blame] | 766 | } |
| 767 | |
Laurent Pinchart | 2f95bc6 | 2016-12-12 11:28:47 +0200 | [diff] [blame] | 768 | priv->omaprev = pdata->omaprev; |
| 769 | priv->wq = alloc_ordered_workqueue("omapdrm", 0); |
| 770 | |
| 771 | init_waitqueue_head(&priv->commit.wait); |
| 772 | spin_lock_init(&priv->commit.lock); |
| 773 | spin_lock_init(&priv->list_lock); |
| 774 | INIT_LIST_HEAD(&priv->obj_list); |
| 775 | |
| 776 | /* Allocate and initialize the DRM device. */ |
| 777 | ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev); |
| 778 | if (IS_ERR(ddev)) { |
| 779 | ret = PTR_ERR(ddev); |
| 780 | goto err_free_priv; |
| 781 | } |
| 782 | |
| 783 | ddev->dev_private = priv; |
| 784 | platform_set_drvdata(pdev, ddev); |
| 785 | |
| 786 | omap_gem_init(ddev); |
| 787 | |
| 788 | ret = omap_modeset_init(ddev); |
| 789 | if (ret) { |
| 790 | dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret); |
| 791 | goto err_free_drm_dev; |
| 792 | } |
| 793 | |
| 794 | /* Initialize vblank handling, start with all CRTCs disabled. */ |
| 795 | ret = drm_vblank_init(ddev, priv->num_crtcs); |
| 796 | if (ret) { |
| 797 | dev_err(&pdev->dev, "could not init vblank\n"); |
| 798 | goto err_cleanup_modeset; |
| 799 | } |
| 800 | |
| 801 | for (i = 0; i < priv->num_crtcs; i++) |
| 802 | drm_crtc_vblank_off(priv->crtcs[i]); |
| 803 | |
| 804 | priv->fbdev = omap_fbdev_init(ddev); |
| 805 | |
| 806 | drm_kms_helper_poll_init(ddev); |
| 807 | |
| 808 | /* |
| 809 | * Register the DRM device with the core and the connectors with |
| 810 | * sysfs. |
| 811 | */ |
| 812 | ret = drm_dev_register(ddev, 0); |
| 813 | if (ret) |
| 814 | goto err_cleanup_helpers; |
| 815 | |
| 816 | return 0; |
| 817 | |
| 818 | err_cleanup_helpers: |
| 819 | drm_kms_helper_poll_fini(ddev); |
| 820 | if (priv->fbdev) |
| 821 | omap_fbdev_free(ddev); |
| 822 | err_cleanup_modeset: |
| 823 | drm_mode_config_cleanup(ddev); |
| 824 | omap_drm_irq_uninstall(ddev); |
| 825 | err_free_drm_dev: |
| 826 | omap_gem_deinit(ddev); |
| 827 | drm_dev_unref(ddev); |
| 828 | err_free_priv: |
| 829 | destroy_workqueue(priv->wq); |
| 830 | kfree(priv); |
| 831 | err_disconnect_dssdevs: |
| 832 | omap_disconnect_dssdevs(); |
| 833 | err_crtc_uninit: |
| 834 | omap_crtc_pre_uninit(); |
| 835 | return ret; |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 836 | } |
| 837 | |
Laurent Pinchart | 2f95bc6 | 2016-12-12 11:28:47 +0200 | [diff] [blame] | 838 | static int pdev_remove(struct platform_device *pdev) |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 839 | { |
Laurent Pinchart | 2f95bc6 | 2016-12-12 11:28:47 +0200 | [diff] [blame] | 840 | struct drm_device *ddev = platform_get_drvdata(pdev); |
| 841 | struct omap_drm_private *priv = ddev->dev_private; |
| 842 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 843 | DBG(""); |
Andy Gross | 5c13779 | 2012-03-05 10:48:39 -0600 | [diff] [blame] | 844 | |
Laurent Pinchart | 2f95bc6 | 2016-12-12 11:28:47 +0200 | [diff] [blame] | 845 | drm_dev_unregister(ddev); |
| 846 | |
| 847 | drm_kms_helper_poll_fini(ddev); |
| 848 | |
| 849 | if (priv->fbdev) |
| 850 | omap_fbdev_free(ddev); |
| 851 | |
| 852 | drm_mode_config_cleanup(ddev); |
| 853 | |
| 854 | omap_drm_irq_uninstall(ddev); |
| 855 | omap_gem_deinit(ddev); |
| 856 | |
| 857 | drm_dev_unref(ddev); |
| 858 | |
| 859 | destroy_workqueue(priv->wq); |
| 860 | kfree(priv); |
Tomi Valkeinen | 707cf58 | 2014-04-02 13:47:43 +0300 | [diff] [blame] | 861 | |
Archit Taneja | cc823bd | 2014-01-02 14:49:52 +0530 | [diff] [blame] | 862 | omap_disconnect_dssdevs(); |
| 863 | omap_crtc_pre_uninit(); |
Daniel Vetter | fd3c025 | 2013-12-11 11:34:26 +0100 | [diff] [blame] | 864 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 865 | return 0; |
| 866 | } |
| 867 | |
Grygorii Strashko | 8450c8d | 2015-02-26 15:57:17 +0200 | [diff] [blame] | 868 | #ifdef CONFIG_PM_SLEEP |
Tomi Valkeinen | 92bf0f9 | 2015-10-02 11:10:42 +0300 | [diff] [blame] | 869 | static int omap_drm_suspend_all_displays(void) |
| 870 | { |
| 871 | struct omap_dss_device *dssdev = NULL; |
| 872 | |
| 873 | for_each_dss_dev(dssdev) { |
| 874 | if (!dssdev->driver) |
| 875 | continue; |
| 876 | |
| 877 | if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) { |
| 878 | dssdev->driver->disable(dssdev); |
| 879 | dssdev->activate_after_resume = true; |
| 880 | } else { |
| 881 | dssdev->activate_after_resume = false; |
| 882 | } |
| 883 | } |
| 884 | |
| 885 | return 0; |
| 886 | } |
| 887 | |
| 888 | static int omap_drm_resume_all_displays(void) |
| 889 | { |
| 890 | struct omap_dss_device *dssdev = NULL; |
| 891 | |
| 892 | for_each_dss_dev(dssdev) { |
| 893 | if (!dssdev->driver) |
| 894 | continue; |
| 895 | |
| 896 | if (dssdev->activate_after_resume) { |
| 897 | dssdev->driver->enable(dssdev); |
| 898 | dssdev->activate_after_resume = false; |
| 899 | } |
| 900 | } |
| 901 | |
| 902 | return 0; |
| 903 | } |
| 904 | |
Tomi Valkeinen | ccd7b5e | 2014-11-14 15:18:28 +0200 | [diff] [blame] | 905 | static int omap_drm_suspend(struct device *dev) |
| 906 | { |
| 907 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
| 908 | |
| 909 | drm_kms_helper_poll_disable(drm_dev); |
| 910 | |
Tomi Valkeinen | 92bf0f9 | 2015-10-02 11:10:42 +0300 | [diff] [blame] | 911 | drm_modeset_lock_all(drm_dev); |
| 912 | omap_drm_suspend_all_displays(); |
| 913 | drm_modeset_unlock_all(drm_dev); |
| 914 | |
Tomi Valkeinen | ccd7b5e | 2014-11-14 15:18:28 +0200 | [diff] [blame] | 915 | return 0; |
| 916 | } |
| 917 | |
| 918 | static int omap_drm_resume(struct device *dev) |
| 919 | { |
| 920 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
| 921 | |
Tomi Valkeinen | 92bf0f9 | 2015-10-02 11:10:42 +0300 | [diff] [blame] | 922 | drm_modeset_lock_all(drm_dev); |
| 923 | omap_drm_resume_all_displays(); |
| 924 | drm_modeset_unlock_all(drm_dev); |
| 925 | |
Tomi Valkeinen | ccd7b5e | 2014-11-14 15:18:28 +0200 | [diff] [blame] | 926 | drm_kms_helper_poll_enable(drm_dev); |
| 927 | |
| 928 | return omap_gem_resume(dev); |
| 929 | } |
Andy Gross | e78edba | 2012-12-19 14:53:37 -0600 | [diff] [blame] | 930 | #endif |
| 931 | |
Grygorii Strashko | 8450c8d | 2015-02-26 15:57:17 +0200 | [diff] [blame] | 932 | static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume); |
| 933 | |
Tomi Valkeinen | 6717cd2 | 2013-04-10 10:44:00 +0300 | [diff] [blame] | 934 | static struct platform_driver pdev = { |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 935 | .driver = { |
| 936 | .name = DRIVER_NAME, |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 937 | .pm = &omapdrm_pm_ops, |
Laurent Pinchart | 222025e | 2015-01-11 00:02:07 +0200 | [diff] [blame] | 938 | }, |
| 939 | .probe = pdev_probe, |
| 940 | .remove = pdev_remove, |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 941 | }; |
| 942 | |
Thierry Reding | e1c49bd | 2015-12-02 17:23:31 +0100 | [diff] [blame] | 943 | static struct platform_driver * const drivers[] = { |
| 944 | &omap_dmm_driver, |
| 945 | &pdev, |
| 946 | }; |
| 947 | |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 948 | static int __init omap_drm_init(void) |
| 949 | { |
| 950 | DBG("init"); |
Tomi Valkeinen | ea7e3a6 | 2014-04-02 14:31:50 +0300 | [diff] [blame] | 951 | |
Thierry Reding | e1c49bd | 2015-12-02 17:23:31 +0100 | [diff] [blame] | 952 | return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 953 | } |
| 954 | |
| 955 | static void __exit omap_drm_fini(void) |
| 956 | { |
| 957 | DBG("fini"); |
Tomi Valkeinen | ea7e3a6 | 2014-04-02 14:31:50 +0300 | [diff] [blame] | 958 | |
Thierry Reding | e1c49bd | 2015-12-02 17:23:31 +0100 | [diff] [blame] | 959 | platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); |
Rob Clark | cd5351f | 2011-11-12 12:09:40 -0600 | [diff] [blame] | 960 | } |
| 961 | |
| 962 | /* need late_initcall() so we load after dss_driver's are loaded */ |
| 963 | late_initcall(omap_drm_init); |
| 964 | module_exit(omap_drm_fini); |
| 965 | |
| 966 | MODULE_AUTHOR("Rob Clark <rob@ti.com>"); |
| 967 | MODULE_DESCRIPTION("OMAP DRM Display Driver"); |
| 968 | MODULE_ALIAS("platform:" DRIVER_NAME); |
| 969 | MODULE_LICENSE("GPL v2"); |