blob: 6898145b44ce92a0c4b3f8e15e50ea6b4a1037ca [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010044#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080045
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010053#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080054
Jesse Barnes79e53942008-11-07 14:24:08 -080055
Chris Wilson2e88e402010-08-07 11:01:27 +010056static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080057 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64};
65
66#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
Chris Wilsonea5b2132010-08-04 13:50:23 +010068struct intel_sdvo {
69 struct intel_encoder base;
70
Chris Wilsonf899fc62010-07-20 15:44:45 -070071 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070072 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073
Chris Wilsone957d772010-09-24 12:52:03 +010074 struct i2c_adapter ddc;
75
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010077 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080081
Jesse Barnese2f0ba92009-02-02 15:11:52 -080082 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080087
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080089 int pixel_clock_min, pixel_clock_max;
90
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080091 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
Simon Farnsworthcc68c812011-09-21 17:13:30 +010097 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800102 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800129
Ma Ling7086c872009-05-13 11:20:06 +0800130 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800133 */
134 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800135
136 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
Eric Anholtc751ce42010-03-25 11:48:48 -0700141 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800142 uint8_t ddc_bus;
143
Chris Wilson6c9547f2010-08-25 10:05:17 +0100144 /* Input timings for adjusted_mode */
145 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800146};
147
148struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100149 struct intel_connector base;
150
Zhenyu Wang14571b42010-03-30 14:06:33 +0800151 /* Mark the type of connector */
152 uint16_t output_flag;
153
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100154 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100155
Zhenyu Wang14571b42010-03-30 14:06:33 +0800156 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100157 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800158 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100159 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800160
Zhao Yakuib9219c52009-09-10 15:45:46 +0800161 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100162 struct drm_property *left;
163 struct drm_property *right;
164 struct drm_property *top;
165 struct drm_property *bottom;
166 struct drm_property *hpos;
167 struct drm_property *vpos;
168 struct drm_property *contrast;
169 struct drm_property *saturation;
170 struct drm_property *hue;
171 struct drm_property *sharpness;
172 struct drm_property *flicker_filter;
173 struct drm_property *flicker_filter_adaptive;
174 struct drm_property *flicker_filter_2d;
175 struct drm_property *tv_chroma_filter;
176 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100177 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800178
179 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100180 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181
182 /* Add variable to record current setting for the above property */
183 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100184
Zhao Yakuib9219c52009-09-10 15:45:46 +0800185 /* this is to get the range of margin.*/
186 u32 max_hscan, max_vscan;
187 u32 max_hpos, cur_hpos;
188 u32 max_vpos, cur_vpos;
189 u32 cur_brightness, max_brightness;
190 u32 cur_contrast, max_contrast;
191 u32 cur_saturation, max_saturation;
192 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100193 u32 cur_sharpness, max_sharpness;
194 u32 cur_flicker_filter, max_flicker_filter;
195 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
196 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
197 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
198 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100199 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800200};
201
Chris Wilson890f3352010-09-14 16:46:59 +0100202static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100203{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100204 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100205}
206
Chris Wilsondf0e9242010-09-09 16:20:55 +0100207static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
208{
209 return container_of(intel_attached_encoder(connector),
210 struct intel_sdvo, base);
211}
212
Chris Wilson615fb932010-08-04 13:50:24 +0100213static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
214{
215 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216}
217
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800218static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100219intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100220static bool
221intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector,
223 int type);
224static bool
225intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800227
Jesse Barnes79e53942008-11-07 14:24:08 -0800228/**
229 * Writes the SDVOB or SDVOC with the given value, but always writes both
230 * SDVOB and SDVOC to work around apparent hardware issues (according to
231 * comments in the BIOS).
232 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100233static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800234{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100235 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800236 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800237 u32 bval = val, cval = val;
238 int i;
239
Chris Wilsonea5b2132010-08-04 13:50:23 +0100240 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241 I915_WRITE(intel_sdvo->sdvo_reg, val);
242 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800243 return;
244 }
245
Chris Wilsonea5b2132010-08-04 13:50:23 +0100246 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800247 cval = I915_READ(SDVOC);
248 } else {
249 bval = I915_READ(SDVOB);
250 }
251 /*
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
255 */
256 for (i = 0; i < 2; i++)
257 {
258 I915_WRITE(SDVOB, bval);
259 I915_READ(SDVOB);
260 I915_WRITE(SDVOC, cval);
261 I915_READ(SDVOC);
262 }
263}
264
Chris Wilson32aad862010-08-04 13:50:25 +0100265static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800266{
Jesse Barnes79e53942008-11-07 14:24:08 -0800267 struct i2c_msg msgs[] = {
268 {
Chris Wilsone957d772010-09-24 12:52:03 +0100269 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 .flags = 0,
271 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 },
274 {
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 .flags = I2C_M_RD,
277 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100278 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 }
280 };
Chris Wilson32aad862010-08-04 13:50:25 +0100281 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800282
Chris Wilsonf899fc62010-07-20 15:44:45 -0700283 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800284 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800285
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800287 return false;
288}
289
Jesse Barnes79e53942008-11-07 14:24:08 -0800290#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100292static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800293 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100294 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800295} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100339
Akshay Joshi0206e352011-08-16 15:34:10 -0400340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100385
Akshay Joshi0206e352011-08-16 15:34:10 -0400386 /* HDMI op code */
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800407};
408
Daniel Vettereef4eac2012-03-23 23:43:35 +0100409#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800410
Chris Wilsonea5b2132010-08-04 13:50:23 +0100411static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100412 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800413{
Jesse Barnes79e53942008-11-07 14:24:08 -0800414 int i;
415
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800416 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100417 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800418 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800419 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400422 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800423 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800424 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800425 break;
426 }
427 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400428 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800429 DRM_LOG_KMS("(%02X)", cmd);
430 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800431}
Jesse Barnes79e53942008-11-07 14:24:08 -0800432
Jesse Barnes79e53942008-11-07 14:24:08 -0800433static const char *cmd_status_names[] = {
434 "Power on",
435 "Success",
436 "Not supported",
437 "Invalid arg",
438 "Pending",
439 "Target not specified",
440 "Scaling not supported"
441};
442
Chris Wilsone957d772010-09-24 12:52:03 +0100443static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
444 const void *args, int args_len)
445{
446 u8 buf[args_len*2 + 2], status;
447 struct i2c_msg msgs[args_len + 3];
448 int i, ret;
449
450 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
451
452 for (i = 0; i < args_len; i++) {
453 msgs[i].addr = intel_sdvo->slave_addr;
454 msgs[i].flags = 0;
455 msgs[i].len = 2;
456 msgs[i].buf = buf + 2 *i;
457 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
458 buf[2*i + 1] = ((u8*)args)[i];
459 }
460 msgs[i].addr = intel_sdvo->slave_addr;
461 msgs[i].flags = 0;
462 msgs[i].len = 2;
463 msgs[i].buf = buf + 2*i;
464 buf[2*i + 0] = SDVO_I2C_OPCODE;
465 buf[2*i + 1] = cmd;
466
467 /* the following two are to read the response */
468 status = SDVO_I2C_CMD_STATUS;
469 msgs[i+1].addr = intel_sdvo->slave_addr;
470 msgs[i+1].flags = 0;
471 msgs[i+1].len = 1;
472 msgs[i+1].buf = &status;
473
474 msgs[i+2].addr = intel_sdvo->slave_addr;
475 msgs[i+2].flags = I2C_M_RD;
476 msgs[i+2].len = 1;
477 msgs[i+2].buf = &status;
478
479 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
480 if (ret < 0) {
481 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
482 return false;
483 }
484 if (ret != i+3) {
485 /* failure in I2C transfer */
486 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
487 return false;
488 }
489
Chris Wilsone957d772010-09-24 12:52:03 +0100490 return true;
491}
492
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100493static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
494 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800495{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100496 u8 retry = 5;
497 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800498 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800499
Chris Wilsond121a5d2011-01-25 15:00:01 +0000500 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
501
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100502 /*
503 * The documentation states that all commands will be
504 * processed within 15µs, and that we need only poll
505 * the status byte a maximum of 3 times in order for the
506 * command to be complete.
507 *
508 * Check 5 times in case the hardware failed to read the docs.
509 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000510 if (!intel_sdvo_read_byte(intel_sdvo,
511 SDVO_I2C_CMD_STATUS,
512 &status))
513 goto log_fail;
514
515 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
516 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100517 if (!intel_sdvo_read_byte(intel_sdvo,
518 SDVO_I2C_CMD_STATUS,
519 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000520 goto log_fail;
521 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100522
Jesse Barnes79e53942008-11-07 14:24:08 -0800523 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800524 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800525 else
yakui_zhao342dc382009-06-02 14:12:00 +0800526 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800527
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100528 if (status != SDVO_CMD_STATUS_SUCCESS)
529 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800530
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100531 /* Read the command response */
532 for (i = 0; i < response_len; i++) {
533 if (!intel_sdvo_read_byte(intel_sdvo,
534 SDVO_I2C_RETURN_0 + i,
535 &((u8 *)response)[i]))
536 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100537 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800538 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100539 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100540 return true;
541
542log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000543 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100544 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800545}
546
Hannes Ederb358d0a2008-12-18 21:18:47 +0100547static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800548{
549 if (mode->clock >= 100000)
550 return 1;
551 else if (mode->clock >= 50000)
552 return 2;
553 else
554 return 4;
555}
556
Chris Wilsone957d772010-09-24 12:52:03 +0100557static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
558 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800559{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000560 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100561 return intel_sdvo_write_cmd(intel_sdvo,
562 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
563 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800564}
565
Chris Wilson32aad862010-08-04 13:50:25 +0100566static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
567{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000568 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
569 return false;
570
571 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100572}
573
574static bool
575intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
576{
577 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
578 return false;
579
580 return intel_sdvo_read_response(intel_sdvo, value, len);
581}
582
583static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800584{
585 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100586 return intel_sdvo_set_value(intel_sdvo,
587 SDVO_CMD_SET_TARGET_INPUT,
588 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800589}
590
591/**
592 * Return whether each input is trained.
593 *
594 * This function is making an assumption about the layout of the response,
595 * which should be checked against the docs.
596 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100597static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800598{
599 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800600
Chris Wilson1a3665c2011-01-25 13:59:37 +0000601 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100602 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
603 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800604 return false;
605
606 *input_1 = response.input0_trained;
607 *input_2 = response.input1_trained;
608 return true;
609}
610
Chris Wilsonea5b2132010-08-04 13:50:23 +0100611static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800612 u16 outputs)
613{
Chris Wilson32aad862010-08-04 13:50:25 +0100614 return intel_sdvo_set_value(intel_sdvo,
615 SDVO_CMD_SET_ACTIVE_OUTPUTS,
616 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800617}
618
Chris Wilsonea5b2132010-08-04 13:50:23 +0100619static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800620 int mode)
621{
Chris Wilson32aad862010-08-04 13:50:25 +0100622 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800623
624 switch (mode) {
625 case DRM_MODE_DPMS_ON:
626 state = SDVO_ENCODER_STATE_ON;
627 break;
628 case DRM_MODE_DPMS_STANDBY:
629 state = SDVO_ENCODER_STATE_STANDBY;
630 break;
631 case DRM_MODE_DPMS_SUSPEND:
632 state = SDVO_ENCODER_STATE_SUSPEND;
633 break;
634 case DRM_MODE_DPMS_OFF:
635 state = SDVO_ENCODER_STATE_OFF;
636 break;
637 }
638
Chris Wilson32aad862010-08-04 13:50:25 +0100639 return intel_sdvo_set_value(intel_sdvo,
640 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800641}
642
Chris Wilsonea5b2132010-08-04 13:50:23 +0100643static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800644 int *clock_min,
645 int *clock_max)
646{
647 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800648
Chris Wilson1a3665c2011-01-25 13:59:37 +0000649 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100650 if (!intel_sdvo_get_value(intel_sdvo,
651 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
652 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800653 return false;
654
655 /* Convert the values from units of 10 kHz to kHz. */
656 *clock_min = clocks.min * 10;
657 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800658 return true;
659}
660
Chris Wilsonea5b2132010-08-04 13:50:23 +0100661static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 u16 outputs)
663{
Chris Wilson32aad862010-08-04 13:50:25 +0100664 return intel_sdvo_set_value(intel_sdvo,
665 SDVO_CMD_SET_TARGET_OUTPUT,
666 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800667}
668
Chris Wilsonea5b2132010-08-04 13:50:23 +0100669static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 struct intel_sdvo_dtd *dtd)
671{
Chris Wilson32aad862010-08-04 13:50:25 +0100672 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
673 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800674}
675
Chris Wilsonea5b2132010-08-04 13:50:23 +0100676static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800677 struct intel_sdvo_dtd *dtd)
678{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100679 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800680 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
681}
682
Chris Wilsonea5b2132010-08-04 13:50:23 +0100683static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800684 struct intel_sdvo_dtd *dtd)
685{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100686 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800687 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
688}
689
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800690static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100691intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800692 uint16_t clock,
693 uint16_t width,
694 uint16_t height)
695{
696 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800697
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800698 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800699 args.clock = clock;
700 args.width = width;
701 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800702 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800703
Chris Wilsonea5b2132010-08-04 13:50:23 +0100704 if (intel_sdvo->is_lvds &&
705 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
706 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800707 args.scaled = 1;
708
Chris Wilson32aad862010-08-04 13:50:25 +0100709 return intel_sdvo_set_value(intel_sdvo,
710 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
711 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800712}
713
Chris Wilsonea5b2132010-08-04 13:50:23 +0100714static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800715 struct intel_sdvo_dtd *dtd)
716{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000717 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
718 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100719 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
720 &dtd->part1, sizeof(dtd->part1)) &&
721 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
722 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800723}
Jesse Barnes79e53942008-11-07 14:24:08 -0800724
Chris Wilsonea5b2132010-08-04 13:50:23 +0100725static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800726{
Chris Wilson32aad862010-08-04 13:50:25 +0100727 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800728}
729
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800730static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100731 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800732{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800733 uint16_t width, height;
734 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
735 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800736
737 width = mode->crtc_hdisplay;
738 height = mode->crtc_vdisplay;
739
740 /* do some mode translations */
741 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
742 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
743
744 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
745 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
746
747 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
748 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
749
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800750 dtd->part1.clock = mode->clock / 10;
751 dtd->part1.h_active = width & 0xff;
752 dtd->part1.h_blank = h_blank_len & 0xff;
753 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800754 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800755 dtd->part1.v_active = height & 0xff;
756 dtd->part1.v_blank = v_blank_len & 0xff;
757 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800758 ((v_blank_len >> 8) & 0xf);
759
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800760 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800761 dtd->part2.h_sync_width = h_sync_len & 0xff;
762 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800763 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800764 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800765 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
766 ((v_sync_len & 0x30) >> 4);
767
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800768 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800769 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800770 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800771 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800773
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800774 dtd->part2.sdvo_flags = 0;
775 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
776 dtd->part2.reserved = 0;
777}
Jesse Barnes79e53942008-11-07 14:24:08 -0800778
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800779static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100780 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800781{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800782 mode->hdisplay = dtd->part1.h_active;
783 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
784 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800785 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800786 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
787 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
788 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
789 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
790
791 mode->vdisplay = dtd->part1.v_active;
792 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
793 mode->vsync_start = mode->vdisplay;
794 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800795 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800796 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
797 mode->vsync_end = mode->vsync_start +
798 (dtd->part2.v_sync_off_width & 0xf);
799 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
800 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
801 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
802
803 mode->clock = dtd->part1.clock * 10;
804
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800805 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800806 if (dtd->part2.dtd_flags & 0x2)
807 mode->flags |= DRM_MODE_FLAG_PHSYNC;
808 if (dtd->part2.dtd_flags & 0x4)
809 mode->flags |= DRM_MODE_FLAG_PVSYNC;
810}
811
Chris Wilsone27d8532010-10-22 09:15:22 +0100812static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800813{
Chris Wilsone27d8532010-10-22 09:15:22 +0100814 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800815
Chris Wilson1a3665c2011-01-25 13:59:37 +0000816 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100817 return intel_sdvo_get_value(intel_sdvo,
818 SDVO_CMD_GET_SUPP_ENCODE,
819 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800820}
821
Chris Wilsonea5b2132010-08-04 13:50:23 +0100822static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700823 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800824{
Chris Wilson32aad862010-08-04 13:50:25 +0100825 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800826}
827
Chris Wilsonea5b2132010-08-04 13:50:23 +0100828static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829 uint8_t mode)
830{
Chris Wilson32aad862010-08-04 13:50:25 +0100831 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800832}
833
834#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100835static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800836{
837 int i, j;
838 uint8_t set_buf_index[2];
839 uint8_t av_split;
840 uint8_t buf_size;
841 uint8_t buf[48];
842 uint8_t *pos;
843
Chris Wilson32aad862010-08-04 13:50:25 +0100844 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800845
846 for (i = 0; i <= av_split; i++) {
847 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700848 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700850 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
851 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800852
853 pos = buf;
854 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700855 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800856 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700857 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800858 pos += 8;
859 }
860 }
861}
862#endif
863
David Härdeman3c17fe42010-09-24 21:44:32 +0200864static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800865{
866 struct dip_infoframe avi_if = {
867 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200868 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800869 .len = DIP_LEN_AVI,
870 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200871 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
872 uint8_t set_buf_index[2] = { 1, 0 };
873 uint64_t *data = (uint64_t *)&avi_if;
874 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800875
David Härdeman3c17fe42010-09-24 21:44:32 +0200876 intel_dip_infoframe_csum(&avi_if);
877
Chris Wilsond121a5d2011-01-25 15:00:01 +0000878 if (!intel_sdvo_set_value(intel_sdvo,
879 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200880 set_buf_index, 2))
881 return false;
882
883 for (i = 0; i < sizeof(avi_if); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000884 if (!intel_sdvo_set_value(intel_sdvo,
885 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200886 data, 8))
887 return false;
888 data++;
889 }
890
Chris Wilsond121a5d2011-01-25 15:00:01 +0000891 return intel_sdvo_set_value(intel_sdvo,
892 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200893 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800894}
895
Chris Wilson32aad862010-08-04 13:50:25 +0100896static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800897{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800898 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100899 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800900
Chris Wilson40039752010-08-04 13:50:26 +0100901 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800902 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100903 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800904
Chris Wilson32aad862010-08-04 13:50:25 +0100905 BUILD_BUG_ON(sizeof(format) != 6);
906 return intel_sdvo_set_value(intel_sdvo,
907 SDVO_CMD_SET_TV_FORMAT,
908 &format, sizeof(format));
909}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800910
Chris Wilson32aad862010-08-04 13:50:25 +0100911static bool
912intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
913 struct drm_display_mode *mode)
914{
915 struct intel_sdvo_dtd output_dtd;
916
917 if (!intel_sdvo_set_target_output(intel_sdvo,
918 intel_sdvo->attached_output))
919 return false;
920
921 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
922 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
923 return false;
924
925 return true;
926}
927
928static bool
929intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
930 struct drm_display_mode *mode,
931 struct drm_display_mode *adjusted_mode)
932{
Chris Wilson32aad862010-08-04 13:50:25 +0100933 /* Reset the input timing to the screen. Assume always input 0. */
934 if (!intel_sdvo_set_target_input(intel_sdvo))
935 return false;
936
937 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
938 mode->clock / 10,
939 mode->hdisplay,
940 mode->vdisplay))
941 return false;
942
943 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100944 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100945 return false;
946
Chris Wilson6c9547f2010-08-25 10:05:17 +0100947 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100948
Chris Wilson32aad862010-08-04 13:50:25 +0100949 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800950}
951
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800952static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
953 struct drm_display_mode *mode,
954 struct drm_display_mode *adjusted_mode)
955{
Chris Wilson890f3352010-09-14 16:46:59 +0100956 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100957 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800958
Chris Wilson32aad862010-08-04 13:50:25 +0100959 /* We need to construct preferred input timings based on our
960 * output timings. To do that, we have to set the output
961 * timings, even though this isn't really the right place in
962 * the sequence to do it. Oh well.
963 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100964 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100965 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800966 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100967
Pavel Roskinc74696b2010-09-02 14:46:34 -0400968 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
969 mode,
970 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100971 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100972 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100973 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800974 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800975
Pavel Roskinc74696b2010-09-02 14:46:34 -0400976 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
977 mode,
978 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800979 }
Chris Wilson32aad862010-08-04 13:50:25 +0100980
981 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100982 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100983 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100984 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
985 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100986
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800987 return true;
988}
989
990static void intel_sdvo_mode_set(struct drm_encoder *encoder,
991 struct drm_display_mode *mode,
992 struct drm_display_mode *adjusted_mode)
993{
994 struct drm_device *dev = encoder->dev;
995 struct drm_i915_private *dev_priv = dev->dev_private;
996 struct drm_crtc *crtc = encoder->crtc;
997 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100998 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100999 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001000 struct intel_sdvo_in_out_map in_out;
1001 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001002 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1003 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001004
1005 if (!mode)
1006 return;
1007
1008 /* First, set the input mapping for the first input to our controlled
1009 * output. This is only correct if we're a single-input device, in
1010 * which case the first input is the output from the appropriate SDVO
1011 * channel on the motherboard. In a two-input device, the first input
1012 * will be SDVOB and the second SDVOC.
1013 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001014 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001015 in_out.in1 = 0;
1016
Pavel Roskinc74696b2010-09-02 14:46:34 -04001017 intel_sdvo_set_value(intel_sdvo,
1018 SDVO_CMD_SET_IN_OUT_MAP,
1019 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001020
Chris Wilson6c9547f2010-08-25 10:05:17 +01001021 /* Set the output timings to the screen */
1022 if (!intel_sdvo_set_target_output(intel_sdvo,
1023 intel_sdvo->attached_output))
1024 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001025
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001026 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001027 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001028 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001029 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1030 input_dtd = intel_sdvo->input_dtd;
1031 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001032 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001033 if (!intel_sdvo_set_target_output(intel_sdvo,
1034 intel_sdvo->attached_output))
1035 return;
1036
Chris Wilson6c9547f2010-08-25 10:05:17 +01001037 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001038 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001039 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001040
1041 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001042 if (!intel_sdvo_set_target_input(intel_sdvo))
1043 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001044
Chris Wilson97aaf912011-01-04 20:10:52 +00001045 if (intel_sdvo->has_hdmi_monitor) {
1046 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1047 intel_sdvo_set_colorimetry(intel_sdvo,
1048 SDVO_COLORIMETRY_RGB256);
1049 intel_sdvo_set_avi_infoframe(intel_sdvo);
1050 } else
1051 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001052
Chris Wilson6c9547f2010-08-25 10:05:17 +01001053 if (intel_sdvo->is_tv &&
1054 !intel_sdvo_set_tv_format(intel_sdvo))
1055 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001056
Pavel Roskinc74696b2010-09-02 14:46:34 -04001057 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001058
Chris Wilson6c9547f2010-08-25 10:05:17 +01001059 switch (pixel_multiplier) {
1060 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001061 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1062 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1063 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001064 }
Chris Wilson32aad862010-08-04 13:50:25 +01001065 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1066 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001067
1068 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001069 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001070 /* The real mode polarity is set by the SDVO commands, using
1071 * struct intel_sdvo_dtd. */
1072 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001073 if (intel_sdvo->is_hdmi)
1074 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001075 if (INTEL_INFO(dev)->gen < 5)
1076 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001077 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001078 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001079 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001080 case SDVOB:
1081 sdvox &= SDVOB_PRESERVE_MASK;
1082 break;
1083 case SDVOC:
1084 sdvox &= SDVOC_PRESERVE_MASK;
1085 break;
1086 }
1087 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1088 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001089
1090 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1091 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1092 else
1093 sdvox |= TRANSCODER(intel_crtc->pipe);
1094
Chris Wilsonda79de92010-11-22 11:12:46 +00001095 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001096 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001097
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001098 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001099 /* done in crtc_mode_set as the dpll_md reg must be written early */
1100 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1101 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001102 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001103 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001104 }
1105
Chris Wilson6714afb2010-12-17 04:10:51 +00001106 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1107 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001108 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001109 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001110}
1111
1112static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1113{
1114 struct drm_device *dev = encoder->dev;
1115 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001116 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001117 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001118 u32 temp;
1119
1120 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001121 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001122 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001123 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001124
1125 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001126 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001127 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001128 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001129 }
1130 }
1131 } else {
1132 bool input1, input2;
1133 int i;
1134 u8 status;
1135
Chris Wilsonea5b2132010-08-04 13:50:23 +01001136 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001137 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001138 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001139 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001140 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001141
Chris Wilson32aad862010-08-04 13:50:25 +01001142 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001143 /* Warn if the device reported failure to sync.
1144 * A lot of SDVO devices fail to notify of sync, but it's
1145 * a given it the status is a success, we succeeded.
1146 */
1147 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001148 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001149 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001150 }
1151
1152 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001153 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1154 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001155 }
1156 return;
1157}
1158
Jesse Barnes79e53942008-11-07 14:24:08 -08001159static int intel_sdvo_mode_valid(struct drm_connector *connector,
1160 struct drm_display_mode *mode)
1161{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001162 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001163
1164 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1165 return MODE_NO_DBLESCAN;
1166
Chris Wilsonea5b2132010-08-04 13:50:23 +01001167 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001168 return MODE_CLOCK_LOW;
1169
Chris Wilsonea5b2132010-08-04 13:50:23 +01001170 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001171 return MODE_CLOCK_HIGH;
1172
Chris Wilson85454232010-08-08 14:28:23 +01001173 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001174 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001175 return MODE_PANEL;
1176
Chris Wilsonea5b2132010-08-04 13:50:23 +01001177 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001178 return MODE_PANEL;
1179 }
1180
Jesse Barnes79e53942008-11-07 14:24:08 -08001181 return MODE_OK;
1182}
1183
Chris Wilsonea5b2132010-08-04 13:50:23 +01001184static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001185{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001186 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001187 if (!intel_sdvo_get_value(intel_sdvo,
1188 SDVO_CMD_GET_DEVICE_CAPS,
1189 caps, sizeof(*caps)))
1190 return false;
1191
1192 DRM_DEBUG_KMS("SDVO capabilities:\n"
1193 " vendor_id: %d\n"
1194 " device_id: %d\n"
1195 " device_rev_id: %d\n"
1196 " sdvo_version_major: %d\n"
1197 " sdvo_version_minor: %d\n"
1198 " sdvo_inputs_mask: %d\n"
1199 " smooth_scaling: %d\n"
1200 " sharp_scaling: %d\n"
1201 " up_scaling: %d\n"
1202 " down_scaling: %d\n"
1203 " stall_support: %d\n"
1204 " output_flags: %d\n",
1205 caps->vendor_id,
1206 caps->device_id,
1207 caps->device_rev_id,
1208 caps->sdvo_version_major,
1209 caps->sdvo_version_minor,
1210 caps->sdvo_inputs_mask,
1211 caps->smooth_scaling,
1212 caps->sharp_scaling,
1213 caps->up_scaling,
1214 caps->down_scaling,
1215 caps->stall_support,
1216 caps->output_flags);
1217
1218 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001219}
1220
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001221static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001222{
1223 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001224
Chris Wilson32aad862010-08-04 13:50:25 +01001225 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1226 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001227}
1228
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001229static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001230{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001231 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001232
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001233 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001234}
1235
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001236static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001237intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001238{
Chris Wilsonbc652122011-01-25 13:28:29 +00001239 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001240 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001241}
1242
Chris Wilsonf899fc62010-07-20 15:44:45 -07001243static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001244intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001245{
Chris Wilsone957d772010-09-24 12:52:03 +01001246 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1247 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001248}
1249
Chris Wilsonff482d82010-09-15 10:40:38 +01001250/* Mac mini hack -- use the same DDC as the analog connector */
1251static struct edid *
1252intel_sdvo_get_analog_edid(struct drm_connector *connector)
1253{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001254 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001255
Chris Wilson0c1dab82010-11-23 22:37:01 +00001256 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001257 intel_gmbus_get_adapter(dev_priv,
1258 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001259}
1260
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001261enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001262intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001263{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001264 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001265 enum drm_connector_status status;
1266 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001267
Chris Wilsone957d772010-09-24 12:52:03 +01001268 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001269
Chris Wilsonea5b2132010-08-04 13:50:23 +01001270 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001271 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001272
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001273 /*
1274 * Don't use the 1 as the argument of DDC bus switch to get
1275 * the EDID. It is used for SDVO SPD ROM.
1276 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001277 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001278 intel_sdvo->ddc_bus = ddc;
1279 edid = intel_sdvo_get_edid(connector);
1280 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001281 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001282 }
Chris Wilsone957d772010-09-24 12:52:03 +01001283 /*
1284 * If we found the EDID on the other bus,
1285 * assume that is the correct DDC bus.
1286 */
1287 if (edid == NULL)
1288 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001289 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001290
1291 /*
1292 * When there is no edid and no monitor is connected with VGA
1293 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001294 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001295 if (edid == NULL)
1296 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001297
Chris Wilson2f551c82010-09-15 10:42:50 +01001298 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001299 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001300 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001301 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1302 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001303 if (intel_sdvo->is_hdmi) {
1304 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1305 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1306 }
Chris Wilson139467432011-02-09 20:01:16 +00001307 } else
1308 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001309 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001310 kfree(edid);
1311 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001312
1313 if (status == connector_status_connected) {
1314 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001315 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1316 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001317 }
1318
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001319 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001320}
1321
Chris Wilson52220082011-06-20 14:45:50 +01001322static bool
1323intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1324 struct edid *edid)
1325{
1326 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1327 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1328
1329 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1330 connector_is_digital, monitor_is_digital);
1331 return connector_is_digital == monitor_is_digital;
1332}
1333
Chris Wilson7b334fc2010-09-09 23:51:02 +01001334static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001335intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001336{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001337 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001338 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001339 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001340 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001341
Chris Wilson32aad862010-08-04 13:50:25 +01001342 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001343 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001344 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001345
1346 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001347 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001348 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001349
Chris Wilson32aad862010-08-04 13:50:25 +01001350 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1351 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001352
Chris Wilsone957d772010-09-24 12:52:03 +01001353 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1354 response & 0xff, response >> 8,
1355 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001356
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001357 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001358 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001359
Chris Wilsonea5b2132010-08-04 13:50:23 +01001360 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001361
Chris Wilson97aaf912011-01-04 20:10:52 +00001362 intel_sdvo->has_hdmi_monitor = false;
1363 intel_sdvo->has_hdmi_audio = false;
1364
Chris Wilson615fb932010-08-04 13:50:24 +01001365 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001366 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001367 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001368 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001369 else {
1370 struct edid *edid;
1371
1372 /* if we have an edid check it matches the connection */
1373 edid = intel_sdvo_get_edid(connector);
1374 if (edid == NULL)
1375 edid = intel_sdvo_get_analog_edid(connector);
1376 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001377 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1378 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001379 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001380 else
1381 ret = connector_status_disconnected;
1382
Chris Wilson139467432011-02-09 20:01:16 +00001383 connector->display_info.raw_edid = NULL;
1384 kfree(edid);
1385 } else
1386 ret = connector_status_connected;
1387 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001388
1389 /* May update encoder flag for like clock for SDVO TV, etc.*/
1390 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001391 intel_sdvo->is_tv = false;
1392 intel_sdvo->is_lvds = false;
1393 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001394
1395 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001396 intel_sdvo->is_tv = true;
1397 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001398 }
1399 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001400 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001401 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001402
1403 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001404}
1405
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001406static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001407{
Chris Wilsonff482d82010-09-15 10:40:38 +01001408 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001409
1410 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001411 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001412
Keith Packard57cdaf92009-09-04 13:07:54 +08001413 /*
1414 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1415 * link between analog and digital outputs. So, if the regular SDVO
1416 * DDC fails, check to see if the analog output is disconnected, in
1417 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001418 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001419 if (edid == NULL)
1420 edid = intel_sdvo_get_analog_edid(connector);
1421
Chris Wilsonff482d82010-09-15 10:40:38 +01001422 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001423 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1424 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001425 drm_mode_connector_update_edid_property(connector, edid);
1426 drm_add_edid_modes(connector, edid);
1427 }
Chris Wilson139467432011-02-09 20:01:16 +00001428
Chris Wilsonff482d82010-09-15 10:40:38 +01001429 connector->display_info.raw_edid = NULL;
1430 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001431 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001432}
1433
1434/*
1435 * Set of SDVO TV modes.
1436 * Note! This is in reply order (see loop in get_tv_modes).
1437 * XXX: all 60Hz refresh?
1438 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001439static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001440 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1441 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001443 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1444 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001445 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001446 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1447 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001448 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001449 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1450 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001452 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1453 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001455 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1456 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001457 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001458 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1459 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001461 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1462 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001464 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1465 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001467 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1468 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001470 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1471 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001473 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1474 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001476 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1477 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001479 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1480 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001482 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1483 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001485 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1486 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001488 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1489 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1492 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001494 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1495 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497};
1498
1499static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1500{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001501 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001502 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001503 uint32_t reply = 0, format_map = 0;
1504 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001505
1506 /* Read the list of supported input resolutions for the selected TV
1507 * format.
1508 */
Chris Wilson40039752010-08-04 13:50:26 +01001509 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001510 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001511 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001512
Chris Wilson32aad862010-08-04 13:50:25 +01001513 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1514 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001515
Chris Wilson32aad862010-08-04 13:50:25 +01001516 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001517 if (!intel_sdvo_write_cmd(intel_sdvo,
1518 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001519 &tv_res, sizeof(tv_res)))
1520 return;
1521 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001522 return;
1523
1524 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001525 if (reply & (1 << i)) {
1526 struct drm_display_mode *nmode;
1527 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001528 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001529 if (nmode)
1530 drm_mode_probed_add(connector, nmode);
1531 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001532}
1533
Ma Ling7086c872009-05-13 11:20:06 +08001534static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1535{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001536 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001537 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001538 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001539
1540 /*
1541 * Attempt to get the mode list from DDC.
1542 * Assume that the preferred modes are
1543 * arranged in priority order.
1544 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001545 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001546 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001547 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001548
1549 /* Fetch modes from VBT */
1550 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001551 newmode = drm_mode_duplicate(connector->dev,
1552 dev_priv->sdvo_lvds_vbt_mode);
1553 if (newmode != NULL) {
1554 /* Guarantee the mode is preferred */
1555 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1556 DRM_MODE_TYPE_DRIVER);
1557 drm_mode_probed_add(connector, newmode);
1558 }
1559 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001560
1561end:
1562 list_for_each_entry(newmode, &connector->probed_modes, head) {
1563 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001564 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001565 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001566
1567 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1568 0);
1569
Chris Wilson85454232010-08-08 14:28:23 +01001570 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001571 break;
1572 }
1573 }
1574
Ma Ling7086c872009-05-13 11:20:06 +08001575}
1576
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001577static int intel_sdvo_get_modes(struct drm_connector *connector)
1578{
Chris Wilson615fb932010-08-04 13:50:24 +01001579 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001580
Chris Wilson615fb932010-08-04 13:50:24 +01001581 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001582 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001583 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001584 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001585 else
1586 intel_sdvo_get_ddc_modes(connector);
1587
Chris Wilson32aad862010-08-04 13:50:25 +01001588 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001589}
1590
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001591static void
1592intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001593{
Chris Wilson615fb932010-08-04 13:50:24 +01001594 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001595 struct drm_device *dev = connector->dev;
1596
Chris Wilsonc5521702010-08-04 13:50:28 +01001597 if (intel_sdvo_connector->left)
1598 drm_property_destroy(dev, intel_sdvo_connector->left);
1599 if (intel_sdvo_connector->right)
1600 drm_property_destroy(dev, intel_sdvo_connector->right);
1601 if (intel_sdvo_connector->top)
1602 drm_property_destroy(dev, intel_sdvo_connector->top);
1603 if (intel_sdvo_connector->bottom)
1604 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1605 if (intel_sdvo_connector->hpos)
1606 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1607 if (intel_sdvo_connector->vpos)
1608 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1609 if (intel_sdvo_connector->saturation)
1610 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1611 if (intel_sdvo_connector->contrast)
1612 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1613 if (intel_sdvo_connector->hue)
1614 drm_property_destroy(dev, intel_sdvo_connector->hue);
1615 if (intel_sdvo_connector->sharpness)
1616 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1617 if (intel_sdvo_connector->flicker_filter)
1618 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1619 if (intel_sdvo_connector->flicker_filter_2d)
1620 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1621 if (intel_sdvo_connector->flicker_filter_adaptive)
1622 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1623 if (intel_sdvo_connector->tv_luma_filter)
1624 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1625 if (intel_sdvo_connector->tv_chroma_filter)
1626 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001627 if (intel_sdvo_connector->dot_crawl)
1628 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001629 if (intel_sdvo_connector->brightness)
1630 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001631}
1632
Jesse Barnes79e53942008-11-07 14:24:08 -08001633static void intel_sdvo_destroy(struct drm_connector *connector)
1634{
Chris Wilson615fb932010-08-04 13:50:24 +01001635 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001636
Chris Wilsonc5521702010-08-04 13:50:28 +01001637 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001638 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001639 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001640
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001641 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001642 drm_sysfs_connector_remove(connector);
1643 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001644 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001645}
1646
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001647static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1648{
1649 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1650 struct edid *edid;
1651 bool has_audio = false;
1652
1653 if (!intel_sdvo->is_hdmi)
1654 return false;
1655
1656 edid = intel_sdvo_get_edid(connector);
1657 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1658 has_audio = drm_detect_monitor_audio(edid);
1659
1660 return has_audio;
1661}
1662
Zhao Yakuice6feab2009-08-24 13:50:26 +08001663static int
1664intel_sdvo_set_property(struct drm_connector *connector,
1665 struct drm_property *property,
1666 uint64_t val)
1667{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001668 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001669 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001670 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001671 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001672 uint8_t cmd;
1673 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001674
1675 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001676 if (ret)
1677 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001678
Chris Wilson3f43c482011-05-12 22:17:24 +01001679 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001680 int i = val;
1681 bool has_audio;
1682
1683 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001684 return 0;
1685
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001686 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001687
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001688 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001689 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1690 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001691 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001692
1693 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001694 return 0;
1695
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001696 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001697 goto done;
1698 }
1699
Chris Wilsone953fd72011-02-21 22:23:52 +00001700 if (property == dev_priv->broadcast_rgb_property) {
1701 if (val == !!intel_sdvo->color_range)
1702 return 0;
1703
1704 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001705 goto done;
1706 }
1707
Chris Wilsonc5521702010-08-04 13:50:28 +01001708#define CHECK_PROPERTY(name, NAME) \
1709 if (intel_sdvo_connector->name == property) { \
1710 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1711 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1712 cmd = SDVO_CMD_SET_##NAME; \
1713 intel_sdvo_connector->cur_##name = temp_value; \
1714 goto set_value; \
1715 }
1716
1717 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001718 if (val >= TV_FORMAT_NUM)
1719 return -EINVAL;
1720
Chris Wilson40039752010-08-04 13:50:26 +01001721 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001722 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001723 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001724
Chris Wilson40039752010-08-04 13:50:26 +01001725 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001726 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001727 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001728 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001729 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001730 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001731 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001732 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001733 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001734
Chris Wilson615fb932010-08-04 13:50:24 +01001735 intel_sdvo_connector->left_margin = temp_value;
1736 intel_sdvo_connector->right_margin = temp_value;
1737 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001738 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001739 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001740 goto set_value;
1741 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001742 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001743 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001744 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001745 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001746
Chris Wilson615fb932010-08-04 13:50:24 +01001747 intel_sdvo_connector->left_margin = temp_value;
1748 intel_sdvo_connector->right_margin = temp_value;
1749 temp_value = intel_sdvo_connector->max_hscan -
1750 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001751 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001752 goto set_value;
1753 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001754 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001755 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001756 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001757 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001758
Chris Wilson615fb932010-08-04 13:50:24 +01001759 intel_sdvo_connector->top_margin = temp_value;
1760 intel_sdvo_connector->bottom_margin = temp_value;
1761 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001762 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001763 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001764 goto set_value;
1765 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001766 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001767 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001768 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001769 return 0;
1770
Chris Wilson615fb932010-08-04 13:50:24 +01001771 intel_sdvo_connector->top_margin = temp_value;
1772 intel_sdvo_connector->bottom_margin = temp_value;
1773 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001774 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001775 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001776 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001777 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001778 CHECK_PROPERTY(hpos, HPOS)
1779 CHECK_PROPERTY(vpos, VPOS)
1780 CHECK_PROPERTY(saturation, SATURATION)
1781 CHECK_PROPERTY(contrast, CONTRAST)
1782 CHECK_PROPERTY(hue, HUE)
1783 CHECK_PROPERTY(brightness, BRIGHTNESS)
1784 CHECK_PROPERTY(sharpness, SHARPNESS)
1785 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1786 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1787 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1788 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1789 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001790 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001791 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001792
1793 return -EINVAL; /* unknown property */
1794
1795set_value:
1796 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1797 return -EIO;
1798
1799
1800done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001801 if (intel_sdvo->base.base.crtc) {
1802 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001803 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001804 crtc->y, crtc->fb);
1805 }
1806
Chris Wilson32aad862010-08-04 13:50:25 +01001807 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001808#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001809}
1810
Jesse Barnes79e53942008-11-07 14:24:08 -08001811static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1812 .dpms = intel_sdvo_dpms,
1813 .mode_fixup = intel_sdvo_mode_fixup,
1814 .prepare = intel_encoder_prepare,
1815 .mode_set = intel_sdvo_mode_set,
1816 .commit = intel_encoder_commit,
1817};
1818
1819static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001820 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001821 .detect = intel_sdvo_detect,
1822 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001823 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001824 .destroy = intel_sdvo_destroy,
1825};
1826
1827static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1828 .get_modes = intel_sdvo_get_modes,
1829 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001830 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001831};
1832
Hannes Ederb358d0a2008-12-18 21:18:47 +01001833static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001834{
Chris Wilson890f3352010-09-14 16:46:59 +01001835 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001836
Chris Wilsonea5b2132010-08-04 13:50:23 +01001837 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001838 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001839 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001840
Chris Wilsone957d772010-09-24 12:52:03 +01001841 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001842 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001843}
1844
1845static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1846 .destroy = intel_sdvo_enc_destroy,
1847};
1848
Chris Wilsonb66d8422010-08-12 15:26:41 +01001849static void
1850intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1851{
1852 uint16_t mask = 0;
1853 unsigned int num_bits;
1854
1855 /* Make a mask of outputs less than or equal to our own priority in the
1856 * list.
1857 */
1858 switch (sdvo->controlled_output) {
1859 case SDVO_OUTPUT_LVDS1:
1860 mask |= SDVO_OUTPUT_LVDS1;
1861 case SDVO_OUTPUT_LVDS0:
1862 mask |= SDVO_OUTPUT_LVDS0;
1863 case SDVO_OUTPUT_TMDS1:
1864 mask |= SDVO_OUTPUT_TMDS1;
1865 case SDVO_OUTPUT_TMDS0:
1866 mask |= SDVO_OUTPUT_TMDS0;
1867 case SDVO_OUTPUT_RGB1:
1868 mask |= SDVO_OUTPUT_RGB1;
1869 case SDVO_OUTPUT_RGB0:
1870 mask |= SDVO_OUTPUT_RGB0;
1871 break;
1872 }
1873
1874 /* Count bits to find what number we are in the priority list. */
1875 mask &= sdvo->caps.output_flags;
1876 num_bits = hweight16(mask);
1877 /* If more than 3 outputs, default to DDC bus 3 for now. */
1878 if (num_bits > 3)
1879 num_bits = 3;
1880
1881 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1882 sdvo->ddc_bus = 1 << num_bits;
1883}
Jesse Barnes79e53942008-11-07 14:24:08 -08001884
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001885/**
1886 * Choose the appropriate DDC bus for control bus switch command for this
1887 * SDVO output based on the controlled output.
1888 *
1889 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1890 * outputs, then LVDS outputs.
1891 */
1892static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001893intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001894 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001895{
Adam Jacksonb1083332010-04-23 16:07:40 -04001896 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001897
Daniel Vettereef4eac2012-03-23 23:43:35 +01001898 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04001899 mapping = &(dev_priv->sdvo_mappings[0]);
1900 else
1901 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001902
Chris Wilsonb66d8422010-08-12 15:26:41 +01001903 if (mapping->initialized)
1904 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1905 else
1906 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001907}
1908
Chris Wilsone957d772010-09-24 12:52:03 +01001909static void
1910intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1911 struct intel_sdvo *sdvo, u32 reg)
1912{
1913 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001914 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001915
Daniel Vettereef4eac2012-03-23 23:43:35 +01001916 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01001917 mapping = &dev_priv->sdvo_mappings[0];
1918 else
1919 mapping = &dev_priv->sdvo_mappings[1];
1920
1921 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001922 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001923 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001924
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001925 if (intel_gmbus_is_port_valid(pin)) {
1926 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
Adam Jacksond5090b92011-06-16 16:36:28 -04001927 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001928 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001929 } else {
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001930 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Adam Jackson46eb3032011-06-16 16:36:23 -04001931 }
Chris Wilsone957d772010-09-24 12:52:03 +01001932}
1933
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001934static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001935intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001936{
Chris Wilson97aaf912011-01-04 20:10:52 +00001937 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001938}
1939
yakui_zhao714605e2009-05-31 17:18:07 +08001940static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01001941intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08001942{
1943 struct drm_i915_private *dev_priv = dev->dev_private;
1944 struct sdvo_device_mapping *my_mapping, *other_mapping;
1945
Daniel Vettereef4eac2012-03-23 23:43:35 +01001946 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08001947 my_mapping = &dev_priv->sdvo_mappings[0];
1948 other_mapping = &dev_priv->sdvo_mappings[1];
1949 } else {
1950 my_mapping = &dev_priv->sdvo_mappings[1];
1951 other_mapping = &dev_priv->sdvo_mappings[0];
1952 }
1953
1954 /* If the BIOS described our SDVO device, take advantage of it. */
1955 if (my_mapping->slave_addr)
1956 return my_mapping->slave_addr;
1957
1958 /* If the BIOS only described a different SDVO device, use the
1959 * address that it isn't using.
1960 */
1961 if (other_mapping->slave_addr) {
1962 if (other_mapping->slave_addr == 0x70)
1963 return 0x72;
1964 else
1965 return 0x70;
1966 }
1967
1968 /* No SDVO device info is found for another DVO port,
1969 * so use mapping assumption we had before BIOS parsing.
1970 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01001971 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08001972 return 0x70;
1973 else
1974 return 0x72;
1975}
1976
Zhenyu Wang14571b42010-03-30 14:06:33 +08001977static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001978intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1979 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001980{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001981 drm_connector_init(encoder->base.base.dev,
1982 &connector->base.base,
1983 &intel_sdvo_connector_funcs,
1984 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08001985
Chris Wilsondf0e9242010-09-09 16:20:55 +01001986 drm_connector_helper_add(&connector->base.base,
1987 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001988
Peter Ross8f4839e2012-01-28 14:49:25 +01001989 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001990 connector->base.base.doublescan_allowed = 0;
1991 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001992
Chris Wilsondf0e9242010-09-09 16:20:55 +01001993 intel_connector_attach_encoder(&connector->base, &encoder->base);
1994 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001995}
1996
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001997static void
1998intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1999{
2000 struct drm_device *dev = connector->base.base.dev;
2001
Chris Wilson3f43c482011-05-12 22:17:24 +01002002 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002003 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2004 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002005}
2006
Zhenyu Wang14571b42010-03-30 14:06:33 +08002007static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002008intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002009{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002010 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002011 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002012 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002013 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002014 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002015
Chris Wilson615fb932010-08-04 13:50:24 +01002016 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2017 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002018 return false;
2019
Zhenyu Wang14571b42010-03-30 14:06:33 +08002020 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002021 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002022 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002023 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002024 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002025 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002026 }
2027
Chris Wilson615fb932010-08-04 13:50:24 +01002028 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002029 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002030 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2031 connector->polled = DRM_CONNECTOR_POLL_HPD;
2032 intel_sdvo->hotplug_active[0] |= 1 << device;
2033 /* Some SDVO devices have one-shot hotplug interrupts.
2034 * Ensure that they get re-enabled when an interrupt happens.
2035 */
2036 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2037 intel_sdvo_enable_hotplug(intel_encoder);
2038 }
2039 else
2040 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002041 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2042 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2043
Chris Wilsone27d8532010-10-22 09:15:22 +01002044 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002045 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002046 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002047 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002048 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2049 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002050
Chris Wilsondf0e9242010-09-09 16:20:55 +01002051 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002052 if (intel_sdvo->is_hdmi)
2053 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002054
2055 return true;
2056}
2057
2058static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002059intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002060{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002061 struct drm_encoder *encoder = &intel_sdvo->base.base;
2062 struct drm_connector *connector;
2063 struct intel_connector *intel_connector;
2064 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002065
Chris Wilson615fb932010-08-04 13:50:24 +01002066 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2067 if (!intel_sdvo_connector)
2068 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002069
Chris Wilson615fb932010-08-04 13:50:24 +01002070 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002071 connector = &intel_connector->base;
2072 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2073 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002074
Chris Wilson4ef69c72010-09-09 15:14:28 +01002075 intel_sdvo->controlled_output |= type;
2076 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002077
Chris Wilson4ef69c72010-09-09 15:14:28 +01002078 intel_sdvo->is_tv = true;
2079 intel_sdvo->base.needs_tv_clock = true;
2080 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002081
Chris Wilsondf0e9242010-09-09 16:20:55 +01002082 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002083
Chris Wilson4ef69c72010-09-09 15:14:28 +01002084 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002085 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002086
Chris Wilson4ef69c72010-09-09 15:14:28 +01002087 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002088 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002089
Chris Wilson4ef69c72010-09-09 15:14:28 +01002090 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002091
2092err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002093 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002094 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002095}
2096
2097static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002098intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002099{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002100 struct drm_encoder *encoder = &intel_sdvo->base.base;
2101 struct drm_connector *connector;
2102 struct intel_connector *intel_connector;
2103 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002104
Chris Wilson615fb932010-08-04 13:50:24 +01002105 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2106 if (!intel_sdvo_connector)
2107 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002108
Chris Wilson615fb932010-08-04 13:50:24 +01002109 intel_connector = &intel_sdvo_connector->base;
2110 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002111 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2112 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2113 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002114
Chris Wilson4ef69c72010-09-09 15:14:28 +01002115 if (device == 0) {
2116 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2117 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2118 } else if (device == 1) {
2119 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2120 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2121 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002122
Chris Wilson4ef69c72010-09-09 15:14:28 +01002123 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2124 (1 << INTEL_ANALOG_CLONE_BIT));
2125
Chris Wilsondf0e9242010-09-09 16:20:55 +01002126 intel_sdvo_connector_init(intel_sdvo_connector,
2127 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002128 return true;
2129}
2130
2131static bool
2132intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2133{
2134 struct drm_encoder *encoder = &intel_sdvo->base.base;
2135 struct drm_connector *connector;
2136 struct intel_connector *intel_connector;
2137 struct intel_sdvo_connector *intel_sdvo_connector;
2138
2139 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2140 if (!intel_sdvo_connector)
2141 return false;
2142
2143 intel_connector = &intel_sdvo_connector->base;
2144 connector = &intel_connector->base;
2145 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2146 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2147
2148 if (device == 0) {
2149 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2150 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2151 } else if (device == 1) {
2152 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2153 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2154 }
2155
2156 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002157 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002158
Chris Wilsondf0e9242010-09-09 16:20:55 +01002159 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002160 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002161 goto err;
2162
2163 return true;
2164
2165err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002166 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002167 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002168}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002169
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002170static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002171intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002172{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002173 intel_sdvo->is_tv = false;
2174 intel_sdvo->base.needs_tv_clock = false;
2175 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002176
Zhenyu Wang14571b42010-03-30 14:06:33 +08002177 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002178
Zhenyu Wang14571b42010-03-30 14:06:33 +08002179 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002180 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002181 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002182
Zhenyu Wang14571b42010-03-30 14:06:33 +08002183 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002184 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002185 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002186
Zhenyu Wang14571b42010-03-30 14:06:33 +08002187 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002188 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002189 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002190 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002191
Zhenyu Wang14571b42010-03-30 14:06:33 +08002192 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002193 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002194 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002195
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002196 if (flags & SDVO_OUTPUT_YPRPB0)
2197 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2198 return false;
2199
Zhenyu Wang14571b42010-03-30 14:06:33 +08002200 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002201 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002202 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002203
Zhenyu Wang14571b42010-03-30 14:06:33 +08002204 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002205 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002206 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002207
Zhenyu Wang14571b42010-03-30 14:06:33 +08002208 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002209 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002210 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002211
Zhenyu Wang14571b42010-03-30 14:06:33 +08002212 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002213 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002214 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002215
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002217 unsigned char bytes[2];
2218
Chris Wilsonea5b2132010-08-04 13:50:23 +01002219 intel_sdvo->controlled_output = 0;
2220 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002221 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002222 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002223 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002225 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002226 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002227
Zhenyu Wang14571b42010-03-30 14:06:33 +08002228 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002229}
2230
Chris Wilson32aad862010-08-04 13:50:25 +01002231static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2232 struct intel_sdvo_connector *intel_sdvo_connector,
2233 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002234{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002235 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002236 struct intel_sdvo_tv_format format;
2237 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002238
Chris Wilson32aad862010-08-04 13:50:25 +01002239 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2240 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002241
Chris Wilson1a3665c2011-01-25 13:59:37 +00002242 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002243 if (!intel_sdvo_get_value(intel_sdvo,
2244 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2245 &format, sizeof(format)))
2246 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002247
Chris Wilson32aad862010-08-04 13:50:25 +01002248 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002249
2250 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002251 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002252
Chris Wilson615fb932010-08-04 13:50:24 +01002253 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002254 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002255 if (format_map & (1 << i))
2256 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002257
2258
Chris Wilsonc5521702010-08-04 13:50:28 +01002259 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002260 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2261 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002262 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002263 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002264
Chris Wilson615fb932010-08-04 13:50:24 +01002265 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002266 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002267 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002268 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002269
Chris Wilson40039752010-08-04 13:50:26 +01002270 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002271 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002272 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002273 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002274
2275}
2276
Chris Wilsonc5521702010-08-04 13:50:28 +01002277#define ENHANCEMENT(name, NAME) do { \
2278 if (enhancements.name) { \
2279 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2280 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2281 return false; \
2282 intel_sdvo_connector->max_##name = data_value[0]; \
2283 intel_sdvo_connector->cur_##name = response; \
2284 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002285 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002286 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002287 drm_connector_attach_property(connector, \
2288 intel_sdvo_connector->name, \
2289 intel_sdvo_connector->cur_##name); \
2290 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2291 data_value[0], data_value[1], response); \
2292 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002293} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002294
2295static bool
2296intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2297 struct intel_sdvo_connector *intel_sdvo_connector,
2298 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002299{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002300 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002301 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002302 uint16_t response, data_value[2];
2303
Chris Wilsonc5521702010-08-04 13:50:28 +01002304 /* when horizontal overscan is supported, Add the left/right property */
2305 if (enhancements.overscan_h) {
2306 if (!intel_sdvo_get_value(intel_sdvo,
2307 SDVO_CMD_GET_MAX_OVERSCAN_H,
2308 &data_value, 4))
2309 return false;
2310
2311 if (!intel_sdvo_get_value(intel_sdvo,
2312 SDVO_CMD_GET_OVERSCAN_H,
2313 &response, 2))
2314 return false;
2315
2316 intel_sdvo_connector->max_hscan = data_value[0];
2317 intel_sdvo_connector->left_margin = data_value[0] - response;
2318 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2319 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002320 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002321 if (!intel_sdvo_connector->left)
2322 return false;
2323
Chris Wilsonc5521702010-08-04 13:50:28 +01002324 drm_connector_attach_property(connector,
2325 intel_sdvo_connector->left,
2326 intel_sdvo_connector->left_margin);
2327
2328 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002329 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002330 if (!intel_sdvo_connector->right)
2331 return false;
2332
Chris Wilsonc5521702010-08-04 13:50:28 +01002333 drm_connector_attach_property(connector,
2334 intel_sdvo_connector->right,
2335 intel_sdvo_connector->right_margin);
2336 DRM_DEBUG_KMS("h_overscan: max %d, "
2337 "default %d, current %d\n",
2338 data_value[0], data_value[1], response);
2339 }
2340
2341 if (enhancements.overscan_v) {
2342 if (!intel_sdvo_get_value(intel_sdvo,
2343 SDVO_CMD_GET_MAX_OVERSCAN_V,
2344 &data_value, 4))
2345 return false;
2346
2347 if (!intel_sdvo_get_value(intel_sdvo,
2348 SDVO_CMD_GET_OVERSCAN_V,
2349 &response, 2))
2350 return false;
2351
2352 intel_sdvo_connector->max_vscan = data_value[0];
2353 intel_sdvo_connector->top_margin = data_value[0] - response;
2354 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2355 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002356 drm_property_create_range(dev, 0,
2357 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002358 if (!intel_sdvo_connector->top)
2359 return false;
2360
Chris Wilsonc5521702010-08-04 13:50:28 +01002361 drm_connector_attach_property(connector,
2362 intel_sdvo_connector->top,
2363 intel_sdvo_connector->top_margin);
2364
2365 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002366 drm_property_create_range(dev, 0,
2367 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002368 if (!intel_sdvo_connector->bottom)
2369 return false;
2370
Chris Wilsonc5521702010-08-04 13:50:28 +01002371 drm_connector_attach_property(connector,
2372 intel_sdvo_connector->bottom,
2373 intel_sdvo_connector->bottom_margin);
2374 DRM_DEBUG_KMS("v_overscan: max %d, "
2375 "default %d, current %d\n",
2376 data_value[0], data_value[1], response);
2377 }
2378
2379 ENHANCEMENT(hpos, HPOS);
2380 ENHANCEMENT(vpos, VPOS);
2381 ENHANCEMENT(saturation, SATURATION);
2382 ENHANCEMENT(contrast, CONTRAST);
2383 ENHANCEMENT(hue, HUE);
2384 ENHANCEMENT(sharpness, SHARPNESS);
2385 ENHANCEMENT(brightness, BRIGHTNESS);
2386 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2387 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2388 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2389 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2390 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2391
Chris Wilsone0442182010-08-04 13:50:29 +01002392 if (enhancements.dot_crawl) {
2393 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2394 return false;
2395
2396 intel_sdvo_connector->max_dot_crawl = 1;
2397 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2398 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002399 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002400 if (!intel_sdvo_connector->dot_crawl)
2401 return false;
2402
Chris Wilsone0442182010-08-04 13:50:29 +01002403 drm_connector_attach_property(connector,
2404 intel_sdvo_connector->dot_crawl,
2405 intel_sdvo_connector->cur_dot_crawl);
2406 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2407 }
2408
Chris Wilsonc5521702010-08-04 13:50:28 +01002409 return true;
2410}
2411
2412static bool
2413intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2414 struct intel_sdvo_connector *intel_sdvo_connector,
2415 struct intel_sdvo_enhancements_reply enhancements)
2416{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002417 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002418 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2419 uint16_t response, data_value[2];
2420
2421 ENHANCEMENT(brightness, BRIGHTNESS);
2422
2423 return true;
2424}
2425#undef ENHANCEMENT
2426
2427static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2428 struct intel_sdvo_connector *intel_sdvo_connector)
2429{
2430 union {
2431 struct intel_sdvo_enhancements_reply reply;
2432 uint16_t response;
2433 } enhancements;
2434
Chris Wilson1a3665c2011-01-25 13:59:37 +00002435 BUILD_BUG_ON(sizeof(enhancements) != 2);
2436
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002437 enhancements.response = 0;
2438 intel_sdvo_get_value(intel_sdvo,
2439 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2440 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002441 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002442 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002443 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002444 }
Chris Wilson32aad862010-08-04 13:50:25 +01002445
Chris Wilsonc5521702010-08-04 13:50:28 +01002446 if (IS_TV(intel_sdvo_connector))
2447 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002448 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002449 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2450 else
2451 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002452}
Chris Wilson32aad862010-08-04 13:50:25 +01002453
Chris Wilsone957d772010-09-24 12:52:03 +01002454static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2455 struct i2c_msg *msgs,
2456 int num)
2457{
2458 struct intel_sdvo *sdvo = adapter->algo_data;
2459
2460 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2461 return -EIO;
2462
2463 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2464}
2465
2466static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2467{
2468 struct intel_sdvo *sdvo = adapter->algo_data;
2469 return sdvo->i2c->algo->functionality(sdvo->i2c);
2470}
2471
2472static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2473 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2474 .functionality = intel_sdvo_ddc_proxy_func
2475};
2476
2477static bool
2478intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2479 struct drm_device *dev)
2480{
2481 sdvo->ddc.owner = THIS_MODULE;
2482 sdvo->ddc.class = I2C_CLASS_DDC;
2483 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2484 sdvo->ddc.dev.parent = &dev->pdev->dev;
2485 sdvo->ddc.algo_data = sdvo;
2486 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2487
2488 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002489}
2490
Daniel Vettereef4eac2012-03-23 23:43:35 +01002491bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002492{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002493 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002494 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002495 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002496 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002497
Chris Wilsonea5b2132010-08-04 13:50:23 +01002498 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2499 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002500 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002501
Chris Wilson56184e32011-05-17 14:03:50 +01002502 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002503 intel_sdvo->is_sdvob = is_sdvob;
2504 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002505 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002506 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2507 kfree(intel_sdvo);
2508 return false;
2509 }
2510
Chris Wilson56184e32011-05-17 14:03:50 +01002511 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002512 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002513 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002514 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002515
Jesse Barnes79e53942008-11-07 14:24:08 -08002516 /* Read the regs to test if we can talk to the device */
2517 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002518 u8 byte;
2519
2520 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002521 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2522 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002523 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002524 }
2525 }
2526
Daniel Vettereef4eac2012-03-23 23:43:35 +01002527 if (intel_sdvo->is_sdvob)
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002528 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002529 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002530 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002531
Chris Wilson4ef69c72010-09-09 15:14:28 +01002532 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002533
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002534 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002535 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002536 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002537
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002538 /* Set up hotplug command - note paranoia about contents of reply.
2539 * We assume that the hardware is in a sane state, and only touch
2540 * the bits we think we understand.
2541 */
2542 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2543 &intel_sdvo->hotplug_active, 2);
2544 intel_sdvo->hotplug_active[0] &= ~0x3;
2545
Chris Wilsonea5b2132010-08-04 13:50:23 +01002546 if (intel_sdvo_output_setup(intel_sdvo,
2547 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002548 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2549 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002550 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002551 }
2552
Chris Wilsonea5b2132010-08-04 13:50:23 +01002553 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002554
Jesse Barnes79e53942008-11-07 14:24:08 -08002555 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002556 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002557 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002558
Chris Wilson32aad862010-08-04 13:50:25 +01002559 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2560 &intel_sdvo->pixel_clock_min,
2561 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002562 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002563
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002564 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002565 "clock range %dMHz - %dMHz, "
2566 "input 1: %c, input 2: %c, "
2567 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002568 SDVO_NAME(intel_sdvo),
2569 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2570 intel_sdvo->caps.device_rev_id,
2571 intel_sdvo->pixel_clock_min / 1000,
2572 intel_sdvo->pixel_clock_max / 1000,
2573 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2574 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002575 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002576 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002577 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002578 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002579 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002580 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002581
Chris Wilsonf899fc62010-07-20 15:44:45 -07002582err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002583 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002584 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002585 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002586
Eric Anholt7d573822009-01-02 13:33:00 -08002587 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002588}