blob: a481b6a1715d4cb5d52a81b5f0c40c90b540989d [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Stephen Rothwellc6efe5782011-09-28 18:32:34 +100018#include <linux/moduleparam.h>
Sangwook Leef7830202011-10-26 16:28:38 +010019#include <linux/errno.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030020#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030021#include <linux/mmc/sdio_func.h>
22#include "core.h"
23#include "cfg80211.h"
24#include "target.h"
25#include "debug.h"
26#include "hif-ops.h"
27
28unsigned int debug_mask;
Kalle Valo003353b0d2011-09-01 10:14:21 +030029static unsigned int testmode;
Kalle Valo8277de12011-11-03 12:18:31 +020030static bool suspend_cutpower;
Vasanthakumar Thiagarajana10e2f22011-12-29 16:05:38 +053031static unsigned int uart_debug;
Kalle Valobdcd8172011-07-18 00:22:30 +030032
33module_param(debug_mask, uint, 0644);
Kalle Valo003353b0d2011-09-01 10:14:21 +030034module_param(testmode, uint, 0644);
Kalle Valo8277de12011-11-03 12:18:31 +020035module_param(suspend_cutpower, bool, 0444);
Vasanthakumar Thiagarajana10e2f22011-12-29 16:05:38 +053036module_param(uart_debug, uint, 0644);
Kalle Valobdcd8172011-07-18 00:22:30 +030037
Kalle Valo856f4b312011-11-14 19:30:29 +020038static const struct ath6kl_hw hw_list[] = {
39 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020040 .id = AR6003_HW_2_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020041 .name = "ar6003 hw 2.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020042 .dataset_patch_addr = 0x57e884,
43 .app_load_addr = 0x543180,
44 .board_ext_data_addr = 0x57e500,
45 .reserved_ram_size = 6912,
Ryan Hsu39586bf2011-12-13 17:11:07 +080046 .refclk_hz = 26000000,
47 .uarttx_pin = 8,
Kalle Valo856f4b312011-11-14 19:30:29 +020048
49 /* hw2.0 needs override address hardcoded */
50 .app_start_override_addr = 0x944C00,
Kalle Valod1a94212011-11-14 19:31:23 +020051
Kalle Valoc0038972011-12-16 20:53:31 +020052 .fw = {
53 .dir = AR6003_HW_2_0_FW_DIR,
54 .otp = AR6003_HW_2_0_OTP_FILE,
55 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
56 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
57 .patch = AR6003_HW_2_0_PATCH_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020058 },
59
Kalle Valod1a94212011-11-14 19:31:23 +020060 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
61 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020062 },
63 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020064 .id = AR6003_HW_2_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020065 .name = "ar6003 hw 2.1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +020066 .dataset_patch_addr = 0x57ff74,
67 .app_load_addr = 0x1234,
68 .board_ext_data_addr = 0x542330,
69 .reserved_ram_size = 512,
Ryan Hsu39586bf2011-12-13 17:11:07 +080070 .refclk_hz = 26000000,
71 .uarttx_pin = 8,
Kalle Valod1a94212011-11-14 19:31:23 +020072
Kalle Valoc0038972011-12-16 20:53:31 +020073 .fw = {
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020079 },
80
Kalle Valod1a94212011-11-14 19:31:23 +020081 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
82 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020083 },
84 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020085 .id = AR6004_HW_1_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020086 .name = "ar6004 hw 1.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020087 .dataset_patch_addr = 0x57e884,
88 .app_load_addr = 0x1234,
89 .board_ext_data_addr = 0x437000,
90 .reserved_ram_size = 19456,
Kalle Valo0d4d72b2011-11-14 19:30:39 +020091 .board_addr = 0x433900,
Ryan Hsu39586bf2011-12-13 17:11:07 +080092 .refclk_hz = 26000000,
93 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +020094
Kalle Valoc0038972011-12-16 20:53:31 +020095 .fw = {
96 .dir = AR6004_HW_1_0_FW_DIR,
97 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020098 },
99
Kalle Valod1a94212011-11-14 19:31:23 +0200100 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
101 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200102 },
103 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +0200104 .id = AR6004_HW_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +0200105 .name = "ar6004 hw 1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +0200106 .dataset_patch_addr = 0x57e884,
107 .app_load_addr = 0x1234,
108 .board_ext_data_addr = 0x437000,
109 .reserved_ram_size = 11264,
Kalle Valo0d4d72b2011-11-14 19:30:39 +0200110 .board_addr = 0x43d400,
Ryan Hsu39586bf2011-12-13 17:11:07 +0800111 .refclk_hz = 40000000,
112 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +0200113
Kalle Valoc0038972011-12-16 20:53:31 +0200114 .fw = {
115 .dir = AR6004_HW_1_1_FW_DIR,
116 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +0200117 },
118
Kalle Valod1a94212011-11-14 19:31:23 +0200119 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
120 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200121 },
122};
123
Kalle Valobdcd8172011-07-18 00:22:30 +0300124/*
125 * Include definitions here that can be used to tune the WLAN module
126 * behavior. Different customers can tune the behavior as per their needs,
127 * here.
128 */
129
130/*
131 * This configuration item enable/disable keepalive support.
132 * Keepalive support: In the absence of any data traffic to AP, null
133 * frames will be sent to the AP at periodic interval, to keep the association
134 * active. This configuration item defines the periodic interval.
135 * Use value of zero to disable keepalive support
136 * Default: 60 seconds
137 */
138#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
139
140/*
141 * This configuration item sets the value of disconnect timeout
142 * Firmware delays sending the disconnec event to the host for this
143 * timeout after is gets disconnected from the current AP.
144 * If the firmware successly roams within the disconnect timeout
145 * it sends a new connect event
146 */
147#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
148
Kalle Valobdcd8172011-07-18 00:22:30 +0300149
Kalle Valobdcd8172011-07-18 00:22:30 +0300150#define ATH6KL_DATA_OFFSET 64
151struct sk_buff *ath6kl_buf_alloc(int size)
152{
153 struct sk_buff *skb;
154 u16 reserved;
155
156 /* Add chacheline space at front and back of buffer */
157 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +0530158 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +0300159 skb = dev_alloc_skb(size + reserved);
160
161 if (skb)
162 skb_reserve(skb, reserved - L1_CACHE_BYTES);
163 return skb;
164}
165
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530166void ath6kl_init_profile_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300167{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530168 vif->ssid_len = 0;
169 memset(vif->ssid, 0, sizeof(vif->ssid));
170
171 vif->dot11_auth_mode = OPEN_AUTH;
172 vif->auth_mode = NONE_AUTH;
173 vif->prwise_crypto = NONE_CRYPT;
174 vif->prwise_crypto_len = 0;
175 vif->grp_crypto = NONE_CRYPT;
176 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530177 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +0530178 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
179 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530180 vif->bss_ch = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300181}
182
Kalle Valobdcd8172011-07-18 00:22:30 +0300183static int ath6kl_set_host_app_area(struct ath6kl *ar)
184{
185 u32 address, data;
186 struct host_app_area host_app_area;
187
188 /* Fetch the address of the host_app_area_s
189 * instance in the host interest area */
190 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800191 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300192
Kalle Valoaddb44b2011-09-02 10:32:05 +0300193 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300194 return -EIO;
195
Kevin Fang31024d92011-07-11 17:14:13 +0800196 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300197 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300198 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
199 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300200 return -EIO;
201
202 return 0;
203}
204
205static inline void set_ac2_ep_map(struct ath6kl *ar,
206 u8 ac,
207 enum htc_endpoint_id ep)
208{
209 ar->ac2ep_map[ac] = ep;
210 ar->ep2ac_map[ep] = ac;
211}
212
213/* connect to a service */
214static int ath6kl_connectservice(struct ath6kl *ar,
215 struct htc_service_connect_req *con_req,
216 char *desc)
217{
218 int status;
219 struct htc_service_connect_resp response;
220
221 memset(&response, 0, sizeof(response));
222
Kalle Vaload226ec2011-08-10 09:49:12 +0300223 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300224 if (status) {
225 ath6kl_err("failed to connect to %s service status:%d\n",
226 desc, status);
227 return status;
228 }
229
230 switch (con_req->svc_id) {
231 case WMI_CONTROL_SVC:
232 if (test_bit(WMI_ENABLED, &ar->flag))
233 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
234 ar->ctrl_ep = response.endpoint;
235 break;
236 case WMI_DATA_BE_SVC:
237 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
238 break;
239 case WMI_DATA_BK_SVC:
240 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
241 break;
242 case WMI_DATA_VI_SVC:
243 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
244 break;
245 case WMI_DATA_VO_SVC:
246 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
247 break;
248 default:
249 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
250 return -EINVAL;
251 }
252
253 return 0;
254}
255
256static int ath6kl_init_service_ep(struct ath6kl *ar)
257{
258 struct htc_service_connect_req connect;
259
260 memset(&connect, 0, sizeof(connect));
261
262 /* these fields are the same for all service endpoints */
263 connect.ep_cb.rx = ath6kl_rx;
264 connect.ep_cb.rx_refill = ath6kl_rx_refill;
265 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
266
267 /*
268 * Set the max queue depth so that our ath6kl_tx_queue_full handler
269 * gets called.
270 */
271 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
272 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
273 if (!connect.ep_cb.rx_refill_thresh)
274 connect.ep_cb.rx_refill_thresh++;
275
276 /* connect to control service */
277 connect.svc_id = WMI_CONTROL_SVC;
278 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
279 return -EIO;
280
281 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
282
283 /*
284 * Limit the HTC message size on the send path, although e can
285 * receive A-MSDU frames of 4K, we will only send ethernet-sized
286 * (802.3) frames on the send path.
287 */
288 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
289
290 /*
291 * To reduce the amount of committed memory for larger A_MSDU
292 * frames, use the recv-alloc threshold mechanism for larger
293 * packets.
294 */
295 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
296 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
297
298 /*
299 * For the remaining data services set the connection flag to
300 * reduce dribbling, if configured to do so.
301 */
302 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
303 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
304 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
305
306 connect.svc_id = WMI_DATA_BE_SVC;
307
308 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
309 return -EIO;
310
311 /* connect to back-ground map this to WMI LOW_PRI */
312 connect.svc_id = WMI_DATA_BK_SVC;
313 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
314 return -EIO;
315
316 /* connect to Video service, map this to to HI PRI */
317 connect.svc_id = WMI_DATA_VI_SVC;
318 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
319 return -EIO;
320
321 /*
322 * Connect to VO service, this is currently not mapped to a WMI
323 * priority stream due to historical reasons. WMI originally
324 * defined 3 priorities over 3 mailboxes We can change this when
325 * WMI is reworked so that priorities are not dependent on
326 * mailboxes.
327 */
328 connect.svc_id = WMI_DATA_VO_SVC;
329 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
330 return -EIO;
331
332 return 0;
333}
334
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530335void ath6kl_init_control_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300336{
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530337 ath6kl_init_profile_info(vif);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530338 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530339 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530340 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300341}
342
343/*
344 * Set HTC/Mbox operational parameters, this can only be called when the
345 * target is in the BMI phase.
346 */
347static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
348 u8 htc_ctrl_buf)
349{
350 int status;
351 u32 blk_size;
352
353 blk_size = ar->mbox_info.block_size;
354
355 if (htc_ctrl_buf)
356 blk_size |= ((u32)htc_ctrl_buf) << 16;
357
358 /* set the host interest area for the block size */
359 status = ath6kl_bmi_write(ar,
360 ath6kl_get_hi_item_addr(ar,
361 HI_ITEM(hi_mbox_io_block_sz)),
362 (u8 *)&blk_size,
363 4);
364 if (status) {
365 ath6kl_err("bmi_write_memory for IO block size failed\n");
366 goto out;
367 }
368
369 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
370 blk_size,
371 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
372
373 if (mbox_isr_yield_val) {
374 /* set the host interest area for the mbox ISR yield limit */
375 status = ath6kl_bmi_write(ar,
376 ath6kl_get_hi_item_addr(ar,
377 HI_ITEM(hi_mbox_isr_yield_limit)),
378 (u8 *)&mbox_isr_yield_val,
379 4);
380 if (status) {
381 ath6kl_err("bmi_write_memory for yield limit failed\n");
382 goto out;
383 }
384 }
385
386out:
387 return status;
388}
389
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530390static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
Kalle Valobdcd8172011-07-18 00:22:30 +0300391{
392 int status = 0;
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300393 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300394
395 /*
396 * Configure the device for rx dot11 header rules. "0,0" are the
397 * default values. Required if checksum offload is needed. Set
398 * RxMetaVersion to 2.
399 */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530400 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300401 ar->rx_meta_ver, 0, 0)) {
402 ath6kl_err("unable to set the rx frame format\n");
403 status = -EIO;
404 }
405
406 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530407 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
Kalle Valobdcd8172011-07-18 00:22:30 +0300408 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
409 ath6kl_err("unable to set power save fail event policy\n");
410 status = -EIO;
411 }
412
413 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530414 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
Kalle Valobdcd8172011-07-18 00:22:30 +0300415 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
416 ath6kl_err("unable to set barker preamble policy\n");
417 status = -EIO;
418 }
419
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530420 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300421 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
422 ath6kl_err("unable to set keep alive interval\n");
423 status = -EIO;
424 }
425
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530426 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300427 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
428 ath6kl_err("unable to set disconnect timeout\n");
429 status = -EIO;
430 }
431
432 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530433 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300434 ath6kl_err("unable to set txop bursting\n");
435 status = -EIO;
436 }
437
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530438 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530439 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300440 P2P_FLAG_CAPABILITIES_REQ |
441 P2P_FLAG_MACADDR_REQ |
442 P2P_FLAG_HMODEL_REQ);
443 if (ret) {
444 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
445 "capabilities (%d) - assuming P2P not "
446 "supported\n", ret);
447 ar->p2p = 0;
448 }
449 }
450
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530451 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300452 /* Enable Probe Request reporting for P2P */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530453 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300454 if (ret) {
455 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
456 "Request reporting (%d)\n", ret);
457 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300458 }
459
Kalle Valobdcd8172011-07-18 00:22:30 +0300460 return status;
461}
462
463int ath6kl_configure_target(struct ath6kl *ar)
464{
465 u32 param, ram_reserved_size;
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530466 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
Ryan Hsu39586bf2011-12-13 17:11:07 +0800467 int i, status;
Kalle Valobdcd8172011-07-18 00:22:30 +0300468
Vasanthakumar Thiagarajana10e2f22011-12-29 16:05:38 +0530469 param = uart_debug;
470 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
471 HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
472 ath6kl_err("bmi_write_memory for uart debug failed\n");
473 return -EIO;
474 }
475
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530476 /*
477 * Note: Even though the firmware interface type is
478 * chosen as BSS_STA for all three interfaces, can
479 * be configured to IBSS/AP as long as the fw submode
480 * remains normal mode (0 - AP, STA and IBSS). But
481 * due to an target assert in firmware only one interface is
482 * configured for now.
483 */
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530484 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300485
Kalle Valo71f96ee2011-11-14 19:31:30 +0200486 for (i = 0; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530487 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
488
489 /*
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530490 * By default, submodes :
491 * vif[0] - AP/STA/IBSS
492 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
493 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530494 */
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530495
496 for (i = 0; i < ar->max_norm_iface; i++)
497 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
498 (i * HI_OPTION_FW_SUBMODE_BITS);
499
Kalle Valo71f96ee2011-11-14 19:31:30 +0200500 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530501 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
502 (i * HI_OPTION_FW_SUBMODE_BITS);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530503
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530504 if (ar->p2p && ar->vif_max == 1)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530505 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530506
Kalle Valobdcd8172011-07-18 00:22:30 +0300507 param = HTC_PROTOCOL_VERSION;
508 if (ath6kl_bmi_write(ar,
509 ath6kl_get_hi_item_addr(ar,
510 HI_ITEM(hi_app_host_interest)),
511 (u8 *)&param, 4) != 0) {
512 ath6kl_err("bmi_write_memory for htc version failed\n");
513 return -EIO;
514 }
515
516 /* set the firmware mode to STA/IBSS/AP */
517 param = 0;
518
519 if (ath6kl_bmi_read(ar,
520 ath6kl_get_hi_item_addr(ar,
521 HI_ITEM(hi_option_flag)),
522 (u8 *)&param, 4) != 0) {
523 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
524 return -EIO;
525 }
526
Kalle Valo71f96ee2011-11-14 19:31:30 +0200527 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530528 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
529 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
530
Kalle Valobdcd8172011-07-18 00:22:30 +0300531 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
532 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
533
534 if (ath6kl_bmi_write(ar,
535 ath6kl_get_hi_item_addr(ar,
536 HI_ITEM(hi_option_flag)),
537 (u8 *)&param,
538 4) != 0) {
539 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
540 return -EIO;
541 }
542
543 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
544
545 /*
546 * Hardcode the address use for the extended board data
547 * Ideally this should be pre-allocate by the OS at boot time
548 * But since it is a new feature and board data is loaded
549 * at init time, we have to workaround this from host.
550 * It is difficult to patch the firmware boot code,
551 * but possible in theory.
552 */
553
Kalle Valo991b27e2011-09-07 10:55:17 +0300554 param = ar->hw.board_ext_data_addr;
555 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300556
Kalle Valo991b27e2011-09-07 10:55:17 +0300557 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
558 HI_ITEM(hi_board_ext_data)),
559 (u8 *)&param, 4) != 0) {
560 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
561 return -EIO;
562 }
563
564 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
565 HI_ITEM(hi_end_ram_reserve_sz)),
566 (u8 *)&ram_reserved_size, 4) != 0) {
567 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
568 return -EIO;
Kalle Valobdcd8172011-07-18 00:22:30 +0300569 }
570
571 /* set the block size for the target */
572 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
573 /* use default number of control buffers */
574 return -EIO;
575
Ryan Hsu39586bf2011-12-13 17:11:07 +0800576 /* Configure GPIO AR600x UART */
577 param = ar->hw.uarttx_pin;
578 status = ath6kl_bmi_write(ar,
579 ath6kl_get_hi_item_addr(ar,
580 HI_ITEM(hi_dbg_uart_txpin)),
581 (u8 *)&param, 4);
582 if (status)
583 return status;
584
585 /* Configure target refclk_hz */
586 param = ar->hw.refclk_hz;
587 status = ath6kl_bmi_write(ar,
588 ath6kl_get_hi_item_addr(ar,
589 HI_ITEM(hi_refclk_hz)),
590 (u8 *)&param, 4);
591 if (status)
592 return status;
593
Kalle Valobdcd8172011-07-18 00:22:30 +0300594 return 0;
595}
596
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530597void ath6kl_core_free(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300598{
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530599 wiphy_free(ar->wiphy);
Kalle Valobdcd8172011-07-18 00:22:30 +0300600}
601
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530602void ath6kl_core_cleanup(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300603{
Kalle Valob2e75692011-10-27 18:48:14 +0300604 ath6kl_hif_power_off(ar);
605
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530606 destroy_workqueue(ar->ath6kl_wq);
Kalle Valobdcd8172011-07-18 00:22:30 +0300607
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530608 if (ar->htc_target)
609 ath6kl_htc_cleanup(ar->htc_target);
610
611 ath6kl_cookie_cleanup(ar);
612
613 ath6kl_cleanup_amsdu_rxbufs(ar);
614
615 ath6kl_bmi_cleanup(ar);
616
617 ath6kl_debug_cleanup(ar);
618
619 kfree(ar->fw_board);
620 kfree(ar->fw_otp);
621 kfree(ar->fw);
622 kfree(ar->fw_patch);
623
624 ath6kl_deinit_ieee80211_hw(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +0300625}
626
627/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300628static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
629 u8 **fw, size_t *fw_len)
630{
631 const struct firmware *fw_entry;
632 int ret;
633
634 ret = request_firmware(&fw_entry, filename, ar->dev);
635 if (ret)
636 return ret;
637
638 *fw_len = fw_entry->size;
639 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
640
641 if (*fw == NULL)
642 ret = -ENOMEM;
643
644 release_firmware(fw_entry);
645
646 return ret;
647}
648
Sam Leffler92ecbff2011-09-07 10:55:16 +0300649#ifdef CONFIG_OF
Sam Leffler92ecbff2011-09-07 10:55:16 +0300650/*
651 * Check the device tree for a board-id and use it to construct
652 * the pathname to the firmware file. Used (for now) to find a
653 * fallback to the "bdata.bin" file--typically a symlink to the
654 * appropriate board-specific file.
655 */
656static bool check_device_tree(struct ath6kl *ar)
657{
658 static const char *board_id_prop = "atheros,board-id";
659 struct device_node *node;
660 char board_filename[64];
661 const char *board_id;
662 int ret;
663
664 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
665 board_id = of_get_property(node, board_id_prop, NULL);
666 if (board_id == NULL) {
667 ath6kl_warn("No \"%s\" property on %s node.\n",
668 board_id_prop, node->name);
669 continue;
670 }
671 snprintf(board_filename, sizeof(board_filename),
Kalle Valoc0038972011-12-16 20:53:31 +0200672 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
Sam Leffler92ecbff2011-09-07 10:55:16 +0300673
674 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
675 &ar->fw_board_len);
676 if (ret) {
677 ath6kl_err("Failed to get DT board file %s: %d\n",
678 board_filename, ret);
679 continue;
680 }
681 return true;
682 }
683 return false;
684}
685#else
686static bool check_device_tree(struct ath6kl *ar)
687{
688 return false;
689}
690#endif /* CONFIG_OF */
691
Kalle Valobdcd8172011-07-18 00:22:30 +0300692static int ath6kl_fetch_board_file(struct ath6kl *ar)
693{
694 const char *filename;
695 int ret;
696
Kalle Valo772c31e2011-09-07 10:55:16 +0300697 if (ar->fw_board != NULL)
698 return 0;
699
Kalle Valod1a94212011-11-14 19:31:23 +0200700 if (WARN_ON(ar->hw.fw_board == NULL))
701 return -EINVAL;
702
703 filename = ar->hw.fw_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300704
705 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
706 &ar->fw_board_len);
707 if (ret == 0) {
708 /* managed to get proper board file */
709 return 0;
710 }
711
Sam Leffler92ecbff2011-09-07 10:55:16 +0300712 if (check_device_tree(ar)) {
713 /* got board file from device tree */
714 return 0;
715 }
716
Kalle Valobdcd8172011-07-18 00:22:30 +0300717 /* there was no proper board file, try to use default instead */
718 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
719 filename, ret);
720
Kalle Valod1a94212011-11-14 19:31:23 +0200721 filename = ar->hw.fw_default_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300722
723 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
724 &ar->fw_board_len);
725 if (ret) {
726 ath6kl_err("Failed to get default board file %s: %d\n",
727 filename, ret);
728 return ret;
729 }
730
731 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
732 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
733
734 return 0;
735}
736
Kalle Valo772c31e2011-09-07 10:55:16 +0300737static int ath6kl_fetch_otp_file(struct ath6kl *ar)
738{
Kalle Valoc0038972011-12-16 20:53:31 +0200739 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300740 int ret;
741
742 if (ar->fw_otp != NULL)
743 return 0;
744
Kalle Valoc0038972011-12-16 20:53:31 +0200745 if (ar->hw.fw.otp == NULL) {
Kalle Valod1a94212011-11-14 19:31:23 +0200746 ath6kl_dbg(ATH6KL_DBG_BOOT,
747 "no OTP file configured for this hw\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300748 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300749 }
750
Kalle Valoc0038972011-12-16 20:53:31 +0200751 snprintf(filename, sizeof(filename), "%s/%s",
752 ar->hw.fw.dir, ar->hw.fw.otp);
Kalle Valod1a94212011-11-14 19:31:23 +0200753
Kalle Valo772c31e2011-09-07 10:55:16 +0300754 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
755 &ar->fw_otp_len);
756 if (ret) {
757 ath6kl_err("Failed to get OTP file %s: %d\n",
758 filename, ret);
759 return ret;
760 }
761
762 return 0;
763}
764
765static int ath6kl_fetch_fw_file(struct ath6kl *ar)
766{
Kalle Valoc0038972011-12-16 20:53:31 +0200767 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300768 int ret;
769
770 if (ar->fw != NULL)
771 return 0;
772
773 if (testmode) {
Kalle Valoc0038972011-12-16 20:53:31 +0200774 if (ar->hw.fw.tcmd == NULL) {
Kalle Valod1a94212011-11-14 19:31:23 +0200775 ath6kl_warn("testmode not supported\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300776 return -EOPNOTSUPP;
Kalle Valo772c31e2011-09-07 10:55:16 +0300777 }
778
Kalle Valoc0038972011-12-16 20:53:31 +0200779 snprintf(filename, sizeof(filename), "%s/%s",
780 ar->hw.fw.dir, ar->hw.fw.tcmd);
Kalle Valod1a94212011-11-14 19:31:23 +0200781
Kalle Valo772c31e2011-09-07 10:55:16 +0300782 set_bit(TESTMODE, &ar->flag);
783
784 goto get_fw;
785 }
786
Kalle Valoc0038972011-12-16 20:53:31 +0200787 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
788 if (WARN_ON(ar->hw.fw.fw == NULL))
Kalle Valod1a94212011-11-14 19:31:23 +0200789 return -EINVAL;
790
Kalle Valoc0038972011-12-16 20:53:31 +0200791 snprintf(filename, sizeof(filename), "%s/%s",
792 ar->hw.fw.dir, ar->hw.fw.fw);
Kalle Valo772c31e2011-09-07 10:55:16 +0300793
794get_fw:
795 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
796 if (ret) {
797 ath6kl_err("Failed to get firmware file %s: %d\n",
798 filename, ret);
799 return ret;
800 }
801
802 return 0;
803}
804
805static int ath6kl_fetch_patch_file(struct ath6kl *ar)
806{
Kalle Valoc0038972011-12-16 20:53:31 +0200807 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300808 int ret;
809
Kalle Valod1a94212011-11-14 19:31:23 +0200810 if (ar->fw_patch != NULL)
Kalle Valo772c31e2011-09-07 10:55:16 +0300811 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300812
Kalle Valoc0038972011-12-16 20:53:31 +0200813 if (ar->hw.fw.patch == NULL)
Kalle Valod1a94212011-11-14 19:31:23 +0200814 return 0;
815
Kalle Valoc0038972011-12-16 20:53:31 +0200816 snprintf(filename, sizeof(filename), "%s/%s",
817 ar->hw.fw.dir, ar->hw.fw.patch);
Kalle Valod1a94212011-11-14 19:31:23 +0200818
819 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
820 &ar->fw_patch_len);
821 if (ret) {
822 ath6kl_err("Failed to get patch file %s: %d\n",
823 filename, ret);
824 return ret;
Kalle Valo772c31e2011-09-07 10:55:16 +0300825 }
826
827 return 0;
828}
829
Kalle Valo50d41232011-09-07 10:55:17 +0300830static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300831{
832 int ret;
833
Kalle Valo772c31e2011-09-07 10:55:16 +0300834 ret = ath6kl_fetch_otp_file(ar);
835 if (ret)
836 return ret;
837
838 ret = ath6kl_fetch_fw_file(ar);
839 if (ret)
840 return ret;
841
842 ret = ath6kl_fetch_patch_file(ar);
843 if (ret)
844 return ret;
845
846 return 0;
847}
Kalle Valobdcd8172011-07-18 00:22:30 +0300848
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200849static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
Kalle Valo50d41232011-09-07 10:55:17 +0300850{
851 size_t magic_len, len, ie_len;
852 const struct firmware *fw;
853 struct ath6kl_fw_ie *hdr;
Kalle Valoc0038972011-12-16 20:53:31 +0200854 char filename[100];
Kalle Valo50d41232011-09-07 10:55:17 +0300855 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300856 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300857 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300858
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200859 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
Kalle Valo50d41232011-09-07 10:55:17 +0300860
861 ret = request_firmware(&fw, filename, ar->dev);
862 if (ret)
863 return ret;
864
865 data = fw->data;
866 len = fw->size;
867
868 /* magic also includes the null byte, check that as well */
869 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
870
871 if (len < magic_len) {
872 ret = -EINVAL;
873 goto out;
874 }
875
876 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
877 ret = -EINVAL;
878 goto out;
879 }
880
881 len -= magic_len;
882 data += magic_len;
883
884 /* loop elements */
885 while (len > sizeof(struct ath6kl_fw_ie)) {
886 /* hdr is unaligned! */
887 hdr = (struct ath6kl_fw_ie *) data;
888
889 ie_id = le32_to_cpup(&hdr->id);
890 ie_len = le32_to_cpup(&hdr->len);
891
892 len -= sizeof(*hdr);
893 data += sizeof(*hdr);
894
895 if (len < ie_len) {
896 ret = -EINVAL;
897 goto out;
898 }
899
900 switch (ie_id) {
901 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300902 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300903 ie_len);
904
Kalle Valo50d41232011-09-07 10:55:17 +0300905 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
906
907 if (ar->fw_otp == NULL) {
908 ret = -ENOMEM;
909 goto out;
910 }
911
912 ar->fw_otp_len = ie_len;
913 break;
914 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300915 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300916 ie_len);
917
Kalle Valo50d41232011-09-07 10:55:17 +0300918 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
919
920 if (ar->fw == NULL) {
921 ret = -ENOMEM;
922 goto out;
923 }
924
925 ar->fw_len = ie_len;
926 break;
927 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300928 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300929 ie_len);
930
Kalle Valo50d41232011-09-07 10:55:17 +0300931 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
932
933 if (ar->fw_patch == NULL) {
934 ret = -ENOMEM;
935 goto out;
936 }
937
938 ar->fw_patch_len = ie_len;
939 break;
Kalle Valo8a137482011-09-07 10:55:17 +0300940 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
941 val = (__le32 *) data;
942 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300943
944 ath6kl_dbg(ATH6KL_DBG_BOOT,
945 "found reserved ram size ie 0x%d\n",
946 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +0300947 break;
Kalle Valo97e04962011-09-12 13:47:34 +0300948 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo277d90f2011-12-13 14:51:58 +0200949 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
950 break;
951
Kalle Valo6bc36432011-09-27 14:31:11 +0300952 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +0300953 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300954 ie_len);
955
Kalle Valo97e04962011-09-12 13:47:34 +0300956 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
Kalle Valo277d90f2011-12-13 14:51:58 +0200957 index = i / 8;
Kalle Valo97e04962011-09-12 13:47:34 +0300958 bit = i % 8;
959
960 if (data[index] & (1 << bit))
961 __set_bit(i, ar->fw_capabilities);
962 }
Kalle Valo6bc36432011-09-27 14:31:11 +0300963
964 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
965 ar->fw_capabilities,
966 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +0300967 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +0300968 case ATH6KL_FW_IE_PATCH_ADDR:
969 if (ie_len != sizeof(*val))
970 break;
971
972 val = (__le32 *) data;
973 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300974
975 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valo03ef0252011-11-14 19:30:47 +0200976 "found patch address ie 0x%x\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300977 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +0300978 break;
Kalle Valo03ef0252011-11-14 19:30:47 +0200979 case ATH6KL_FW_IE_BOARD_ADDR:
980 if (ie_len != sizeof(*val))
981 break;
982
983 val = (__le32 *) data;
984 ar->hw.board_addr = le32_to_cpup(val);
985
986 ath6kl_dbg(ATH6KL_DBG_BOOT,
987 "found board address ie 0x%x\n",
988 ar->hw.board_addr);
989 break;
Kalle Valo368b1b02011-11-14 19:31:38 +0200990 case ATH6KL_FW_IE_VIF_MAX:
991 if (ie_len != sizeof(*val))
992 break;
993
994 val = (__le32 *) data;
995 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
996 ATH6KL_VIF_MAX);
997
Vasanthakumar Thiagarajanf1433792011-11-18 10:05:27 +0530998 if (ar->vif_max > 1 && !ar->p2p)
999 ar->max_norm_iface = 2;
1000
Kalle Valo368b1b02011-11-14 19:31:38 +02001001 ath6kl_dbg(ATH6KL_DBG_BOOT,
1002 "found vif max ie %d\n", ar->vif_max);
1003 break;
Kalle Valo50d41232011-09-07 10:55:17 +03001004 default:
Kalle Valo6bc36432011-09-27 14:31:11 +03001005 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +03001006 le32_to_cpup(&hdr->id));
1007 break;
1008 }
1009
1010 len -= ie_len;
1011 data += ie_len;
1012 };
1013
1014 ret = 0;
1015out:
1016 release_firmware(fw);
1017
1018 return ret;
1019}
1020
1021static int ath6kl_fetch_firmwares(struct ath6kl *ar)
1022{
1023 int ret;
1024
1025 ret = ath6kl_fetch_board_file(ar);
1026 if (ret)
1027 return ret;
1028
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001029 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
Kalle Valo6bc36432011-09-27 14:31:11 +03001030 if (ret == 0) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001031 ar->fw_api = 3;
1032 goto out;
1033 }
1034
1035 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1036 if (ret == 0) {
1037 ar->fw_api = 2;
1038 goto out;
Kalle Valo6bc36432011-09-27 14:31:11 +03001039 }
Kalle Valo50d41232011-09-07 10:55:17 +03001040
1041 ret = ath6kl_fetch_fw_api1(ar);
1042 if (ret)
1043 return ret;
1044
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001045 ar->fw_api = 1;
1046
1047out:
1048 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo6bc36432011-09-27 14:31:11 +03001049
Kalle Valo50d41232011-09-07 10:55:17 +03001050 return 0;
1051}
1052
Kalle Valobdcd8172011-07-18 00:22:30 +03001053static int ath6kl_upload_board_file(struct ath6kl *ar)
1054{
1055 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +08001056 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +03001057 int ret;
1058
Kalle Valo772c31e2011-09-07 10:55:16 +03001059 if (WARN_ON(ar->fw_board == NULL))
1060 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001061
Kevin Fang31024d92011-07-11 17:14:13 +08001062 /*
1063 * Determine where in Target RAM to write Board Data.
1064 * For AR6004, host determine Target RAM address for
1065 * writing board data.
1066 */
Kalle Valo0d4d72b2011-11-14 19:30:39 +02001067 if (ar->hw.board_addr != 0) {
1068 board_address = ar->hw.board_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001069 ath6kl_bmi_write(ar,
1070 ath6kl_get_hi_item_addr(ar,
1071 HI_ITEM(hi_board_data)),
1072 (u8 *) &board_address, 4);
1073 } else {
1074 ath6kl_bmi_read(ar,
1075 ath6kl_get_hi_item_addr(ar,
1076 HI_ITEM(hi_board_data)),
1077 (u8 *) &board_address, 4);
1078 }
1079
Kalle Valobdcd8172011-07-18 00:22:30 +03001080 /* determine where in target ram to write extended board data */
1081 ath6kl_bmi_read(ar,
1082 ath6kl_get_hi_item_addr(ar,
1083 HI_ITEM(hi_board_ext_data)),
1084 (u8 *) &board_ext_address, 4);
1085
Kalle Valo50e27402011-11-11 12:18:06 +02001086 if (ar->target_type == TARGET_TYPE_AR6003 &&
1087 board_ext_address == 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001088 ath6kl_err("Failed to get board file target address.\n");
1089 return -EINVAL;
1090 }
1091
Kevin Fang31024d92011-07-11 17:14:13 +08001092 switch (ar->target_type) {
1093 case TARGET_TYPE_AR6003:
1094 board_data_size = AR6003_BOARD_DATA_SZ;
1095 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1096 break;
1097 case TARGET_TYPE_AR6004:
1098 board_data_size = AR6004_BOARD_DATA_SZ;
1099 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1100 break;
1101 default:
1102 WARN_ON(1);
1103 return -EINVAL;
1104 break;
1105 }
1106
Kalle Valo50e27402011-11-11 12:18:06 +02001107 if (board_ext_address &&
1108 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
Kevin Fang31024d92011-07-11 17:14:13 +08001109
Kalle Valobdcd8172011-07-18 00:22:30 +03001110 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001111 ath6kl_dbg(ATH6KL_DBG_BOOT,
1112 "writing extended board data to 0x%x (%d B)\n",
1113 board_ext_address, board_ext_data_size);
1114
Kalle Valobdcd8172011-07-18 00:22:30 +03001115 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001116 ar->fw_board + board_data_size,
1117 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001118 if (ret) {
1119 ath6kl_err("Failed to write extended board data: %d\n",
1120 ret);
1121 return ret;
1122 }
1123
1124 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001125 param = (board_ext_data_size << 16) | 1;
1126
Kalle Valobdcd8172011-07-18 00:22:30 +03001127 ath6kl_bmi_write(ar,
1128 ath6kl_get_hi_item_addr(ar,
1129 HI_ITEM(hi_board_ext_data_config)),
1130 (unsigned char *) &param, 4);
1131 }
1132
Kevin Fang31024d92011-07-11 17:14:13 +08001133 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001134 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1135 ret = -EINVAL;
1136 return ret;
1137 }
1138
Kalle Valo6bc36432011-09-27 14:31:11 +03001139 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1140 board_address, board_data_size);
1141
Kalle Valobdcd8172011-07-18 00:22:30 +03001142 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001143 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001144
1145 if (ret) {
1146 ath6kl_err("Board file bmi write failed: %d\n", ret);
1147 return ret;
1148 }
1149
1150 /* record the fact that Board Data IS initialized */
1151 param = 1;
1152 ath6kl_bmi_write(ar,
1153 ath6kl_get_hi_item_addr(ar,
1154 HI_ITEM(hi_board_data_initialized)),
1155 (u8 *)&param, 4);
1156
1157 return ret;
1158}
1159
1160static int ath6kl_upload_otp(struct ath6kl *ar)
1161{
Kalle Valobdcd8172011-07-18 00:22:30 +03001162 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001163 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001164 int ret;
1165
Kalle Valo50e27402011-11-11 12:18:06 +02001166 if (ar->fw_otp == NULL)
1167 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001168
Kalle Valoa01ac412011-09-07 10:55:17 +03001169 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001170
Kalle Valoef548622011-10-01 09:43:09 +03001171 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001172 ar->fw_otp_len);
1173
Kalle Valobdcd8172011-07-18 00:22:30 +03001174 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1175 ar->fw_otp_len);
1176 if (ret) {
1177 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1178 return ret;
1179 }
1180
Kalle Valo639d0b82011-09-12 12:48:09 +03001181 /* read firmware start address */
1182 ret = ath6kl_bmi_read(ar,
1183 ath6kl_get_hi_item_addr(ar,
1184 HI_ITEM(hi_app_start)),
1185 (u8 *) &address, sizeof(address));
1186
1187 if (ret) {
1188 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1189 return ret;
1190 }
1191
Kalle Valobef26a72011-10-12 09:58:28 +03001192 if (ar->hw.app_start_override_addr == 0) {
1193 ar->hw.app_start_override_addr = address;
1194 from_hw = true;
1195 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001196
Kalle Valobef26a72011-10-12 09:58:28 +03001197 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1198 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001199 ar->hw.app_start_override_addr);
1200
Kalle Valobdcd8172011-07-18 00:22:30 +03001201 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001202 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1203 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001204 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001205 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001206
1207 return ret;
1208}
1209
1210static int ath6kl_upload_firmware(struct ath6kl *ar)
1211{
Kalle Valobdcd8172011-07-18 00:22:30 +03001212 u32 address;
1213 int ret;
1214
Kalle Valo772c31e2011-09-07 10:55:16 +03001215 if (WARN_ON(ar->fw == NULL))
Kalle Valo50e27402011-11-11 12:18:06 +02001216 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001217
Kalle Valoa01ac412011-09-07 10:55:17 +03001218 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001219
Kalle Valoef548622011-10-01 09:43:09 +03001220 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001221 address, ar->fw_len);
1222
Kalle Valobdcd8172011-07-18 00:22:30 +03001223 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1224
1225 if (ret) {
1226 ath6kl_err("Failed to write firmware: %d\n", ret);
1227 return ret;
1228 }
1229
Kevin Fang31024d92011-07-11 17:14:13 +08001230 /*
1231 * Set starting address for firmware
1232 * Don't need to setup app_start override addr on AR6004
1233 */
1234 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001235 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001236 ath6kl_bmi_set_app_start(ar, address);
1237 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001238 return ret;
1239}
1240
1241static int ath6kl_upload_patch(struct ath6kl *ar)
1242{
Kalle Valobdcd8172011-07-18 00:22:30 +03001243 u32 address, param;
1244 int ret;
1245
Kalle Valo50e27402011-11-11 12:18:06 +02001246 if (ar->fw_patch == NULL)
1247 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001248
Kalle Valoa01ac412011-09-07 10:55:17 +03001249 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001250
Kalle Valoef548622011-10-01 09:43:09 +03001251 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001252 address, ar->fw_patch_len);
1253
Kalle Valobdcd8172011-07-18 00:22:30 +03001254 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1255 if (ret) {
1256 ath6kl_err("Failed to write patch file: %d\n", ret);
1257 return ret;
1258 }
1259
1260 param = address;
1261 ath6kl_bmi_write(ar,
1262 ath6kl_get_hi_item_addr(ar,
1263 HI_ITEM(hi_dset_list_head)),
1264 (unsigned char *) &param, 4);
1265
1266 return 0;
1267}
1268
1269static int ath6kl_init_upload(struct ath6kl *ar)
1270{
1271 u32 param, options, sleep, address;
1272 int status = 0;
1273
Kevin Fang31024d92011-07-11 17:14:13 +08001274 if (ar->target_type != TARGET_TYPE_AR6003 &&
1275 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001276 return -EINVAL;
1277
1278 /* temporarily disable system sleep */
1279 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1280 status = ath6kl_bmi_reg_read(ar, address, &param);
1281 if (status)
1282 return status;
1283
1284 options = param;
1285
1286 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1287 status = ath6kl_bmi_reg_write(ar, address, param);
1288 if (status)
1289 return status;
1290
1291 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1292 status = ath6kl_bmi_reg_read(ar, address, &param);
1293 if (status)
1294 return status;
1295
1296 sleep = param;
1297
1298 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1299 status = ath6kl_bmi_reg_write(ar, address, param);
1300 if (status)
1301 return status;
1302
1303 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1304 options, sleep);
1305
1306 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001307 /* no need to control 40/44MHz clock on AR6004 */
1308 if (ar->target_type != TARGET_TYPE_AR6004) {
1309 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1310 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001311
Kevin Fang31024d92011-07-11 17:14:13 +08001312 if (status)
1313 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001314
Kevin Fang31024d92011-07-11 17:14:13 +08001315 /* Run at 80/88MHz by default */
1316 param = SM(CPU_CLOCK_STANDARD, 1);
1317
1318 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1319 status = ath6kl_bmi_reg_write(ar, address, param);
1320 if (status)
1321 return status;
1322 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001323
1324 param = 0;
1325 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1326 param = SM(LPO_CAL_ENABLE, 1);
1327 status = ath6kl_bmi_reg_write(ar, address, param);
1328 if (status)
1329 return status;
1330
1331 /* WAR to avoid SDIO CRC err */
Kalle Valo0d0192ba2011-11-14 19:31:07 +02001332 if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001333 ath6kl_err("temporary war to avoid sdio crc error\n");
1334
1335 param = 0x20;
1336
1337 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1338 status = ath6kl_bmi_reg_write(ar, address, param);
1339 if (status)
1340 return status;
1341
1342 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1343 status = ath6kl_bmi_reg_write(ar, address, param);
1344 if (status)
1345 return status;
1346
1347 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1348 status = ath6kl_bmi_reg_write(ar, address, param);
1349 if (status)
1350 return status;
1351
1352 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1353 status = ath6kl_bmi_reg_write(ar, address, param);
1354 if (status)
1355 return status;
1356 }
1357
1358 /* write EEPROM data to Target RAM */
1359 status = ath6kl_upload_board_file(ar);
1360 if (status)
1361 return status;
1362
1363 /* transfer One time Programmable data */
1364 status = ath6kl_upload_otp(ar);
1365 if (status)
1366 return status;
1367
1368 /* Download Target firmware */
1369 status = ath6kl_upload_firmware(ar);
1370 if (status)
1371 return status;
1372
1373 status = ath6kl_upload_patch(ar);
1374 if (status)
1375 return status;
1376
1377 /* Restore system sleep */
1378 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1379 status = ath6kl_bmi_reg_write(ar, address, sleep);
1380 if (status)
1381 return status;
1382
1383 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1384 param = options | 0x20;
1385 status = ath6kl_bmi_reg_write(ar, address, param);
1386 if (status)
1387 return status;
1388
Kalle Valobdcd8172011-07-18 00:22:30 +03001389 return status;
1390}
1391
Kalle Valoa01ac412011-09-07 10:55:17 +03001392static int ath6kl_init_hw_params(struct ath6kl *ar)
1393{
Kalle Valo856f4b312011-11-14 19:30:29 +02001394 const struct ath6kl_hw *hw;
1395 int i;
Kalle Valobef26a72011-10-12 09:58:28 +03001396
Kalle Valo856f4b312011-11-14 19:30:29 +02001397 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1398 hw = &hw_list[i];
Kalle Valobef26a72011-10-12 09:58:28 +03001399
Kalle Valo856f4b312011-11-14 19:30:29 +02001400 if (hw->id == ar->version.target_ver)
1401 break;
1402 }
1403
1404 if (i == ARRAY_SIZE(hw_list)) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001405 ath6kl_err("Unsupported hardware version: 0x%x\n",
1406 ar->version.target_ver);
1407 return -EINVAL;
1408 }
1409
Kalle Valo856f4b312011-11-14 19:30:29 +02001410 ar->hw = *hw;
1411
Kalle Valo6bc36432011-09-27 14:31:11 +03001412 ath6kl_dbg(ATH6KL_DBG_BOOT,
1413 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1414 ar->version.target_ver, ar->target_type,
1415 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1416 ath6kl_dbg(ATH6KL_DBG_BOOT,
1417 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1418 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1419 ar->hw.reserved_ram_size);
Ryan Hsu39586bf2011-12-13 17:11:07 +08001420 ath6kl_dbg(ATH6KL_DBG_BOOT,
1421 "refclk_hz %d uarttx_pin %d",
1422 ar->hw.refclk_hz, ar->hw.uarttx_pin);
Kalle Valo6bc36432011-09-27 14:31:11 +03001423
Kalle Valoa01ac412011-09-07 10:55:17 +03001424 return 0;
1425}
1426
Kalle Valo293badf2011-11-14 19:30:54 +02001427static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1428{
1429 switch (type) {
1430 case ATH6KL_HIF_TYPE_SDIO:
1431 return "sdio";
1432 case ATH6KL_HIF_TYPE_USB:
1433 return "usb";
1434 }
1435
1436 return NULL;
1437}
1438
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001439int ath6kl_init_hw_start(struct ath6kl *ar)
Kalle Valo20459ee2011-10-27 18:48:37 +03001440{
1441 long timeleft;
1442 int ret, i;
1443
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001444 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1445
Kalle Valo20459ee2011-10-27 18:48:37 +03001446 ret = ath6kl_hif_power_on(ar);
1447 if (ret)
1448 return ret;
1449
1450 ret = ath6kl_configure_target(ar);
1451 if (ret)
1452 goto err_power_off;
1453
1454 ret = ath6kl_init_upload(ar);
1455 if (ret)
1456 goto err_power_off;
1457
1458 /* Do we need to finish the BMI phase */
1459 /* FIXME: return error from ath6kl_bmi_done() */
1460 if (ath6kl_bmi_done(ar)) {
1461 ret = -EIO;
1462 goto err_power_off;
1463 }
1464
1465 /*
1466 * The reason we have to wait for the target here is that the
1467 * driver layer has to init BMI in order to set the host block
1468 * size.
1469 */
1470 if (ath6kl_htc_wait_target(ar->htc_target)) {
1471 ret = -EIO;
1472 goto err_power_off;
1473 }
1474
1475 if (ath6kl_init_service_ep(ar)) {
1476 ret = -EIO;
1477 goto err_cleanup_scatter;
1478 }
1479
1480 /* setup credit distribution */
1481 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1482
1483 /* start HTC */
1484 ret = ath6kl_htc_start(ar->htc_target);
1485 if (ret) {
1486 /* FIXME: call this */
1487 ath6kl_cookie_cleanup(ar);
1488 goto err_cleanup_scatter;
1489 }
1490
1491 /* Wait for Wmi event to be ready */
1492 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1493 test_bit(WMI_READY,
1494 &ar->flag),
1495 WMI_TIMEOUT);
1496
1497 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1498
Kalle Valo293badf2011-11-14 19:30:54 +02001499
1500 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001501 ath6kl_info("%s %s fw %s api %d%s\n",
Kalle Valo293badf2011-11-14 19:30:54 +02001502 ar->hw.name,
1503 ath6kl_init_get_hif_name(ar->hif_type),
1504 ar->wiphy->fw_version,
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001505 ar->fw_api,
Kalle Valo293badf2011-11-14 19:30:54 +02001506 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1507 }
1508
Kalle Valo20459ee2011-10-27 18:48:37 +03001509 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1510 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1511 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1512 ret = -EIO;
1513 goto err_htc_stop;
1514 }
1515
1516 if (!timeleft || signal_pending(current)) {
1517 ath6kl_err("wmi is not ready or wait was interrupted\n");
1518 ret = -EIO;
1519 goto err_htc_stop;
1520 }
1521
1522 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1523
1524 /* communicate the wmi protocol verision to the target */
1525 /* FIXME: return error */
1526 if ((ath6kl_set_host_app_area(ar)) != 0)
1527 ath6kl_err("unable to set the host app area\n");
1528
Kalle Valo71f96ee2011-11-14 19:31:30 +02001529 for (i = 0; i < ar->vif_max; i++) {
Kalle Valo20459ee2011-10-27 18:48:37 +03001530 ret = ath6kl_target_config_wlan_params(ar, i);
1531 if (ret)
1532 goto err_htc_stop;
1533 }
1534
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001535 ar->state = ATH6KL_STATE_ON;
1536
Kalle Valo20459ee2011-10-27 18:48:37 +03001537 return 0;
1538
1539err_htc_stop:
1540 ath6kl_htc_stop(ar->htc_target);
1541err_cleanup_scatter:
1542 ath6kl_hif_cleanup_scatter(ar);
1543err_power_off:
1544 ath6kl_hif_power_off(ar);
1545
1546 return ret;
1547}
1548
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001549int ath6kl_init_hw_stop(struct ath6kl *ar)
1550{
1551 int ret;
1552
1553 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1554
1555 ath6kl_htc_stop(ar->htc_target);
1556
1557 ath6kl_hif_stop(ar);
1558
1559 ath6kl_bmi_reset(ar);
1560
1561 ret = ath6kl_hif_power_off(ar);
1562 if (ret)
1563 ath6kl_warn("failed to power off hif: %d\n", ret);
1564
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001565 ar->state = ATH6KL_STATE_OFF;
1566
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001567 return 0;
1568}
1569
Kalle Valobdcd8172011-07-18 00:22:30 +03001570int ath6kl_core_init(struct ath6kl *ar)
1571{
Kalle Valobdcd8172011-07-18 00:22:30 +03001572 struct ath6kl_bmi_target_info targ_info;
Kalle Valo61448a92011-10-27 18:48:29 +03001573 struct net_device *ndev;
Kalle Valo20459ee2011-10-27 18:48:37 +03001574 int ret = 0, i;
Kalle Valobdcd8172011-07-18 00:22:30 +03001575
1576 ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1577 if (!ar->ath6kl_wq)
1578 return -ENOMEM;
1579
1580 ret = ath6kl_bmi_init(ar);
1581 if (ret)
1582 goto err_wq;
1583
Kalle Valo20459ee2011-10-27 18:48:37 +03001584 /*
1585 * Turn on power to get hardware (target) version and leave power
1586 * on delibrately as we will boot the hardware anyway within few
1587 * seconds.
1588 */
Kalle Valob2e75692011-10-27 18:48:14 +03001589 ret = ath6kl_hif_power_on(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001590 if (ret)
1591 goto err_bmi_cleanup;
1592
Kalle Valob2e75692011-10-27 18:48:14 +03001593 ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1594 if (ret)
1595 goto err_power_off;
1596
Kalle Valobdcd8172011-07-18 00:22:30 +03001597 ar->version.target_ver = le32_to_cpu(targ_info.version);
1598 ar->target_type = le32_to_cpu(targ_info.type);
Vasanthakumar Thiagarajanbe98e3a2011-10-25 19:33:57 +05301599 ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
Kalle Valobdcd8172011-07-18 00:22:30 +03001600
Kalle Valoa01ac412011-09-07 10:55:17 +03001601 ret = ath6kl_init_hw_params(ar);
1602 if (ret)
Kalle Valob2e75692011-10-27 18:48:14 +03001603 goto err_power_off;
Kalle Valoa01ac412011-09-07 10:55:17 +03001604
Kalle Vaload226ec2011-08-10 09:49:12 +03001605 ar->htc_target = ath6kl_htc_create(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001606
1607 if (!ar->htc_target) {
1608 ret = -ENOMEM;
Kalle Valob2e75692011-10-27 18:48:14 +03001609 goto err_power_off;
Kalle Valobdcd8172011-07-18 00:22:30 +03001610 }
1611
Kalle Valo772c31e2011-09-07 10:55:16 +03001612 ret = ath6kl_fetch_firmwares(ar);
1613 if (ret)
1614 goto err_htc_cleanup;
1615
Kalle Valo61448a92011-10-27 18:48:29 +03001616 /* FIXME: we should free all firmwares in the error cases below */
1617
Kalle Valo61448a92011-10-27 18:48:29 +03001618 /* Indicate that WMI is enabled (although not ready yet) */
1619 set_bit(WMI_ENABLED, &ar->flag);
1620 ar->wmi = ath6kl_wmi_init(ar);
1621 if (!ar->wmi) {
1622 ath6kl_err("failed to initialize wmi\n");
1623 ret = -EIO;
1624 goto err_htc_cleanup;
1625 }
1626
1627 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
1628
1629 ret = ath6kl_register_ieee80211_hw(ar);
1630 if (ret)
1631 goto err_node_cleanup;
1632
1633 ret = ath6kl_debug_init(ar);
1634 if (ret) {
1635 wiphy_unregister(ar->wiphy);
1636 goto err_node_cleanup;
1637 }
1638
Kalle Valo71f96ee2011-11-14 19:31:30 +02001639 for (i = 0; i < ar->vif_max; i++)
Kalle Valo61448a92011-10-27 18:48:29 +03001640 ar->avail_idx_map |= BIT(i);
1641
1642 rtnl_lock();
1643
1644 /* Add an initial station interface */
1645 ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
1646 INFRA_NETWORK);
1647
1648 rtnl_unlock();
1649
1650 if (!ndev) {
1651 ath6kl_err("Failed to instantiate a network device\n");
1652 ret = -ENOMEM;
1653 wiphy_unregister(ar->wiphy);
1654 goto err_debug_init;
1655 }
1656
1657
1658 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
1659 __func__, ndev->name, ndev, ar);
1660
Kalle Valo61448a92011-10-27 18:48:29 +03001661 /* setup access class priority mappings */
1662 ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
1663 ar->ac_stream_pri_map[WMM_AC_BE] = 1;
1664 ar->ac_stream_pri_map[WMM_AC_VI] = 2;
1665 ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
1666
1667 /* give our connected endpoints some buffers */
1668 ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
1669 ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
1670
1671 /* allocate some buffers that handle larger AMSDU frames */
1672 ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
1673
Kalle Valo61448a92011-10-27 18:48:29 +03001674 ath6kl_cookie_init(ar);
1675
Kalle Valo61448a92011-10-27 18:48:29 +03001676 ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
1677 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
1678
Kalle Valo8277de12011-11-03 12:18:31 +02001679 if (suspend_cutpower)
1680 ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
1681
Kalle Valo61448a92011-10-27 18:48:29 +03001682 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
Arik Nemtsovfb943332011-11-08 19:14:08 +02001683 WIPHY_FLAG_HAVE_AP_SME |
Kalle Valo7e95e3652011-12-16 21:10:39 +02001684 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
Arik Nemtsovfb943332011-11-08 19:14:08 +02001685 WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
1686
Kalle Valo10509f92011-12-13 14:52:07 +02001687 if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities))
1688 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;
1689
Arik Nemtsovfb943332011-11-08 19:14:08 +02001690 ar->wiphy->probe_resp_offload =
1691 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |
1692 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |
1693 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |
1694 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;
Kalle Valo61448a92011-10-27 18:48:29 +03001695
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001696 set_bit(FIRST_BOOT, &ar->flag);
1697
Rishi Panjwanibc48ad32011-12-27 14:28:00 -08001698 ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM;
1699
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001700 ret = ath6kl_init_hw_start(ar);
Kalle Valo20459ee2011-10-27 18:48:37 +03001701 if (ret) {
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001702 ath6kl_err("Failed to start hardware: %d\n", ret);
Kalle Valo20459ee2011-10-27 18:48:37 +03001703 goto err_rxbuf_cleanup;
Kalle Valo61448a92011-10-27 18:48:29 +03001704 }
1705
1706 /*
1707 * Set mac address which is received in ready event
1708 * FIXME: Move to ath6kl_interface_add()
1709 */
1710 memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
Kalle Valobdcd8172011-07-18 00:22:30 +03001711
Kalle Valobdcd8172011-07-18 00:22:30 +03001712 return ret;
1713
Kalle Valo61448a92011-10-27 18:48:29 +03001714err_rxbuf_cleanup:
1715 ath6kl_htc_flush_rx_buf(ar->htc_target);
1716 ath6kl_cleanup_amsdu_rxbufs(ar);
Kalle Valo61448a92011-10-27 18:48:29 +03001717 rtnl_lock();
1718 ath6kl_deinit_if_data(netdev_priv(ndev));
1719 rtnl_unlock();
1720 wiphy_unregister(ar->wiphy);
1721err_debug_init:
1722 ath6kl_debug_cleanup(ar);
1723err_node_cleanup:
1724 ath6kl_wmi_shutdown(ar->wmi);
1725 clear_bit(WMI_ENABLED, &ar->flag);
1726 ar->wmi = NULL;
Kalle Valobdcd8172011-07-18 00:22:30 +03001727err_htc_cleanup:
Kalle Vaload226ec2011-08-10 09:49:12 +03001728 ath6kl_htc_cleanup(ar->htc_target);
Kalle Valob2e75692011-10-27 18:48:14 +03001729err_power_off:
1730 ath6kl_hif_power_off(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001731err_bmi_cleanup:
1732 ath6kl_bmi_cleanup(ar);
1733err_wq:
1734 destroy_workqueue(ar->ath6kl_wq);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301735
Kalle Valobdcd8172011-07-18 00:22:30 +03001736 return ret;
1737}
1738
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301739void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301740{
1741 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1742 bool discon_issued;
1743
1744 netif_stop_queue(vif->ndev);
1745
1746 clear_bit(WLAN_ENABLED, &vif->flags);
1747
1748 if (wmi_ready) {
1749 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1750 test_bit(CONNECT_PEND, &vif->flags);
1751 ath6kl_disconnect(vif);
1752 del_timer(&vif->disconnect_timer);
1753
1754 if (discon_issued)
1755 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1756 (vif->nw_type & AP_NETWORK) ?
1757 bcast_mac : vif->bssid,
1758 0, NULL, 0);
1759 }
1760
1761 if (vif->scan_req) {
1762 cfg80211_scan_done(vif->scan_req, true);
1763 vif->scan_req = NULL;
1764 }
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301765}
1766
Kalle Valobdcd8172011-07-18 00:22:30 +03001767void ath6kl_stop_txrx(struct ath6kl *ar)
1768{
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301769 struct ath6kl_vif *vif, *tmp_vif;
Kalle Valobdcd8172011-07-18 00:22:30 +03001770
1771 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1772
1773 if (down_interruptible(&ar->sem)) {
1774 ath6kl_err("down_interruptible failed\n");
1775 return;
1776 }
1777
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301778 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301779 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1780 list_del(&vif->list);
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301781 spin_unlock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301782 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301783 rtnl_lock();
1784 ath6kl_deinit_if_data(vif);
1785 rtnl_unlock();
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301786 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301787 }
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301788 spin_unlock_bh(&ar->list_lock);
Kalle Valobdcd8172011-07-18 00:22:30 +03001789
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301790 clear_bit(WMI_READY, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001791
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301792 /*
1793 * After wmi_shudown all WMI events will be dropped. We
1794 * need to cleanup the buffers allocated in AP mode and
1795 * give disconnect notification to stack, which usually
1796 * happens in the disconnect_event. Simulate the disconnect
1797 * event by calling the function directly. Sometimes
1798 * disconnect_event will be received when the debug logs
1799 * are collected.
1800 */
1801 ath6kl_wmi_shutdown(ar->wmi);
Kalle Valobdcd8172011-07-18 00:22:30 +03001802
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301803 clear_bit(WMI_ENABLED, &ar->flag);
1804 if (ar->htc_target) {
1805 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1806 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001807 }
1808
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301809 /*
1810 * Try to reset the device if we can. The driver may have been
1811 * configure NOT to reset the target during a debug session.
1812 */
1813 ath6kl_dbg(ATH6KL_DBG_TRC,
1814 "attempting to reset target on instance destroy\n");
1815 ath6kl_reset_device(ar, ar->target_type, true, true);
Kalle Valobdcd8172011-07-18 00:22:30 +03001816
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301817 clear_bit(WLAN_ENABLED, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001818}