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Ben Dooks431107e2010-01-26 10:11:04 +09001/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
Ben Dooks5718df92008-10-21 14:07:09 +01002 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090020#include <linux/input.h>
Ben Dooks5718df92008-10-21 14:07:09 +010021#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <linux/io.h>
Ben Dooks096941e2008-10-31 16:14:59 +000024#include <linux/i2c.h>
Mark Browna7a81d02010-02-17 18:19:31 +000025#include <linux/leds.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000026#include <linux/fb.h>
27#include <linux/gpio.h>
28#include <linux/delay.h>
Mark Brown3056ea02009-01-27 16:18:01 +000029#include <linux/smsc911x.h>
Mark Brown42015c12009-11-03 14:42:06 +000030#include <linux/regulator/fixed.h>
Mark Brown628e7eb2011-03-04 07:59:20 +090031#include <linux/regulator/machine.h>
Banajit Goswami075d1082011-02-28 17:42:35 +053032#include <linux/pwm_backlight.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000033
Mark Brownecc558a2009-02-17 15:59:38 +000034#ifdef CONFIG_SMDK6410_WM1190_EV1
35#include <linux/mfd/wm8350/core.h>
36#include <linux/mfd/wm8350/pmic.h>
37#endif
Ben Dooks438a5d42008-11-19 15:41:34 +000038
Mark Brown60f91012010-02-17 18:19:29 +000039#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +000040#include <linux/mfd/wm831x/core.h>
Mark Brown60f91012010-02-17 18:19:29 +000041#include <linux/mfd/wm831x/pdata.h>
42#endif
43
Ben Dooks438a5d42008-11-19 15:41:34 +000044#include <video/platform_lcd.h>
Ben Dooks5718df92008-10-21 14:07:09 +010045
46#include <asm/mach/arch.h>
47#include <asm/mach/map.h>
48#include <asm/mach/irq.h>
49
50#include <mach/hardware.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000051#include <mach/regs-fb.h>
Ben Dooks5718df92008-10-21 14:07:09 +010052#include <mach/map.h>
53
54#include <asm/irq.h>
55#include <asm/mach-types.h>
56
57#include <plat/regs-serial.h>
Ben Dooks3501c9a2010-01-26 10:45:40 +090058#include <mach/regs-modem.h>
59#include <mach/regs-gpio.h>
60#include <mach/regs-sys.h>
61#include <mach/regs-srom.h>
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +090062#include <plat/ata.h>
Ben Dooksd85fa242008-10-31 16:14:52 +000063#include <plat/iic.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000064#include <plat/fb.h>
Mark Brown3056ea02009-01-27 16:18:01 +000065#include <plat/gpio-cfg.h>
Ben Dooks5718df92008-10-21 14:07:09 +010066
Ben Dooksf7be9ab2010-01-26 13:41:30 +090067#include <mach/s3c6410.h>
Ben Dooks5718df92008-10-21 14:07:09 +010068#include <plat/clock.h>
69#include <plat/devs.h>
70#include <plat/cpu.h>
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +090071#include <plat/adc.h>
72#include <plat/ts.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090073#include <plat/keypad.h>
Ben Dooks5718df92008-10-21 14:07:09 +010074
75#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
76#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
77#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
78
79static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
80 [0] = {
81 .hwport = 0,
82 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080083 .ucon = UCON,
84 .ulcon = ULCON,
85 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +010086 },
87 [1] = {
88 .hwport = 1,
89 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080090 .ucon = UCON,
91 .ulcon = ULCON,
92 .ufcon = UFCON,
93 },
94 [2] = {
95 .hwport = 2,
96 .flags = 0,
97 .ucon = UCON,
98 .ulcon = ULCON,
99 .ufcon = UFCON,
100 },
101 [3] = {
102 .hwport = 3,
103 .flags = 0,
104 .ucon = UCON,
105 .ulcon = ULCON,
106 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +0100107 },
108};
109
Ben Dooks438a5d42008-11-19 15:41:34 +0000110/* framebuffer and LCD setup. */
111
112/* GPF15 = LCD backlight control
113 * GPF13 => Panel power
114 * GPN5 = LCD nRESET signal
115 * PWM_TOUT1 => backlight brightness
116 */
117
118static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
119 unsigned int power)
120{
121 if (power) {
122 gpio_direction_output(S3C64XX_GPF(13), 1);
Ben Dooks438a5d42008-11-19 15:41:34 +0000123
124 /* fire nRESET on power up */
125 gpio_direction_output(S3C64XX_GPN(5), 0);
126 msleep(10);
127 gpio_direction_output(S3C64XX_GPN(5), 1);
128 msleep(1);
129 } else {
Ben Dooks438a5d42008-11-19 15:41:34 +0000130 gpio_direction_output(S3C64XX_GPF(13), 0);
131 }
132}
133
134static struct plat_lcd_data smdk6410_lcd_power_data = {
135 .set_power = smdk6410_lcd_power_set,
136};
137
138static struct platform_device smdk6410_lcd_powerdev = {
139 .name = "platform-lcd",
140 .dev.parent = &s3c_device_fb.dev,
141 .dev.platform_data = &smdk6410_lcd_power_data,
142};
143
144static struct s3c_fb_pd_win smdk6410_fb_win0 = {
145 /* this is to ensure we use win0 */
146 .win_mode = {
Ben Dooks438a5d42008-11-19 15:41:34 +0000147 .left_margin = 8,
148 .right_margin = 13,
149 .upper_margin = 7,
150 .lower_margin = 5,
151 .hsync_len = 3,
152 .vsync_len = 1,
153 .xres = 800,
154 .yres = 480,
155 },
156 .max_bpp = 32,
157 .default_bpp = 16,
Ben Dooks001ca742010-07-26 10:56:40 +0100158 .virtual_y = 480 * 2,
159 .virtual_x = 800,
Ben Dooks438a5d42008-11-19 15:41:34 +0000160};
161
162/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
163static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
164 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
165 .win[0] = &smdk6410_fb_win0,
166 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
167 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
168};
169
Andy Greena4e94692009-12-29 14:40:43 +0000170/*
171 * Configuring Ethernet on SMDK6410
172 *
173 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
174 * The constant address below corresponds to nCS1
175 *
176 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
177 * 2) CFG6 needs to be switched to "LAN9115" side
178 */
179
Mark Brown3056ea02009-01-27 16:18:01 +0000180static struct resource smdk6410_smsc911x_resources[] = {
181 [0] = {
Andy Greenf01fdac2009-12-29 14:40:36 +0000182 .start = S3C64XX_PA_XM0CSN1,
183 .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
Mark Brown3056ea02009-01-27 16:18:01 +0000184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = S3C_EINT(10),
188 .end = S3C_EINT(10),
189 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
190 },
191};
192
193static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
194 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
195 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
196 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
197 .phy_interface = PHY_INTERFACE_MODE_MII,
198};
199
200
201static struct platform_device smdk6410_smsc911x = {
202 .name = "smsc911x",
203 .id = -1,
204 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
205 .resource = &smdk6410_smsc911x_resources[0],
206 .dev = {
207 .platform_data = &smdk6410_smsc911x_pdata,
208 },
209};
210
Mark Brown42015c12009-11-03 14:42:06 +0000211#ifdef CONFIG_REGULATOR
Mark Brownb5930b82011-05-24 08:27:59 +0800212static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
213 REGULATOR_SUPPLY("PVDD", "0-001b"),
214 REGULATOR_SUPPLY("AVDD", "0-001b"),
Mark Brown42015c12009-11-03 14:42:06 +0000215};
216
217static struct regulator_init_data smdk6410_b_pwr_5v_data = {
218 .constraints = {
219 .always_on = 1,
220 },
221 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
222 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
223};
224
225static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
226 .supply_name = "B_PWR_5V",
227 .microvolts = 5000000,
228 .init_data = &smdk6410_b_pwr_5v_data,
Mark Brownd3cf4482010-01-13 13:57:04 +0000229 .gpio = -EINVAL,
Mark Brown42015c12009-11-03 14:42:06 +0000230};
231
232static struct platform_device smdk6410_b_pwr_5v = {
233 .name = "reg-fixed-voltage",
234 .id = -1,
235 .dev = {
236 .platform_data = &smdk6410_b_pwr_5v_pdata,
237 },
238};
239#endif
240
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900241static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
242 .setup_gpio = s3c64xx_ide_setup_gpio,
243};
244
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900245static uint32_t smdk6410_keymap[] __initdata = {
246 /* KEY(row, col, keycode) */
247 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
248 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
249 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
250 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
251};
252
253static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
254 .keymap = smdk6410_keymap,
255 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
256};
257
258static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
259 .keymap_data = &smdk6410_keymap_data,
260 .rows = 2,
261 .cols = 8,
262};
263
Banajit Goswami075d1082011-02-28 17:42:35 +0530264static int smdk6410_backlight_init(struct device *dev)
265{
266 int ret;
267
268 ret = gpio_request(S3C64XX_GPF(15), "Backlight");
269 if (ret) {
270 printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
271 return ret;
272 }
273
274 /* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */
275 s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2));
276
277 return 0;
278}
279
280static void smdk6410_backlight_exit(struct device *dev)
281{
282 s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT);
283 gpio_free(S3C64XX_GPF(15));
284}
285
286static struct platform_pwm_backlight_data smdk6410_backlight_data = {
287 .pwm_id = 1,
288 .max_brightness = 255,
289 .dft_brightness = 255,
290 .pwm_period_ns = 78770,
291 .init = smdk6410_backlight_init,
292 .exit = smdk6410_backlight_exit,
293};
294
295static struct platform_device smdk6410_backlight_device = {
296 .name = "pwm-backlight",
297 .dev = {
298 .parent = &s3c_device_timer[1].dev,
299 .platform_data = &smdk6410_backlight_data,
300 },
301};
302
Mark Brown027191a2009-01-23 16:29:43 +0000303static struct map_desc smdk6410_iodesc[] = {};
Ben Dooks5718df92008-10-21 14:07:09 +0100304
305static struct platform_device *smdk6410_devices[] __initdata = {
Ben Dooksb24636c2008-11-03 20:14:53 +0000306#ifdef CONFIG_SMDK6410_SD_CH0
Ben Dooks39057f22008-10-31 16:14:29 +0000307 &s3c_device_hsmmc0,
Ben Dooksb24636c2008-11-03 20:14:53 +0000308#endif
309#ifdef CONFIG_SMDK6410_SD_CH1
310 &s3c_device_hsmmc1,
311#endif
Ben Dooksd85fa242008-10-31 16:14:52 +0000312 &s3c_device_i2c0,
Ben Dooksd7ea3742008-10-31 16:14:57 +0000313 &s3c_device_i2c1,
Ben Dooks438a5d42008-11-19 15:41:34 +0000314 &s3c_device_fb,
Ben Dooksb8132482009-11-23 00:13:39 +0000315 &s3c_device_ohci,
Ben Dooks06fa1d32009-05-16 22:11:20 +0100316 &s3c_device_usb_hsotg,
Jassi Brar83e37b82010-11-22 15:35:53 +0900317 &samsung_asoc_dma,
Mark Brown1f100862010-02-17 19:03:20 +0000318 &s3c64xx_device_iisv4,
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900319 &samsung_device_keypad,
Mark Brown42015c12009-11-03 14:42:06 +0000320
321#ifdef CONFIG_REGULATOR
322 &smdk6410_b_pwr_5v,
323#endif
Ben Dooks438a5d42008-11-19 15:41:34 +0000324 &smdk6410_lcd_powerdev,
Mark Brown3056ea02009-01-27 16:18:01 +0000325
326 &smdk6410_smsc911x,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900327 &s3c_device_adc,
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900328 &s3c_device_cfcon,
Atul Dahiya9bbf4a62010-07-20 16:31:32 +0530329 &s3c_device_rtc,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900330 &s3c_device_ts,
Banajit Goswamib351c4a2010-05-20 16:21:30 +0900331 &s3c_device_wdt,
Banajit Goswami075d1082011-02-28 17:42:35 +0530332 &s3c_device_timer[1],
333 &smdk6410_backlight_device,
Ben Dooks5718df92008-10-21 14:07:09 +0100334};
335
Mark Brown60f91012010-02-17 18:19:29 +0000336#ifdef CONFIG_REGULATOR
337/* ARM core */
338static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
Mark Brownb5930b82011-05-24 08:27:59 +0800339 REGULATOR_SUPPLY("vddarm", NULL),
Mark Brown60f91012010-02-17 18:19:29 +0000340};
341
342/* VDDARM, BUCK1 on J5 */
343static struct regulator_init_data smdk6410_vddarm = {
344 .constraints = {
345 .name = "PVDD_ARM",
346 .min_uV = 1000000,
347 .max_uV = 1300000,
348 .always_on = 1,
349 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
350 },
351 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
352 .consumer_supplies = smdk6410_vddarm_consumers,
353};
354
355/* VDD_INT, BUCK2 on J5 */
356static struct regulator_init_data smdk6410_vddint = {
357 .constraints = {
358 .name = "PVDD_INT",
359 .min_uV = 1000000,
360 .max_uV = 1200000,
361 .always_on = 1,
362 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
363 },
364};
365
366/* VDD_HI, LDO3 on J5 */
367static struct regulator_init_data smdk6410_vddhi = {
368 .constraints = {
369 .name = "PVDD_HI",
370 .always_on = 1,
371 },
372};
373
374/* VDD_PLL, LDO2 on J5 */
375static struct regulator_init_data smdk6410_vddpll = {
376 .constraints = {
377 .name = "PVDD_PLL",
378 .always_on = 1,
379 },
380};
381
382/* VDD_UH_MMC, LDO5 on J5 */
383static struct regulator_init_data smdk6410_vdduh_mmc = {
384 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900385 .name = "PVDD_UH+PVDD_MMC",
Mark Brown60f91012010-02-17 18:19:29 +0000386 .always_on = 1,
387 },
388};
389
390/* VCCM3BT, LDO8 on J5 */
391static struct regulator_init_data smdk6410_vccmc3bt = {
392 .constraints = {
393 .name = "PVCCM3BT",
394 .always_on = 1,
395 },
396};
397
398/* VCCM2MTV, LDO11 on J5 */
399static struct regulator_init_data smdk6410_vccm2mtv = {
400 .constraints = {
401 .name = "PVCCM2MTV",
402 .always_on = 1,
403 },
404};
405
406/* VDD_LCD, LDO12 on J5 */
407static struct regulator_init_data smdk6410_vddlcd = {
408 .constraints = {
409 .name = "PVDD_LCD",
410 .always_on = 1,
411 },
412};
413
414/* VDD_OTGI, LDO9 on J5 */
415static struct regulator_init_data smdk6410_vddotgi = {
416 .constraints = {
417 .name = "PVDD_OTGI",
418 .always_on = 1,
419 },
420};
421
422/* VDD_OTG, LDO14 on J5 */
423static struct regulator_init_data smdk6410_vddotg = {
424 .constraints = {
425 .name = "PVDD_OTG",
426 .always_on = 1,
427 },
428};
429
430/* VDD_ALIVE, LDO15 on J5 */
431static struct regulator_init_data smdk6410_vddalive = {
432 .constraints = {
433 .name = "PVDD_ALIVE",
434 .always_on = 1,
435 },
436};
437
438/* VDD_AUDIO, VLDO_AUDIO on J5 */
439static struct regulator_init_data smdk6410_vddaudio = {
440 .constraints = {
441 .name = "PVDD_AUDIO",
442 .always_on = 1,
443 },
444};
445#endif
446
Mark Brownecc558a2009-02-17 15:59:38 +0000447#ifdef CONFIG_SMDK6410_WM1190_EV1
448/* S3C64xx internal logic & PLL */
449static struct regulator_init_data wm8350_dcdc1_data = {
450 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900451 .name = "PVDD_INT+PVDD_PLL",
Mark Brownecc558a2009-02-17 15:59:38 +0000452 .min_uV = 1200000,
453 .max_uV = 1200000,
454 .always_on = 1,
455 .apply_uV = 1,
456 },
457};
458
459/* Memory */
460static struct regulator_init_data wm8350_dcdc3_data = {
461 .constraints = {
462 .name = "PVDD_MEM",
463 .min_uV = 1800000,
464 .max_uV = 1800000,
465 .always_on = 1,
466 .state_mem = {
467 .uV = 1800000,
468 .mode = REGULATOR_MODE_NORMAL,
469 .enabled = 1,
Mark Brown60f91012010-02-17 18:19:29 +0000470 },
Mark Brownecc558a2009-02-17 15:59:38 +0000471 .initial_state = PM_SUSPEND_MEM,
472 },
473};
474
475/* USB, EXT, PCM, ADC/DAC, USB, MMC */
Mark Brown42015c12009-11-03 14:42:06 +0000476static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
Mark Brownb5930b82011-05-24 08:27:59 +0800477 REGULATOR_SUPPLY("DVDD", "0-001b"),
Mark Brown42015c12009-11-03 14:42:06 +0000478};
479
Mark Brownecc558a2009-02-17 15:59:38 +0000480static struct regulator_init_data wm8350_dcdc4_data = {
481 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900482 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
Mark Brownecc558a2009-02-17 15:59:38 +0000483 .min_uV = 3000000,
484 .max_uV = 3000000,
485 .always_on = 1,
486 },
Mark Brown42015c12009-11-03 14:42:06 +0000487 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
488 .consumer_supplies = wm8350_dcdc4_consumers,
Mark Brownecc558a2009-02-17 15:59:38 +0000489};
490
Mark Brownecc558a2009-02-17 15:59:38 +0000491/* OTGi/1190-EV1 HPVDD & AVDD */
492static struct regulator_init_data wm8350_ldo4_data = {
493 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900494 .name = "PVDD_OTGI+HPVDD+AVDD",
Mark Brownecc558a2009-02-17 15:59:38 +0000495 .min_uV = 1200000,
496 .max_uV = 1200000,
497 .apply_uV = 1,
Mark Brownf53aee22009-04-09 16:30:40 +0100498 .always_on = 1,
Mark Brownecc558a2009-02-17 15:59:38 +0000499 },
500};
501
502static struct {
503 int regulator;
504 struct regulator_init_data *initdata;
505} wm1190_regulators[] = {
506 { WM8350_DCDC_1, &wm8350_dcdc1_data },
507 { WM8350_DCDC_3, &wm8350_dcdc3_data },
508 { WM8350_DCDC_4, &wm8350_dcdc4_data },
Mark Brown60f91012010-02-17 18:19:29 +0000509 { WM8350_DCDC_6, &smdk6410_vddarm },
510 { WM8350_LDO_1, &smdk6410_vddalive },
511 { WM8350_LDO_2, &smdk6410_vddotg },
512 { WM8350_LDO_3, &smdk6410_vddlcd },
Mark Brownecc558a2009-02-17 15:59:38 +0000513 { WM8350_LDO_4, &wm8350_ldo4_data },
514};
515
516static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
517{
518 int i;
519
Mark Browna3323b72009-11-03 14:42:04 +0000520 /* Configure the IRQ line */
521 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
522
Mark Brownecc558a2009-02-17 15:59:38 +0000523 /* Instantiate the regulators */
524 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
525 wm8350_register_regulator(wm8350,
526 wm1190_regulators[i].regulator,
527 wm1190_regulators[i].initdata);
528
529 return 0;
530}
531
532static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
533 .init = smdk6410_wm8350_init,
Mark Browndb9256f2009-04-09 19:00:19 +0100534 .irq_high = 1,
Mark Brown9fca8782010-01-19 15:26:56 +0000535 .irq_base = IRQ_BOARD_START,
Mark Brownecc558a2009-02-17 15:59:38 +0000536};
537#endif
538
Mark Brown60f91012010-02-17 18:19:29 +0000539#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +0000540static struct gpio_led wm1192_pmic_leds[] = {
541 {
542 .name = "PMIC:red:power",
543 .gpio = GPIO_BOARD_START + 3,
544 .default_state = LEDS_GPIO_DEFSTATE_ON,
545 },
546};
547
548static struct gpio_led_platform_data wm1192_pmic_led = {
549 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
550 .leds = wm1192_pmic_leds,
551};
552
553static struct platform_device wm1192_pmic_led_dev = {
554 .name = "leds-gpio",
555 .id = -1,
556 .dev = {
557 .platform_data = &wm1192_pmic_led,
558 },
559};
560
Mark Brown60f91012010-02-17 18:19:29 +0000561static int wm1192_pre_init(struct wm831x *wm831x)
562{
Mark Browna7a81d02010-02-17 18:19:31 +0000563 int ret;
564
Mark Brown60f91012010-02-17 18:19:29 +0000565 /* Configure the IRQ line */
566 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
567
Mark Browna7a81d02010-02-17 18:19:31 +0000568 ret = platform_device_register(&wm1192_pmic_led_dev);
569 if (ret != 0)
570 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
571
Mark Brown60f91012010-02-17 18:19:29 +0000572 return 0;
573}
574
575static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
576 .isink = 1,
577 .max_uA = 27554,
578};
579
580static struct regulator_init_data wm1192_dcdc3 = {
581 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900582 .name = "PVDD_MEM+PVDD_GPS",
Mark Brown60f91012010-02-17 18:19:29 +0000583 .always_on = 1,
584 },
585};
586
587static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
Mark Brownb5930b82011-05-24 08:27:59 +0800588 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
Mark Brown60f91012010-02-17 18:19:29 +0000589};
590
591static struct regulator_init_data wm1192_ldo1 = {
592 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900593 .name = "PVDD_LCD+PVDD_EXT",
Mark Brown60f91012010-02-17 18:19:29 +0000594 .always_on = 1,
595 },
596 .consumer_supplies = wm1192_ldo1_consumers,
597 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
598};
599
600static struct wm831x_status_pdata wm1192_led7_pdata = {
601 .name = "LED7:green:",
602};
603
604static struct wm831x_status_pdata wm1192_led8_pdata = {
605 .name = "LED8:green:",
606};
607
608static struct wm831x_pdata smdk6410_wm1192_pdata = {
609 .pre_init = wm1192_pre_init,
610 .irq_base = IRQ_BOARD_START,
611
612 .backlight = &wm1192_backlight_pdata,
613 .dcdc = {
614 &smdk6410_vddarm, /* DCDC1 */
615 &smdk6410_vddint, /* DCDC2 */
616 &wm1192_dcdc3,
617 },
Mark Browna7a81d02010-02-17 18:19:31 +0000618 .gpio_base = GPIO_BOARD_START,
Mark Brown60f91012010-02-17 18:19:29 +0000619 .ldo = {
620 &wm1192_ldo1, /* LDO1 */
621 &smdk6410_vdduh_mmc, /* LDO2 */
622 NULL, /* LDO3 NC */
623 &smdk6410_vddotgi, /* LDO4 */
624 &smdk6410_vddotg, /* LDO5 */
625 &smdk6410_vddhi, /* LDO6 */
626 &smdk6410_vddaudio, /* LDO7 */
627 &smdk6410_vccm2mtv, /* LDO8 */
628 &smdk6410_vddpll, /* LDO9 */
629 &smdk6410_vccmc3bt, /* LDO10 */
630 &smdk6410_vddalive, /* LDO11 */
631 },
632 .status = {
633 &wm1192_led7_pdata,
634 &wm1192_led8_pdata,
635 },
636};
637#endif
638
Ben Dooks096941e2008-10-31 16:14:59 +0000639static struct i2c_board_info i2c_devs0[] __initdata = {
640 { I2C_BOARD_INFO("24c08", 0x50), },
Mark Brown77897472009-01-23 16:29:41 +0000641 { I2C_BOARD_INFO("wm8580", 0x1b), },
Mark Brownecc558a2009-02-17 15:59:38 +0000642
Mark Brown60f91012010-02-17 18:19:29 +0000643#ifdef CONFIG_SMDK6410_WM1192_EV1
644 { I2C_BOARD_INFO("wm8312", 0x34),
645 .platform_data = &smdk6410_wm1192_pdata,
646 .irq = S3C_EINT(12),
647 },
648#endif
649
Mark Brownecc558a2009-02-17 15:59:38 +0000650#ifdef CONFIG_SMDK6410_WM1190_EV1
651 { I2C_BOARD_INFO("wm8350", 0x1a),
652 .platform_data = &smdk6410_wm8350_pdata,
653 .irq = S3C_EINT(12),
654 },
655#endif
Ben Dooks096941e2008-10-31 16:14:59 +0000656};
657
658static struct i2c_board_info i2c_devs1[] __initdata = {
659 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
Ben Dooks5718df92008-10-21 14:07:09 +0100660};
661
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900662static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
663 .delay = 10000,
664 .presc = 49,
665 .oversampling_shift = 2,
666};
667
Ben Dooks5718df92008-10-21 14:07:09 +0100668static void __init smdk6410_map_io(void)
669{
Ben Dooksd6662c32008-12-12 00:24:40 +0000670 u32 tmp;
671
Ben Dooks5718df92008-10-21 14:07:09 +0100672 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
673 s3c24xx_init_clocks(12000000);
674 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
Ben Dooksd6662c32008-12-12 00:24:40 +0000675
676 /* set the LCD type */
677
678 tmp = __raw_readl(S3C64XX_SPCON);
679 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
680 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
681 __raw_writel(tmp, S3C64XX_SPCON);
682
683 /* remove the lcd bypass */
684 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
685 tmp &= ~MIFPCON_LCD_BYPASS;
686 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
Ben Dooks5718df92008-10-21 14:07:09 +0100687}
688
689static void __init smdk6410_machine_init(void)
690{
Andy Greenf01fdac2009-12-29 14:40:36 +0000691 u32 cs1;
692
Ben Dooksd85fa242008-10-31 16:14:52 +0000693 s3c_i2c0_set_platdata(NULL);
Ben Dooksd7ea3742008-10-31 16:14:57 +0000694 s3c_i2c1_set_platdata(NULL);
Ben Dooks438a5d42008-11-19 15:41:34 +0000695 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
Ben Dooks096941e2008-10-31 16:14:59 +0000696
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900697 samsung_keypad_set_platdata(&smdk6410_keypad_data);
698
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900699 s3c24xx_ts_set_platdata(&s3c_ts_platform);
700
Andy Greenf01fdac2009-12-29 14:40:36 +0000701 /* configure nCS1 width to 16 bits */
702
703 cs1 = __raw_readl(S3C64XX_SROM_BW) &
704 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
705 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
706 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
707 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
708 S3C64XX_SROM_BW__NCS1__SHIFT;
709 __raw_writel(cs1, S3C64XX_SROM_BW);
710
711 /* set timing for nCS1 suitable for ethernet chip */
712
713 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
714 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
715 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
716 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
717 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
718 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
719 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
720
Mark Brownb7f9a942009-04-08 16:12:35 +0100721 gpio_request(S3C64XX_GPN(5), "LCD power");
722 gpio_request(S3C64XX_GPF(13), "LCD power");
Mark Brownb7f9a942009-04-08 16:12:35 +0100723
Ben Dooks096941e2008-10-31 16:14:59 +0000724 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
725 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
726
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900727 s3c_ide_set_platdata(&smdk6410_ide_pdata);
728
Ben Dooks5718df92008-10-21 14:07:09 +0100729 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
730}
731
732MACHINE_START(SMDK6410, "SMDK6410")
Ben Dooksafdd2252010-05-07 09:24:05 +0900733 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
Ben Dooks5718df92008-10-21 14:07:09 +0100734 .boot_params = S3C64XX_PA_SDRAM + 0x100,
735
736 .init_irq = s3c6410_init_irq,
737 .map_io = smdk6410_map_io,
738 .init_machine = smdk6410_machine_init,
739 .timer = &s3c24xx_timer,
740MACHINE_END