Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1 | /* |
| 2 | * CXL Flash Device Driver |
| 3 | * |
| 4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation |
| 5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation |
| 6 | * |
| 7 | * Copyright (C) 2015 IBM Corporation |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation; either version |
| 12 | * 2 of the License, or (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/pci.h> |
| 19 | |
| 20 | #include <asm/unaligned.h> |
| 21 | |
| 22 | #include <misc/cxl.h> |
| 23 | |
| 24 | #include <scsi/scsi_cmnd.h> |
| 25 | #include <scsi/scsi_host.h> |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 26 | #include <uapi/scsi/cxlflash_ioctl.h> |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 27 | |
| 28 | #include "main.h" |
| 29 | #include "sislite.h" |
| 30 | #include "common.h" |
| 31 | |
| 32 | MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME); |
| 33 | MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>"); |
| 34 | MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>"); |
| 35 | MODULE_LICENSE("GPL"); |
| 36 | |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 37 | static struct class *cxlflash_class; |
| 38 | static u32 cxlflash_major; |
| 39 | static DECLARE_BITMAP(cxlflash_minor, CXLFLASH_MAX_ADAPTERS); |
| 40 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 41 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 42 | * process_cmd_err() - command error handler |
| 43 | * @cmd: AFU command that experienced the error. |
| 44 | * @scp: SCSI command associated with the AFU command in error. |
| 45 | * |
| 46 | * Translates error bits from AFU command to SCSI command results. |
| 47 | */ |
| 48 | static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp) |
| 49 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 50 | struct afu *afu = cmd->parent; |
| 51 | struct cxlflash_cfg *cfg = afu->parent; |
| 52 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 53 | struct sisl_ioarcb *ioarcb; |
| 54 | struct sisl_ioasa *ioasa; |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 55 | u32 resid; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 56 | |
| 57 | if (unlikely(!cmd)) |
| 58 | return; |
| 59 | |
| 60 | ioarcb = &(cmd->rcb); |
| 61 | ioasa = &(cmd->sa); |
| 62 | |
| 63 | if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 64 | resid = ioasa->resid; |
| 65 | scsi_set_resid(scp, resid); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 66 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n", |
| 67 | __func__, cmd, scp, resid); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 68 | } |
| 69 | |
| 70 | if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 71 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n", |
| 72 | __func__, cmd, scp); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 73 | scp->result = (DID_ERROR << 16); |
| 74 | } |
| 75 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 76 | dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x " |
| 77 | "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__, |
| 78 | ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc, |
| 79 | ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 80 | |
| 81 | if (ioasa->rc.scsi_rc) { |
| 82 | /* We have a SCSI status */ |
| 83 | if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) { |
| 84 | memcpy(scp->sense_buffer, ioasa->sense_data, |
| 85 | SISL_SENSE_DATA_LEN); |
| 86 | scp->result = ioasa->rc.scsi_rc; |
| 87 | } else |
| 88 | scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16); |
| 89 | } |
| 90 | |
| 91 | /* |
| 92 | * We encountered an error. Set scp->result based on nature |
| 93 | * of error. |
| 94 | */ |
| 95 | if (ioasa->rc.fc_rc) { |
| 96 | /* We have an FC status */ |
| 97 | switch (ioasa->rc.fc_rc) { |
| 98 | case SISL_FC_RC_LINKDOWN: |
| 99 | scp->result = (DID_REQUEUE << 16); |
| 100 | break; |
| 101 | case SISL_FC_RC_RESID: |
| 102 | /* This indicates an FCP resid underrun */ |
| 103 | if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) { |
| 104 | /* If the SISL_RC_FLAGS_OVERRUN flag was set, |
| 105 | * then we will handle this error else where. |
| 106 | * If not then we must handle it here. |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 107 | * This is probably an AFU bug. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 108 | */ |
| 109 | scp->result = (DID_ERROR << 16); |
| 110 | } |
| 111 | break; |
| 112 | case SISL_FC_RC_RESIDERR: |
| 113 | /* Resid mismatch between adapter and device */ |
| 114 | case SISL_FC_RC_TGTABORT: |
| 115 | case SISL_FC_RC_ABORTOK: |
| 116 | case SISL_FC_RC_ABORTFAIL: |
| 117 | case SISL_FC_RC_NOLOGI: |
| 118 | case SISL_FC_RC_ABORTPEND: |
| 119 | case SISL_FC_RC_WRABORTPEND: |
| 120 | case SISL_FC_RC_NOEXP: |
| 121 | case SISL_FC_RC_INUSE: |
| 122 | scp->result = (DID_ERROR << 16); |
| 123 | break; |
| 124 | } |
| 125 | } |
| 126 | |
| 127 | if (ioasa->rc.afu_rc) { |
| 128 | /* We have an AFU error */ |
| 129 | switch (ioasa->rc.afu_rc) { |
| 130 | case SISL_AFU_RC_NO_CHANNELS: |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 131 | scp->result = (DID_NO_CONNECT << 16); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 132 | break; |
| 133 | case SISL_AFU_RC_DATA_DMA_ERR: |
| 134 | switch (ioasa->afu_extra) { |
| 135 | case SISL_AFU_DMA_ERR_PAGE_IN: |
| 136 | /* Retry */ |
| 137 | scp->result = (DID_IMM_RETRY << 16); |
| 138 | break; |
| 139 | case SISL_AFU_DMA_ERR_INVALID_EA: |
| 140 | default: |
| 141 | scp->result = (DID_ERROR << 16); |
| 142 | } |
| 143 | break; |
| 144 | case SISL_AFU_RC_OUT_OF_DATA_BUFS: |
| 145 | /* Retry */ |
| 146 | scp->result = (DID_ALLOC_FAILURE << 16); |
| 147 | break; |
| 148 | default: |
| 149 | scp->result = (DID_ERROR << 16); |
| 150 | } |
| 151 | } |
| 152 | } |
| 153 | |
| 154 | /** |
| 155 | * cmd_complete() - command completion handler |
| 156 | * @cmd: AFU command that has completed. |
| 157 | * |
| 158 | * Prepares and submits command that has either completed or timed out to |
| 159 | * the SCSI stack. Checks AFU command back into command pool for non-internal |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 160 | * (cmd->scp populated) commands. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 161 | */ |
| 162 | static void cmd_complete(struct afu_cmd *cmd) |
| 163 | { |
| 164 | struct scsi_cmnd *scp; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 165 | ulong lock_flags; |
| 166 | struct afu *afu = cmd->parent; |
| 167 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 168 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | a002bf8 | 2017-06-21 21:14:43 -0500 | [diff] [blame] | 169 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 170 | bool cmd_is_tmf; |
| 171 | |
Uma Krishnan | a002bf8 | 2017-06-21 21:14:43 -0500 | [diff] [blame] | 172 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
| 173 | list_del(&cmd->list); |
| 174 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
| 175 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 176 | if (cmd->scp) { |
| 177 | scp = cmd->scp; |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 178 | if (unlikely(cmd->sa.ioasc)) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 179 | process_cmd_err(cmd, scp); |
| 180 | else |
| 181 | scp->result = (DID_OK << 16); |
| 182 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 183 | cmd_is_tmf = cmd->cmd_tmf; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 184 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 185 | dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n", |
| 186 | __func__, scp, scp->result, cmd->sa.ioasc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 187 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 188 | scp->scsi_done(scp); |
| 189 | |
| 190 | if (cmd_is_tmf) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 191 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 192 | cfg->tmf_active = false; |
| 193 | wake_up_all_locked(&cfg->tmf_waitq); |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 194 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 195 | } |
| 196 | } else |
| 197 | complete(&cmd->cevent); |
| 198 | } |
| 199 | |
| 200 | /** |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 201 | * flush_pending_cmds() - flush all pending commands on this hardware queue |
| 202 | * @hwq: Hardware queue to flush. |
| 203 | * |
| 204 | * The hardware send queue lock associated with this hardware queue must be |
| 205 | * held when calling this routine. |
| 206 | */ |
| 207 | static void flush_pending_cmds(struct hwq *hwq) |
| 208 | { |
| 209 | struct afu_cmd *cmd, *tmp; |
| 210 | struct scsi_cmnd *scp; |
| 211 | |
| 212 | list_for_each_entry_safe(cmd, tmp, &hwq->pending_cmds, list) { |
| 213 | /* Bypass command when on a doneq, cmd_complete() will handle */ |
| 214 | if (!list_empty(&cmd->queue)) |
| 215 | continue; |
| 216 | |
| 217 | list_del(&cmd->list); |
| 218 | |
| 219 | if (cmd->scp) { |
| 220 | scp = cmd->scp; |
| 221 | scp->result = (DID_IMM_RETRY << 16); |
| 222 | scp->scsi_done(scp); |
| 223 | } else { |
| 224 | cmd->cmd_aborted = true; |
| 225 | complete(&cmd->cevent); |
| 226 | } |
| 227 | } |
| 228 | } |
| 229 | |
| 230 | /** |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 231 | * context_reset() - reset context via specified register |
| 232 | * @hwq: Hardware queue owning the context to be reset. |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 233 | * @reset_reg: MMIO register to perform reset. |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 234 | * |
Uma Krishnan | 7c4c41f | 2017-06-21 21:15:06 -0500 | [diff] [blame] | 235 | * When the reset is successful, the SISLite specification guarantees that |
| 236 | * the AFU has aborted all currently pending I/O. Accordingly, these commands |
| 237 | * must be flushed. |
| 238 | * |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 239 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 240 | */ |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 241 | static int context_reset(struct hwq *hwq, __be64 __iomem *reset_reg) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 242 | { |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 243 | struct cxlflash_cfg *cfg = hwq->afu->parent; |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 244 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 245 | int rc = -ETIMEDOUT; |
| 246 | int nretry = 0; |
| 247 | u64 val = 0x1; |
Uma Krishnan | 7c4c41f | 2017-06-21 21:15:06 -0500 | [diff] [blame] | 248 | ulong lock_flags; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 249 | |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 250 | dev_dbg(dev, "%s: hwq=%p\n", __func__, hwq); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 251 | |
Uma Krishnan | 7c4c41f | 2017-06-21 21:15:06 -0500 | [diff] [blame] | 252 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
| 253 | |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 254 | writeq_be(val, reset_reg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 255 | do { |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 256 | val = readq_be(reset_reg); |
| 257 | if ((val & 0x1) == 0x0) { |
| 258 | rc = 0; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 259 | break; |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 260 | } |
| 261 | |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 262 | /* Double delay each time */ |
Manoj N. Kumar | ea76543 | 2016-03-25 14:26:49 -0500 | [diff] [blame] | 263 | udelay(1 << nretry); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 264 | } while (nretry++ < MC_ROOM_RETRY_CNT); |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 265 | |
Uma Krishnan | 7c4c41f | 2017-06-21 21:15:06 -0500 | [diff] [blame] | 266 | if (!rc) |
| 267 | flush_pending_cmds(hwq); |
| 268 | |
| 269 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
| 270 | |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 271 | dev_dbg(dev, "%s: returning rc=%d, val=%016llx nretry=%d\n", |
| 272 | __func__, rc, val, nretry); |
| 273 | return rc; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 274 | } |
| 275 | |
| 276 | /** |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 277 | * context_reset_ioarrin() - reset context via IOARRIN register |
| 278 | * @hwq: Hardware queue owning the context to be reset. |
| 279 | * |
| 280 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 281 | */ |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 282 | static int context_reset_ioarrin(struct hwq *hwq) |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 283 | { |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 284 | return context_reset(hwq, &hwq->host_map->ioarrin); |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 285 | } |
| 286 | |
| 287 | /** |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 288 | * context_reset_sq() - reset context via SQ_CONTEXT_RESET register |
| 289 | * @hwq: Hardware queue owning the context to be reset. |
| 290 | * |
| 291 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 292 | */ |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 293 | static int context_reset_sq(struct hwq *hwq) |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 294 | { |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 295 | return context_reset(hwq, &hwq->host_map->sq_ctx_reset); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | /** |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 299 | * send_cmd_ioarrin() - sends an AFU command via IOARRIN register |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 300 | * @afu: AFU associated with the host. |
| 301 | * @cmd: AFU command to send. |
| 302 | * |
| 303 | * Return: |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 304 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 305 | */ |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 306 | static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 307 | { |
| 308 | struct cxlflash_cfg *cfg = afu->parent; |
| 309 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 310 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 311 | int rc = 0; |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 312 | s64 room; |
| 313 | ulong lock_flags; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 314 | |
| 315 | /* |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 316 | * To avoid the performance penalty of MMIO, spread the update of |
| 317 | * 'room' over multiple commands. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 318 | */ |
Uma Krishnan | 66ea9bc | 2017-06-21 21:13:32 -0500 | [diff] [blame] | 319 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 320 | if (--hwq->room < 0) { |
| 321 | room = readq_be(&hwq->host_map->cmd_room); |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 322 | if (room <= 0) { |
| 323 | dev_dbg_ratelimited(dev, "%s: no cmd_room to send " |
| 324 | "0x%02X, room=0x%016llX\n", |
| 325 | __func__, cmd->rcb.cdb[0], room); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 326 | hwq->room = 0; |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 327 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 328 | goto out; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 329 | } |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 330 | hwq->room = room - 1; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 331 | } |
| 332 | |
Uma Krishnan | a002bf8 | 2017-06-21 21:14:43 -0500 | [diff] [blame] | 333 | list_add(&cmd->list, &hwq->pending_cmds); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 334 | writeq_be((u64)&cmd->rcb, &hwq->host_map->ioarrin); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 335 | out: |
Uma Krishnan | 66ea9bc | 2017-06-21 21:13:32 -0500 | [diff] [blame] | 336 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 337 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__, |
| 338 | cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 339 | return rc; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 340 | } |
| 341 | |
| 342 | /** |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 343 | * send_cmd_sq() - sends an AFU command via SQ ring |
| 344 | * @afu: AFU associated with the host. |
| 345 | * @cmd: AFU command to send. |
| 346 | * |
| 347 | * Return: |
| 348 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
| 349 | */ |
| 350 | static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) |
| 351 | { |
| 352 | struct cxlflash_cfg *cfg = afu->parent; |
| 353 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 354 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 355 | int rc = 0; |
| 356 | int newval; |
| 357 | ulong lock_flags; |
| 358 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 359 | newval = atomic_dec_if_positive(&hwq->hsq_credits); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 360 | if (newval <= 0) { |
| 361 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 362 | goto out; |
| 363 | } |
| 364 | |
| 365 | cmd->rcb.ioasa = &cmd->sa; |
| 366 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 367 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 368 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 369 | *hwq->hsq_curr = cmd->rcb; |
| 370 | if (hwq->hsq_curr < hwq->hsq_end) |
| 371 | hwq->hsq_curr++; |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 372 | else |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 373 | hwq->hsq_curr = hwq->hsq_start; |
Uma Krishnan | a002bf8 | 2017-06-21 21:14:43 -0500 | [diff] [blame] | 374 | |
| 375 | list_add(&cmd->list, &hwq->pending_cmds); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 376 | writeq_be((u64)hwq->hsq_curr, &hwq->host_map->sq_tail); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 377 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 378 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 379 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 380 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p " |
| 381 | "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len, |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 382 | cmd->rcb.data_ea, cmd->rcb.ioasa, rc, hwq->hsq_curr, |
| 383 | readq_be(&hwq->host_map->sq_head), |
| 384 | readq_be(&hwq->host_map->sq_tail)); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 385 | return rc; |
| 386 | } |
| 387 | |
| 388 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 389 | * wait_resp() - polls for a response or timeout to a sent AFU command |
| 390 | * @afu: AFU associated with the host. |
| 391 | * @cmd: AFU command that was sent. |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 392 | * |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 393 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 394 | */ |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 395 | static int wait_resp(struct afu *afu, struct afu_cmd *cmd) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 396 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 397 | struct cxlflash_cfg *cfg = afu->parent; |
| 398 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 399 | int rc = 0; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 400 | ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000); |
| 401 | |
| 402 | timeout = wait_for_completion_timeout(&cmd->cevent, timeout); |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 403 | if (!timeout) |
| 404 | rc = -ETIMEDOUT; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 405 | |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 406 | if (cmd->cmd_aborted) |
| 407 | rc = -EAGAIN; |
| 408 | |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 409 | if (unlikely(cmd->sa.ioasc != 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 410 | dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n", |
| 411 | __func__, cmd->rcb.cdb[0], cmd->sa.ioasc); |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 412 | rc = -EIO; |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 413 | } |
| 414 | |
| 415 | return rc; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 416 | } |
| 417 | |
| 418 | /** |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 419 | * cmd_to_target_hwq() - selects a target hardware queue for a SCSI command |
| 420 | * @host: SCSI host associated with device. |
| 421 | * @scp: SCSI command to send. |
| 422 | * @afu: SCSI command to send. |
| 423 | * |
| 424 | * Hashes a command based upon the hardware queue mode. |
| 425 | * |
| 426 | * Return: Trusted index of target hardware queue |
| 427 | */ |
| 428 | static u32 cmd_to_target_hwq(struct Scsi_Host *host, struct scsi_cmnd *scp, |
| 429 | struct afu *afu) |
| 430 | { |
| 431 | u32 tag; |
| 432 | u32 hwq = 0; |
| 433 | |
| 434 | if (afu->num_hwqs == 1) |
| 435 | return 0; |
| 436 | |
| 437 | switch (afu->hwq_mode) { |
| 438 | case HWQ_MODE_RR: |
| 439 | hwq = afu->hwq_rr_count++ % afu->num_hwqs; |
| 440 | break; |
| 441 | case HWQ_MODE_TAG: |
| 442 | tag = blk_mq_unique_tag(scp->request); |
| 443 | hwq = blk_mq_unique_tag_to_hwq(tag); |
| 444 | break; |
| 445 | case HWQ_MODE_CPU: |
| 446 | hwq = smp_processor_id() % afu->num_hwqs; |
| 447 | break; |
| 448 | default: |
| 449 | WARN_ON_ONCE(1); |
| 450 | } |
| 451 | |
| 452 | return hwq; |
| 453 | } |
| 454 | |
| 455 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 456 | * send_tmf() - sends a Task Management Function (TMF) |
| 457 | * @afu: AFU to checkout from. |
| 458 | * @scp: SCSI command from stack. |
| 459 | * @tmfcmd: TMF command to send. |
| 460 | * |
| 461 | * Return: |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 462 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 463 | */ |
| 464 | static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd) |
| 465 | { |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 466 | struct Scsi_Host *host = scp->device->host; |
| 467 | struct cxlflash_cfg *cfg = shost_priv(host); |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 468 | struct afu_cmd *cmd = sc_to_afucz(scp); |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 469 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 470 | int hwq_index = cmd_to_target_hwq(host, scp, afu); |
| 471 | struct hwq *hwq = get_hwq(afu, hwq_index); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 472 | ulong lock_flags; |
| 473 | int rc = 0; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 474 | ulong to; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 475 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 476 | /* When Task Management Function is active do not send another */ |
| 477 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 478 | if (cfg->tmf_active) |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 479 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
| 480 | !cfg->tmf_active, |
| 481 | cfg->tmf_slock); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 482 | cfg->tmf_active = true; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 483 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 484 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 485 | cmd->scp = scp; |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 486 | cmd->parent = afu; |
| 487 | cmd->cmd_tmf = true; |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 488 | cmd->hwq_index = hwq_index; |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 489 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 490 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 491 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 492 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 493 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 494 | cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID | |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 495 | SISL_REQ_FLAGS_SUP_UNDERRUN | |
| 496 | SISL_REQ_FLAGS_TMF_CMD); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 497 | memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd)); |
| 498 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 499 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 500 | if (unlikely(rc)) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 501 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 502 | cfg->tmf_active = false; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 503 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 504 | goto out; |
| 505 | } |
| 506 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 507 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
| 508 | to = msecs_to_jiffies(5000); |
| 509 | to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq, |
| 510 | !cfg->tmf_active, |
| 511 | cfg->tmf_slock, |
| 512 | to); |
| 513 | if (!to) { |
| 514 | cfg->tmf_active = false; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 515 | dev_err(dev, "%s: TMF timed out\n", __func__); |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 516 | rc = -1; |
| 517 | } |
| 518 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 519 | out: |
| 520 | return rc; |
| 521 | } |
| 522 | |
| 523 | /** |
| 524 | * cxlflash_driver_info() - information handler for this host driver |
| 525 | * @host: SCSI host associated with device. |
| 526 | * |
| 527 | * Return: A string describing the device. |
| 528 | */ |
| 529 | static const char *cxlflash_driver_info(struct Scsi_Host *host) |
| 530 | { |
| 531 | return CXLFLASH_ADAPTER_NAME; |
| 532 | } |
| 533 | |
| 534 | /** |
| 535 | * cxlflash_queuecommand() - sends a mid-layer request |
| 536 | * @host: SCSI host associated with device. |
| 537 | * @scp: SCSI command to send. |
| 538 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 539 | * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 540 | */ |
| 541 | static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) |
| 542 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 543 | struct cxlflash_cfg *cfg = shost_priv(host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 544 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 545 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 546 | struct afu_cmd *cmd = sc_to_afucz(scp); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 547 | struct scatterlist *sg = scsi_sglist(scp); |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 548 | int hwq_index = cmd_to_target_hwq(host, scp, afu); |
| 549 | struct hwq *hwq = get_hwq(afu, hwq_index); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 550 | u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 551 | ulong lock_flags; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 552 | int rc = 0; |
| 553 | |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 554 | dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 555 | "cdb=(%08x-%08x-%08x-%08x)\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 556 | __func__, scp, host->host_no, scp->device->channel, |
| 557 | scp->device->id, scp->device->lun, |
| 558 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 559 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 560 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 561 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 562 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 563 | /* |
| 564 | * If a Task Management Function is active, wait for it to complete |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 565 | * before continuing with regular commands. |
| 566 | */ |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 567 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 568 | if (cfg->tmf_active) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 569 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 570 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 571 | goto out; |
| 572 | } |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 573 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 574 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 575 | switch (cfg->state) { |
Matthew R. Ochs | 323e334 | 2017-04-12 14:14:51 -0500 | [diff] [blame] | 576 | case STATE_PROBING: |
| 577 | case STATE_PROBED: |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 578 | case STATE_RESET: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 579 | dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 580 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 581 | goto out; |
| 582 | case STATE_FAILTERM: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 583 | dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 584 | scp->result = (DID_NO_CONNECT << 16); |
| 585 | scp->scsi_done(scp); |
| 586 | rc = 0; |
| 587 | goto out; |
| 588 | default: |
| 589 | break; |
| 590 | } |
| 591 | |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 592 | if (likely(sg)) { |
Matthew R. Ochs | 50b787f | 2017-04-12 14:15:02 -0500 | [diff] [blame] | 593 | cmd->rcb.data_len = sg->length; |
| 594 | cmd->rcb.data_ea = (uintptr_t)sg_virt(sg); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 595 | } |
| 596 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 597 | cmd->scp = scp; |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 598 | cmd->parent = afu; |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 599 | cmd->hwq_index = hwq_index; |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 600 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 601 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 602 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 603 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 604 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
| 605 | |
| 606 | if (scp->sc_data_direction == DMA_TO_DEVICE) |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 607 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 608 | |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 609 | cmd->rcb.req_flags = req_flags; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 610 | memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb)); |
| 611 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 612 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 613 | out: |
| 614 | return rc; |
| 615 | } |
| 616 | |
| 617 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 618 | * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 619 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 620 | */ |
| 621 | static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg) |
| 622 | { |
| 623 | struct pci_dev *pdev = cfg->dev; |
| 624 | |
| 625 | if (pci_channel_offline(pdev)) |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 626 | wait_event_timeout(cfg->reset_waitq, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 627 | !pci_channel_offline(pdev), |
| 628 | CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT); |
| 629 | } |
| 630 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 631 | /** |
| 632 | * free_mem() - free memory associated with the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 633 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 634 | */ |
| 635 | static void free_mem(struct cxlflash_cfg *cfg) |
| 636 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 637 | struct afu *afu = cfg->afu; |
| 638 | |
| 639 | if (cfg->afu) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 640 | free_pages((ulong)afu, get_order(sizeof(struct afu))); |
| 641 | cfg->afu = NULL; |
| 642 | } |
| 643 | } |
| 644 | |
| 645 | /** |
Uma Krishnan | 0b09e71 | 2017-06-21 21:14:17 -0500 | [diff] [blame] | 646 | * cxlflash_reset_sync() - synchronizing point for asynchronous resets |
| 647 | * @cfg: Internal structure associated with the host. |
| 648 | */ |
| 649 | static void cxlflash_reset_sync(struct cxlflash_cfg *cfg) |
| 650 | { |
| 651 | if (cfg->async_reset_cookie == 0) |
| 652 | return; |
| 653 | |
| 654 | /* Wait until all async calls prior to this cookie have completed */ |
| 655 | async_synchronize_cookie(cfg->async_reset_cookie + 1); |
| 656 | cfg->async_reset_cookie = 0; |
| 657 | } |
| 658 | |
| 659 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 660 | * stop_afu() - stops the AFU command timers and unmaps the MMIO space |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 661 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 662 | * |
| 663 | * Safe to call with AFU in a partially allocated/initialized state. |
Manoj Kumar | ee91e33 | 2015-12-14 15:07:02 -0600 | [diff] [blame] | 664 | * |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 665 | * Cancels scheduled worker threads, waits for any active internal AFU |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 666 | * commands to timeout, disables IRQ polling and then unmaps the MMIO space. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 667 | */ |
| 668 | static void stop_afu(struct cxlflash_cfg *cfg) |
| 669 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 670 | struct afu *afu = cfg->afu; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 671 | struct hwq *hwq; |
| 672 | int i; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 673 | |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 674 | cancel_work_sync(&cfg->work_q); |
Uma Krishnan | 0b09e71 | 2017-06-21 21:14:17 -0500 | [diff] [blame] | 675 | if (!current_is_async()) |
| 676 | cxlflash_reset_sync(cfg); |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 677 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 678 | if (likely(afu)) { |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 679 | while (atomic_read(&afu->cmds_active)) |
| 680 | ssleep(1); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 681 | |
| 682 | if (afu_is_irqpoll_enabled(afu)) { |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 683 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 684 | hwq = get_hwq(afu, i); |
| 685 | |
| 686 | irq_poll_disable(&hwq->irqpoll); |
| 687 | } |
| 688 | } |
| 689 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 690 | if (likely(afu->afu_map)) { |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 691 | cxl_psa_unmap((void __iomem *)afu->afu_map); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 692 | afu->afu_map = NULL; |
| 693 | } |
| 694 | } |
| 695 | } |
| 696 | |
| 697 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 698 | * term_intr() - disables all AFU interrupts |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 699 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 700 | * @level: Depth of allocation, where to begin waterfall tear down. |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 701 | * @index: Index of the hardware queue. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 702 | * |
| 703 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 704 | */ |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 705 | static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level, |
| 706 | u32 index) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 707 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 708 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 709 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 710 | struct hwq *hwq; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 711 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 712 | if (!afu) { |
| 713 | dev_err(dev, "%s: returning with NULL afu\n", __func__); |
| 714 | return; |
| 715 | } |
| 716 | |
| 717 | hwq = get_hwq(afu, index); |
| 718 | |
| 719 | if (!hwq->ctx) { |
| 720 | dev_err(dev, "%s: returning with NULL MC\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 721 | return; |
| 722 | } |
| 723 | |
| 724 | switch (level) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 725 | case UNMAP_THREE: |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 726 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
| 727 | if (index == PRIMARY_HWQ) |
| 728 | cxl_unmap_afu_irq(hwq->ctx, 3, hwq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 729 | case UNMAP_TWO: |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 730 | cxl_unmap_afu_irq(hwq->ctx, 2, hwq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 731 | case UNMAP_ONE: |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 732 | cxl_unmap_afu_irq(hwq->ctx, 1, hwq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 733 | case FREE_IRQ: |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 734 | cxl_free_afu_irqs(hwq->ctx); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 735 | /* fall through */ |
| 736 | case UNDO_NOOP: |
| 737 | /* No action required */ |
| 738 | break; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 739 | } |
| 740 | } |
| 741 | |
| 742 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 743 | * term_mc() - terminates the master context |
| 744 | * @cfg: Internal structure associated with the host. |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 745 | * @index: Index of the hardware queue. |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 746 | * |
| 747 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 748 | */ |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 749 | static void term_mc(struct cxlflash_cfg *cfg, u32 index) |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 750 | { |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 751 | struct afu *afu = cfg->afu; |
| 752 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 753 | struct hwq *hwq; |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 754 | ulong lock_flags; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 755 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 756 | if (!afu) { |
| 757 | dev_err(dev, "%s: returning with NULL afu\n", __func__); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 758 | return; |
| 759 | } |
| 760 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 761 | hwq = get_hwq(afu, index); |
| 762 | |
| 763 | if (!hwq->ctx) { |
| 764 | dev_err(dev, "%s: returning with NULL MC\n", __func__); |
| 765 | return; |
| 766 | } |
| 767 | |
| 768 | WARN_ON(cxl_stop_context(hwq->ctx)); |
| 769 | if (index != PRIMARY_HWQ) |
| 770 | WARN_ON(cxl_release_context(hwq->ctx)); |
| 771 | hwq->ctx = NULL; |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 772 | |
| 773 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
| 774 | flush_pending_cmds(hwq); |
| 775 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 776 | } |
| 777 | |
| 778 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 779 | * term_afu() - terminates the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 780 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 781 | * |
| 782 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 783 | */ |
| 784 | static void term_afu(struct cxlflash_cfg *cfg) |
| 785 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 786 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 787 | int k; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 788 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 789 | /* |
| 790 | * Tear down is carefully orchestrated to ensure |
| 791 | * no interrupts can come in when the problem state |
| 792 | * area is unmapped. |
| 793 | * |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 794 | * 1) Disable all AFU interrupts for each master |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 795 | * 2) Unmap the problem state area |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 796 | * 3) Stop each master context |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 797 | */ |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 798 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 799 | term_intr(cfg, UNMAP_THREE, k); |
| 800 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 801 | if (cfg->afu) |
| 802 | stop_afu(cfg); |
| 803 | |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 804 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 805 | term_mc(cfg, k); |
Uma Krishnan | 6ded8b3 | 2016-03-04 15:55:15 -0600 | [diff] [blame] | 806 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 807 | dev_dbg(dev, "%s: returning\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 808 | } |
| 809 | |
| 810 | /** |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 811 | * notify_shutdown() - notifies device of pending shutdown |
| 812 | * @cfg: Internal structure associated with the host. |
| 813 | * @wait: Whether to wait for shutdown processing to complete. |
| 814 | * |
| 815 | * This function will notify the AFU that the adapter is being shutdown |
| 816 | * and will wait for shutdown processing to complete if wait is true. |
| 817 | * This notification should flush pending I/Os to the device and halt |
| 818 | * further I/Os until the next AFU reset is issued and device restarted. |
| 819 | */ |
| 820 | static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) |
| 821 | { |
| 822 | struct afu *afu = cfg->afu; |
| 823 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 824 | struct dev_dependent_vals *ddv; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 825 | __be64 __iomem *fc_port_regs; |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 826 | u64 reg, status; |
| 827 | int i, retry_cnt = 0; |
| 828 | |
| 829 | ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data; |
| 830 | if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN)) |
| 831 | return; |
| 832 | |
Uma Krishnan | 1bd2b28 | 2016-07-21 15:44:04 -0500 | [diff] [blame] | 833 | if (!afu || !afu->afu_map) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 834 | dev_dbg(dev, "%s: Problem state area not mapped\n", __func__); |
Uma Krishnan | 1bd2b28 | 2016-07-21 15:44:04 -0500 | [diff] [blame] | 835 | return; |
| 836 | } |
| 837 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 838 | /* Notify AFU */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 839 | for (i = 0; i < cfg->num_fc_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 840 | fc_port_regs = get_fc_port_regs(cfg, i); |
| 841 | |
| 842 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 843 | reg |= SISL_FC_SHUTDOWN_NORMAL; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 844 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 845 | } |
| 846 | |
| 847 | if (!wait) |
| 848 | return; |
| 849 | |
| 850 | /* Wait up to 1.5 seconds for shutdown processing to complete */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 851 | for (i = 0; i < cfg->num_fc_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 852 | fc_port_regs = get_fc_port_regs(cfg, i); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 853 | retry_cnt = 0; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 854 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 855 | while (true) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 856 | status = readq_be(&fc_port_regs[FC_STATUS / 8]); |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 857 | if (status & SISL_STATUS_SHUTDOWN_COMPLETE) |
| 858 | break; |
| 859 | if (++retry_cnt >= MC_RETRY_CNT) { |
| 860 | dev_dbg(dev, "%s: port %d shutdown processing " |
| 861 | "not yet completed\n", __func__, i); |
| 862 | break; |
| 863 | } |
| 864 | msleep(100 * retry_cnt); |
| 865 | } |
| 866 | } |
| 867 | } |
| 868 | |
| 869 | /** |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 870 | * cxlflash_get_minor() - gets the first available minor number |
| 871 | * |
| 872 | * Return: Unique minor number that can be used to create the character device. |
| 873 | */ |
| 874 | static int cxlflash_get_minor(void) |
| 875 | { |
| 876 | int minor; |
| 877 | long bit; |
| 878 | |
| 879 | bit = find_first_zero_bit(cxlflash_minor, CXLFLASH_MAX_ADAPTERS); |
| 880 | if (bit >= CXLFLASH_MAX_ADAPTERS) |
| 881 | return -1; |
| 882 | |
| 883 | minor = bit & MINORMASK; |
| 884 | set_bit(minor, cxlflash_minor); |
| 885 | return minor; |
| 886 | } |
| 887 | |
| 888 | /** |
| 889 | * cxlflash_put_minor() - releases the minor number |
| 890 | * @minor: Minor number that is no longer needed. |
| 891 | */ |
| 892 | static void cxlflash_put_minor(int minor) |
| 893 | { |
| 894 | clear_bit(minor, cxlflash_minor); |
| 895 | } |
| 896 | |
| 897 | /** |
| 898 | * cxlflash_release_chrdev() - release the character device for the host |
| 899 | * @cfg: Internal structure associated with the host. |
| 900 | */ |
| 901 | static void cxlflash_release_chrdev(struct cxlflash_cfg *cfg) |
| 902 | { |
| 903 | put_device(cfg->chardev); |
| 904 | device_unregister(cfg->chardev); |
| 905 | cfg->chardev = NULL; |
| 906 | cdev_del(&cfg->cdev); |
| 907 | cxlflash_put_minor(MINOR(cfg->cdev.dev)); |
| 908 | } |
| 909 | |
| 910 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 911 | * cxlflash_remove() - PCI entry point to tear down host |
| 912 | * @pdev: PCI device associated with the host. |
| 913 | * |
Matthew R. Ochs | 323e334 | 2017-04-12 14:14:51 -0500 | [diff] [blame] | 914 | * Safe to use as a cleanup in partially allocated/initialized state. Note that |
| 915 | * the reset_waitq is flushed as part of the stop/termination of user contexts. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 916 | */ |
| 917 | static void cxlflash_remove(struct pci_dev *pdev) |
| 918 | { |
| 919 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 920 | struct device *dev = &pdev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 921 | ulong lock_flags; |
| 922 | |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 923 | if (!pci_is_enabled(pdev)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 924 | dev_dbg(dev, "%s: Device is disabled\n", __func__); |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 925 | return; |
| 926 | } |
| 927 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 928 | /* If a Task Management Function is active, wait for it to complete |
| 929 | * before continuing with remove. |
| 930 | */ |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 931 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 932 | if (cfg->tmf_active) |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 933 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
| 934 | !cfg->tmf_active, |
| 935 | cfg->tmf_slock); |
| 936 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 937 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 938 | /* Notify AFU and wait for shutdown processing to complete */ |
| 939 | notify_shutdown(cfg, true); |
| 940 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 941 | cfg->state = STATE_FAILTERM; |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 942 | cxlflash_stop_term_user_contexts(cfg); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 943 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 944 | switch (cfg->init_state) { |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 945 | case INIT_STATE_CDEV: |
| 946 | cxlflash_release_chrdev(cfg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 947 | case INIT_STATE_SCSI: |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 948 | cxlflash_term_local_luns(cfg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 949 | scsi_remove_host(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 950 | case INIT_STATE_AFU: |
Manoj Kumar | b45cdbaf | 2015-12-14 15:07:23 -0600 | [diff] [blame] | 951 | term_afu(cfg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 952 | case INIT_STATE_PCI: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 953 | pci_disable_device(pdev); |
| 954 | case INIT_STATE_NONE: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 955 | free_mem(cfg); |
Matthew R. Ochs | 8b5b1e8 | 2015-10-21 15:14:09 -0500 | [diff] [blame] | 956 | scsi_host_put(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 957 | break; |
| 958 | } |
| 959 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 960 | dev_dbg(dev, "%s: returning\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 961 | } |
| 962 | |
| 963 | /** |
| 964 | * alloc_mem() - allocates the AFU and its command pool |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 965 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 966 | * |
| 967 | * A partially allocated state remains on failure. |
| 968 | * |
| 969 | * Return: |
| 970 | * 0 on success |
| 971 | * -ENOMEM on failure to allocate memory |
| 972 | */ |
| 973 | static int alloc_mem(struct cxlflash_cfg *cfg) |
| 974 | { |
| 975 | int rc = 0; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 976 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 977 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 978 | /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 979 | cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 980 | get_order(sizeof(struct afu))); |
| 981 | if (unlikely(!cfg->afu)) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 982 | dev_err(dev, "%s: cannot get %d free pages\n", |
| 983 | __func__, get_order(sizeof(struct afu))); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 984 | rc = -ENOMEM; |
| 985 | goto out; |
| 986 | } |
| 987 | cfg->afu->parent = cfg; |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 988 | cfg->afu->desired_hwqs = CXLFLASH_DEF_HWQS; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 989 | cfg->afu->afu_map = NULL; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 990 | out: |
| 991 | return rc; |
| 992 | } |
| 993 | |
| 994 | /** |
| 995 | * init_pci() - initializes the host as a PCI device |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 996 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 997 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 998 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 999 | */ |
| 1000 | static int init_pci(struct cxlflash_cfg *cfg) |
| 1001 | { |
| 1002 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1003 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1004 | int rc = 0; |
| 1005 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1006 | rc = pci_enable_device(pdev); |
| 1007 | if (rc || pci_channel_offline(pdev)) { |
| 1008 | if (pci_channel_offline(pdev)) { |
| 1009 | cxlflash_wait_for_pci_err_recovery(cfg); |
| 1010 | rc = pci_enable_device(pdev); |
| 1011 | } |
| 1012 | |
| 1013 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1014 | dev_err(dev, "%s: Cannot enable adapter\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1015 | cxlflash_wait_for_pci_err_recovery(cfg); |
Manoj N. Kumar | 961487e | 2016-03-04 15:55:14 -0600 | [diff] [blame] | 1016 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1017 | } |
| 1018 | } |
| 1019 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1020 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1021 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1022 | return rc; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1023 | } |
| 1024 | |
| 1025 | /** |
| 1026 | * init_scsi() - adds the host to the SCSI stack and kicks off host scan |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1027 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1028 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1029 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1030 | */ |
| 1031 | static int init_scsi(struct cxlflash_cfg *cfg) |
| 1032 | { |
| 1033 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1034 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1035 | int rc = 0; |
| 1036 | |
| 1037 | rc = scsi_add_host(cfg->host, &pdev->dev); |
| 1038 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1039 | dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1040 | goto out; |
| 1041 | } |
| 1042 | |
| 1043 | scsi_scan_host(cfg->host); |
| 1044 | |
| 1045 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1046 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1047 | return rc; |
| 1048 | } |
| 1049 | |
| 1050 | /** |
| 1051 | * set_port_online() - transitions the specified host FC port to online state |
| 1052 | * @fc_regs: Top of MMIO region defined for specified port. |
| 1053 | * |
| 1054 | * The provided MMIO region must be mapped prior to call. Online state means |
| 1055 | * that the FC link layer has synced, completed the handshaking process, and |
| 1056 | * is ready for login to start. |
| 1057 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1058 | static void set_port_online(__be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1059 | { |
| 1060 | u64 cmdcfg; |
| 1061 | |
| 1062 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 1063 | cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */ |
| 1064 | cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */ |
| 1065 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 1066 | } |
| 1067 | |
| 1068 | /** |
| 1069 | * set_port_offline() - transitions the specified host FC port to offline state |
| 1070 | * @fc_regs: Top of MMIO region defined for specified port. |
| 1071 | * |
| 1072 | * The provided MMIO region must be mapped prior to call. |
| 1073 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1074 | static void set_port_offline(__be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1075 | { |
| 1076 | u64 cmdcfg; |
| 1077 | |
| 1078 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 1079 | cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */ |
| 1080 | cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */ |
| 1081 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 1082 | } |
| 1083 | |
| 1084 | /** |
| 1085 | * wait_port_online() - waits for the specified host FC port come online |
| 1086 | * @fc_regs: Top of MMIO region defined for specified port. |
| 1087 | * @delay_us: Number of microseconds to delay between reading port status. |
| 1088 | * @nretry: Number of cycles to retry reading port status. |
| 1089 | * |
| 1090 | * The provided MMIO region must be mapped prior to call. This will timeout |
| 1091 | * when the cable is not plugged in. |
| 1092 | * |
| 1093 | * Return: |
| 1094 | * TRUE (1) when the specified port is online |
| 1095 | * FALSE (0) when the specified port fails to come online after timeout |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1096 | */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1097 | static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1098 | { |
| 1099 | u64 status; |
| 1100 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1101 | WARN_ON(delay_us < 1000); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1102 | |
| 1103 | do { |
| 1104 | msleep(delay_us / 1000); |
| 1105 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | 05dab43 | 2016-09-02 15:40:03 -0500 | [diff] [blame] | 1106 | if (status == U64_MAX) |
| 1107 | nretry /= 2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1108 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE && |
| 1109 | nretry--); |
| 1110 | |
| 1111 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE); |
| 1112 | } |
| 1113 | |
| 1114 | /** |
| 1115 | * wait_port_offline() - waits for the specified host FC port go offline |
| 1116 | * @fc_regs: Top of MMIO region defined for specified port. |
| 1117 | * @delay_us: Number of microseconds to delay between reading port status. |
| 1118 | * @nretry: Number of cycles to retry reading port status. |
| 1119 | * |
| 1120 | * The provided MMIO region must be mapped prior to call. |
| 1121 | * |
| 1122 | * Return: |
| 1123 | * TRUE (1) when the specified port is offline |
| 1124 | * FALSE (0) when the specified port fails to go offline after timeout |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1125 | */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1126 | static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1127 | { |
| 1128 | u64 status; |
| 1129 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1130 | WARN_ON(delay_us < 1000); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1131 | |
| 1132 | do { |
| 1133 | msleep(delay_us / 1000); |
| 1134 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | 05dab43 | 2016-09-02 15:40:03 -0500 | [diff] [blame] | 1135 | if (status == U64_MAX) |
| 1136 | nretry /= 2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1137 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE && |
| 1138 | nretry--); |
| 1139 | |
| 1140 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE); |
| 1141 | } |
| 1142 | |
| 1143 | /** |
| 1144 | * afu_set_wwpn() - configures the WWPN for the specified host FC port |
| 1145 | * @afu: AFU associated with the host that owns the specified FC port. |
| 1146 | * @port: Port number being configured. |
| 1147 | * @fc_regs: Top of MMIO region defined for specified port. |
| 1148 | * @wwpn: The world-wide-port-number previously discovered for port. |
| 1149 | * |
| 1150 | * The provided MMIO region must be mapped prior to call. As part of the |
| 1151 | * sequence to configure the WWPN, the port is toggled offline and then back |
| 1152 | * online. This toggling action can cause this routine to delay up to a few |
| 1153 | * seconds. When configured to use the internal LUN feature of the AFU, a |
| 1154 | * failure to come online is overridden. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1155 | */ |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 1156 | static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs, |
| 1157 | u64 wwpn) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1158 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1159 | struct cxlflash_cfg *cfg = afu->parent; |
| 1160 | struct device *dev = &cfg->dev->dev; |
| 1161 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1162 | set_port_offline(fc_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1163 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1164 | FC_PORT_STATUS_RETRY_CNT)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1165 | dev_dbg(dev, "%s: wait on port %d to go offline timed out\n", |
| 1166 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1167 | } |
| 1168 | |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 1169 | writeq_be(wwpn, &fc_regs[FC_PNAME / 8]); |
Matthew R. Ochs | 964497b | 2015-10-21 15:13:54 -0500 | [diff] [blame] | 1170 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1171 | set_port_online(fc_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1172 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1173 | FC_PORT_STATUS_RETRY_CNT)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1174 | dev_dbg(dev, "%s: wait on port %d to go online timed out\n", |
| 1175 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1176 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1177 | } |
| 1178 | |
| 1179 | /** |
| 1180 | * afu_link_reset() - resets the specified host FC port |
| 1181 | * @afu: AFU associated with the host that owns the specified FC port. |
| 1182 | * @port: Port number being configured. |
| 1183 | * @fc_regs: Top of MMIO region defined for specified port. |
| 1184 | * |
| 1185 | * The provided MMIO region must be mapped prior to call. The sequence to |
| 1186 | * reset the port involves toggling it offline and then back online. This |
| 1187 | * action can cause this routine to delay up to a few seconds. An effort |
| 1188 | * is made to maintain link with the device by switching to host to use |
| 1189 | * the alternate port exclusively while the reset takes place. |
| 1190 | * failure to come online is overridden. |
| 1191 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1192 | static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1193 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1194 | struct cxlflash_cfg *cfg = afu->parent; |
| 1195 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1196 | u64 port_sel; |
| 1197 | |
| 1198 | /* first switch the AFU to the other links, if any */ |
| 1199 | port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); |
Dan Carpenter | 4da74db | 2015-08-18 11:57:43 +0300 | [diff] [blame] | 1200 | port_sel &= ~(1ULL << port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1201 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
| 1202 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); |
| 1203 | |
| 1204 | set_port_offline(fc_regs); |
| 1205 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1206 | FC_PORT_STATUS_RETRY_CNT)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1207 | dev_err(dev, "%s: wait on port %d to go offline timed out\n", |
| 1208 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1209 | |
| 1210 | set_port_online(fc_regs); |
| 1211 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1212 | FC_PORT_STATUS_RETRY_CNT)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1213 | dev_err(dev, "%s: wait on port %d to go online timed out\n", |
| 1214 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1215 | |
| 1216 | /* switch back to include this port */ |
Dan Carpenter | 4da74db | 2015-08-18 11:57:43 +0300 | [diff] [blame] | 1217 | port_sel |= (1ULL << port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1218 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
| 1219 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); |
| 1220 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1221 | dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1222 | } |
| 1223 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1224 | /** |
| 1225 | * afu_err_intr_init() - clears and initializes the AFU for error interrupts |
| 1226 | * @afu: AFU associated with the host. |
| 1227 | */ |
| 1228 | static void afu_err_intr_init(struct afu *afu) |
| 1229 | { |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1230 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1231 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1232 | int i; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1233 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1234 | u64 reg; |
| 1235 | |
| 1236 | /* global async interrupts: AFU clears afu_ctrl on context exit |
| 1237 | * if async interrupts were sent to that context. This prevents |
| 1238 | * the AFU form sending further async interrupts when |
| 1239 | * there is |
| 1240 | * nobody to receive them. |
| 1241 | */ |
| 1242 | |
| 1243 | /* mask all */ |
| 1244 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1245 | /* set LISN# to send and point to primary master context */ |
| 1246 | reg = ((u64) (((hwq->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1247 | |
| 1248 | if (afu->internal_lun) |
| 1249 | reg |= 1; /* Bit 63 indicates local lun */ |
| 1250 | writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl); |
| 1251 | /* clear all */ |
| 1252 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); |
| 1253 | /* unmask bits that are of interest */ |
| 1254 | /* note: afu can send an interrupt after this step */ |
| 1255 | writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask); |
| 1256 | /* clear again in case a bit came on after previous clear but before */ |
| 1257 | /* unmask */ |
| 1258 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); |
| 1259 | |
| 1260 | /* Clear/Set internal lun bits */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1261 | fc_port_regs = get_fc_port_regs(cfg, 0); |
| 1262 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1263 | reg &= SISL_FC_INTERNAL_MASK; |
| 1264 | if (afu->internal_lun) |
| 1265 | reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT); |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1266 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1267 | |
| 1268 | /* now clear FC errors */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1269 | for (i = 0; i < cfg->num_fc_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1270 | fc_port_regs = get_fc_port_regs(cfg, i); |
| 1271 | |
| 1272 | writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]); |
| 1273 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1274 | } |
| 1275 | |
| 1276 | /* sync interrupts for master's IOARRIN write */ |
| 1277 | /* note that unlike asyncs, there can be no pending sync interrupts */ |
| 1278 | /* at this time (this is a fresh context and master has not written */ |
| 1279 | /* IOARRIN yet), so there is nothing to clear. */ |
| 1280 | |
| 1281 | /* set LISN#, it is always sent to the context that wrote IOARRIN */ |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 1282 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1283 | hwq = get_hwq(afu, i); |
| 1284 | |
| 1285 | writeq_be(SISL_MSI_SYNC_ERROR, &hwq->host_map->ctx_ctrl); |
| 1286 | writeq_be(SISL_ISTATUS_MASK, &hwq->host_map->intr_mask); |
| 1287 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1288 | } |
| 1289 | |
| 1290 | /** |
| 1291 | * cxlflash_sync_err_irq() - interrupt handler for synchronous errors |
| 1292 | * @irq: Interrupt number. |
| 1293 | * @data: Private data provided at interrupt registration, the AFU. |
| 1294 | * |
| 1295 | * Return: Always return IRQ_HANDLED. |
| 1296 | */ |
| 1297 | static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) |
| 1298 | { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1299 | struct hwq *hwq = (struct hwq *)data; |
| 1300 | struct cxlflash_cfg *cfg = hwq->afu->parent; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1301 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1302 | u64 reg; |
| 1303 | u64 reg_unmasked; |
| 1304 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1305 | reg = readq_be(&hwq->host_map->intr_status); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1306 | reg_unmasked = (reg & SISL_ISTATUS_UNMASK); |
| 1307 | |
| 1308 | if (reg_unmasked == 0UL) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1309 | dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n", |
| 1310 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1311 | goto cxlflash_sync_err_irq_exit; |
| 1312 | } |
| 1313 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1314 | dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n", |
| 1315 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1316 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1317 | writeq_be(reg_unmasked, &hwq->host_map->intr_clear); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1318 | |
| 1319 | cxlflash_sync_err_irq_exit: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1320 | return IRQ_HANDLED; |
| 1321 | } |
| 1322 | |
| 1323 | /** |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1324 | * process_hrrq() - process the read-response queue |
| 1325 | * @afu: AFU associated with the host. |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1326 | * @doneq: Queue of commands harvested from the RRQ. |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1327 | * @budget: Threshold of RRQ entries to process. |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1328 | * |
| 1329 | * This routine must be called holding the disabled RRQ spin lock. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1330 | * |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1331 | * Return: The number of entries processed. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1332 | */ |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1333 | static int process_hrrq(struct hwq *hwq, struct list_head *doneq, int budget) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1334 | { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1335 | struct afu *afu = hwq->afu; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1336 | struct afu_cmd *cmd; |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1337 | struct sisl_ioasa *ioasa; |
| 1338 | struct sisl_ioarcb *ioarcb; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1339 | bool toggle = hwq->toggle; |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1340 | int num_hrrq = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1341 | u64 entry, |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1342 | *hrrq_start = hwq->hrrq_start, |
| 1343 | *hrrq_end = hwq->hrrq_end, |
| 1344 | *hrrq_curr = hwq->hrrq_curr; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1345 | |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1346 | /* Process ready RRQ entries up to the specified budget (if any) */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1347 | while (true) { |
| 1348 | entry = *hrrq_curr; |
| 1349 | |
| 1350 | if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle) |
| 1351 | break; |
| 1352 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1353 | entry &= ~SISL_RESP_HANDLE_T_BIT; |
| 1354 | |
| 1355 | if (afu_is_sq_cmd_mode(afu)) { |
| 1356 | ioasa = (struct sisl_ioasa *)entry; |
| 1357 | cmd = container_of(ioasa, struct afu_cmd, sa); |
| 1358 | } else { |
| 1359 | ioarcb = (struct sisl_ioarcb *)entry; |
| 1360 | cmd = container_of(ioarcb, struct afu_cmd, rcb); |
| 1361 | } |
| 1362 | |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1363 | list_add_tail(&cmd->queue, doneq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1364 | |
| 1365 | /* Advance to next entry or wrap and flip the toggle bit */ |
| 1366 | if (hrrq_curr < hrrq_end) |
| 1367 | hrrq_curr++; |
| 1368 | else { |
| 1369 | hrrq_curr = hrrq_start; |
| 1370 | toggle ^= SISL_RESP_HANDLE_T_BIT; |
| 1371 | } |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1372 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1373 | atomic_inc(&hwq->hsq_credits); |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1374 | num_hrrq++; |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1375 | |
| 1376 | if (budget > 0 && num_hrrq >= budget) |
| 1377 | break; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1378 | } |
| 1379 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1380 | hwq->hrrq_curr = hrrq_curr; |
| 1381 | hwq->toggle = toggle; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1382 | |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1383 | return num_hrrq; |
| 1384 | } |
| 1385 | |
| 1386 | /** |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1387 | * process_cmd_doneq() - process a queue of harvested RRQ commands |
| 1388 | * @doneq: Queue of completed commands. |
| 1389 | * |
| 1390 | * Note that upon return the queue can no longer be trusted. |
| 1391 | */ |
| 1392 | static void process_cmd_doneq(struct list_head *doneq) |
| 1393 | { |
| 1394 | struct afu_cmd *cmd, *tmp; |
| 1395 | |
| 1396 | WARN_ON(list_empty(doneq)); |
| 1397 | |
| 1398 | list_for_each_entry_safe(cmd, tmp, doneq, queue) |
| 1399 | cmd_complete(cmd); |
| 1400 | } |
| 1401 | |
| 1402 | /** |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1403 | * cxlflash_irqpoll() - process a queue of harvested RRQ commands |
| 1404 | * @irqpoll: IRQ poll structure associated with queue to poll. |
| 1405 | * @budget: Threshold of RRQ entries to process per poll. |
| 1406 | * |
| 1407 | * Return: The number of entries processed. |
| 1408 | */ |
| 1409 | static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget) |
| 1410 | { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1411 | struct hwq *hwq = container_of(irqpoll, struct hwq, irqpoll); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1412 | unsigned long hrrq_flags; |
| 1413 | LIST_HEAD(doneq); |
| 1414 | int num_entries = 0; |
| 1415 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1416 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1417 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1418 | num_entries = process_hrrq(hwq, &doneq, budget); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1419 | if (num_entries < budget) |
| 1420 | irq_poll_complete(irqpoll); |
| 1421 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1422 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1423 | |
| 1424 | process_cmd_doneq(&doneq); |
| 1425 | return num_entries; |
| 1426 | } |
| 1427 | |
| 1428 | /** |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1429 | * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) |
| 1430 | * @irq: Interrupt number. |
| 1431 | * @data: Private data provided at interrupt registration, the AFU. |
| 1432 | * |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1433 | * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found. |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1434 | */ |
| 1435 | static irqreturn_t cxlflash_rrq_irq(int irq, void *data) |
| 1436 | { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1437 | struct hwq *hwq = (struct hwq *)data; |
| 1438 | struct afu *afu = hwq->afu; |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1439 | unsigned long hrrq_flags; |
| 1440 | LIST_HEAD(doneq); |
| 1441 | int num_entries = 0; |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame] | 1442 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1443 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1444 | |
| 1445 | if (afu_is_irqpoll_enabled(afu)) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1446 | irq_poll_sched(&hwq->irqpoll); |
| 1447 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 1448 | return IRQ_HANDLED; |
| 1449 | } |
| 1450 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1451 | num_entries = process_hrrq(hwq, &doneq, -1); |
| 1452 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); |
Matthew R. Ochs | f918b4a | 2017-04-12 14:12:55 -0500 | [diff] [blame] | 1453 | |
| 1454 | if (num_entries == 0) |
| 1455 | return IRQ_NONE; |
| 1456 | |
| 1457 | process_cmd_doneq(&doneq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1458 | return IRQ_HANDLED; |
| 1459 | } |
| 1460 | |
Matthew R. Ochs | e2ef33f | 2017-04-12 14:15:29 -0500 | [diff] [blame] | 1461 | /* |
| 1462 | * Asynchronous interrupt information table |
| 1463 | * |
| 1464 | * NOTE: |
| 1465 | * - Order matters here as this array is indexed by bit position. |
| 1466 | * |
| 1467 | * - The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro |
| 1468 | * as complex and complains due to a lack of parentheses/braces. |
| 1469 | */ |
| 1470 | #define ASTATUS_FC(_a, _b, _c, _d) \ |
| 1471 | { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) } |
| 1472 | |
| 1473 | #define BUILD_SISL_ASTATUS_FC_PORT(_a) \ |
| 1474 | ASTATUS_FC(_a, LINK_UP, "link up", 0), \ |
| 1475 | ASTATUS_FC(_a, LINK_DN, "link down", 0), \ |
| 1476 | ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \ |
| 1477 | ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \ |
| 1478 | ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \ |
| 1479 | ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \ |
| 1480 | ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \ |
| 1481 | ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET) |
| 1482 | |
| 1483 | static const struct asyc_intr_info ainfo[] = { |
| 1484 | BUILD_SISL_ASTATUS_FC_PORT(1), |
| 1485 | BUILD_SISL_ASTATUS_FC_PORT(0), |
| 1486 | BUILD_SISL_ASTATUS_FC_PORT(3), |
| 1487 | BUILD_SISL_ASTATUS_FC_PORT(2) |
| 1488 | }; |
| 1489 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1490 | /** |
| 1491 | * cxlflash_async_err_irq() - interrupt handler for asynchronous errors |
| 1492 | * @irq: Interrupt number. |
| 1493 | * @data: Private data provided at interrupt registration, the AFU. |
| 1494 | * |
| 1495 | * Return: Always return IRQ_HANDLED. |
| 1496 | */ |
| 1497 | static irqreturn_t cxlflash_async_err_irq(int irq, void *data) |
| 1498 | { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1499 | struct hwq *hwq = (struct hwq *)data; |
| 1500 | struct afu *afu = hwq->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1501 | struct cxlflash_cfg *cfg = afu->parent; |
| 1502 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1503 | const struct asyc_intr_info *info; |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1504 | struct sisl_global_map __iomem *global = &afu->afu_map->global; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1505 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | e2ef33f | 2017-04-12 14:15:29 -0500 | [diff] [blame] | 1506 | u64 reg_unmasked; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1507 | u64 reg; |
Matthew R. Ochs | e2ef33f | 2017-04-12 14:15:29 -0500 | [diff] [blame] | 1508 | u64 bit; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1509 | u8 port; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1510 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1511 | reg = readq_be(&global->regs.aintr_status); |
| 1512 | reg_unmasked = (reg & SISL_ASTATUS_UNMASK); |
| 1513 | |
Matthew R. Ochs | e2ef33f | 2017-04-12 14:15:29 -0500 | [diff] [blame] | 1514 | if (unlikely(reg_unmasked == 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1515 | dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1516 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1517 | goto out; |
| 1518 | } |
| 1519 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1520 | /* FYI, it is 'okay' to clear AFU status before FC_ERROR */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1521 | writeq_be(reg_unmasked, &global->regs.aintr_clear); |
| 1522 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1523 | /* Check each bit that is on */ |
Matthew R. Ochs | e2ef33f | 2017-04-12 14:15:29 -0500 | [diff] [blame] | 1524 | for_each_set_bit(bit, (ulong *)®_unmasked, BITS_PER_LONG) { |
| 1525 | if (unlikely(bit >= ARRAY_SIZE(ainfo))) { |
| 1526 | WARN_ON_ONCE(1); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1527 | continue; |
Matthew R. Ochs | e2ef33f | 2017-04-12 14:15:29 -0500 | [diff] [blame] | 1528 | } |
| 1529 | |
| 1530 | info = &ainfo[bit]; |
| 1531 | if (unlikely(info->status != 1ULL << bit)) { |
| 1532 | WARN_ON_ONCE(1); |
| 1533 | continue; |
| 1534 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1535 | |
| 1536 | port = info->port; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1537 | fc_port_regs = get_fc_port_regs(cfg, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1538 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1539 | dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1540 | __func__, port, info->desc, |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1541 | readq_be(&fc_port_regs[FC_STATUS / 8])); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1542 | |
| 1543 | /* |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1544 | * Do link reset first, some OTHER errors will set FC_ERROR |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1545 | * again if cleared before or w/o a reset |
| 1546 | */ |
| 1547 | if (info->action & LINK_RESET) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1548 | dev_err(dev, "%s: FC Port %d: resetting link\n", |
| 1549 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1550 | cfg->lr_state = LINK_RESET_REQUIRED; |
| 1551 | cfg->lr_port = port; |
| 1552 | schedule_work(&cfg->work_q); |
| 1553 | } |
| 1554 | |
| 1555 | if (info->action & CLR_FC_ERROR) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1556 | reg = readq_be(&fc_port_regs[FC_ERROR / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1557 | |
| 1558 | /* |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1559 | * Since all errors are unmasked, FC_ERROR and FC_ERRCAP |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1560 | * should be the same and tracing one is sufficient. |
| 1561 | */ |
| 1562 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1563 | dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1564 | __func__, port, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1565 | |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1566 | writeq_be(reg, &fc_port_regs[FC_ERROR / 8]); |
| 1567 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1568 | } |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 1569 | |
| 1570 | if (info->action & SCAN_HOST) { |
| 1571 | atomic_inc(&cfg->scan_host_needed); |
| 1572 | schedule_work(&cfg->work_q); |
| 1573 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1574 | } |
| 1575 | |
| 1576 | out: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1577 | return IRQ_HANDLED; |
| 1578 | } |
| 1579 | |
| 1580 | /** |
| 1581 | * start_context() - starts the master context |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1582 | * @cfg: Internal structure associated with the host. |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1583 | * @index: Index of the hardware queue. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1584 | * |
| 1585 | * Return: A success or failure value from CXL services. |
| 1586 | */ |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1587 | static int start_context(struct cxlflash_cfg *cfg, u32 index) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1588 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1589 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1590 | struct hwq *hwq = get_hwq(cfg->afu, index); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1591 | int rc = 0; |
| 1592 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1593 | rc = cxl_start_context(hwq->ctx, |
| 1594 | hwq->work.work_element_descriptor, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1595 | NULL); |
| 1596 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1597 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1598 | return rc; |
| 1599 | } |
| 1600 | |
| 1601 | /** |
| 1602 | * read_vpd() - obtains the WWPNs from VPD |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1603 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1604 | * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1605 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1606 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1607 | */ |
| 1608 | static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) |
| 1609 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1610 | struct device *dev = &cfg->dev->dev; |
| 1611 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1612 | int rc = 0; |
| 1613 | int ro_start, ro_size, i, j, k; |
| 1614 | ssize_t vpd_size; |
| 1615 | char vpd_data[CXLFLASH_VPD_LEN]; |
| 1616 | char tmp_buf[WWPN_BUF_LEN] = { 0 }; |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 1617 | char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" }; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1618 | |
| 1619 | /* Get the VPD data from the device */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1620 | vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data)); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1621 | if (unlikely(vpd_size <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1622 | dev_err(dev, "%s: Unable to read VPD (size = %ld)\n", |
| 1623 | __func__, vpd_size); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1624 | rc = -ENODEV; |
| 1625 | goto out; |
| 1626 | } |
| 1627 | |
| 1628 | /* Get the read only section offset */ |
| 1629 | ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, |
| 1630 | PCI_VPD_LRDT_RO_DATA); |
| 1631 | if (unlikely(ro_start < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1632 | dev_err(dev, "%s: VPD Read-only data not found\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1633 | rc = -ENODEV; |
| 1634 | goto out; |
| 1635 | } |
| 1636 | |
| 1637 | /* Get the read only section size, cap when extends beyond read VPD */ |
| 1638 | ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); |
| 1639 | j = ro_size; |
| 1640 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; |
| 1641 | if (unlikely((i + j) > vpd_size)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1642 | dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n", |
| 1643 | __func__, (i + j), vpd_size); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1644 | ro_size = vpd_size - i; |
| 1645 | } |
| 1646 | |
| 1647 | /* |
| 1648 | * Find the offset of the WWPN tag within the read only |
| 1649 | * VPD data and validate the found field (partials are |
| 1650 | * no good to us). Convert the ASCII data to an integer |
| 1651 | * value. Note that we must copy to a temporary buffer |
| 1652 | * because the conversion service requires that the ASCII |
| 1653 | * string be terminated. |
| 1654 | */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1655 | for (k = 0; k < cfg->num_fc_ports; k++) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1656 | j = ro_size; |
| 1657 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; |
| 1658 | |
| 1659 | i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]); |
| 1660 | if (unlikely(i < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1661 | dev_err(dev, "%s: Port %d WWPN not found in VPD\n", |
| 1662 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1663 | rc = -ENODEV; |
| 1664 | goto out; |
| 1665 | } |
| 1666 | |
| 1667 | j = pci_vpd_info_field_size(&vpd_data[i]); |
| 1668 | i += PCI_VPD_INFO_FLD_HDR_SIZE; |
| 1669 | if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1670 | dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n", |
| 1671 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1672 | rc = -ENODEV; |
| 1673 | goto out; |
| 1674 | } |
| 1675 | |
| 1676 | memcpy(tmp_buf, &vpd_data[i], WWPN_LEN); |
| 1677 | rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]); |
| 1678 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1679 | dev_err(dev, "%s: WWPN conversion failed for port %d\n", |
| 1680 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1681 | rc = -ENODEV; |
| 1682 | goto out; |
| 1683 | } |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1684 | |
| 1685 | dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1686 | } |
| 1687 | |
| 1688 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1689 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1690 | return rc; |
| 1691 | } |
| 1692 | |
| 1693 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1694 | * init_pcr() - initialize the provisioning and control registers |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1695 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1696 | * |
| 1697 | * Also sets up fast access to the mapped registers and initializes AFU |
| 1698 | * command fields that never change. |
| 1699 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1700 | static void init_pcr(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1701 | { |
| 1702 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1703 | struct sisl_ctrl_map __iomem *ctrl_map; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1704 | struct hwq *hwq; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1705 | int i; |
| 1706 | |
| 1707 | for (i = 0; i < MAX_CONTEXT; i++) { |
| 1708 | ctrl_map = &afu->afu_map->ctrls[i].ctrl; |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1709 | /* Disrupt any clients that could be running */ |
| 1710 | /* e.g. clients that survived a master restart */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1711 | writeq_be(0, &ctrl_map->rht_start); |
| 1712 | writeq_be(0, &ctrl_map->rht_cnt_id); |
| 1713 | writeq_be(0, &ctrl_map->ctx_cap); |
| 1714 | } |
| 1715 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1716 | /* Copy frequently used fields into hwq */ |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 1717 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1718 | hwq = get_hwq(afu, i); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1719 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1720 | hwq->ctx_hndl = (u16) cxl_process_element(hwq->ctx); |
| 1721 | hwq->host_map = &afu->afu_map->hosts[hwq->ctx_hndl].host; |
| 1722 | hwq->ctrl_map = &afu->afu_map->ctrls[hwq->ctx_hndl].ctrl; |
| 1723 | |
| 1724 | /* Program the Endian Control for the master context */ |
| 1725 | writeq_be(SISL_ENDIAN_CTRL, &hwq->host_map->endian_ctrl); |
| 1726 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1727 | } |
| 1728 | |
| 1729 | /** |
| 1730 | * init_global() - initialize AFU global registers |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1731 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1732 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1733 | static int init_global(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1734 | { |
| 1735 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1736 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1737 | struct hwq *hwq; |
| 1738 | struct sisl_host_map __iomem *hmap; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1739 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1740 | u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1741 | int i = 0, num_ports = 0; |
| 1742 | int rc = 0; |
| 1743 | u64 reg; |
| 1744 | |
| 1745 | rc = read_vpd(cfg, &wwpn[0]); |
| 1746 | if (rc) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1747 | dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1748 | goto out; |
| 1749 | } |
| 1750 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1751 | /* Set up RRQ and SQ in HWQ for master issued cmds */ |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 1752 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1753 | hwq = get_hwq(afu, i); |
| 1754 | hmap = hwq->host_map; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1755 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1756 | writeq_be((u64) hwq->hrrq_start, &hmap->rrq_start); |
| 1757 | writeq_be((u64) hwq->hrrq_end, &hmap->rrq_end); |
| 1758 | |
| 1759 | if (afu_is_sq_cmd_mode(afu)) { |
| 1760 | writeq_be((u64)hwq->hsq_start, &hmap->sq_start); |
| 1761 | writeq_be((u64)hwq->hsq_end, &hmap->sq_end); |
| 1762 | } |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1763 | } |
| 1764 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1765 | /* AFU configuration */ |
| 1766 | reg = readq_be(&afu->afu_map->global.regs.afu_config); |
| 1767 | reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN; |
| 1768 | /* enable all auto retry options and control endianness */ |
| 1769 | /* leave others at default: */ |
| 1770 | /* CTX_CAP write protected, mbox_r does not clear on read and */ |
| 1771 | /* checker on if dual afu */ |
| 1772 | writeq_be(reg, &afu->afu_map->global.regs.afu_config); |
| 1773 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1774 | /* Global port select: select either port */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1775 | if (afu->internal_lun) { |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1776 | /* Only use port 0 */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1777 | writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel); |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1778 | num_ports = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1779 | } else { |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 1780 | writeq_be(PORT_MASK(cfg->num_fc_ports), |
| 1781 | &afu->afu_map->global.regs.afu_port_sel); |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 1782 | num_ports = cfg->num_fc_ports; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1783 | } |
| 1784 | |
| 1785 | for (i = 0; i < num_ports; i++) { |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1786 | fc_port_regs = get_fc_port_regs(cfg, i); |
| 1787 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1788 | /* Unmask all errors (but they are still masked at AFU) */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1789 | writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]); |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1790 | /* Clear CRC error cnt & set a threshold */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1791 | (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]); |
| 1792 | writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1793 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1794 | /* Set WWPNs. If already programmed, wwpn[i] is 0 */ |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 1795 | if (wwpn[i] != 0) |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 1796 | afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1797 | /* Programming WWPN back to back causes additional |
| 1798 | * offline/online transitions and a PLOGI |
| 1799 | */ |
| 1800 | msleep(100); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1801 | } |
| 1802 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1803 | /* Set up master's own CTX_CAP to allow real mode, host translation */ |
| 1804 | /* tables, afu cmds and read/write GSCSI cmds. */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1805 | /* First, unlock ctx_cap write by reading mbox */ |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 1806 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1807 | hwq = get_hwq(afu, i); |
| 1808 | |
| 1809 | (void)readq_be(&hwq->ctrl_map->mbox_r); /* unlock ctx_cap */ |
| 1810 | writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | |
| 1811 | SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | |
| 1812 | SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), |
| 1813 | &hwq->ctrl_map->ctx_cap); |
| 1814 | } |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1815 | /* Initialize heartbeat */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1816 | afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1817 | out: |
| 1818 | return rc; |
| 1819 | } |
| 1820 | |
| 1821 | /** |
| 1822 | * start_afu() - initializes and starts the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1823 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1824 | */ |
| 1825 | static int start_afu(struct cxlflash_cfg *cfg) |
| 1826 | { |
| 1827 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1828 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1829 | struct hwq *hwq; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1830 | int rc = 0; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1831 | int i; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1832 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1833 | init_pcr(cfg); |
| 1834 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1835 | /* Initialize each HWQ */ |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 1836 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1837 | hwq = get_hwq(afu, i); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1838 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1839 | /* After an AFU reset, RRQ entries are stale, clear them */ |
| 1840 | memset(&hwq->rrq_entry, 0, sizeof(hwq->rrq_entry)); |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1841 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1842 | /* Initialize RRQ pointers */ |
| 1843 | hwq->hrrq_start = &hwq->rrq_entry[0]; |
| 1844 | hwq->hrrq_end = &hwq->rrq_entry[NUM_RRQ_ENTRY - 1]; |
| 1845 | hwq->hrrq_curr = hwq->hrrq_start; |
| 1846 | hwq->toggle = 1; |
Uma Krishnan | 66ea9bc | 2017-06-21 21:13:32 -0500 | [diff] [blame] | 1847 | |
| 1848 | /* Initialize spin locks */ |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1849 | spin_lock_init(&hwq->hrrq_slock); |
Uma Krishnan | 66ea9bc | 2017-06-21 21:13:32 -0500 | [diff] [blame] | 1850 | spin_lock_init(&hwq->hsq_slock); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1851 | |
| 1852 | /* Initialize SQ */ |
| 1853 | if (afu_is_sq_cmd_mode(afu)) { |
| 1854 | memset(&hwq->sq, 0, sizeof(hwq->sq)); |
| 1855 | hwq->hsq_start = &hwq->sq[0]; |
| 1856 | hwq->hsq_end = &hwq->sq[NUM_SQ_ENTRY - 1]; |
| 1857 | hwq->hsq_curr = hwq->hsq_start; |
| 1858 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1859 | atomic_set(&hwq->hsq_credits, NUM_SQ_ENTRY - 1); |
| 1860 | } |
| 1861 | |
| 1862 | /* Initialize IRQ poll */ |
| 1863 | if (afu_is_irqpoll_enabled(afu)) |
| 1864 | irq_poll_init(&hwq->irqpoll, afu->irqpoll_weight, |
| 1865 | cxlflash_irqpoll); |
| 1866 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1867 | } |
| 1868 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1869 | rc = init_global(cfg); |
| 1870 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1871 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1872 | return rc; |
| 1873 | } |
| 1874 | |
| 1875 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1876 | * init_intr() - setup interrupt handlers for the master context |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1877 | * @cfg: Internal structure associated with the host. |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1878 | * @hwq: Hardware queue to initialize. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1879 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1880 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1881 | */ |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1882 | static enum undo_level init_intr(struct cxlflash_cfg *cfg, |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1883 | struct hwq *hwq) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1884 | { |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1885 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1886 | struct cxl_context *ctx = hwq->ctx; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1887 | int rc = 0; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1888 | enum undo_level level = UNDO_NOOP; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1889 | bool is_primary_hwq = (hwq->index == PRIMARY_HWQ); |
| 1890 | int num_irqs = is_primary_hwq ? 3 : 2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1891 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1892 | rc = cxl_allocate_afu_irqs(ctx, num_irqs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1893 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1894 | dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n", |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1895 | __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1896 | level = UNDO_NOOP; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1897 | goto out; |
| 1898 | } |
| 1899 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1900 | rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, hwq, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1901 | "SISL_MSI_SYNC_ERROR"); |
| 1902 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1903 | dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1904 | level = FREE_IRQ; |
| 1905 | goto out; |
| 1906 | } |
| 1907 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1908 | rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, hwq, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1909 | "SISL_MSI_RRQ_UPDATED"); |
| 1910 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1911 | dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1912 | level = UNMAP_ONE; |
| 1913 | goto out; |
| 1914 | } |
| 1915 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1916 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
| 1917 | if (!is_primary_hwq) |
| 1918 | goto out; |
| 1919 | |
| 1920 | rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, hwq, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1921 | "SISL_MSI_ASYNC_ERROR"); |
| 1922 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1923 | dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1924 | level = UNMAP_TWO; |
| 1925 | goto out; |
| 1926 | } |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1927 | out: |
| 1928 | return level; |
| 1929 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1930 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1931 | /** |
| 1932 | * init_mc() - create and register as the master context |
| 1933 | * @cfg: Internal structure associated with the host. |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1934 | * index: HWQ Index of the master context. |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1935 | * |
| 1936 | * Return: 0 on success, -errno on failure |
| 1937 | */ |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1938 | static int init_mc(struct cxlflash_cfg *cfg, u32 index) |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1939 | { |
| 1940 | struct cxl_context *ctx; |
| 1941 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1942 | struct hwq *hwq = get_hwq(cfg->afu, index); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1943 | int rc = 0; |
| 1944 | enum undo_level level; |
| 1945 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1946 | hwq->afu = cfg->afu; |
| 1947 | hwq->index = index; |
Uma Krishnan | a002bf8 | 2017-06-21 21:14:43 -0500 | [diff] [blame] | 1948 | INIT_LIST_HEAD(&hwq->pending_cmds); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1949 | |
| 1950 | if (index == PRIMARY_HWQ) |
| 1951 | ctx = cxl_get_context(cfg->dev); |
| 1952 | else |
| 1953 | ctx = cxl_dev_context_init(cfg->dev); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1954 | if (unlikely(!ctx)) { |
| 1955 | rc = -ENOMEM; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1956 | goto err1; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1957 | } |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1958 | |
| 1959 | WARN_ON(hwq->ctx); |
| 1960 | hwq->ctx = ctx; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1961 | |
| 1962 | /* Set it up as a master with the CXL */ |
| 1963 | cxl_set_master(ctx); |
| 1964 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1965 | /* Reset AFU when initializing primary context */ |
| 1966 | if (index == PRIMARY_HWQ) { |
| 1967 | rc = cxl_afu_reset(ctx); |
| 1968 | if (unlikely(rc)) { |
| 1969 | dev_err(dev, "%s: AFU reset failed rc=%d\n", |
| 1970 | __func__, rc); |
| 1971 | goto err1; |
| 1972 | } |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1973 | } |
| 1974 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1975 | level = init_intr(cfg, hwq); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1976 | if (unlikely(level)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1977 | dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc); |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1978 | goto err2; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1979 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1980 | |
| 1981 | /* This performs the equivalent of the CXL_IOCTL_START_WORK. |
| 1982 | * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process |
| 1983 | * element (pe) that is embedded in the context (ctx) |
| 1984 | */ |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1985 | rc = start_context(cfg, index); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1986 | if (unlikely(rc)) { |
| 1987 | dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc); |
| 1988 | level = UNMAP_THREE; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1989 | goto err2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1990 | } |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1991 | |
| 1992 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1993 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1994 | return rc; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 1995 | err2: |
| 1996 | term_intr(cfg, level, index); |
| 1997 | if (index != PRIMARY_HWQ) |
| 1998 | cxl_release_context(ctx); |
| 1999 | err1: |
| 2000 | hwq->ctx = NULL; |
| 2001 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2002 | } |
| 2003 | |
| 2004 | /** |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 2005 | * get_num_afu_ports() - determines and configures the number of AFU ports |
| 2006 | * @cfg: Internal structure associated with the host. |
| 2007 | * |
| 2008 | * This routine determines the number of AFU ports by converting the global |
| 2009 | * port selection mask. The converted value is only valid following an AFU |
| 2010 | * reset (explicit or power-on). This routine must be invoked shortly after |
| 2011 | * mapping as other routines are dependent on the number of ports during the |
| 2012 | * initialization sequence. |
| 2013 | * |
| 2014 | * To support legacy AFUs that might not have reflected an initial global |
| 2015 | * port mask (value read is 0), default to the number of ports originally |
| 2016 | * supported by the cxlflash driver (2) before hardware with other port |
| 2017 | * offerings was introduced. |
| 2018 | */ |
| 2019 | static void get_num_afu_ports(struct cxlflash_cfg *cfg) |
| 2020 | { |
| 2021 | struct afu *afu = cfg->afu; |
| 2022 | struct device *dev = &cfg->dev->dev; |
| 2023 | u64 port_mask; |
| 2024 | int num_fc_ports = LEGACY_FC_PORTS; |
| 2025 | |
| 2026 | port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel); |
| 2027 | if (port_mask != 0ULL) |
| 2028 | num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS); |
| 2029 | |
| 2030 | dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n", |
| 2031 | __func__, port_mask, num_fc_ports); |
| 2032 | |
| 2033 | cfg->num_fc_ports = num_fc_ports; |
| 2034 | cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports); |
| 2035 | } |
| 2036 | |
| 2037 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2038 | * init_afu() - setup as master context and start AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 2039 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2040 | * |
| 2041 | * This routine is a higher level of control for configuring the |
| 2042 | * AFU on probe and reset paths. |
| 2043 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 2044 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2045 | */ |
| 2046 | static int init_afu(struct cxlflash_cfg *cfg) |
| 2047 | { |
| 2048 | u64 reg; |
| 2049 | int rc = 0; |
| 2050 | struct afu *afu = cfg->afu; |
| 2051 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2052 | struct hwq *hwq; |
| 2053 | int i; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2054 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2055 | cxl_perst_reloads_same_image(cfg->cxl_afu, true); |
| 2056 | |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 2057 | afu->num_hwqs = afu->desired_hwqs; |
| 2058 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2059 | rc = init_mc(cfg, i); |
| 2060 | if (rc) { |
| 2061 | dev_err(dev, "%s: init_mc failed rc=%d index=%d\n", |
| 2062 | __func__, rc, i); |
| 2063 | goto err1; |
| 2064 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2065 | } |
| 2066 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2067 | /* Map the entire MMIO space of the AFU using the first context */ |
| 2068 | hwq = get_hwq(afu, PRIMARY_HWQ); |
| 2069 | afu->afu_map = cxl_psa_map(hwq->ctx); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2070 | if (!afu->afu_map) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2071 | dev_err(dev, "%s: cxl_psa_map failed\n", __func__); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 2072 | rc = -ENOMEM; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2073 | goto err1; |
| 2074 | } |
| 2075 | |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 2076 | /* No byte reverse on reading afu_version or string will be backwards */ |
| 2077 | reg = readq(&afu->afu_map->global.regs.afu_version); |
| 2078 | memcpy(afu->version, ®, sizeof(reg)); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2079 | afu->interface_version = |
| 2080 | readq_be(&afu->afu_map->global.regs.interface_version); |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 2081 | if ((afu->interface_version + 1) == 0) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2082 | dev_err(dev, "Back level AFU, please upgrade. AFU version %s " |
| 2083 | "interface version %016llx\n", afu->version, |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 2084 | afu->interface_version); |
| 2085 | rc = -EINVAL; |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 2086 | goto err1; |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 2087 | } |
| 2088 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 2089 | if (afu_is_sq_cmd_mode(afu)) { |
| 2090 | afu->send_cmd = send_cmd_sq; |
| 2091 | afu->context_reset = context_reset_sq; |
| 2092 | } else { |
| 2093 | afu->send_cmd = send_cmd_ioarrin; |
| 2094 | afu->context_reset = context_reset_ioarrin; |
| 2095 | } |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 2096 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2097 | dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__, |
| 2098 | afu->version, afu->interface_version); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2099 | |
Matthew R. Ochs | 56518072 | 2017-04-12 14:14:28 -0500 | [diff] [blame] | 2100 | get_num_afu_ports(cfg); |
| 2101 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2102 | rc = start_afu(cfg); |
| 2103 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2104 | dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc); |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 2105 | goto err1; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2106 | } |
| 2107 | |
| 2108 | afu_err_intr_init(cfg->afu); |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 2109 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2110 | hwq = get_hwq(afu, i); |
| 2111 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2112 | hwq->room = readq_be(&hwq->host_map->cmd_room); |
| 2113 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2114 | |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 2115 | /* Restore the LUN mappings */ |
| 2116 | cxlflash_restore_luntable(cfg); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 2117 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2118 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2119 | return rc; |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 2120 | |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 2121 | err1: |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 2122 | for (i = afu->num_hwqs - 1; i >= 0; i--) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2123 | term_intr(cfg, UNMAP_THREE, i); |
| 2124 | term_mc(cfg, i); |
| 2125 | } |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 2126 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2127 | } |
| 2128 | |
| 2129 | /** |
Uma Krishnan | 0b09e71 | 2017-06-21 21:14:17 -0500 | [diff] [blame] | 2130 | * afu_reset() - resets the AFU |
| 2131 | * @cfg: Internal structure associated with the host. |
| 2132 | * |
| 2133 | * Return: 0 on success, -errno on failure |
| 2134 | */ |
| 2135 | static int afu_reset(struct cxlflash_cfg *cfg) |
| 2136 | { |
| 2137 | struct device *dev = &cfg->dev->dev; |
| 2138 | int rc = 0; |
| 2139 | |
| 2140 | /* Stop the context before the reset. Since the context is |
| 2141 | * no longer available restart it after the reset is complete |
| 2142 | */ |
| 2143 | term_afu(cfg); |
| 2144 | |
| 2145 | rc = init_afu(cfg); |
| 2146 | |
| 2147 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
| 2148 | return rc; |
| 2149 | } |
| 2150 | |
| 2151 | /** |
| 2152 | * drain_ioctls() - wait until all currently executing ioctls have completed |
| 2153 | * @cfg: Internal structure associated with the host. |
| 2154 | * |
| 2155 | * Obtain write access to read/write semaphore that wraps ioctl |
| 2156 | * handling to 'drain' ioctls currently executing. |
| 2157 | */ |
| 2158 | static void drain_ioctls(struct cxlflash_cfg *cfg) |
| 2159 | { |
| 2160 | down_write(&cfg->ioctl_rwsem); |
| 2161 | up_write(&cfg->ioctl_rwsem); |
| 2162 | } |
| 2163 | |
| 2164 | /** |
| 2165 | * cxlflash_async_reset_host() - asynchronous host reset handler |
| 2166 | * @data: Private data provided while scheduling reset. |
| 2167 | * @cookie: Cookie that can be used for checkpointing. |
| 2168 | */ |
| 2169 | static void cxlflash_async_reset_host(void *data, async_cookie_t cookie) |
| 2170 | { |
| 2171 | struct cxlflash_cfg *cfg = data; |
| 2172 | struct device *dev = &cfg->dev->dev; |
| 2173 | int rc = 0; |
| 2174 | |
| 2175 | if (cfg->state != STATE_RESET) { |
| 2176 | dev_dbg(dev, "%s: Not performing a reset, state=%d\n", |
| 2177 | __func__, cfg->state); |
| 2178 | goto out; |
| 2179 | } |
| 2180 | |
| 2181 | drain_ioctls(cfg); |
| 2182 | cxlflash_mark_contexts_error(cfg); |
| 2183 | rc = afu_reset(cfg); |
| 2184 | if (rc) |
| 2185 | cfg->state = STATE_FAILTERM; |
| 2186 | else |
| 2187 | cfg->state = STATE_NORMAL; |
| 2188 | wake_up_all(&cfg->reset_waitq); |
| 2189 | |
| 2190 | out: |
| 2191 | scsi_unblock_requests(cfg->host); |
| 2192 | } |
| 2193 | |
| 2194 | /** |
| 2195 | * cxlflash_schedule_async_reset() - schedule an asynchronous host reset |
| 2196 | * @cfg: Internal structure associated with the host. |
| 2197 | */ |
| 2198 | static void cxlflash_schedule_async_reset(struct cxlflash_cfg *cfg) |
| 2199 | { |
| 2200 | struct device *dev = &cfg->dev->dev; |
| 2201 | |
| 2202 | if (cfg->state != STATE_NORMAL) { |
| 2203 | dev_dbg(dev, "%s: Not performing reset state=%d\n", |
| 2204 | __func__, cfg->state); |
| 2205 | return; |
| 2206 | } |
| 2207 | |
| 2208 | cfg->state = STATE_RESET; |
| 2209 | scsi_block_requests(cfg->host); |
| 2210 | cfg->async_reset_cookie = async_schedule(cxlflash_async_reset_host, |
| 2211 | cfg); |
| 2212 | } |
| 2213 | |
| 2214 | /** |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2215 | * send_afu_cmd() - builds and sends an internal AFU command |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2216 | * @afu: AFU associated with the host. |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2217 | * @rcb: Pre-populated IOARCB describing command to send. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2218 | * |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2219 | * The AFU can only take one internal AFU command at a time. This limitation is |
| 2220 | * enforced by using a mutex to provide exclusive access to the AFU during the |
| 2221 | * operation. This design point requires calling threads to not be on interrupt |
| 2222 | * context due to the possibility of sleeping during concurrent AFU operations. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2223 | * |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2224 | * The command status is optionally passed back to the caller when the caller |
| 2225 | * populates the IOASA field of the IOARCB with a pointer to an IOASA structure. |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2226 | * |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2227 | * Return: |
Uma Krishnan | 539d890 | 2017-06-21 21:13:48 -0500 | [diff] [blame] | 2228 | * 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2229 | */ |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2230 | static int send_afu_cmd(struct afu *afu, struct sisl_ioarcb *rcb) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2231 | { |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2232 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 2233 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2234 | struct afu_cmd *cmd = NULL; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2235 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 2236 | char *buf = NULL; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2237 | int rc = 0; |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 2238 | int nretry = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2239 | static DEFINE_MUTEX(sync_active); |
| 2240 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2241 | if (cfg->state != STATE_NORMAL) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2242 | dev_dbg(dev, "%s: Sync not required state=%u\n", |
| 2243 | __func__, cfg->state); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2244 | return 0; |
| 2245 | } |
| 2246 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2247 | mutex_lock(&sync_active); |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 2248 | atomic_inc(&afu->cmds_active); |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 2249 | buf = kmalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 2250 | if (unlikely(!buf)) { |
| 2251 | dev_err(dev, "%s: no memory for command\n", __func__); |
Uma Krishnan | 539d890 | 2017-06-21 21:13:48 -0500 | [diff] [blame] | 2252 | rc = -ENOMEM; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2253 | goto out; |
| 2254 | } |
| 2255 | |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 2256 | cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd)); |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 2257 | |
| 2258 | retry: |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 2259 | memset(cmd, 0, sizeof(*cmd)); |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2260 | memcpy(&cmd->rcb, rcb, sizeof(*rcb)); |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 2261 | INIT_LIST_HEAD(&cmd->queue); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 2262 | init_completion(&cmd->cevent); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 2263 | cmd->parent = afu; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2264 | cmd->hwq_index = hwq->index; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2265 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2266 | |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2267 | dev_dbg(dev, "%s: afu=%p cmd=%p type=%02x nretry=%d\n", |
| 2268 | __func__, afu, cmd, cmd->rcb.cdb[0], nretry); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2269 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 2270 | rc = afu->send_cmd(afu, cmd); |
Uma Krishnan | 539d890 | 2017-06-21 21:13:48 -0500 | [diff] [blame] | 2271 | if (unlikely(rc)) { |
| 2272 | rc = -ENOBUFS; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2273 | goto out; |
Uma Krishnan | 539d890 | 2017-06-21 21:13:48 -0500 | [diff] [blame] | 2274 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2275 | |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 2276 | rc = wait_resp(afu, cmd); |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 2277 | switch (rc) { |
| 2278 | case -ETIMEDOUT: |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 2279 | rc = afu->context_reset(hwq); |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 2280 | if (rc) { |
| 2281 | cxlflash_schedule_async_reset(cfg); |
| 2282 | break; |
| 2283 | } |
| 2284 | /* fall through to retry */ |
| 2285 | case -EAGAIN: |
| 2286 | if (++nretry < 2) |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 2287 | goto retry; |
Uma Krishnan | a1ea04b | 2017-06-21 21:14:56 -0500 | [diff] [blame] | 2288 | /* fall through to exit */ |
| 2289 | default: |
| 2290 | break; |
Uma Krishnan | a96851d | 2017-06-21 21:14:02 -0500 | [diff] [blame] | 2291 | } |
| 2292 | |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2293 | if (rcb->ioasa) |
| 2294 | *rcb->ioasa = cmd->sa; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2295 | out: |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 2296 | atomic_dec(&afu->cmds_active); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2297 | mutex_unlock(&sync_active); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 2298 | kfree(buf); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2299 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2300 | return rc; |
| 2301 | } |
| 2302 | |
| 2303 | /** |
Matthew R. Ochs | cf24302 | 2017-06-21 21:15:31 -0500 | [diff] [blame] | 2304 | * cxlflash_afu_sync() - builds and sends an AFU sync command |
| 2305 | * @afu: AFU associated with the host. |
| 2306 | * @ctx: Identifies context requesting sync. |
| 2307 | * @res: Identifies resource requesting sync. |
| 2308 | * @mode: Type of sync to issue (lightweight, heavyweight, global). |
| 2309 | * |
| 2310 | * AFU sync operations are only necessary and allowed when the device is |
| 2311 | * operating normally. When not operating normally, sync requests can occur as |
| 2312 | * part of cleaning up resources associated with an adapter prior to removal. |
| 2313 | * In this scenario, these requests are simply ignored (safe due to the AFU |
| 2314 | * going away). |
| 2315 | * |
| 2316 | * Return: |
| 2317 | * 0 on success, -errno on failure |
| 2318 | */ |
| 2319 | int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx, res_hndl_t res, u8 mode) |
| 2320 | { |
| 2321 | struct cxlflash_cfg *cfg = afu->parent; |
| 2322 | struct device *dev = &cfg->dev->dev; |
| 2323 | struct sisl_ioarcb rcb = { 0 }; |
| 2324 | |
| 2325 | dev_dbg(dev, "%s: afu=%p ctx=%u res=%u mode=%u\n", |
| 2326 | __func__, afu, ctx, res, mode); |
| 2327 | |
| 2328 | rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; |
| 2329 | rcb.msi = SISL_MSI_RRQ_UPDATED; |
| 2330 | rcb.timeout = MC_AFU_SYNC_TIMEOUT; |
| 2331 | |
| 2332 | rcb.cdb[0] = SISL_AFU_CMD_SYNC; |
| 2333 | rcb.cdb[1] = mode; |
| 2334 | put_unaligned_be16(ctx, &rcb.cdb[2]); |
| 2335 | put_unaligned_be32(res, &rcb.cdb[4]); |
| 2336 | |
| 2337 | return send_afu_cmd(afu, &rcb); |
| 2338 | } |
| 2339 | |
| 2340 | /** |
Uma Krishnan | 7c4c41f | 2017-06-21 21:15:06 -0500 | [diff] [blame] | 2341 | * cxlflash_eh_abort_handler() - abort a SCSI command |
| 2342 | * @scp: SCSI command to abort. |
| 2343 | * |
| 2344 | * CXL Flash devices do not support a single command abort. Reset the context |
| 2345 | * as per SISLite specification. Flush any pending commands in the hardware |
| 2346 | * queue before the reset. |
| 2347 | * |
| 2348 | * Return: SUCCESS/FAILED as defined in scsi/scsi.h |
| 2349 | */ |
| 2350 | static int cxlflash_eh_abort_handler(struct scsi_cmnd *scp) |
| 2351 | { |
| 2352 | int rc = FAILED; |
| 2353 | struct Scsi_Host *host = scp->device->host; |
| 2354 | struct cxlflash_cfg *cfg = shost_priv(host); |
| 2355 | struct afu_cmd *cmd = sc_to_afuc(scp); |
| 2356 | struct device *dev = &cfg->dev->dev; |
| 2357 | struct afu *afu = cfg->afu; |
| 2358 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
| 2359 | |
| 2360 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
| 2361 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, |
| 2362 | scp->device->channel, scp->device->id, scp->device->lun, |
| 2363 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 2364 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 2365 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 2366 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
| 2367 | |
| 2368 | /* When the state is not normal, another reset/reload is in progress. |
| 2369 | * Return failed and the mid-layer will invoke host reset handler. |
| 2370 | */ |
| 2371 | if (cfg->state != STATE_NORMAL) { |
| 2372 | dev_dbg(dev, "%s: Invalid state for abort, state=%d\n", |
| 2373 | __func__, cfg->state); |
| 2374 | goto out; |
| 2375 | } |
| 2376 | |
| 2377 | rc = afu->context_reset(hwq); |
| 2378 | if (unlikely(rc)) |
| 2379 | goto out; |
| 2380 | |
| 2381 | rc = SUCCESS; |
| 2382 | |
| 2383 | out: |
| 2384 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
| 2385 | return rc; |
| 2386 | } |
| 2387 | |
| 2388 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2389 | * cxlflash_eh_device_reset_handler() - reset a single LUN |
| 2390 | * @scp: SCSI command to send. |
| 2391 | * |
| 2392 | * Return: |
| 2393 | * SUCCESS as defined in scsi/scsi.h |
| 2394 | * FAILED as defined in scsi/scsi.h |
| 2395 | */ |
| 2396 | static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp) |
| 2397 | { |
| 2398 | int rc = SUCCESS; |
| 2399 | struct Scsi_Host *host = scp->device->host; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2400 | struct cxlflash_cfg *cfg = shost_priv(host); |
| 2401 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2402 | struct afu *afu = cfg->afu; |
| 2403 | int rcr = 0; |
| 2404 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2405 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
| 2406 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, |
| 2407 | scp->device->channel, scp->device->id, scp->device->lun, |
| 2408 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 2409 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 2410 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 2411 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2412 | |
Matthew R. Ochs | ed486da | 2015-10-21 15:14:24 -0500 | [diff] [blame] | 2413 | retry: |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2414 | switch (cfg->state) { |
| 2415 | case STATE_NORMAL: |
| 2416 | rcr = send_tmf(afu, scp, TMF_LUN_RESET); |
| 2417 | if (unlikely(rcr)) |
| 2418 | rc = FAILED; |
| 2419 | break; |
| 2420 | case STATE_RESET: |
| 2421 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
Matthew R. Ochs | ed486da | 2015-10-21 15:14:24 -0500 | [diff] [blame] | 2422 | goto retry; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2423 | default: |
| 2424 | rc = FAILED; |
| 2425 | break; |
| 2426 | } |
| 2427 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2428 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2429 | return rc; |
| 2430 | } |
| 2431 | |
| 2432 | /** |
| 2433 | * cxlflash_eh_host_reset_handler() - reset the host adapter |
| 2434 | * @scp: SCSI command from stack identifying host. |
| 2435 | * |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2436 | * Following a reset, the state is evaluated again in case an EEH occurred |
| 2437 | * during the reset. In such a scenario, the host reset will either yield |
| 2438 | * until the EEH recovery is complete or return success or failure based |
| 2439 | * upon the current device state. |
| 2440 | * |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2441 | * Return: |
| 2442 | * SUCCESS as defined in scsi/scsi.h |
| 2443 | * FAILED as defined in scsi/scsi.h |
| 2444 | */ |
| 2445 | static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp) |
| 2446 | { |
| 2447 | int rc = SUCCESS; |
| 2448 | int rcr = 0; |
| 2449 | struct Scsi_Host *host = scp->device->host; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2450 | struct cxlflash_cfg *cfg = shost_priv(host); |
| 2451 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2452 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2453 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
| 2454 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, |
| 2455 | scp->device->channel, scp->device->id, scp->device->lun, |
| 2456 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 2457 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 2458 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 2459 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2460 | |
| 2461 | switch (cfg->state) { |
| 2462 | case STATE_NORMAL: |
| 2463 | cfg->state = STATE_RESET; |
Manoj N. Kumar | f411396 | 2016-06-15 18:49:20 -0500 | [diff] [blame] | 2464 | drain_ioctls(cfg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2465 | cxlflash_mark_contexts_error(cfg); |
| 2466 | rcr = afu_reset(cfg); |
| 2467 | if (rcr) { |
| 2468 | rc = FAILED; |
| 2469 | cfg->state = STATE_FAILTERM; |
| 2470 | } else |
| 2471 | cfg->state = STATE_NORMAL; |
| 2472 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2473 | ssleep(1); |
| 2474 | /* fall through */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2475 | case STATE_RESET: |
| 2476 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
| 2477 | if (cfg->state == STATE_NORMAL) |
| 2478 | break; |
| 2479 | /* fall through */ |
| 2480 | default: |
| 2481 | rc = FAILED; |
| 2482 | break; |
| 2483 | } |
| 2484 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2485 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2486 | return rc; |
| 2487 | } |
| 2488 | |
| 2489 | /** |
| 2490 | * cxlflash_change_queue_depth() - change the queue depth for the device |
| 2491 | * @sdev: SCSI device destined for queue depth change. |
| 2492 | * @qdepth: Requested queue depth value to set. |
| 2493 | * |
| 2494 | * The requested queue depth is capped to the maximum supported value. |
| 2495 | * |
| 2496 | * Return: The actual queue depth set. |
| 2497 | */ |
| 2498 | static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth) |
| 2499 | { |
| 2500 | |
| 2501 | if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN) |
| 2502 | qdepth = CXLFLASH_MAX_CMDS_PER_LUN; |
| 2503 | |
| 2504 | scsi_change_queue_depth(sdev, qdepth); |
| 2505 | return sdev->queue_depth; |
| 2506 | } |
| 2507 | |
| 2508 | /** |
| 2509 | * cxlflash_show_port_status() - queries and presents the current port status |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2510 | * @port: Desired port for status reporting. |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2511 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2512 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2513 | * |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2514 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2515 | */ |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2516 | static ssize_t cxlflash_show_port_status(u32 port, |
| 2517 | struct cxlflash_cfg *cfg, |
| 2518 | char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2519 | { |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2520 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2521 | char *disp_status; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2522 | u64 status; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2523 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2524 | |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2525 | WARN_ON(port >= MAX_FC_PORTS); |
| 2526 | |
| 2527 | if (port >= cfg->num_fc_ports) { |
| 2528 | dev_info(dev, "%s: Port %d not supported on this card.\n", |
| 2529 | __func__, port); |
| 2530 | return -EINVAL; |
| 2531 | } |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2532 | |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2533 | fc_port_regs = get_fc_port_regs(cfg, port); |
| 2534 | status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2535 | status &= FC_MTIP_STATUS_MASK; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2536 | |
| 2537 | if (status == FC_MTIP_STATUS_ONLINE) |
| 2538 | disp_status = "online"; |
| 2539 | else if (status == FC_MTIP_STATUS_OFFLINE) |
| 2540 | disp_status = "offline"; |
| 2541 | else |
| 2542 | disp_status = "unknown"; |
| 2543 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2544 | return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2545 | } |
| 2546 | |
| 2547 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2548 | * port0_show() - queries and presents the current status of port 0 |
| 2549 | * @dev: Generic device associated with the host owning the port. |
| 2550 | * @attr: Device attribute representing the port. |
| 2551 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2552 | * |
| 2553 | * Return: The size of the ASCII string returned in @buf. |
| 2554 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2555 | static ssize_t port0_show(struct device *dev, |
| 2556 | struct device_attribute *attr, |
| 2557 | char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2558 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2559 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2560 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2561 | return cxlflash_show_port_status(0, cfg, buf); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2562 | } |
| 2563 | |
| 2564 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2565 | * port1_show() - queries and presents the current status of port 1 |
| 2566 | * @dev: Generic device associated with the host owning the port. |
| 2567 | * @attr: Device attribute representing the port. |
| 2568 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2569 | * |
| 2570 | * Return: The size of the ASCII string returned in @buf. |
| 2571 | */ |
| 2572 | static ssize_t port1_show(struct device *dev, |
| 2573 | struct device_attribute *attr, |
| 2574 | char *buf) |
| 2575 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2576 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2577 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2578 | return cxlflash_show_port_status(1, cfg, buf); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2579 | } |
| 2580 | |
| 2581 | /** |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 2582 | * port2_show() - queries and presents the current status of port 2 |
| 2583 | * @dev: Generic device associated with the host owning the port. |
| 2584 | * @attr: Device attribute representing the port. |
| 2585 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2586 | * |
| 2587 | * Return: The size of the ASCII string returned in @buf. |
| 2588 | */ |
| 2589 | static ssize_t port2_show(struct device *dev, |
| 2590 | struct device_attribute *attr, |
| 2591 | char *buf) |
| 2592 | { |
| 2593 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2594 | |
| 2595 | return cxlflash_show_port_status(2, cfg, buf); |
| 2596 | } |
| 2597 | |
| 2598 | /** |
| 2599 | * port3_show() - queries and presents the current status of port 3 |
| 2600 | * @dev: Generic device associated with the host owning the port. |
| 2601 | * @attr: Device attribute representing the port. |
| 2602 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2603 | * |
| 2604 | * Return: The size of the ASCII string returned in @buf. |
| 2605 | */ |
| 2606 | static ssize_t port3_show(struct device *dev, |
| 2607 | struct device_attribute *attr, |
| 2608 | char *buf) |
| 2609 | { |
| 2610 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2611 | |
| 2612 | return cxlflash_show_port_status(3, cfg, buf); |
| 2613 | } |
| 2614 | |
| 2615 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2616 | * lun_mode_show() - presents the current LUN mode of the host |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2617 | * @dev: Generic device associated with the host. |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2618 | * @attr: Device attribute representing the LUN mode. |
| 2619 | * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII. |
| 2620 | * |
| 2621 | * Return: The size of the ASCII string returned in @buf. |
| 2622 | */ |
| 2623 | static ssize_t lun_mode_show(struct device *dev, |
| 2624 | struct device_attribute *attr, char *buf) |
| 2625 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2626 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2627 | struct afu *afu = cfg->afu; |
| 2628 | |
| 2629 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun); |
| 2630 | } |
| 2631 | |
| 2632 | /** |
| 2633 | * lun_mode_store() - sets the LUN mode of the host |
| 2634 | * @dev: Generic device associated with the host. |
| 2635 | * @attr: Device attribute representing the LUN mode. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2636 | * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII. |
| 2637 | * @count: Length of data resizing in @buf. |
| 2638 | * |
| 2639 | * The CXL Flash AFU supports a dummy LUN mode where the external |
| 2640 | * links and storage are not required. Space on the FPGA is used |
| 2641 | * to create 1 or 2 small LUNs which are presented to the system |
| 2642 | * as if they were a normal storage device. This feature is useful |
| 2643 | * during development and also provides manufacturing with a way |
| 2644 | * to test the AFU without an actual device. |
| 2645 | * |
| 2646 | * 0 = external LUN[s] (default) |
| 2647 | * 1 = internal LUN (1 x 64K, 512B blocks, id 0) |
| 2648 | * 2 = internal LUN (1 x 64K, 4K blocks, id 0) |
| 2649 | * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1) |
| 2650 | * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1) |
| 2651 | * |
| 2652 | * Return: The size of the ASCII string returned in @buf. |
| 2653 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2654 | static ssize_t lun_mode_store(struct device *dev, |
| 2655 | struct device_attribute *attr, |
| 2656 | const char *buf, size_t count) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2657 | { |
| 2658 | struct Scsi_Host *shost = class_to_shost(dev); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2659 | struct cxlflash_cfg *cfg = shost_priv(shost); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2660 | struct afu *afu = cfg->afu; |
| 2661 | int rc; |
| 2662 | u32 lun_mode; |
| 2663 | |
| 2664 | rc = kstrtouint(buf, 10, &lun_mode); |
| 2665 | if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) { |
| 2666 | afu->internal_lun = lun_mode; |
Manoj N. Kumar | 603ecce | 2016-03-04 15:55:19 -0600 | [diff] [blame] | 2667 | |
| 2668 | /* |
| 2669 | * When configured for internal LUN, there is only one channel, |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2670 | * channel number 0, else there will be one less than the number |
| 2671 | * of fc ports for this card. |
Manoj N. Kumar | 603ecce | 2016-03-04 15:55:19 -0600 | [diff] [blame] | 2672 | */ |
| 2673 | if (afu->internal_lun) |
| 2674 | shost->max_channel = 0; |
| 2675 | else |
Matthew R. Ochs | 8fa4f17 | 2017-04-12 14:14:05 -0500 | [diff] [blame] | 2676 | shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports); |
Manoj N. Kumar | 603ecce | 2016-03-04 15:55:19 -0600 | [diff] [blame] | 2677 | |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2678 | afu_reset(cfg); |
| 2679 | scsi_scan_host(cfg->host); |
| 2680 | } |
| 2681 | |
| 2682 | return count; |
| 2683 | } |
| 2684 | |
| 2685 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2686 | * ioctl_version_show() - presents the current ioctl version of the host |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2687 | * @dev: Generic device associated with the host. |
| 2688 | * @attr: Device attribute representing the ioctl version. |
| 2689 | * @buf: Buffer of length PAGE_SIZE to report back the ioctl version. |
| 2690 | * |
| 2691 | * Return: The size of the ASCII string returned in @buf. |
| 2692 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2693 | static ssize_t ioctl_version_show(struct device *dev, |
| 2694 | struct device_attribute *attr, char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2695 | { |
Matthew R. Ochs | d6e32f5 | 2017-06-21 21:15:42 -0500 | [diff] [blame] | 2696 | ssize_t bytes = 0; |
| 2697 | |
| 2698 | bytes = scnprintf(buf, PAGE_SIZE, |
| 2699 | "disk: %u\n", DK_CXLFLASH_VERSION_0); |
| 2700 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, |
| 2701 | "host: %u\n", HT_CXLFLASH_VERSION_0); |
| 2702 | |
| 2703 | return bytes; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2704 | } |
| 2705 | |
| 2706 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2707 | * cxlflash_show_port_lun_table() - queries and presents the port LUN table |
| 2708 | * @port: Desired port for status reporting. |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2709 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2710 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2711 | * |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2712 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2713 | */ |
| 2714 | static ssize_t cxlflash_show_port_lun_table(u32 port, |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2715 | struct cxlflash_cfg *cfg, |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2716 | char *buf) |
| 2717 | { |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2718 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2719 | __be64 __iomem *fc_port_luns; |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2720 | int i; |
| 2721 | ssize_t bytes = 0; |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2722 | |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 2723 | WARN_ON(port >= MAX_FC_PORTS); |
| 2724 | |
| 2725 | if (port >= cfg->num_fc_ports) { |
| 2726 | dev_info(dev, "%s: Port %d not supported on this card.\n", |
| 2727 | __func__, port); |
| 2728 | return -EINVAL; |
| 2729 | } |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2730 | |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2731 | fc_port_luns = get_fc_port_luns(cfg, port); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2732 | |
| 2733 | for (i = 0; i < CXLFLASH_NUM_VLUNS; i++) |
| 2734 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 2735 | "%03d: %016llx\n", |
| 2736 | i, readq_be(&fc_port_luns[i])); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2737 | return bytes; |
| 2738 | } |
| 2739 | |
| 2740 | /** |
| 2741 | * port0_lun_table_show() - presents the current LUN table of port 0 |
| 2742 | * @dev: Generic device associated with the host owning the port. |
| 2743 | * @attr: Device attribute representing the port. |
| 2744 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2745 | * |
| 2746 | * Return: The size of the ASCII string returned in @buf. |
| 2747 | */ |
| 2748 | static ssize_t port0_lun_table_show(struct device *dev, |
| 2749 | struct device_attribute *attr, |
| 2750 | char *buf) |
| 2751 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2752 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2753 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2754 | return cxlflash_show_port_lun_table(0, cfg, buf); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2755 | } |
| 2756 | |
| 2757 | /** |
| 2758 | * port1_lun_table_show() - presents the current LUN table of port 1 |
| 2759 | * @dev: Generic device associated with the host owning the port. |
| 2760 | * @attr: Device attribute representing the port. |
| 2761 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2762 | * |
| 2763 | * Return: The size of the ASCII string returned in @buf. |
| 2764 | */ |
| 2765 | static ssize_t port1_lun_table_show(struct device *dev, |
| 2766 | struct device_attribute *attr, |
| 2767 | char *buf) |
| 2768 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2769 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2770 | |
Matthew R. Ochs | 3b225cd | 2017-04-12 14:13:34 -0500 | [diff] [blame] | 2771 | return cxlflash_show_port_lun_table(1, cfg, buf); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2772 | } |
| 2773 | |
| 2774 | /** |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 2775 | * port2_lun_table_show() - presents the current LUN table of port 2 |
| 2776 | * @dev: Generic device associated with the host owning the port. |
| 2777 | * @attr: Device attribute representing the port. |
| 2778 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2779 | * |
| 2780 | * Return: The size of the ASCII string returned in @buf. |
| 2781 | */ |
| 2782 | static ssize_t port2_lun_table_show(struct device *dev, |
| 2783 | struct device_attribute *attr, |
| 2784 | char *buf) |
| 2785 | { |
| 2786 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2787 | |
| 2788 | return cxlflash_show_port_lun_table(2, cfg, buf); |
| 2789 | } |
| 2790 | |
| 2791 | /** |
| 2792 | * port3_lun_table_show() - presents the current LUN table of port 3 |
| 2793 | * @dev: Generic device associated with the host owning the port. |
| 2794 | * @attr: Device attribute representing the port. |
| 2795 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2796 | * |
| 2797 | * Return: The size of the ASCII string returned in @buf. |
| 2798 | */ |
| 2799 | static ssize_t port3_lun_table_show(struct device *dev, |
| 2800 | struct device_attribute *attr, |
| 2801 | char *buf) |
| 2802 | { |
| 2803 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2804 | |
| 2805 | return cxlflash_show_port_lun_table(3, cfg, buf); |
| 2806 | } |
| 2807 | |
| 2808 | /** |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2809 | * irqpoll_weight_show() - presents the current IRQ poll weight for the host |
| 2810 | * @dev: Generic device associated with the host. |
| 2811 | * @attr: Device attribute representing the IRQ poll weight. |
| 2812 | * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll |
| 2813 | * weight in ASCII. |
| 2814 | * |
| 2815 | * An IRQ poll weight of 0 indicates polling is disabled. |
| 2816 | * |
| 2817 | * Return: The size of the ASCII string returned in @buf. |
| 2818 | */ |
| 2819 | static ssize_t irqpoll_weight_show(struct device *dev, |
| 2820 | struct device_attribute *attr, char *buf) |
| 2821 | { |
| 2822 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2823 | struct afu *afu = cfg->afu; |
| 2824 | |
| 2825 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight); |
| 2826 | } |
| 2827 | |
| 2828 | /** |
| 2829 | * irqpoll_weight_store() - sets the current IRQ poll weight for the host |
| 2830 | * @dev: Generic device associated with the host. |
| 2831 | * @attr: Device attribute representing the IRQ poll weight. |
| 2832 | * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll |
| 2833 | * weight in ASCII. |
| 2834 | * @count: Length of data resizing in @buf. |
| 2835 | * |
| 2836 | * An IRQ poll weight of 0 indicates polling is disabled. |
| 2837 | * |
| 2838 | * Return: The size of the ASCII string returned in @buf. |
| 2839 | */ |
| 2840 | static ssize_t irqpoll_weight_store(struct device *dev, |
| 2841 | struct device_attribute *attr, |
| 2842 | const char *buf, size_t count) |
| 2843 | { |
| 2844 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2845 | struct device *cfgdev = &cfg->dev->dev; |
| 2846 | struct afu *afu = cfg->afu; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2847 | struct hwq *hwq; |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2848 | u32 weight; |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2849 | int rc, i; |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2850 | |
| 2851 | rc = kstrtouint(buf, 10, &weight); |
| 2852 | if (rc) |
| 2853 | return -EINVAL; |
| 2854 | |
| 2855 | if (weight > 256) { |
| 2856 | dev_info(cfgdev, |
| 2857 | "Invalid IRQ poll weight. It must be 256 or less.\n"); |
| 2858 | return -EINVAL; |
| 2859 | } |
| 2860 | |
| 2861 | if (weight == afu->irqpoll_weight) { |
| 2862 | dev_info(cfgdev, |
| 2863 | "Current IRQ poll weight has the same weight.\n"); |
| 2864 | return -EINVAL; |
| 2865 | } |
| 2866 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2867 | if (afu_is_irqpoll_enabled(afu)) { |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 2868 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2869 | hwq = get_hwq(afu, i); |
| 2870 | |
| 2871 | irq_poll_disable(&hwq->irqpoll); |
| 2872 | } |
| 2873 | } |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2874 | |
| 2875 | afu->irqpoll_weight = weight; |
| 2876 | |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2877 | if (weight > 0) { |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 2878 | for (i = 0; i < afu->num_hwqs; i++) { |
Uma Krishnan | bfc0bab | 2017-04-12 14:15:42 -0500 | [diff] [blame] | 2879 | hwq = get_hwq(afu, i); |
| 2880 | |
| 2881 | irq_poll_init(&hwq->irqpoll, weight, cxlflash_irqpoll); |
| 2882 | } |
| 2883 | } |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 2884 | |
| 2885 | return count; |
| 2886 | } |
| 2887 | |
| 2888 | /** |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 2889 | * num_hwqs_show() - presents the number of hardware queues for the host |
| 2890 | * @dev: Generic device associated with the host. |
| 2891 | * @attr: Device attribute representing the number of hardware queues. |
| 2892 | * @buf: Buffer of length PAGE_SIZE to report back the number of hardware |
| 2893 | * queues in ASCII. |
| 2894 | * |
| 2895 | * Return: The size of the ASCII string returned in @buf. |
| 2896 | */ |
| 2897 | static ssize_t num_hwqs_show(struct device *dev, |
| 2898 | struct device_attribute *attr, char *buf) |
| 2899 | { |
| 2900 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2901 | struct afu *afu = cfg->afu; |
| 2902 | |
| 2903 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->num_hwqs); |
| 2904 | } |
| 2905 | |
| 2906 | /** |
| 2907 | * num_hwqs_store() - sets the number of hardware queues for the host |
| 2908 | * @dev: Generic device associated with the host. |
| 2909 | * @attr: Device attribute representing the number of hardware queues. |
| 2910 | * @buf: Buffer of length PAGE_SIZE containing the number of hardware |
| 2911 | * queues in ASCII. |
| 2912 | * @count: Length of data resizing in @buf. |
| 2913 | * |
| 2914 | * n > 0: num_hwqs = n |
| 2915 | * n = 0: num_hwqs = num_online_cpus() |
| 2916 | * n < 0: num_online_cpus() / abs(n) |
| 2917 | * |
| 2918 | * Return: The size of the ASCII string returned in @buf. |
| 2919 | */ |
| 2920 | static ssize_t num_hwqs_store(struct device *dev, |
| 2921 | struct device_attribute *attr, |
| 2922 | const char *buf, size_t count) |
| 2923 | { |
| 2924 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2925 | struct afu *afu = cfg->afu; |
| 2926 | int rc; |
| 2927 | int nhwqs, num_hwqs; |
| 2928 | |
| 2929 | rc = kstrtoint(buf, 10, &nhwqs); |
| 2930 | if (rc) |
| 2931 | return -EINVAL; |
| 2932 | |
| 2933 | if (nhwqs >= 1) |
| 2934 | num_hwqs = nhwqs; |
| 2935 | else if (nhwqs == 0) |
| 2936 | num_hwqs = num_online_cpus(); |
| 2937 | else |
| 2938 | num_hwqs = num_online_cpus() / abs(nhwqs); |
| 2939 | |
| 2940 | afu->desired_hwqs = min(num_hwqs, CXLFLASH_MAX_HWQS); |
| 2941 | WARN_ON_ONCE(afu->desired_hwqs == 0); |
| 2942 | |
| 2943 | retry: |
| 2944 | switch (cfg->state) { |
| 2945 | case STATE_NORMAL: |
| 2946 | cfg->state = STATE_RESET; |
| 2947 | drain_ioctls(cfg); |
| 2948 | cxlflash_mark_contexts_error(cfg); |
| 2949 | rc = afu_reset(cfg); |
| 2950 | if (rc) |
| 2951 | cfg->state = STATE_FAILTERM; |
| 2952 | else |
| 2953 | cfg->state = STATE_NORMAL; |
| 2954 | wake_up_all(&cfg->reset_waitq); |
| 2955 | break; |
| 2956 | case STATE_RESET: |
| 2957 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
| 2958 | if (cfg->state == STATE_NORMAL) |
| 2959 | goto retry; |
| 2960 | default: |
| 2961 | /* Ideally should not happen */ |
| 2962 | dev_err(dev, "%s: Device is not ready, state=%d\n", |
| 2963 | __func__, cfg->state); |
| 2964 | break; |
| 2965 | } |
| 2966 | |
| 2967 | return count; |
| 2968 | } |
| 2969 | |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 2970 | static const char *hwq_mode_name[MAX_HWQ_MODE] = { "rr", "tag", "cpu" }; |
| 2971 | |
| 2972 | /** |
| 2973 | * hwq_mode_show() - presents the HWQ steering mode for the host |
| 2974 | * @dev: Generic device associated with the host. |
| 2975 | * @attr: Device attribute representing the HWQ steering mode. |
| 2976 | * @buf: Buffer of length PAGE_SIZE to report back the HWQ steering mode |
| 2977 | * as a character string. |
| 2978 | * |
| 2979 | * Return: The size of the ASCII string returned in @buf. |
| 2980 | */ |
| 2981 | static ssize_t hwq_mode_show(struct device *dev, |
| 2982 | struct device_attribute *attr, char *buf) |
| 2983 | { |
| 2984 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
| 2985 | struct afu *afu = cfg->afu; |
| 2986 | |
| 2987 | return scnprintf(buf, PAGE_SIZE, "%s\n", hwq_mode_name[afu->hwq_mode]); |
| 2988 | } |
| 2989 | |
| 2990 | /** |
| 2991 | * hwq_mode_store() - sets the HWQ steering mode for the host |
| 2992 | * @dev: Generic device associated with the host. |
| 2993 | * @attr: Device attribute representing the HWQ steering mode. |
| 2994 | * @buf: Buffer of length PAGE_SIZE containing the HWQ steering mode |
| 2995 | * as a character string. |
| 2996 | * @count: Length of data resizing in @buf. |
| 2997 | * |
| 2998 | * rr = Round-Robin |
| 2999 | * tag = Block MQ Tagging |
| 3000 | * cpu = CPU Affinity |
| 3001 | * |
| 3002 | * Return: The size of the ASCII string returned in @buf. |
| 3003 | */ |
| 3004 | static ssize_t hwq_mode_store(struct device *dev, |
| 3005 | struct device_attribute *attr, |
| 3006 | const char *buf, size_t count) |
| 3007 | { |
| 3008 | struct Scsi_Host *shost = class_to_shost(dev); |
| 3009 | struct cxlflash_cfg *cfg = shost_priv(shost); |
| 3010 | struct device *cfgdev = &cfg->dev->dev; |
| 3011 | struct afu *afu = cfg->afu; |
| 3012 | int i; |
| 3013 | u32 mode = MAX_HWQ_MODE; |
| 3014 | |
| 3015 | for (i = 0; i < MAX_HWQ_MODE; i++) { |
| 3016 | if (!strncmp(hwq_mode_name[i], buf, strlen(hwq_mode_name[i]))) { |
| 3017 | mode = i; |
| 3018 | break; |
| 3019 | } |
| 3020 | } |
| 3021 | |
| 3022 | if (mode >= MAX_HWQ_MODE) { |
| 3023 | dev_info(cfgdev, "Invalid HWQ steering mode.\n"); |
| 3024 | return -EINVAL; |
| 3025 | } |
| 3026 | |
| 3027 | if ((mode == HWQ_MODE_TAG) && !shost_use_blk_mq(shost)) { |
| 3028 | dev_info(cfgdev, "SCSI-MQ is not enabled, use a different " |
| 3029 | "HWQ steering mode.\n"); |
| 3030 | return -EINVAL; |
| 3031 | } |
| 3032 | |
| 3033 | afu->hwq_mode = mode; |
| 3034 | |
| 3035 | return count; |
| 3036 | } |
| 3037 | |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 3038 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 3039 | * mode_show() - presents the current mode of the device |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3040 | * @dev: Generic device associated with the device. |
| 3041 | * @attr: Device attribute representing the device mode. |
| 3042 | * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII. |
| 3043 | * |
| 3044 | * Return: The size of the ASCII string returned in @buf. |
| 3045 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 3046 | static ssize_t mode_show(struct device *dev, |
| 3047 | struct device_attribute *attr, char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3048 | { |
| 3049 | struct scsi_device *sdev = to_scsi_device(dev); |
| 3050 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 3051 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
| 3052 | sdev->hostdata ? "superpipe" : "legacy"); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3053 | } |
| 3054 | |
| 3055 | /* |
| 3056 | * Host attributes |
| 3057 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 3058 | static DEVICE_ATTR_RO(port0); |
| 3059 | static DEVICE_ATTR_RO(port1); |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 3060 | static DEVICE_ATTR_RO(port2); |
| 3061 | static DEVICE_ATTR_RO(port3); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 3062 | static DEVICE_ATTR_RW(lun_mode); |
| 3063 | static DEVICE_ATTR_RO(ioctl_version); |
| 3064 | static DEVICE_ATTR_RO(port0_lun_table); |
| 3065 | static DEVICE_ATTR_RO(port1_lun_table); |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 3066 | static DEVICE_ATTR_RO(port2_lun_table); |
| 3067 | static DEVICE_ATTR_RO(port3_lun_table); |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 3068 | static DEVICE_ATTR_RW(irqpoll_weight); |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 3069 | static DEVICE_ATTR_RW(num_hwqs); |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 3070 | static DEVICE_ATTR_RW(hwq_mode); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3071 | |
| 3072 | static struct device_attribute *cxlflash_host_attrs[] = { |
| 3073 | &dev_attr_port0, |
| 3074 | &dev_attr_port1, |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 3075 | &dev_attr_port2, |
| 3076 | &dev_attr_port3, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3077 | &dev_attr_lun_mode, |
| 3078 | &dev_attr_ioctl_version, |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 3079 | &dev_attr_port0_lun_table, |
| 3080 | &dev_attr_port1_lun_table, |
Matthew R. Ochs | 1cd7fab | 2017-04-12 14:14:41 -0500 | [diff] [blame] | 3081 | &dev_attr_port2_lun_table, |
| 3082 | &dev_attr_port3_lun_table, |
Matthew R. Ochs | cba06e6 | 2017-04-12 14:13:20 -0500 | [diff] [blame] | 3083 | &dev_attr_irqpoll_weight, |
Matthew R. Ochs | 3065267 | 2017-04-12 14:15:53 -0500 | [diff] [blame] | 3084 | &dev_attr_num_hwqs, |
Matthew R. Ochs | 1dd0c0e | 2017-04-12 14:16:02 -0500 | [diff] [blame] | 3085 | &dev_attr_hwq_mode, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3086 | NULL |
| 3087 | }; |
| 3088 | |
| 3089 | /* |
| 3090 | * Device attributes |
| 3091 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 3092 | static DEVICE_ATTR_RO(mode); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3093 | |
| 3094 | static struct device_attribute *cxlflash_dev_attrs[] = { |
| 3095 | &dev_attr_mode, |
| 3096 | NULL |
| 3097 | }; |
| 3098 | |
| 3099 | /* |
| 3100 | * Host template |
| 3101 | */ |
| 3102 | static struct scsi_host_template driver_template = { |
| 3103 | .module = THIS_MODULE, |
| 3104 | .name = CXLFLASH_ADAPTER_NAME, |
| 3105 | .info = cxlflash_driver_info, |
| 3106 | .ioctl = cxlflash_ioctl, |
| 3107 | .proc_name = CXLFLASH_NAME, |
| 3108 | .queuecommand = cxlflash_queuecommand, |
Uma Krishnan | 7c4c41f | 2017-06-21 21:15:06 -0500 | [diff] [blame] | 3109 | .eh_abort_handler = cxlflash_eh_abort_handler, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3110 | .eh_device_reset_handler = cxlflash_eh_device_reset_handler, |
| 3111 | .eh_host_reset_handler = cxlflash_eh_host_reset_handler, |
| 3112 | .change_queue_depth = cxlflash_change_queue_depth, |
Manoj N. Kumar | 8343083 | 2016-03-04 15:55:20 -0600 | [diff] [blame] | 3113 | .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3114 | .can_queue = CXLFLASH_MAX_CMDS, |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 3115 | .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3116 | .this_id = -1, |
Uma Krishnan | 68ab2d7 | 2016-11-28 18:41:06 -0600 | [diff] [blame] | 3117 | .sg_tablesize = 1, /* No scatter gather support */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3118 | .max_sectors = CXLFLASH_MAX_SECTORS, |
| 3119 | .use_clustering = ENABLE_CLUSTERING, |
| 3120 | .shost_attrs = cxlflash_host_attrs, |
| 3121 | .sdev_attrs = cxlflash_dev_attrs, |
| 3122 | }; |
| 3123 | |
| 3124 | /* |
| 3125 | * Device dependent values |
| 3126 | */ |
Uma Krishnan | 96e1b66 | 2016-06-15 18:49:38 -0500 | [diff] [blame] | 3127 | static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS, |
| 3128 | 0ULL }; |
| 3129 | static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS, |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 3130 | CXLFLASH_NOTIFY_SHUTDOWN }; |
Matthew R. Ochs | 9434452 | 2017-02-16 21:39:32 -0600 | [diff] [blame] | 3131 | static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS, |
| 3132 | CXLFLASH_NOTIFY_SHUTDOWN }; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3133 | |
| 3134 | /* |
| 3135 | * PCI device binding table |
| 3136 | */ |
| 3137 | static struct pci_device_id cxlflash_pci_table[] = { |
| 3138 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA, |
| 3139 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals}, |
Manoj Kumar | a2746fb | 2015-12-14 15:07:43 -0600 | [diff] [blame] | 3140 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT, |
| 3141 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals}, |
Matthew R. Ochs | 9434452 | 2017-02-16 21:39:32 -0600 | [diff] [blame] | 3142 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD, |
| 3143 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals}, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 3144 | {} |
| 3145 | }; |
| 3146 | |
| 3147 | MODULE_DEVICE_TABLE(pci, cxlflash_pci_table); |
| 3148 | |
| 3149 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3150 | * cxlflash_worker_thread() - work thread handler for the AFU |
| 3151 | * @work: Work structure contained within cxlflash associated with host. |
| 3152 | * |
| 3153 | * Handles the following events: |
| 3154 | * - Link reset which cannot be performed on interrupt context due to |
| 3155 | * blocking up to a few seconds |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 3156 | * - Rescan the host |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3157 | */ |
| 3158 | static void cxlflash_worker_thread(struct work_struct *work) |
| 3159 | { |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3160 | struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg, |
| 3161 | work_q); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3162 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 3163 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 3164 | __be64 __iomem *fc_port_regs; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3165 | int port; |
| 3166 | ulong lock_flags; |
| 3167 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3168 | /* Avoid MMIO if the device has failed */ |
| 3169 | |
| 3170 | if (cfg->state != STATE_NORMAL) |
| 3171 | return; |
| 3172 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3173 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
| 3174 | |
| 3175 | if (cfg->lr_state == LINK_RESET_REQUIRED) { |
| 3176 | port = cfg->lr_port; |
| 3177 | if (port < 0) |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 3178 | dev_err(dev, "%s: invalid port index %d\n", |
| 3179 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3180 | else { |
| 3181 | spin_unlock_irqrestore(cfg->host->host_lock, |
| 3182 | lock_flags); |
| 3183 | |
| 3184 | /* The reset can block... */ |
Matthew R. Ochs | 0aa1488 | 2017-04-12 14:14:17 -0500 | [diff] [blame] | 3185 | fc_port_regs = get_fc_port_regs(cfg, port); |
| 3186 | afu_link_reset(afu, port, fc_port_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3187 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
| 3188 | } |
| 3189 | |
| 3190 | cfg->lr_state = LINK_RESET_COMPLETE; |
| 3191 | } |
| 3192 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3193 | spin_unlock_irqrestore(cfg->host->host_lock, lock_flags); |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 3194 | |
| 3195 | if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0) |
| 3196 | scsi_scan_host(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3197 | } |
| 3198 | |
| 3199 | /** |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3200 | * cxlflash_chr_open() - character device open handler |
| 3201 | * @inode: Device inode associated with this character device. |
| 3202 | * @file: File pointer for this device. |
| 3203 | * |
| 3204 | * Only users with admin privileges are allowed to open the character device. |
| 3205 | * |
| 3206 | * Return: 0 on success, -errno on failure |
| 3207 | */ |
| 3208 | static int cxlflash_chr_open(struct inode *inode, struct file *file) |
| 3209 | { |
| 3210 | struct cxlflash_cfg *cfg; |
| 3211 | |
| 3212 | if (!capable(CAP_SYS_ADMIN)) |
| 3213 | return -EACCES; |
| 3214 | |
| 3215 | cfg = container_of(inode->i_cdev, struct cxlflash_cfg, cdev); |
| 3216 | file->private_data = cfg; |
| 3217 | |
| 3218 | return 0; |
| 3219 | } |
| 3220 | |
Matthew R. Ochs | d6e32f5 | 2017-06-21 21:15:42 -0500 | [diff] [blame] | 3221 | /** |
| 3222 | * decode_hioctl() - translates encoded host ioctl to easily identifiable string |
| 3223 | * @cmd: The host ioctl command to decode. |
| 3224 | * |
| 3225 | * Return: A string identifying the decoded host ioctl. |
| 3226 | */ |
| 3227 | static char *decode_hioctl(int cmd) |
| 3228 | { |
| 3229 | switch (cmd) { |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 3230 | case HT_CXLFLASH_LUN_PROVISION: |
| 3231 | return __stringify_1(HT_CXLFLASH_LUN_PROVISION); |
Matthew R. Ochs | d6e32f5 | 2017-06-21 21:15:42 -0500 | [diff] [blame] | 3232 | } |
| 3233 | |
| 3234 | return "UNKNOWN"; |
| 3235 | } |
| 3236 | |
| 3237 | /** |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 3238 | * cxlflash_lun_provision() - host LUN provisioning handler |
| 3239 | * @cfg: Internal structure associated with the host. |
| 3240 | * @arg: Kernel copy of userspace ioctl data structure. |
| 3241 | * |
| 3242 | * Return: 0 on success, -errno on failure |
| 3243 | */ |
| 3244 | static int cxlflash_lun_provision(struct cxlflash_cfg *cfg, |
| 3245 | struct ht_cxlflash_lun_provision *lunprov) |
| 3246 | { |
| 3247 | struct afu *afu = cfg->afu; |
| 3248 | struct device *dev = &cfg->dev->dev; |
| 3249 | struct sisl_ioarcb rcb; |
| 3250 | struct sisl_ioasa asa; |
| 3251 | __be64 __iomem *fc_port_regs; |
| 3252 | u16 port = lunprov->port; |
| 3253 | u16 scmd = lunprov->hdr.subcmd; |
| 3254 | u16 type; |
| 3255 | u64 reg; |
| 3256 | u64 size; |
| 3257 | u64 lun_id; |
| 3258 | int rc = 0; |
| 3259 | |
| 3260 | if (!afu_is_lun_provision(afu)) { |
| 3261 | rc = -ENOTSUPP; |
| 3262 | goto out; |
| 3263 | } |
| 3264 | |
| 3265 | if (port >= cfg->num_fc_ports) { |
| 3266 | rc = -EINVAL; |
| 3267 | goto out; |
| 3268 | } |
| 3269 | |
| 3270 | switch (scmd) { |
| 3271 | case HT_CXLFLASH_LUN_PROVISION_SUBCMD_CREATE_LUN: |
| 3272 | type = SISL_AFU_LUN_PROVISION_CREATE; |
| 3273 | size = lunprov->size; |
| 3274 | lun_id = 0; |
| 3275 | break; |
| 3276 | case HT_CXLFLASH_LUN_PROVISION_SUBCMD_DELETE_LUN: |
| 3277 | type = SISL_AFU_LUN_PROVISION_DELETE; |
| 3278 | size = 0; |
| 3279 | lun_id = lunprov->lun_id; |
| 3280 | break; |
| 3281 | case HT_CXLFLASH_LUN_PROVISION_SUBCMD_QUERY_PORT: |
| 3282 | fc_port_regs = get_fc_port_regs(cfg, port); |
| 3283 | |
| 3284 | reg = readq_be(&fc_port_regs[FC_MAX_NUM_LUNS / 8]); |
| 3285 | lunprov->max_num_luns = reg; |
| 3286 | reg = readq_be(&fc_port_regs[FC_CUR_NUM_LUNS / 8]); |
| 3287 | lunprov->cur_num_luns = reg; |
| 3288 | reg = readq_be(&fc_port_regs[FC_MAX_CAP_PORT / 8]); |
| 3289 | lunprov->max_cap_port = reg; |
| 3290 | reg = readq_be(&fc_port_regs[FC_CUR_CAP_PORT / 8]); |
| 3291 | lunprov->cur_cap_port = reg; |
| 3292 | |
| 3293 | goto out; |
| 3294 | default: |
| 3295 | rc = -EINVAL; |
| 3296 | goto out; |
| 3297 | } |
| 3298 | |
| 3299 | memset(&rcb, 0, sizeof(rcb)); |
| 3300 | memset(&asa, 0, sizeof(asa)); |
| 3301 | rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; |
| 3302 | rcb.lun_id = lun_id; |
| 3303 | rcb.msi = SISL_MSI_RRQ_UPDATED; |
| 3304 | rcb.timeout = MC_LUN_PROV_TIMEOUT; |
| 3305 | rcb.ioasa = &asa; |
| 3306 | |
| 3307 | rcb.cdb[0] = SISL_AFU_CMD_LUN_PROVISION; |
| 3308 | rcb.cdb[1] = type; |
| 3309 | rcb.cdb[2] = port; |
| 3310 | put_unaligned_be64(size, &rcb.cdb[8]); |
| 3311 | |
| 3312 | rc = send_afu_cmd(afu, &rcb); |
| 3313 | if (rc) { |
| 3314 | dev_err(dev, "%s: send_afu_cmd failed rc=%d asc=%08x afux=%x\n", |
| 3315 | __func__, rc, asa.ioasc, asa.afu_extra); |
| 3316 | goto out; |
| 3317 | } |
| 3318 | |
| 3319 | if (scmd == HT_CXLFLASH_LUN_PROVISION_SUBCMD_CREATE_LUN) { |
| 3320 | lunprov->lun_id = (u64)asa.lunid_hi << 32 | asa.lunid_lo; |
| 3321 | memcpy(lunprov->wwid, asa.wwid, sizeof(lunprov->wwid)); |
| 3322 | } |
| 3323 | out: |
| 3324 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
| 3325 | return rc; |
| 3326 | } |
| 3327 | |
| 3328 | /** |
Matthew R. Ochs | bc88ac4 | 2017-06-21 21:16:22 -0500 | [diff] [blame^] | 3329 | * cxlflash_afu_debug() - host AFU debug handler |
| 3330 | * @cfg: Internal structure associated with the host. |
| 3331 | * @arg: Kernel copy of userspace ioctl data structure. |
| 3332 | * |
| 3333 | * For debug requests requiring a data buffer, always provide an aligned |
| 3334 | * (cache line) buffer to the AFU to appease any alignment requirements. |
| 3335 | * |
| 3336 | * Return: 0 on success, -errno on failure |
| 3337 | */ |
| 3338 | static int cxlflash_afu_debug(struct cxlflash_cfg *cfg, |
| 3339 | struct ht_cxlflash_afu_debug *afu_dbg) |
| 3340 | { |
| 3341 | struct afu *afu = cfg->afu; |
| 3342 | struct device *dev = &cfg->dev->dev; |
| 3343 | struct sisl_ioarcb rcb; |
| 3344 | struct sisl_ioasa asa; |
| 3345 | char *buf = NULL; |
| 3346 | char *kbuf = NULL; |
| 3347 | void __user *ubuf = (__force void __user *)afu_dbg->data_ea; |
| 3348 | u16 req_flags = SISL_REQ_FLAGS_AFU_CMD; |
| 3349 | u32 ulen = afu_dbg->data_len; |
| 3350 | bool is_write = afu_dbg->hdr.flags & HT_CXLFLASH_HOST_WRITE; |
| 3351 | int rc = 0; |
| 3352 | |
| 3353 | if (!afu_is_afu_debug(afu)) { |
| 3354 | rc = -ENOTSUPP; |
| 3355 | goto out; |
| 3356 | } |
| 3357 | |
| 3358 | if (ulen) { |
| 3359 | req_flags |= SISL_REQ_FLAGS_SUP_UNDERRUN; |
| 3360 | |
| 3361 | if (ulen > HT_CXLFLASH_AFU_DEBUG_MAX_DATA_LEN) { |
| 3362 | rc = -EINVAL; |
| 3363 | goto out; |
| 3364 | } |
| 3365 | |
| 3366 | if (unlikely(!access_ok(is_write ? VERIFY_READ : VERIFY_WRITE, |
| 3367 | ubuf, ulen))) { |
| 3368 | rc = -EFAULT; |
| 3369 | goto out; |
| 3370 | } |
| 3371 | |
| 3372 | buf = kmalloc(ulen + cache_line_size() - 1, GFP_KERNEL); |
| 3373 | if (unlikely(!buf)) { |
| 3374 | rc = -ENOMEM; |
| 3375 | goto out; |
| 3376 | } |
| 3377 | |
| 3378 | kbuf = PTR_ALIGN(buf, cache_line_size()); |
| 3379 | |
| 3380 | if (is_write) { |
| 3381 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; |
| 3382 | |
| 3383 | rc = copy_from_user(kbuf, ubuf, ulen); |
| 3384 | if (unlikely(rc)) |
| 3385 | goto out; |
| 3386 | } |
| 3387 | } |
| 3388 | |
| 3389 | memset(&rcb, 0, sizeof(rcb)); |
| 3390 | memset(&asa, 0, sizeof(asa)); |
| 3391 | |
| 3392 | rcb.req_flags = req_flags; |
| 3393 | rcb.msi = SISL_MSI_RRQ_UPDATED; |
| 3394 | rcb.timeout = MC_AFU_DEBUG_TIMEOUT; |
| 3395 | rcb.ioasa = &asa; |
| 3396 | |
| 3397 | if (ulen) { |
| 3398 | rcb.data_len = ulen; |
| 3399 | rcb.data_ea = (uintptr_t)kbuf; |
| 3400 | } |
| 3401 | |
| 3402 | rcb.cdb[0] = SISL_AFU_CMD_DEBUG; |
| 3403 | memcpy(&rcb.cdb[4], afu_dbg->afu_subcmd, |
| 3404 | HT_CXLFLASH_AFU_DEBUG_SUBCMD_LEN); |
| 3405 | |
| 3406 | rc = send_afu_cmd(afu, &rcb); |
| 3407 | if (rc) { |
| 3408 | dev_err(dev, "%s: send_afu_cmd failed rc=%d asc=%08x afux=%x\n", |
| 3409 | __func__, rc, asa.ioasc, asa.afu_extra); |
| 3410 | goto out; |
| 3411 | } |
| 3412 | |
| 3413 | if (ulen && !is_write) |
| 3414 | rc = copy_to_user(ubuf, kbuf, ulen); |
| 3415 | out: |
| 3416 | kfree(buf); |
| 3417 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
| 3418 | return rc; |
| 3419 | } |
| 3420 | |
| 3421 | /** |
Matthew R. Ochs | d6e32f5 | 2017-06-21 21:15:42 -0500 | [diff] [blame] | 3422 | * cxlflash_chr_ioctl() - character device IOCTL handler |
| 3423 | * @file: File pointer for this device. |
| 3424 | * @cmd: IOCTL command. |
| 3425 | * @arg: Userspace ioctl data structure. |
| 3426 | * |
| 3427 | * A read/write semaphore is used to implement a 'drain' of currently |
| 3428 | * running ioctls. The read semaphore is taken at the beginning of each |
| 3429 | * ioctl thread and released upon concluding execution. Additionally the |
| 3430 | * semaphore should be released and then reacquired in any ioctl execution |
| 3431 | * path which will wait for an event to occur that is outside the scope of |
| 3432 | * the ioctl (i.e. an adapter reset). To drain the ioctls currently running, |
| 3433 | * a thread simply needs to acquire the write semaphore. |
| 3434 | * |
| 3435 | * Return: 0 on success, -errno on failure |
| 3436 | */ |
| 3437 | static long cxlflash_chr_ioctl(struct file *file, unsigned int cmd, |
| 3438 | unsigned long arg) |
| 3439 | { |
| 3440 | typedef int (*hioctl) (struct cxlflash_cfg *, void *); |
| 3441 | |
| 3442 | struct cxlflash_cfg *cfg = file->private_data; |
| 3443 | struct device *dev = &cfg->dev->dev; |
| 3444 | char buf[sizeof(union cxlflash_ht_ioctls)]; |
| 3445 | void __user *uarg = (void __user *)arg; |
| 3446 | struct ht_cxlflash_hdr *hdr; |
| 3447 | size_t size = 0; |
| 3448 | bool known_ioctl = false; |
| 3449 | int idx = 0; |
| 3450 | int rc = 0; |
| 3451 | hioctl do_ioctl = NULL; |
| 3452 | |
| 3453 | static const struct { |
| 3454 | size_t size; |
| 3455 | hioctl ioctl; |
| 3456 | } ioctl_tbl[] = { /* NOTE: order matters here */ |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 3457 | { sizeof(struct ht_cxlflash_lun_provision), |
| 3458 | (hioctl)cxlflash_lun_provision }, |
Matthew R. Ochs | bc88ac4 | 2017-06-21 21:16:22 -0500 | [diff] [blame^] | 3459 | { sizeof(struct ht_cxlflash_afu_debug), |
| 3460 | (hioctl)cxlflash_afu_debug }, |
Matthew R. Ochs | d6e32f5 | 2017-06-21 21:15:42 -0500 | [diff] [blame] | 3461 | }; |
| 3462 | |
| 3463 | /* Hold read semaphore so we can drain if needed */ |
| 3464 | down_read(&cfg->ioctl_rwsem); |
| 3465 | |
| 3466 | dev_dbg(dev, "%s: cmd=%u idx=%d tbl_size=%lu\n", |
| 3467 | __func__, cmd, idx, sizeof(ioctl_tbl)); |
| 3468 | |
| 3469 | switch (cmd) { |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 3470 | case HT_CXLFLASH_LUN_PROVISION: |
Matthew R. Ochs | bc88ac4 | 2017-06-21 21:16:22 -0500 | [diff] [blame^] | 3471 | case HT_CXLFLASH_AFU_DEBUG: |
Matthew R. Ochs | 9cf43a3 | 2017-06-21 21:16:13 -0500 | [diff] [blame] | 3472 | known_ioctl = true; |
| 3473 | idx = _IOC_NR(HT_CXLFLASH_LUN_PROVISION) - _IOC_NR(cmd); |
| 3474 | size = ioctl_tbl[idx].size; |
| 3475 | do_ioctl = ioctl_tbl[idx].ioctl; |
| 3476 | |
| 3477 | if (likely(do_ioctl)) |
| 3478 | break; |
| 3479 | |
| 3480 | /* fall through */ |
Matthew R. Ochs | d6e32f5 | 2017-06-21 21:15:42 -0500 | [diff] [blame] | 3481 | default: |
| 3482 | rc = -EINVAL; |
| 3483 | goto out; |
| 3484 | } |
| 3485 | |
| 3486 | if (unlikely(copy_from_user(&buf, uarg, size))) { |
| 3487 | dev_err(dev, "%s: copy_from_user() fail " |
| 3488 | "size=%lu cmd=%d (%s) uarg=%p\n", |
| 3489 | __func__, size, cmd, decode_hioctl(cmd), uarg); |
| 3490 | rc = -EFAULT; |
| 3491 | goto out; |
| 3492 | } |
| 3493 | |
| 3494 | hdr = (struct ht_cxlflash_hdr *)&buf; |
| 3495 | if (hdr->version != HT_CXLFLASH_VERSION_0) { |
| 3496 | dev_dbg(dev, "%s: Version %u not supported for %s\n", |
| 3497 | __func__, hdr->version, decode_hioctl(cmd)); |
| 3498 | rc = -EINVAL; |
| 3499 | goto out; |
| 3500 | } |
| 3501 | |
| 3502 | if (hdr->rsvd[0] || hdr->rsvd[1] || hdr->return_flags) { |
| 3503 | dev_dbg(dev, "%s: Reserved/rflags populated\n", __func__); |
| 3504 | rc = -EINVAL; |
| 3505 | goto out; |
| 3506 | } |
| 3507 | |
| 3508 | rc = do_ioctl(cfg, (void *)&buf); |
| 3509 | if (likely(!rc)) |
| 3510 | if (unlikely(copy_to_user(uarg, &buf, size))) { |
| 3511 | dev_err(dev, "%s: copy_to_user() fail " |
| 3512 | "size=%lu cmd=%d (%s) uarg=%p\n", |
| 3513 | __func__, size, cmd, decode_hioctl(cmd), uarg); |
| 3514 | rc = -EFAULT; |
| 3515 | } |
| 3516 | |
| 3517 | /* fall through to exit */ |
| 3518 | |
| 3519 | out: |
| 3520 | up_read(&cfg->ioctl_rwsem); |
| 3521 | if (unlikely(rc && known_ioctl)) |
| 3522 | dev_err(dev, "%s: ioctl %s (%08X) returned rc=%d\n", |
| 3523 | __func__, decode_hioctl(cmd), cmd, rc); |
| 3524 | else |
| 3525 | dev_dbg(dev, "%s: ioctl %s (%08X) returned rc=%d\n", |
| 3526 | __func__, decode_hioctl(cmd), cmd, rc); |
| 3527 | return rc; |
| 3528 | } |
| 3529 | |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3530 | /* |
| 3531 | * Character device file operations |
| 3532 | */ |
| 3533 | static const struct file_operations cxlflash_chr_fops = { |
| 3534 | .owner = THIS_MODULE, |
| 3535 | .open = cxlflash_chr_open, |
Matthew R. Ochs | d6e32f5 | 2017-06-21 21:15:42 -0500 | [diff] [blame] | 3536 | .unlocked_ioctl = cxlflash_chr_ioctl, |
| 3537 | .compat_ioctl = cxlflash_chr_ioctl, |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3538 | }; |
| 3539 | |
| 3540 | /** |
| 3541 | * init_chrdev() - initialize the character device for the host |
| 3542 | * @cfg: Internal structure associated with the host. |
| 3543 | * |
| 3544 | * Return: 0 on success, -errno on failure |
| 3545 | */ |
| 3546 | static int init_chrdev(struct cxlflash_cfg *cfg) |
| 3547 | { |
| 3548 | struct device *dev = &cfg->dev->dev; |
| 3549 | struct device *char_dev; |
| 3550 | dev_t devno; |
| 3551 | int minor; |
| 3552 | int rc = 0; |
| 3553 | |
| 3554 | minor = cxlflash_get_minor(); |
| 3555 | if (unlikely(minor < 0)) { |
| 3556 | dev_err(dev, "%s: Exhausted allowed adapters\n", __func__); |
| 3557 | rc = -ENOSPC; |
| 3558 | goto out; |
| 3559 | } |
| 3560 | |
| 3561 | devno = MKDEV(cxlflash_major, minor); |
| 3562 | cdev_init(&cfg->cdev, &cxlflash_chr_fops); |
| 3563 | |
| 3564 | rc = cdev_add(&cfg->cdev, devno, 1); |
| 3565 | if (rc) { |
| 3566 | dev_err(dev, "%s: cdev_add failed rc=%d\n", __func__, rc); |
| 3567 | goto err1; |
| 3568 | } |
| 3569 | |
| 3570 | char_dev = device_create(cxlflash_class, NULL, devno, |
| 3571 | NULL, "cxlflash%d", minor); |
| 3572 | if (IS_ERR(char_dev)) { |
| 3573 | rc = PTR_ERR(char_dev); |
| 3574 | dev_err(dev, "%s: device_create failed rc=%d\n", |
| 3575 | __func__, rc); |
| 3576 | goto err2; |
| 3577 | } |
| 3578 | |
| 3579 | cfg->chardev = char_dev; |
| 3580 | out: |
| 3581 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
| 3582 | return rc; |
| 3583 | err2: |
| 3584 | cdev_del(&cfg->cdev); |
| 3585 | err1: |
| 3586 | cxlflash_put_minor(minor); |
| 3587 | goto out; |
| 3588 | } |
| 3589 | |
| 3590 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3591 | * cxlflash_probe() - PCI entry point to add host |
| 3592 | * @pdev: PCI device associated with the host. |
| 3593 | * @dev_id: PCI device id associated with device. |
| 3594 | * |
Matthew R. Ochs | 323e334 | 2017-04-12 14:14:51 -0500 | [diff] [blame] | 3595 | * The device will initially start out in a 'probing' state and |
| 3596 | * transition to the 'normal' state at the end of a successful |
| 3597 | * probe. Should an EEH event occur during probe, the notification |
| 3598 | * thread (error_detected()) will wait until the probe handler |
| 3599 | * is nearly complete. At that time, the device will be moved to |
| 3600 | * a 'probed' state and the EEH thread woken up to drive the slot |
| 3601 | * reset and recovery (device moves to 'normal' state). Meanwhile, |
| 3602 | * the probe will be allowed to exit successfully. |
| 3603 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 3604 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3605 | */ |
| 3606 | static int cxlflash_probe(struct pci_dev *pdev, |
| 3607 | const struct pci_device_id *dev_id) |
| 3608 | { |
| 3609 | struct Scsi_Host *host; |
| 3610 | struct cxlflash_cfg *cfg = NULL; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3611 | struct device *dev = &pdev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3612 | struct dev_dependent_vals *ddv; |
| 3613 | int rc = 0; |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 3614 | int k; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3615 | |
| 3616 | dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n", |
| 3617 | __func__, pdev->irq); |
| 3618 | |
| 3619 | ddv = (struct dev_dependent_vals *)dev_id->driver_data; |
| 3620 | driver_template.max_sectors = ddv->max_sectors; |
| 3621 | |
| 3622 | host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg)); |
| 3623 | if (!host) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3624 | dev_err(dev, "%s: scsi_host_alloc failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3625 | rc = -ENOMEM; |
| 3626 | goto out; |
| 3627 | } |
| 3628 | |
| 3629 | host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS; |
| 3630 | host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3631 | host->unique_id = host->host_no; |
| 3632 | host->max_cmd_len = CXLFLASH_MAX_CDB_LEN; |
| 3633 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3634 | cfg = shost_priv(host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3635 | cfg->host = host; |
| 3636 | rc = alloc_mem(cfg); |
| 3637 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3638 | dev_err(dev, "%s: alloc_mem failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3639 | rc = -ENOMEM; |
Matthew R. Ochs | 8b5b1e8 | 2015-10-21 15:14:09 -0500 | [diff] [blame] | 3640 | scsi_host_put(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3641 | goto out; |
| 3642 | } |
| 3643 | |
| 3644 | cfg->init_state = INIT_STATE_NONE; |
| 3645 | cfg->dev = pdev; |
Matthew R. Ochs | 17ead26 | 2015-10-21 15:15:37 -0500 | [diff] [blame] | 3646 | cfg->cxl_fops = cxlflash_cxl_fops; |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 3647 | |
| 3648 | /* |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 3649 | * Promoted LUNs move to the top of the LUN table. The rest stay on |
| 3650 | * the bottom half. The bottom half grows from the end (index = 255), |
| 3651 | * whereas the top half grows from the beginning (index = 0). |
| 3652 | * |
| 3653 | * Initialize the last LUN index for all possible ports. |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 3654 | */ |
Matthew R. Ochs | 78ae028 | 2017-04-12 14:13:50 -0500 | [diff] [blame] | 3655 | cfg->promote_lun_index = 0; |
| 3656 | |
| 3657 | for (k = 0; k < MAX_FC_PORTS; k++) |
| 3658 | cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1; |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 3659 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3660 | cfg->dev_id = (struct pci_device_id *)dev_id; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3661 | |
| 3662 | init_waitqueue_head(&cfg->tmf_waitq); |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 3663 | init_waitqueue_head(&cfg->reset_waitq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3664 | |
| 3665 | INIT_WORK(&cfg->work_q, cxlflash_worker_thread); |
| 3666 | cfg->lr_state = LINK_RESET_INVALID; |
| 3667 | cfg->lr_port = -1; |
Matthew R. Ochs | 0d73122 | 2015-10-21 15:16:24 -0500 | [diff] [blame] | 3668 | spin_lock_init(&cfg->tmf_slock); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3669 | mutex_init(&cfg->ctx_tbl_list_mutex); |
| 3670 | mutex_init(&cfg->ctx_recovery_mutex); |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 3671 | init_rwsem(&cfg->ioctl_rwsem); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3672 | INIT_LIST_HEAD(&cfg->ctx_err_recovery); |
| 3673 | INIT_LIST_HEAD(&cfg->lluns); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3674 | |
| 3675 | pci_set_drvdata(pdev, cfg); |
| 3676 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3677 | cfg->cxl_afu = cxl_pci_to_afu(pdev); |
| 3678 | |
| 3679 | rc = init_pci(cfg); |
| 3680 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3681 | dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3682 | goto out_remove; |
| 3683 | } |
| 3684 | cfg->init_state = INIT_STATE_PCI; |
| 3685 | |
| 3686 | rc = init_afu(cfg); |
Matthew R. Ochs | 323e334 | 2017-04-12 14:14:51 -0500 | [diff] [blame] | 3687 | if (rc && !wq_has_sleeper(&cfg->reset_waitq)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3688 | dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3689 | goto out_remove; |
| 3690 | } |
| 3691 | cfg->init_state = INIT_STATE_AFU; |
| 3692 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3693 | rc = init_scsi(cfg); |
| 3694 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3695 | dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3696 | goto out_remove; |
| 3697 | } |
| 3698 | cfg->init_state = INIT_STATE_SCSI; |
| 3699 | |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3700 | rc = init_chrdev(cfg); |
| 3701 | if (rc) { |
| 3702 | dev_err(dev, "%s: init_chrdev failed rc=%d\n", __func__, rc); |
| 3703 | goto out_remove; |
| 3704 | } |
| 3705 | cfg->init_state = INIT_STATE_CDEV; |
| 3706 | |
Matthew R. Ochs | 323e334 | 2017-04-12 14:14:51 -0500 | [diff] [blame] | 3707 | if (wq_has_sleeper(&cfg->reset_waitq)) { |
| 3708 | cfg->state = STATE_PROBED; |
| 3709 | wake_up_all(&cfg->reset_waitq); |
| 3710 | } else |
| 3711 | cfg->state = STATE_NORMAL; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3712 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3713 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3714 | return rc; |
| 3715 | |
| 3716 | out_remove: |
| 3717 | cxlflash_remove(pdev); |
| 3718 | goto out; |
| 3719 | } |
| 3720 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3721 | /** |
| 3722 | * cxlflash_pci_error_detected() - called when a PCI error is detected |
| 3723 | * @pdev: PCI device struct. |
| 3724 | * @state: PCI channel state. |
| 3725 | * |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 3726 | * When an EEH occurs during an active reset, wait until the reset is |
| 3727 | * complete and then take action based upon the device state. |
| 3728 | * |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3729 | * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT |
| 3730 | */ |
| 3731 | static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev, |
| 3732 | pci_channel_state_t state) |
| 3733 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3734 | int rc = 0; |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3735 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 3736 | struct device *dev = &cfg->dev->dev; |
| 3737 | |
| 3738 | dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state); |
| 3739 | |
| 3740 | switch (state) { |
| 3741 | case pci_channel_io_frozen: |
Matthew R. Ochs | 323e334 | 2017-04-12 14:14:51 -0500 | [diff] [blame] | 3742 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET && |
| 3743 | cfg->state != STATE_PROBING); |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 3744 | if (cfg->state == STATE_FAILTERM) |
| 3745 | return PCI_ERS_RESULT_DISCONNECT; |
| 3746 | |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 3747 | cfg->state = STATE_RESET; |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3748 | scsi_block_requests(cfg->host); |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 3749 | drain_ioctls(cfg); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3750 | rc = cxlflash_mark_contexts_error(cfg); |
| 3751 | if (unlikely(rc)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3752 | dev_err(dev, "%s: Failed to mark user contexts rc=%d\n", |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3753 | __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 3754 | term_afu(cfg); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3755 | return PCI_ERS_RESULT_NEED_RESET; |
| 3756 | case pci_channel_io_perm_failure: |
| 3757 | cfg->state = STATE_FAILTERM; |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 3758 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3759 | scsi_unblock_requests(cfg->host); |
| 3760 | return PCI_ERS_RESULT_DISCONNECT; |
| 3761 | default: |
| 3762 | break; |
| 3763 | } |
| 3764 | return PCI_ERS_RESULT_NEED_RESET; |
| 3765 | } |
| 3766 | |
| 3767 | /** |
| 3768 | * cxlflash_pci_slot_reset() - called when PCI slot has been reset |
| 3769 | * @pdev: PCI device struct. |
| 3770 | * |
| 3771 | * This routine is called by the pci error recovery code after the PCI |
| 3772 | * slot has been reset, just before we should resume normal operations. |
| 3773 | * |
| 3774 | * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT |
| 3775 | */ |
| 3776 | static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev) |
| 3777 | { |
| 3778 | int rc = 0; |
| 3779 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 3780 | struct device *dev = &cfg->dev->dev; |
| 3781 | |
| 3782 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); |
| 3783 | |
| 3784 | rc = init_afu(cfg); |
| 3785 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 3786 | dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3787 | return PCI_ERS_RESULT_DISCONNECT; |
| 3788 | } |
| 3789 | |
| 3790 | return PCI_ERS_RESULT_RECOVERED; |
| 3791 | } |
| 3792 | |
| 3793 | /** |
| 3794 | * cxlflash_pci_resume() - called when normal operation can resume |
| 3795 | * @pdev: PCI device struct |
| 3796 | */ |
| 3797 | static void cxlflash_pci_resume(struct pci_dev *pdev) |
| 3798 | { |
| 3799 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 3800 | struct device *dev = &cfg->dev->dev; |
| 3801 | |
| 3802 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); |
| 3803 | |
| 3804 | cfg->state = STATE_NORMAL; |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 3805 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3806 | scsi_unblock_requests(cfg->host); |
| 3807 | } |
| 3808 | |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3809 | /** |
| 3810 | * cxlflash_devnode() - provides devtmpfs for devices in the cxlflash class |
| 3811 | * @dev: Character device. |
| 3812 | * @mode: Mode that can be used to verify access. |
| 3813 | * |
| 3814 | * Return: Allocated string describing the devtmpfs structure. |
| 3815 | */ |
| 3816 | static char *cxlflash_devnode(struct device *dev, umode_t *mode) |
| 3817 | { |
| 3818 | return kasprintf(GFP_KERNEL, "cxlflash/%s", dev_name(dev)); |
| 3819 | } |
| 3820 | |
| 3821 | /** |
| 3822 | * cxlflash_class_init() - create character device class |
| 3823 | * |
| 3824 | * Return: 0 on success, -errno on failure |
| 3825 | */ |
| 3826 | static int cxlflash_class_init(void) |
| 3827 | { |
| 3828 | dev_t devno; |
| 3829 | int rc = 0; |
| 3830 | |
| 3831 | rc = alloc_chrdev_region(&devno, 0, CXLFLASH_MAX_ADAPTERS, "cxlflash"); |
| 3832 | if (unlikely(rc)) { |
| 3833 | pr_err("%s: alloc_chrdev_region failed rc=%d\n", __func__, rc); |
| 3834 | goto out; |
| 3835 | } |
| 3836 | |
| 3837 | cxlflash_major = MAJOR(devno); |
| 3838 | |
| 3839 | cxlflash_class = class_create(THIS_MODULE, "cxlflash"); |
| 3840 | if (IS_ERR(cxlflash_class)) { |
| 3841 | rc = PTR_ERR(cxlflash_class); |
| 3842 | pr_err("%s: class_create failed rc=%d\n", __func__, rc); |
| 3843 | goto err; |
| 3844 | } |
| 3845 | |
| 3846 | cxlflash_class->devnode = cxlflash_devnode; |
| 3847 | out: |
| 3848 | pr_debug("%s: returning rc=%d\n", __func__, rc); |
| 3849 | return rc; |
| 3850 | err: |
| 3851 | unregister_chrdev_region(devno, CXLFLASH_MAX_ADAPTERS); |
| 3852 | goto out; |
| 3853 | } |
| 3854 | |
| 3855 | /** |
| 3856 | * cxlflash_class_exit() - destroy character device class |
| 3857 | */ |
| 3858 | static void cxlflash_class_exit(void) |
| 3859 | { |
| 3860 | dev_t devno = MKDEV(cxlflash_major, 0); |
| 3861 | |
| 3862 | class_destroy(cxlflash_class); |
| 3863 | unregister_chrdev_region(devno, CXLFLASH_MAX_ADAPTERS); |
| 3864 | } |
| 3865 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3866 | static const struct pci_error_handlers cxlflash_err_handler = { |
| 3867 | .error_detected = cxlflash_pci_error_detected, |
| 3868 | .slot_reset = cxlflash_pci_slot_reset, |
| 3869 | .resume = cxlflash_pci_resume, |
| 3870 | }; |
| 3871 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3872 | /* |
| 3873 | * PCI device structure |
| 3874 | */ |
| 3875 | static struct pci_driver cxlflash_driver = { |
| 3876 | .name = CXLFLASH_NAME, |
| 3877 | .id_table = cxlflash_pci_table, |
| 3878 | .probe = cxlflash_probe, |
| 3879 | .remove = cxlflash_remove, |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 3880 | .shutdown = cxlflash_remove, |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 3881 | .err_handler = &cxlflash_err_handler, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3882 | }; |
| 3883 | |
| 3884 | /** |
| 3885 | * init_cxlflash() - module entry point |
| 3886 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 3887 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3888 | */ |
| 3889 | static int __init init_cxlflash(void) |
| 3890 | { |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3891 | int rc; |
| 3892 | |
Matthew R. Ochs | cd41e18 | 2017-04-12 14:15:11 -0500 | [diff] [blame] | 3893 | check_sizes(); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3894 | cxlflash_list_init(); |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3895 | rc = cxlflash_class_init(); |
| 3896 | if (unlikely(rc)) |
| 3897 | goto out; |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3898 | |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3899 | rc = pci_register_driver(&cxlflash_driver); |
| 3900 | if (unlikely(rc)) |
| 3901 | goto err; |
| 3902 | out: |
| 3903 | pr_debug("%s: returning rc=%d\n", __func__, rc); |
| 3904 | return rc; |
| 3905 | err: |
| 3906 | cxlflash_class_exit(); |
| 3907 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3908 | } |
| 3909 | |
| 3910 | /** |
| 3911 | * exit_cxlflash() - module exit point |
| 3912 | */ |
| 3913 | static void __exit exit_cxlflash(void) |
| 3914 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 3915 | cxlflash_term_global_luns(); |
| 3916 | cxlflash_free_errpage(); |
| 3917 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3918 | pci_unregister_driver(&cxlflash_driver); |
Uma Krishnan | a834a36 | 2017-06-21 21:15:18 -0500 | [diff] [blame] | 3919 | cxlflash_class_exit(); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 3920 | } |
| 3921 | |
| 3922 | module_init(init_cxlflash); |
| 3923 | module_exit(exit_cxlflash); |