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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Raed Salem16f1c5b2017-07-30 11:02:51 +0300330 u8 log_max_flow_counter[0x8];
331 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 log_max_flow[0x8];
333
Matan Barakb4ff3a32016-02-09 14:57:42 +0200334 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335
336 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
339};
340
341struct mlx5_ifc_odp_per_transport_service_cap_bits {
342 u8 send[0x1];
343 u8 receive[0x1];
344 u8 write[0x1];
345 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200346 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300347 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349};
350
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200351struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353
354 u8 ipv4[0x20];
355};
356
357struct mlx5_ifc_ipv6_layout_bits {
358 u8 ipv6[16][0x8];
359};
360
361union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
362 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
363 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200364 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200365};
366
Saeed Mahameede2816822015-05-28 22:28:40 +0300367struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
368 u8 smac_47_16[0x20];
369
370 u8 smac_15_0[0x10];
371 u8 ethertype[0x10];
372
373 u8 dmac_47_16[0x20];
374
375 u8 dmac_15_0[0x10];
376 u8 first_prio[0x3];
377 u8 first_cfi[0x1];
378 u8 first_vid[0xc];
379
380 u8 ip_protocol[0x8];
381 u8 ip_dscp[0x6];
382 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300383 u8 cvlan_tag[0x1];
384 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300385 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300386 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 tcp_flags[0x9];
388
389 u8 tcp_sport[0x10];
390 u8 tcp_dport[0x10];
391
Or Gerlitza8ade552017-06-07 17:49:56 +0300392 u8 reserved_at_c0[0x18];
393 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300394
395 u8 udp_sport[0x10];
396 u8 udp_dport[0x10];
397
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200398 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401};
402
403struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300404 u8 reserved_at_0[0x8];
405 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300406
Matan Barakb4ff3a32016-02-09 14:57:42 +0200407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408 u8 source_port[0x10];
409
410 u8 outer_second_prio[0x3];
411 u8 outer_second_cfi[0x1];
412 u8 outer_second_vid[0xc];
413 u8 inner_second_prio[0x3];
414 u8 inner_second_cfi[0x1];
415 u8 inner_second_vid[0xc];
416
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300417 u8 outer_second_cvlan_tag[0x1];
418 u8 inner_second_cvlan_tag[0x1];
419 u8 outer_second_svlan_tag[0x1];
420 u8 inner_second_svlan_tag[0x1];
421 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300422 u8 gre_protocol[0x10];
423
424 u8 gre_key_h[0x18];
425 u8 gre_key_l[0x8];
426
427 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 outer_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436 u8 inner_ipv6_flow_label[0x14];
437
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300438 u8 reserved_at_120[0x28];
439 u8 bth_dst_qp[0x18];
440 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300441};
442
443struct mlx5_ifc_cmd_pas_bits {
444 u8 pa_h[0x20];
445
446 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200447 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300448};
449
450struct mlx5_ifc_uint64_bits {
451 u8 hi[0x20];
452
453 u8 lo[0x20];
454};
455
456enum {
457 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
458 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
459 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
460 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
461 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
462 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
463 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
464 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
465 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
466 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
467};
468
469struct mlx5_ifc_ads_bits {
470 u8 fl[0x1];
471 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 pkey_index[0x10];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 grh[0x1];
477 u8 mlid[0x7];
478 u8 rlid[0x10];
479
480 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 stat_rate[0x4];
485 u8 hop_limit[0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 tclass[0x8];
489 u8 flow_label[0x14];
490
491 u8 rgid_rip[16][0x8];
492
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 f_dscp[0x1];
495 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200496 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300497 u8 f_eth_prio[0x1];
498 u8 ecn[0x2];
499 u8 dscp[0x6];
500 u8 udp_sport[0x10];
501
502 u8 dei_cfi[0x1];
503 u8 eth_prio[0x3];
504 u8 sl[0x4];
505 u8 port[0x8];
506 u8 rmac_47_32[0x10];
507
508 u8 rmac_31_0[0x20];
509};
510
511struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200512 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300513 u8 nic_rx_multi_path_tirs_fts[0x1];
514 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
515 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
524
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530};
531
Saeed Mahameed495716b2015-12-01 18:03:19 +0200532struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
536
537 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
540
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542};
543
Saeed Mahameedd6666752015-12-01 18:03:22 +0200544struct mlx5_ifc_e_switch_cap_bits {
545 u8 vport_svlan_strip[0x1];
546 u8 vport_cvlan_strip[0x1];
547 u8 vport_svlan_insert[0x1];
548 u8 vport_cvlan_insert_if_not_exist[0x1];
549 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300550 u8 reserved_at_5[0x19];
551 u8 nic_vport_node_guid_modify[0x1];
552 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200553
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300554 u8 vxlan_encap_decap[0x1];
555 u8 nvgre_encap_decap[0x1];
556 u8 reserved_at_22[0x9];
557 u8 log_max_encap_headers[0x5];
558 u8 reserved_2b[0x6];
559 u8 max_encap_header_size[0xa];
560
561 u8 reserved_40[0x7c0];
562
Saeed Mahameedd6666752015-12-01 18:03:22 +0200563};
564
Saeed Mahameed74862162016-06-09 15:11:34 +0300565struct mlx5_ifc_qos_cap_bits {
566 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300567 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200568 u8 esw_bw_share[0x1];
569 u8 esw_rate_limit[0x1];
570 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_20[0x20];
573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300577
578 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 esw_element_type[0x10];
582 u8 esw_tsar_type[0x10];
583
584 u8 reserved_at_c0[0x10];
585 u8 max_qos_para_vport[0x10];
586
587 u8 max_tsar_bw_share[0x20];
588
589 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300590};
591
Saeed Mahameede2816822015-05-28 22:28:40 +0300592struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
593 u8 csum_cap[0x1];
594 u8 vlan_cap[0x1];
595 u8 lro_cap[0x1];
596 u8 lro_psh_flag[0x1];
597 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200598 u8 reserved_at_5[0x2];
599 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200600 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200603 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300604 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300606 u8 reg_umr_sq[0x1];
607 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300608 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300611 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 tunnel_stateless_vxlan[0x1];
613
Ilan Tayari547eede2017-04-18 16:04:28 +0300614 u8 swp[0x1];
615 u8 swp_csum[0x1];
616 u8 swp_lso[0x1];
617 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618
Matan Barakb4ff3a32016-02-09 14:57:42 +0200619 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 lro_min_mss_size[0x10];
621
Matan Barakb4ff3a32016-02-09 14:57:42 +0200622 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623
624 u8 lro_timer_supported_periods[4][0x20];
625
Matan Barakb4ff3a32016-02-09 14:57:42 +0200626 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627};
628
629struct mlx5_ifc_roce_cap_bits {
630 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632
Matan Barakb4ff3a32016-02-09 14:57:42 +0200633 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638 u8 roce_version[0x8];
639
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641 u8 r_roce_dest_udp_port[0x10];
642
643 u8 r_roce_max_src_udp_port[0x10];
644 u8 r_roce_min_src_udp_port[0x10];
645
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647 u8 roce_address_table_size[0x10];
648
Matan Barakb4ff3a32016-02-09 14:57:42 +0200649 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300650};
651
652enum {
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
662};
663
664enum {
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
674};
675
676struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200677 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300678
Or Gerlitzbd108382017-05-28 15:24:17 +0300679 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200680 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300681 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300682
Matan Barakb4ff3a32016-02-09 14:57:42 +0200683 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200688 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300689
Matan Barakb4ff3a32016-02-09 14:57:42 +0200690 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200691 u8 atomic_size_qp[0x10];
692
Matan Barakb4ff3a32016-02-09 14:57:42 +0200693 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300694 u8 atomic_size_dc[0x10];
695
Matan Barakb4ff3a32016-02-09 14:57:42 +0200696 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300697};
698
699struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200700 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300701
702 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200703 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300704
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
707 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
708
709 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
710
711 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
712
Matan Barakb4ff3a32016-02-09 14:57:42 +0200713 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300714};
715
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200716struct mlx5_ifc_calc_op {
717 u8 reserved_at_0[0x10];
718 u8 reserved_at_10[0x9];
719 u8 op_swap_endianness[0x1];
720 u8 op_min[0x1];
721 u8 op_xor[0x1];
722 u8 op_or[0x1];
723 u8 op_and[0x1];
724 u8 op_max[0x1];
725 u8 op_add[0x1];
726};
727
728struct mlx5_ifc_vector_calc_cap_bits {
729 u8 calc_matrix[0x1];
730 u8 reserved_at_1[0x1f];
731 u8 reserved_at_20[0x8];
732 u8 max_vec_count[0x8];
733 u8 reserved_at_30[0xd];
734 u8 max_chunk_size[0x3];
735 struct mlx5_ifc_calc_op calc0;
736 struct mlx5_ifc_calc_op calc1;
737 struct mlx5_ifc_calc_op calc2;
738 struct mlx5_ifc_calc_op calc3;
739
740 u8 reserved_at_e0[0x720];
741};
742
Saeed Mahameede2816822015-05-28 22:28:40 +0300743enum {
744 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
745 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300746 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300747};
748
749enum {
750 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
751 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
752};
753
754enum {
755 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
756 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
757 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
759 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
760};
761
762enum {
763 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
764 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
765 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
768 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
769};
770
771enum {
772 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
773 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
774};
775
776enum {
777 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
778 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
779 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
780};
781
782enum {
783 MLX5_CAP_PORT_TYPE_IB = 0x0,
784 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300785};
786
Max Gurtovoy1410a902017-05-28 10:53:10 +0300787enum {
788 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
789 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
790 MLX5_CAP_UMR_FENCE_NONE = 0x2,
791};
792
Eli Cohenb7755162014-10-02 12:19:44 +0300793struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200794 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300795
796 u8 log_max_srq_sz[0x8];
797 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200798 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300799 u8 log_max_qp[0x5];
800
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300802 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200803 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300804
Matan Barakb4ff3a32016-02-09 14:57:42 +0200805 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300806 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_cq[0x5];
809
810 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200811 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200813 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300814 u8 log_max_eq[0x4];
815
816 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200817 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200819 u8 force_teardown[0x1];
820 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200822 u8 umr_extended_translation_offset[0x1];
823 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_klm_list_size[0x6];
825
Matan Barakb4ff3a32016-02-09 14:57:42 +0200826 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200828 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300829 u8 log_max_ra_res_dc[0x6];
830
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200833 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300834 u8 log_max_ra_res_qp[0x6];
835
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200836 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 cc_query_allowed[0x1];
838 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200839 u8 start_pad[0x1];
840 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300841 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300842 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300843
Saeed Mahameede2816822015-05-28 22:28:40 +0300844 u8 out_of_seq_cnt[0x1];
845 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300846 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300847 u8 reserved_at_183[0x1];
848 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300849 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300850 u8 max_qp_cnt[0xa];
851 u8 pkey_table_size[0x10];
852
Saeed Mahameede2816822015-05-28 22:28:40 +0300853 u8 vport_group_manager[0x1];
854 u8 vhca_group_manager[0x1];
855 u8 ib_virt[0x1];
856 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200857 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300858 u8 ets[0x1];
859 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200860 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300861 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200862 u8 mcam_reg[0x1];
863 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300864 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200865 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300866 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300867 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200868 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300869 u8 disable_link_up[0x1];
870 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300871 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300872 u8 num_ports[0x8];
873
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300874 u8 reserved_at_1c0[0x1];
875 u8 pps[0x1];
876 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300877 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300878 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200879 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300880 u8 reserved_at_1d0[0x1];
881 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300882 u8 general_notification_event[0x1];
883 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200884 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200885 u8 rol_s[0x1];
886 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300887 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200888 u8 wol_s[0x1];
889 u8 wol_g[0x1];
890 u8 wol_a[0x1];
891 u8 wol_b[0x1];
892 u8 wol_m[0x1];
893 u8 wol_u[0x1];
894 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300895
896 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300897 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300898 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300899
Saeed Mahameede2816822015-05-28 22:28:40 +0300900 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300901 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300902 u8 reserved_at_202[0x1];
903 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200904 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300905 u8 reserved_at_205[0x5];
906 u8 umr_fence[0x2];
907 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300908 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300909 u8 cmdif_checksum[0x2];
910 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300911 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300912 u8 wq_signature[0x1];
913 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300914 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300915 u8 sho[0x1];
916 u8 tph[0x1];
917 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300918 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300919 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300920 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300921 u8 roce[0x1];
922 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300923 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300924
925 u8 cq_oi[0x1];
926 u8 cq_resize[0x1];
927 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300928 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300929 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 pg[0x1];
931 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300932 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300933 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300934 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300935 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200938 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300939 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200940 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300941 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300942 u8 qkv[0x1];
943 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200944 u8 set_deth_sqpn[0x1];
945 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 xrc[0x1];
947 u8 ud[0x1];
948 u8 uc[0x1];
949 u8 rc[0x1];
950
Eli Cohena6d51b62017-01-03 23:55:23 +0200951 u8 uar_4k[0x1];
952 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300953 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300954 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300955 u8 log_pg_sz[0x8];
956
957 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200958 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300959 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300961 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300962
963 u8 reserved_at_270[0xb];
964 u8 lag_master[0x1];
965 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300966
Tariq Toukane1c9c622016-04-11 23:10:21 +0300967 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300968 u8 max_wqe_sz_sq[0x10];
969
Tariq Toukane1c9c622016-04-11 23:10:21 +0300970 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 max_wqe_sz_rq[0x10];
972
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300973 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 max_wqe_sz_sq_dc[0x10];
975
Tariq Toukane1c9c622016-04-11 23:10:21 +0300976 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300977 u8 max_qp_mcg[0x19];
978
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_mcg[0x8];
981
Tariq Toukane1c9c622016-04-11 23:10:21 +0300982 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300983 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300984 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300985 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300986 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300987 u8 log_max_xrcd[0x5];
988
Amir Vadaia351a1b02016-07-14 10:32:38 +0300989 u8 reserved_at_340[0x8];
990 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300991 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300992
Eli Cohenb7755162014-10-02 12:19:44 +0300993
Tariq Toukane1c9c622016-04-11 23:10:21 +0300994 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300995 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300996 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300997 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001001 u8 log_max_tis[0x5];
1002
Saeed Mahameede2816822015-05-28 22:28:40 +03001003 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001005 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001007 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001011 u8 log_max_tis_per_sq[0x5];
1012
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001014 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001016 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001018 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001020 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001021
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001023 u8 log_max_wq_sz[0x5];
1024
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001025 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001026 u8 disable_local_lb[0x1];
1027 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001028 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001029 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001030 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001031 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001032 u8 log_max_current_uc_list[0x5];
1033
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001035
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001037 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001039 u8 log_uar_page_sz[0x10];
1040
Tariq Toukane1c9c622016-04-11 23:10:21 +03001041 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001042 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001043 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001044
Eli Cohena6d51b62017-01-03 23:55:23 +02001045 u8 reserved_at_500[0x20];
1046 u8 num_of_uars_per_page[0x20];
1047 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048
1049 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001050 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001051
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001052 u8 cqe_compression_timeout[0x10];
1053 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001054
Saeed Mahameed74862162016-06-09 15:11:34 +03001055 u8 reserved_at_5e0[0x10];
1056 u8 tag_matching[0x1];
1057 u8 rndv_offload_rc[0x1];
1058 u8 rndv_offload_dc[0x1];
1059 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001060 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001061 u8 log_max_xrq[0x5];
1062
Max Gurtovoy7b135582017-01-02 11:37:38 +02001063 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001064};
1065
Saeed Mahameed81848732015-12-01 18:03:20 +02001066enum mlx5_flow_destination_type {
1067 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1068 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1069 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001070
1071 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001072};
1073
1074struct mlx5_ifc_dest_format_struct_bits {
1075 u8 destination_type[0x8];
1076 u8 destination_id[0x18];
1077
Matan Barakb4ff3a32016-02-09 14:57:42 +02001078 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001079};
1080
Amir Vadai9dc0b282016-05-13 12:55:39 +00001081struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001082 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001083
1084 u8 reserved_at_20[0x20];
1085};
1086
1087union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1088 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1089 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1090 u8 reserved_at_0[0x40];
1091};
1092
Saeed Mahameede2816822015-05-28 22:28:40 +03001093struct mlx5_ifc_fte_match_param_bits {
1094 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1095
1096 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1097
1098 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1099
Matan Barakb4ff3a32016-02-09 14:57:42 +02001100 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001101};
1102
1103enum {
1104 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1105 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1106 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1107 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1108 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1109};
1110
1111struct mlx5_ifc_rx_hash_field_select_bits {
1112 u8 l3_prot_type[0x1];
1113 u8 l4_prot_type[0x1];
1114 u8 selected_fields[0x1e];
1115};
1116
1117enum {
1118 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1119 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1120};
1121
1122enum {
1123 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1124 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1125};
1126
1127struct mlx5_ifc_wq_bits {
1128 u8 wq_type[0x4];
1129 u8 wq_signature[0x1];
1130 u8 end_padding_mode[0x2];
1131 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001133
1134 u8 hds_skip_first_sge[0x1];
1135 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001136 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137 u8 page_offset[0x5];
1138 u8 lwm[0x10];
1139
Matan Barakb4ff3a32016-02-09 14:57:42 +02001140 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001141 u8 pd[0x18];
1142
Matan Barakb4ff3a32016-02-09 14:57:42 +02001143 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001144 u8 uar_page[0x18];
1145
1146 u8 dbr_addr[0x40];
1147
1148 u8 hw_counter[0x20];
1149
1150 u8 sw_counter[0x20];
1151
Matan Barakb4ff3a32016-02-09 14:57:42 +02001152 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001153 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001154 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001155 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001156 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001157 u8 log_wq_sz[0x5];
1158
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001159 u8 reserved_at_120[0x15];
1160 u8 log_wqe_num_of_strides[0x3];
1161 u8 two_byte_shift_en[0x1];
1162 u8 reserved_at_139[0x4];
1163 u8 log_wqe_stride_size[0x3];
1164
1165 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001166
1167 struct mlx5_ifc_cmd_pas_bits pas[0];
1168};
1169
1170struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001171 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001172 u8 rq_num[0x18];
1173};
1174
1175struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001176 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001177 u8 mac_addr_47_32[0x10];
1178
1179 u8 mac_addr_31_0[0x20];
1180};
1181
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001182struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001183 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001184 u8 vlan[0x0c];
1185
Matan Barakb4ff3a32016-02-09 14:57:42 +02001186 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001187};
1188
Saeed Mahameede2816822015-05-28 22:28:40 +03001189struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001190 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001191
1192 u8 min_time_between_cnps[0x20];
1193
Matan Barakb4ff3a32016-02-09 14:57:42 +02001194 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001195 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001196 u8 reserved_at_d8[0x4];
1197 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198 u8 cnp_802p_prio[0x3];
1199
Matan Barakb4ff3a32016-02-09 14:57:42 +02001200 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001201};
1202
1203struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001204 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001205
Matan Barakb4ff3a32016-02-09 14:57:42 +02001206 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001207 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001208 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001209 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001210 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001211
Matan Barakb4ff3a32016-02-09 14:57:42 +02001212 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001213
1214 u8 rpg_time_reset[0x20];
1215
1216 u8 rpg_byte_reset[0x20];
1217
1218 u8 rpg_threshold[0x20];
1219
1220 u8 rpg_max_rate[0x20];
1221
1222 u8 rpg_ai_rate[0x20];
1223
1224 u8 rpg_hai_rate[0x20];
1225
1226 u8 rpg_gd[0x20];
1227
1228 u8 rpg_min_dec_fac[0x20];
1229
1230 u8 rpg_min_rate[0x20];
1231
Matan Barakb4ff3a32016-02-09 14:57:42 +02001232 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001233
1234 u8 rate_to_set_on_first_cnp[0x20];
1235
1236 u8 dce_tcp_g[0x20];
1237
1238 u8 dce_tcp_rtt[0x20];
1239
1240 u8 rate_reduce_monitor_period[0x20];
1241
Matan Barakb4ff3a32016-02-09 14:57:42 +02001242 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001243
1244 u8 initial_alpha_value[0x20];
1245
Matan Barakb4ff3a32016-02-09 14:57:42 +02001246 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001247};
1248
1249struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001250 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001251
1252 u8 rppp_max_rps[0x20];
1253
1254 u8 rpg_time_reset[0x20];
1255
1256 u8 rpg_byte_reset[0x20];
1257
1258 u8 rpg_threshold[0x20];
1259
1260 u8 rpg_max_rate[0x20];
1261
1262 u8 rpg_ai_rate[0x20];
1263
1264 u8 rpg_hai_rate[0x20];
1265
1266 u8 rpg_gd[0x20];
1267
1268 u8 rpg_min_dec_fac[0x20];
1269
1270 u8 rpg_min_rate[0x20];
1271
Matan Barakb4ff3a32016-02-09 14:57:42 +02001272 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001273};
1274
1275enum {
1276 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1277 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1278 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1279};
1280
1281struct mlx5_ifc_resize_field_select_bits {
1282 u8 resize_field_select[0x20];
1283};
1284
1285enum {
1286 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1287 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1288 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1289 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1290};
1291
1292struct mlx5_ifc_modify_field_select_bits {
1293 u8 modify_field_select[0x20];
1294};
1295
1296struct mlx5_ifc_field_select_r_roce_np_bits {
1297 u8 field_select_r_roce_np[0x20];
1298};
1299
1300struct mlx5_ifc_field_select_r_roce_rp_bits {
1301 u8 field_select_r_roce_rp[0x20];
1302};
1303
1304enum {
1305 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1307 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1308 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1309 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1310 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1311 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1312 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1313 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1314 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1315};
1316
1317struct mlx5_ifc_field_select_802_1qau_rp_bits {
1318 u8 field_select_8021qaurp[0x20];
1319};
1320
1321struct mlx5_ifc_phys_layer_cntrs_bits {
1322 u8 time_since_last_clear_high[0x20];
1323
1324 u8 time_since_last_clear_low[0x20];
1325
1326 u8 symbol_errors_high[0x20];
1327
1328 u8 symbol_errors_low[0x20];
1329
1330 u8 sync_headers_errors_high[0x20];
1331
1332 u8 sync_headers_errors_low[0x20];
1333
1334 u8 edpl_bip_errors_lane0_high[0x20];
1335
1336 u8 edpl_bip_errors_lane0_low[0x20];
1337
1338 u8 edpl_bip_errors_lane1_high[0x20];
1339
1340 u8 edpl_bip_errors_lane1_low[0x20];
1341
1342 u8 edpl_bip_errors_lane2_high[0x20];
1343
1344 u8 edpl_bip_errors_lane2_low[0x20];
1345
1346 u8 edpl_bip_errors_lane3_high[0x20];
1347
1348 u8 edpl_bip_errors_lane3_low[0x20];
1349
1350 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1351
1352 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1353
1354 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1355
1356 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1357
1358 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1359
1360 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1361
1362 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1363
1364 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1365
1366 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1367
1368 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1369
1370 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1371
1372 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1373
1374 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1375
1376 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1377
1378 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1379
1380 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1381
1382 u8 rs_fec_corrected_blocks_high[0x20];
1383
1384 u8 rs_fec_corrected_blocks_low[0x20];
1385
1386 u8 rs_fec_uncorrectable_blocks_high[0x20];
1387
1388 u8 rs_fec_uncorrectable_blocks_low[0x20];
1389
1390 u8 rs_fec_no_errors_blocks_high[0x20];
1391
1392 u8 rs_fec_no_errors_blocks_low[0x20];
1393
1394 u8 rs_fec_single_error_blocks_high[0x20];
1395
1396 u8 rs_fec_single_error_blocks_low[0x20];
1397
1398 u8 rs_fec_corrected_symbols_total_high[0x20];
1399
1400 u8 rs_fec_corrected_symbols_total_low[0x20];
1401
1402 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1403
1404 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1405
1406 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1407
1408 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1409
1410 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1411
1412 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1413
1414 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1415
1416 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1417
1418 u8 link_down_events[0x20];
1419
1420 u8 successful_recovery_events[0x20];
1421
Matan Barakb4ff3a32016-02-09 14:57:42 +02001422 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001423};
1424
Gal Pressmand8dc0502016-09-27 17:04:51 +03001425struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1426 u8 time_since_last_clear_high[0x20];
1427
1428 u8 time_since_last_clear_low[0x20];
1429
1430 u8 phy_received_bits_high[0x20];
1431
1432 u8 phy_received_bits_low[0x20];
1433
1434 u8 phy_symbol_errors_high[0x20];
1435
1436 u8 phy_symbol_errors_low[0x20];
1437
1438 u8 phy_corrected_bits_high[0x20];
1439
1440 u8 phy_corrected_bits_low[0x20];
1441
1442 u8 phy_corrected_bits_lane0_high[0x20];
1443
1444 u8 phy_corrected_bits_lane0_low[0x20];
1445
1446 u8 phy_corrected_bits_lane1_high[0x20];
1447
1448 u8 phy_corrected_bits_lane1_low[0x20];
1449
1450 u8 phy_corrected_bits_lane2_high[0x20];
1451
1452 u8 phy_corrected_bits_lane2_low[0x20];
1453
1454 u8 phy_corrected_bits_lane3_high[0x20];
1455
1456 u8 phy_corrected_bits_lane3_low[0x20];
1457
1458 u8 reserved_at_200[0x5c0];
1459};
1460
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001461struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1462 u8 symbol_error_counter[0x10];
1463
1464 u8 link_error_recovery_counter[0x8];
1465
1466 u8 link_downed_counter[0x8];
1467
1468 u8 port_rcv_errors[0x10];
1469
1470 u8 port_rcv_remote_physical_errors[0x10];
1471
1472 u8 port_rcv_switch_relay_errors[0x10];
1473
1474 u8 port_xmit_discards[0x10];
1475
1476 u8 port_xmit_constraint_errors[0x8];
1477
1478 u8 port_rcv_constraint_errors[0x8];
1479
1480 u8 reserved_at_70[0x8];
1481
1482 u8 link_overrun_errors[0x8];
1483
1484 u8 reserved_at_80[0x10];
1485
1486 u8 vl_15_dropped[0x10];
1487
Tim Wright133bea02017-05-01 17:30:08 +01001488 u8 reserved_at_a0[0x80];
1489
1490 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001491};
1492
Saeed Mahameede2816822015-05-28 22:28:40 +03001493struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1494 u8 transmit_queue_high[0x20];
1495
1496 u8 transmit_queue_low[0x20];
1497
Matan Barakb4ff3a32016-02-09 14:57:42 +02001498 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001499};
1500
1501struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1502 u8 rx_octets_high[0x20];
1503
1504 u8 rx_octets_low[0x20];
1505
Matan Barakb4ff3a32016-02-09 14:57:42 +02001506 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001507
1508 u8 rx_frames_high[0x20];
1509
1510 u8 rx_frames_low[0x20];
1511
1512 u8 tx_octets_high[0x20];
1513
1514 u8 tx_octets_low[0x20];
1515
Matan Barakb4ff3a32016-02-09 14:57:42 +02001516 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001517
1518 u8 tx_frames_high[0x20];
1519
1520 u8 tx_frames_low[0x20];
1521
1522 u8 rx_pause_high[0x20];
1523
1524 u8 rx_pause_low[0x20];
1525
1526 u8 rx_pause_duration_high[0x20];
1527
1528 u8 rx_pause_duration_low[0x20];
1529
1530 u8 tx_pause_high[0x20];
1531
1532 u8 tx_pause_low[0x20];
1533
1534 u8 tx_pause_duration_high[0x20];
1535
1536 u8 tx_pause_duration_low[0x20];
1537
1538 u8 rx_pause_transition_high[0x20];
1539
1540 u8 rx_pause_transition_low[0x20];
1541
Matan Barakb4ff3a32016-02-09 14:57:42 +02001542 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001543};
1544
1545struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1546 u8 port_transmit_wait_high[0x20];
1547
1548 u8 port_transmit_wait_low[0x20];
1549
Gal Pressman2dba0792017-06-18 14:56:45 +03001550 u8 reserved_at_40[0x100];
1551
1552 u8 rx_buffer_almost_full_high[0x20];
1553
1554 u8 rx_buffer_almost_full_low[0x20];
1555
1556 u8 rx_buffer_full_high[0x20];
1557
1558 u8 rx_buffer_full_low[0x20];
1559
1560 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001561};
1562
1563struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1564 u8 dot3stats_alignment_errors_high[0x20];
1565
1566 u8 dot3stats_alignment_errors_low[0x20];
1567
1568 u8 dot3stats_fcs_errors_high[0x20];
1569
1570 u8 dot3stats_fcs_errors_low[0x20];
1571
1572 u8 dot3stats_single_collision_frames_high[0x20];
1573
1574 u8 dot3stats_single_collision_frames_low[0x20];
1575
1576 u8 dot3stats_multiple_collision_frames_high[0x20];
1577
1578 u8 dot3stats_multiple_collision_frames_low[0x20];
1579
1580 u8 dot3stats_sqe_test_errors_high[0x20];
1581
1582 u8 dot3stats_sqe_test_errors_low[0x20];
1583
1584 u8 dot3stats_deferred_transmissions_high[0x20];
1585
1586 u8 dot3stats_deferred_transmissions_low[0x20];
1587
1588 u8 dot3stats_late_collisions_high[0x20];
1589
1590 u8 dot3stats_late_collisions_low[0x20];
1591
1592 u8 dot3stats_excessive_collisions_high[0x20];
1593
1594 u8 dot3stats_excessive_collisions_low[0x20];
1595
1596 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1597
1598 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1599
1600 u8 dot3stats_carrier_sense_errors_high[0x20];
1601
1602 u8 dot3stats_carrier_sense_errors_low[0x20];
1603
1604 u8 dot3stats_frame_too_longs_high[0x20];
1605
1606 u8 dot3stats_frame_too_longs_low[0x20];
1607
1608 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1609
1610 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1611
1612 u8 dot3stats_symbol_errors_high[0x20];
1613
1614 u8 dot3stats_symbol_errors_low[0x20];
1615
1616 u8 dot3control_in_unknown_opcodes_high[0x20];
1617
1618 u8 dot3control_in_unknown_opcodes_low[0x20];
1619
1620 u8 dot3in_pause_frames_high[0x20];
1621
1622 u8 dot3in_pause_frames_low[0x20];
1623
1624 u8 dot3out_pause_frames_high[0x20];
1625
1626 u8 dot3out_pause_frames_low[0x20];
1627
Matan Barakb4ff3a32016-02-09 14:57:42 +02001628 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001629};
1630
1631struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1632 u8 ether_stats_drop_events_high[0x20];
1633
1634 u8 ether_stats_drop_events_low[0x20];
1635
1636 u8 ether_stats_octets_high[0x20];
1637
1638 u8 ether_stats_octets_low[0x20];
1639
1640 u8 ether_stats_pkts_high[0x20];
1641
1642 u8 ether_stats_pkts_low[0x20];
1643
1644 u8 ether_stats_broadcast_pkts_high[0x20];
1645
1646 u8 ether_stats_broadcast_pkts_low[0x20];
1647
1648 u8 ether_stats_multicast_pkts_high[0x20];
1649
1650 u8 ether_stats_multicast_pkts_low[0x20];
1651
1652 u8 ether_stats_crc_align_errors_high[0x20];
1653
1654 u8 ether_stats_crc_align_errors_low[0x20];
1655
1656 u8 ether_stats_undersize_pkts_high[0x20];
1657
1658 u8 ether_stats_undersize_pkts_low[0x20];
1659
1660 u8 ether_stats_oversize_pkts_high[0x20];
1661
1662 u8 ether_stats_oversize_pkts_low[0x20];
1663
1664 u8 ether_stats_fragments_high[0x20];
1665
1666 u8 ether_stats_fragments_low[0x20];
1667
1668 u8 ether_stats_jabbers_high[0x20];
1669
1670 u8 ether_stats_jabbers_low[0x20];
1671
1672 u8 ether_stats_collisions_high[0x20];
1673
1674 u8 ether_stats_collisions_low[0x20];
1675
1676 u8 ether_stats_pkts64octets_high[0x20];
1677
1678 u8 ether_stats_pkts64octets_low[0x20];
1679
1680 u8 ether_stats_pkts65to127octets_high[0x20];
1681
1682 u8 ether_stats_pkts65to127octets_low[0x20];
1683
1684 u8 ether_stats_pkts128to255octets_high[0x20];
1685
1686 u8 ether_stats_pkts128to255octets_low[0x20];
1687
1688 u8 ether_stats_pkts256to511octets_high[0x20];
1689
1690 u8 ether_stats_pkts256to511octets_low[0x20];
1691
1692 u8 ether_stats_pkts512to1023octets_high[0x20];
1693
1694 u8 ether_stats_pkts512to1023octets_low[0x20];
1695
1696 u8 ether_stats_pkts1024to1518octets_high[0x20];
1697
1698 u8 ether_stats_pkts1024to1518octets_low[0x20];
1699
1700 u8 ether_stats_pkts1519to2047octets_high[0x20];
1701
1702 u8 ether_stats_pkts1519to2047octets_low[0x20];
1703
1704 u8 ether_stats_pkts2048to4095octets_high[0x20];
1705
1706 u8 ether_stats_pkts2048to4095octets_low[0x20];
1707
1708 u8 ether_stats_pkts4096to8191octets_high[0x20];
1709
1710 u8 ether_stats_pkts4096to8191octets_low[0x20];
1711
1712 u8 ether_stats_pkts8192to10239octets_high[0x20];
1713
1714 u8 ether_stats_pkts8192to10239octets_low[0x20];
1715
Matan Barakb4ff3a32016-02-09 14:57:42 +02001716 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001717};
1718
1719struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1720 u8 if_in_octets_high[0x20];
1721
1722 u8 if_in_octets_low[0x20];
1723
1724 u8 if_in_ucast_pkts_high[0x20];
1725
1726 u8 if_in_ucast_pkts_low[0x20];
1727
1728 u8 if_in_discards_high[0x20];
1729
1730 u8 if_in_discards_low[0x20];
1731
1732 u8 if_in_errors_high[0x20];
1733
1734 u8 if_in_errors_low[0x20];
1735
1736 u8 if_in_unknown_protos_high[0x20];
1737
1738 u8 if_in_unknown_protos_low[0x20];
1739
1740 u8 if_out_octets_high[0x20];
1741
1742 u8 if_out_octets_low[0x20];
1743
1744 u8 if_out_ucast_pkts_high[0x20];
1745
1746 u8 if_out_ucast_pkts_low[0x20];
1747
1748 u8 if_out_discards_high[0x20];
1749
1750 u8 if_out_discards_low[0x20];
1751
1752 u8 if_out_errors_high[0x20];
1753
1754 u8 if_out_errors_low[0x20];
1755
1756 u8 if_in_multicast_pkts_high[0x20];
1757
1758 u8 if_in_multicast_pkts_low[0x20];
1759
1760 u8 if_in_broadcast_pkts_high[0x20];
1761
1762 u8 if_in_broadcast_pkts_low[0x20];
1763
1764 u8 if_out_multicast_pkts_high[0x20];
1765
1766 u8 if_out_multicast_pkts_low[0x20];
1767
1768 u8 if_out_broadcast_pkts_high[0x20];
1769
1770 u8 if_out_broadcast_pkts_low[0x20];
1771
Matan Barakb4ff3a32016-02-09 14:57:42 +02001772 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001773};
1774
1775struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1776 u8 a_frames_transmitted_ok_high[0x20];
1777
1778 u8 a_frames_transmitted_ok_low[0x20];
1779
1780 u8 a_frames_received_ok_high[0x20];
1781
1782 u8 a_frames_received_ok_low[0x20];
1783
1784 u8 a_frame_check_sequence_errors_high[0x20];
1785
1786 u8 a_frame_check_sequence_errors_low[0x20];
1787
1788 u8 a_alignment_errors_high[0x20];
1789
1790 u8 a_alignment_errors_low[0x20];
1791
1792 u8 a_octets_transmitted_ok_high[0x20];
1793
1794 u8 a_octets_transmitted_ok_low[0x20];
1795
1796 u8 a_octets_received_ok_high[0x20];
1797
1798 u8 a_octets_received_ok_low[0x20];
1799
1800 u8 a_multicast_frames_xmitted_ok_high[0x20];
1801
1802 u8 a_multicast_frames_xmitted_ok_low[0x20];
1803
1804 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1805
1806 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1807
1808 u8 a_multicast_frames_received_ok_high[0x20];
1809
1810 u8 a_multicast_frames_received_ok_low[0x20];
1811
1812 u8 a_broadcast_frames_received_ok_high[0x20];
1813
1814 u8 a_broadcast_frames_received_ok_low[0x20];
1815
1816 u8 a_in_range_length_errors_high[0x20];
1817
1818 u8 a_in_range_length_errors_low[0x20];
1819
1820 u8 a_out_of_range_length_field_high[0x20];
1821
1822 u8 a_out_of_range_length_field_low[0x20];
1823
1824 u8 a_frame_too_long_errors_high[0x20];
1825
1826 u8 a_frame_too_long_errors_low[0x20];
1827
1828 u8 a_symbol_error_during_carrier_high[0x20];
1829
1830 u8 a_symbol_error_during_carrier_low[0x20];
1831
1832 u8 a_mac_control_frames_transmitted_high[0x20];
1833
1834 u8 a_mac_control_frames_transmitted_low[0x20];
1835
1836 u8 a_mac_control_frames_received_high[0x20];
1837
1838 u8 a_mac_control_frames_received_low[0x20];
1839
1840 u8 a_unsupported_opcodes_received_high[0x20];
1841
1842 u8 a_unsupported_opcodes_received_low[0x20];
1843
1844 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1845
1846 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1847
1848 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1849
1850 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1851
Matan Barakb4ff3a32016-02-09 14:57:42 +02001852 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001853};
1854
Gal Pressman8ed1a632016-11-17 13:46:01 +02001855struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1856 u8 life_time_counter_high[0x20];
1857
1858 u8 life_time_counter_low[0x20];
1859
1860 u8 rx_errors[0x20];
1861
1862 u8 tx_errors[0x20];
1863
1864 u8 l0_to_recovery_eieos[0x20];
1865
1866 u8 l0_to_recovery_ts[0x20];
1867
1868 u8 l0_to_recovery_framing[0x20];
1869
1870 u8 l0_to_recovery_retrain[0x20];
1871
1872 u8 crc_error_dllp[0x20];
1873
1874 u8 crc_error_tlp[0x20];
1875
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001876 u8 tx_overflow_buffer_pkt_high[0x20];
1877
1878 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001879
1880 u8 outbound_stalled_reads[0x20];
1881
1882 u8 outbound_stalled_writes[0x20];
1883
1884 u8 outbound_stalled_reads_events[0x20];
1885
1886 u8 outbound_stalled_writes_events[0x20];
1887
1888 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001889};
1890
Saeed Mahameede2816822015-05-28 22:28:40 +03001891struct mlx5_ifc_cmd_inter_comp_event_bits {
1892 u8 command_completion_vector[0x20];
1893
Matan Barakb4ff3a32016-02-09 14:57:42 +02001894 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001895};
1896
1897struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001898 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001899 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001900 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001901 u8 vl[0x4];
1902
Matan Barakb4ff3a32016-02-09 14:57:42 +02001903 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001904};
1905
1906struct mlx5_ifc_db_bf_congestion_event_bits {
1907 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001908 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001909 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001910 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001911
Matan Barakb4ff3a32016-02-09 14:57:42 +02001912 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001913};
1914
1915struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001916 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001917
1918 u8 gpio_event_hi[0x20];
1919
1920 u8 gpio_event_lo[0x20];
1921
Matan Barakb4ff3a32016-02-09 14:57:42 +02001922 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001923};
1924
1925struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001926 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001927
1928 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001929 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001930
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932};
1933
1934struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001935 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001936};
1937
1938enum {
1939 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1940 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1941};
1942
1943struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001944 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001945 u8 cqn[0x18];
1946
Matan Barakb4ff3a32016-02-09 14:57:42 +02001947 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001948
Matan Barakb4ff3a32016-02-09 14:57:42 +02001949 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001950 u8 syndrome[0x8];
1951
Matan Barakb4ff3a32016-02-09 14:57:42 +02001952 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001953};
1954
1955struct mlx5_ifc_rdma_page_fault_event_bits {
1956 u8 bytes_committed[0x20];
1957
1958 u8 r_key[0x20];
1959
Matan Barakb4ff3a32016-02-09 14:57:42 +02001960 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001961 u8 packet_len[0x10];
1962
1963 u8 rdma_op_len[0x20];
1964
1965 u8 rdma_va[0x40];
1966
Matan Barakb4ff3a32016-02-09 14:57:42 +02001967 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001968 u8 rdma[0x1];
1969 u8 write[0x1];
1970 u8 requestor[0x1];
1971 u8 qp_number[0x18];
1972};
1973
1974struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1975 u8 bytes_committed[0x20];
1976
Matan Barakb4ff3a32016-02-09 14:57:42 +02001977 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001978 u8 wqe_index[0x10];
1979
Matan Barakb4ff3a32016-02-09 14:57:42 +02001980 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001981 u8 len[0x10];
1982
Matan Barakb4ff3a32016-02-09 14:57:42 +02001983 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001984
Matan Barakb4ff3a32016-02-09 14:57:42 +02001985 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001986 u8 rdma[0x1];
1987 u8 write_read[0x1];
1988 u8 requestor[0x1];
1989 u8 qpn[0x18];
1990};
1991
1992struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001993 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001994
1995 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001996 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001997
Matan Barakb4ff3a32016-02-09 14:57:42 +02001998 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001999 u8 qpn_rqn_sqn[0x18];
2000};
2001
2002struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002003 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002004
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006 u8 dct_number[0x18];
2007};
2008
2009struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002010 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002011
Matan Barakb4ff3a32016-02-09 14:57:42 +02002012 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002013 u8 cq_number[0x18];
2014};
2015
2016enum {
2017 MLX5_QPC_STATE_RST = 0x0,
2018 MLX5_QPC_STATE_INIT = 0x1,
2019 MLX5_QPC_STATE_RTR = 0x2,
2020 MLX5_QPC_STATE_RTS = 0x3,
2021 MLX5_QPC_STATE_SQER = 0x4,
2022 MLX5_QPC_STATE_ERR = 0x6,
2023 MLX5_QPC_STATE_SQD = 0x7,
2024 MLX5_QPC_STATE_SUSPENDED = 0x9,
2025};
2026
2027enum {
2028 MLX5_QPC_ST_RC = 0x0,
2029 MLX5_QPC_ST_UC = 0x1,
2030 MLX5_QPC_ST_UD = 0x2,
2031 MLX5_QPC_ST_XRC = 0x3,
2032 MLX5_QPC_ST_DCI = 0x5,
2033 MLX5_QPC_ST_QP0 = 0x7,
2034 MLX5_QPC_ST_QP1 = 0x8,
2035 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2036 MLX5_QPC_ST_REG_UMR = 0xc,
2037};
2038
2039enum {
2040 MLX5_QPC_PM_STATE_ARMED = 0x0,
2041 MLX5_QPC_PM_STATE_REARM = 0x1,
2042 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2043 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2044};
2045
2046enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002047 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2048};
2049
2050enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002051 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2052 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2053};
2054
2055enum {
2056 MLX5_QPC_MTU_256_BYTES = 0x1,
2057 MLX5_QPC_MTU_512_BYTES = 0x2,
2058 MLX5_QPC_MTU_1K_BYTES = 0x3,
2059 MLX5_QPC_MTU_2K_BYTES = 0x4,
2060 MLX5_QPC_MTU_4K_BYTES = 0x5,
2061 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2062};
2063
2064enum {
2065 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2066 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2067 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2068 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2069 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2070 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2071 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2072 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2073};
2074
2075enum {
2076 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2077 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2078 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2079};
2080
2081enum {
2082 MLX5_QPC_CS_RES_DISABLE = 0x0,
2083 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2084 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2085};
2086
2087struct mlx5_ifc_qpc_bits {
2088 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002089 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002090 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002091 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002092 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002093 u8 reserved_at_15[0x3];
2094 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002095 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002096 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002097
2098 u8 wq_signature[0x1];
2099 u8 block_lb_mc[0x1];
2100 u8 atomic_like_write_en[0x1];
2101 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002102 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002103 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002104 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002105 u8 pd[0x18];
2106
2107 u8 mtu[0x3];
2108 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110 u8 log_rq_size[0x4];
2111 u8 log_rq_stride[0x3];
2112 u8 no_sq[0x1];
2113 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002114 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002115 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002116 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002117
2118 u8 counter_set_id[0x8];
2119 u8 uar_page[0x18];
2120
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122 u8 user_index[0x18];
2123
Matan Barakb4ff3a32016-02-09 14:57:42 +02002124 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002125 u8 log_page_size[0x5];
2126 u8 remote_qpn[0x18];
2127
2128 struct mlx5_ifc_ads_bits primary_address_path;
2129
2130 struct mlx5_ifc_ads_bits secondary_address_path;
2131
2132 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002133 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002134 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002135 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002136 u8 retry_count[0x3];
2137 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002138 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002139 u8 fre[0x1];
2140 u8 cur_rnr_retry[0x3];
2141 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143
Matan Barakb4ff3a32016-02-09 14:57:42 +02002144 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002145
Matan Barakb4ff3a32016-02-09 14:57:42 +02002146 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147 u8 next_send_psn[0x18];
2148
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 cqn_snd[0x18];
2151
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002152 u8 reserved_at_400[0x8];
2153 u8 deth_sqpn[0x18];
2154
2155 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156
Matan Barakb4ff3a32016-02-09 14:57:42 +02002157 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158 u8 last_acked_psn[0x18];
2159
Matan Barakb4ff3a32016-02-09 14:57:42 +02002160 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002161 u8 ssn[0x18];
2162
Matan Barakb4ff3a32016-02-09 14:57:42 +02002163 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002165 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 atomic_mode[0x4];
2167 u8 rre[0x1];
2168 u8 rwe[0x1];
2169 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002172 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173 u8 cd_slave_receive[0x1];
2174 u8 cd_slave_send[0x1];
2175 u8 cd_master[0x1];
2176
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178 u8 min_rnr_nak[0x5];
2179 u8 next_rcv_psn[0x18];
2180
Matan Barakb4ff3a32016-02-09 14:57:42 +02002181 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002182 u8 xrcd[0x18];
2183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185 u8 cqn_rcv[0x18];
2186
2187 u8 dbr_addr[0x40];
2188
2189 u8 q_key[0x20];
2190
Matan Barakb4ff3a32016-02-09 14:57:42 +02002191 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002192 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002193 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194
Matan Barakb4ff3a32016-02-09 14:57:42 +02002195 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196 u8 rmsn[0x18];
2197
2198 u8 hw_sq_wqebb_counter[0x10];
2199 u8 sw_sq_wqebb_counter[0x10];
2200
2201 u8 hw_rq_counter[0x20];
2202
2203 u8 sw_rq_counter[0x20];
2204
Matan Barakb4ff3a32016-02-09 14:57:42 +02002205 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002206
Matan Barakb4ff3a32016-02-09 14:57:42 +02002207 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002208 u8 cgs[0x1];
2209 u8 cs_req[0x8];
2210 u8 cs_res[0x8];
2211
2212 u8 dc_access_key[0x40];
2213
Matan Barakb4ff3a32016-02-09 14:57:42 +02002214 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002215};
2216
2217struct mlx5_ifc_roce_addr_layout_bits {
2218 u8 source_l3_address[16][0x8];
2219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221 u8 vlan_valid[0x1];
2222 u8 vlan_id[0xc];
2223 u8 source_mac_47_32[0x10];
2224
2225 u8 source_mac_31_0[0x20];
2226
Matan Barakb4ff3a32016-02-09 14:57:42 +02002227 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002228 u8 roce_l3_type[0x4];
2229 u8 roce_version[0x8];
2230
Matan Barakb4ff3a32016-02-09 14:57:42 +02002231 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002232};
2233
2234union mlx5_ifc_hca_cap_union_bits {
2235 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2236 struct mlx5_ifc_odp_cap_bits odp_cap;
2237 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2238 struct mlx5_ifc_roce_cap_bits roce_cap;
2239 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2240 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002241 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002242 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002243 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002244 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002245 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002246 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247};
2248
2249enum {
2250 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2251 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2252 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002253 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002254 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2255 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002256 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002257};
2258
2259struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261
2262 u8 group_id[0x20];
2263
Matan Barakb4ff3a32016-02-09 14:57:42 +02002264 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002265 u8 flow_tag[0x18];
2266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 action[0x10];
2269
Matan Barakb4ff3a32016-02-09 14:57:42 +02002270 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002271 u8 destination_list_size[0x18];
2272
Amir Vadai9dc0b282016-05-13 12:55:39 +00002273 u8 reserved_at_a0[0x8];
2274 u8 flow_counter_list_size[0x18];
2275
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002276 u8 encap_id[0x20];
2277
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002278 u8 modify_header_id[0x20];
2279
2280 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281
2282 struct mlx5_ifc_fte_match_param_bits match_value;
2283
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285
Amir Vadai9dc0b282016-05-13 12:55:39 +00002286 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002287};
2288
2289enum {
2290 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2291 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2292};
2293
2294struct mlx5_ifc_xrc_srqc_bits {
2295 u8 state[0x4];
2296 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002298
2299 u8 wq_signature[0x1];
2300 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002301 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002302 u8 rlky[0x1];
2303 u8 basic_cyclic_rcv_wqe[0x1];
2304 u8 log_rq_stride[0x3];
2305 u8 xrcd[0x18];
2306
2307 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002308 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002309 u8 cqn[0x18];
2310
Matan Barakb4ff3a32016-02-09 14:57:42 +02002311 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002312
2313 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002314 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002315 u8 log_page_size[0x6];
2316 u8 user_index[0x18];
2317
Matan Barakb4ff3a32016-02-09 14:57:42 +02002318 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002319
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321 u8 pd[0x18];
2322
2323 u8 lwm[0x10];
2324 u8 wqe_cnt[0x10];
2325
Matan Barakb4ff3a32016-02-09 14:57:42 +02002326 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002327
2328 u8 db_record_addr_h[0x20];
2329
2330 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002331 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002332
Matan Barakb4ff3a32016-02-09 14:57:42 +02002333 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002334};
2335
2336struct mlx5_ifc_traffic_counter_bits {
2337 u8 packets[0x40];
2338
2339 u8 octets[0x40];
2340};
2341
2342struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002343 u8 strict_lag_tx_port_affinity[0x1];
2344 u8 reserved_at_1[0x3];
2345 u8 lag_tx_port_affinity[0x04];
2346
2347 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002348 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002349 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002350
Matan Barakb4ff3a32016-02-09 14:57:42 +02002351 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002352
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354 u8 transport_domain[0x18];
2355
Erez Shitrit500a3d02017-04-13 06:36:51 +03002356 u8 reserved_at_140[0x8];
2357 u8 underlay_qpn[0x18];
2358 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359};
2360
2361enum {
2362 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2363 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2364};
2365
2366enum {
2367 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2368 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2369};
2370
2371enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002372 MLX5_RX_HASH_FN_NONE = 0x0,
2373 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2374 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002375};
2376
2377enum {
2378 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2379 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2380};
2381
2382struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002383 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002384
2385 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387
Matan Barakb4ff3a32016-02-09 14:57:42 +02002388 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002389
Matan Barakb4ff3a32016-02-09 14:57:42 +02002390 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002391 u8 lro_timeout_period_usecs[0x10];
2392 u8 lro_enable_mask[0x4];
2393 u8 lro_max_ip_payload_size[0x8];
2394
Matan Barakb4ff3a32016-02-09 14:57:42 +02002395 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002396
Matan Barakb4ff3a32016-02-09 14:57:42 +02002397 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002398 u8 inline_rqn[0x18];
2399
2400 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002401 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002402 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404 u8 indirect_table[0x18];
2405
2406 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408 u8 self_lb_block[0x2];
2409 u8 transport_domain[0x18];
2410
2411 u8 rx_hash_toeplitz_key[10][0x20];
2412
2413 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2414
2415 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2416
Matan Barakb4ff3a32016-02-09 14:57:42 +02002417 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002418};
2419
2420enum {
2421 MLX5_SRQC_STATE_GOOD = 0x0,
2422 MLX5_SRQC_STATE_ERROR = 0x1,
2423};
2424
2425struct mlx5_ifc_srqc_bits {
2426 u8 state[0x4];
2427 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002428 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429
2430 u8 wq_signature[0x1];
2431 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002432 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002433 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002434 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435 u8 log_rq_stride[0x3];
2436 u8 xrcd[0x18];
2437
2438 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002439 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440 u8 cqn[0x18];
2441
Matan Barakb4ff3a32016-02-09 14:57:42 +02002442 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002443
Matan Barakb4ff3a32016-02-09 14:57:42 +02002444 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002445 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447
Matan Barakb4ff3a32016-02-09 14:57:42 +02002448 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 pd[0x18];
2452
2453 u8 lwm[0x10];
2454 u8 wqe_cnt[0x10];
2455
Matan Barakb4ff3a32016-02-09 14:57:42 +02002456 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002457
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002458 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002459
Matan Barakb4ff3a32016-02-09 14:57:42 +02002460 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002461};
2462
2463enum {
2464 MLX5_SQC_STATE_RST = 0x0,
2465 MLX5_SQC_STATE_RDY = 0x1,
2466 MLX5_SQC_STATE_ERR = 0x3,
2467};
2468
2469struct mlx5_ifc_sqc_bits {
2470 u8 rlky[0x1];
2471 u8 cd_master[0x1];
2472 u8 fre[0x1];
2473 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002474 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002475 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002476 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002477 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002478 u8 allow_swp[0x1];
2479 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002480
Matan Barakb4ff3a32016-02-09 14:57:42 +02002481 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482 u8 user_index[0x18];
2483
Matan Barakb4ff3a32016-02-09 14:57:42 +02002484 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002485 u8 cqn[0x18];
2486
Saeed Mahameed74862162016-06-09 15:11:34 +03002487 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002488
Saeed Mahameed74862162016-06-09 15:11:34 +03002489 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002491 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492
Matan Barakb4ff3a32016-02-09 14:57:42 +02002493 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002494
Matan Barakb4ff3a32016-02-09 14:57:42 +02002495 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002496 u8 tis_num_0[0x18];
2497
2498 struct mlx5_ifc_wq_bits wq;
2499};
2500
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002501enum {
2502 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2503 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2504 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2505 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2506};
2507
2508struct mlx5_ifc_scheduling_context_bits {
2509 u8 element_type[0x8];
2510 u8 reserved_at_8[0x18];
2511
2512 u8 element_attributes[0x20];
2513
2514 u8 parent_element_id[0x20];
2515
2516 u8 reserved_at_60[0x40];
2517
2518 u8 bw_share[0x20];
2519
2520 u8 max_average_bw[0x20];
2521
2522 u8 reserved_at_e0[0x120];
2523};
2524
Saeed Mahameede2816822015-05-28 22:28:40 +03002525struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002526 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002527
Matan Barakb4ff3a32016-02-09 14:57:42 +02002528 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002529 u8 rqt_max_size[0x10];
2530
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532 u8 rqt_actual_size[0x10];
2533
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535
2536 struct mlx5_ifc_rq_num_bits rq_num[0];
2537};
2538
2539enum {
2540 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2541 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2542};
2543
2544enum {
2545 MLX5_RQC_STATE_RST = 0x0,
2546 MLX5_RQC_STATE_RDY = 0x1,
2547 MLX5_RQC_STATE_ERR = 0x3,
2548};
2549
2550struct mlx5_ifc_rqc_bits {
2551 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002552 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002553 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002554 u8 vsd[0x1];
2555 u8 mem_rq_type[0x4];
2556 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002557 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002558 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002559 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002560
Matan Barakb4ff3a32016-02-09 14:57:42 +02002561 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002562 u8 user_index[0x18];
2563
Matan Barakb4ff3a32016-02-09 14:57:42 +02002564 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002565 u8 cqn[0x18];
2566
2567 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002568 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002569
Matan Barakb4ff3a32016-02-09 14:57:42 +02002570 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571 u8 rmpn[0x18];
2572
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574
2575 struct mlx5_ifc_wq_bits wq;
2576};
2577
2578enum {
2579 MLX5_RMPC_STATE_RDY = 0x1,
2580 MLX5_RMPC_STATE_ERR = 0x3,
2581};
2582
2583struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002584 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002585 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002586 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002587
2588 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002590
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592
2593 struct mlx5_ifc_wq_bits wq;
2594};
2595
Saeed Mahameede2816822015-05-28 22:28:40 +03002596struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002597 u8 reserved_at_0[0x5];
2598 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002599 u8 reserved_at_8[0x15];
2600 u8 disable_mc_local_lb[0x1];
2601 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002602 u8 roce_en[0x1];
2603
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002604 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002605 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002606 u8 event_on_mtu[0x1];
2607 u8 event_on_promisc_change[0x1];
2608 u8 event_on_vlan_change[0x1];
2609 u8 event_on_mc_address_change[0x1];
2610 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002611
Matan Barakb4ff3a32016-02-09 14:57:42 +02002612 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002613
2614 u8 mtu[0x10];
2615
Achiad Shochat9efa7522015-12-23 18:47:20 +02002616 u8 system_image_guid[0x40];
2617 u8 port_guid[0x40];
2618 u8 node_guid[0x40];
2619
Matan Barakb4ff3a32016-02-09 14:57:42 +02002620 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002621 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002623
2624 u8 promisc_uc[0x1];
2625 u8 promisc_mc[0x1];
2626 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002627 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002628 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002629 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002630 u8 allowed_list_size[0xc];
2631
2632 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2633
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635
2636 u8 current_uc_mac_address[0][0x40];
2637};
2638
2639enum {
2640 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2641 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2642 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002643 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002644};
2645
2646struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002647 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002649 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002650 u8 small_fence_on_rdma_read_response[0x1];
2651 u8 umr_en[0x1];
2652 u8 a[0x1];
2653 u8 rw[0x1];
2654 u8 rr[0x1];
2655 u8 lw[0x1];
2656 u8 lr[0x1];
2657 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002658 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002659
2660 u8 qpn[0x18];
2661 u8 mkey_7_0[0x8];
2662
Matan Barakb4ff3a32016-02-09 14:57:42 +02002663 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002664
2665 u8 length64[0x1];
2666 u8 bsf_en[0x1];
2667 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002668 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002669 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002670 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002671 u8 en_rinval[0x1];
2672 u8 pd[0x18];
2673
2674 u8 start_addr[0x40];
2675
2676 u8 len[0x40];
2677
2678 u8 bsf_octword_size[0x20];
2679
Matan Barakb4ff3a32016-02-09 14:57:42 +02002680 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002681
2682 u8 translations_octword_size[0x20];
2683
Matan Barakb4ff3a32016-02-09 14:57:42 +02002684 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002685 u8 log_page_size[0x5];
2686
Matan Barakb4ff3a32016-02-09 14:57:42 +02002687 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002688};
2689
2690struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002691 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002692 u8 pkey[0x10];
2693};
2694
2695struct mlx5_ifc_array128_auto_bits {
2696 u8 array128_auto[16][0x8];
2697};
2698
2699struct mlx5_ifc_hca_vport_context_bits {
2700 u8 field_select[0x20];
2701
Matan Barakb4ff3a32016-02-09 14:57:42 +02002702 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002703
2704 u8 sm_virt_aware[0x1];
2705 u8 has_smi[0x1];
2706 u8 has_raw[0x1];
2707 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002708 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002709 u8 port_physical_state[0x4];
2710 u8 vport_state_policy[0x4];
2711 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002712 u8 vport_state[0x4];
2713
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002715
2716 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002717
2718 u8 port_guid[0x40];
2719
2720 u8 node_guid[0x40];
2721
2722 u8 cap_mask1[0x20];
2723
2724 u8 cap_mask1_field_select[0x20];
2725
2726 u8 cap_mask2[0x20];
2727
2728 u8 cap_mask2_field_select[0x20];
2729
Matan Barakb4ff3a32016-02-09 14:57:42 +02002730 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002731
2732 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002733 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002734 u8 init_type_reply[0x4];
2735 u8 lmc[0x3];
2736 u8 subnet_timeout[0x5];
2737
2738 u8 sm_lid[0x10];
2739 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741
2742 u8 qkey_violation_counter[0x10];
2743 u8 pkey_violation_counter[0x10];
2744
Matan Barakb4ff3a32016-02-09 14:57:42 +02002745 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002746};
2747
Saeed Mahameedd6666752015-12-01 18:03:22 +02002748struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002750 u8 vport_svlan_strip[0x1];
2751 u8 vport_cvlan_strip[0x1];
2752 u8 vport_svlan_insert[0x1];
2753 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002755
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002757
2758 u8 svlan_cfi[0x1];
2759 u8 svlan_pcp[0x3];
2760 u8 svlan_id[0xc];
2761 u8 cvlan_cfi[0x1];
2762 u8 cvlan_pcp[0x3];
2763 u8 cvlan_id[0xc];
2764
Matan Barakb4ff3a32016-02-09 14:57:42 +02002765 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002766};
2767
Saeed Mahameede2816822015-05-28 22:28:40 +03002768enum {
2769 MLX5_EQC_STATUS_OK = 0x0,
2770 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2771};
2772
2773enum {
2774 MLX5_EQC_ST_ARMED = 0x9,
2775 MLX5_EQC_ST_FIRED = 0xa,
2776};
2777
2778struct mlx5_ifc_eqc_bits {
2779 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002780 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002781 u8 ec[0x1];
2782 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002783 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002784 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786
Matan Barakb4ff3a32016-02-09 14:57:42 +02002787 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002788
Matan Barakb4ff3a32016-02-09 14:57:42 +02002789 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002790 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002791 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002792
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794 u8 log_eq_size[0x5];
2795 u8 uar_page[0x18];
2796
Matan Barakb4ff3a32016-02-09 14:57:42 +02002797 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002798
Matan Barakb4ff3a32016-02-09 14:57:42 +02002799 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002800 u8 intr[0x8];
2801
Matan Barakb4ff3a32016-02-09 14:57:42 +02002802 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002803 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002804 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002805
Matan Barakb4ff3a32016-02-09 14:57:42 +02002806 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002807
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002809 u8 consumer_counter[0x18];
2810
Matan Barakb4ff3a32016-02-09 14:57:42 +02002811 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812 u8 producer_counter[0x18];
2813
Matan Barakb4ff3a32016-02-09 14:57:42 +02002814 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002815};
2816
2817enum {
2818 MLX5_DCTC_STATE_ACTIVE = 0x0,
2819 MLX5_DCTC_STATE_DRAINING = 0x1,
2820 MLX5_DCTC_STATE_DRAINED = 0x2,
2821};
2822
2823enum {
2824 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2825 MLX5_DCTC_CS_RES_NA = 0x1,
2826 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2827};
2828
2829enum {
2830 MLX5_DCTC_MTU_256_BYTES = 0x1,
2831 MLX5_DCTC_MTU_512_BYTES = 0x2,
2832 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2833 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2834 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2835};
2836
2837struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002838 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002839 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002840 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002841
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843 u8 user_index[0x18];
2844
Matan Barakb4ff3a32016-02-09 14:57:42 +02002845 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002846 u8 cqn[0x18];
2847
2848 u8 counter_set_id[0x8];
2849 u8 atomic_mode[0x4];
2850 u8 rre[0x1];
2851 u8 rwe[0x1];
2852 u8 rae[0x1];
2853 u8 atomic_like_write_en[0x1];
2854 u8 latency_sensitive[0x1];
2855 u8 rlky[0x1];
2856 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002857 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002858
Matan Barakb4ff3a32016-02-09 14:57:42 +02002859 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002860 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864
Matan Barakb4ff3a32016-02-09 14:57:42 +02002865 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002866 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869 u8 pd[0x18];
2870
2871 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002872 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002873 u8 flow_label[0x14];
2874
2875 u8 dc_access_key[0x40];
2876
Matan Barakb4ff3a32016-02-09 14:57:42 +02002877 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002878 u8 mtu[0x3];
2879 u8 port[0x8];
2880 u8 pkey_index[0x10];
2881
Matan Barakb4ff3a32016-02-09 14:57:42 +02002882 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002883 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002884 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002885 u8 hop_limit[0x8];
2886
2887 u8 dc_access_key_violation_count[0x20];
2888
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890 u8 dei_cfi[0x1];
2891 u8 eth_prio[0x3];
2892 u8 ecn[0x2];
2893 u8 dscp[0x6];
2894
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002896};
2897
2898enum {
2899 MLX5_CQC_STATUS_OK = 0x0,
2900 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2901 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2902};
2903
2904enum {
2905 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2906 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2907};
2908
2909enum {
2910 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2911 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2912 MLX5_CQC_ST_FIRED = 0xa,
2913};
2914
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002915enum {
2916 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2917 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002918 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002919};
2920
Saeed Mahameede2816822015-05-28 22:28:40 +03002921struct mlx5_ifc_cqc_bits {
2922 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002923 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002924 u8 cqe_sz[0x3];
2925 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002926 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002927 u8 scqe_break_moderation_en[0x1];
2928 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002929 u8 cq_period_mode[0x2];
2930 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002931 u8 mini_cqe_res_format[0x2];
2932 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934
Matan Barakb4ff3a32016-02-09 14:57:42 +02002935 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002936
Matan Barakb4ff3a32016-02-09 14:57:42 +02002937 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002938 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002939 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002940
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942 u8 log_cq_size[0x5];
2943 u8 uar_page[0x18];
2944
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946 u8 cq_period[0xc];
2947 u8 cq_max_count[0x10];
2948
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950 u8 c_eqn[0x8];
2951
Matan Barakb4ff3a32016-02-09 14:57:42 +02002952 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002953 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002955
Matan Barakb4ff3a32016-02-09 14:57:42 +02002956 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002957
Matan Barakb4ff3a32016-02-09 14:57:42 +02002958 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002959 u8 last_notified_index[0x18];
2960
Matan Barakb4ff3a32016-02-09 14:57:42 +02002961 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002962 u8 last_solicit_index[0x18];
2963
Matan Barakb4ff3a32016-02-09 14:57:42 +02002964 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002965 u8 consumer_counter[0x18];
2966
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968 u8 producer_counter[0x18];
2969
Matan Barakb4ff3a32016-02-09 14:57:42 +02002970 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002971
2972 u8 dbr_addr[0x40];
2973};
2974
2975union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2976 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2977 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2978 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002979 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002980};
2981
2982struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002983 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002984
Matan Barakb4ff3a32016-02-09 14:57:42 +02002985 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002986 u8 ieee_vendor_id[0x18];
2987
Matan Barakb4ff3a32016-02-09 14:57:42 +02002988 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002989 u8 vsd_vendor_id[0x10];
2990
2991 u8 vsd[208][0x8];
2992
2993 u8 vsd_contd_psid[16][0x8];
2994};
2995
Saeed Mahameed74862162016-06-09 15:11:34 +03002996enum {
2997 MLX5_XRQC_STATE_GOOD = 0x0,
2998 MLX5_XRQC_STATE_ERROR = 0x1,
2999};
3000
3001enum {
3002 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3003 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3004};
3005
3006enum {
3007 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3008};
3009
3010struct mlx5_ifc_tag_matching_topology_context_bits {
3011 u8 log_matching_list_sz[0x4];
3012 u8 reserved_at_4[0xc];
3013 u8 append_next_index[0x10];
3014
3015 u8 sw_phase_cnt[0x10];
3016 u8 hw_phase_cnt[0x10];
3017
3018 u8 reserved_at_40[0x40];
3019};
3020
3021struct mlx5_ifc_xrqc_bits {
3022 u8 state[0x4];
3023 u8 rlkey[0x1];
3024 u8 reserved_at_5[0xf];
3025 u8 topology[0x4];
3026 u8 reserved_at_18[0x4];
3027 u8 offload[0x4];
3028
3029 u8 reserved_at_20[0x8];
3030 u8 user_index[0x18];
3031
3032 u8 reserved_at_40[0x8];
3033 u8 cqn[0x18];
3034
3035 u8 reserved_at_60[0xa0];
3036
3037 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3038
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003039 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003040
3041 struct mlx5_ifc_wq_bits wq;
3042};
3043
Saeed Mahameede2816822015-05-28 22:28:40 +03003044union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3045 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3046 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003047 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003048};
3049
3050union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3051 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3052 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3053 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003054 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003055};
3056
3057union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3058 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3059 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3060 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3061 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3062 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3063 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3064 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003065 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003066 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003067 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003068 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003069};
3070
Gal Pressman8ed1a632016-11-17 13:46:01 +02003071union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3072 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3073 u8 reserved_at_0[0x7c0];
3074};
3075
Saeed Mahameede2816822015-05-28 22:28:40 +03003076union mlx5_ifc_event_auto_bits {
3077 struct mlx5_ifc_comp_event_bits comp_event;
3078 struct mlx5_ifc_dct_events_bits dct_events;
3079 struct mlx5_ifc_qp_events_bits qp_events;
3080 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3081 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3082 struct mlx5_ifc_cq_error_bits cq_error;
3083 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3084 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3085 struct mlx5_ifc_gpio_event_bits gpio_event;
3086 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3087 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3088 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003089 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003090};
3091
3092struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003093 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003094
3095 u8 assert_existptr[0x20];
3096
3097 u8 assert_callra[0x20];
3098
Matan Barakb4ff3a32016-02-09 14:57:42 +02003099 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003100
3101 u8 fw_version[0x20];
3102
3103 u8 hw_id[0x20];
3104
Matan Barakb4ff3a32016-02-09 14:57:42 +02003105 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003106
3107 u8 irisc_index[0x8];
3108 u8 synd[0x8];
3109 u8 ext_synd[0x10];
3110};
3111
3112struct mlx5_ifc_register_loopback_control_bits {
3113 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003114 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003115 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003116 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003117
Matan Barakb4ff3a32016-02-09 14:57:42 +02003118 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003119};
3120
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003121struct mlx5_ifc_vport_tc_element_bits {
3122 u8 traffic_class[0x4];
3123 u8 reserved_at_4[0xc];
3124 u8 vport_number[0x10];
3125};
3126
3127struct mlx5_ifc_vport_element_bits {
3128 u8 reserved_at_0[0x10];
3129 u8 vport_number[0x10];
3130};
3131
3132enum {
3133 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3134 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3135 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3136};
3137
3138struct mlx5_ifc_tsar_element_bits {
3139 u8 reserved_at_0[0x8];
3140 u8 tsar_type[0x8];
3141 u8 reserved_at_10[0x10];
3142};
3143
Majd Dibbiny8812c242017-02-09 14:20:12 +02003144enum {
3145 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3146 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3147};
3148
Saeed Mahameede2816822015-05-28 22:28:40 +03003149struct mlx5_ifc_teardown_hca_out_bits {
3150 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152
3153 u8 syndrome[0x20];
3154
Majd Dibbiny8812c242017-02-09 14:20:12 +02003155 u8 reserved_at_40[0x3f];
3156
3157 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003158};
3159
3160enum {
3161 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003162 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003163};
3164
3165struct mlx5_ifc_teardown_hca_in_bits {
3166 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003167 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003168
Matan Barakb4ff3a32016-02-09 14:57:42 +02003169 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003170 u8 op_mod[0x10];
3171
Matan Barakb4ff3a32016-02-09 14:57:42 +02003172 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003173 u8 profile[0x10];
3174
Matan Barakb4ff3a32016-02-09 14:57:42 +02003175 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003176};
3177
3178struct mlx5_ifc_sqerr2rts_qp_out_bits {
3179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003181
3182 u8 syndrome[0x20];
3183
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185};
3186
3187struct mlx5_ifc_sqerr2rts_qp_in_bits {
3188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003190
Matan Barakb4ff3a32016-02-09 14:57:42 +02003191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003192 u8 op_mod[0x10];
3193
Matan Barakb4ff3a32016-02-09 14:57:42 +02003194 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003195 u8 qpn[0x18];
3196
Matan Barakb4ff3a32016-02-09 14:57:42 +02003197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003198
3199 u8 opt_param_mask[0x20];
3200
Matan Barakb4ff3a32016-02-09 14:57:42 +02003201 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003202
3203 struct mlx5_ifc_qpc_bits qpc;
3204
Matan Barakb4ff3a32016-02-09 14:57:42 +02003205 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003206};
3207
3208struct mlx5_ifc_sqd2rts_qp_out_bits {
3209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003211
3212 u8 syndrome[0x20];
3213
Matan Barakb4ff3a32016-02-09 14:57:42 +02003214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003215};
3216
3217struct mlx5_ifc_sqd2rts_qp_in_bits {
3218 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220
Matan Barakb4ff3a32016-02-09 14:57:42 +02003221 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003222 u8 op_mod[0x10];
3223
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225 u8 qpn[0x18];
3226
Matan Barakb4ff3a32016-02-09 14:57:42 +02003227 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003228
3229 u8 opt_param_mask[0x20];
3230
Matan Barakb4ff3a32016-02-09 14:57:42 +02003231 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003232
3233 struct mlx5_ifc_qpc_bits qpc;
3234
Matan Barakb4ff3a32016-02-09 14:57:42 +02003235 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003236};
3237
3238struct mlx5_ifc_set_roce_address_out_bits {
3239 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003240 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003241
3242 u8 syndrome[0x20];
3243
Matan Barakb4ff3a32016-02-09 14:57:42 +02003244 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003245};
3246
3247struct mlx5_ifc_set_roce_address_in_bits {
3248 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250
Matan Barakb4ff3a32016-02-09 14:57:42 +02003251 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003252 u8 op_mod[0x10];
3253
3254 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003255 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003256
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258
3259 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3260};
3261
3262struct mlx5_ifc_set_mad_demux_out_bits {
3263 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003264 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265
3266 u8 syndrome[0x20];
3267
Matan Barakb4ff3a32016-02-09 14:57:42 +02003268 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003269};
3270
3271enum {
3272 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3273 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3274};
3275
3276struct mlx5_ifc_set_mad_demux_in_bits {
3277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281 u8 op_mod[0x10];
3282
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003284
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003286 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288};
3289
3290struct mlx5_ifc_set_l2_table_entry_out_bits {
3291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293
3294 u8 syndrome[0x20];
3295
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003297};
3298
3299struct mlx5_ifc_set_l2_table_entry_in_bits {
3300 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304 u8 op_mod[0x10];
3305
Matan Barakb4ff3a32016-02-09 14:57:42 +02003306 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003307
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309 u8 table_index[0x18];
3310
Matan Barakb4ff3a32016-02-09 14:57:42 +02003311 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314 u8 vlan_valid[0x1];
3315 u8 vlan[0xc];
3316
3317 struct mlx5_ifc_mac_address_layout_bits mac_address;
3318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003320};
3321
3322struct mlx5_ifc_set_issi_out_bits {
3323 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003325
3326 u8 syndrome[0x20];
3327
Matan Barakb4ff3a32016-02-09 14:57:42 +02003328 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003329};
3330
3331struct mlx5_ifc_set_issi_in_bits {
3332 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003333 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003334
Matan Barakb4ff3a32016-02-09 14:57:42 +02003335 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003336 u8 op_mod[0x10];
3337
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339 u8 current_issi[0x10];
3340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342};
3343
3344struct mlx5_ifc_set_hca_cap_out_bits {
3345 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347
3348 u8 syndrome[0x20];
3349
Matan Barakb4ff3a32016-02-09 14:57:42 +02003350 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003351};
3352
3353struct mlx5_ifc_set_hca_cap_in_bits {
3354 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003355 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003356
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003358 u8 op_mod[0x10];
3359
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003361
Saeed Mahameede2816822015-05-28 22:28:40 +03003362 union mlx5_ifc_hca_cap_union_bits capability;
3363};
3364
Maor Gottlieb26a81452015-12-10 17:12:39 +02003365enum {
3366 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3367 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3368 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3369 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3370};
3371
Saeed Mahameede2816822015-05-28 22:28:40 +03003372struct mlx5_ifc_set_fte_out_bits {
3373 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375
3376 u8 syndrome[0x20];
3377
Matan Barakb4ff3a32016-02-09 14:57:42 +02003378 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003379};
3380
3381struct mlx5_ifc_set_fte_in_bits {
3382 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386 u8 op_mod[0x10];
3387
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003388 u8 other_vport[0x1];
3389 u8 reserved_at_41[0xf];
3390 u8 vport_number[0x10];
3391
3392 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393
3394 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003395 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398 u8 table_id[0x18];
3399
Matan Barakb4ff3a32016-02-09 14:57:42 +02003400 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003401 u8 modify_enable_mask[0x8];
3402
Matan Barakb4ff3a32016-02-09 14:57:42 +02003403 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003404
3405 u8 flow_index[0x20];
3406
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003408
3409 struct mlx5_ifc_flow_context_bits flow_context;
3410};
3411
3412struct mlx5_ifc_rts2rts_qp_out_bits {
3413 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415
3416 u8 syndrome[0x20];
3417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419};
3420
3421struct mlx5_ifc_rts2rts_qp_in_bits {
3422 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424
Matan Barakb4ff3a32016-02-09 14:57:42 +02003425 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426 u8 op_mod[0x10];
3427
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003429 u8 qpn[0x18];
3430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432
3433 u8 opt_param_mask[0x20];
3434
Matan Barakb4ff3a32016-02-09 14:57:42 +02003435 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003436
3437 struct mlx5_ifc_qpc_bits qpc;
3438
Matan Barakb4ff3a32016-02-09 14:57:42 +02003439 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003440};
3441
3442struct mlx5_ifc_rtr2rts_qp_out_bits {
3443 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003444 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003445
3446 u8 syndrome[0x20];
3447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449};
3450
3451struct mlx5_ifc_rtr2rts_qp_in_bits {
3452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456 u8 op_mod[0x10];
3457
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459 u8 qpn[0x18];
3460
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462
3463 u8 opt_param_mask[0x20];
3464
Matan Barakb4ff3a32016-02-09 14:57:42 +02003465 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003466
3467 struct mlx5_ifc_qpc_bits qpc;
3468
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470};
3471
3472struct mlx5_ifc_rst2init_qp_out_bits {
3473 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003474 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003475
3476 u8 syndrome[0x20];
3477
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003479};
3480
3481struct mlx5_ifc_rst2init_qp_in_bits {
3482 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003484
Matan Barakb4ff3a32016-02-09 14:57:42 +02003485 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003486 u8 op_mod[0x10];
3487
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003489 u8 qpn[0x18];
3490
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492
3493 u8 opt_param_mask[0x20];
3494
Matan Barakb4ff3a32016-02-09 14:57:42 +02003495 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003496
3497 struct mlx5_ifc_qpc_bits qpc;
3498
Matan Barakb4ff3a32016-02-09 14:57:42 +02003499 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003500};
3501
Saeed Mahameed74862162016-06-09 15:11:34 +03003502struct mlx5_ifc_query_xrq_out_bits {
3503 u8 status[0x8];
3504 u8 reserved_at_8[0x18];
3505
3506 u8 syndrome[0x20];
3507
3508 u8 reserved_at_40[0x40];
3509
3510 struct mlx5_ifc_xrqc_bits xrq_context;
3511};
3512
3513struct mlx5_ifc_query_xrq_in_bits {
3514 u8 opcode[0x10];
3515 u8 reserved_at_10[0x10];
3516
3517 u8 reserved_at_20[0x10];
3518 u8 op_mod[0x10];
3519
3520 u8 reserved_at_40[0x8];
3521 u8 xrqn[0x18];
3522
3523 u8 reserved_at_60[0x20];
3524};
3525
Saeed Mahameede2816822015-05-28 22:28:40 +03003526struct mlx5_ifc_query_xrc_srq_out_bits {
3527 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003528 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003529
3530 u8 syndrome[0x20];
3531
Matan Barakb4ff3a32016-02-09 14:57:42 +02003532 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003533
3534 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3535
Matan Barakb4ff3a32016-02-09 14:57:42 +02003536 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003537
3538 u8 pas[0][0x40];
3539};
3540
3541struct mlx5_ifc_query_xrc_srq_in_bits {
3542 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546 u8 op_mod[0x10];
3547
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549 u8 xrc_srqn[0x18];
3550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552};
3553
3554enum {
3555 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3556 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3557};
3558
3559struct mlx5_ifc_query_vport_state_out_bits {
3560 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562
3563 u8 syndrome[0x20];
3564
Matan Barakb4ff3a32016-02-09 14:57:42 +02003565 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003566
Matan Barakb4ff3a32016-02-09 14:57:42 +02003567 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568 u8 admin_state[0x4];
3569 u8 state[0x4];
3570};
3571
3572enum {
3573 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003574 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003575};
3576
3577struct mlx5_ifc_query_vport_state_in_bits {
3578 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003579 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003580
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582 u8 op_mod[0x10];
3583
3584 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003585 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003586 u8 vport_number[0x10];
3587
Matan Barakb4ff3a32016-02-09 14:57:42 +02003588 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003589};
3590
3591struct mlx5_ifc_query_vport_counter_out_bits {
3592 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594
3595 u8 syndrome[0x20];
3596
Matan Barakb4ff3a32016-02-09 14:57:42 +02003597 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003598
3599 struct mlx5_ifc_traffic_counter_bits received_errors;
3600
3601 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3602
3603 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3604
3605 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3606
3607 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3608
3609 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3610
3611 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3612
3613 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3614
3615 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3616
3617 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3618
3619 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3620
3621 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3622
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624};
3625
3626enum {
3627 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3628};
3629
3630struct mlx5_ifc_query_vport_counter_in_bits {
3631 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003632 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003633
Matan Barakb4ff3a32016-02-09 14:57:42 +02003634 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003635 u8 op_mod[0x10];
3636
3637 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003638 u8 reserved_at_41[0xb];
3639 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640 u8 vport_number[0x10];
3641
Matan Barakb4ff3a32016-02-09 14:57:42 +02003642 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003643
3644 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648};
3649
3650struct mlx5_ifc_query_tis_out_bits {
3651 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653
3654 u8 syndrome[0x20];
3655
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657
3658 struct mlx5_ifc_tisc_bits tis_context;
3659};
3660
3661struct mlx5_ifc_query_tis_in_bits {
3662 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003663 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003664
Matan Barakb4ff3a32016-02-09 14:57:42 +02003665 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003666 u8 op_mod[0x10];
3667
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669 u8 tisn[0x18];
3670
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672};
3673
3674struct mlx5_ifc_query_tir_out_bits {
3675 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003676 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003677
3678 u8 syndrome[0x20];
3679
Matan Barakb4ff3a32016-02-09 14:57:42 +02003680 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003681
3682 struct mlx5_ifc_tirc_bits tir_context;
3683};
3684
3685struct mlx5_ifc_query_tir_in_bits {
3686 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688
Matan Barakb4ff3a32016-02-09 14:57:42 +02003689 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003690 u8 op_mod[0x10];
3691
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693 u8 tirn[0x18];
3694
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696};
3697
3698struct mlx5_ifc_query_srq_out_bits {
3699 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003700 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003701
3702 u8 syndrome[0x20];
3703
Matan Barakb4ff3a32016-02-09 14:57:42 +02003704 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003705
3706 struct mlx5_ifc_srqc_bits srq_context_entry;
3707
Matan Barakb4ff3a32016-02-09 14:57:42 +02003708 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003709
3710 u8 pas[0][0x40];
3711};
3712
3713struct mlx5_ifc_query_srq_in_bits {
3714 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003715 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003716
Matan Barakb4ff3a32016-02-09 14:57:42 +02003717 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003718 u8 op_mod[0x10];
3719
Matan Barakb4ff3a32016-02-09 14:57:42 +02003720 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003721 u8 srqn[0x18];
3722
Matan Barakb4ff3a32016-02-09 14:57:42 +02003723 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003724};
3725
3726struct mlx5_ifc_query_sq_out_bits {
3727 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003728 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003729
3730 u8 syndrome[0x20];
3731
Matan Barakb4ff3a32016-02-09 14:57:42 +02003732 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003733
3734 struct mlx5_ifc_sqc_bits sq_context;
3735};
3736
3737struct mlx5_ifc_query_sq_in_bits {
3738 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003739 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003740
Matan Barakb4ff3a32016-02-09 14:57:42 +02003741 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003742 u8 op_mod[0x10];
3743
Matan Barakb4ff3a32016-02-09 14:57:42 +02003744 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003745 u8 sqn[0x18];
3746
Matan Barakb4ff3a32016-02-09 14:57:42 +02003747 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003748};
3749
3750struct mlx5_ifc_query_special_contexts_out_bits {
3751 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003752 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003753
3754 u8 syndrome[0x20];
3755
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003756 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003757
3758 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003759
3760 u8 null_mkey[0x20];
3761
3762 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003763};
3764
3765struct mlx5_ifc_query_special_contexts_in_bits {
3766 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003767 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003768
Matan Barakb4ff3a32016-02-09 14:57:42 +02003769 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003770 u8 op_mod[0x10];
3771
Matan Barakb4ff3a32016-02-09 14:57:42 +02003772 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003773};
3774
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003775struct mlx5_ifc_query_scheduling_element_out_bits {
3776 u8 opcode[0x10];
3777 u8 reserved_at_10[0x10];
3778
3779 u8 reserved_at_20[0x10];
3780 u8 op_mod[0x10];
3781
3782 u8 reserved_at_40[0xc0];
3783
3784 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3785
3786 u8 reserved_at_300[0x100];
3787};
3788
3789enum {
3790 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3791};
3792
3793struct mlx5_ifc_query_scheduling_element_in_bits {
3794 u8 opcode[0x10];
3795 u8 reserved_at_10[0x10];
3796
3797 u8 reserved_at_20[0x10];
3798 u8 op_mod[0x10];
3799
3800 u8 scheduling_hierarchy[0x8];
3801 u8 reserved_at_48[0x18];
3802
3803 u8 scheduling_element_id[0x20];
3804
3805 u8 reserved_at_80[0x180];
3806};
3807
Saeed Mahameede2816822015-05-28 22:28:40 +03003808struct mlx5_ifc_query_rqt_out_bits {
3809 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003810 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811
3812 u8 syndrome[0x20];
3813
Matan Barakb4ff3a32016-02-09 14:57:42 +02003814 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003815
3816 struct mlx5_ifc_rqtc_bits rqt_context;
3817};
3818
3819struct mlx5_ifc_query_rqt_in_bits {
3820 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824 u8 op_mod[0x10];
3825
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827 u8 rqtn[0x18];
3828
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830};
3831
3832struct mlx5_ifc_query_rq_out_bits {
3833 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835
3836 u8 syndrome[0x20];
3837
Matan Barakb4ff3a32016-02-09 14:57:42 +02003838 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003839
3840 struct mlx5_ifc_rqc_bits rq_context;
3841};
3842
3843struct mlx5_ifc_query_rq_in_bits {
3844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848 u8 op_mod[0x10];
3849
Matan Barakb4ff3a32016-02-09 14:57:42 +02003850 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003851 u8 rqn[0x18];
3852
Matan Barakb4ff3a32016-02-09 14:57:42 +02003853 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003854};
3855
3856struct mlx5_ifc_query_roce_address_out_bits {
3857 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003858 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003859
3860 u8 syndrome[0x20];
3861
Matan Barakb4ff3a32016-02-09 14:57:42 +02003862 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003863
3864 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3865};
3866
3867struct mlx5_ifc_query_roce_address_in_bits {
3868 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003869 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003870
Matan Barakb4ff3a32016-02-09 14:57:42 +02003871 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003872 u8 op_mod[0x10];
3873
3874 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878};
3879
3880struct mlx5_ifc_query_rmp_out_bits {
3881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003883
3884 u8 syndrome[0x20];
3885
Matan Barakb4ff3a32016-02-09 14:57:42 +02003886 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003887
3888 struct mlx5_ifc_rmpc_bits rmp_context;
3889};
3890
3891struct mlx5_ifc_query_rmp_in_bits {
3892 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003893 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894
Matan Barakb4ff3a32016-02-09 14:57:42 +02003895 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003896 u8 op_mod[0x10];
3897
Matan Barakb4ff3a32016-02-09 14:57:42 +02003898 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899 u8 rmpn[0x18];
3900
Matan Barakb4ff3a32016-02-09 14:57:42 +02003901 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003902};
3903
3904struct mlx5_ifc_query_qp_out_bits {
3905 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907
3908 u8 syndrome[0x20];
3909
Matan Barakb4ff3a32016-02-09 14:57:42 +02003910 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003911
3912 u8 opt_param_mask[0x20];
3913
Matan Barakb4ff3a32016-02-09 14:57:42 +02003914 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003915
3916 struct mlx5_ifc_qpc_bits qpc;
3917
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919
3920 u8 pas[0][0x40];
3921};
3922
3923struct mlx5_ifc_query_qp_in_bits {
3924 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003925 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003926
Matan Barakb4ff3a32016-02-09 14:57:42 +02003927 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003928 u8 op_mod[0x10];
3929
Matan Barakb4ff3a32016-02-09 14:57:42 +02003930 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003931 u8 qpn[0x18];
3932
Matan Barakb4ff3a32016-02-09 14:57:42 +02003933 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003934};
3935
3936struct mlx5_ifc_query_q_counter_out_bits {
3937 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003938 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003939
3940 u8 syndrome[0x20];
3941
Matan Barakb4ff3a32016-02-09 14:57:42 +02003942 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003943
3944 u8 rx_write_requests[0x20];
3945
Matan Barakb4ff3a32016-02-09 14:57:42 +02003946 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003947
3948 u8 rx_read_requests[0x20];
3949
Matan Barakb4ff3a32016-02-09 14:57:42 +02003950 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003951
3952 u8 rx_atomic_requests[0x20];
3953
Matan Barakb4ff3a32016-02-09 14:57:42 +02003954 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003955
3956 u8 rx_dct_connect[0x20];
3957
Matan Barakb4ff3a32016-02-09 14:57:42 +02003958 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003959
3960 u8 out_of_buffer[0x20];
3961
Matan Barakb4ff3a32016-02-09 14:57:42 +02003962 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003963
3964 u8 out_of_sequence[0x20];
3965
Saeed Mahameed74862162016-06-09 15:11:34 +03003966 u8 reserved_at_1e0[0x20];
3967
3968 u8 duplicate_request[0x20];
3969
3970 u8 reserved_at_220[0x20];
3971
3972 u8 rnr_nak_retry_err[0x20];
3973
3974 u8 reserved_at_260[0x20];
3975
3976 u8 packet_seq_err[0x20];
3977
3978 u8 reserved_at_2a0[0x20];
3979
3980 u8 implied_nak_seq_err[0x20];
3981
3982 u8 reserved_at_2e0[0x20];
3983
3984 u8 local_ack_timeout_err[0x20];
3985
Parav Pandit58dcb602017-06-19 07:19:37 +03003986 u8 reserved_at_320[0xa0];
3987
3988 u8 resp_local_length_error[0x20];
3989
3990 u8 req_local_length_error[0x20];
3991
3992 u8 resp_local_qp_error[0x20];
3993
3994 u8 local_operation_error[0x20];
3995
3996 u8 resp_local_protection[0x20];
3997
3998 u8 req_local_protection[0x20];
3999
4000 u8 resp_cqe_error[0x20];
4001
4002 u8 req_cqe_error[0x20];
4003
4004 u8 req_mw_binding[0x20];
4005
4006 u8 req_bad_response[0x20];
4007
4008 u8 req_remote_invalid_request[0x20];
4009
4010 u8 resp_remote_invalid_request[0x20];
4011
4012 u8 req_remote_access_errors[0x20];
4013
4014 u8 resp_remote_access_errors[0x20];
4015
4016 u8 req_remote_operation_errors[0x20];
4017
4018 u8 req_transport_retries_exceeded[0x20];
4019
4020 u8 cq_overflow[0x20];
4021
4022 u8 resp_cqe_flush_error[0x20];
4023
4024 u8 req_cqe_flush_error[0x20];
4025
4026 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027};
4028
4029struct mlx5_ifc_query_q_counter_in_bits {
4030 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004031 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034 u8 op_mod[0x10];
4035
Matan Barakb4ff3a32016-02-09 14:57:42 +02004036 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004037
4038 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040
Matan Barakb4ff3a32016-02-09 14:57:42 +02004041 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004042 u8 counter_set_id[0x8];
4043};
4044
4045struct mlx5_ifc_query_pages_out_bits {
4046 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004047 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004048
4049 u8 syndrome[0x20];
4050
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052 u8 function_id[0x10];
4053
4054 u8 num_pages[0x20];
4055};
4056
4057enum {
4058 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4059 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4060 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4061};
4062
4063struct mlx5_ifc_query_pages_in_bits {
4064 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004065 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004066
Matan Barakb4ff3a32016-02-09 14:57:42 +02004067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004068 u8 op_mod[0x10];
4069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071 u8 function_id[0x10];
4072
Matan Barakb4ff3a32016-02-09 14:57:42 +02004073 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004074};
4075
4076struct mlx5_ifc_query_nic_vport_context_out_bits {
4077 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004078 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004079
4080 u8 syndrome[0x20];
4081
Matan Barakb4ff3a32016-02-09 14:57:42 +02004082 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004083
4084 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4085};
4086
4087struct mlx5_ifc_query_nic_vport_context_in_bits {
4088 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004089 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004090
Matan Barakb4ff3a32016-02-09 14:57:42 +02004091 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004092 u8 op_mod[0x10];
4093
4094 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004095 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004096 u8 vport_number[0x10];
4097
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004100 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101};
4102
4103struct mlx5_ifc_query_mkey_out_bits {
4104 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106
4107 u8 syndrome[0x20];
4108
Matan Barakb4ff3a32016-02-09 14:57:42 +02004109 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004110
4111 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4112
Matan Barakb4ff3a32016-02-09 14:57:42 +02004113 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004114
4115 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4116
4117 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4118};
4119
4120struct mlx5_ifc_query_mkey_in_bits {
4121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004123
Matan Barakb4ff3a32016-02-09 14:57:42 +02004124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004125 u8 op_mod[0x10];
4126
Matan Barakb4ff3a32016-02-09 14:57:42 +02004127 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004128 u8 mkey_index[0x18];
4129
4130 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132};
4133
4134struct mlx5_ifc_query_mad_demux_out_bits {
4135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004137
4138 u8 syndrome[0x20];
4139
Matan Barakb4ff3a32016-02-09 14:57:42 +02004140 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004141
4142 u8 mad_dumux_parameters_block[0x20];
4143};
4144
4145struct mlx5_ifc_query_mad_demux_in_bits {
4146 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004147 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004148
Matan Barakb4ff3a32016-02-09 14:57:42 +02004149 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004150 u8 op_mod[0x10];
4151
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153};
4154
4155struct mlx5_ifc_query_l2_table_entry_out_bits {
4156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004158
4159 u8 syndrome[0x20];
4160
Matan Barakb4ff3a32016-02-09 14:57:42 +02004161 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004162
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164 u8 vlan_valid[0x1];
4165 u8 vlan[0xc];
4166
4167 struct mlx5_ifc_mac_address_layout_bits mac_address;
4168
Matan Barakb4ff3a32016-02-09 14:57:42 +02004169 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004170};
4171
4172struct mlx5_ifc_query_l2_table_entry_in_bits {
4173 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177 u8 op_mod[0x10];
4178
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180
Matan Barakb4ff3a32016-02-09 14:57:42 +02004181 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182 u8 table_index[0x18];
4183
Matan Barakb4ff3a32016-02-09 14:57:42 +02004184 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004185};
4186
4187struct mlx5_ifc_query_issi_out_bits {
4188 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004189 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004190
4191 u8 syndrome[0x20];
4192
Matan Barakb4ff3a32016-02-09 14:57:42 +02004193 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004194 u8 current_issi[0x10];
4195
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197
Matan Barakb4ff3a32016-02-09 14:57:42 +02004198 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004199 u8 supported_issi_dw0[0x20];
4200};
4201
4202struct mlx5_ifc_query_issi_in_bits {
4203 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004204 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004205
Matan Barakb4ff3a32016-02-09 14:57:42 +02004206 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004207 u8 op_mod[0x10];
4208
Matan Barakb4ff3a32016-02-09 14:57:42 +02004209 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004210};
4211
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004212struct mlx5_ifc_set_driver_version_out_bits {
4213 u8 status[0x8];
4214 u8 reserved_0[0x18];
4215
4216 u8 syndrome[0x20];
4217 u8 reserved_1[0x40];
4218};
4219
4220struct mlx5_ifc_set_driver_version_in_bits {
4221 u8 opcode[0x10];
4222 u8 reserved_0[0x10];
4223
4224 u8 reserved_1[0x10];
4225 u8 op_mod[0x10];
4226
4227 u8 reserved_2[0x40];
4228 u8 driver_version[64][0x8];
4229};
4230
Saeed Mahameede2816822015-05-28 22:28:40 +03004231struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004234
4235 u8 syndrome[0x20];
4236
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238
4239 struct mlx5_ifc_pkey_bits pkey[0];
4240};
4241
4242struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4243 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245
Matan Barakb4ff3a32016-02-09 14:57:42 +02004246 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004247 u8 op_mod[0x10];
4248
4249 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004251 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252 u8 vport_number[0x10];
4253
Matan Barakb4ff3a32016-02-09 14:57:42 +02004254 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004255 u8 pkey_index[0x10];
4256};
4257
Eli Coheneff901d2016-03-11 22:58:42 +02004258enum {
4259 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4260 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4261 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4262};
4263
Saeed Mahameede2816822015-05-28 22:28:40 +03004264struct mlx5_ifc_query_hca_vport_gid_out_bits {
4265 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004266 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004267
4268 u8 syndrome[0x20];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271
4272 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004274
4275 struct mlx5_ifc_array128_auto_bits gid[0];
4276};
4277
4278struct mlx5_ifc_query_hca_vport_gid_in_bits {
4279 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281
Matan Barakb4ff3a32016-02-09 14:57:42 +02004282 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004283 u8 op_mod[0x10];
4284
4285 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004286 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004287 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288 u8 vport_number[0x10];
4289
Matan Barakb4ff3a32016-02-09 14:57:42 +02004290 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004291 u8 gid_index[0x10];
4292};
4293
4294struct mlx5_ifc_query_hca_vport_context_out_bits {
4295 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297
4298 u8 syndrome[0x20];
4299
Matan Barakb4ff3a32016-02-09 14:57:42 +02004300 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004301
4302 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4303};
4304
4305struct mlx5_ifc_query_hca_vport_context_in_bits {
4306 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308
Matan Barakb4ff3a32016-02-09 14:57:42 +02004309 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004310 u8 op_mod[0x10];
4311
4312 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004314 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315 u8 vport_number[0x10];
4316
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004318};
4319
4320struct mlx5_ifc_query_hca_cap_out_bits {
4321 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004322 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004323
4324 u8 syndrome[0x20];
4325
Matan Barakb4ff3a32016-02-09 14:57:42 +02004326 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004327
4328 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004329};
4330
4331struct mlx5_ifc_query_hca_cap_in_bits {
4332 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004334
Matan Barakb4ff3a32016-02-09 14:57:42 +02004335 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004336 u8 op_mod[0x10];
4337
Matan Barakb4ff3a32016-02-09 14:57:42 +02004338 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004339};
4340
Saeed Mahameede2816822015-05-28 22:28:40 +03004341struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004342 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004344
4345 u8 syndrome[0x20];
4346
Matan Barakb4ff3a32016-02-09 14:57:42 +02004347 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004348
Matan Barakb4ff3a32016-02-09 14:57:42 +02004349 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004350 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352 u8 log_size[0x8];
4353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004355};
4356
Saeed Mahameede2816822015-05-28 22:28:40 +03004357struct mlx5_ifc_query_flow_table_in_bits {
4358 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004359 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004360
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362 u8 op_mod[0x10];
4363
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365
4366 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004368
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370 u8 table_id[0x18];
4371
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373};
4374
4375struct mlx5_ifc_query_fte_out_bits {
4376 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004377 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004378
4379 u8 syndrome[0x20];
4380
Matan Barakb4ff3a32016-02-09 14:57:42 +02004381 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004382
4383 struct mlx5_ifc_flow_context_bits flow_context;
4384};
4385
4386struct mlx5_ifc_query_fte_in_bits {
4387 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004388 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004389
Matan Barakb4ff3a32016-02-09 14:57:42 +02004390 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004391 u8 op_mod[0x10];
4392
Matan Barakb4ff3a32016-02-09 14:57:42 +02004393 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004394
4395 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004396 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004397
Matan Barakb4ff3a32016-02-09 14:57:42 +02004398 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004399 u8 table_id[0x18];
4400
Matan Barakb4ff3a32016-02-09 14:57:42 +02004401 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004402
4403 u8 flow_index[0x20];
4404
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406};
4407
4408enum {
4409 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4410 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4411 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4412};
4413
4414struct mlx5_ifc_query_flow_group_out_bits {
4415 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004416 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004417
4418 u8 syndrome[0x20];
4419
Matan Barakb4ff3a32016-02-09 14:57:42 +02004420 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004421
4422 u8 start_flow_index[0x20];
4423
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004425
4426 u8 end_flow_index[0x20];
4427
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004429
Matan Barakb4ff3a32016-02-09 14:57:42 +02004430 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004431 u8 match_criteria_enable[0x8];
4432
4433 struct mlx5_ifc_fte_match_param_bits match_criteria;
4434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004436};
4437
4438struct mlx5_ifc_query_flow_group_in_bits {
4439 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004441
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443 u8 op_mod[0x10];
4444
Matan Barakb4ff3a32016-02-09 14:57:42 +02004445 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004446
4447 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004448 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004449
Matan Barakb4ff3a32016-02-09 14:57:42 +02004450 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004451 u8 table_id[0x18];
4452
4453 u8 group_id[0x20];
4454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456};
4457
Amir Vadai9dc0b282016-05-13 12:55:39 +00004458struct mlx5_ifc_query_flow_counter_out_bits {
4459 u8 status[0x8];
4460 u8 reserved_at_8[0x18];
4461
4462 u8 syndrome[0x20];
4463
4464 u8 reserved_at_40[0x40];
4465
4466 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4467};
4468
4469struct mlx5_ifc_query_flow_counter_in_bits {
4470 u8 opcode[0x10];
4471 u8 reserved_at_10[0x10];
4472
4473 u8 reserved_at_20[0x10];
4474 u8 op_mod[0x10];
4475
4476 u8 reserved_at_40[0x80];
4477
4478 u8 clear[0x1];
4479 u8 reserved_at_c1[0xf];
4480 u8 num_of_counters[0x10];
4481
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004482 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004483};
4484
Saeed Mahameedd6666752015-12-01 18:03:22 +02004485struct mlx5_ifc_query_esw_vport_context_out_bits {
4486 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004487 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004488
4489 u8 syndrome[0x20];
4490
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004492
4493 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4494};
4495
4496struct mlx5_ifc_query_esw_vport_context_in_bits {
4497 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004498 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004499
Matan Barakb4ff3a32016-02-09 14:57:42 +02004500 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004501 u8 op_mod[0x10];
4502
4503 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004504 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004505 u8 vport_number[0x10];
4506
Matan Barakb4ff3a32016-02-09 14:57:42 +02004507 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004508};
4509
4510struct mlx5_ifc_modify_esw_vport_context_out_bits {
4511 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004512 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004513
4514 u8 syndrome[0x20];
4515
Matan Barakb4ff3a32016-02-09 14:57:42 +02004516 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004517};
4518
4519struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004520 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004521 u8 vport_cvlan_insert[0x1];
4522 u8 vport_svlan_insert[0x1];
4523 u8 vport_cvlan_strip[0x1];
4524 u8 vport_svlan_strip[0x1];
4525};
4526
4527struct mlx5_ifc_modify_esw_vport_context_in_bits {
4528 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004529 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004530
Matan Barakb4ff3a32016-02-09 14:57:42 +02004531 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004532 u8 op_mod[0x10];
4533
4534 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004535 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004536 u8 vport_number[0x10];
4537
4538 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4539
4540 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4541};
4542
Saeed Mahameede2816822015-05-28 22:28:40 +03004543struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004544 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004545 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004546
4547 u8 syndrome[0x20];
4548
Matan Barakb4ff3a32016-02-09 14:57:42 +02004549 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004550
4551 struct mlx5_ifc_eqc_bits eq_context_entry;
4552
Matan Barakb4ff3a32016-02-09 14:57:42 +02004553 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004554
4555 u8 event_bitmask[0x40];
4556
Matan Barakb4ff3a32016-02-09 14:57:42 +02004557 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004558
4559 u8 pas[0][0x40];
4560};
4561
4562struct mlx5_ifc_query_eq_in_bits {
4563 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004564 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004565
Matan Barakb4ff3a32016-02-09 14:57:42 +02004566 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004567 u8 op_mod[0x10];
4568
Matan Barakb4ff3a32016-02-09 14:57:42 +02004569 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004570 u8 eq_number[0x8];
4571
Matan Barakb4ff3a32016-02-09 14:57:42 +02004572 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004573};
4574
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004575struct mlx5_ifc_encap_header_in_bits {
4576 u8 reserved_at_0[0x5];
4577 u8 header_type[0x3];
4578 u8 reserved_at_8[0xe];
4579 u8 encap_header_size[0xa];
4580
4581 u8 reserved_at_20[0x10];
4582 u8 encap_header[2][0x8];
4583
4584 u8 more_encap_header[0][0x8];
4585};
4586
4587struct mlx5_ifc_query_encap_header_out_bits {
4588 u8 status[0x8];
4589 u8 reserved_at_8[0x18];
4590
4591 u8 syndrome[0x20];
4592
4593 u8 reserved_at_40[0xa0];
4594
4595 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4596};
4597
4598struct mlx5_ifc_query_encap_header_in_bits {
4599 u8 opcode[0x10];
4600 u8 reserved_at_10[0x10];
4601
4602 u8 reserved_at_20[0x10];
4603 u8 op_mod[0x10];
4604
4605 u8 encap_id[0x20];
4606
4607 u8 reserved_at_60[0xa0];
4608};
4609
4610struct mlx5_ifc_alloc_encap_header_out_bits {
4611 u8 status[0x8];
4612 u8 reserved_at_8[0x18];
4613
4614 u8 syndrome[0x20];
4615
4616 u8 encap_id[0x20];
4617
4618 u8 reserved_at_60[0x20];
4619};
4620
4621struct mlx5_ifc_alloc_encap_header_in_bits {
4622 u8 opcode[0x10];
4623 u8 reserved_at_10[0x10];
4624
4625 u8 reserved_at_20[0x10];
4626 u8 op_mod[0x10];
4627
4628 u8 reserved_at_40[0xa0];
4629
4630 struct mlx5_ifc_encap_header_in_bits encap_header;
4631};
4632
4633struct mlx5_ifc_dealloc_encap_header_out_bits {
4634 u8 status[0x8];
4635 u8 reserved_at_8[0x18];
4636
4637 u8 syndrome[0x20];
4638
4639 u8 reserved_at_40[0x40];
4640};
4641
4642struct mlx5_ifc_dealloc_encap_header_in_bits {
4643 u8 opcode[0x10];
4644 u8 reserved_at_10[0x10];
4645
4646 u8 reserved_20[0x10];
4647 u8 op_mod[0x10];
4648
4649 u8 encap_id[0x20];
4650
4651 u8 reserved_60[0x20];
4652};
4653
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004654struct mlx5_ifc_set_action_in_bits {
4655 u8 action_type[0x4];
4656 u8 field[0xc];
4657 u8 reserved_at_10[0x3];
4658 u8 offset[0x5];
4659 u8 reserved_at_18[0x3];
4660 u8 length[0x5];
4661
4662 u8 data[0x20];
4663};
4664
4665struct mlx5_ifc_add_action_in_bits {
4666 u8 action_type[0x4];
4667 u8 field[0xc];
4668 u8 reserved_at_10[0x10];
4669
4670 u8 data[0x20];
4671};
4672
4673union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4674 struct mlx5_ifc_set_action_in_bits set_action_in;
4675 struct mlx5_ifc_add_action_in_bits add_action_in;
4676 u8 reserved_at_0[0x40];
4677};
4678
4679enum {
4680 MLX5_ACTION_TYPE_SET = 0x1,
4681 MLX5_ACTION_TYPE_ADD = 0x2,
4682};
4683
4684enum {
4685 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4686 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4687 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4688 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4689 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4690 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4691 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4692 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4693 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4694 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4695 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4696 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4697 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4698 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4699 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4700 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4701 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4702 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4703 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4704 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4705 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4706 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004707 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004708};
4709
4710struct mlx5_ifc_alloc_modify_header_context_out_bits {
4711 u8 status[0x8];
4712 u8 reserved_at_8[0x18];
4713
4714 u8 syndrome[0x20];
4715
4716 u8 modify_header_id[0x20];
4717
4718 u8 reserved_at_60[0x20];
4719};
4720
4721struct mlx5_ifc_alloc_modify_header_context_in_bits {
4722 u8 opcode[0x10];
4723 u8 reserved_at_10[0x10];
4724
4725 u8 reserved_at_20[0x10];
4726 u8 op_mod[0x10];
4727
4728 u8 reserved_at_40[0x20];
4729
4730 u8 table_type[0x8];
4731 u8 reserved_at_68[0x10];
4732 u8 num_of_actions[0x8];
4733
4734 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4735};
4736
4737struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4738 u8 status[0x8];
4739 u8 reserved_at_8[0x18];
4740
4741 u8 syndrome[0x20];
4742
4743 u8 reserved_at_40[0x40];
4744};
4745
4746struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4747 u8 opcode[0x10];
4748 u8 reserved_at_10[0x10];
4749
4750 u8 reserved_at_20[0x10];
4751 u8 op_mod[0x10];
4752
4753 u8 modify_header_id[0x20];
4754
4755 u8 reserved_at_60[0x20];
4756};
4757
Saeed Mahameede2816822015-05-28 22:28:40 +03004758struct mlx5_ifc_query_dct_out_bits {
4759 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004760 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004761
4762 u8 syndrome[0x20];
4763
Matan Barakb4ff3a32016-02-09 14:57:42 +02004764 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004765
4766 struct mlx5_ifc_dctc_bits dct_context_entry;
4767
Matan Barakb4ff3a32016-02-09 14:57:42 +02004768 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004769};
4770
4771struct mlx5_ifc_query_dct_in_bits {
4772 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004773 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004774
Matan Barakb4ff3a32016-02-09 14:57:42 +02004775 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004776 u8 op_mod[0x10];
4777
Matan Barakb4ff3a32016-02-09 14:57:42 +02004778 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004779 u8 dctn[0x18];
4780
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782};
4783
4784struct mlx5_ifc_query_cq_out_bits {
4785 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004786 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004787
4788 u8 syndrome[0x20];
4789
Matan Barakb4ff3a32016-02-09 14:57:42 +02004790 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004791
4792 struct mlx5_ifc_cqc_bits cq_context;
4793
Matan Barakb4ff3a32016-02-09 14:57:42 +02004794 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795
4796 u8 pas[0][0x40];
4797};
4798
4799struct mlx5_ifc_query_cq_in_bits {
4800 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004801 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004802
Matan Barakb4ff3a32016-02-09 14:57:42 +02004803 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004804 u8 op_mod[0x10];
4805
Matan Barakb4ff3a32016-02-09 14:57:42 +02004806 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004807 u8 cqn[0x18];
4808
Matan Barakb4ff3a32016-02-09 14:57:42 +02004809 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004810};
4811
4812struct mlx5_ifc_query_cong_status_out_bits {
4813 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004815
4816 u8 syndrome[0x20];
4817
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819
4820 u8 enable[0x1];
4821 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004822 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004823};
4824
4825struct mlx5_ifc_query_cong_status_in_bits {
4826 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828
Matan Barakb4ff3a32016-02-09 14:57:42 +02004829 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004830 u8 op_mod[0x10];
4831
Matan Barakb4ff3a32016-02-09 14:57:42 +02004832 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004833 u8 priority[0x4];
4834 u8 cong_protocol[0x4];
4835
Matan Barakb4ff3a32016-02-09 14:57:42 +02004836 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004837};
4838
4839struct mlx5_ifc_query_cong_statistics_out_bits {
4840 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004841 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004842
4843 u8 syndrome[0x20];
4844
Matan Barakb4ff3a32016-02-09 14:57:42 +02004845 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004846
Parav Pandite1f24a72017-04-16 07:29:29 +03004847 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848
4849 u8 sum_flows[0x20];
4850
Parav Pandite1f24a72017-04-16 07:29:29 +03004851 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004852
Parav Pandite1f24a72017-04-16 07:29:29 +03004853 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854
Parav Pandite1f24a72017-04-16 07:29:29 +03004855 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856
Parav Pandite1f24a72017-04-16 07:29:29 +03004857 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858
Matan Barakb4ff3a32016-02-09 14:57:42 +02004859 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004860
4861 u8 time_stamp_high[0x20];
4862
4863 u8 time_stamp_low[0x20];
4864
4865 u8 accumulators_period[0x20];
4866
Parav Pandite1f24a72017-04-16 07:29:29 +03004867 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004868
Parav Pandite1f24a72017-04-16 07:29:29 +03004869 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004870
Parav Pandite1f24a72017-04-16 07:29:29 +03004871 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004872
Parav Pandite1f24a72017-04-16 07:29:29 +03004873 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004874
Matan Barakb4ff3a32016-02-09 14:57:42 +02004875 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876};
4877
4878struct mlx5_ifc_query_cong_statistics_in_bits {
4879 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004880 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881
Matan Barakb4ff3a32016-02-09 14:57:42 +02004882 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004883 u8 op_mod[0x10];
4884
4885 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887
Matan Barakb4ff3a32016-02-09 14:57:42 +02004888 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889};
4890
4891struct mlx5_ifc_query_cong_params_out_bits {
4892 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894
4895 u8 syndrome[0x20];
4896
Matan Barakb4ff3a32016-02-09 14:57:42 +02004897 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004898
4899 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4900};
4901
4902struct mlx5_ifc_query_cong_params_in_bits {
4903 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004904 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004905
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907 u8 op_mod[0x10];
4908
Matan Barakb4ff3a32016-02-09 14:57:42 +02004909 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004910 u8 cong_protocol[0x4];
4911
Matan Barakb4ff3a32016-02-09 14:57:42 +02004912 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913};
4914
4915struct mlx5_ifc_query_adapter_out_bits {
4916 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918
4919 u8 syndrome[0x20];
4920
Matan Barakb4ff3a32016-02-09 14:57:42 +02004921 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922
4923 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4924};
4925
4926struct mlx5_ifc_query_adapter_in_bits {
4927 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004928 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004929
Matan Barakb4ff3a32016-02-09 14:57:42 +02004930 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004931 u8 op_mod[0x10];
4932
Matan Barakb4ff3a32016-02-09 14:57:42 +02004933 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004934};
4935
4936struct mlx5_ifc_qp_2rst_out_bits {
4937 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004938 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939
4940 u8 syndrome[0x20];
4941
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943};
4944
4945struct mlx5_ifc_qp_2rst_in_bits {
4946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948
Matan Barakb4ff3a32016-02-09 14:57:42 +02004949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004950 u8 op_mod[0x10];
4951
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953 u8 qpn[0x18];
4954
Matan Barakb4ff3a32016-02-09 14:57:42 +02004955 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004956};
4957
4958struct mlx5_ifc_qp_2err_out_bits {
4959 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961
4962 u8 syndrome[0x20];
4963
Matan Barakb4ff3a32016-02-09 14:57:42 +02004964 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004965};
4966
4967struct mlx5_ifc_qp_2err_in_bits {
4968 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972 u8 op_mod[0x10];
4973
Matan Barakb4ff3a32016-02-09 14:57:42 +02004974 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975 u8 qpn[0x18];
4976
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004978};
4979
4980struct mlx5_ifc_page_fault_resume_out_bits {
4981 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
4984 u8 syndrome[0x20];
4985
Matan Barakb4ff3a32016-02-09 14:57:42 +02004986 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004987};
4988
4989struct mlx5_ifc_page_fault_resume_in_bits {
4990 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994 u8 op_mod[0x10];
4995
4996 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004997 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004998 u8 page_fault_type[0x3];
4999 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005001 u8 reserved_at_60[0x8];
5002 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005003};
5004
5005struct mlx5_ifc_nop_out_bits {
5006 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005007 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008
5009 u8 syndrome[0x20];
5010
Matan Barakb4ff3a32016-02-09 14:57:42 +02005011 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012};
5013
5014struct mlx5_ifc_nop_in_bits {
5015 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005019 u8 op_mod[0x10];
5020
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022};
5023
5024struct mlx5_ifc_modify_vport_state_out_bits {
5025 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027
5028 u8 syndrome[0x20];
5029
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031};
5032
5033struct mlx5_ifc_modify_vport_state_in_bits {
5034 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038 u8 op_mod[0x10];
5039
5040 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042 u8 vport_number[0x10];
5043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047};
5048
5049struct mlx5_ifc_modify_tis_out_bits {
5050 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052
5053 u8 syndrome[0x20];
5054
Matan Barakb4ff3a32016-02-09 14:57:42 +02005055 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005056};
5057
majd@mellanox.com75850d02016-01-14 19:13:06 +02005058struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005059 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005060
Aviv Heller84df61e2016-05-10 13:47:50 +03005061 u8 reserved_at_20[0x1d];
5062 u8 lag_tx_port_affinity[0x1];
5063 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005064 u8 prio[0x1];
5065};
5066
Saeed Mahameede2816822015-05-28 22:28:40 +03005067struct mlx5_ifc_modify_tis_in_bits {
5068 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005069 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005070
Matan Barakb4ff3a32016-02-09 14:57:42 +02005071 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005072 u8 op_mod[0x10];
5073
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075 u8 tisn[0x18];
5076
Matan Barakb4ff3a32016-02-09 14:57:42 +02005077 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005078
majd@mellanox.com75850d02016-01-14 19:13:06 +02005079 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005080
Matan Barakb4ff3a32016-02-09 14:57:42 +02005081 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005082
5083 struct mlx5_ifc_tisc_bits ctx;
5084};
5085
Achiad Shochatd9eea402015-08-04 14:05:42 +03005086struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005087 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005088
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005090 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005091 u8 reserved_at_3c[0x1];
5092 u8 hash[0x1];
5093 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005094 u8 lro[0x1];
5095};
5096
Saeed Mahameede2816822015-05-28 22:28:40 +03005097struct mlx5_ifc_modify_tir_out_bits {
5098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005100
5101 u8 syndrome[0x20];
5102
Matan Barakb4ff3a32016-02-09 14:57:42 +02005103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005104};
5105
5106struct mlx5_ifc_modify_tir_in_bits {
5107 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005108 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005109
Matan Barakb4ff3a32016-02-09 14:57:42 +02005110 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005111 u8 op_mod[0x10];
5112
Matan Barakb4ff3a32016-02-09 14:57:42 +02005113 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005114 u8 tirn[0x18];
5115
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117
Achiad Shochatd9eea402015-08-04 14:05:42 +03005118 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005119
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121
5122 struct mlx5_ifc_tirc_bits ctx;
5123};
5124
5125struct mlx5_ifc_modify_sq_out_bits {
5126 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128
5129 u8 syndrome[0x20];
5130
Matan Barakb4ff3a32016-02-09 14:57:42 +02005131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005132};
5133
5134struct mlx5_ifc_modify_sq_in_bits {
5135 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005139 u8 op_mod[0x10];
5140
5141 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005142 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005143 u8 sqn[0x18];
5144
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005146
5147 u8 modify_bitmask[0x40];
5148
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150
5151 struct mlx5_ifc_sqc_bits ctx;
5152};
5153
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005154struct mlx5_ifc_modify_scheduling_element_out_bits {
5155 u8 status[0x8];
5156 u8 reserved_at_8[0x18];
5157
5158 u8 syndrome[0x20];
5159
5160 u8 reserved_at_40[0x1c0];
5161};
5162
5163enum {
5164 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5165 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5166};
5167
5168struct mlx5_ifc_modify_scheduling_element_in_bits {
5169 u8 opcode[0x10];
5170 u8 reserved_at_10[0x10];
5171
5172 u8 reserved_at_20[0x10];
5173 u8 op_mod[0x10];
5174
5175 u8 scheduling_hierarchy[0x8];
5176 u8 reserved_at_48[0x18];
5177
5178 u8 scheduling_element_id[0x20];
5179
5180 u8 reserved_at_80[0x20];
5181
5182 u8 modify_bitmask[0x20];
5183
5184 u8 reserved_at_c0[0x40];
5185
5186 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5187
5188 u8 reserved_at_300[0x100];
5189};
5190
Saeed Mahameede2816822015-05-28 22:28:40 +03005191struct mlx5_ifc_modify_rqt_out_bits {
5192 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194
5195 u8 syndrome[0x20];
5196
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005198};
5199
Achiad Shochat5c503682015-08-04 14:05:43 +03005200struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005201 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005202
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005204 u8 rqn_list[0x1];
5205};
5206
Saeed Mahameede2816822015-05-28 22:28:40 +03005207struct mlx5_ifc_modify_rqt_in_bits {
5208 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210
Matan Barakb4ff3a32016-02-09 14:57:42 +02005211 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005212 u8 op_mod[0x10];
5213
Matan Barakb4ff3a32016-02-09 14:57:42 +02005214 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005215 u8 rqtn[0x18];
5216
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005218
Achiad Shochat5c503682015-08-04 14:05:43 +03005219 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005220
Matan Barakb4ff3a32016-02-09 14:57:42 +02005221 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005222
5223 struct mlx5_ifc_rqtc_bits ctx;
5224};
5225
5226struct mlx5_ifc_modify_rq_out_bits {
5227 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005228 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005229
5230 u8 syndrome[0x20];
5231
Matan Barakb4ff3a32016-02-09 14:57:42 +02005232 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005233};
5234
Alex Vesker83b502a2016-08-04 17:32:02 +03005235enum {
5236 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005237 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005238 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005239};
5240
Saeed Mahameede2816822015-05-28 22:28:40 +03005241struct mlx5_ifc_modify_rq_in_bits {
5242 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005243 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005244
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005246 u8 op_mod[0x10];
5247
5248 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250 u8 rqn[0x18];
5251
Matan Barakb4ff3a32016-02-09 14:57:42 +02005252 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005253
5254 u8 modify_bitmask[0x40];
5255
Matan Barakb4ff3a32016-02-09 14:57:42 +02005256 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005257
5258 struct mlx5_ifc_rqc_bits ctx;
5259};
5260
5261struct mlx5_ifc_modify_rmp_out_bits {
5262 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005263 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005264
5265 u8 syndrome[0x20];
5266
Matan Barakb4ff3a32016-02-09 14:57:42 +02005267 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005268};
5269
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005270struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005272
Matan Barakb4ff3a32016-02-09 14:57:42 +02005273 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005274 u8 lwm[0x1];
5275};
5276
Saeed Mahameede2816822015-05-28 22:28:40 +03005277struct mlx5_ifc_modify_rmp_in_bits {
5278 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005280
Matan Barakb4ff3a32016-02-09 14:57:42 +02005281 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005282 u8 op_mod[0x10];
5283
5284 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005285 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005286 u8 rmpn[0x18];
5287
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005290 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005291
Matan Barakb4ff3a32016-02-09 14:57:42 +02005292 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005293
5294 struct mlx5_ifc_rmpc_bits ctx;
5295};
5296
5297struct mlx5_ifc_modify_nic_vport_context_out_bits {
5298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005300
5301 u8 syndrome[0x20];
5302
Matan Barakb4ff3a32016-02-09 14:57:42 +02005303 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005304};
5305
5306struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005307 u8 reserved_at_0[0x14];
5308 u8 disable_uc_local_lb[0x1];
5309 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005310 u8 node_guid[0x1];
5311 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005312 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005313 u8 mtu[0x1];
5314 u8 change_event[0x1];
5315 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005316 u8 permanent_address[0x1];
5317 u8 addresses_list[0x1];
5318 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005319 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005320};
5321
5322struct mlx5_ifc_modify_nic_vport_context_in_bits {
5323 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327 u8 op_mod[0x10];
5328
5329 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331 u8 vport_number[0x10];
5332
5333 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5334
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336
5337 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5338};
5339
5340struct mlx5_ifc_modify_hca_vport_context_out_bits {
5341 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005342 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005343
5344 u8 syndrome[0x20];
5345
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347};
5348
5349struct mlx5_ifc_modify_hca_vport_context_in_bits {
5350 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005351 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005352
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354 u8 op_mod[0x10];
5355
5356 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005358 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005359 u8 vport_number[0x10];
5360
Matan Barakb4ff3a32016-02-09 14:57:42 +02005361 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005362
5363 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5364};
5365
5366struct mlx5_ifc_modify_cq_out_bits {
5367 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005368 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005369
5370 u8 syndrome[0x20];
5371
Matan Barakb4ff3a32016-02-09 14:57:42 +02005372 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005373};
5374
5375enum {
5376 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5377 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5378};
5379
5380struct mlx5_ifc_modify_cq_in_bits {
5381 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383
Matan Barakb4ff3a32016-02-09 14:57:42 +02005384 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005385 u8 op_mod[0x10];
5386
Matan Barakb4ff3a32016-02-09 14:57:42 +02005387 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005388 u8 cqn[0x18];
5389
5390 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5391
5392 struct mlx5_ifc_cqc_bits cq_context;
5393
Matan Barakb4ff3a32016-02-09 14:57:42 +02005394 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005395
5396 u8 pas[0][0x40];
5397};
5398
5399struct mlx5_ifc_modify_cong_status_out_bits {
5400 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
5403 u8 syndrome[0x20];
5404
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406};
5407
5408struct mlx5_ifc_modify_cong_status_in_bits {
5409 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413 u8 op_mod[0x10];
5414
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416 u8 priority[0x4];
5417 u8 cong_protocol[0x4];
5418
5419 u8 enable[0x1];
5420 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422};
5423
5424struct mlx5_ifc_modify_cong_params_out_bits {
5425 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427
5428 u8 syndrome[0x20];
5429
Matan Barakb4ff3a32016-02-09 14:57:42 +02005430 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005431};
5432
5433struct mlx5_ifc_modify_cong_params_in_bits {
5434 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005435 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005436
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438 u8 op_mod[0x10];
5439
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005441 u8 cong_protocol[0x4];
5442
5443 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5444
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446
5447 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5448};
5449
5450struct mlx5_ifc_manage_pages_out_bits {
5451 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005452 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005453
5454 u8 syndrome[0x20];
5455
5456 u8 output_num_entries[0x20];
5457
Matan Barakb4ff3a32016-02-09 14:57:42 +02005458 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005459
5460 u8 pas[0][0x40];
5461};
5462
5463enum {
5464 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5465 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5466 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5467};
5468
5469struct mlx5_ifc_manage_pages_in_bits {
5470 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005471 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005472
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474 u8 op_mod[0x10];
5475
Matan Barakb4ff3a32016-02-09 14:57:42 +02005476 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005477 u8 function_id[0x10];
5478
5479 u8 input_num_entries[0x20];
5480
5481 u8 pas[0][0x40];
5482};
5483
5484struct mlx5_ifc_mad_ifc_out_bits {
5485 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487
5488 u8 syndrome[0x20];
5489
Matan Barakb4ff3a32016-02-09 14:57:42 +02005490 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005491
5492 u8 response_mad_packet[256][0x8];
5493};
5494
5495struct mlx5_ifc_mad_ifc_in_bits {
5496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498
Matan Barakb4ff3a32016-02-09 14:57:42 +02005499 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005500 u8 op_mod[0x10];
5501
5502 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005503 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005504 u8 port[0x8];
5505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507
5508 u8 mad[256][0x8];
5509};
5510
5511struct mlx5_ifc_init_hca_out_bits {
5512 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005513 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005514
5515 u8 syndrome[0x20];
5516
Matan Barakb4ff3a32016-02-09 14:57:42 +02005517 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005518};
5519
5520struct mlx5_ifc_init_hca_in_bits {
5521 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005522 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005523
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525 u8 op_mod[0x10];
5526
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528};
5529
5530struct mlx5_ifc_init2rtr_qp_out_bits {
5531 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533
5534 u8 syndrome[0x20];
5535
Matan Barakb4ff3a32016-02-09 14:57:42 +02005536 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005537};
5538
5539struct mlx5_ifc_init2rtr_qp_in_bits {
5540 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542
Matan Barakb4ff3a32016-02-09 14:57:42 +02005543 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005544 u8 op_mod[0x10];
5545
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547 u8 qpn[0x18];
5548
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550
5551 u8 opt_param_mask[0x20];
5552
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554
5555 struct mlx5_ifc_qpc_bits qpc;
5556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558};
5559
5560struct mlx5_ifc_init2init_qp_out_bits {
5561 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563
5564 u8 syndrome[0x20];
5565
Matan Barakb4ff3a32016-02-09 14:57:42 +02005566 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005567};
5568
5569struct mlx5_ifc_init2init_qp_in_bits {
5570 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005571 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574 u8 op_mod[0x10];
5575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577 u8 qpn[0x18];
5578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580
5581 u8 opt_param_mask[0x20];
5582
Matan Barakb4ff3a32016-02-09 14:57:42 +02005583 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005584
5585 struct mlx5_ifc_qpc_bits qpc;
5586
Matan Barakb4ff3a32016-02-09 14:57:42 +02005587 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005588};
5589
5590struct mlx5_ifc_get_dropped_packet_log_out_bits {
5591 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593
5594 u8 syndrome[0x20];
5595
Matan Barakb4ff3a32016-02-09 14:57:42 +02005596 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005597
5598 u8 packet_headers_log[128][0x8];
5599
5600 u8 packet_syndrome[64][0x8];
5601};
5602
5603struct mlx5_ifc_get_dropped_packet_log_in_bits {
5604 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606
Matan Barakb4ff3a32016-02-09 14:57:42 +02005607 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005608 u8 op_mod[0x10];
5609
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611};
5612
5613struct mlx5_ifc_gen_eqe_in_bits {
5614 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005615 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618 u8 op_mod[0x10];
5619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621 u8 eq_number[0x8];
5622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624
5625 u8 eqe[64][0x8];
5626};
5627
5628struct mlx5_ifc_gen_eq_out_bits {
5629 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631
5632 u8 syndrome[0x20];
5633
Matan Barakb4ff3a32016-02-09 14:57:42 +02005634 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005635};
5636
5637struct mlx5_ifc_enable_hca_out_bits {
5638 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640
5641 u8 syndrome[0x20];
5642
Matan Barakb4ff3a32016-02-09 14:57:42 +02005643 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005644};
5645
5646struct mlx5_ifc_enable_hca_in_bits {
5647 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005648 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651 u8 op_mod[0x10];
5652
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654 u8 function_id[0x10];
5655
Matan Barakb4ff3a32016-02-09 14:57:42 +02005656 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005657};
5658
5659struct mlx5_ifc_drain_dct_out_bits {
5660 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005661 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005662
5663 u8 syndrome[0x20];
5664
Matan Barakb4ff3a32016-02-09 14:57:42 +02005665 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005666};
5667
5668struct mlx5_ifc_drain_dct_in_bits {
5669 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005670 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005671
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673 u8 op_mod[0x10];
5674
Matan Barakb4ff3a32016-02-09 14:57:42 +02005675 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005676 u8 dctn[0x18];
5677
Matan Barakb4ff3a32016-02-09 14:57:42 +02005678 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005679};
5680
5681struct mlx5_ifc_disable_hca_out_bits {
5682 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005683 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005684
5685 u8 syndrome[0x20];
5686
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688};
5689
5690struct mlx5_ifc_disable_hca_in_bits {
5691 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005692 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695 u8 op_mod[0x10];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698 u8 function_id[0x10];
5699
Matan Barakb4ff3a32016-02-09 14:57:42 +02005700 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005701};
5702
5703struct mlx5_ifc_detach_from_mcg_out_bits {
5704 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706
5707 u8 syndrome[0x20];
5708
Matan Barakb4ff3a32016-02-09 14:57:42 +02005709 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005710};
5711
5712struct mlx5_ifc_detach_from_mcg_in_bits {
5713 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717 u8 op_mod[0x10];
5718
Matan Barakb4ff3a32016-02-09 14:57:42 +02005719 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005720 u8 qpn[0x18];
5721
Matan Barakb4ff3a32016-02-09 14:57:42 +02005722 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005723
5724 u8 multicast_gid[16][0x8];
5725};
5726
Saeed Mahameed74862162016-06-09 15:11:34 +03005727struct mlx5_ifc_destroy_xrq_out_bits {
5728 u8 status[0x8];
5729 u8 reserved_at_8[0x18];
5730
5731 u8 syndrome[0x20];
5732
5733 u8 reserved_at_40[0x40];
5734};
5735
5736struct mlx5_ifc_destroy_xrq_in_bits {
5737 u8 opcode[0x10];
5738 u8 reserved_at_10[0x10];
5739
5740 u8 reserved_at_20[0x10];
5741 u8 op_mod[0x10];
5742
5743 u8 reserved_at_40[0x8];
5744 u8 xrqn[0x18];
5745
5746 u8 reserved_at_60[0x20];
5747};
5748
Saeed Mahameede2816822015-05-28 22:28:40 +03005749struct mlx5_ifc_destroy_xrc_srq_out_bits {
5750 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752
5753 u8 syndrome[0x20];
5754
Matan Barakb4ff3a32016-02-09 14:57:42 +02005755 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005756};
5757
5758struct mlx5_ifc_destroy_xrc_srq_in_bits {
5759 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005760 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763 u8 op_mod[0x10];
5764
Matan Barakb4ff3a32016-02-09 14:57:42 +02005765 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005766 u8 xrc_srqn[0x18];
5767
Matan Barakb4ff3a32016-02-09 14:57:42 +02005768 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005769};
5770
5771struct mlx5_ifc_destroy_tis_out_bits {
5772 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774
5775 u8 syndrome[0x20];
5776
Matan Barakb4ff3a32016-02-09 14:57:42 +02005777 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005778};
5779
5780struct mlx5_ifc_destroy_tis_in_bits {
5781 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005782 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785 u8 op_mod[0x10];
5786
Matan Barakb4ff3a32016-02-09 14:57:42 +02005787 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005788 u8 tisn[0x18];
5789
Matan Barakb4ff3a32016-02-09 14:57:42 +02005790 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005791};
5792
5793struct mlx5_ifc_destroy_tir_out_bits {
5794 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796
5797 u8 syndrome[0x20];
5798
Matan Barakb4ff3a32016-02-09 14:57:42 +02005799 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005800};
5801
5802struct mlx5_ifc_destroy_tir_in_bits {
5803 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005804 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807 u8 op_mod[0x10];
5808
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810 u8 tirn[0x18];
5811
Matan Barakb4ff3a32016-02-09 14:57:42 +02005812 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005813};
5814
5815struct mlx5_ifc_destroy_srq_out_bits {
5816 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818
5819 u8 syndrome[0x20];
5820
Matan Barakb4ff3a32016-02-09 14:57:42 +02005821 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005822};
5823
5824struct mlx5_ifc_destroy_srq_in_bits {
5825 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005826 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829 u8 op_mod[0x10];
5830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832 u8 srqn[0x18];
5833
Matan Barakb4ff3a32016-02-09 14:57:42 +02005834 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005835};
5836
5837struct mlx5_ifc_destroy_sq_out_bits {
5838 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840
5841 u8 syndrome[0x20];
5842
Matan Barakb4ff3a32016-02-09 14:57:42 +02005843 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005844};
5845
5846struct mlx5_ifc_destroy_sq_in_bits {
5847 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005848 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851 u8 op_mod[0x10];
5852
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854 u8 sqn[0x18];
5855
Matan Barakb4ff3a32016-02-09 14:57:42 +02005856 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005857};
5858
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005859struct mlx5_ifc_destroy_scheduling_element_out_bits {
5860 u8 status[0x8];
5861 u8 reserved_at_8[0x18];
5862
5863 u8 syndrome[0x20];
5864
5865 u8 reserved_at_40[0x1c0];
5866};
5867
5868struct mlx5_ifc_destroy_scheduling_element_in_bits {
5869 u8 opcode[0x10];
5870 u8 reserved_at_10[0x10];
5871
5872 u8 reserved_at_20[0x10];
5873 u8 op_mod[0x10];
5874
5875 u8 scheduling_hierarchy[0x8];
5876 u8 reserved_at_48[0x18];
5877
5878 u8 scheduling_element_id[0x20];
5879
5880 u8 reserved_at_80[0x180];
5881};
5882
Saeed Mahameede2816822015-05-28 22:28:40 +03005883struct mlx5_ifc_destroy_rqt_out_bits {
5884 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886
5887 u8 syndrome[0x20];
5888
Matan Barakb4ff3a32016-02-09 14:57:42 +02005889 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005890};
5891
5892struct mlx5_ifc_destroy_rqt_in_bits {
5893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897 u8 op_mod[0x10];
5898
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900 u8 rqtn[0x18];
5901
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903};
5904
5905struct mlx5_ifc_destroy_rq_out_bits {
5906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908
5909 u8 syndrome[0x20];
5910
Matan Barakb4ff3a32016-02-09 14:57:42 +02005911 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005912};
5913
5914struct mlx5_ifc_destroy_rq_in_bits {
5915 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919 u8 op_mod[0x10];
5920
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922 u8 rqn[0x18];
5923
Matan Barakb4ff3a32016-02-09 14:57:42 +02005924 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005925};
5926
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005927struct mlx5_ifc_set_delay_drop_params_in_bits {
5928 u8 opcode[0x10];
5929 u8 reserved_at_10[0x10];
5930
5931 u8 reserved_at_20[0x10];
5932 u8 op_mod[0x10];
5933
5934 u8 reserved_at_40[0x20];
5935
5936 u8 reserved_at_60[0x10];
5937 u8 delay_drop_timeout[0x10];
5938};
5939
5940struct mlx5_ifc_set_delay_drop_params_out_bits {
5941 u8 status[0x8];
5942 u8 reserved_at_8[0x18];
5943
5944 u8 syndrome[0x20];
5945
5946 u8 reserved_at_40[0x40];
5947};
5948
Saeed Mahameede2816822015-05-28 22:28:40 +03005949struct mlx5_ifc_destroy_rmp_out_bits {
5950 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952
5953 u8 syndrome[0x20];
5954
Matan Barakb4ff3a32016-02-09 14:57:42 +02005955 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005956};
5957
5958struct mlx5_ifc_destroy_rmp_in_bits {
5959 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005960 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963 u8 op_mod[0x10];
5964
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966 u8 rmpn[0x18];
5967
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969};
5970
5971struct mlx5_ifc_destroy_qp_out_bits {
5972 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974
5975 u8 syndrome[0x20];
5976
Matan Barakb4ff3a32016-02-09 14:57:42 +02005977 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005978};
5979
5980struct mlx5_ifc_destroy_qp_in_bits {
5981 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005982 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985 u8 op_mod[0x10];
5986
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988 u8 qpn[0x18];
5989
Matan Barakb4ff3a32016-02-09 14:57:42 +02005990 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005991};
5992
5993struct mlx5_ifc_destroy_psv_out_bits {
5994 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996
5997 u8 syndrome[0x20];
5998
Matan Barakb4ff3a32016-02-09 14:57:42 +02005999 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006000};
6001
6002struct mlx5_ifc_destroy_psv_in_bits {
6003 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006004 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007 u8 op_mod[0x10];
6008
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010 u8 psvn[0x18];
6011
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013};
6014
6015struct mlx5_ifc_destroy_mkey_out_bits {
6016 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018
6019 u8 syndrome[0x20];
6020
Matan Barakb4ff3a32016-02-09 14:57:42 +02006021 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006022};
6023
6024struct mlx5_ifc_destroy_mkey_in_bits {
6025 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006026 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006027
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029 u8 op_mod[0x10];
6030
Matan Barakb4ff3a32016-02-09 14:57:42 +02006031 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006032 u8 mkey_index[0x18];
6033
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035};
6036
6037struct mlx5_ifc_destroy_flow_table_out_bits {
6038 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040
6041 u8 syndrome[0x20];
6042
Matan Barakb4ff3a32016-02-09 14:57:42 +02006043 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006044};
6045
6046struct mlx5_ifc_destroy_flow_table_in_bits {
6047 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051 u8 op_mod[0x10];
6052
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006053 u8 other_vport[0x1];
6054 u8 reserved_at_41[0xf];
6055 u8 vport_number[0x10];
6056
6057 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006058
6059 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006060 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063 u8 table_id[0x18];
6064
Matan Barakb4ff3a32016-02-09 14:57:42 +02006065 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006066};
6067
6068struct mlx5_ifc_destroy_flow_group_out_bits {
6069 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071
6072 u8 syndrome[0x20];
6073
Matan Barakb4ff3a32016-02-09 14:57:42 +02006074 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006075};
6076
6077struct mlx5_ifc_destroy_flow_group_in_bits {
6078 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006079 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082 u8 op_mod[0x10];
6083
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006084 u8 other_vport[0x1];
6085 u8 reserved_at_41[0xf];
6086 u8 vport_number[0x10];
6087
6088 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089
6090 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094 u8 table_id[0x18];
6095
6096 u8 group_id[0x20];
6097
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099};
6100
6101struct mlx5_ifc_destroy_eq_out_bits {
6102 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104
6105 u8 syndrome[0x20];
6106
Matan Barakb4ff3a32016-02-09 14:57:42 +02006107 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006108};
6109
6110struct mlx5_ifc_destroy_eq_in_bits {
6111 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115 u8 op_mod[0x10];
6116
Matan Barakb4ff3a32016-02-09 14:57:42 +02006117 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006118 u8 eq_number[0x8];
6119
Matan Barakb4ff3a32016-02-09 14:57:42 +02006120 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006121};
6122
6123struct mlx5_ifc_destroy_dct_out_bits {
6124 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126
6127 u8 syndrome[0x20];
6128
Matan Barakb4ff3a32016-02-09 14:57:42 +02006129 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006130};
6131
6132struct mlx5_ifc_destroy_dct_in_bits {
6133 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137 u8 op_mod[0x10];
6138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140 u8 dctn[0x18];
6141
Matan Barakb4ff3a32016-02-09 14:57:42 +02006142 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006143};
6144
6145struct mlx5_ifc_destroy_cq_out_bits {
6146 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006147 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006148
6149 u8 syndrome[0x20];
6150
Matan Barakb4ff3a32016-02-09 14:57:42 +02006151 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006152};
6153
6154struct mlx5_ifc_destroy_cq_in_bits {
6155 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159 u8 op_mod[0x10];
6160
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162 u8 cqn[0x18];
6163
Matan Barakb4ff3a32016-02-09 14:57:42 +02006164 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006165};
6166
6167struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6168 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170
6171 u8 syndrome[0x20];
6172
Matan Barakb4ff3a32016-02-09 14:57:42 +02006173 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006174};
6175
6176struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6177 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006178 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006179
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181 u8 op_mod[0x10];
6182
Matan Barakb4ff3a32016-02-09 14:57:42 +02006183 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006184
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186 u8 vxlan_udp_port[0x10];
6187};
6188
6189struct mlx5_ifc_delete_l2_table_entry_out_bits {
6190 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192
6193 u8 syndrome[0x20];
6194
Matan Barakb4ff3a32016-02-09 14:57:42 +02006195 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006196};
6197
6198struct mlx5_ifc_delete_l2_table_entry_in_bits {
6199 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006200 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203 u8 op_mod[0x10];
6204
Matan Barakb4ff3a32016-02-09 14:57:42 +02006205 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006206
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208 u8 table_index[0x18];
6209
Matan Barakb4ff3a32016-02-09 14:57:42 +02006210 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006211};
6212
6213struct mlx5_ifc_delete_fte_out_bits {
6214 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216
6217 u8 syndrome[0x20];
6218
Matan Barakb4ff3a32016-02-09 14:57:42 +02006219 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006220};
6221
6222struct mlx5_ifc_delete_fte_in_bits {
6223 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227 u8 op_mod[0x10];
6228
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006229 u8 other_vport[0x1];
6230 u8 reserved_at_41[0xf];
6231 u8 vport_number[0x10];
6232
6233 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234
6235 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006236 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006237
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239 u8 table_id[0x18];
6240
Matan Barakb4ff3a32016-02-09 14:57:42 +02006241 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006242
6243 u8 flow_index[0x20];
6244
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246};
6247
6248struct mlx5_ifc_dealloc_xrcd_out_bits {
6249 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251
6252 u8 syndrome[0x20];
6253
Matan Barakb4ff3a32016-02-09 14:57:42 +02006254 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006255};
6256
6257struct mlx5_ifc_dealloc_xrcd_in_bits {
6258 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260
Matan Barakb4ff3a32016-02-09 14:57:42 +02006261 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006262 u8 op_mod[0x10];
6263
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265 u8 xrcd[0x18];
6266
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268};
6269
6270struct mlx5_ifc_dealloc_uar_out_bits {
6271 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006272 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006273
6274 u8 syndrome[0x20];
6275
Matan Barakb4ff3a32016-02-09 14:57:42 +02006276 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006277};
6278
6279struct mlx5_ifc_dealloc_uar_in_bits {
6280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284 u8 op_mod[0x10];
6285
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287 u8 uar[0x18];
6288
Matan Barakb4ff3a32016-02-09 14:57:42 +02006289 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006290};
6291
6292struct mlx5_ifc_dealloc_transport_domain_out_bits {
6293 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006294 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006295
6296 u8 syndrome[0x20];
6297
Matan Barakb4ff3a32016-02-09 14:57:42 +02006298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006299};
6300
6301struct mlx5_ifc_dealloc_transport_domain_in_bits {
6302 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306 u8 op_mod[0x10];
6307
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309 u8 transport_domain[0x18];
6310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312};
6313
6314struct mlx5_ifc_dealloc_q_counter_out_bits {
6315 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006316 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006317
6318 u8 syndrome[0x20];
6319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321};
6322
6323struct mlx5_ifc_dealloc_q_counter_in_bits {
6324 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328 u8 op_mod[0x10];
6329
Matan Barakb4ff3a32016-02-09 14:57:42 +02006330 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006331 u8 counter_set_id[0x8];
6332
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334};
6335
6336struct mlx5_ifc_dealloc_pd_out_bits {
6337 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339
6340 u8 syndrome[0x20];
6341
Matan Barakb4ff3a32016-02-09 14:57:42 +02006342 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006343};
6344
6345struct mlx5_ifc_dealloc_pd_in_bits {
6346 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350 u8 op_mod[0x10];
6351
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353 u8 pd[0x18];
6354
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356};
6357
Amir Vadai9dc0b282016-05-13 12:55:39 +00006358struct mlx5_ifc_dealloc_flow_counter_out_bits {
6359 u8 status[0x8];
6360 u8 reserved_at_8[0x18];
6361
6362 u8 syndrome[0x20];
6363
6364 u8 reserved_at_40[0x40];
6365};
6366
6367struct mlx5_ifc_dealloc_flow_counter_in_bits {
6368 u8 opcode[0x10];
6369 u8 reserved_at_10[0x10];
6370
6371 u8 reserved_at_20[0x10];
6372 u8 op_mod[0x10];
6373
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006374 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006375
6376 u8 reserved_at_60[0x20];
6377};
6378
Saeed Mahameed74862162016-06-09 15:11:34 +03006379struct mlx5_ifc_create_xrq_out_bits {
6380 u8 status[0x8];
6381 u8 reserved_at_8[0x18];
6382
6383 u8 syndrome[0x20];
6384
6385 u8 reserved_at_40[0x8];
6386 u8 xrqn[0x18];
6387
6388 u8 reserved_at_60[0x20];
6389};
6390
6391struct mlx5_ifc_create_xrq_in_bits {
6392 u8 opcode[0x10];
6393 u8 reserved_at_10[0x10];
6394
6395 u8 reserved_at_20[0x10];
6396 u8 op_mod[0x10];
6397
6398 u8 reserved_at_40[0x40];
6399
6400 struct mlx5_ifc_xrqc_bits xrq_context;
6401};
6402
Saeed Mahameede2816822015-05-28 22:28:40 +03006403struct mlx5_ifc_create_xrc_srq_out_bits {
6404 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006405 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006406
6407 u8 syndrome[0x20];
6408
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410 u8 xrc_srqn[0x18];
6411
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413};
6414
6415struct mlx5_ifc_create_xrc_srq_in_bits {
6416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006418
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420 u8 op_mod[0x10];
6421
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423
6424 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427
6428 u8 pas[0][0x40];
6429};
6430
6431struct mlx5_ifc_create_tis_out_bits {
6432 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434
6435 u8 syndrome[0x20];
6436
Matan Barakb4ff3a32016-02-09 14:57:42 +02006437 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006438 u8 tisn[0x18];
6439
Matan Barakb4ff3a32016-02-09 14:57:42 +02006440 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006441};
6442
6443struct mlx5_ifc_create_tis_in_bits {
6444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446
Matan Barakb4ff3a32016-02-09 14:57:42 +02006447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006448 u8 op_mod[0x10];
6449
Matan Barakb4ff3a32016-02-09 14:57:42 +02006450 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006451
6452 struct mlx5_ifc_tisc_bits ctx;
6453};
6454
6455struct mlx5_ifc_create_tir_out_bits {
6456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006458
6459 u8 syndrome[0x20];
6460
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462 u8 tirn[0x18];
6463
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465};
6466
6467struct mlx5_ifc_create_tir_in_bits {
6468 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470
Matan Barakb4ff3a32016-02-09 14:57:42 +02006471 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006472 u8 op_mod[0x10];
6473
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475
6476 struct mlx5_ifc_tirc_bits ctx;
6477};
6478
6479struct mlx5_ifc_create_srq_out_bits {
6480 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006481 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006482
6483 u8 syndrome[0x20];
6484
Matan Barakb4ff3a32016-02-09 14:57:42 +02006485 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006486 u8 srqn[0x18];
6487
Matan Barakb4ff3a32016-02-09 14:57:42 +02006488 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006489};
6490
6491struct mlx5_ifc_create_srq_in_bits {
6492 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006493 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006494
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496 u8 op_mod[0x10];
6497
Matan Barakb4ff3a32016-02-09 14:57:42 +02006498 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006499
6500 struct mlx5_ifc_srqc_bits srq_context_entry;
6501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503
6504 u8 pas[0][0x40];
6505};
6506
6507struct mlx5_ifc_create_sq_out_bits {
6508 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006509 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006510
6511 u8 syndrome[0x20];
6512
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514 u8 sqn[0x18];
6515
Matan Barakb4ff3a32016-02-09 14:57:42 +02006516 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006517};
6518
6519struct mlx5_ifc_create_sq_in_bits {
6520 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522
Matan Barakb4ff3a32016-02-09 14:57:42 +02006523 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006524 u8 op_mod[0x10];
6525
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527
6528 struct mlx5_ifc_sqc_bits ctx;
6529};
6530
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006531struct mlx5_ifc_create_scheduling_element_out_bits {
6532 u8 status[0x8];
6533 u8 reserved_at_8[0x18];
6534
6535 u8 syndrome[0x20];
6536
6537 u8 reserved_at_40[0x40];
6538
6539 u8 scheduling_element_id[0x20];
6540
6541 u8 reserved_at_a0[0x160];
6542};
6543
6544struct mlx5_ifc_create_scheduling_element_in_bits {
6545 u8 opcode[0x10];
6546 u8 reserved_at_10[0x10];
6547
6548 u8 reserved_at_20[0x10];
6549 u8 op_mod[0x10];
6550
6551 u8 scheduling_hierarchy[0x8];
6552 u8 reserved_at_48[0x18];
6553
6554 u8 reserved_at_60[0xa0];
6555
6556 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6557
6558 u8 reserved_at_300[0x100];
6559};
6560
Saeed Mahameede2816822015-05-28 22:28:40 +03006561struct mlx5_ifc_create_rqt_out_bits {
6562 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006563 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006564
6565 u8 syndrome[0x20];
6566
Matan Barakb4ff3a32016-02-09 14:57:42 +02006567 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006568 u8 rqtn[0x18];
6569
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571};
6572
6573struct mlx5_ifc_create_rqt_in_bits {
6574 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 op_mod[0x10];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
6582 struct mlx5_ifc_rqtc_bits rqt_context;
6583};
6584
6585struct mlx5_ifc_create_rq_out_bits {
6586 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588
6589 u8 syndrome[0x20];
6590
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592 u8 rqn[0x18];
6593
Matan Barakb4ff3a32016-02-09 14:57:42 +02006594 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006595};
6596
6597struct mlx5_ifc_create_rq_in_bits {
6598 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600
Matan Barakb4ff3a32016-02-09 14:57:42 +02006601 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006602 u8 op_mod[0x10];
6603
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605
6606 struct mlx5_ifc_rqc_bits ctx;
6607};
6608
6609struct mlx5_ifc_create_rmp_out_bits {
6610 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006611 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006612
6613 u8 syndrome[0x20];
6614
Matan Barakb4ff3a32016-02-09 14:57:42 +02006615 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006616 u8 rmpn[0x18];
6617
Matan Barakb4ff3a32016-02-09 14:57:42 +02006618 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006619};
6620
6621struct mlx5_ifc_create_rmp_in_bits {
6622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626 u8 op_mod[0x10];
6627
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
6630 struct mlx5_ifc_rmpc_bits ctx;
6631};
6632
6633struct mlx5_ifc_create_qp_out_bits {
6634 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006635 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006636
6637 u8 syndrome[0x20];
6638
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640 u8 qpn[0x18];
6641
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643};
6644
6645struct mlx5_ifc_create_qp_in_bits {
6646 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650 u8 op_mod[0x10];
6651
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653
6654 u8 opt_param_mask[0x20];
6655
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657
6658 struct mlx5_ifc_qpc_bits qpc;
6659
Matan Barakb4ff3a32016-02-09 14:57:42 +02006660 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006661
6662 u8 pas[0][0x40];
6663};
6664
6665struct mlx5_ifc_create_psv_out_bits {
6666 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006667 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006668
6669 u8 syndrome[0x20];
6670
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672
Matan Barakb4ff3a32016-02-09 14:57:42 +02006673 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006674 u8 psv0_index[0x18];
6675
Matan Barakb4ff3a32016-02-09 14:57:42 +02006676 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006677 u8 psv1_index[0x18];
6678
Matan Barakb4ff3a32016-02-09 14:57:42 +02006679 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006680 u8 psv2_index[0x18];
6681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 psv3_index[0x18];
6684};
6685
6686struct mlx5_ifc_create_psv_in_bits {
6687 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006688 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006689
Matan Barakb4ff3a32016-02-09 14:57:42 +02006690 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006691 u8 op_mod[0x10];
6692
6693 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006694 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006695 u8 pd[0x18];
6696
Matan Barakb4ff3a32016-02-09 14:57:42 +02006697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006698};
6699
6700struct mlx5_ifc_create_mkey_out_bits {
6701 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006702 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006703
6704 u8 syndrome[0x20];
6705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707 u8 mkey_index[0x18];
6708
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710};
6711
6712struct mlx5_ifc_create_mkey_in_bits {
6713 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006714 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006715
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717 u8 op_mod[0x10];
6718
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720
6721 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006722 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006723
6724 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727
6728 u8 translations_octword_actual_size[0x20];
6729
Matan Barakb4ff3a32016-02-09 14:57:42 +02006730 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006731
6732 u8 klm_pas_mtt[0][0x20];
6733};
6734
6735struct mlx5_ifc_create_flow_table_out_bits {
6736 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006737 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006738
6739 u8 syndrome[0x20];
6740
Matan Barakb4ff3a32016-02-09 14:57:42 +02006741 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006742 u8 table_id[0x18];
6743
Matan Barakb4ff3a32016-02-09 14:57:42 +02006744 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006745};
6746
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006747struct mlx5_ifc_flow_table_context_bits {
6748 u8 encap_en[0x1];
6749 u8 decap_en[0x1];
6750 u8 reserved_at_2[0x2];
6751 u8 table_miss_action[0x4];
6752 u8 level[0x8];
6753 u8 reserved_at_10[0x8];
6754 u8 log_size[0x8];
6755
6756 u8 reserved_at_20[0x8];
6757 u8 table_miss_id[0x18];
6758
6759 u8 reserved_at_40[0x8];
6760 u8 lag_master_next_table_id[0x18];
6761
6762 u8 reserved_at_60[0xe0];
6763};
6764
Saeed Mahameede2816822015-05-28 22:28:40 +03006765struct mlx5_ifc_create_flow_table_in_bits {
6766 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006767 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006768
Matan Barakb4ff3a32016-02-09 14:57:42 +02006769 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006770 u8 op_mod[0x10];
6771
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006772 u8 other_vport[0x1];
6773 u8 reserved_at_41[0xf];
6774 u8 vport_number[0x10];
6775
6776 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777
6778 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780
Matan Barakb4ff3a32016-02-09 14:57:42 +02006781 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006782
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006783 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006784};
6785
6786struct mlx5_ifc_create_flow_group_out_bits {
6787 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789
6790 u8 syndrome[0x20];
6791
Matan Barakb4ff3a32016-02-09 14:57:42 +02006792 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006793 u8 group_id[0x18];
6794
Matan Barakb4ff3a32016-02-09 14:57:42 +02006795 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006796};
6797
6798enum {
6799 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6800 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6801 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6802};
6803
6804struct mlx5_ifc_create_flow_group_in_bits {
6805 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006806 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006807
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809 u8 op_mod[0x10];
6810
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006811 u8 other_vport[0x1];
6812 u8 reserved_at_41[0xf];
6813 u8 vport_number[0x10];
6814
6815 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006816
6817 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006818 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006819
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821 u8 table_id[0x18];
6822
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824
6825 u8 start_flow_index[0x20];
6826
Matan Barakb4ff3a32016-02-09 14:57:42 +02006827 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006828
6829 u8 end_flow_index[0x20];
6830
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832
Matan Barakb4ff3a32016-02-09 14:57:42 +02006833 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834 u8 match_criteria_enable[0x8];
6835
6836 struct mlx5_ifc_fte_match_param_bits match_criteria;
6837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839};
6840
6841struct mlx5_ifc_create_eq_out_bits {
6842 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006843 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006844
6845 u8 syndrome[0x20];
6846
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848 u8 eq_number[0x8];
6849
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851};
6852
6853struct mlx5_ifc_create_eq_in_bits {
6854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006856
Matan Barakb4ff3a32016-02-09 14:57:42 +02006857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006858 u8 op_mod[0x10];
6859
Matan Barakb4ff3a32016-02-09 14:57:42 +02006860 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006861
6862 struct mlx5_ifc_eqc_bits eq_context_entry;
6863
Matan Barakb4ff3a32016-02-09 14:57:42 +02006864 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006865
6866 u8 event_bitmask[0x40];
6867
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869
6870 u8 pas[0][0x40];
6871};
6872
6873struct mlx5_ifc_create_dct_out_bits {
6874 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006875 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006876
6877 u8 syndrome[0x20];
6878
Matan Barakb4ff3a32016-02-09 14:57:42 +02006879 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006880 u8 dctn[0x18];
6881
Matan Barakb4ff3a32016-02-09 14:57:42 +02006882 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006883};
6884
6885struct mlx5_ifc_create_dct_in_bits {
6886 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006887 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006888
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890 u8 op_mod[0x10];
6891
Matan Barakb4ff3a32016-02-09 14:57:42 +02006892 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006893
6894 struct mlx5_ifc_dctc_bits dct_context_entry;
6895
Matan Barakb4ff3a32016-02-09 14:57:42 +02006896 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006897};
6898
6899struct mlx5_ifc_create_cq_out_bits {
6900 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006901 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006902
6903 u8 syndrome[0x20];
6904
Matan Barakb4ff3a32016-02-09 14:57:42 +02006905 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006906 u8 cqn[0x18];
6907
Matan Barakb4ff3a32016-02-09 14:57:42 +02006908 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006909};
6910
6911struct mlx5_ifc_create_cq_in_bits {
6912 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914
Matan Barakb4ff3a32016-02-09 14:57:42 +02006915 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006916 u8 op_mod[0x10];
6917
Matan Barakb4ff3a32016-02-09 14:57:42 +02006918 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006919
6920 struct mlx5_ifc_cqc_bits cq_context;
6921
Matan Barakb4ff3a32016-02-09 14:57:42 +02006922 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006923
6924 u8 pas[0][0x40];
6925};
6926
6927struct mlx5_ifc_config_int_moderation_out_bits {
6928 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006929 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006930
6931 u8 syndrome[0x20];
6932
Matan Barakb4ff3a32016-02-09 14:57:42 +02006933 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006934 u8 min_delay[0xc];
6935 u8 int_vector[0x10];
6936
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938};
6939
6940enum {
6941 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6942 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6943};
6944
6945struct mlx5_ifc_config_int_moderation_in_bits {
6946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006948
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950 u8 op_mod[0x10];
6951
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953 u8 min_delay[0xc];
6954 u8 int_vector[0x10];
6955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957};
6958
6959struct mlx5_ifc_attach_to_mcg_out_bits {
6960 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962
6963 u8 syndrome[0x20];
6964
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966};
6967
6968struct mlx5_ifc_attach_to_mcg_in_bits {
6969 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973 u8 op_mod[0x10];
6974
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976 u8 qpn[0x18];
6977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979
6980 u8 multicast_gid[16][0x8];
6981};
6982
Saeed Mahameed74862162016-06-09 15:11:34 +03006983struct mlx5_ifc_arm_xrq_out_bits {
6984 u8 status[0x8];
6985 u8 reserved_at_8[0x18];
6986
6987 u8 syndrome[0x20];
6988
6989 u8 reserved_at_40[0x40];
6990};
6991
6992struct mlx5_ifc_arm_xrq_in_bits {
6993 u8 opcode[0x10];
6994 u8 reserved_at_10[0x10];
6995
6996 u8 reserved_at_20[0x10];
6997 u8 op_mod[0x10];
6998
6999 u8 reserved_at_40[0x8];
7000 u8 xrqn[0x18];
7001
7002 u8 reserved_at_60[0x10];
7003 u8 lwm[0x10];
7004};
7005
Saeed Mahameede2816822015-05-28 22:28:40 +03007006struct mlx5_ifc_arm_xrc_srq_out_bits {
7007 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007008 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007009
7010 u8 syndrome[0x20];
7011
Matan Barakb4ff3a32016-02-09 14:57:42 +02007012 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007013};
7014
7015enum {
7016 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7017};
7018
7019struct mlx5_ifc_arm_xrc_srq_in_bits {
7020 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007021 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007022
Matan Barakb4ff3a32016-02-09 14:57:42 +02007023 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007024 u8 op_mod[0x10];
7025
Matan Barakb4ff3a32016-02-09 14:57:42 +02007026 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007027 u8 xrc_srqn[0x18];
7028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030 u8 lwm[0x10];
7031};
7032
7033struct mlx5_ifc_arm_rq_out_bits {
7034 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007035 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007036
7037 u8 syndrome[0x20];
7038
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040};
7041
7042enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007043 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7044 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007045};
7046
7047struct mlx5_ifc_arm_rq_in_bits {
7048 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050
Matan Barakb4ff3a32016-02-09 14:57:42 +02007051 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007052 u8 op_mod[0x10];
7053
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055 u8 srq_number[0x18];
7056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058 u8 lwm[0x10];
7059};
7060
7061struct mlx5_ifc_arm_dct_out_bits {
7062 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007063 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007064
7065 u8 syndrome[0x20];
7066
Matan Barakb4ff3a32016-02-09 14:57:42 +02007067 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007068};
7069
7070struct mlx5_ifc_arm_dct_in_bits {
7071 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007072 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007073
Matan Barakb4ff3a32016-02-09 14:57:42 +02007074 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007075 u8 op_mod[0x10];
7076
Matan Barakb4ff3a32016-02-09 14:57:42 +02007077 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007078 u8 dct_number[0x18];
7079
Matan Barakb4ff3a32016-02-09 14:57:42 +02007080 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007081};
7082
7083struct mlx5_ifc_alloc_xrcd_out_bits {
7084 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086
7087 u8 syndrome[0x20];
7088
Matan Barakb4ff3a32016-02-09 14:57:42 +02007089 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007090 u8 xrcd[0x18];
7091
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093};
7094
7095struct mlx5_ifc_alloc_xrcd_in_bits {
7096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098
Matan Barakb4ff3a32016-02-09 14:57:42 +02007099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007100 u8 op_mod[0x10];
7101
Matan Barakb4ff3a32016-02-09 14:57:42 +02007102 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007103};
7104
7105struct mlx5_ifc_alloc_uar_out_bits {
7106 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007107 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007108
7109 u8 syndrome[0x20];
7110
Matan Barakb4ff3a32016-02-09 14:57:42 +02007111 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007112 u8 uar[0x18];
7113
Matan Barakb4ff3a32016-02-09 14:57:42 +02007114 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007115};
7116
7117struct mlx5_ifc_alloc_uar_in_bits {
7118 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120
Matan Barakb4ff3a32016-02-09 14:57:42 +02007121 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007122 u8 op_mod[0x10];
7123
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125};
7126
7127struct mlx5_ifc_alloc_transport_domain_out_bits {
7128 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007129 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007130
7131 u8 syndrome[0x20];
7132
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134 u8 transport_domain[0x18];
7135
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137};
7138
7139struct mlx5_ifc_alloc_transport_domain_in_bits {
7140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142
Matan Barakb4ff3a32016-02-09 14:57:42 +02007143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007144 u8 op_mod[0x10];
7145
Matan Barakb4ff3a32016-02-09 14:57:42 +02007146 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007147};
7148
7149struct mlx5_ifc_alloc_q_counter_out_bits {
7150 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007151 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007152
7153 u8 syndrome[0x20];
7154
Matan Barakb4ff3a32016-02-09 14:57:42 +02007155 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007156 u8 counter_set_id[0x8];
7157
Matan Barakb4ff3a32016-02-09 14:57:42 +02007158 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007159};
7160
7161struct mlx5_ifc_alloc_q_counter_in_bits {
7162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164
Matan Barakb4ff3a32016-02-09 14:57:42 +02007165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007166 u8 op_mod[0x10];
7167
Matan Barakb4ff3a32016-02-09 14:57:42 +02007168 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007169};
7170
7171struct mlx5_ifc_alloc_pd_out_bits {
7172 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007173 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007174
7175 u8 syndrome[0x20];
7176
Matan Barakb4ff3a32016-02-09 14:57:42 +02007177 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007178 u8 pd[0x18];
7179
Matan Barakb4ff3a32016-02-09 14:57:42 +02007180 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007181};
7182
7183struct mlx5_ifc_alloc_pd_in_bits {
7184 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007185 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007186
Matan Barakb4ff3a32016-02-09 14:57:42 +02007187 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007188 u8 op_mod[0x10];
7189
Matan Barakb4ff3a32016-02-09 14:57:42 +02007190 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007191};
7192
Amir Vadai9dc0b282016-05-13 12:55:39 +00007193struct mlx5_ifc_alloc_flow_counter_out_bits {
7194 u8 status[0x8];
7195 u8 reserved_at_8[0x18];
7196
7197 u8 syndrome[0x20];
7198
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007199 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007200
7201 u8 reserved_at_60[0x20];
7202};
7203
7204struct mlx5_ifc_alloc_flow_counter_in_bits {
7205 u8 opcode[0x10];
7206 u8 reserved_at_10[0x10];
7207
7208 u8 reserved_at_20[0x10];
7209 u8 op_mod[0x10];
7210
7211 u8 reserved_at_40[0x40];
7212};
7213
Saeed Mahameede2816822015-05-28 22:28:40 +03007214struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7215 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007216 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007217
7218 u8 syndrome[0x20];
7219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221};
7222
7223struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7224 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226
Matan Barakb4ff3a32016-02-09 14:57:42 +02007227 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007228 u8 op_mod[0x10];
7229
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233 u8 vxlan_udp_port[0x10];
7234};
7235
Saeed Mahameed74862162016-06-09 15:11:34 +03007236struct mlx5_ifc_set_rate_limit_out_bits {
7237 u8 status[0x8];
7238 u8 reserved_at_8[0x18];
7239
7240 u8 syndrome[0x20];
7241
7242 u8 reserved_at_40[0x40];
7243};
7244
7245struct mlx5_ifc_set_rate_limit_in_bits {
7246 u8 opcode[0x10];
7247 u8 reserved_at_10[0x10];
7248
7249 u8 reserved_at_20[0x10];
7250 u8 op_mod[0x10];
7251
7252 u8 reserved_at_40[0x10];
7253 u8 rate_limit_index[0x10];
7254
7255 u8 reserved_at_60[0x20];
7256
7257 u8 rate_limit[0x20];
7258};
7259
Saeed Mahameede2816822015-05-28 22:28:40 +03007260struct mlx5_ifc_access_register_out_bits {
7261 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263
7264 u8 syndrome[0x20];
7265
Matan Barakb4ff3a32016-02-09 14:57:42 +02007266 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007267
7268 u8 register_data[0][0x20];
7269};
7270
7271enum {
7272 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7273 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7274};
7275
7276struct mlx5_ifc_access_register_in_bits {
7277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007279
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281 u8 op_mod[0x10];
7282
Matan Barakb4ff3a32016-02-09 14:57:42 +02007283 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007284 u8 register_id[0x10];
7285
7286 u8 argument[0x20];
7287
7288 u8 register_data[0][0x20];
7289};
7290
7291struct mlx5_ifc_sltp_reg_bits {
7292 u8 status[0x4];
7293 u8 version[0x4];
7294 u8 local_port[0x8];
7295 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007296 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007297 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007298 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007299
Matan Barakb4ff3a32016-02-09 14:57:42 +02007300 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007301
Matan Barakb4ff3a32016-02-09 14:57:42 +02007302 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007303 u8 polarity[0x1];
7304 u8 ob_tap0[0x8];
7305 u8 ob_tap1[0x8];
7306 u8 ob_tap2[0x8];
7307
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309 u8 ob_preemp_mode[0x4];
7310 u8 ob_reg[0x8];
7311 u8 ob_bias[0x8];
7312
Matan Barakb4ff3a32016-02-09 14:57:42 +02007313 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314};
7315
7316struct mlx5_ifc_slrg_reg_bits {
7317 u8 status[0x4];
7318 u8 version[0x4];
7319 u8 local_port[0x8];
7320 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007323 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007324
7325 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327 u8 grade_lane_speed[0x4];
7328
7329 u8 grade_version[0x8];
7330 u8 grade[0x18];
7331
Matan Barakb4ff3a32016-02-09 14:57:42 +02007332 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007333 u8 height_grade_type[0x4];
7334 u8 height_grade[0x18];
7335
7336 u8 height_dz[0x10];
7337 u8 height_dv[0x10];
7338
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340 u8 height_sigma[0x10];
7341
Matan Barakb4ff3a32016-02-09 14:57:42 +02007342 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007343
Matan Barakb4ff3a32016-02-09 14:57:42 +02007344 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007345 u8 phase_grade_type[0x4];
7346 u8 phase_grade[0x18];
7347
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007350 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007351 u8 phase_eo_neg[0x8];
7352
7353 u8 ffe_set_tested[0x10];
7354 u8 test_errors_per_lane[0x10];
7355};
7356
7357struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007358 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007359 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007361
Matan Barakb4ff3a32016-02-09 14:57:42 +02007362 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007363 u8 vl_hw_cap[0x4];
7364
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366 u8 vl_admin[0x4];
7367
Matan Barakb4ff3a32016-02-09 14:57:42 +02007368 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007369 u8 vl_operational[0x4];
7370};
7371
7372struct mlx5_ifc_pude_reg_bits {
7373 u8 swid[0x8];
7374 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007375 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007376 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378 u8 oper_status[0x4];
7379
Matan Barakb4ff3a32016-02-09 14:57:42 +02007380 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007381};
7382
7383struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007384 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007385 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007386 u8 an_disable_cap[0x1];
7387 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390 u8 proto_mask[0x3];
7391
Saeed Mahameed74862162016-06-09 15:11:34 +03007392 u8 an_status[0x4];
7393 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394
7395 u8 eth_proto_capability[0x20];
7396
7397 u8 ib_link_width_capability[0x10];
7398 u8 ib_proto_capability[0x10];
7399
Matan Barakb4ff3a32016-02-09 14:57:42 +02007400 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007401
7402 u8 eth_proto_admin[0x20];
7403
7404 u8 ib_link_width_admin[0x10];
7405 u8 ib_proto_admin[0x10];
7406
Matan Barakb4ff3a32016-02-09 14:57:42 +02007407 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007408
7409 u8 eth_proto_oper[0x20];
7410
7411 u8 ib_link_width_oper[0x10];
7412 u8 ib_proto_oper[0x10];
7413
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007414 u8 reserved_at_160[0x1c];
7415 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416
7417 u8 eth_proto_lp_advertise[0x20];
7418
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420};
7421
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007422struct mlx5_ifc_mlcr_reg_bits {
7423 u8 reserved_at_0[0x8];
7424 u8 local_port[0x8];
7425 u8 reserved_at_10[0x20];
7426
7427 u8 beacon_duration[0x10];
7428 u8 reserved_at_40[0x10];
7429
7430 u8 beacon_remain[0x10];
7431};
7432
Saeed Mahameede2816822015-05-28 22:28:40 +03007433struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007434 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007435
7436 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007437 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007438 u8 repetitions_mode[0x4];
7439 u8 num_of_repetitions[0x8];
7440
7441 u8 grade_version[0x8];
7442 u8 height_grade_type[0x4];
7443 u8 phase_grade_type[0x4];
7444 u8 height_grade_weight[0x8];
7445 u8 phase_grade_weight[0x8];
7446
7447 u8 gisim_measure_bits[0x10];
7448 u8 adaptive_tap_measure_bits[0x10];
7449
7450 u8 ber_bath_high_error_threshold[0x10];
7451 u8 ber_bath_mid_error_threshold[0x10];
7452
7453 u8 ber_bath_low_error_threshold[0x10];
7454 u8 one_ratio_high_threshold[0x10];
7455
7456 u8 one_ratio_high_mid_threshold[0x10];
7457 u8 one_ratio_low_mid_threshold[0x10];
7458
7459 u8 one_ratio_low_threshold[0x10];
7460 u8 ndeo_error_threshold[0x10];
7461
7462 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007463 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007464 u8 mix90_phase_for_voltage_bath[0x8];
7465
7466 u8 mixer_offset_start[0x10];
7467 u8 mixer_offset_end[0x10];
7468
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470 u8 ber_test_time[0xb];
7471};
7472
7473struct mlx5_ifc_pspa_reg_bits {
7474 u8 swid[0x8];
7475 u8 local_port[0x8];
7476 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007477 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007478
Matan Barakb4ff3a32016-02-09 14:57:42 +02007479 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007480};
7481
7482struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007483 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007484 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007485 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007486 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488 u8 mode[0x2];
7489
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493 u8 min_threshold[0x10];
7494
Matan Barakb4ff3a32016-02-09 14:57:42 +02007495 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007496 u8 max_threshold[0x10];
7497
Matan Barakb4ff3a32016-02-09 14:57:42 +02007498 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007499 u8 mark_probability_denominator[0x10];
7500
Matan Barakb4ff3a32016-02-09 14:57:42 +02007501 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007502};
7503
7504struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508
Matan Barakb4ff3a32016-02-09 14:57:42 +02007509 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007510
Matan Barakb4ff3a32016-02-09 14:57:42 +02007511 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007512 u8 wrps_admin[0x4];
7513
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515 u8 wrps_status[0x4];
7516
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007519 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007520 u8 down_threshold[0x8];
7521
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523
Matan Barakb4ff3a32016-02-09 14:57:42 +02007524 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007525 u8 srps_admin[0x4];
7526
Matan Barakb4ff3a32016-02-09 14:57:42 +02007527 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007528 u8 srps_status[0x4];
7529
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531};
7532
7533struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007534 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007535 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537
Matan Barakb4ff3a32016-02-09 14:57:42 +02007538 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007539 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007540 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007541 u8 lb_en[0x8];
7542};
7543
7544struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007545 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007547 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007548
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550
7551 u8 port_profile_mode[0x8];
7552 u8 static_port_profile[0x8];
7553 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555
7556 u8 retransmission_active[0x8];
7557 u8 fec_mode_active[0x18];
7558
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560};
7561
7562struct mlx5_ifc_ppcnt_reg_bits {
7563 u8 swid[0x8];
7564 u8 local_port[0x8];
7565 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567 u8 grp[0x6];
7568
7569 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571 u8 prio_tc[0x3];
7572
7573 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7574};
7575
Gal Pressman8ed1a632016-11-17 13:46:01 +02007576struct mlx5_ifc_mpcnt_reg_bits {
7577 u8 reserved_at_0[0x8];
7578 u8 pcie_index[0x8];
7579 u8 reserved_at_10[0xa];
7580 u8 grp[0x6];
7581
7582 u8 clr[0x1];
7583 u8 reserved_at_21[0x1f];
7584
7585 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7586};
7587
Saeed Mahameede2816822015-05-28 22:28:40 +03007588struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007591 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007592 u8 local_port[0x8];
7593 u8 mac_47_32[0x10];
7594
7595 u8 mac_31_0[0x20];
7596
Matan Barakb4ff3a32016-02-09 14:57:42 +02007597 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598};
7599
7600struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007601 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007602 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007603 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007604
7605 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607
7608 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610
7611 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007612 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007613};
7614
7615struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619
Matan Barakb4ff3a32016-02-09 14:57:42 +02007620 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007621 u8 attenuation_5g[0x8];
7622
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624 u8 attenuation_7g[0x8];
7625
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627 u8 attenuation_12g[0x8];
7628};
7629
7630struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007633 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007634 u8 module_status[0x4];
7635
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637};
7638
7639struct mlx5_ifc_pmpc_reg_bits {
7640 u8 module_state_updated[32][0x8];
7641};
7642
7643struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645 u8 mlpn_status[0x4];
7646 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648
7649 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007650 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007651};
7652
7653struct mlx5_ifc_pmlp_reg_bits {
7654 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 width[0x8];
7659
7660 u8 lane0_module_mapping[0x20];
7661
7662 u8 lane1_module_mapping[0x20];
7663
7664 u8 lane2_module_mapping[0x20];
7665
7666 u8 lane3_module_mapping[0x20];
7667
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669};
7670
7671struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007674 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007675 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677 u8 oper_status[0x4];
7678
7679 u8 ase[0x1];
7680 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007681 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007682 u8 e[0x2];
7683
Matan Barakb4ff3a32016-02-09 14:57:42 +02007684 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007685};
7686
7687struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007688 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007689 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693
Matan Barakb4ff3a32016-02-09 14:57:42 +02007694 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007695 u8 lane_speed[0x10];
7696
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698 u8 lpbf[0x1];
7699 u8 fec_mode_policy[0x8];
7700
7701 u8 retransmission_capability[0x8];
7702 u8 fec_mode_capability[0x18];
7703
7704 u8 retransmission_support_admin[0x8];
7705 u8 fec_mode_support_admin[0x18];
7706
7707 u8 retransmission_request_admin[0x8];
7708 u8 fec_mode_request_admin[0x18];
7709
Matan Barakb4ff3a32016-02-09 14:57:42 +02007710 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007711};
7712
7713struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717 u8 ib_port[0x8];
7718
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720};
7721
7722struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007723 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007724 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007725 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007726 u8 lbf_mode[0x3];
7727
Matan Barakb4ff3a32016-02-09 14:57:42 +02007728 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007729};
7730
7731struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007732 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007733 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007734 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007735
7736 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740};
7741
7742struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746
Matan Barakb4ff3a32016-02-09 14:57:42 +02007747 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007748
7749 u8 port_filter[8][0x20];
7750
7751 u8 port_filter_update_en[8][0x20];
7752};
7753
7754struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007757 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007758
7759 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007760 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007761 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007762 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007763 u8 prio_mask_rx[0x8];
7764
7765 u8 pptx[0x1];
7766 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007767 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007768 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770
7771 u8 pprx[0x1];
7772 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007775 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007776
Matan Barakb4ff3a32016-02-09 14:57:42 +02007777 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007778};
7779
7780struct mlx5_ifc_pelc_reg_bits {
7781 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007784 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007785
7786 u8 op_admin[0x8];
7787 u8 op_capability[0x8];
7788 u8 op_request[0x8];
7789 u8 op_active[0x8];
7790
7791 u8 admin[0x40];
7792
7793 u8 capability[0x40];
7794
7795 u8 request[0x40];
7796
7797 u8 active[0x40];
7798
Matan Barakb4ff3a32016-02-09 14:57:42 +02007799 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007800};
7801
7802struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007803 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007804 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007805 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007806
Matan Barakb4ff3a32016-02-09 14:57:42 +02007807 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007808 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007809 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007810
Matan Barakb4ff3a32016-02-09 14:57:42 +02007811 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007812 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007813 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007814 u8 error_type[0x8];
7815};
7816
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007817struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007818 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007819
Gal Pressman2dba0792017-06-18 14:56:45 +03007820 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007821 u8 ptys_connector_type[0x1];
7822 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007823 u8 ppcnt_discard_group[0x1];
7824 u8 ppcnt_statistical_group[0x1];
7825};
7826
7827struct mlx5_ifc_pcam_reg_bits {
7828 u8 reserved_at_0[0x8];
7829 u8 feature_group[0x8];
7830 u8 reserved_at_10[0x8];
7831 u8 access_reg_group[0x8];
7832
7833 u8 reserved_at_20[0x20];
7834
7835 union {
7836 u8 reserved_at_0[0x80];
7837 } port_access_reg_cap_mask;
7838
7839 u8 reserved_at_c0[0x80];
7840
7841 union {
7842 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7843 u8 reserved_at_0[0x80];
7844 } feature_cap_mask;
7845
7846 u8 reserved_at_1c0[0xc0];
7847};
7848
7849struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007850 u8 reserved_at_0[0x7b];
7851 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007852 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007853 u8 mtpps_enh_out_per_adj[0x1];
7854 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007855 u8 pcie_performance_group[0x1];
7856};
7857
Or Gerlitz0ab87742017-06-11 15:25:38 +03007858struct mlx5_ifc_mcam_access_reg_bits {
7859 u8 reserved_at_0[0x1c];
7860 u8 mcda[0x1];
7861 u8 mcc[0x1];
7862 u8 mcqi[0x1];
7863 u8 reserved_at_1f[0x1];
7864
7865 u8 regs_95_to_64[0x20];
7866 u8 regs_63_to_32[0x20];
7867 u8 regs_31_to_0[0x20];
7868};
7869
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007870struct mlx5_ifc_mcam_reg_bits {
7871 u8 reserved_at_0[0x8];
7872 u8 feature_group[0x8];
7873 u8 reserved_at_10[0x8];
7874 u8 access_reg_group[0x8];
7875
7876 u8 reserved_at_20[0x20];
7877
7878 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007879 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007880 u8 reserved_at_0[0x80];
7881 } mng_access_reg_cap_mask;
7882
7883 u8 reserved_at_c0[0x80];
7884
7885 union {
7886 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7887 u8 reserved_at_0[0x80];
7888 } mng_feature_cap_mask;
7889
7890 u8 reserved_at_1c0[0x80];
7891};
7892
Saeed Mahameede2816822015-05-28 22:28:40 +03007893struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007894 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007895 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897
7898 u8 port_capability_mask[4][0x20];
7899};
7900
7901struct mlx5_ifc_paos_reg_bits {
7902 u8 swid[0x8];
7903 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007906 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007907 u8 oper_status[0x4];
7908
7909 u8 ase[0x1];
7910 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007911 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007912 u8 e[0x2];
7913
Matan Barakb4ff3a32016-02-09 14:57:42 +02007914 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007915};
7916
7917struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007918 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007919 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007920 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007921 u8 opamp_group_type[0x4];
7922
7923 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007924 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007925 u8 num_of_indices[0xc];
7926
7927 u8 index_data[18][0x10];
7928};
7929
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007930struct mlx5_ifc_pcmr_reg_bits {
7931 u8 reserved_at_0[0x8];
7932 u8 local_port[0x8];
7933 u8 reserved_at_10[0x2e];
7934 u8 fcs_cap[0x1];
7935 u8 reserved_at_3f[0x1f];
7936 u8 fcs_chk[0x1];
7937 u8 reserved_at_5f[0x1];
7938};
7939
Saeed Mahameede2816822015-05-28 22:28:40 +03007940struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007941 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007942 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007943 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007944 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007945 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007946 u8 module[0x8];
7947};
7948
7949struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007950 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007951 u8 lossy[0x1];
7952 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007953 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007954 u8 size[0xc];
7955
7956 u8 xoff_threshold[0x10];
7957 u8 xon_threshold[0x10];
7958};
7959
7960struct mlx5_ifc_set_node_in_bits {
7961 u8 node_description[64][0x8];
7962};
7963
7964struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007965 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007966 u8 power_settings_level[0x8];
7967
Matan Barakb4ff3a32016-02-09 14:57:42 +02007968 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007969};
7970
7971struct mlx5_ifc_register_host_endianness_bits {
7972 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007973 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007974
Matan Barakb4ff3a32016-02-09 14:57:42 +02007975 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007976};
7977
7978struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007979 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007980
7981 u8 mkey[0x20];
7982
7983 u8 addressh_63_32[0x20];
7984
7985 u8 addressl_31_0[0x20];
7986};
7987
7988struct mlx5_ifc_ud_adrs_vector_bits {
7989 u8 dc_key[0x40];
7990
7991 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007992 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007993 u8 destination_qp_dct[0x18];
7994
7995 u8 static_rate[0x4];
7996 u8 sl_eth_prio[0x4];
7997 u8 fl[0x1];
7998 u8 mlid[0x7];
7999 u8 rlid_udp_sport[0x10];
8000
Matan Barakb4ff3a32016-02-09 14:57:42 +02008001 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008002
8003 u8 rmac_47_16[0x20];
8004
8005 u8 rmac_15_0[0x10];
8006 u8 tclass[0x8];
8007 u8 hop_limit[0x8];
8008
Matan Barakb4ff3a32016-02-09 14:57:42 +02008009 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008010 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008011 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008012 u8 src_addr_index[0x8];
8013 u8 flow_label[0x14];
8014
8015 u8 rgid_rip[16][0x8];
8016};
8017
8018struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008019 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008020 u8 function_id[0x10];
8021
8022 u8 num_pages[0x20];
8023
Matan Barakb4ff3a32016-02-09 14:57:42 +02008024 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008025};
8026
8027struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008028 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008029 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008030 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008031 u8 event_sub_type[0x8];
8032
Matan Barakb4ff3a32016-02-09 14:57:42 +02008033 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008034
8035 union mlx5_ifc_event_auto_bits event_data;
8036
Matan Barakb4ff3a32016-02-09 14:57:42 +02008037 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008038 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008039 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008040 u8 owner[0x1];
8041};
8042
8043enum {
8044 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8045};
8046
8047struct mlx5_ifc_cmd_queue_entry_bits {
8048 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008050
8051 u8 input_length[0x20];
8052
8053 u8 input_mailbox_pointer_63_32[0x20];
8054
8055 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008056 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008057
8058 u8 command_input_inline_data[16][0x8];
8059
8060 u8 command_output_inline_data[16][0x8];
8061
8062 u8 output_mailbox_pointer_63_32[0x20];
8063
8064 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008065 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008066
8067 u8 output_length[0x20];
8068
8069 u8 token[0x8];
8070 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008071 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008072 u8 status[0x7];
8073 u8 ownership[0x1];
8074};
8075
8076struct mlx5_ifc_cmd_out_bits {
8077 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008078 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008079
8080 u8 syndrome[0x20];
8081
8082 u8 command_output[0x20];
8083};
8084
8085struct mlx5_ifc_cmd_in_bits {
8086 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008088
Matan Barakb4ff3a32016-02-09 14:57:42 +02008089 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008090 u8 op_mod[0x10];
8091
8092 u8 command[0][0x20];
8093};
8094
8095struct mlx5_ifc_cmd_if_box_bits {
8096 u8 mailbox_data[512][0x8];
8097
Matan Barakb4ff3a32016-02-09 14:57:42 +02008098 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008099
8100 u8 next_pointer_63_32[0x20];
8101
8102 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008103 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008104
8105 u8 block_number[0x20];
8106
Matan Barakb4ff3a32016-02-09 14:57:42 +02008107 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008108 u8 token[0x8];
8109 u8 ctrl_signature[0x8];
8110 u8 signature[0x8];
8111};
8112
8113struct mlx5_ifc_mtt_bits {
8114 u8 ptag_63_32[0x20];
8115
8116 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008117 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008118 u8 wr_en[0x1];
8119 u8 rd_en[0x1];
8120};
8121
Tariq Toukan928cfe82016-02-22 18:17:29 +02008122struct mlx5_ifc_query_wol_rol_out_bits {
8123 u8 status[0x8];
8124 u8 reserved_at_8[0x18];
8125
8126 u8 syndrome[0x20];
8127
8128 u8 reserved_at_40[0x10];
8129 u8 rol_mode[0x8];
8130 u8 wol_mode[0x8];
8131
8132 u8 reserved_at_60[0x20];
8133};
8134
8135struct mlx5_ifc_query_wol_rol_in_bits {
8136 u8 opcode[0x10];
8137 u8 reserved_at_10[0x10];
8138
8139 u8 reserved_at_20[0x10];
8140 u8 op_mod[0x10];
8141
8142 u8 reserved_at_40[0x40];
8143};
8144
8145struct mlx5_ifc_set_wol_rol_out_bits {
8146 u8 status[0x8];
8147 u8 reserved_at_8[0x18];
8148
8149 u8 syndrome[0x20];
8150
8151 u8 reserved_at_40[0x40];
8152};
8153
8154struct mlx5_ifc_set_wol_rol_in_bits {
8155 u8 opcode[0x10];
8156 u8 reserved_at_10[0x10];
8157
8158 u8 reserved_at_20[0x10];
8159 u8 op_mod[0x10];
8160
8161 u8 rol_mode_valid[0x1];
8162 u8 wol_mode_valid[0x1];
8163 u8 reserved_at_42[0xe];
8164 u8 rol_mode[0x8];
8165 u8 wol_mode[0x8];
8166
8167 u8 reserved_at_60[0x20];
8168};
8169
Saeed Mahameede2816822015-05-28 22:28:40 +03008170enum {
8171 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8172 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8173 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8174};
8175
8176enum {
8177 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8178 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8179 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8180};
8181
8182enum {
8183 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8184 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8185 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8186 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8187 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8188 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8189 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8190 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8191 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8192 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8193 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8194};
8195
8196struct mlx5_ifc_initial_seg_bits {
8197 u8 fw_rev_minor[0x10];
8198 u8 fw_rev_major[0x10];
8199
8200 u8 cmd_interface_rev[0x10];
8201 u8 fw_rev_subminor[0x10];
8202
Matan Barakb4ff3a32016-02-09 14:57:42 +02008203 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008204
8205 u8 cmdq_phy_addr_63_32[0x20];
8206
8207 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008208 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008209 u8 nic_interface[0x2];
8210 u8 log_cmdq_size[0x4];
8211 u8 log_cmdq_stride[0x4];
8212
8213 u8 command_doorbell_vector[0x20];
8214
Matan Barakb4ff3a32016-02-09 14:57:42 +02008215 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008216
8217 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008218 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008219 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008220 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008221
8222 struct mlx5_ifc_health_buffer_bits health_buffer;
8223
8224 u8 no_dram_nic_offset[0x20];
8225
Matan Barakb4ff3a32016-02-09 14:57:42 +02008226 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008227
Matan Barakb4ff3a32016-02-09 14:57:42 +02008228 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008229 u8 clear_int[0x1];
8230
8231 u8 health_syndrome[0x8];
8232 u8 health_counter[0x18];
8233
Matan Barakb4ff3a32016-02-09 14:57:42 +02008234 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008235};
8236
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008237struct mlx5_ifc_mtpps_reg_bits {
8238 u8 reserved_at_0[0xc];
8239 u8 cap_number_of_pps_pins[0x4];
8240 u8 reserved_at_10[0x4];
8241 u8 cap_max_num_of_pps_in_pins[0x4];
8242 u8 reserved_at_18[0x4];
8243 u8 cap_max_num_of_pps_out_pins[0x4];
8244
8245 u8 reserved_at_20[0x24];
8246 u8 cap_pin_3_mode[0x4];
8247 u8 reserved_at_48[0x4];
8248 u8 cap_pin_2_mode[0x4];
8249 u8 reserved_at_50[0x4];
8250 u8 cap_pin_1_mode[0x4];
8251 u8 reserved_at_58[0x4];
8252 u8 cap_pin_0_mode[0x4];
8253
8254 u8 reserved_at_60[0x4];
8255 u8 cap_pin_7_mode[0x4];
8256 u8 reserved_at_68[0x4];
8257 u8 cap_pin_6_mode[0x4];
8258 u8 reserved_at_70[0x4];
8259 u8 cap_pin_5_mode[0x4];
8260 u8 reserved_at_78[0x4];
8261 u8 cap_pin_4_mode[0x4];
8262
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008263 u8 field_select[0x20];
8264 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008265
8266 u8 enable[0x1];
8267 u8 reserved_at_101[0xb];
8268 u8 pattern[0x4];
8269 u8 reserved_at_110[0x4];
8270 u8 pin_mode[0x4];
8271 u8 pin[0x8];
8272
8273 u8 reserved_at_120[0x20];
8274
8275 u8 time_stamp[0x40];
8276
8277 u8 out_pulse_duration[0x10];
8278 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008279 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008280
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008281 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008282};
8283
8284struct mlx5_ifc_mtppse_reg_bits {
8285 u8 reserved_at_0[0x18];
8286 u8 pin[0x8];
8287 u8 event_arm[0x1];
8288 u8 reserved_at_21[0x1b];
8289 u8 event_generation_mode[0x4];
8290 u8 reserved_at_40[0x40];
8291};
8292
Or Gerlitz47176282017-04-18 13:35:39 +03008293struct mlx5_ifc_mcqi_cap_bits {
8294 u8 supported_info_bitmask[0x20];
8295
8296 u8 component_size[0x20];
8297
8298 u8 max_component_size[0x20];
8299
8300 u8 log_mcda_word_size[0x4];
8301 u8 reserved_at_64[0xc];
8302 u8 mcda_max_write_size[0x10];
8303
8304 u8 rd_en[0x1];
8305 u8 reserved_at_81[0x1];
8306 u8 match_chip_id[0x1];
8307 u8 match_psid[0x1];
8308 u8 check_user_timestamp[0x1];
8309 u8 match_base_guid_mac[0x1];
8310 u8 reserved_at_86[0x1a];
8311};
8312
8313struct mlx5_ifc_mcqi_reg_bits {
8314 u8 read_pending_component[0x1];
8315 u8 reserved_at_1[0xf];
8316 u8 component_index[0x10];
8317
8318 u8 reserved_at_20[0x20];
8319
8320 u8 reserved_at_40[0x1b];
8321 u8 info_type[0x5];
8322
8323 u8 info_size[0x20];
8324
8325 u8 offset[0x20];
8326
8327 u8 reserved_at_a0[0x10];
8328 u8 data_size[0x10];
8329
8330 u8 data[0][0x20];
8331};
8332
8333struct mlx5_ifc_mcc_reg_bits {
8334 u8 reserved_at_0[0x4];
8335 u8 time_elapsed_since_last_cmd[0xc];
8336 u8 reserved_at_10[0x8];
8337 u8 instruction[0x8];
8338
8339 u8 reserved_at_20[0x10];
8340 u8 component_index[0x10];
8341
8342 u8 reserved_at_40[0x8];
8343 u8 update_handle[0x18];
8344
8345 u8 handle_owner_type[0x4];
8346 u8 handle_owner_host_id[0x4];
8347 u8 reserved_at_68[0x1];
8348 u8 control_progress[0x7];
8349 u8 error_code[0x8];
8350 u8 reserved_at_78[0x4];
8351 u8 control_state[0x4];
8352
8353 u8 component_size[0x20];
8354
8355 u8 reserved_at_a0[0x60];
8356};
8357
8358struct mlx5_ifc_mcda_reg_bits {
8359 u8 reserved_at_0[0x8];
8360 u8 update_handle[0x18];
8361
8362 u8 offset[0x20];
8363
8364 u8 reserved_at_40[0x10];
8365 u8 size[0x10];
8366
8367 u8 reserved_at_60[0x20];
8368
8369 u8 data[0][0x20];
8370};
8371
Saeed Mahameede2816822015-05-28 22:28:40 +03008372union mlx5_ifc_ports_control_registers_document_bits {
8373 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8374 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8375 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8376 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8377 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8378 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8379 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8380 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8381 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8382 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8383 struct mlx5_ifc_paos_reg_bits paos_reg;
8384 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8385 struct mlx5_ifc_peir_reg_bits peir_reg;
8386 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8387 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008388 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008389 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8390 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8391 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8392 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8393 struct mlx5_ifc_plib_reg_bits plib_reg;
8394 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8395 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8396 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8397 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8398 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8399 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8400 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8401 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8402 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8403 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008404 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008405 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8406 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8407 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8408 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8409 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8410 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8411 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008412 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008413 struct mlx5_ifc_pude_reg_bits pude_reg;
8414 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8415 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8416 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008417 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8418 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008419 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008420 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8421 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008422 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8423 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8424 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008425 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008426};
8427
8428union mlx5_ifc_debug_enhancements_document_bits {
8429 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008430 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008431};
8432
8433union mlx5_ifc_uplink_pci_interface_document_bits {
8434 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008435 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008436};
8437
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008438struct mlx5_ifc_set_flow_table_root_out_bits {
8439 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008440 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008441
8442 u8 syndrome[0x20];
8443
Matan Barakb4ff3a32016-02-09 14:57:42 +02008444 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008445};
8446
8447struct mlx5_ifc_set_flow_table_root_in_bits {
8448 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008449 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008450
Matan Barakb4ff3a32016-02-09 14:57:42 +02008451 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008452 u8 op_mod[0x10];
8453
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008454 u8 other_vport[0x1];
8455 u8 reserved_at_41[0xf];
8456 u8 vport_number[0x10];
8457
8458 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008459
8460 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008461 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008462
Matan Barakb4ff3a32016-02-09 14:57:42 +02008463 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008464 u8 table_id[0x18];
8465
Erez Shitrit500a3d02017-04-13 06:36:51 +03008466 u8 reserved_at_c0[0x8];
8467 u8 underlay_qpn[0x18];
8468 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008469};
8470
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008471enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008472 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8473 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008474};
8475
8476struct mlx5_ifc_modify_flow_table_out_bits {
8477 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008478 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008479
8480 u8 syndrome[0x20];
8481
Matan Barakb4ff3a32016-02-09 14:57:42 +02008482 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008483};
8484
8485struct mlx5_ifc_modify_flow_table_in_bits {
8486 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008487 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008488
Matan Barakb4ff3a32016-02-09 14:57:42 +02008489 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008490 u8 op_mod[0x10];
8491
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008492 u8 other_vport[0x1];
8493 u8 reserved_at_41[0xf];
8494 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008495
Matan Barakb4ff3a32016-02-09 14:57:42 +02008496 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008497 u8 modify_field_select[0x10];
8498
8499 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008500 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008501
Matan Barakb4ff3a32016-02-09 14:57:42 +02008502 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008503 u8 table_id[0x18];
8504
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008505 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008506};
8507
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008508struct mlx5_ifc_ets_tcn_config_reg_bits {
8509 u8 g[0x1];
8510 u8 b[0x1];
8511 u8 r[0x1];
8512 u8 reserved_at_3[0x9];
8513 u8 group[0x4];
8514 u8 reserved_at_10[0x9];
8515 u8 bw_allocation[0x7];
8516
8517 u8 reserved_at_20[0xc];
8518 u8 max_bw_units[0x4];
8519 u8 reserved_at_30[0x8];
8520 u8 max_bw_value[0x8];
8521};
8522
8523struct mlx5_ifc_ets_global_config_reg_bits {
8524 u8 reserved_at_0[0x2];
8525 u8 r[0x1];
8526 u8 reserved_at_3[0x1d];
8527
8528 u8 reserved_at_20[0xc];
8529 u8 max_bw_units[0x4];
8530 u8 reserved_at_30[0x8];
8531 u8 max_bw_value[0x8];
8532};
8533
8534struct mlx5_ifc_qetc_reg_bits {
8535 u8 reserved_at_0[0x8];
8536 u8 port_number[0x8];
8537 u8 reserved_at_10[0x30];
8538
8539 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8540 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8541};
8542
8543struct mlx5_ifc_qtct_reg_bits {
8544 u8 reserved_at_0[0x8];
8545 u8 port_number[0x8];
8546 u8 reserved_at_10[0xd];
8547 u8 prio[0x3];
8548
8549 u8 reserved_at_20[0x1d];
8550 u8 tclass[0x3];
8551};
8552
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008553struct mlx5_ifc_mcia_reg_bits {
8554 u8 l[0x1];
8555 u8 reserved_at_1[0x7];
8556 u8 module[0x8];
8557 u8 reserved_at_10[0x8];
8558 u8 status[0x8];
8559
8560 u8 i2c_device_address[0x8];
8561 u8 page_number[0x8];
8562 u8 device_address[0x10];
8563
8564 u8 reserved_at_40[0x10];
8565 u8 size[0x10];
8566
8567 u8 reserved_at_60[0x20];
8568
8569 u8 dword_0[0x20];
8570 u8 dword_1[0x20];
8571 u8 dword_2[0x20];
8572 u8 dword_3[0x20];
8573 u8 dword_4[0x20];
8574 u8 dword_5[0x20];
8575 u8 dword_6[0x20];
8576 u8 dword_7[0x20];
8577 u8 dword_8[0x20];
8578 u8 dword_9[0x20];
8579 u8 dword_10[0x20];
8580 u8 dword_11[0x20];
8581};
8582
Saeed Mahameed74862162016-06-09 15:11:34 +03008583struct mlx5_ifc_dcbx_param_bits {
8584 u8 dcbx_cee_cap[0x1];
8585 u8 dcbx_ieee_cap[0x1];
8586 u8 dcbx_standby_cap[0x1];
8587 u8 reserved_at_0[0x5];
8588 u8 port_number[0x8];
8589 u8 reserved_at_10[0xa];
8590 u8 max_application_table_size[6];
8591 u8 reserved_at_20[0x15];
8592 u8 version_oper[0x3];
8593 u8 reserved_at_38[5];
8594 u8 version_admin[0x3];
8595 u8 willing_admin[0x1];
8596 u8 reserved_at_41[0x3];
8597 u8 pfc_cap_oper[0x4];
8598 u8 reserved_at_48[0x4];
8599 u8 pfc_cap_admin[0x4];
8600 u8 reserved_at_50[0x4];
8601 u8 num_of_tc_oper[0x4];
8602 u8 reserved_at_58[0x4];
8603 u8 num_of_tc_admin[0x4];
8604 u8 remote_willing[0x1];
8605 u8 reserved_at_61[3];
8606 u8 remote_pfc_cap[4];
8607 u8 reserved_at_68[0x14];
8608 u8 remote_num_of_tc[0x4];
8609 u8 reserved_at_80[0x18];
8610 u8 error[0x8];
8611 u8 reserved_at_a0[0x160];
8612};
Aviv Heller84df61e2016-05-10 13:47:50 +03008613
8614struct mlx5_ifc_lagc_bits {
8615 u8 reserved_at_0[0x1d];
8616 u8 lag_state[0x3];
8617
8618 u8 reserved_at_20[0x14];
8619 u8 tx_remap_affinity_2[0x4];
8620 u8 reserved_at_38[0x4];
8621 u8 tx_remap_affinity_1[0x4];
8622};
8623
8624struct mlx5_ifc_create_lag_out_bits {
8625 u8 status[0x8];
8626 u8 reserved_at_8[0x18];
8627
8628 u8 syndrome[0x20];
8629
8630 u8 reserved_at_40[0x40];
8631};
8632
8633struct mlx5_ifc_create_lag_in_bits {
8634 u8 opcode[0x10];
8635 u8 reserved_at_10[0x10];
8636
8637 u8 reserved_at_20[0x10];
8638 u8 op_mod[0x10];
8639
8640 struct mlx5_ifc_lagc_bits ctx;
8641};
8642
8643struct mlx5_ifc_modify_lag_out_bits {
8644 u8 status[0x8];
8645 u8 reserved_at_8[0x18];
8646
8647 u8 syndrome[0x20];
8648
8649 u8 reserved_at_40[0x40];
8650};
8651
8652struct mlx5_ifc_modify_lag_in_bits {
8653 u8 opcode[0x10];
8654 u8 reserved_at_10[0x10];
8655
8656 u8 reserved_at_20[0x10];
8657 u8 op_mod[0x10];
8658
8659 u8 reserved_at_40[0x20];
8660 u8 field_select[0x20];
8661
8662 struct mlx5_ifc_lagc_bits ctx;
8663};
8664
8665struct mlx5_ifc_query_lag_out_bits {
8666 u8 status[0x8];
8667 u8 reserved_at_8[0x18];
8668
8669 u8 syndrome[0x20];
8670
8671 u8 reserved_at_40[0x40];
8672
8673 struct mlx5_ifc_lagc_bits ctx;
8674};
8675
8676struct mlx5_ifc_query_lag_in_bits {
8677 u8 opcode[0x10];
8678 u8 reserved_at_10[0x10];
8679
8680 u8 reserved_at_20[0x10];
8681 u8 op_mod[0x10];
8682
8683 u8 reserved_at_40[0x40];
8684};
8685
8686struct mlx5_ifc_destroy_lag_out_bits {
8687 u8 status[0x8];
8688 u8 reserved_at_8[0x18];
8689
8690 u8 syndrome[0x20];
8691
8692 u8 reserved_at_40[0x40];
8693};
8694
8695struct mlx5_ifc_destroy_lag_in_bits {
8696 u8 opcode[0x10];
8697 u8 reserved_at_10[0x10];
8698
8699 u8 reserved_at_20[0x10];
8700 u8 op_mod[0x10];
8701
8702 u8 reserved_at_40[0x40];
8703};
8704
8705struct mlx5_ifc_create_vport_lag_out_bits {
8706 u8 status[0x8];
8707 u8 reserved_at_8[0x18];
8708
8709 u8 syndrome[0x20];
8710
8711 u8 reserved_at_40[0x40];
8712};
8713
8714struct mlx5_ifc_create_vport_lag_in_bits {
8715 u8 opcode[0x10];
8716 u8 reserved_at_10[0x10];
8717
8718 u8 reserved_at_20[0x10];
8719 u8 op_mod[0x10];
8720
8721 u8 reserved_at_40[0x40];
8722};
8723
8724struct mlx5_ifc_destroy_vport_lag_out_bits {
8725 u8 status[0x8];
8726 u8 reserved_at_8[0x18];
8727
8728 u8 syndrome[0x20];
8729
8730 u8 reserved_at_40[0x40];
8731};
8732
8733struct mlx5_ifc_destroy_vport_lag_in_bits {
8734 u8 opcode[0x10];
8735 u8 reserved_at_10[0x10];
8736
8737 u8 reserved_at_20[0x10];
8738 u8 op_mod[0x10];
8739
8740 u8 reserved_at_40[0x40];
8741};
8742
Eli Cohend29b7962014-10-02 12:19:43 +03008743#endif /* MLX5_IFC_H */