blob: 9bc4c9f1a6c206f15167ffb7e595dda64b717133 [file] [log] [blame]
Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
Alexander Duyckf9f082a2016-06-16 12:22:57 -070027#include <net/udp_tunnel.h>
Yuval Mintze712d522015-10-26 11:02:27 +020028#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
Yuval Mintz5abd7e922016-02-24 16:52:50 +020042static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
Yuval Mintze712d522015-10-26 11:02:27 +020044
Yuval Mintz5abd7e922016-02-24 16:52:50 +020045MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
Yuval Mintze712d522015-10-26 11:02:27 +020046MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020056#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020057#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
Yuval Mintzfefb0202016-05-11 16:36:19 +030061#define CHIP_NUM_57980S_IOV 0x1664
Yuval Mintze712d522015-10-26 11:02:27 +020062
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
Yuval Mintzfefb0202016-05-11 16:36:19 +030070#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
Yuval Mintze712d522015-10-26 11:02:27 +020071#endif
72
Yuval Mintzfefb0202016-05-11 16:36:19 +030073enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
Yuval Mintze712d522015-10-26 11:02:27 +020078static const struct pci_device_id qede_pci_tbl[] = {
Yuval Mintzfefb0202016-05-11 16:36:19 +030079 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020085#ifdef CONFIG_QED_SRIOV
Yuval Mintzfefb0202016-05-11 16:36:19 +030086 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020087#endif
Yuval Mintze712d522015-10-26 11:02:27 +020088 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +020098static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200100static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +0200101
Yuval Mintzfefb0202016-05-11 16:36:19 +0300102#ifdef CONFIG_QED_SRIOV
Yuval Mintz08feecd2016-05-11 16:36:20 +0300103static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
104{
105 struct qede_dev *edev = netdev_priv(ndev);
106
107 if (vlan > 4095) {
108 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
109 return -EINVAL;
110 }
111
112 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
113 vlan, vf);
114
115 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
116}
117
Yuval Mintzeff16962016-05-11 16:36:21 +0300118static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
119{
120 struct qede_dev *edev = netdev_priv(ndev);
121
122 DP_VERBOSE(edev, QED_MSG_IOV,
123 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
124 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
125
126 if (!is_valid_ether_addr(mac)) {
127 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
128 return -EINVAL;
129 }
130
131 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
132}
133
Yuval Mintzfefb0202016-05-11 16:36:19 +0300134static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
135{
136 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300137 struct qed_dev_info *qed_info = &edev->dev_info.common;
138 int rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300139
140 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
141
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300142 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
143
144 /* Enable/Disable Tx switching for PF */
145 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
146 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
147 struct qed_update_vport_params params;
148
149 memset(&params, 0, sizeof(params));
150 params.vport_id = 0;
151 params.update_tx_switching_flg = 1;
152 params.tx_switching_flg = num_vfs_param ? 1 : 0;
153 edev->ops->vport_update(edev->cdev, &params);
154 }
155
156 return rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300157}
158#endif
159
Yuval Mintze712d522015-10-26 11:02:27 +0200160static struct pci_driver qede_pci_driver = {
161 .name = "qede",
162 .id_table = qede_pci_tbl,
163 .probe = qede_probe,
164 .remove = qede_remove,
Yuval Mintzfefb0202016-05-11 16:36:19 +0300165#ifdef CONFIG_QED_SRIOV
166 .sriov_configure = qede_sriov_configure,
167#endif
Yuval Mintze712d522015-10-26 11:02:27 +0200168};
169
Yuval Mintzeff16962016-05-11 16:36:21 +0300170static void qede_force_mac(void *dev, u8 *mac)
171{
172 struct qede_dev *edev = dev;
173
174 ether_addr_copy(edev->ndev->dev_addr, mac);
175 ether_addr_copy(edev->primary_mac, mac);
176}
177
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200178static struct qed_eth_cb_ops qede_ll_ops = {
179 {
180 .link_update = qede_link_update,
181 },
Yuval Mintzeff16962016-05-11 16:36:21 +0300182 .force_mac = qede_force_mac,
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200183};
184
Yuval Mintz29502192015-10-26 11:02:29 +0200185static int qede_netdev_event(struct notifier_block *this, unsigned long event,
186 void *ptr)
187{
188 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
189 struct ethtool_drvinfo drvinfo;
190 struct qede_dev *edev;
191
192 /* Currently only support name change */
193 if (event != NETDEV_CHANGENAME)
194 goto done;
195
196 /* Check whether this is a qede device */
197 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
198 goto done;
199
200 memset(&drvinfo, 0, sizeof(drvinfo));
201 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
202 if (strcmp(drvinfo.driver, "qede"))
203 goto done;
204 edev = netdev_priv(ndev);
205
206 /* Notify qed of the name change */
207 if (!edev->ops || !edev->ops->common)
208 goto done;
209 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
210 "qede");
211
212done:
213 return NOTIFY_DONE;
214}
215
216static struct notifier_block qede_netdev_notifier = {
217 .notifier_call = qede_netdev_event,
218};
219
Yuval Mintze712d522015-10-26 11:02:27 +0200220static
221int __init qede_init(void)
222{
223 int ret;
Yuval Mintze712d522015-10-26 11:02:27 +0200224
225 pr_notice("qede_init: %s\n", version);
226
Rahul Verma95114342016-04-10 12:42:59 +0300227 qed_ops = qed_get_eth_ops();
Yuval Mintze712d522015-10-26 11:02:27 +0200228 if (!qed_ops) {
229 pr_notice("Failed to get qed ethtool operations\n");
230 return -EINVAL;
231 }
232
Yuval Mintz29502192015-10-26 11:02:29 +0200233 /* Must register notifier before pci ops, since we might miss
234 * interface rename after pci probe and netdev registeration.
235 */
236 ret = register_netdevice_notifier(&qede_netdev_notifier);
237 if (ret) {
238 pr_notice("Failed to register netdevice_notifier\n");
239 qed_put_eth_ops();
240 return -EINVAL;
241 }
242
Yuval Mintze712d522015-10-26 11:02:27 +0200243 ret = pci_register_driver(&qede_pci_driver);
244 if (ret) {
245 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200246 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200247 qed_put_eth_ops();
248 return -EINVAL;
249 }
250
251 return 0;
252}
253
254static void __exit qede_cleanup(void)
255{
256 pr_notice("qede_cleanup called\n");
257
Yuval Mintz29502192015-10-26 11:02:29 +0200258 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200259 pci_unregister_driver(&qede_pci_driver);
260 qed_put_eth_ops();
261}
262
263module_init(qede_init);
264module_exit(qede_cleanup);
265
266/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200267 * START OF FAST-PATH
268 * -------------------------------------------------------------------------
269 */
270
271/* Unmap the data and free skb */
272static int qede_free_tx_pkt(struct qede_dev *edev,
273 struct qede_tx_queue *txq,
274 int *len)
275{
276 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
277 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
278 struct eth_tx_1st_bd *first_bd;
279 struct eth_tx_bd *tx_data_bd;
280 int bds_consumed = 0;
281 int nbds;
282 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
283 int i, split_bd_len = 0;
284
285 if (unlikely(!skb)) {
286 DP_ERR(edev,
287 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
288 idx, txq->sw_tx_cons, txq->sw_tx_prod);
289 return -1;
290 }
291
292 *len = skb->len;
293
294 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
295
296 bds_consumed++;
297
298 nbds = first_bd->data.nbds;
299
300 if (data_split) {
301 struct eth_tx_bd *split = (struct eth_tx_bd *)
302 qed_chain_consume(&txq->tx_pbl);
303 split_bd_len = BD_UNMAP_LEN(split);
304 bds_consumed++;
305 }
306 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
307 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
308
309 /* Unmap the data of the skb frags */
310 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
311 tx_data_bd = (struct eth_tx_bd *)
312 qed_chain_consume(&txq->tx_pbl);
313 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
314 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
315 }
316
317 while (bds_consumed++ < nbds)
318 qed_chain_consume(&txq->tx_pbl);
319
320 /* Free skb */
321 dev_kfree_skb_any(skb);
322 txq->sw_tx_ring[idx].skb = NULL;
323 txq->sw_tx_ring[idx].flags = 0;
324
325 return 0;
326}
327
328/* Unmap the data and free skb when mapping failed during start_xmit */
329static void qede_free_failed_tx_pkt(struct qede_dev *edev,
330 struct qede_tx_queue *txq,
331 struct eth_tx_1st_bd *first_bd,
332 int nbd,
333 bool data_split)
334{
335 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
336 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
337 struct eth_tx_bd *tx_data_bd;
338 int i, split_bd_len = 0;
339
340 /* Return prod to its position before this skb was handled */
341 qed_chain_set_prod(&txq->tx_pbl,
342 le16_to_cpu(txq->tx_db.data.bd_prod),
343 first_bd);
344
345 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
346
347 if (data_split) {
348 struct eth_tx_bd *split = (struct eth_tx_bd *)
349 qed_chain_produce(&txq->tx_pbl);
350 split_bd_len = BD_UNMAP_LEN(split);
351 nbd--;
352 }
353
354 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
355 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
356
357 /* Unmap the data of the skb frags */
358 for (i = 0; i < nbd; i++) {
359 tx_data_bd = (struct eth_tx_bd *)
360 qed_chain_produce(&txq->tx_pbl);
361 if (tx_data_bd->nbytes)
362 dma_unmap_page(&edev->pdev->dev,
363 BD_UNMAP_ADDR(tx_data_bd),
364 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
365 }
366
367 /* Return again prod to its position before this skb was handled */
368 qed_chain_set_prod(&txq->tx_pbl,
369 le16_to_cpu(txq->tx_db.data.bd_prod),
370 first_bd);
371
372 /* Free skb */
373 dev_kfree_skb_any(skb);
374 txq->sw_tx_ring[idx].skb = NULL;
375 txq->sw_tx_ring[idx].flags = 0;
376}
377
378static u32 qede_xmit_type(struct qede_dev *edev,
379 struct sk_buff *skb,
380 int *ipv6_ext)
381{
382 u32 rc = XMIT_L4_CSUM;
383 __be16 l3_proto;
384
385 if (skb->ip_summed != CHECKSUM_PARTIAL)
386 return XMIT_PLAIN;
387
388 l3_proto = vlan_get_protocol(skb);
389 if (l3_proto == htons(ETH_P_IPV6) &&
390 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
391 *ipv6_ext = 1;
392
Manish Chopra14db81d2016-04-14 01:38:33 -0400393 if (skb->encapsulation)
394 rc |= XMIT_ENC;
395
Yuval Mintz29502192015-10-26 11:02:29 +0200396 if (skb_is_gso(skb))
397 rc |= XMIT_LSO;
398
399 return rc;
400}
401
402static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
403 struct eth_tx_2nd_bd *second_bd,
404 struct eth_tx_3rd_bd *third_bd)
405{
406 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500407 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200408
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500409 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200410
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500411 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200412 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
413 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
414
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500415 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200416 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
417
418 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
419 l4_proto = ipv6_hdr(skb)->nexthdr;
420 else
421 l4_proto = ip_hdr(skb)->protocol;
422
423 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500424 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200425
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500426 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200427 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500428 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
429 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
430 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200431
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500432 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200433 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
434}
435
436static int map_frag_to_bd(struct qede_dev *edev,
437 skb_frag_t *frag,
438 struct eth_tx_bd *bd)
439{
440 dma_addr_t mapping;
441
442 /* Map skb non-linear frag data for DMA */
443 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
444 skb_frag_size(frag),
445 DMA_TO_DEVICE);
446 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
447 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
448 return -ENOMEM;
449 }
450
451 /* Setup the data pointer of the frag data */
452 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
453
454 return 0;
455}
456
Manish Chopra14db81d2016-04-14 01:38:33 -0400457static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
458{
459 if (is_encap_pkt)
460 return (skb_inner_transport_header(skb) +
461 inner_tcp_hdrlen(skb) - skb->data);
462 else
463 return (skb_transport_header(skb) +
464 tcp_hdrlen(skb) - skb->data);
465}
466
Yuval Mintzb1199b12016-02-24 16:52:46 +0200467/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
468#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
469static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
470 u8 xmit_type)
471{
472 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
473
474 if (xmit_type & XMIT_LSO) {
475 int hlen;
476
Manish Chopra14db81d2016-04-14 01:38:33 -0400477 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
Yuval Mintzb1199b12016-02-24 16:52:46 +0200478
479 /* linear payload would require its own BD */
480 if (skb_headlen(skb) > hlen)
481 allowed_frags--;
482 }
483
484 return (skb_shinfo(skb)->nr_frags > allowed_frags);
485}
486#endif
487
Yuval Mintz29502192015-10-26 11:02:29 +0200488/* Main transmit function */
489static
490netdev_tx_t qede_start_xmit(struct sk_buff *skb,
491 struct net_device *ndev)
492{
493 struct qede_dev *edev = netdev_priv(ndev);
494 struct netdev_queue *netdev_txq;
495 struct qede_tx_queue *txq;
496 struct eth_tx_1st_bd *first_bd;
497 struct eth_tx_2nd_bd *second_bd = NULL;
498 struct eth_tx_3rd_bd *third_bd = NULL;
499 struct eth_tx_bd *tx_data_bd = NULL;
500 u16 txq_index;
501 u8 nbd = 0;
502 dma_addr_t mapping;
503 int rc, frag_idx = 0, ipv6_ext = 0;
504 u8 xmit_type;
505 u16 idx;
506 u16 hlen;
Dan Carpenter810810f2016-05-05 16:21:30 +0300507 bool data_split = false;
Yuval Mintz29502192015-10-26 11:02:29 +0200508
509 /* Get tx-queue context and netdev index */
510 txq_index = skb_get_queue_mapping(skb);
511 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
512 txq = QEDE_TX_QUEUE(edev, txq_index);
513 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
514
Yuval Mintz29502192015-10-26 11:02:29 +0200515 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
516 (MAX_SKB_FRAGS + 1));
517
518 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
519
Yuval Mintzb1199b12016-02-24 16:52:46 +0200520#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
521 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
522 if (skb_linearize(skb)) {
523 DP_NOTICE(edev,
524 "SKB linearization failed - silently dropping this SKB\n");
525 dev_kfree_skb_any(skb);
526 return NETDEV_TX_OK;
527 }
528 }
529#endif
530
Yuval Mintz29502192015-10-26 11:02:29 +0200531 /* Fill the entry in the SW ring and the BDs in the FW ring */
532 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
533 txq->sw_tx_ring[idx].skb = skb;
534 first_bd = (struct eth_tx_1st_bd *)
535 qed_chain_produce(&txq->tx_pbl);
536 memset(first_bd, 0, sizeof(*first_bd));
537 first_bd->data.bd_flags.bitfields =
538 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
539
540 /* Map skb linear data for DMA and set in the first BD */
541 mapping = dma_map_single(&edev->pdev->dev, skb->data,
542 skb_headlen(skb), DMA_TO_DEVICE);
543 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
544 DP_NOTICE(edev, "SKB mapping failed\n");
545 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
546 return NETDEV_TX_OK;
547 }
548 nbd++;
549 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
550
551 /* In case there is IPv6 with extension headers or LSO we need 2nd and
552 * 3rd BDs.
553 */
554 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
555 second_bd = (struct eth_tx_2nd_bd *)
556 qed_chain_produce(&txq->tx_pbl);
557 memset(second_bd, 0, sizeof(*second_bd));
558
559 nbd++;
560 third_bd = (struct eth_tx_3rd_bd *)
561 qed_chain_produce(&txq->tx_pbl);
562 memset(third_bd, 0, sizeof(*third_bd));
563
564 nbd++;
565 /* We need to fill in additional data in second_bd... */
566 tx_data_bd = (struct eth_tx_bd *)second_bd;
567 }
568
569 if (skb_vlan_tag_present(skb)) {
570 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
571 first_bd->data.bd_flags.bitfields |=
572 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
573 }
574
575 /* Fill the parsing flags & params according to the requested offload */
576 if (xmit_type & XMIT_L4_CSUM) {
577 /* We don't re-calculate IP checksum as it is already done by
578 * the upper stack
579 */
580 first_bd->data.bd_flags.bitfields |=
581 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
582
Manish Chopra14db81d2016-04-14 01:38:33 -0400583 if (xmit_type & XMIT_ENC) {
584 first_bd->data.bd_flags.bitfields |=
585 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300586 first_bd->data.bitfields |=
587 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
Manish Chopra14db81d2016-04-14 01:38:33 -0400588 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500589
Yuval Mintz29502192015-10-26 11:02:29 +0200590 /* If the packet is IPv6 with extension header, indicate that
591 * to FW and pass few params, since the device cracker doesn't
592 * support parsing IPv6 with extension header/s.
593 */
594 if (unlikely(ipv6_ext))
595 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
596 }
597
598 if (xmit_type & XMIT_LSO) {
599 first_bd->data.bd_flags.bitfields |=
600 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
601 third_bd->data.lso_mss =
602 cpu_to_le16(skb_shinfo(skb)->gso_size);
603
Manish Chopra14db81d2016-04-14 01:38:33 -0400604 if (unlikely(xmit_type & XMIT_ENC)) {
605 first_bd->data.bd_flags.bitfields |=
606 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
607 hlen = qede_get_skb_hlen(skb, true);
608 } else {
609 first_bd->data.bd_flags.bitfields |=
610 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
611 hlen = qede_get_skb_hlen(skb, false);
612 }
Yuval Mintz29502192015-10-26 11:02:29 +0200613
614 /* @@@TBD - if will not be removed need to check */
615 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500616 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200617
618 /* Make life easier for FW guys who can't deal with header and
619 * data on same BD. If we need to split, use the second bd...
620 */
621 if (unlikely(skb_headlen(skb) > hlen)) {
622 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
623 "TSO split header size is %d (%x:%x)\n",
624 first_bd->nbytes, first_bd->addr.hi,
625 first_bd->addr.lo);
626
627 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
628 le32_to_cpu(first_bd->addr.lo)) +
629 hlen;
630
631 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
632 le16_to_cpu(first_bd->nbytes) -
633 hlen);
634
635 /* this marks the BD as one that has no
636 * individual mapping
637 */
638 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
639
640 first_bd->nbytes = cpu_to_le16(hlen);
641
642 tx_data_bd = (struct eth_tx_bd *)third_bd;
643 data_split = true;
644 }
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300645 } else {
646 first_bd->data.bitfields |=
647 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
648 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200649 }
650
651 /* Handle fragmented skb */
652 /* special handle for frags inside 2nd and 3rd bds.. */
653 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
654 rc = map_frag_to_bd(edev,
655 &skb_shinfo(skb)->frags[frag_idx],
656 tx_data_bd);
657 if (rc) {
658 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
659 data_split);
660 return NETDEV_TX_OK;
661 }
662
663 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
664 tx_data_bd = (struct eth_tx_bd *)third_bd;
665 else
666 tx_data_bd = NULL;
667
668 frag_idx++;
669 }
670
671 /* map last frags into 4th, 5th .... */
672 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
673 tx_data_bd = (struct eth_tx_bd *)
674 qed_chain_produce(&txq->tx_pbl);
675
676 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
677
678 rc = map_frag_to_bd(edev,
679 &skb_shinfo(skb)->frags[frag_idx],
680 tx_data_bd);
681 if (rc) {
682 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
683 data_split);
684 return NETDEV_TX_OK;
685 }
686 }
687
688 /* update the first BD with the actual num BDs */
689 first_bd->data.nbds = nbd;
690
691 netdev_tx_sent_queue(netdev_txq, skb->len);
692
693 skb_tx_timestamp(skb);
694
695 /* Advance packet producer only before sending the packet since mapping
696 * of pages may fail.
697 */
698 txq->sw_tx_prod++;
699
700 /* 'next page' entries are counted in the producer value */
701 txq->tx_db.data.bd_prod =
702 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
703
704 /* wmb makes sure that the BDs data is updated before updating the
705 * producer, otherwise FW may read old data from the BDs.
706 */
707 wmb();
708 barrier();
709 writel(txq->tx_db.raw, txq->doorbell_addr);
710
711 /* mmiowb is needed to synchronize doorbell writes from more than one
712 * processor. It guarantees that the write arrives to the device before
713 * the queue lock is released and another start_xmit is called (possibly
714 * on another CPU). Without this barrier, the next doorbell can bypass
715 * this doorbell. This is applicable to IA64/Altix systems.
716 */
717 mmiowb();
718
719 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
720 < (MAX_SKB_FRAGS + 1))) {
721 netif_tx_stop_queue(netdev_txq);
722 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
723 "Stop queue was called\n");
724 /* paired memory barrier is in qede_tx_int(), we have to keep
725 * ordering of set_bit() in netif_tx_stop_queue() and read of
726 * fp->bd_tx_cons
727 */
728 smp_mb();
729
730 if (qed_chain_get_elem_left(&txq->tx_pbl)
731 >= (MAX_SKB_FRAGS + 1) &&
732 (edev->state == QEDE_STATE_OPEN)) {
733 netif_tx_wake_queue(netdev_txq);
734 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
735 "Wake queue was called\n");
736 }
737 }
738
739 return NETDEV_TX_OK;
740}
741
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400742int qede_txq_has_work(struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200743{
744 u16 hw_bd_cons;
745
746 /* Tell compiler that consumer and producer can change */
747 barrier();
748 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
749 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
750 return 0;
751
752 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
753}
754
755static int qede_tx_int(struct qede_dev *edev,
756 struct qede_tx_queue *txq)
757{
758 struct netdev_queue *netdev_txq;
759 u16 hw_bd_cons;
760 unsigned int pkts_compl = 0, bytes_compl = 0;
761 int rc;
762
763 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
764
765 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
766 barrier();
767
768 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
769 int len = 0;
770
771 rc = qede_free_tx_pkt(edev, txq, &len);
772 if (rc) {
773 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
774 hw_bd_cons,
775 qed_chain_get_cons_idx(&txq->tx_pbl));
776 break;
777 }
778
779 bytes_compl += len;
780 pkts_compl++;
781 txq->sw_tx_cons++;
782 }
783
784 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
785
786 /* Need to make the tx_bd_cons update visible to start_xmit()
787 * before checking for netif_tx_queue_stopped(). Without the
788 * memory barrier, there is a small possibility that
789 * start_xmit() will miss it and cause the queue to be stopped
790 * forever.
791 * On the other hand we need an rmb() here to ensure the proper
792 * ordering of bit testing in the following
793 * netif_tx_queue_stopped(txq) call.
794 */
795 smp_mb();
796
797 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
798 /* Taking tx_lock is needed to prevent reenabling the queue
799 * while it's empty. This could have happen if rx_action() gets
800 * suspended in qede_tx_int() after the condition before
801 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
802 *
803 * stops the queue->sees fresh tx_bd_cons->releases the queue->
804 * sends some packets consuming the whole queue again->
805 * stops the queue
806 */
807
808 __netif_tx_lock(netdev_txq, smp_processor_id());
809
810 if ((netif_tx_queue_stopped(netdev_txq)) &&
811 (edev->state == QEDE_STATE_OPEN) &&
812 (qed_chain_get_elem_left(&txq->tx_pbl)
813 >= (MAX_SKB_FRAGS + 1))) {
814 netif_tx_wake_queue(netdev_txq);
815 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
816 "Wake queue was called\n");
817 }
818
819 __netif_tx_unlock(netdev_txq);
820 }
821
822 return 0;
823}
824
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400825bool qede_has_rx_work(struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200826{
827 u16 hw_comp_cons, sw_comp_cons;
828
829 /* Tell compiler that status block fields can change */
830 barrier();
831
832 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
833 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
834
835 return hw_comp_cons != sw_comp_cons;
836}
837
838static bool qede_has_tx_work(struct qede_fastpath *fp)
839{
840 u8 tc;
841
842 for (tc = 0; tc < fp->edev->num_tc; tc++)
843 if (qede_txq_has_work(&fp->txqs[tc]))
844 return true;
845 return false;
846}
847
Manish Chopraf86af2d2016-04-20 03:03:27 -0400848static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
849{
850 qed_chain_consume(&rxq->rx_bd_ring);
851 rxq->sw_rx_cons++;
852}
853
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500854/* This function reuses the buffer(from an offset) from
855 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200856 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500857static inline void qede_reuse_page(struct qede_dev *edev,
858 struct qede_rx_queue *rxq,
859 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200860{
Yuval Mintz29502192015-10-26 11:02:29 +0200861 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500862 struct sw_rx_data *curr_prod;
863 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200864
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500865 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
866 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200867
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500868 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200869
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500870 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
871 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
872
Yuval Mintz29502192015-10-26 11:02:29 +0200873 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500874 curr_cons->data = NULL;
875}
876
Manish Chopraf86af2d2016-04-20 03:03:27 -0400877/* In case of allocation failures reuse buffers
878 * from consumer index to produce buffers for firmware
879 */
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400880void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
881 struct qede_dev *edev, u8 count)
Manish Chopraf86af2d2016-04-20 03:03:27 -0400882{
883 struct sw_rx_data *curr_cons;
884
885 for (; count > 0; count--) {
886 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
887 qede_reuse_page(edev, rxq, curr_cons);
888 qede_rx_bd_ring_consume(rxq);
889 }
890}
891
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500892static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
893 struct qede_rx_queue *rxq,
894 struct sw_rx_data *curr_cons)
895{
896 /* Move to the next segment in the page */
897 curr_cons->page_offset += rxq->rx_buf_seg_size;
898
899 if (curr_cons->page_offset == PAGE_SIZE) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400900 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
901 /* Since we failed to allocate new buffer
902 * current buffer can be used again.
903 */
904 curr_cons->page_offset -= rxq->rx_buf_seg_size;
905
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500906 return -ENOMEM;
Manish Chopraf86af2d2016-04-20 03:03:27 -0400907 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500908
909 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
910 PAGE_SIZE, DMA_FROM_DEVICE);
911 } else {
912 /* Increment refcount of the page as we don't want
913 * network stack to take the ownership of the page
914 * which can be recycled multiple times by the driver.
915 */
Joonsoo Kim6d061f92016-05-19 17:10:46 -0700916 page_ref_inc(curr_cons->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500917 qede_reuse_page(edev, rxq, curr_cons);
918 }
919
920 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200921}
922
923static inline void qede_update_rx_prod(struct qede_dev *edev,
924 struct qede_rx_queue *rxq)
925{
926 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
927 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
928 struct eth_rx_prod_data rx_prods = {0};
929
930 /* Update producers */
931 rx_prods.bd_prod = cpu_to_le16(bd_prod);
932 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
933
934 /* Make sure that the BD and SGE data is updated before updating the
935 * producers since FW might read the BD/SGE right after the producer
936 * is updated.
937 */
938 wmb();
939
940 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
941 (u32 *)&rx_prods);
942
943 /* mmiowb is needed to synchronize doorbell writes from more than one
944 * processor. It guarantees that the write arrives to the device before
945 * the napi lock is released and another qede_poll is called (possibly
946 * on another CPU). Without this barrier, the next doorbell can bypass
947 * this doorbell. This is applicable to IA64/Altix systems.
948 */
949 mmiowb();
950}
951
952static u32 qede_get_rxhash(struct qede_dev *edev,
953 u8 bitfields,
954 __le32 rss_hash,
955 enum pkt_hash_types *rxhash_type)
956{
957 enum rss_hash_type htype;
958
959 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
960
961 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
962 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
963 (htype == RSS_HASH_TYPE_IPV6)) ?
964 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
965 return le32_to_cpu(rss_hash);
966 }
967 *rxhash_type = PKT_HASH_TYPE_NONE;
968 return 0;
969}
970
971static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
972{
973 skb_checksum_none_assert(skb);
974
975 if (csum_flag & QEDE_CSUM_UNNECESSARY)
976 skb->ip_summed = CHECKSUM_UNNECESSARY;
Manish Chopra14db81d2016-04-14 01:38:33 -0400977
978 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
979 skb->csum_level = 1;
Yuval Mintz29502192015-10-26 11:02:29 +0200980}
981
982static inline void qede_skb_receive(struct qede_dev *edev,
983 struct qede_fastpath *fp,
984 struct sk_buff *skb,
985 u16 vlan_tag)
986{
987 if (vlan_tag)
988 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
989 vlan_tag);
990
991 napi_gro_receive(&fp->napi, skb);
992}
993
Manish Chopra55482ed2016-03-04 12:35:06 -0500994static void qede_set_gro_params(struct qede_dev *edev,
995 struct sk_buff *skb,
996 struct eth_fast_path_rx_tpa_start_cqe *cqe)
997{
998 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
999
1000 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1001 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1002 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1003 else
1004 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1005
1006 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1007 cqe->header_len;
1008}
1009
1010static int qede_fill_frag_skb(struct qede_dev *edev,
1011 struct qede_rx_queue *rxq,
1012 u8 tpa_agg_index,
1013 u16 len_on_bd)
1014{
1015 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1016 NUM_RX_BDS_MAX];
1017 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1018 struct sk_buff *skb = tpa_info->skb;
1019
1020 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1021 goto out;
1022
1023 /* Add one frag and update the appropriate fields in the skb */
1024 skb_fill_page_desc(skb, tpa_info->frag_id++,
1025 current_bd->data, current_bd->page_offset,
1026 len_on_bd);
1027
1028 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001029 /* Incr page ref count to reuse on allocation failure
1030 * so that it doesn't get freed while freeing SKB.
1031 */
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001032 page_ref_inc(current_bd->data);
Manish Chopra55482ed2016-03-04 12:35:06 -05001033 goto out;
1034 }
1035
1036 qed_chain_consume(&rxq->rx_bd_ring);
1037 rxq->sw_rx_cons++;
1038
1039 skb->data_len += len_on_bd;
1040 skb->truesize += rxq->rx_buf_seg_size;
1041 skb->len += len_on_bd;
1042
1043 return 0;
1044
1045out:
Manish Chopraf86af2d2016-04-20 03:03:27 -04001046 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1047 qede_recycle_rx_bd_ring(rxq, edev, 1);
Manish Chopra55482ed2016-03-04 12:35:06 -05001048 return -ENOMEM;
1049}
1050
1051static void qede_tpa_start(struct qede_dev *edev,
1052 struct qede_rx_queue *rxq,
1053 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1054{
1055 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1056 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1057 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1058 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1059 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1060 struct sw_rx_data *sw_rx_data_cons;
1061 struct sw_rx_data *sw_rx_data_prod;
1062 enum pkt_hash_types rxhash_type;
1063 u32 rxhash;
1064
1065 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1066 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1067
1068 /* Use pre-allocated replacement buffer - we can't release the agg.
1069 * start until its over and we don't want to risk allocation failing
1070 * here, so re-allocate when aggregation will be over.
1071 */
Manish Chopra09ec8e72016-05-18 07:43:57 -04001072 sw_rx_data_prod->mapping = replace_buf->mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001073
1074 sw_rx_data_prod->data = replace_buf->data;
1075 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1076 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1077 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1078
1079 rxq->sw_rx_prod++;
1080
1081 /* move partial skb from cons to pool (don't unmap yet)
1082 * save mapping, incase we drop the packet later on.
1083 */
1084 tpa_info->start_buf = *sw_rx_data_cons;
1085 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1086 le32_to_cpu(rx_bd_cons->addr.lo));
1087
1088 tpa_info->start_buf_mapping = mapping;
1089 rxq->sw_rx_cons++;
1090
1091 /* set tpa state to start only if we are able to allocate skb
1092 * for this aggregation, otherwise mark as error and aggregation will
1093 * be dropped
1094 */
1095 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1096 le16_to_cpu(cqe->len_on_first_bd));
1097 if (unlikely(!tpa_info->skb)) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001098 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
Manish Chopra55482ed2016-03-04 12:35:06 -05001099 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001100 goto cons_buf;
Manish Chopra55482ed2016-03-04 12:35:06 -05001101 }
1102
1103 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1104 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1105
1106 /* Start filling in the aggregation info */
1107 tpa_info->frag_id = 0;
1108 tpa_info->agg_state = QEDE_AGG_STATE_START;
1109
1110 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1111 cqe->rss_hash, &rxhash_type);
1112 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1113 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1114 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1115 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1116 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1117 else
1118 tpa_info->vlan_tag = 0;
1119
1120 /* This is needed in order to enable forwarding support */
1121 qede_set_gro_params(edev, tpa_info->skb, cqe);
1122
Manish Chopraf86af2d2016-04-20 03:03:27 -04001123cons_buf: /* We still need to handle bd_len_list to consume buffers */
Manish Chopra55482ed2016-03-04 12:35:06 -05001124 if (likely(cqe->ext_bd_len_list[0]))
1125 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1126 le16_to_cpu(cqe->ext_bd_len_list[0]));
1127
1128 if (unlikely(cqe->ext_bd_len_list[1])) {
1129 DP_ERR(edev,
1130 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1131 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1132 }
1133}
1134
Manish Chopra88f09bd2016-03-08 04:09:44 -05001135#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001136static void qede_gro_ip_csum(struct sk_buff *skb)
1137{
1138 const struct iphdr *iph = ip_hdr(skb);
1139 struct tcphdr *th;
1140
Manish Chopra55482ed2016-03-04 12:35:06 -05001141 skb_set_transport_header(skb, sizeof(struct iphdr));
1142 th = tcp_hdr(skb);
1143
1144 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1145 iph->saddr, iph->daddr, 0);
1146
1147 tcp_gro_complete(skb);
1148}
1149
1150static void qede_gro_ipv6_csum(struct sk_buff *skb)
1151{
1152 struct ipv6hdr *iph = ipv6_hdr(skb);
1153 struct tcphdr *th;
1154
Manish Chopra55482ed2016-03-04 12:35:06 -05001155 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1156 th = tcp_hdr(skb);
1157
1158 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1159 &iph->saddr, &iph->daddr, 0);
1160 tcp_gro_complete(skb);
1161}
Manish Chopra88f09bd2016-03-08 04:09:44 -05001162#endif
Manish Chopra55482ed2016-03-04 12:35:06 -05001163
1164static void qede_gro_receive(struct qede_dev *edev,
1165 struct qede_fastpath *fp,
1166 struct sk_buff *skb,
1167 u16 vlan_tag)
1168{
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001169 /* FW can send a single MTU sized packet from gro flow
1170 * due to aggregation timeout/last segment etc. which
1171 * is not expected to be a gro packet. If a skb has zero
1172 * frags then simply push it in the stack as non gso skb.
1173 */
1174 if (unlikely(!skb->data_len)) {
1175 skb_shinfo(skb)->gso_type = 0;
1176 skb_shinfo(skb)->gso_size = 0;
1177 goto send_skb;
1178 }
1179
Manish Chopra88f09bd2016-03-08 04:09:44 -05001180#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001181 if (skb_shinfo(skb)->gso_size) {
Manish Chopraaad94c02016-04-20 03:03:28 -04001182 skb_set_network_header(skb, 0);
1183
Manish Chopra55482ed2016-03-04 12:35:06 -05001184 switch (skb->protocol) {
1185 case htons(ETH_P_IP):
1186 qede_gro_ip_csum(skb);
1187 break;
1188 case htons(ETH_P_IPV6):
1189 qede_gro_ipv6_csum(skb);
1190 break;
1191 default:
1192 DP_ERR(edev,
1193 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1194 ntohs(skb->protocol));
1195 }
1196 }
Manish Chopra88f09bd2016-03-08 04:09:44 -05001197#endif
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001198
1199send_skb:
Manish Chopra55482ed2016-03-04 12:35:06 -05001200 skb_record_rx_queue(skb, fp->rss_id);
1201 qede_skb_receive(edev, fp, skb, vlan_tag);
1202}
1203
1204static inline void qede_tpa_cont(struct qede_dev *edev,
1205 struct qede_rx_queue *rxq,
1206 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1207{
1208 int i;
1209
1210 for (i = 0; cqe->len_list[i]; i++)
1211 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1212 le16_to_cpu(cqe->len_list[i]));
1213
1214 if (unlikely(i > 1))
1215 DP_ERR(edev,
1216 "Strange - TPA cont with more than a single len_list entry\n");
1217}
1218
1219static void qede_tpa_end(struct qede_dev *edev,
1220 struct qede_fastpath *fp,
1221 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1222{
1223 struct qede_rx_queue *rxq = fp->rxq;
1224 struct qede_agg_info *tpa_info;
1225 struct sk_buff *skb;
1226 int i;
1227
1228 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1229 skb = tpa_info->skb;
1230
1231 for (i = 0; cqe->len_list[i]; i++)
1232 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1233 le16_to_cpu(cqe->len_list[i]));
1234 if (unlikely(i > 1))
1235 DP_ERR(edev,
1236 "Strange - TPA emd with more than a single len_list entry\n");
1237
1238 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1239 goto err;
1240
1241 /* Sanity */
1242 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1243 DP_ERR(edev,
1244 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1245 cqe->num_of_bds, tpa_info->frag_id);
1246 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1247 DP_ERR(edev,
1248 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1249 le16_to_cpu(cqe->total_packet_len), skb->len);
1250
1251 memcpy(skb->data,
1252 page_address(tpa_info->start_buf.data) +
1253 tpa_info->start_cqe.placement_offset +
1254 tpa_info->start_buf.page_offset,
1255 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1256
1257 /* Recycle [mapped] start buffer for the next replacement */
1258 tpa_info->replace_buf = tpa_info->start_buf;
1259 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1260
1261 /* Finalize the SKB */
1262 skb->protocol = eth_type_trans(skb, edev->ndev);
1263 skb->ip_summed = CHECKSUM_UNNECESSARY;
1264
1265 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1266 * to skb_shinfo(skb)->gso_segs
1267 */
1268 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1269
1270 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1271
1272 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1273
1274 return;
1275err:
1276 /* The BD starting the aggregation is still mapped; Re-use it for
1277 * future aggregations [as replacement buffer]
1278 */
1279 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1280 sizeof(struct sw_rx_data));
1281 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1282 tpa_info->start_buf.data = NULL;
1283 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1284 dev_kfree_skb_any(tpa_info->skb);
1285 tpa_info->skb = NULL;
1286}
1287
Manish Chopra14db81d2016-04-14 01:38:33 -04001288static bool qede_tunn_exist(u16 flag)
1289{
1290 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1291 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1292}
1293
1294static u8 qede_check_tunn_csum(u16 flag)
1295{
1296 u16 csum_flag = 0;
1297 u8 tcsum = 0;
1298
1299 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1300 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1301 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1302 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1303
1304 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1305 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1306 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1307 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1308 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1309 }
1310
1311 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1312 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1313 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1314 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1315
1316 if (csum_flag & flag)
1317 return QEDE_CSUM_ERROR;
1318
1319 return QEDE_CSUM_UNNECESSARY | tcsum;
1320}
1321
1322static u8 qede_check_notunn_csum(u16 flag)
Yuval Mintz29502192015-10-26 11:02:29 +02001323{
1324 u16 csum_flag = 0;
1325 u8 csum = 0;
1326
Manish Chopra14db81d2016-04-14 01:38:33 -04001327 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1328 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001329 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1330 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1331 csum = QEDE_CSUM_UNNECESSARY;
1332 }
1333
1334 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1335 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1336
1337 if (csum_flag & flag)
1338 return QEDE_CSUM_ERROR;
1339
1340 return csum;
1341}
1342
Manish Chopra14db81d2016-04-14 01:38:33 -04001343static u8 qede_check_csum(u16 flag)
1344{
1345 if (!qede_tunn_exist(flag))
1346 return qede_check_notunn_csum(flag);
1347 else
1348 return qede_check_tunn_csum(flag);
1349}
1350
Manish Choprac72a6122016-06-30 02:35:18 -04001351static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1352 u16 flag)
1353{
1354 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1355
1356 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1357 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1358 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1359 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1360 return true;
1361
1362 return false;
1363}
1364
Yuval Mintz29502192015-10-26 11:02:29 +02001365static int qede_rx_int(struct qede_fastpath *fp, int budget)
1366{
1367 struct qede_dev *edev = fp->edev;
1368 struct qede_rx_queue *rxq = fp->rxq;
1369
1370 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1371 int rx_pkt = 0;
1372 u8 csum_flag;
1373
1374 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1375 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1376
1377 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1378 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1379 * read before it is written by FW, then FW writes CQE and SB, and then
1380 * the CPU reads the hw_comp_cons, it will use an old CQE.
1381 */
1382 rmb();
1383
1384 /* Loop to complete all indicated BDs */
1385 while (sw_comp_cons != hw_comp_cons) {
1386 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1387 enum pkt_hash_types rxhash_type;
1388 enum eth_rx_cqe_type cqe_type;
1389 struct sw_rx_data *sw_rx_data;
1390 union eth_rx_cqe *cqe;
1391 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001392 struct page *data;
1393 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001394 u16 len, pad;
1395 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +02001396
1397 /* Get the CQE from the completion ring */
1398 cqe = (union eth_rx_cqe *)
1399 qed_chain_consume(&rxq->rx_comp_ring);
1400 cqe_type = cqe->fast_path_regular.type;
1401
1402 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1403 edev->ops->eth_cqe_completion(
1404 edev->cdev, fp->rss_id,
1405 (struct eth_slow_path_rx_cqe *)cqe);
1406 goto next_cqe;
1407 }
1408
Manish Chopra55482ed2016-03-04 12:35:06 -05001409 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1410 switch (cqe_type) {
1411 case ETH_RX_CQE_TYPE_TPA_START:
1412 qede_tpa_start(edev, rxq,
1413 &cqe->fast_path_tpa_start);
1414 goto next_cqe;
1415 case ETH_RX_CQE_TYPE_TPA_CONT:
1416 qede_tpa_cont(edev, rxq,
1417 &cqe->fast_path_tpa_cont);
1418 goto next_cqe;
1419 case ETH_RX_CQE_TYPE_TPA_END:
1420 qede_tpa_end(edev, fp,
1421 &cqe->fast_path_tpa_end);
1422 goto next_rx_only;
1423 default:
1424 break;
1425 }
1426 }
1427
Yuval Mintz29502192015-10-26 11:02:29 +02001428 /* Get the data from the SW ring */
1429 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1430 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1431 data = sw_rx_data->data;
1432
1433 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001434 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +02001435 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001436 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001437
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001438 /* If this is an error packet then drop it */
1439 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +02001440
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001441 csum_flag = qede_check_csum(parse_flag);
1442 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Manish Choprac72a6122016-06-30 02:35:18 -04001443 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1444 parse_flag)) {
1445 rxq->rx_ip_frags++;
1446 goto alloc_skb;
1447 }
1448
Yuval Mintz29502192015-10-26 11:02:29 +02001449 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001450 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1451 sw_comp_cons, parse_flag);
1452 rxq->rx_hw_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001453 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1454 goto next_cqe;
Yuval Mintz29502192015-10-26 11:02:29 +02001455 }
1456
Manish Choprac72a6122016-06-30 02:35:18 -04001457alloc_skb:
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001458 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1459 if (unlikely(!skb)) {
1460 DP_NOTICE(edev,
1461 "Build_skb failed, dropping incoming packet\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001462 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001463 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001464 goto next_cqe;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001465 }
Yuval Mintz29502192015-10-26 11:02:29 +02001466
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001467 /* Copy data into SKB */
1468 if (len + pad <= QEDE_RX_HDR_SIZE) {
1469 memcpy(skb_put(skb, len),
1470 page_address(data) + pad +
1471 sw_rx_data->page_offset, len);
1472 qede_reuse_page(edev, rxq, sw_rx_data);
1473 } else {
1474 struct skb_frag_struct *frag;
1475 unsigned int pull_len;
1476 unsigned char *va;
1477
1478 frag = &skb_shinfo(skb)->frags[0];
1479
1480 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1481 pad + sw_rx_data->page_offset,
1482 len, rxq->rx_buf_seg_size);
1483
1484 va = skb_frag_address(frag);
1485 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1486
1487 /* Align the pull_len to optimize memcpy */
1488 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1489
1490 skb_frag_size_sub(frag, pull_len);
1491 frag->page_offset += pull_len;
1492 skb->data_len -= pull_len;
1493 skb->tail += pull_len;
1494
1495 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1496 sw_rx_data))) {
1497 DP_ERR(edev, "Failed to allocate rx buffer\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001498 /* Incr page ref count to reuse on allocation
1499 * failure so that it doesn't get freed while
1500 * freeing SKB.
1501 */
1502
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001503 page_ref_inc(sw_rx_data->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001504 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001505 qede_recycle_rx_bd_ring(rxq, edev,
1506 fp_cqe->bd_num);
1507 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001508 goto next_cqe;
1509 }
1510 }
1511
Manish Chopraf86af2d2016-04-20 03:03:27 -04001512 qede_rx_bd_ring_consume(rxq);
1513
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001514 if (fp_cqe->bd_num != 1) {
1515 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1516 u8 num_frags;
1517
1518 pkt_len -= len;
1519
1520 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1521 num_frags--) {
1522 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1523 rxq->rx_buf_size : pkt_len;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001524 if (unlikely(!cur_size)) {
1525 DP_ERR(edev,
1526 "Still got %d BDs for mapping jumbo, but length became 0\n",
1527 num_frags);
1528 qede_recycle_rx_bd_ring(rxq, edev,
1529 num_frags);
1530 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001531 goto next_cqe;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001532 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001533
Manish Chopraf86af2d2016-04-20 03:03:27 -04001534 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1535 qede_recycle_rx_bd_ring(rxq, edev,
1536 num_frags);
1537 dev_kfree_skb_any(skb);
1538 goto next_cqe;
1539 }
1540
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001541 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1542 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
Manish Chopraf86af2d2016-04-20 03:03:27 -04001543 qede_rx_bd_ring_consume(rxq);
1544
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001545 dma_unmap_page(&edev->pdev->dev,
1546 sw_rx_data->mapping,
1547 PAGE_SIZE, DMA_FROM_DEVICE);
1548
1549 skb_fill_page_desc(skb,
1550 skb_shinfo(skb)->nr_frags++,
1551 sw_rx_data->data, 0,
1552 cur_size);
1553
1554 skb->truesize += PAGE_SIZE;
1555 skb->data_len += cur_size;
1556 skb->len += cur_size;
1557 pkt_len -= cur_size;
1558 }
1559
Manish Chopraf86af2d2016-04-20 03:03:27 -04001560 if (unlikely(pkt_len))
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001561 DP_ERR(edev,
1562 "Mapped all BDs of jumbo, but still have %d bytes\n",
1563 pkt_len);
1564 }
Yuval Mintz29502192015-10-26 11:02:29 +02001565
1566 skb->protocol = eth_type_trans(skb, edev->ndev);
1567
1568 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1569 fp_cqe->rss_hash,
1570 &rxhash_type);
1571
1572 skb_set_hash(skb, rx_hash, rxhash_type);
1573
1574 qede_set_skb_csum(skb, csum_flag);
1575
1576 skb_record_rx_queue(skb, fp->rss_id);
1577
1578 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
Manish Chopra55482ed2016-03-04 12:35:06 -05001579next_rx_only:
Yuval Mintz29502192015-10-26 11:02:29 +02001580 rx_pkt++;
1581
1582next_cqe: /* don't consume bd rx buffer */
1583 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1584 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1585 /* CR TPA - revisit how to handle budget in TPA perhaps
1586 * increase on "end"
1587 */
1588 if (rx_pkt == budget)
1589 break;
1590 } /* repeat while sw_comp_cons != hw_comp_cons... */
1591
1592 /* Update producers */
1593 qede_update_rx_prod(edev, rxq);
1594
1595 return rx_pkt;
1596}
1597
1598static int qede_poll(struct napi_struct *napi, int budget)
1599{
Yuval Mintz29502192015-10-26 11:02:29 +02001600 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
Manish Choprac7741692016-06-30 02:35:19 -04001601 napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001602 struct qede_dev *edev = fp->edev;
Manish Choprac7741692016-06-30 02:35:19 -04001603 int rx_work_done = 0;
1604 u8 tc;
Yuval Mintz29502192015-10-26 11:02:29 +02001605
Manish Choprac7741692016-06-30 02:35:19 -04001606 for (tc = 0; tc < edev->num_tc; tc++)
1607 if (qede_txq_has_work(&fp->txqs[tc]))
1608 qede_tx_int(edev, &fp->txqs[tc]);
Yuval Mintz29502192015-10-26 11:02:29 +02001609
Manish Choprac7741692016-06-30 02:35:19 -04001610 rx_work_done = qede_has_rx_work(fp->rxq) ?
1611 qede_rx_int(fp, budget) : 0;
1612 if (rx_work_done < budget) {
1613 qed_sb_update_sb_idx(fp->sb_info);
1614 /* *_has_*_work() reads the status block,
1615 * thus we need to ensure that status block indices
1616 * have been actually read (qed_sb_update_sb_idx)
1617 * prior to this check (*_has_*_work) so that
1618 * we won't write the "newer" value of the status block
1619 * to HW (if there was a DMA right after
1620 * qede_has_rx_work and if there is no rmb, the memory
1621 * reading (qed_sb_update_sb_idx) may be postponed
1622 * to right before *_ack_sb). In this case there
1623 * will never be another interrupt until there is
1624 * another update of the status block, while there
1625 * is still unhandled work.
1626 */
1627 rmb();
Yuval Mintz29502192015-10-26 11:02:29 +02001628
1629 /* Fall out from the NAPI loop if needed */
Manish Choprac7741692016-06-30 02:35:19 -04001630 if (!(qede_has_rx_work(fp->rxq) ||
1631 qede_has_tx_work(fp))) {
1632 napi_complete(napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001633
Manish Choprac7741692016-06-30 02:35:19 -04001634 /* Update and reenable interrupts */
1635 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1636 1 /*update*/);
1637 } else {
1638 rx_work_done = budget;
Yuval Mintz29502192015-10-26 11:02:29 +02001639 }
1640 }
1641
Manish Choprac7741692016-06-30 02:35:19 -04001642 return rx_work_done;
Yuval Mintz29502192015-10-26 11:02:29 +02001643}
1644
1645static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1646{
1647 struct qede_fastpath *fp = fp_cookie;
1648
1649 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1650
1651 napi_schedule_irqoff(&fp->napi);
1652 return IRQ_HANDLED;
1653}
1654
1655/* -------------------------------------------------------------------------
1656 * END OF FAST-PATH
1657 * -------------------------------------------------------------------------
1658 */
1659
1660static int qede_open(struct net_device *ndev);
1661static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001662static int qede_set_mac_addr(struct net_device *ndev, void *p);
1663static void qede_set_rx_mode(struct net_device *ndev);
1664static void qede_config_rx_mode(struct net_device *ndev);
1665
1666static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1667 enum qed_filter_xcast_params_type opcode,
1668 unsigned char mac[ETH_ALEN])
1669{
1670 struct qed_filter_params filter_cmd;
1671
1672 memset(&filter_cmd, 0, sizeof(filter_cmd));
1673 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1674 filter_cmd.filter.ucast.type = opcode;
1675 filter_cmd.filter.ucast.mac_valid = 1;
1676 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1677
1678 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1679}
1680
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001681static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1682 enum qed_filter_xcast_params_type opcode,
1683 u16 vid)
1684{
1685 struct qed_filter_params filter_cmd;
1686
1687 memset(&filter_cmd, 0, sizeof(filter_cmd));
1688 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1689 filter_cmd.filter.ucast.type = opcode;
1690 filter_cmd.filter.ucast.vlan_valid = 1;
1691 filter_cmd.filter.ucast.vlan = vid;
1692
1693 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1694}
1695
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001696void qede_fill_by_demand_stats(struct qede_dev *edev)
1697{
1698 struct qed_eth_stats stats;
1699
1700 edev->ops->get_vport_stats(edev->cdev, &stats);
1701 edev->stats.no_buff_discards = stats.no_buff_discards;
1702 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1703 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1704 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1705 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1706 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1707 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1708 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1709 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1710
1711 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1712 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1713 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1714 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1715 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1716 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1717 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1718 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1719 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1720 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1721 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1722 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1723
1724 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
Yuval Mintzd4967cf2016-04-22 08:41:01 +03001725 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1726 edev->stats.rx_128_to_255_byte_packets =
1727 stats.rx_128_to_255_byte_packets;
1728 edev->stats.rx_256_to_511_byte_packets =
1729 stats.rx_256_to_511_byte_packets;
1730 edev->stats.rx_512_to_1023_byte_packets =
1731 stats.rx_512_to_1023_byte_packets;
1732 edev->stats.rx_1024_to_1518_byte_packets =
1733 stats.rx_1024_to_1518_byte_packets;
1734 edev->stats.rx_1519_to_1522_byte_packets =
1735 stats.rx_1519_to_1522_byte_packets;
1736 edev->stats.rx_1519_to_2047_byte_packets =
1737 stats.rx_1519_to_2047_byte_packets;
1738 edev->stats.rx_2048_to_4095_byte_packets =
1739 stats.rx_2048_to_4095_byte_packets;
1740 edev->stats.rx_4096_to_9216_byte_packets =
1741 stats.rx_4096_to_9216_byte_packets;
1742 edev->stats.rx_9217_to_16383_byte_packets =
1743 stats.rx_9217_to_16383_byte_packets;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001744 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1745 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1746 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1747 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1748 edev->stats.rx_align_errors = stats.rx_align_errors;
1749 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1750 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1751 edev->stats.rx_jabbers = stats.rx_jabbers;
1752 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1753 edev->stats.rx_fragments = stats.rx_fragments;
1754 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1755 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1756 edev->stats.tx_128_to_255_byte_packets =
1757 stats.tx_128_to_255_byte_packets;
1758 edev->stats.tx_256_to_511_byte_packets =
1759 stats.tx_256_to_511_byte_packets;
1760 edev->stats.tx_512_to_1023_byte_packets =
1761 stats.tx_512_to_1023_byte_packets;
1762 edev->stats.tx_1024_to_1518_byte_packets =
1763 stats.tx_1024_to_1518_byte_packets;
1764 edev->stats.tx_1519_to_2047_byte_packets =
1765 stats.tx_1519_to_2047_byte_packets;
1766 edev->stats.tx_2048_to_4095_byte_packets =
1767 stats.tx_2048_to_4095_byte_packets;
1768 edev->stats.tx_4096_to_9216_byte_packets =
1769 stats.tx_4096_to_9216_byte_packets;
1770 edev->stats.tx_9217_to_16383_byte_packets =
1771 stats.tx_9217_to_16383_byte_packets;
1772 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1773 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1774 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1775 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1776 edev->stats.brb_truncates = stats.brb_truncates;
1777 edev->stats.brb_discards = stats.brb_discards;
1778 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1779}
1780
1781static struct rtnl_link_stats64 *qede_get_stats64(
1782 struct net_device *dev,
1783 struct rtnl_link_stats64 *stats)
1784{
1785 struct qede_dev *edev = netdev_priv(dev);
1786
1787 qede_fill_by_demand_stats(edev);
1788
1789 stats->rx_packets = edev->stats.rx_ucast_pkts +
1790 edev->stats.rx_mcast_pkts +
1791 edev->stats.rx_bcast_pkts;
1792 stats->tx_packets = edev->stats.tx_ucast_pkts +
1793 edev->stats.tx_mcast_pkts +
1794 edev->stats.tx_bcast_pkts;
1795
1796 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1797 edev->stats.rx_mcast_bytes +
1798 edev->stats.rx_bcast_bytes;
1799
1800 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1801 edev->stats.tx_mcast_bytes +
1802 edev->stats.tx_bcast_bytes;
1803
1804 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1805 stats->multicast = edev->stats.rx_mcast_pkts +
1806 edev->stats.rx_bcast_pkts;
1807
1808 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1809
1810 stats->collisions = edev->stats.tx_total_collisions;
1811 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1812 stats->rx_frame_errors = edev->stats.rx_align_errors;
1813
1814 return stats;
1815}
1816
Yuval Mintz733def62016-05-11 16:36:22 +03001817#ifdef CONFIG_QED_SRIOV
Yuval Mintz73390ac2016-05-11 16:36:24 +03001818static int qede_get_vf_config(struct net_device *dev, int vfidx,
1819 struct ifla_vf_info *ivi)
1820{
1821 struct qede_dev *edev = netdev_priv(dev);
1822
1823 if (!edev->ops)
1824 return -EINVAL;
1825
1826 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1827}
1828
Yuval Mintz733def62016-05-11 16:36:22 +03001829static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1830 int min_tx_rate, int max_tx_rate)
1831{
1832 struct qede_dev *edev = netdev_priv(dev);
1833
Yuval Mintzbe7b6d62016-05-26 11:01:17 +03001834 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
Yuval Mintz733def62016-05-11 16:36:22 +03001835 max_tx_rate);
1836}
1837
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001838static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1839{
1840 struct qede_dev *edev = netdev_priv(dev);
1841
1842 if (!edev->ops)
1843 return -EINVAL;
1844
1845 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1846}
1847
Yuval Mintz733def62016-05-11 16:36:22 +03001848static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1849 int link_state)
1850{
1851 struct qede_dev *edev = netdev_priv(dev);
1852
1853 if (!edev->ops)
1854 return -EINVAL;
1855
1856 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1857}
1858#endif
1859
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001860static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1861{
1862 struct qed_update_vport_params params;
1863 int rc;
1864
1865 /* Proceed only if action actually needs to be performed */
1866 if (edev->accept_any_vlan == action)
1867 return;
1868
1869 memset(&params, 0, sizeof(params));
1870
1871 params.vport_id = 0;
1872 params.accept_any_vlan = action;
1873 params.update_accept_any_vlan_flg = 1;
1874
1875 rc = edev->ops->vport_update(edev->cdev, &params);
1876 if (rc) {
1877 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1878 action ? "enable" : "disable");
1879 } else {
1880 DP_INFO(edev, "%s accept-any-vlan\n",
1881 action ? "enabled" : "disabled");
1882 edev->accept_any_vlan = action;
1883 }
1884}
1885
1886static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1887{
1888 struct qede_dev *edev = netdev_priv(dev);
1889 struct qede_vlan *vlan, *tmp;
1890 int rc;
1891
1892 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1893
1894 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1895 if (!vlan) {
1896 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1897 return -ENOMEM;
1898 }
1899 INIT_LIST_HEAD(&vlan->list);
1900 vlan->vid = vid;
1901 vlan->configured = false;
1902
1903 /* Verify vlan isn't already configured */
1904 list_for_each_entry(tmp, &edev->vlan_list, list) {
1905 if (tmp->vid == vlan->vid) {
1906 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1907 "vlan already configured\n");
1908 kfree(vlan);
1909 return -EEXIST;
1910 }
1911 }
1912
1913 /* If interface is down, cache this VLAN ID and return */
1914 if (edev->state != QEDE_STATE_OPEN) {
1915 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1916 "Interface is down, VLAN %d will be configured when interface is up\n",
1917 vid);
1918 if (vid != 0)
1919 edev->non_configured_vlans++;
1920 list_add(&vlan->list, &edev->vlan_list);
1921
1922 return 0;
1923 }
1924
1925 /* Check for the filter limit.
1926 * Note - vlan0 has a reserved filter and can be added without
1927 * worrying about quota
1928 */
1929 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1930 (vlan->vid == 0)) {
1931 rc = qede_set_ucast_rx_vlan(edev,
1932 QED_FILTER_XCAST_TYPE_ADD,
1933 vlan->vid);
1934 if (rc) {
1935 DP_ERR(edev, "Failed to configure VLAN %d\n",
1936 vlan->vid);
1937 kfree(vlan);
1938 return -EINVAL;
1939 }
1940 vlan->configured = true;
1941
1942 /* vlan0 filter isn't consuming out of our quota */
1943 if (vlan->vid != 0)
1944 edev->configured_vlans++;
1945 } else {
1946 /* Out of quota; Activate accept-any-VLAN mode */
1947 if (!edev->non_configured_vlans)
1948 qede_config_accept_any_vlan(edev, true);
1949
1950 edev->non_configured_vlans++;
1951 }
1952
1953 list_add(&vlan->list, &edev->vlan_list);
1954
1955 return 0;
1956}
1957
1958static void qede_del_vlan_from_list(struct qede_dev *edev,
1959 struct qede_vlan *vlan)
1960{
1961 /* vlan0 filter isn't consuming out of our quota */
1962 if (vlan->vid != 0) {
1963 if (vlan->configured)
1964 edev->configured_vlans--;
1965 else
1966 edev->non_configured_vlans--;
1967 }
1968
1969 list_del(&vlan->list);
1970 kfree(vlan);
1971}
1972
1973static int qede_configure_vlan_filters(struct qede_dev *edev)
1974{
1975 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1976 struct qed_dev_eth_info *dev_info;
1977 struct qede_vlan *vlan = NULL;
1978
1979 if (list_empty(&edev->vlan_list))
1980 return 0;
1981
1982 dev_info = &edev->dev_info;
1983
1984 /* Configure non-configured vlans */
1985 list_for_each_entry(vlan, &edev->vlan_list, list) {
1986 if (vlan->configured)
1987 continue;
1988
1989 /* We have used all our credits, now enable accept_any_vlan */
1990 if ((vlan->vid != 0) &&
1991 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1992 accept_any_vlan = 1;
1993 continue;
1994 }
1995
1996 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1997
1998 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1999 vlan->vid);
2000 if (rc) {
2001 DP_ERR(edev, "Failed to configure VLAN %u\n",
2002 vlan->vid);
2003 real_rc = rc;
2004 continue;
2005 }
2006
2007 vlan->configured = true;
2008 /* vlan0 filter doesn't consume our VLAN filter's quota */
2009 if (vlan->vid != 0) {
2010 edev->non_configured_vlans--;
2011 edev->configured_vlans++;
2012 }
2013 }
2014
2015 /* enable accept_any_vlan mode if we have more VLANs than credits,
2016 * or remove accept_any_vlan mode if we've actually removed
2017 * a non-configured vlan, and all remaining vlans are truly configured.
2018 */
2019
2020 if (accept_any_vlan)
2021 qede_config_accept_any_vlan(edev, true);
2022 else if (!edev->non_configured_vlans)
2023 qede_config_accept_any_vlan(edev, false);
2024
2025 return real_rc;
2026}
2027
2028static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2029{
2030 struct qede_dev *edev = netdev_priv(dev);
2031 struct qede_vlan *vlan = NULL;
2032 int rc;
2033
2034 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2035
2036 /* Find whether entry exists */
2037 list_for_each_entry(vlan, &edev->vlan_list, list)
2038 if (vlan->vid == vid)
2039 break;
2040
2041 if (!vlan || (vlan->vid != vid)) {
2042 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2043 "Vlan isn't configured\n");
2044 return 0;
2045 }
2046
2047 if (edev->state != QEDE_STATE_OPEN) {
2048 /* As interface is already down, we don't have a VPORT
2049 * instance to remove vlan filter. So just update vlan list
2050 */
2051 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2052 "Interface is down, removing VLAN from list only\n");
2053 qede_del_vlan_from_list(edev, vlan);
2054 return 0;
2055 }
2056
2057 /* Remove vlan */
2058 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
2059 if (rc) {
2060 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2061 return -EINVAL;
2062 }
2063
2064 qede_del_vlan_from_list(edev, vlan);
2065
2066 /* We have removed a VLAN - try to see if we can
2067 * configure non-configured VLAN from the list.
2068 */
2069 rc = qede_configure_vlan_filters(edev);
2070
2071 return rc;
2072}
2073
2074static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2075{
2076 struct qede_vlan *vlan = NULL;
2077
2078 if (list_empty(&edev->vlan_list))
2079 return;
2080
2081 list_for_each_entry(vlan, &edev->vlan_list, list) {
2082 if (!vlan->configured)
2083 continue;
2084
2085 vlan->configured = false;
2086
2087 /* vlan0 filter isn't consuming out of our quota */
2088 if (vlan->vid != 0) {
2089 edev->non_configured_vlans++;
2090 edev->configured_vlans--;
2091 }
2092
2093 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2094 "marked vlan %d as non-configured\n",
2095 vlan->vid);
2096 }
2097
2098 edev->accept_any_vlan = false;
2099}
2100
Yuval Mintzce2b8852016-05-26 11:01:18 +03002101int qede_set_features(struct net_device *dev, netdev_features_t features)
2102{
2103 struct qede_dev *edev = netdev_priv(dev);
2104 netdev_features_t changes = features ^ dev->features;
2105 bool need_reload = false;
2106
2107 /* No action needed if hardware GRO is disabled during driver load */
2108 if (changes & NETIF_F_GRO) {
2109 if (dev->features & NETIF_F_GRO)
2110 need_reload = !edev->gro_disable;
2111 else
2112 need_reload = edev->gro_disable;
2113 }
2114
2115 if (need_reload && netif_running(edev->ndev)) {
2116 dev->features = features;
2117 qede_reload(edev, NULL, NULL);
2118 return 1;
2119 }
2120
2121 return 0;
2122}
2123
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002124static void qede_udp_tunnel_add(struct net_device *dev,
2125 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002126{
2127 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002128 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002129
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002130 switch (ti->type) {
2131 case UDP_TUNNEL_TYPE_VXLAN:
2132 if (edev->vxlan_dst_port)
2133 return;
2134
2135 edev->vxlan_dst_port = t_port;
2136
2137 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d",
2138 t_port);
2139
2140 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2141 break;
2142 case UDP_TUNNEL_TYPE_GENEVE:
2143 if (edev->geneve_dst_port)
2144 return;
2145
2146 edev->geneve_dst_port = t_port;
2147
2148 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d",
2149 t_port);
2150 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2151 break;
2152 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002153 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002154 }
Manish Choprab18e1702016-04-14 01:38:30 -04002155
Manish Choprab18e1702016-04-14 01:38:30 -04002156 schedule_delayed_work(&edev->sp_task, 0);
2157}
2158
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002159static void qede_udp_tunnel_del(struct net_device *dev,
2160 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002161{
2162 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002163 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002164
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002165 switch (ti->type) {
2166 case UDP_TUNNEL_TYPE_VXLAN:
2167 if (t_port != edev->vxlan_dst_port)
2168 return;
2169
2170 edev->vxlan_dst_port = 0;
2171
2172 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d",
2173 t_port);
2174
2175 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2176 break;
2177 case UDP_TUNNEL_TYPE_GENEVE:
2178 if (t_port != edev->geneve_dst_port)
2179 return;
2180
2181 edev->geneve_dst_port = 0;
2182
2183 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d",
2184 t_port);
2185 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2186 break;
2187 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002188 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002189 }
Manish Choprab18e1702016-04-14 01:38:30 -04002190
Manish Choprab18e1702016-04-14 01:38:30 -04002191 schedule_delayed_work(&edev->sp_task, 0);
2192}
Manish Chopra9a109dd2016-04-14 01:38:31 -04002193
Yuval Mintz29502192015-10-26 11:02:29 +02002194static const struct net_device_ops qede_netdev_ops = {
2195 .ndo_open = qede_open,
2196 .ndo_stop = qede_close,
2197 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002198 .ndo_set_rx_mode = qede_set_rx_mode,
2199 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02002200 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002201 .ndo_change_mtu = qede_change_mtu,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002202#ifdef CONFIG_QED_SRIOV
Yuval Mintzeff16962016-05-11 16:36:21 +03002203 .ndo_set_vf_mac = qede_set_vf_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002204 .ndo_set_vf_vlan = qede_set_vf_vlan,
2205#endif
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002206 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2207 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Yuval Mintzce2b8852016-05-26 11:01:18 +03002208 .ndo_set_features = qede_set_features,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002209 .ndo_get_stats64 = qede_get_stats64,
Yuval Mintz733def62016-05-11 16:36:22 +03002210#ifdef CONFIG_QED_SRIOV
2211 .ndo_set_vf_link_state = qede_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03002212 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
Yuval Mintz73390ac2016-05-11 16:36:24 +03002213 .ndo_get_vf_config = qede_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03002214 .ndo_set_vf_rate = qede_set_vf_rate,
2215#endif
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002216 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2217 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
Yuval Mintz29502192015-10-26 11:02:29 +02002218};
2219
2220/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02002221 * START OF PROBE / REMOVE
2222 * -------------------------------------------------------------------------
2223 */
2224
2225static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2226 struct pci_dev *pdev,
2227 struct qed_dev_eth_info *info,
2228 u32 dp_module,
2229 u8 dp_level)
2230{
2231 struct net_device *ndev;
2232 struct qede_dev *edev;
2233
2234 ndev = alloc_etherdev_mqs(sizeof(*edev),
2235 info->num_queues,
2236 info->num_queues);
2237 if (!ndev) {
2238 pr_err("etherdev allocation failed\n");
2239 return NULL;
2240 }
2241
2242 edev = netdev_priv(ndev);
2243 edev->ndev = ndev;
2244 edev->cdev = cdev;
2245 edev->pdev = pdev;
2246 edev->dp_module = dp_module;
2247 edev->dp_level = dp_level;
2248 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02002249 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2250 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02002251
Yuval Mintze712d522015-10-26 11:02:27 +02002252 SET_NETDEV_DEV(ndev, &pdev->dev);
2253
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002254 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02002255 memcpy(&edev->dev_info, info, sizeof(*info));
2256
2257 edev->num_tc = edev->dev_info.num_tc;
2258
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002259 INIT_LIST_HEAD(&edev->vlan_list);
2260
Yuval Mintze712d522015-10-26 11:02:27 +02002261 return edev;
2262}
2263
2264static void qede_init_ndev(struct qede_dev *edev)
2265{
2266 struct net_device *ndev = edev->ndev;
2267 struct pci_dev *pdev = edev->pdev;
2268 u32 hw_features;
2269
2270 pci_set_drvdata(pdev, ndev);
2271
2272 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2273 ndev->base_addr = ndev->mem_start;
2274 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2275 ndev->irq = edev->dev_info.common.pci_irq;
2276
2277 ndev->watchdog_timeo = TX_TIMEOUT;
2278
Yuval Mintz29502192015-10-26 11:02:29 +02002279 ndev->netdev_ops = &qede_netdev_ops;
2280
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002281 qede_set_ethtool_ops(ndev);
2282
Yuval Mintze712d522015-10-26 11:02:27 +02002283 /* user-changeble features */
2284 hw_features = NETIF_F_GRO | NETIF_F_SG |
2285 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2286 NETIF_F_TSO | NETIF_F_TSO6;
2287
Manish Chopra14db81d2016-04-14 01:38:33 -04002288 /* Encap features*/
2289 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2290 NETIF_F_TSO_ECN;
2291 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2292 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2293 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2294 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2295
Yuval Mintze712d522015-10-26 11:02:27 +02002296 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2297 NETIF_F_HIGHDMA;
2298 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2299 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002300 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02002301
2302 ndev->hw_features = hw_features;
2303
2304 /* Set network device HW mac */
2305 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2306}
2307
2308/* This function converts from 32b param to two params of level and module
2309 * Input 32b decoding:
2310 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2311 * 'happy' flow, e.g. memory allocation failed.
2312 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2313 * and provide important parameters.
2314 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2315 * module. VERBOSE prints are for tracking the specific flow in low level.
2316 *
2317 * Notice that the level should be that of the lowest required logs.
2318 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002319void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002320{
2321 *p_dp_level = QED_LEVEL_NOTICE;
2322 *p_dp_module = 0;
2323
2324 if (debug & QED_LOG_VERBOSE_MASK) {
2325 *p_dp_level = QED_LEVEL_VERBOSE;
2326 *p_dp_module = (debug & 0x3FFFFFFF);
2327 } else if (debug & QED_LOG_INFO_MASK) {
2328 *p_dp_level = QED_LEVEL_INFO;
2329 } else if (debug & QED_LOG_NOTICE_MASK) {
2330 *p_dp_level = QED_LEVEL_NOTICE;
2331 }
2332}
2333
Yuval Mintz29502192015-10-26 11:02:29 +02002334static void qede_free_fp_array(struct qede_dev *edev)
2335{
2336 if (edev->fp_array) {
2337 struct qede_fastpath *fp;
2338 int i;
2339
2340 for_each_rss(i) {
2341 fp = &edev->fp_array[i];
2342
2343 kfree(fp->sb_info);
2344 kfree(fp->rxq);
2345 kfree(fp->txqs);
2346 }
2347 kfree(edev->fp_array);
2348 }
2349 edev->num_rss = 0;
2350}
2351
2352static int qede_alloc_fp_array(struct qede_dev *edev)
2353{
2354 struct qede_fastpath *fp;
2355 int i;
2356
2357 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2358 sizeof(*edev->fp_array), GFP_KERNEL);
2359 if (!edev->fp_array) {
2360 DP_NOTICE(edev, "fp array allocation failed\n");
2361 goto err;
2362 }
2363
2364 for_each_rss(i) {
2365 fp = &edev->fp_array[i];
2366
2367 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2368 if (!fp->sb_info) {
2369 DP_NOTICE(edev, "sb info struct allocation failed\n");
2370 goto err;
2371 }
2372
2373 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2374 if (!fp->rxq) {
2375 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2376 goto err;
2377 }
2378
2379 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2380 if (!fp->txqs) {
2381 DP_NOTICE(edev, "TXQ array allocation failed\n");
2382 goto err;
2383 }
2384 }
2385
2386 return 0;
2387err:
2388 qede_free_fp_array(edev);
2389 return -ENOMEM;
2390}
2391
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002392static void qede_sp_task(struct work_struct *work)
2393{
2394 struct qede_dev *edev = container_of(work, struct qede_dev,
2395 sp_task.work);
Manish Choprab18e1702016-04-14 01:38:30 -04002396 struct qed_dev *cdev = edev->cdev;
2397
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002398 mutex_lock(&edev->qede_lock);
2399
2400 if (edev->state == QEDE_STATE_OPEN) {
2401 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2402 qede_config_rx_mode(edev->ndev);
2403 }
2404
Manish Choprab18e1702016-04-14 01:38:30 -04002405 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2406 struct qed_tunn_params tunn_params;
2407
2408 memset(&tunn_params, 0, sizeof(tunn_params));
2409 tunn_params.update_vxlan_port = 1;
2410 tunn_params.vxlan_port = edev->vxlan_dst_port;
2411 qed_ops->tunn_config(cdev, &tunn_params);
2412 }
2413
Manish Chopra9a109dd2016-04-14 01:38:31 -04002414 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2415 struct qed_tunn_params tunn_params;
2416
2417 memset(&tunn_params, 0, sizeof(tunn_params));
2418 tunn_params.update_geneve_port = 1;
2419 tunn_params.geneve_port = edev->geneve_dst_port;
2420 qed_ops->tunn_config(cdev, &tunn_params);
2421 }
2422
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002423 mutex_unlock(&edev->qede_lock);
2424}
2425
Yuval Mintze712d522015-10-26 11:02:27 +02002426static void qede_update_pf_params(struct qed_dev *cdev)
2427{
2428 struct qed_pf_params pf_params;
2429
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002430 /* 64 rx + 64 tx */
Yuval Mintze712d522015-10-26 11:02:27 +02002431 memset(&pf_params, 0, sizeof(struct qed_pf_params));
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002432 pf_params.eth_pf_params.num_cons = 128;
Yuval Mintze712d522015-10-26 11:02:27 +02002433 qed_ops->common->update_pf_params(cdev, &pf_params);
2434}
2435
2436enum qede_probe_mode {
2437 QEDE_PROBE_NORMAL,
2438};
2439
2440static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002441 bool is_vf, enum qede_probe_mode mode)
Yuval Mintze712d522015-10-26 11:02:27 +02002442{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002443 struct qed_probe_params probe_params;
Yuval Mintze712d522015-10-26 11:02:27 +02002444 struct qed_slowpath_params params;
2445 struct qed_dev_eth_info dev_info;
2446 struct qede_dev *edev;
2447 struct qed_dev *cdev;
2448 int rc;
2449
2450 if (unlikely(dp_level & QED_LEVEL_INFO))
2451 pr_notice("Starting qede probe\n");
2452
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002453 memset(&probe_params, 0, sizeof(probe_params));
2454 probe_params.protocol = QED_PROTOCOL_ETH;
2455 probe_params.dp_module = dp_module;
2456 probe_params.dp_level = dp_level;
2457 probe_params.is_vf = is_vf;
2458 cdev = qed_ops->common->probe(pdev, &probe_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002459 if (!cdev) {
2460 rc = -ENODEV;
2461 goto err0;
2462 }
2463
2464 qede_update_pf_params(cdev);
2465
2466 /* Start the Slowpath-process */
2467 memset(&params, 0, sizeof(struct qed_slowpath_params));
2468 params.int_mode = QED_INT_MODE_MSIX;
2469 params.drv_major = QEDE_MAJOR_VERSION;
2470 params.drv_minor = QEDE_MINOR_VERSION;
2471 params.drv_rev = QEDE_REVISION_VERSION;
2472 params.drv_eng = QEDE_ENGINEERING_VERSION;
2473 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2474 rc = qed_ops->common->slowpath_start(cdev, &params);
2475 if (rc) {
2476 pr_notice("Cannot start slowpath\n");
2477 goto err1;
2478 }
2479
2480 /* Learn information crucial for qede to progress */
2481 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2482 if (rc)
2483 goto err2;
2484
2485 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2486 dp_level);
2487 if (!edev) {
2488 rc = -ENOMEM;
2489 goto err2;
2490 }
2491
Yuval Mintzfefb0202016-05-11 16:36:19 +03002492 if (is_vf)
2493 edev->flags |= QEDE_FLAG_IS_VF;
2494
Yuval Mintze712d522015-10-26 11:02:27 +02002495 qede_init_ndev(edev);
2496
Yuval Mintz29502192015-10-26 11:02:29 +02002497 rc = register_netdev(edev->ndev);
2498 if (rc) {
2499 DP_NOTICE(edev, "Cannot register net-device\n");
2500 goto err3;
2501 }
2502
Yuval Mintze712d522015-10-26 11:02:27 +02002503 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2504
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002505 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2506
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002507#ifdef CONFIG_DCB
2508 qede_set_dcbnl_ops(edev->ndev);
2509#endif
2510
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002511 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2512 mutex_init(&edev->qede_lock);
2513
Yuval Mintze712d522015-10-26 11:02:27 +02002514 DP_INFO(edev, "Ending successfully qede probe\n");
2515
2516 return 0;
2517
Yuval Mintz29502192015-10-26 11:02:29 +02002518err3:
2519 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02002520err2:
2521 qed_ops->common->slowpath_stop(cdev);
2522err1:
2523 qed_ops->common->remove(cdev);
2524err0:
2525 return rc;
2526}
2527
2528static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2529{
Yuval Mintzfefb0202016-05-11 16:36:19 +03002530 bool is_vf = false;
Yuval Mintze712d522015-10-26 11:02:27 +02002531 u32 dp_module = 0;
2532 u8 dp_level = 0;
2533
Yuval Mintzfefb0202016-05-11 16:36:19 +03002534 switch ((enum qede_pci_private)id->driver_data) {
2535 case QEDE_PRIVATE_VF:
2536 if (debug & QED_LOG_VERBOSE_MASK)
2537 dev_err(&pdev->dev, "Probing a VF\n");
2538 is_vf = true;
2539 break;
2540 default:
2541 if (debug & QED_LOG_VERBOSE_MASK)
2542 dev_err(&pdev->dev, "Probing a PF\n");
2543 }
2544
Yuval Mintze712d522015-10-26 11:02:27 +02002545 qede_config_debug(debug, &dp_module, &dp_level);
2546
Yuval Mintzfefb0202016-05-11 16:36:19 +03002547 return __qede_probe(pdev, dp_module, dp_level, is_vf,
Yuval Mintze712d522015-10-26 11:02:27 +02002548 QEDE_PROBE_NORMAL);
2549}
2550
2551enum qede_remove_mode {
2552 QEDE_REMOVE_NORMAL,
2553};
2554
2555static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2556{
2557 struct net_device *ndev = pci_get_drvdata(pdev);
2558 struct qede_dev *edev = netdev_priv(ndev);
2559 struct qed_dev *cdev = edev->cdev;
2560
2561 DP_INFO(edev, "Starting qede_remove\n");
2562
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002563 cancel_delayed_work_sync(&edev->sp_task);
Yuval Mintz29502192015-10-26 11:02:29 +02002564 unregister_netdev(ndev);
2565
Yuval Mintze712d522015-10-26 11:02:27 +02002566 edev->ops->common->set_power_state(cdev, PCI_D0);
2567
2568 pci_set_drvdata(pdev, NULL);
2569
2570 free_netdev(ndev);
2571
2572 /* Use global ops since we've freed edev */
2573 qed_ops->common->slowpath_stop(cdev);
2574 qed_ops->common->remove(cdev);
2575
2576 pr_notice("Ending successfully qede_remove\n");
2577}
2578
2579static void qede_remove(struct pci_dev *pdev)
2580{
2581 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2582}
Yuval Mintz29502192015-10-26 11:02:29 +02002583
2584/* -------------------------------------------------------------------------
2585 * START OF LOAD / UNLOAD
2586 * -------------------------------------------------------------------------
2587 */
2588
2589static int qede_set_num_queues(struct qede_dev *edev)
2590{
2591 int rc;
2592 u16 rss_num;
2593
2594 /* Setup queues according to possible resources*/
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02002595 if (edev->req_rss)
2596 rss_num = edev->req_rss;
2597 else
2598 rss_num = netif_get_num_default_rss_queues() *
2599 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02002600
2601 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2602
2603 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2604 if (rc > 0) {
2605 /* Managed to request interrupts for our queues */
2606 edev->num_rss = rc;
2607 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2608 QEDE_RSS_CNT(edev), rss_num);
2609 rc = 0;
2610 }
2611 return rc;
2612}
2613
2614static void qede_free_mem_sb(struct qede_dev *edev,
2615 struct qed_sb_info *sb_info)
2616{
2617 if (sb_info->sb_virt)
2618 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2619 (void *)sb_info->sb_virt, sb_info->sb_phys);
2620}
2621
2622/* This function allocates fast-path status block memory */
2623static int qede_alloc_mem_sb(struct qede_dev *edev,
2624 struct qed_sb_info *sb_info,
2625 u16 sb_id)
2626{
2627 struct status_block *sb_virt;
2628 dma_addr_t sb_phys;
2629 int rc;
2630
2631 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2632 sizeof(*sb_virt),
2633 &sb_phys, GFP_KERNEL);
2634 if (!sb_virt) {
2635 DP_ERR(edev, "Status block allocation failed\n");
2636 return -ENOMEM;
2637 }
2638
2639 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2640 sb_virt, sb_phys, sb_id,
2641 QED_SB_TYPE_L2_QUEUE);
2642 if (rc) {
2643 DP_ERR(edev, "Status block initialization failed\n");
2644 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2645 sb_virt, sb_phys);
2646 return rc;
2647 }
2648
2649 return 0;
2650}
2651
2652static void qede_free_rx_buffers(struct qede_dev *edev,
2653 struct qede_rx_queue *rxq)
2654{
2655 u16 i;
2656
2657 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2658 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002659 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002660
2661 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2662 data = rx_buf->data;
2663
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002664 dma_unmap_page(&edev->pdev->dev,
2665 rx_buf->mapping,
2666 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002667
2668 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002669 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002670 }
2671}
2672
Manish Chopra55482ed2016-03-04 12:35:06 -05002673static void qede_free_sge_mem(struct qede_dev *edev,
2674 struct qede_rx_queue *rxq) {
2675 int i;
2676
2677 if (edev->gro_disable)
2678 return;
2679
2680 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2681 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2682 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2683
Manish Chopraf86af2d2016-04-20 03:03:27 -04002684 if (replace_buf->data) {
Manish Chopra55482ed2016-03-04 12:35:06 -05002685 dma_unmap_page(&edev->pdev->dev,
Manish Chopra09ec8e72016-05-18 07:43:57 -04002686 replace_buf->mapping,
Manish Chopra55482ed2016-03-04 12:35:06 -05002687 PAGE_SIZE, DMA_FROM_DEVICE);
2688 __free_page(replace_buf->data);
2689 }
2690 }
2691}
2692
Yuval Mintz29502192015-10-26 11:02:29 +02002693static void qede_free_mem_rxq(struct qede_dev *edev,
2694 struct qede_rx_queue *rxq)
2695{
Manish Chopra55482ed2016-03-04 12:35:06 -05002696 qede_free_sge_mem(edev, rxq);
2697
Yuval Mintz29502192015-10-26 11:02:29 +02002698 /* Free rx buffers */
2699 qede_free_rx_buffers(edev, rxq);
2700
2701 /* Free the parallel SW ring */
2702 kfree(rxq->sw_rx_ring);
2703
2704 /* Free the real RQ ring used by FW */
2705 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2706 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2707}
2708
2709static int qede_alloc_rx_buffer(struct qede_dev *edev,
2710 struct qede_rx_queue *rxq)
2711{
2712 struct sw_rx_data *sw_rx_data;
2713 struct eth_rx_bd *rx_bd;
2714 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002715 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002716 u16 rx_buf_size;
Yuval Mintz29502192015-10-26 11:02:29 +02002717
2718 rx_buf_size = rxq->rx_buf_size;
2719
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002720 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02002721 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002722 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02002723 return -ENOMEM;
2724 }
2725
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002726 /* Map the entire page as it would be used
2727 * for multiple RX buffer segment size mapping.
2728 */
2729 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2730 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002731 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002732 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002733 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2734 return -ENOMEM;
2735 }
2736
2737 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002738 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002739 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002740 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02002741
2742 /* Advance PROD and get BD pointer */
2743 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2744 WARN_ON(!rx_bd);
2745 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2746 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2747
2748 rxq->sw_rx_prod++;
2749
2750 return 0;
2751}
2752
Manish Chopra55482ed2016-03-04 12:35:06 -05002753static int qede_alloc_sge_mem(struct qede_dev *edev,
2754 struct qede_rx_queue *rxq)
2755{
2756 dma_addr_t mapping;
2757 int i;
2758
2759 if (edev->gro_disable)
2760 return 0;
2761
2762 if (edev->ndev->mtu > PAGE_SIZE) {
2763 edev->gro_disable = 1;
2764 return 0;
2765 }
2766
2767 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2768 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2769 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2770
2771 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2772 if (unlikely(!replace_buf->data)) {
2773 DP_NOTICE(edev,
2774 "Failed to allocate TPA skb pool [replacement buffer]\n");
2775 goto err;
2776 }
2777
2778 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2779 rxq->rx_buf_size, DMA_FROM_DEVICE);
2780 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2781 DP_NOTICE(edev,
2782 "Failed to map TPA replacement buffer\n");
2783 goto err;
2784 }
2785
Manish Chopra09ec8e72016-05-18 07:43:57 -04002786 replace_buf->mapping = mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05002787 tpa_info->replace_buf.page_offset = 0;
2788
2789 tpa_info->replace_buf_mapping = mapping;
2790 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2791 }
2792
2793 return 0;
2794err:
2795 qede_free_sge_mem(edev, rxq);
2796 edev->gro_disable = 1;
2797 return -ENOMEM;
2798}
2799
Yuval Mintz29502192015-10-26 11:02:29 +02002800/* This function allocates all memory needed per Rx queue */
2801static int qede_alloc_mem_rxq(struct qede_dev *edev,
2802 struct qede_rx_queue *rxq)
2803{
Manish Chopraf86af2d2016-04-20 03:03:27 -04002804 int i, rc, size;
Yuval Mintz29502192015-10-26 11:02:29 +02002805
2806 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2807
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002808 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2809 edev->ndev->mtu;
2810 if (rxq->rx_buf_size > PAGE_SIZE)
2811 rxq->rx_buf_size = PAGE_SIZE;
2812
2813 /* Segment size to spilt a page in multiple equal parts */
2814 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002815
2816 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002817 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002818 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2819 if (!rxq->sw_rx_ring) {
2820 DP_ERR(edev, "Rx buffers ring allocation failed\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04002821 rc = -ENOMEM;
Yuval Mintz29502192015-10-26 11:02:29 +02002822 goto err;
2823 }
2824
2825 /* Allocate FW Rx ring */
2826 rc = edev->ops->common->chain_alloc(edev->cdev,
2827 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2828 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintza91eb522016-06-03 14:35:32 +03002829 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002830 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002831 sizeof(struct eth_rx_bd),
2832 &rxq->rx_bd_ring);
2833
2834 if (rc)
2835 goto err;
2836
2837 /* Allocate FW completion ring */
2838 rc = edev->ops->common->chain_alloc(edev->cdev,
2839 QED_CHAIN_USE_TO_CONSUME,
2840 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002841 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002842 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002843 sizeof(union eth_rx_cqe),
2844 &rxq->rx_comp_ring);
2845 if (rc)
2846 goto err;
2847
2848 /* Allocate buffers for the Rx ring */
2849 for (i = 0; i < rxq->num_rx_buffers; i++) {
2850 rc = qede_alloc_rx_buffer(edev, rxq);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002851 if (rc) {
2852 DP_ERR(edev,
2853 "Rx buffers allocation failed at index %d\n", i);
2854 goto err;
2855 }
Yuval Mintz29502192015-10-26 11:02:29 +02002856 }
2857
Manish Chopraf86af2d2016-04-20 03:03:27 -04002858 rc = qede_alloc_sge_mem(edev, rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02002859err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002860 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002861}
2862
2863static void qede_free_mem_txq(struct qede_dev *edev,
2864 struct qede_tx_queue *txq)
2865{
2866 /* Free the parallel SW ring */
2867 kfree(txq->sw_tx_ring);
2868
2869 /* Free the real RQ ring used by FW */
2870 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2871}
2872
2873/* This function allocates all memory needed per Tx queue */
2874static int qede_alloc_mem_txq(struct qede_dev *edev,
2875 struct qede_tx_queue *txq)
2876{
2877 int size, rc;
2878 union eth_tx_bd_types *p_virt;
2879
2880 txq->num_tx_buffers = edev->q_num_tx_buffers;
2881
2882 /* Allocate the parallel driver ring for Tx buffers */
2883 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2884 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2885 if (!txq->sw_tx_ring) {
2886 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2887 goto err;
2888 }
2889
2890 rc = edev->ops->common->chain_alloc(edev->cdev,
2891 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2892 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002893 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintz29502192015-10-26 11:02:29 +02002894 NUM_TX_BDS_MAX,
Yuval Mintza91eb522016-06-03 14:35:32 +03002895 sizeof(*p_virt), &txq->tx_pbl);
Yuval Mintz29502192015-10-26 11:02:29 +02002896 if (rc)
2897 goto err;
2898
2899 return 0;
2900
2901err:
2902 qede_free_mem_txq(edev, txq);
2903 return -ENOMEM;
2904}
2905
2906/* This function frees all memory of a single fp */
2907static void qede_free_mem_fp(struct qede_dev *edev,
2908 struct qede_fastpath *fp)
2909{
2910 int tc;
2911
2912 qede_free_mem_sb(edev, fp->sb_info);
2913
2914 qede_free_mem_rxq(edev, fp->rxq);
2915
2916 for (tc = 0; tc < edev->num_tc; tc++)
2917 qede_free_mem_txq(edev, &fp->txqs[tc]);
2918}
2919
2920/* This function allocates all memory needed for a single fp (i.e. an entity
2921 * which contains status block, one rx queue and multiple per-TC tx queues.
2922 */
2923static int qede_alloc_mem_fp(struct qede_dev *edev,
2924 struct qede_fastpath *fp)
2925{
2926 int rc, tc;
2927
2928 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2929 if (rc)
2930 goto err;
2931
2932 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2933 if (rc)
2934 goto err;
2935
2936 for (tc = 0; tc < edev->num_tc; tc++) {
2937 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2938 if (rc)
2939 goto err;
2940 }
2941
2942 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002943err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002944 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002945}
2946
2947static void qede_free_mem_load(struct qede_dev *edev)
2948{
2949 int i;
2950
2951 for_each_rss(i) {
2952 struct qede_fastpath *fp = &edev->fp_array[i];
2953
2954 qede_free_mem_fp(edev, fp);
2955 }
2956}
2957
2958/* This function allocates all qede memory at NIC load. */
2959static int qede_alloc_mem_load(struct qede_dev *edev)
2960{
2961 int rc = 0, rss_id;
2962
2963 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2964 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2965
2966 rc = qede_alloc_mem_fp(edev, fp);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002967 if (rc) {
Yuval Mintz29502192015-10-26 11:02:29 +02002968 DP_ERR(edev,
Manish Chopraf86af2d2016-04-20 03:03:27 -04002969 "Failed to allocate memory for fastpath - rss id = %d\n",
2970 rss_id);
2971 qede_free_mem_load(edev);
2972 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002973 }
Yuval Mintz29502192015-10-26 11:02:29 +02002974 }
2975
2976 return 0;
2977}
2978
2979/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2980static void qede_init_fp(struct qede_dev *edev)
2981{
2982 int rss_id, txq_index, tc;
2983 struct qede_fastpath *fp;
2984
2985 for_each_rss(rss_id) {
2986 fp = &edev->fp_array[rss_id];
2987
2988 fp->edev = edev;
2989 fp->rss_id = rss_id;
2990
2991 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2992
2993 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2994
2995 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2996 fp->rxq->rxq_id = rss_id;
2997
2998 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2999 for (tc = 0; tc < edev->num_tc; tc++) {
3000 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
3001 fp->txqs[tc].index = txq_index;
3002 }
3003
3004 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
3005 edev->ndev->name, rss_id);
3006 }
Manish Chopra55482ed2016-03-04 12:35:06 -05003007
3008 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
Yuval Mintz29502192015-10-26 11:02:29 +02003009}
3010
3011static int qede_set_real_num_queues(struct qede_dev *edev)
3012{
3013 int rc = 0;
3014
3015 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3016 if (rc) {
3017 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3018 return rc;
3019 }
3020 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3021 if (rc) {
3022 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3023 return rc;
3024 }
3025
3026 return 0;
3027}
3028
3029static void qede_napi_disable_remove(struct qede_dev *edev)
3030{
3031 int i;
3032
3033 for_each_rss(i) {
3034 napi_disable(&edev->fp_array[i].napi);
3035
3036 netif_napi_del(&edev->fp_array[i].napi);
3037 }
3038}
3039
3040static void qede_napi_add_enable(struct qede_dev *edev)
3041{
3042 int i;
3043
3044 /* Add NAPI objects */
3045 for_each_rss(i) {
3046 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3047 qede_poll, NAPI_POLL_WEIGHT);
3048 napi_enable(&edev->fp_array[i].napi);
3049 }
3050}
3051
3052static void qede_sync_free_irqs(struct qede_dev *edev)
3053{
3054 int i;
3055
3056 for (i = 0; i < edev->int_info.used_cnt; i++) {
3057 if (edev->int_info.msix_cnt) {
3058 synchronize_irq(edev->int_info.msix[i].vector);
3059 free_irq(edev->int_info.msix[i].vector,
3060 &edev->fp_array[i]);
3061 } else {
3062 edev->ops->common->simd_handler_clean(edev->cdev, i);
3063 }
3064 }
3065
3066 edev->int_info.used_cnt = 0;
3067}
3068
3069static int qede_req_msix_irqs(struct qede_dev *edev)
3070{
3071 int i, rc;
3072
3073 /* Sanitize number of interrupts == number of prepared RSS queues */
3074 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3075 DP_ERR(edev,
3076 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3077 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3078 return -EINVAL;
3079 }
3080
3081 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3082 rc = request_irq(edev->int_info.msix[i].vector,
3083 qede_msix_fp_int, 0, edev->fp_array[i].name,
3084 &edev->fp_array[i]);
3085 if (rc) {
3086 DP_ERR(edev, "Request fp %d irq failed\n", i);
3087 qede_sync_free_irqs(edev);
3088 return rc;
3089 }
3090 DP_VERBOSE(edev, NETIF_MSG_INTR,
3091 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3092 edev->fp_array[i].name, i,
3093 &edev->fp_array[i]);
3094 edev->int_info.used_cnt++;
3095 }
3096
3097 return 0;
3098}
3099
3100static void qede_simd_fp_handler(void *cookie)
3101{
3102 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3103
3104 napi_schedule_irqoff(&fp->napi);
3105}
3106
3107static int qede_setup_irqs(struct qede_dev *edev)
3108{
3109 int i, rc = 0;
3110
3111 /* Learn Interrupt configuration */
3112 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3113 if (rc)
3114 return rc;
3115
3116 if (edev->int_info.msix_cnt) {
3117 rc = qede_req_msix_irqs(edev);
3118 if (rc)
3119 return rc;
3120 edev->ndev->irq = edev->int_info.msix[0].vector;
3121 } else {
3122 const struct qed_common_ops *ops;
3123
3124 /* qed should learn receive the RSS ids and callbacks */
3125 ops = edev->ops->common;
3126 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3127 ops->simd_handler_config(edev->cdev,
3128 &edev->fp_array[i], i,
3129 qede_simd_fp_handler);
3130 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3131 }
3132 return 0;
3133}
3134
3135static int qede_drain_txq(struct qede_dev *edev,
3136 struct qede_tx_queue *txq,
3137 bool allow_drain)
3138{
3139 int rc, cnt = 1000;
3140
3141 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3142 if (!cnt) {
3143 if (allow_drain) {
3144 DP_NOTICE(edev,
3145 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3146 txq->index);
3147 rc = edev->ops->common->drain(edev->cdev);
3148 if (rc)
3149 return rc;
3150 return qede_drain_txq(edev, txq, false);
3151 }
3152 DP_NOTICE(edev,
3153 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3154 txq->index, txq->sw_tx_prod,
3155 txq->sw_tx_cons);
3156 return -ENODEV;
3157 }
3158 cnt--;
3159 usleep_range(1000, 2000);
3160 barrier();
3161 }
3162
3163 /* FW finished processing, wait for HW to transmit all tx packets */
3164 usleep_range(1000, 2000);
3165
3166 return 0;
3167}
3168
3169static int qede_stop_queues(struct qede_dev *edev)
3170{
3171 struct qed_update_vport_params vport_update_params;
3172 struct qed_dev *cdev = edev->cdev;
3173 int rc, tc, i;
3174
3175 /* Disable the vport */
3176 memset(&vport_update_params, 0, sizeof(vport_update_params));
3177 vport_update_params.vport_id = 0;
3178 vport_update_params.update_vport_active_flg = 1;
3179 vport_update_params.vport_active_flg = 0;
3180 vport_update_params.update_rss_flg = 0;
3181
3182 rc = edev->ops->vport_update(cdev, &vport_update_params);
3183 if (rc) {
3184 DP_ERR(edev, "Failed to update vport\n");
3185 return rc;
3186 }
3187
3188 /* Flush Tx queues. If needed, request drain from MCP */
3189 for_each_rss(i) {
3190 struct qede_fastpath *fp = &edev->fp_array[i];
3191
3192 for (tc = 0; tc < edev->num_tc; tc++) {
3193 struct qede_tx_queue *txq = &fp->txqs[tc];
3194
3195 rc = qede_drain_txq(edev, txq, true);
3196 if (rc)
3197 return rc;
3198 }
3199 }
3200
3201 /* Stop all Queues in reverse order*/
3202 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3203 struct qed_stop_rxq_params rx_params;
3204
3205 /* Stop the Tx Queue(s)*/
3206 for (tc = 0; tc < edev->num_tc; tc++) {
3207 struct qed_stop_txq_params tx_params;
3208
3209 tx_params.rss_id = i;
3210 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3211 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3212 if (rc) {
3213 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3214 tx_params.tx_queue_id);
3215 return rc;
3216 }
3217 }
3218
3219 /* Stop the Rx Queue*/
3220 memset(&rx_params, 0, sizeof(rx_params));
3221 rx_params.rss_id = i;
3222 rx_params.rx_queue_id = i;
3223
3224 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3225 if (rc) {
3226 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3227 return rc;
3228 }
3229 }
3230
3231 /* Stop the vport */
3232 rc = edev->ops->vport_stop(cdev, 0);
3233 if (rc)
3234 DP_ERR(edev, "Failed to stop VPORT\n");
3235
3236 return rc;
3237}
3238
Yuval Mintza0d26d52016-06-19 15:18:13 +03003239static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
Yuval Mintz29502192015-10-26 11:02:29 +02003240{
3241 int rc, tc, i;
Manish Chopra088c8612016-03-04 12:35:05 -05003242 int vlan_removal_en = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003243 struct qed_dev *cdev = edev->cdev;
Yuval Mintz29502192015-10-26 11:02:29 +02003244 struct qed_update_vport_params vport_update_params;
3245 struct qed_queue_start_common_params q_params;
Yuval Mintzfefb0202016-05-11 16:36:19 +03003246 struct qed_dev_info *qed_info = &edev->dev_info.common;
Manish Chopra088c8612016-03-04 12:35:05 -05003247 struct qed_start_vport_params start = {0};
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003248 bool reset_rss_indir = false;
Yuval Mintz29502192015-10-26 11:02:29 +02003249
3250 if (!edev->num_rss) {
3251 DP_ERR(edev,
3252 "Cannot update V-VPORT as active as there are no Rx queues\n");
3253 return -EINVAL;
3254 }
3255
Manish Chopra55482ed2016-03-04 12:35:06 -05003256 start.gro_enable = !edev->gro_disable;
Manish Chopra088c8612016-03-04 12:35:05 -05003257 start.mtu = edev->ndev->mtu;
3258 start.vport_id = 0;
3259 start.drop_ttl0 = true;
3260 start.remove_inner_vlan = vlan_removal_en;
3261
3262 rc = edev->ops->vport_start(cdev, &start);
Yuval Mintz29502192015-10-26 11:02:29 +02003263
3264 if (rc) {
3265 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3266 return rc;
3267 }
3268
3269 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3270 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
Manish Chopra088c8612016-03-04 12:35:05 -05003271 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
Yuval Mintz29502192015-10-26 11:02:29 +02003272
3273 for_each_rss(i) {
3274 struct qede_fastpath *fp = &edev->fp_array[i];
3275 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3276
3277 memset(&q_params, 0, sizeof(q_params));
3278 q_params.rss_id = i;
3279 q_params.queue_id = i;
3280 q_params.vport_id = 0;
3281 q_params.sb = fp->sb_info->igu_sb_id;
3282 q_params.sb_idx = RX_PI;
3283
3284 rc = edev->ops->q_rx_start(cdev, &q_params,
3285 fp->rxq->rx_buf_size,
3286 fp->rxq->rx_bd_ring.p_phys_addr,
3287 phys_table,
3288 fp->rxq->rx_comp_ring.page_cnt,
3289 &fp->rxq->hw_rxq_prod_addr);
3290 if (rc) {
3291 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3292 return rc;
3293 }
3294
3295 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3296
3297 qede_update_rx_prod(edev, fp->rxq);
3298
3299 for (tc = 0; tc < edev->num_tc; tc++) {
3300 struct qede_tx_queue *txq = &fp->txqs[tc];
3301 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3302
3303 memset(&q_params, 0, sizeof(q_params));
3304 q_params.rss_id = i;
3305 q_params.queue_id = txq_index;
3306 q_params.vport_id = 0;
3307 q_params.sb = fp->sb_info->igu_sb_id;
3308 q_params.sb_idx = TX_PI(tc);
3309
3310 rc = edev->ops->q_tx_start(cdev, &q_params,
3311 txq->tx_pbl.pbl.p_phys_table,
3312 txq->tx_pbl.page_cnt,
3313 &txq->doorbell_addr);
3314 if (rc) {
3315 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3316 txq_index, rc);
3317 return rc;
3318 }
3319
3320 txq->hw_cons_ptr =
3321 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3322 SET_FIELD(txq->tx_db.data.params,
3323 ETH_DB_DATA_DEST, DB_DEST_XCM);
3324 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3325 DB_AGG_CMD_SET);
3326 SET_FIELD(txq->tx_db.data.params,
3327 ETH_DB_DATA_AGG_VAL_SEL,
3328 DQ_XCM_ETH_TX_BD_PROD_CMD);
3329
3330 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3331 }
3332 }
3333
3334 /* Prepare and send the vport enable */
3335 memset(&vport_update_params, 0, sizeof(vport_update_params));
Manish Chopra088c8612016-03-04 12:35:05 -05003336 vport_update_params.vport_id = start.vport_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003337 vport_update_params.update_vport_active_flg = 1;
3338 vport_update_params.vport_active_flg = 1;
3339
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03003340 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3341 qed_info->tx_switching) {
3342 vport_update_params.update_tx_switching_flg = 1;
3343 vport_update_params.tx_switching_flg = 1;
3344 }
3345
Yuval Mintz29502192015-10-26 11:02:29 +02003346 /* Fill struct with RSS params */
3347 if (QEDE_RSS_CNT(edev) > 1) {
3348 vport_update_params.update_rss_flg = 1;
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003349
3350 /* Need to validate current RSS config uses valid entries */
3351 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3352 if (edev->rss_params.rss_ind_table[i] >=
3353 edev->num_rss) {
3354 reset_rss_indir = true;
3355 break;
3356 }
3357 }
3358
3359 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3360 reset_rss_indir) {
3361 u16 val;
3362
3363 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3364 u16 indir_val;
3365
3366 val = QEDE_RSS_CNT(edev);
3367 indir_val = ethtool_rxfh_indir_default(i, val);
3368 edev->rss_params.rss_ind_table[i] = indir_val;
3369 }
3370 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3371 }
3372
3373 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3374 netdev_rss_key_fill(edev->rss_params.rss_key,
3375 sizeof(edev->rss_params.rss_key));
3376 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3377 }
3378
3379 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3380 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3381 QED_RSS_IPV6 |
3382 QED_RSS_IPV4_TCP |
3383 QED_RSS_IPV6_TCP;
3384 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3385 }
3386
3387 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3388 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003389 } else {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003390 memset(&vport_update_params.rss_params, 0,
3391 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003392 }
Yuval Mintz29502192015-10-26 11:02:29 +02003393
3394 rc = edev->ops->vport_update(cdev, &vport_update_params);
3395 if (rc) {
3396 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3397 return rc;
3398 }
3399
3400 return 0;
3401}
3402
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003403static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3404 enum qed_filter_xcast_params_type opcode,
3405 unsigned char *mac, int num_macs)
3406{
3407 struct qed_filter_params filter_cmd;
3408 int i;
3409
3410 memset(&filter_cmd, 0, sizeof(filter_cmd));
3411 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3412 filter_cmd.filter.mcast.type = opcode;
3413 filter_cmd.filter.mcast.num = num_macs;
3414
3415 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3416 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3417
3418 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3419}
3420
Yuval Mintz29502192015-10-26 11:02:29 +02003421enum qede_unload_mode {
3422 QEDE_UNLOAD_NORMAL,
3423};
3424
3425static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3426{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003427 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02003428 int rc;
3429
3430 DP_INFO(edev, "Starting qede unload\n");
3431
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003432 mutex_lock(&edev->qede_lock);
3433 edev->state = QEDE_STATE_CLOSED;
3434
Yuval Mintz29502192015-10-26 11:02:29 +02003435 /* Close OS Tx */
3436 netif_tx_disable(edev->ndev);
3437 netif_carrier_off(edev->ndev);
3438
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003439 /* Reset the link */
3440 memset(&link_params, 0, sizeof(link_params));
3441 link_params.link_up = false;
3442 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02003443 rc = qede_stop_queues(edev);
3444 if (rc) {
3445 qede_sync_free_irqs(edev);
3446 goto out;
3447 }
3448
3449 DP_INFO(edev, "Stopped Queues\n");
3450
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003451 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003452 edev->ops->fastpath_stop(edev->cdev);
3453
3454 /* Release the interrupts */
3455 qede_sync_free_irqs(edev);
3456 edev->ops->common->set_fp_int(edev->cdev, 0);
3457
3458 qede_napi_disable_remove(edev);
3459
3460 qede_free_mem_load(edev);
3461 qede_free_fp_array(edev);
3462
3463out:
3464 mutex_unlock(&edev->qede_lock);
3465 DP_INFO(edev, "Ending qede unload\n");
3466}
3467
3468enum qede_load_mode {
3469 QEDE_LOAD_NORMAL,
Yuval Mintza0d26d52016-06-19 15:18:13 +03003470 QEDE_LOAD_RELOAD,
Yuval Mintz29502192015-10-26 11:02:29 +02003471};
3472
3473static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3474{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003475 struct qed_link_params link_params;
3476 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02003477 int rc;
3478
3479 DP_INFO(edev, "Starting qede load\n");
3480
3481 rc = qede_set_num_queues(edev);
3482 if (rc)
3483 goto err0;
3484
3485 rc = qede_alloc_fp_array(edev);
3486 if (rc)
3487 goto err0;
3488
3489 qede_init_fp(edev);
3490
3491 rc = qede_alloc_mem_load(edev);
3492 if (rc)
3493 goto err1;
3494 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3495 QEDE_RSS_CNT(edev), edev->num_tc);
3496
3497 rc = qede_set_real_num_queues(edev);
3498 if (rc)
3499 goto err2;
3500
3501 qede_napi_add_enable(edev);
3502 DP_INFO(edev, "Napi added and enabled\n");
3503
3504 rc = qede_setup_irqs(edev);
3505 if (rc)
3506 goto err3;
3507 DP_INFO(edev, "Setup IRQs succeeded\n");
3508
Yuval Mintza0d26d52016-06-19 15:18:13 +03003509 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
Yuval Mintz29502192015-10-26 11:02:29 +02003510 if (rc)
3511 goto err4;
3512 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3513
3514 /* Add primary mac and set Rx filters */
3515 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3516
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003517 mutex_lock(&edev->qede_lock);
3518 edev->state = QEDE_STATE_OPEN;
3519 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003520
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003521 /* Program un-configured VLANs */
3522 qede_configure_vlan_filters(edev);
3523
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003524 /* Ask for link-up using current configuration */
3525 memset(&link_params, 0, sizeof(link_params));
3526 link_params.link_up = true;
3527 edev->ops->common->set_link(edev->cdev, &link_params);
3528
3529 /* Query whether link is already-up */
3530 memset(&link_output, 0, sizeof(link_output));
3531 edev->ops->common->get_link(edev->cdev, &link_output);
3532 qede_link_update(edev, &link_output);
3533
Yuval Mintz29502192015-10-26 11:02:29 +02003534 DP_INFO(edev, "Ending successfully qede load\n");
3535
3536 return 0;
3537
3538err4:
3539 qede_sync_free_irqs(edev);
3540 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3541err3:
3542 qede_napi_disable_remove(edev);
3543err2:
3544 qede_free_mem_load(edev);
3545err1:
3546 edev->ops->common->set_fp_int(edev->cdev, 0);
3547 qede_free_fp_array(edev);
3548 edev->num_rss = 0;
3549err0:
3550 return rc;
3551}
3552
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003553void qede_reload(struct qede_dev *edev,
3554 void (*func)(struct qede_dev *, union qede_reload_args *),
3555 union qede_reload_args *args)
3556{
3557 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3558 /* Call function handler to update parameters
3559 * needed for function load.
3560 */
3561 if (func)
3562 func(edev, args);
3563
Yuval Mintza0d26d52016-06-19 15:18:13 +03003564 qede_load(edev, QEDE_LOAD_RELOAD);
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003565
3566 mutex_lock(&edev->qede_lock);
3567 qede_config_rx_mode(edev->ndev);
3568 mutex_unlock(&edev->qede_lock);
3569}
3570
Yuval Mintz29502192015-10-26 11:02:29 +02003571/* called with rtnl_lock */
3572static int qede_open(struct net_device *ndev)
3573{
3574 struct qede_dev *edev = netdev_priv(ndev);
Manish Choprab18e1702016-04-14 01:38:30 -04003575 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003576
3577 netif_carrier_off(ndev);
3578
3579 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3580
Manish Choprab18e1702016-04-14 01:38:30 -04003581 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3582
3583 if (rc)
3584 return rc;
3585
Alexander Duyckf9f082a2016-06-16 12:22:57 -07003586 udp_tunnel_get_rx_info(ndev);
3587
Manish Choprab18e1702016-04-14 01:38:30 -04003588 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003589}
3590
3591static int qede_close(struct net_device *ndev)
3592{
3593 struct qede_dev *edev = netdev_priv(ndev);
3594
3595 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3596
3597 return 0;
3598}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003599
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003600static void qede_link_update(void *dev, struct qed_link_output *link)
3601{
3602 struct qede_dev *edev = dev;
3603
3604 if (!netif_running(edev->ndev)) {
3605 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3606 return;
3607 }
3608
3609 if (link->link_up) {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003610 if (!netif_carrier_ok(edev->ndev)) {
3611 DP_NOTICE(edev, "Link is up\n");
3612 netif_tx_start_all_queues(edev->ndev);
3613 netif_carrier_on(edev->ndev);
3614 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003615 } else {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003616 if (netif_carrier_ok(edev->ndev)) {
3617 DP_NOTICE(edev, "Link is down\n");
3618 netif_tx_disable(edev->ndev);
3619 netif_carrier_off(edev->ndev);
3620 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003621 }
3622}
3623
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003624static int qede_set_mac_addr(struct net_device *ndev, void *p)
3625{
3626 struct qede_dev *edev = netdev_priv(ndev);
3627 struct sockaddr *addr = p;
3628 int rc;
3629
3630 ASSERT_RTNL(); /* @@@TBD To be removed */
3631
3632 DP_INFO(edev, "Set_mac_addr called\n");
3633
3634 if (!is_valid_ether_addr(addr->sa_data)) {
3635 DP_NOTICE(edev, "The MAC address is not valid\n");
3636 return -EFAULT;
3637 }
3638
Yuval Mintzeff16962016-05-11 16:36:21 +03003639 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3640 DP_NOTICE(edev, "qed prevents setting MAC\n");
3641 return -EINVAL;
3642 }
3643
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003644 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3645
3646 if (!netif_running(ndev)) {
3647 DP_NOTICE(edev, "The device is currently down\n");
3648 return 0;
3649 }
3650
3651 /* Remove the previous primary mac */
3652 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3653 edev->primary_mac);
3654 if (rc)
3655 return rc;
3656
3657 /* Add MAC filter according to the new unicast HW MAC address */
3658 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3659 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3660 edev->primary_mac);
3661}
3662
3663static int
3664qede_configure_mcast_filtering(struct net_device *ndev,
3665 enum qed_filter_rx_mode_type *accept_flags)
3666{
3667 struct qede_dev *edev = netdev_priv(ndev);
3668 unsigned char *mc_macs, *temp;
3669 struct netdev_hw_addr *ha;
3670 int rc = 0, mc_count;
3671 size_t size;
3672
3673 size = 64 * ETH_ALEN;
3674
3675 mc_macs = kzalloc(size, GFP_KERNEL);
3676 if (!mc_macs) {
3677 DP_NOTICE(edev,
3678 "Failed to allocate memory for multicast MACs\n");
3679 rc = -ENOMEM;
3680 goto exit;
3681 }
3682
3683 temp = mc_macs;
3684
3685 /* Remove all previously configured MAC filters */
3686 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3687 mc_macs, 1);
3688 if (rc)
3689 goto exit;
3690
3691 netif_addr_lock_bh(ndev);
3692
3693 mc_count = netdev_mc_count(ndev);
3694 if (mc_count < 64) {
3695 netdev_for_each_mc_addr(ha, ndev) {
3696 ether_addr_copy(temp, ha->addr);
3697 temp += ETH_ALEN;
3698 }
3699 }
3700
3701 netif_addr_unlock_bh(ndev);
3702
3703 /* Check for all multicast @@@TBD resource allocation */
3704 if ((ndev->flags & IFF_ALLMULTI) ||
3705 (mc_count > 64)) {
3706 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3707 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3708 } else {
3709 /* Add all multicast MAC filters */
3710 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3711 mc_macs, mc_count);
3712 }
3713
3714exit:
3715 kfree(mc_macs);
3716 return rc;
3717}
3718
3719static void qede_set_rx_mode(struct net_device *ndev)
3720{
3721 struct qede_dev *edev = netdev_priv(ndev);
3722
3723 DP_INFO(edev, "qede_set_rx_mode called\n");
3724
3725 if (edev->state != QEDE_STATE_OPEN) {
3726 DP_INFO(edev,
3727 "qede_set_rx_mode called while interface is down\n");
3728 } else {
3729 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3730 schedule_delayed_work(&edev->sp_task, 0);
3731 }
3732}
3733
3734/* Must be called with qede_lock held */
3735static void qede_config_rx_mode(struct net_device *ndev)
3736{
3737 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3738 struct qede_dev *edev = netdev_priv(ndev);
3739 struct qed_filter_params rx_mode;
3740 unsigned char *uc_macs, *temp;
3741 struct netdev_hw_addr *ha;
3742 int rc, uc_count;
3743 size_t size;
3744
3745 netif_addr_lock_bh(ndev);
3746
3747 uc_count = netdev_uc_count(ndev);
3748 size = uc_count * ETH_ALEN;
3749
3750 uc_macs = kzalloc(size, GFP_ATOMIC);
3751 if (!uc_macs) {
3752 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3753 netif_addr_unlock_bh(ndev);
3754 return;
3755 }
3756
3757 temp = uc_macs;
3758 netdev_for_each_uc_addr(ha, ndev) {
3759 ether_addr_copy(temp, ha->addr);
3760 temp += ETH_ALEN;
3761 }
3762
3763 netif_addr_unlock_bh(ndev);
3764
3765 /* Configure the struct for the Rx mode */
3766 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3767 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3768
3769 /* Remove all previous unicast secondary macs and multicast macs
3770 * (configrue / leave the primary mac)
3771 */
3772 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3773 edev->primary_mac);
3774 if (rc)
3775 goto out;
3776
3777 /* Check for promiscuous */
3778 if ((ndev->flags & IFF_PROMISC) ||
3779 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3780 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3781 } else {
3782 /* Add MAC filters according to the unicast secondary macs */
3783 int i;
3784
3785 temp = uc_macs;
3786 for (i = 0; i < uc_count; i++) {
3787 rc = qede_set_ucast_rx_mac(edev,
3788 QED_FILTER_XCAST_TYPE_ADD,
3789 temp);
3790 if (rc)
3791 goto out;
3792
3793 temp += ETH_ALEN;
3794 }
3795
3796 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3797 if (rc)
3798 goto out;
3799 }
3800
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003801 /* take care of VLAN mode */
3802 if (ndev->flags & IFF_PROMISC) {
3803 qede_config_accept_any_vlan(edev, true);
3804 } else if (!edev->non_configured_vlans) {
3805 /* It's possible that accept_any_vlan mode is set due to a
3806 * previous setting of IFF_PROMISC. If vlan credits are
3807 * sufficient, disable accept_any_vlan.
3808 */
3809 qede_config_accept_any_vlan(edev, false);
3810 }
3811
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003812 rx_mode.filter.accept_flags = accept_flags;
3813 edev->ops->filter_config(edev->cdev, &rx_mode);
3814out:
3815 kfree(uc_macs);
3816}