Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Atmel, |
| 5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, |
| 6 | * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 7 | * |
| 8 | * Licensed under GPLv2 or later. |
| 9 | */ |
| 10 | |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 11 | #include "skeleton.dtsi" |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 12 | #include <dt-bindings/pinctrl/at91.h> |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 13 | #include <dt-bindings/gpio/gpio.h> |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 14 | |
| 15 | / { |
| 16 | model = "Atmel AT91SAM9260 family SoC"; |
| 17 | compatible = "atmel,at91sam9260"; |
| 18 | interrupt-parent = <&aic>; |
| 19 | |
| 20 | aliases { |
| 21 | serial0 = &dbgu; |
| 22 | serial1 = &usart0; |
| 23 | serial2 = &usart1; |
| 24 | serial3 = &usart2; |
| 25 | serial4 = &usart3; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 26 | serial5 = &uart0; |
| 27 | serial6 = &uart1; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 28 | gpio0 = &pioA; |
| 29 | gpio1 = &pioB; |
| 30 | gpio2 = &pioC; |
| 31 | tcb0 = &tcb0; |
| 32 | tcb1 = &tcb1; |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 33 | i2c0 = &i2c0; |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 34 | ssc0 = &ssc0; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 35 | }; |
| 36 | cpus { |
| 37 | cpu@0 { |
| 38 | compatible = "arm,arm926ejs"; |
| 39 | }; |
| 40 | }; |
| 41 | |
| 42 | memory { |
| 43 | reg = <0x20000000 0x04000000>; |
| 44 | }; |
| 45 | |
| 46 | ahb { |
| 47 | compatible = "simple-bus"; |
| 48 | #address-cells = <1>; |
| 49 | #size-cells = <1>; |
| 50 | ranges; |
| 51 | |
| 52 | apb { |
| 53 | compatible = "simple-bus"; |
| 54 | #address-cells = <1>; |
| 55 | #size-cells = <1>; |
| 56 | ranges; |
| 57 | |
| 58 | aic: interrupt-controller@fffff000 { |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 59 | #interrupt-cells = <3>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 60 | compatible = "atmel,at91rm9200-aic"; |
| 61 | interrupt-controller; |
| 62 | reg = <0xfffff000 0x200>; |
Jean-Christophe PLAGNIOL-VILLARD | c657394 | 2012-04-09 19:36:36 +0800 | [diff] [blame] | 63 | atmel,external-irqs = <29 30 31>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 64 | }; |
| 65 | |
| 66 | ramc0: ramc@ffffea00 { |
| 67 | compatible = "atmel,at91sam9260-sdramc"; |
| 68 | reg = <0xffffea00 0x200>; |
| 69 | }; |
| 70 | |
| 71 | pmc: pmc@fffffc00 { |
| 72 | compatible = "atmel,at91rm9200-pmc"; |
| 73 | reg = <0xfffffc00 0x100>; |
| 74 | }; |
| 75 | |
| 76 | rstc@fffffd00 { |
| 77 | compatible = "atmel,at91sam9260-rstc"; |
| 78 | reg = <0xfffffd00 0x10>; |
| 79 | }; |
| 80 | |
| 81 | shdwc@fffffd10 { |
| 82 | compatible = "atmel,at91sam9260-shdwc"; |
| 83 | reg = <0xfffffd10 0x10>; |
| 84 | }; |
| 85 | |
| 86 | pit: timer@fffffd30 { |
| 87 | compatible = "atmel,at91sam9260-pit"; |
| 88 | reg = <0xfffffd30 0xf>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 89 | interrupts = <1 4 7>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 90 | }; |
| 91 | |
| 92 | tcb0: timer@fffa0000 { |
| 93 | compatible = "atmel,at91rm9200-tcb"; |
| 94 | reg = <0xfffa0000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 95 | interrupts = <17 4 0 18 4 0 19 4 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 96 | }; |
| 97 | |
| 98 | tcb1: timer@fffdc000 { |
| 99 | compatible = "atmel,at91rm9200-tcb"; |
| 100 | reg = <0xfffdc000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 101 | interrupts = <26 4 0 27 4 0 28 4 0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 102 | }; |
| 103 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 104 | pinctrl@fffff400 { |
| 105 | #address-cells = <1>; |
| 106 | #size-cells = <1>; |
| 107 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 108 | ranges = <0xfffff400 0xfffff400 0x600>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 109 | |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 110 | atmel,mux-mask = < |
| 111 | /* A B */ |
| 112 | 0xffffffff 0xffc00c3b /* pioA */ |
| 113 | 0xffffffff 0x7fff3ccf /* pioB */ |
| 114 | 0xffffffff 0x007fffff /* pioC */ |
| 115 | >; |
| 116 | |
| 117 | /* shared pinctrl settings */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 118 | dbgu { |
| 119 | pinctrl_dbgu: dbgu-0 { |
| 120 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 121 | <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ |
| 122 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 123 | }; |
| 124 | }; |
| 125 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 126 | usart0 { |
| 127 | pinctrl_usart0: usart0-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 128 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 129 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ |
| 130 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 131 | }; |
| 132 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 133 | pinctrl_usart0_rts: usart0_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 134 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 135 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 136 | }; |
| 137 | |
| 138 | pinctrl_usart0_cts: usart0_cts-0 { |
| 139 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 140 | <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 141 | }; |
| 142 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 143 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 144 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 145 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */ |
| 146 | AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 147 | }; |
| 148 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 149 | pinctrl_usart0_dcd: usart0_dcd-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 150 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 151 | <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 152 | }; |
| 153 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 154 | pinctrl_usart0_ri: usart0_ri-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 155 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 156 | <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 157 | }; |
| 158 | }; |
| 159 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 160 | usart1 { |
| 161 | pinctrl_usart1: usart1-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 162 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 163 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ |
| 164 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 165 | }; |
| 166 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 167 | pinctrl_usart1_rts: usart1_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 168 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 169 | <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 170 | }; |
| 171 | |
| 172 | pinctrl_usart1_cts: usart1_cts-0 { |
| 173 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 174 | <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 175 | }; |
| 176 | }; |
| 177 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 178 | usart2 { |
| 179 | pinctrl_usart2: usart2-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 180 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 181 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */ |
| 182 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 183 | }; |
| 184 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 185 | pinctrl_usart2_rts: usart2_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 186 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 187 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 188 | }; |
| 189 | |
| 190 | pinctrl_usart2_cts: usart2_cts-0 { |
| 191 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 192 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 193 | }; |
| 194 | }; |
| 195 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 196 | usart3 { |
| 197 | pinctrl_usart3: usart3-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 198 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 199 | <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */ |
| 200 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 201 | }; |
| 202 | |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 203 | pinctrl_usart3_rts: usart3_rts-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 204 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 205 | <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 206 | }; |
| 207 | |
| 208 | pinctrl_usart3_cts: usart3_cts-0 { |
| 209 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 210 | <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 211 | }; |
| 212 | }; |
| 213 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 214 | uart0 { |
| 215 | pinctrl_uart0: uart0-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 216 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 217 | <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */ |
| 218 | AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 219 | }; |
| 220 | }; |
| 221 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 222 | uart1 { |
| 223 | pinctrl_uart1: uart1-0 { |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 224 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 225 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */ |
| 226 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 227 | }; |
| 228 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5314ec8 | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 229 | |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 230 | nand { |
| 231 | pinctrl_nand: nand-0 { |
| 232 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 233 | <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */ |
| 234 | AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 235 | }; |
| 236 | }; |
| 237 | |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 238 | macb { |
| 239 | pinctrl_macb_rmii: macb_rmii-0 { |
| 240 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 241 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ |
| 242 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ |
| 243 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ |
| 244 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ |
| 245 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ |
| 246 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ |
| 247 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ |
| 248 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */ |
| 249 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */ |
| 250 | AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 251 | }; |
| 252 | |
| 253 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| 254 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 255 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */ |
| 256 | AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */ |
| 257 | AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ |
| 258 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
| 259 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ |
| 260 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
| 261 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ |
| 262 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 263 | }; |
| 264 | |
| 265 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { |
| 266 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 267 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */ |
| 268 | AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */ |
| 269 | AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ |
| 270 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
| 271 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */ |
| 272 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
| 273 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ |
| 274 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 275 | }; |
| 276 | }; |
| 277 | |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 278 | mmc0 { |
| 279 | pinctrl_mmc0_clk: mmc0_clk-0 { |
| 280 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 281 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 282 | }; |
| 283 | |
| 284 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
| 285 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 286 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
| 287 | AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 288 | }; |
| 289 | |
| 290 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| 291 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 292 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ |
| 293 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ |
| 294 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 295 | }; |
| 296 | |
| 297 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
| 298 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 299 | <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */ |
| 300 | AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 301 | }; |
| 302 | |
| 303 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
| 304 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 305 | <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */ |
| 306 | AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */ |
| 307 | AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */ |
Jean-Christophe PLAGNIOL-VILLARD | d4fe9ac | 2012-11-16 08:24:17 +0800 | [diff] [blame] | 308 | }; |
| 309 | }; |
| 310 | |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 311 | ssc0 { |
| 312 | pinctrl_ssc0_tx: ssc0_tx-0 { |
| 313 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 314 | <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ |
| 315 | AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */ |
| 316 | AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 317 | }; |
| 318 | |
| 319 | pinctrl_ssc0_rx: ssc0_rx-0 { |
| 320 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 321 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */ |
| 322 | AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */ |
| 323 | AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */ |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 324 | }; |
| 325 | }; |
| 326 | |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 327 | spi0 { |
| 328 | pinctrl_spi0: spi0-0 { |
| 329 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 330 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */ |
| 331 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */ |
| 332 | AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */ |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 333 | }; |
| 334 | }; |
| 335 | |
| 336 | spi1 { |
| 337 | pinctrl_spi1: spi1-0 { |
| 338 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 339 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */ |
| 340 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */ |
| 341 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */ |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 342 | }; |
| 343 | }; |
| 344 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 345 | pioA: gpio@fffff400 { |
| 346 | compatible = "atmel,at91rm9200-gpio"; |
| 347 | reg = <0xfffff400 0x200>; |
| 348 | interrupts = <2 4 1>; |
| 349 | #gpio-cells = <2>; |
| 350 | gpio-controller; |
| 351 | interrupt-controller; |
| 352 | #interrupt-cells = <2>; |
| 353 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 354 | |
Jean-Christophe PLAGNIOL-VILLARD | e4541ff | 2012-07-04 17:20:46 +0800 | [diff] [blame] | 355 | pioB: gpio@fffff600 { |
| 356 | compatible = "atmel,at91rm9200-gpio"; |
| 357 | reg = <0xfffff600 0x200>; |
| 358 | interrupts = <3 4 1>; |
| 359 | #gpio-cells = <2>; |
| 360 | gpio-controller; |
| 361 | interrupt-controller; |
| 362 | #interrupt-cells = <2>; |
| 363 | }; |
| 364 | |
| 365 | pioC: gpio@fffff800 { |
| 366 | compatible = "atmel,at91rm9200-gpio"; |
| 367 | reg = <0xfffff800 0x200>; |
| 368 | interrupts = <4 4 1>; |
| 369 | #gpio-cells = <2>; |
| 370 | gpio-controller; |
| 371 | interrupt-controller; |
| 372 | #interrupt-cells = <2>; |
| 373 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 374 | }; |
| 375 | |
| 376 | dbgu: serial@fffff200 { |
| 377 | compatible = "atmel,at91sam9260-usart"; |
| 378 | reg = <0xfffff200 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 379 | interrupts = <1 4 7>; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 380 | pinctrl-names = "default"; |
| 381 | pinctrl-0 = <&pinctrl_dbgu>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 382 | status = "disabled"; |
| 383 | }; |
| 384 | |
| 385 | usart0: serial@fffb0000 { |
| 386 | compatible = "atmel,at91sam9260-usart"; |
| 387 | reg = <0xfffb0000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 388 | interrupts = <6 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 389 | atmel,use-dma-rx; |
| 390 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 391 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 392 | pinctrl-0 = <&pinctrl_usart0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 393 | status = "disabled"; |
| 394 | }; |
| 395 | |
| 396 | usart1: serial@fffb4000 { |
| 397 | compatible = "atmel,at91sam9260-usart"; |
| 398 | reg = <0xfffb4000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 399 | interrupts = <7 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 400 | atmel,use-dma-rx; |
| 401 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 402 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 403 | pinctrl-0 = <&pinctrl_usart1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 404 | status = "disabled"; |
| 405 | }; |
| 406 | |
| 407 | usart2: serial@fffb8000 { |
| 408 | compatible = "atmel,at91sam9260-usart"; |
| 409 | reg = <0xfffb8000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 410 | interrupts = <8 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 411 | atmel,use-dma-rx; |
| 412 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 413 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 414 | pinctrl-0 = <&pinctrl_usart2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 415 | status = "disabled"; |
| 416 | }; |
| 417 | |
| 418 | usart3: serial@fffd0000 { |
| 419 | compatible = "atmel,at91sam9260-usart"; |
| 420 | reg = <0xfffd0000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 421 | interrupts = <23 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 422 | atmel,use-dma-rx; |
| 423 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 424 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 425 | pinctrl-0 = <&pinctrl_usart3>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 426 | status = "disabled"; |
| 427 | }; |
| 428 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 429 | uart0: serial@fffd4000 { |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 430 | compatible = "atmel,at91sam9260-usart"; |
| 431 | reg = <0xfffd4000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 432 | interrupts = <24 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 433 | atmel,use-dma-rx; |
| 434 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 435 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 436 | pinctrl-0 = <&pinctrl_uart0>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 437 | status = "disabled"; |
| 438 | }; |
| 439 | |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 440 | uart1: serial@fffd8000 { |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 441 | compatible = "atmel,at91sam9260-usart"; |
| 442 | reg = <0xfffd8000 0x200>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 443 | interrupts = <25 4 5>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 444 | atmel,use-dma-rx; |
| 445 | atmel,use-dma-tx; |
Jean-Christophe PLAGNIOL-VILLARD | ec6754a | 2012-07-05 16:56:09 +0800 | [diff] [blame] | 446 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 9e3129e | 2012-11-19 06:40:01 +0800 | [diff] [blame] | 447 | pinctrl-0 = <&pinctrl_uart1>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 448 | status = "disabled"; |
| 449 | }; |
| 450 | |
| 451 | macb0: ethernet@fffc4000 { |
| 452 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 453 | reg = <0xfffc4000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 454 | interrupts = <21 4 3>; |
Jean-Christophe PLAGNIOL-VILLARD | d9b4fe8 | 2012-10-23 10:19:11 +0800 | [diff] [blame] | 455 | pinctrl-names = "default"; |
| 456 | pinctrl-0 = <&pinctrl_macb_rmii>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 457 | status = "disabled"; |
| 458 | }; |
| 459 | |
| 460 | usb1: gadget@fffa4000 { |
| 461 | compatible = "atmel,at91rm9200-udc"; |
| 462 | reg = <0xfffa4000 0x4000>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 463 | interrupts = <10 4 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 464 | status = "disabled"; |
| 465 | }; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 466 | |
Ludovic Desroches | 05dcd36 | 2012-09-12 08:42:16 +0200 | [diff] [blame] | 467 | i2c0: i2c@fffac000 { |
| 468 | compatible = "atmel,at91sam9260-i2c"; |
| 469 | reg = <0xfffac000 0x100>; |
| 470 | interrupts = <11 4 6>; |
| 471 | #address-cells = <1>; |
| 472 | #size-cells = <0>; |
| 473 | status = "disabled"; |
| 474 | }; |
| 475 | |
Ludovic Desroches | 9873137 | 2012-11-19 12:23:36 +0100 | [diff] [blame] | 476 | mmc0: mmc@fffa8000 { |
| 477 | compatible = "atmel,hsmci"; |
| 478 | reg = <0xfffa8000 0x600>; |
| 479 | interrupts = <9 4 0>; |
| 480 | #address-cells = <1>; |
| 481 | #size-cells = <0>; |
| 482 | status = "disabled"; |
| 483 | }; |
| 484 | |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 485 | ssc0: ssc@fffbc000 { |
| 486 | compatible = "atmel,at91rm9200-ssc"; |
| 487 | reg = <0xfffbc000 0x4000>; |
| 488 | interrupts = <14 4 5>; |
Bo Shen | 544ae6b | 2013-01-11 15:08:30 +0100 | [diff] [blame] | 489 | pinctrl-names = "default"; |
| 490 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
Linus Torvalds | 046e7d6 | 2012-12-13 11:51:23 -0800 | [diff] [blame] | 491 | status = "disabled"; |
Bo Shen | 099343c | 2012-11-07 11:41:41 +0800 | [diff] [blame] | 492 | }; |
| 493 | |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 494 | spi0: spi@fffc8000 { |
| 495 | #address-cells = <1>; |
| 496 | #size-cells = <0>; |
| 497 | compatible = "atmel,at91rm9200-spi"; |
| 498 | reg = <0xfffc8000 0x200>; |
| 499 | interrupts = <12 4 3>; |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 500 | pinctrl-names = "default"; |
| 501 | pinctrl-0 = <&pinctrl_spi0>; |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 502 | status = "disabled"; |
| 503 | }; |
| 504 | |
| 505 | spi1: spi@fffcc000 { |
| 506 | #address-cells = <1>; |
| 507 | #size-cells = <0>; |
| 508 | compatible = "atmel,at91rm9200-spi"; |
| 509 | reg = <0xfffcc000 0x200>; |
| 510 | interrupts = <13 4 3>; |
Wenyou Yang | a68b728 | 2013-04-03 14:03:52 +0800 | [diff] [blame] | 511 | pinctrl-names = "default"; |
| 512 | pinctrl-0 = <&pinctrl_spi1>; |
Richard Genoud | d50f88a | 2013-04-03 14:02:18 +0800 | [diff] [blame] | 513 | status = "disabled"; |
| 514 | }; |
| 515 | |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 516 | adc0: adc@fffe0000 { |
| 517 | compatible = "atmel,at91sam9260-adc"; |
| 518 | reg = <0xfffe0000 0x100>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 519 | interrupts = <5 4 0>; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 520 | atmel,adc-use-external-triggers; |
| 521 | atmel,adc-channels-used = <0xf>; |
| 522 | atmel,adc-vref = <3300>; |
| 523 | atmel,adc-num-channels = <4>; |
| 524 | atmel,adc-startup-time = <15>; |
| 525 | atmel,adc-channel-base = <0x30>; |
| 526 | atmel,adc-drdy-mask = <0x10000>; |
| 527 | atmel,adc-status-register = <0x1c>; |
| 528 | atmel,adc-trigger-register = <0x04>; |
Ludovic Desroches | 4b50da65 | 2013-03-29 10:13:19 +0100 | [diff] [blame] | 529 | atmel,adc-res = <8 10>; |
| 530 | atmel,adc-res-names = "lowres", "highres"; |
| 531 | atmel,adc-use-res = "highres"; |
Nicolas Ferre | 73d68d9 | 2012-05-16 17:37:06 +0200 | [diff] [blame] | 532 | |
| 533 | trigger@0 { |
| 534 | trigger-name = "timer-counter-0"; |
| 535 | trigger-value = <0x1>; |
| 536 | }; |
| 537 | trigger@1 { |
| 538 | trigger-name = "timer-counter-1"; |
| 539 | trigger-value = <0x3>; |
| 540 | }; |
| 541 | |
| 542 | trigger@2 { |
| 543 | trigger-name = "timer-counter-2"; |
| 544 | trigger-value = <0x5>; |
| 545 | }; |
| 546 | |
| 547 | trigger@3 { |
| 548 | trigger-name = "external"; |
| 549 | trigger-value = <0x13>; |
| 550 | trigger-external; |
| 551 | }; |
| 552 | }; |
Fabio Porcedda | 7492e7c | 2012-11-12 09:37:26 +0100 | [diff] [blame] | 553 | |
| 554 | watchdog@fffffd40 { |
| 555 | compatible = "atmel,at91sam9260-wdt"; |
| 556 | reg = <0xfffffd40 0x10>; |
| 557 | status = "disabled"; |
| 558 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 559 | }; |
| 560 | |
| 561 | nand0: nand@40000000 { |
| 562 | compatible = "atmel,at91rm9200-nand"; |
| 563 | #address-cells = <1>; |
| 564 | #size-cells = <1>; |
| 565 | reg = <0x40000000 0x10000000 |
| 566 | 0xffffe800 0x200 |
| 567 | >; |
| 568 | atmel,nand-addr-offset = <21>; |
| 569 | atmel,nand-cmd-offset = <22>; |
Jean-Christophe PLAGNIOL-VILLARD | 7a38d45 | 2012-07-12 23:36:52 +0800 | [diff] [blame] | 570 | pinctrl-names = "default"; |
| 571 | pinctrl-0 = <&pinctrl_nand>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 572 | gpios = <&pioC 13 GPIO_ACTIVE_HIGH |
| 573 | &pioC 14 GPIO_ACTIVE_HIGH |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 574 | 0 |
| 575 | >; |
| 576 | status = "disabled"; |
| 577 | }; |
| 578 | |
| 579 | usb0: ohci@00500000 { |
| 580 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 581 | reg = <0x00500000 0x100000>; |
Ludovic Desroches | f8a073e | 2012-06-20 16:13:30 +0200 | [diff] [blame] | 582 | interrupts = <20 4 2>; |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 583 | status = "disabled"; |
| 584 | }; |
| 585 | }; |
| 586 | |
| 587 | i2c@0 { |
| 588 | compatible = "i2c-gpio"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 589 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */ |
| 590 | &pioA 24 GPIO_ACTIVE_HIGH /* scl */ |
Jean-Christophe PLAGNIOL-VILLARD | 5b6089c | 2012-04-09 19:26:33 +0800 | [diff] [blame] | 591 | >; |
| 592 | i2c-gpio,sda-open-drain; |
| 593 | i2c-gpio,scl-open-drain; |
| 594 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| 595 | #address-cells = <1>; |
| 596 | #size-cells = <0>; |
| 597 | status = "disabled"; |
| 598 | }; |
| 599 | }; |