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Yuval Mintzfe56b9e2015-10-26 11:02:25 +02001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintzfe56b9e2015-10-26 11:02:25 +02003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020031 */
32
33#ifndef _QED_MCP_H
34#define _QED_MCP_H
35
36#include <linux/types.h>
37#include <linux/delay.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020038#include <linux/slab.h>
Tomer Tayar5529bad2016-03-09 09:16:24 +020039#include <linux/spinlock.h>
Arun Easi1e128c82017-02-15 06:28:22 -080040#include <linux/qed/qed_fcoe_if.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020041#include "qed_hsi.h"
Tomer Tayar5d24bcf2017-03-28 15:12:52 +030042#include "qed_dev_api.h"
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020043
Yuval Mintzcc875c22015-10-26 11:02:31 +020044struct qed_mcp_link_speed_params {
45 bool autoneg;
46 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */
47 u32 forced_speed; /* In Mb/s */
48};
49
50struct qed_mcp_link_pause_params {
51 bool autoneg;
52 bool forced_rx;
53 bool forced_tx;
54};
55
56struct qed_mcp_link_params {
57 struct qed_mcp_link_speed_params speed;
58 struct qed_mcp_link_pause_params pause;
59 u32 loopback_mode;
60};
61
62struct qed_mcp_link_capabilities {
63 u32 speed_capabilities;
64};
65
66struct qed_mcp_link_state {
67 bool link_up;
68
Manish Chopraa64b02d2016-04-26 10:56:10 -040069 u32 min_pf_rate;
70
Manish Chopra4b01e512016-04-26 10:56:09 -040071 /* Actual link speed in Mb/s */
72 u32 line_speed;
73
74 /* PF max speed in Mb/s, deduced from line_speed
75 * according to PF max bandwidth configuration.
76 */
77 u32 speed;
Yuval Mintzcc875c22015-10-26 11:02:31 +020078 bool full_duplex;
79
80 bool an;
81 bool an_complete;
82 bool parallel_detection;
83 bool pfc_enabled;
84
85#define QED_LINK_PARTNER_SPEED_1G_HD BIT(0)
86#define QED_LINK_PARTNER_SPEED_1G_FD BIT(1)
87#define QED_LINK_PARTNER_SPEED_10G BIT(2)
88#define QED_LINK_PARTNER_SPEED_20G BIT(3)
Sudarsana Reddy Kalluru054c67d2016-08-09 03:51:23 -040089#define QED_LINK_PARTNER_SPEED_25G BIT(4)
90#define QED_LINK_PARTNER_SPEED_40G BIT(5)
91#define QED_LINK_PARTNER_SPEED_50G BIT(6)
92#define QED_LINK_PARTNER_SPEED_100G BIT(7)
Yuval Mintzcc875c22015-10-26 11:02:31 +020093 u32 partner_adv_speed;
94
95 bool partner_tx_flow_ctrl_en;
96 bool partner_rx_flow_ctrl_en;
97
98#define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
99#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
100#define QED_LINK_PARTNER_BOTH_PAUSE (3)
101 u8 partner_adv_pause;
102
103 bool sfp_tx_fault;
104};
105
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200106struct qed_mcp_function_info {
107 u8 pause_on_host;
108
109 enum qed_pci_personality protocol;
110
111 u8 bandwidth_min;
112 u8 bandwidth_max;
113
114 u8 mac[ETH_ALEN];
115
116 u64 wwn_port;
117 u64 wwn_node;
118
119#define QED_MCP_VLAN_UNSET (0xffff)
120 u16 ovlan;
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200121
122 u16 mtu;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200123};
124
125struct qed_mcp_nvm_common {
126 u32 offset;
127 u32 param;
128 u32 resp;
129 u32 cmd;
130};
131
132struct qed_mcp_drv_version {
133 u32 version;
134 u8 name[MCP_DRV_VER_STR_SIZE - 4];
135};
136
Sudarsana Reddy Kalluru6c754242016-08-16 10:51:03 -0400137struct qed_mcp_lan_stats {
138 u64 ucast_rx_pkts;
139 u64 ucast_tx_pkts;
140 u32 fcs_err;
141};
142
143struct qed_mcp_fcoe_stats {
144 u64 rx_pkts;
145 u64 tx_pkts;
146 u32 fcs_err;
147 u32 login_failure;
148};
149
150struct qed_mcp_iscsi_stats {
151 u64 rx_pdus;
152 u64 tx_pdus;
153 u64 rx_bytes;
154 u64 tx_bytes;
155};
156
157struct qed_mcp_rdma_stats {
158 u64 rx_pkts;
159 u64 tx_pkts;
160 u64 rx_bytes;
161 u64 tx_byts;
162};
163
164enum qed_mcp_protocol_type {
165 QED_MCP_LAN_STATS,
166 QED_MCP_FCOE_STATS,
167 QED_MCP_ISCSI_STATS,
168 QED_MCP_RDMA_STATS
169};
170
171union qed_mcp_protocol_stats {
172 struct qed_mcp_lan_stats lan_stats;
173 struct qed_mcp_fcoe_stats fcoe_stats;
174 struct qed_mcp_iscsi_stats iscsi_stats;
175 struct qed_mcp_rdma_stats rdma_stats;
176};
177
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200178enum qed_ov_eswitch {
179 QED_OV_ESWITCH_NONE,
180 QED_OV_ESWITCH_VEB,
181 QED_OV_ESWITCH_VEPA
182};
183
184enum qed_ov_client {
185 QED_OV_CLIENT_DRV,
186 QED_OV_CLIENT_USER,
187 QED_OV_CLIENT_VENDOR_SPEC
188};
189
190enum qed_ov_driver_state {
191 QED_OV_DRIVER_STATE_NOT_LOADED,
192 QED_OV_DRIVER_STATE_DISABLED,
193 QED_OV_DRIVER_STATE_ACTIVE
194};
195
196enum qed_ov_wol {
197 QED_OV_WOL_DEFAULT,
198 QED_OV_WOL_DISABLED,
199 QED_OV_WOL_ENABLED
200};
201
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200202/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200203 * @brief - returns the link params of the hw function
204 *
205 * @param p_hwfn
206 *
207 * @returns pointer to link params
208 */
209struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
210
211/**
212 * @brief - return the link state of the hw function
213 *
214 * @param p_hwfn
215 *
216 * @returns pointer to link state
217 */
218struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
219
220/**
221 * @brief - return the link capabilities of the hw function
222 *
223 * @param p_hwfn
224 *
225 * @returns pointer to link capabilities
226 */
227struct qed_mcp_link_capabilities
228 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
229
230/**
231 * @brief Request the MFW to set the the link according to 'link_input'.
232 *
233 * @param p_hwfn
234 * @param p_ptt
235 * @param b_up - raise link if `true'. Reset link if `false'.
236 *
237 * @return int
238 */
239int qed_mcp_set_link(struct qed_hwfn *p_hwfn,
240 struct qed_ptt *p_ptt,
241 bool b_up);
242
243/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200244 * @brief Get the management firmware version value
245 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300246 * @param p_hwfn
247 * @param p_ptt
248 * @param p_mfw_ver - mfw version value
249 * @param p_running_bundle_id - image id in nvram; Optional.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200250 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300251 * @return int - 0 - operation was successful.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200252 */
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300253int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
254 struct qed_ptt *p_ptt,
255 u32 *p_mfw_ver, u32 *p_running_bundle_id);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200256
257/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200258 * @brief Get media type value of the port.
259 *
260 * @param cdev - qed dev pointer
261 * @param mfw_ver - media type value
262 *
263 * @return int -
264 * 0 - Operation was successul.
265 * -EBUSY - Operation failed
266 */
267int qed_mcp_get_media_type(struct qed_dev *cdev,
268 u32 *media_type);
269
270/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200271 * @brief General function for sending commands to the MCP
272 * mailbox. It acquire mutex lock for the entire
273 * operation, from sending the request until the MCP
274 * response. Waiting for MCP response will be checked up
275 * to 5 seconds every 5ms.
276 *
277 * @param p_hwfn - hw function
278 * @param p_ptt - PTT required for register access
279 * @param cmd - command to be sent to the MCP.
280 * @param param - Optional param
281 * @param o_mcp_resp - The MCP response code (exclude sequence).
282 * @param o_mcp_param- Optional parameter provided by the MCP
283 * response
284 * @return int - 0 - operation
285 * was successul.
286 */
287int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
288 struct qed_ptt *p_ptt,
289 u32 cmd,
290 u32 param,
291 u32 *o_mcp_resp,
292 u32 *o_mcp_param);
293
294/**
295 * @brief - drains the nig, allowing completion to pass in case of pauses.
296 * (Should be called only from sleepable context)
297 *
298 * @param p_hwfn
299 * @param p_ptt
300 */
301int qed_mcp_drain(struct qed_hwfn *p_hwfn,
302 struct qed_ptt *p_ptt);
303
304/**
Manish Chopracee4d262015-10-26 11:02:28 +0200305 * @brief Get the flash size value
306 *
307 * @param p_hwfn
308 * @param p_ptt
309 * @param p_flash_size - flash size in bytes to be filled.
310 *
311 * @return int - 0 - operation was successul.
312 */
313int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
314 struct qed_ptt *p_ptt,
315 u32 *p_flash_size);
316
317/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200318 * @brief Send driver version to MFW
319 *
320 * @param p_hwfn
321 * @param p_ptt
322 * @param version - Version value
323 * @param name - Protocol driver name
324 *
325 * @return int - 0 - operation was successul.
326 */
327int
328qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
329 struct qed_ptt *p_ptt,
330 struct qed_mcp_drv_version *p_ver);
331
Sudarsana Kalluru91420b82015-11-30 12:25:03 +0200332/**
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200333 * @brief Notify MFW about the change in base device properties
334 *
335 * @param p_hwfn
336 * @param p_ptt
337 * @param client - qed client type
338 *
339 * @return int - 0 - operation was successful.
340 */
341int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
342 struct qed_ptt *p_ptt,
343 enum qed_ov_client client);
344
345/**
346 * @brief Notify MFW about the driver state
347 *
348 * @param p_hwfn
349 * @param p_ptt
350 * @param drv_state - Driver state
351 *
352 * @return int - 0 - operation was successful.
353 */
354int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
355 struct qed_ptt *p_ptt,
356 enum qed_ov_driver_state drv_state);
357
358/**
359 * @brief Send MTU size to MFW
360 *
361 * @param p_hwfn
362 * @param p_ptt
363 * @param mtu - MTU size
364 *
365 * @return int - 0 - operation was successful.
366 */
367int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
368 struct qed_ptt *p_ptt, u16 mtu);
369
370/**
371 * @brief Send MAC address to MFW
372 *
373 * @param p_hwfn
374 * @param p_ptt
375 * @param mac - MAC address
376 *
377 * @return int - 0 - operation was successful.
378 */
379int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
380 struct qed_ptt *p_ptt, u8 *mac);
381
382/**
383 * @brief Send WOL mode to MFW
384 *
385 * @param p_hwfn
386 * @param p_ptt
387 * @param wol - WOL mode
388 *
389 * @return int - 0 - operation was successful.
390 */
391int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
392 struct qed_ptt *p_ptt,
393 enum qed_ov_wol wol);
394
395/**
Sudarsana Kalluru91420b82015-11-30 12:25:03 +0200396 * @brief Set LED status
397 *
398 * @param p_hwfn
399 * @param p_ptt
400 * @param mode - LED mode
401 *
402 * @return int - 0 - operation was successful.
403 */
404int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
405 struct qed_ptt *p_ptt,
406 enum qed_led_mode mode);
407
Sudarsana Reddy Kalluru03dc76c2016-04-28 20:20:52 -0400408/**
Mintz, Yuval7a4b21b2016-10-31 07:14:22 +0200409 * @brief Read from nvm
410 *
411 * @param cdev
412 * @param addr - nvm offset
413 * @param p_buf - nvm read buffer
414 * @param len - buffer len
415 *
416 * @return int - 0 - operation was successful.
417 */
418int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
419
420/**
Sudarsana Reddy Kalluru03dc76c2016-04-28 20:20:52 -0400421 * @brief Bist register test
422 *
423 * @param p_hwfn - hw function
424 * @param p_ptt - PTT required for register access
425 *
426 * @return int - 0 - operation was successful.
427 */
428int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
429 struct qed_ptt *p_ptt);
430
431/**
432 * @brief Bist clock test
433 *
434 * @param p_hwfn - hw function
435 * @param p_ptt - PTT required for register access
436 *
437 * @return int - 0 - operation was successful.
438 */
439int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
440 struct qed_ptt *p_ptt);
441
Mintz, Yuval7a4b21b2016-10-31 07:14:22 +0200442/**
443 * @brief Bist nvm test - get number of images
444 *
445 * @param p_hwfn - hw function
446 * @param p_ptt - PTT required for register access
447 * @param num_images - number of images if operation was
448 * successful. 0 if not.
449 *
450 * @return int - 0 - operation was successful.
451 */
452int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
453 struct qed_ptt *p_ptt,
454 u32 *num_images);
455
456/**
457 * @brief Bist nvm test - get image attributes by index
458 *
459 * @param p_hwfn - hw function
460 * @param p_ptt - PTT required for register access
461 * @param p_image_att - Attributes of image
462 * @param image_index - Index of image to get information for
463 *
464 * @return int - 0 - operation was successful.
465 */
466int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
467 struct qed_ptt *p_ptt,
468 struct bist_nvm_image_att *p_image_att,
469 u32 image_index);
470
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200471/* Using hwfn number (and not pf_num) is required since in CMT mode,
472 * same pf_num may be used by two different hwfn
473 * TODO - this shouldn't really be in .h file, but until all fields
474 * required during hw-init will be placed in their correct place in shmem
475 * we need it in qed_dev.c [for readin the nvram reflection in shmem].
476 */
477#define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \
478 ((rel_pfid) | \
479 ((p_hwfn)->abs_pf_id & 1) << 3) : \
480 rel_pfid)
481#define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
482
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200483#define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
484 ((_p_hwfn)->cdev->num_ports_in_engines * \
485 qed_device_num_engines((_p_hwfn)->cdev)))
486
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200487struct qed_mcp_info {
Tomer Tayar4ed1eea2017-03-23 15:50:15 +0200488 /* List for mailbox commands which were sent and wait for a response */
489 struct list_head cmd_list;
490
491 /* Spinlock used for protecting the access to the mailbox commands list
492 * and the sending of the commands.
493 */
494 spinlock_t cmd_lock;
Mintz, Yuval65ed2ff2017-02-20 22:43:39 +0200495
496 /* Spinlock used for syncing SW link-changes and link-changes
497 * originating from attention context.
498 */
499 spinlock_t link_lock;
Tomer Tayar5529bad2016-03-09 09:16:24 +0200500 bool block_mb_sending;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200501 u32 public_base;
502 u32 drv_mb_addr;
503 u32 mfw_mb_addr;
504 u32 port_addr;
505 u16 drv_mb_seq;
506 u16 drv_pulse_seq;
Yuval Mintzcc875c22015-10-26 11:02:31 +0200507 struct qed_mcp_link_params link_input;
508 struct qed_mcp_link_state link_output;
509 struct qed_mcp_link_capabilities link_capabilities;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200510 struct qed_mcp_function_info func_info;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200511 u8 *mfw_mb_cur;
512 u8 *mfw_mb_shadow;
513 u16 mfw_mb_length;
Tomer Tayar4ed1eea2017-03-23 15:50:15 +0200514 u32 mcp_hist;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200515};
516
Tomer Tayar5529bad2016-03-09 09:16:24 +0200517struct qed_mcp_mb_params {
518 u32 cmd;
519 u32 param;
Tomer Tayar2f67af8c2017-03-23 15:50:16 +0200520 void *p_data_src;
521 u8 data_src_size;
522 void *p_data_dst;
523 u8 data_dst_size;
Tomer Tayar5529bad2016-03-09 09:16:24 +0200524 u32 mcp_resp;
525 u32 mcp_param;
526};
527
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200528/**
529 * @brief Initialize the interface with the MCP
530 *
531 * @param p_hwfn - HW func
532 * @param p_ptt - PTT required for register access
533 *
534 * @return int
535 */
536int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
537 struct qed_ptt *p_ptt);
538
539/**
540 * @brief Initialize the port interface with the MCP
541 *
542 * @param p_hwfn
543 * @param p_ptt
544 * Can only be called after `num_ports_in_engines' is set
545 */
546void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
547 struct qed_ptt *p_ptt);
548/**
549 * @brief Releases resources allocated during the init process.
550 *
551 * @param p_hwfn - HW func
552 * @param p_ptt - PTT required for register access
553 *
554 * @return int
555 */
556
557int qed_mcp_free(struct qed_hwfn *p_hwfn);
558
559/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200560 * @brief This function is called from the DPC context. After
561 * pointing PTT to the mfw mb, check for events sent by the MCP
562 * to the driver and ack them. In case a critical event
563 * detected, it will be handled here, otherwise the work will be
564 * queued to a sleepable work-queue.
565 *
566 * @param p_hwfn - HW function
567 * @param p_ptt - PTT required for register access
568 * @return int - 0 - operation
569 * was successul.
570 */
571int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
572 struct qed_ptt *p_ptt);
573
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300574enum qed_drv_role {
575 QED_DRV_ROLE_OS,
576 QED_DRV_ROLE_KDUMP,
577};
578
579struct qed_load_req_params {
580 /* Input params */
581 enum qed_drv_role drv_role;
582 u8 timeout_val;
583 bool avoid_eng_reset;
584 enum qed_override_force_load override_force_load;
585
586 /* Output params */
587 u32 load_code;
588};
589
Yuval Mintzcc875c22015-10-26 11:02:31 +0200590/**
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300591 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
592 * returns whether this PF is the first on the engine/port or function.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200593 *
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300594 * @param p_hwfn
595 * @param p_ptt
596 * @param p_params
597 *
598 * @return int - 0 - Operation was successful.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200599 */
600int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
601 struct qed_ptt *p_ptt,
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300602 struct qed_load_req_params *p_params);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200603
604/**
Tomer Tayar12263372017-03-28 15:12:50 +0300605 * @brief Sends a UNLOAD_REQ message to the MFW
606 *
607 * @param p_hwfn
608 * @param p_ptt
609 *
610 * @return int - 0 - Operation was successful.
611 */
612int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
613
614/**
615 * @brief Sends a UNLOAD_DONE message to the MFW
616 *
617 * @param p_hwfn
618 * @param p_ptt
619 *
620 * @return int - 0 - Operation was successful.
621 */
622int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
623
624/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200625 * @brief Read the MFW mailbox into Current buffer.
626 *
627 * @param p_hwfn
628 * @param p_ptt
629 */
630void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
631 struct qed_ptt *p_ptt);
632
633/**
Yuval Mintz0b55e272016-05-11 16:36:15 +0300634 * @brief Ack to mfw that driver finished FLR process for VFs
635 *
636 * @param p_hwfn
637 * @param p_ptt
638 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
639 *
640 * @param return int - 0 upon success.
641 */
642int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
643 struct qed_ptt *p_ptt, u32 *vfs_to_ack);
644
645/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200646 * @brief - calls during init to read shmem of all function-related info.
647 *
648 * @param p_hwfn
649 *
650 * @param return 0 upon success.
651 */
652int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
653 struct qed_ptt *p_ptt);
654
655/**
656 * @brief - Reset the MCP using mailbox command.
657 *
658 * @param p_hwfn
659 * @param p_ptt
660 *
661 * @param return 0 upon success.
662 */
663int qed_mcp_reset(struct qed_hwfn *p_hwfn,
664 struct qed_ptt *p_ptt);
665
666/**
Tomer Tayar41024262016-09-05 14:35:10 +0300667 * @brief - Sends an NVM read command request to the MFW to get
668 * a buffer.
669 *
670 * @param p_hwfn
671 * @param p_ptt
672 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
673 * DRV_MSG_CODE_NVM_READ_NVRAM commands
674 * @param param - [0:23] - Offset [24:31] - Size
675 * @param o_mcp_resp - MCP response
676 * @param o_mcp_param - MCP response param
677 * @param o_txn_size - Buffer size output
678 * @param o_buf - Pointer to the buffer returned by the MFW.
679 *
680 * @param return 0 upon success.
681 */
682int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
683 struct qed_ptt *p_ptt,
684 u32 cmd,
685 u32 param,
686 u32 *o_mcp_resp,
687 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
688
689/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200690 * @brief indicates whether the MFW objects [under mcp_info] are accessible
691 *
692 * @param p_hwfn
693 *
694 * @return true iff MFW is running and mcp_info is initialized
695 */
696bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300697
698/**
699 * @brief request MFW to configure MSI-X for a VF
700 *
701 * @param p_hwfn
702 * @param p_ptt
703 * @param vf_id - absolute inside engine
704 * @param num_sbs - number of entries to request
705 *
706 * @return int
707 */
708int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
709 struct qed_ptt *p_ptt, u8 vf_id, u8 num);
710
Tomer Tayar41024262016-09-05 14:35:10 +0300711/**
712 * @brief - Halt the MCP.
713 *
714 * @param p_hwfn
715 * @param p_ptt
716 *
717 * @param return 0 upon success.
718 */
719int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
720
721/**
722 * @brief - Wake up the MCP.
723 *
724 * @param p_hwfn
725 * @param p_ptt
726 *
727 * @param return 0 upon success.
728 */
729int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
730
Manish Chopraa64b02d2016-04-26 10:56:10 -0400731int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
Manish Chopra4b01e512016-04-26 10:56:09 -0400732int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
733int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
734 struct qed_ptt *p_ptt,
735 struct qed_mcp_link_state *p_link,
736 u8 max_bw);
Manish Chopraa64b02d2016-04-26 10:56:10 -0400737int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
738 struct qed_ptt *p_ptt,
739 struct qed_mcp_link_state *p_link,
740 u8 min_bw);
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300741
Tomer Tayar41024262016-09-05 14:35:10 +0300742int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
743 struct qed_ptt *p_ptt, u32 mask_parities);
744
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200745/**
Tomer Tayar9c8517c2017-03-28 15:12:55 +0300746 * @brief - Sets the MFW's max value for the given resource
747 *
748 * @param p_hwfn
749 * @param p_ptt
750 * @param res_id
751 * @param resc_max_val
752 * @param p_mcp_resp
753 *
754 * @return int - 0 - operation was successful.
755 */
756int
757qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
758 struct qed_ptt *p_ptt,
759 enum qed_resources res_id,
760 u32 resc_max_val, u32 *p_mcp_resp);
761
762/**
763 * @brief - Gets the MFW allocation info for the given resource
764 *
765 * @param p_hwfn
766 * @param p_ptt
767 * @param res_id
768 * @param p_mcp_resp
769 * @param p_resc_num
770 * @param p_resc_start
771 *
772 * @return int - 0 - operation was successful.
773 */
774int
775qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
776 struct qed_ptt *p_ptt,
777 enum qed_resources res_id,
778 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
779
780/**
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200781 * @brief Send eswitch mode to MFW
782 *
783 * @param p_hwfn
784 * @param p_ptt
785 * @param eswitch - eswitch mode
786 *
787 * @return int - 0 - operation was successful.
788 */
789int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
790 struct qed_ptt *p_ptt,
791 enum qed_ov_eswitch eswitch);
792
Tomer Tayar9c8517c2017-03-28 15:12:55 +0300793#define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP
794#define QED_MCP_RESC_LOCK_MAX_VAL 31
795
796enum qed_resc_lock {
797 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
sudarsana.kalluru@cavium.comdb82f702017-04-26 09:00:50 -0700798 QED_RESC_LOCK_PTP_PORT0,
799 QED_RESC_LOCK_PTP_PORT1,
800 QED_RESC_LOCK_PTP_PORT2,
801 QED_RESC_LOCK_PTP_PORT3,
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700802 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
803 QED_RESC_LOCK_RESC_INVALID
Tomer Tayar9c8517c2017-03-28 15:12:55 +0300804};
Mintz, Yuval18a69e32017-03-28 15:12:53 +0300805
806/**
807 * @brief - Initiates PF FLR
808 *
809 * @param p_hwfn
810 * @param p_ptt
811 *
812 * @return int - 0 - operation was successful.
813 */
814int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
Tomer Tayar95691c92017-03-28 15:12:54 +0300815struct qed_resc_lock_params {
816 /* Resource number [valid values are 0..31] */
817 u8 resource;
818
819 /* Lock timeout value in seconds [default, none or 1..254] */
820 u8 timeout;
821#define QED_MCP_RESC_LOCK_TO_DEFAULT 0
822#define QED_MCP_RESC_LOCK_TO_NONE 255
823
824 /* Number of times to retry locking */
825 u8 retry_num;
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700826#define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10
Tomer Tayar95691c92017-03-28 15:12:54 +0300827
828 /* The interval in usec between retries */
829 u16 retry_interval;
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700830#define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000
Tomer Tayar95691c92017-03-28 15:12:54 +0300831
832 /* Use sleep or delay between retries */
833 bool sleep_b4_retry;
834
835 /* Will be set as true if the resource is free and granted */
836 bool b_granted;
837
838 /* Will be filled with the resource owner.
839 * [0..15 = PF0-15, 16 = MFW]
840 */
841 u8 owner;
842};
843
844/**
845 * @brief Acquires MFW generic resource lock
846 *
847 * @param p_hwfn
848 * @param p_ptt
849 * @param p_params
850 *
851 * @return int - 0 - operation was successful.
852 */
853int
854qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
855 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
856
857struct qed_resc_unlock_params {
858 /* Resource number [valid values are 0..31] */
859 u8 resource;
860
861 /* Allow to release a resource even if belongs to another PF */
862 bool b_force;
863
864 /* Will be set as true if the resource is released */
865 bool b_released;
866};
867
868/**
869 * @brief Releases MFW generic resource lock
870 *
871 * @param p_hwfn
872 * @param p_ptt
873 * @param p_params
874 *
875 * @return int - 0 - operation was successful.
876 */
877int
878qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
879 struct qed_ptt *p_ptt,
880 struct qed_resc_unlock_params *p_params);
881
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700882/**
883 * @brief - default initialization for lock/unlock resource structs
884 *
885 * @param p_lock - lock params struct to be initialized; Can be NULL
886 * @param p_unlock - unlock params struct to be initialized; Can be NULL
887 * @param resource - the requested resource
888 * @paral b_is_permanent - disable retries & aging when set
889 */
890void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
891 struct qed_resc_unlock_params *p_unlock,
892 enum qed_resc_lock
893 resource, bool b_is_permanent);
894
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200895#endif