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Philipp Zabel61fc4132012-11-19 17:23:13 +01001config ARCH_HAS_RESET_CONTROLLER
2 bool
3
4menuconfig RESET_CONTROLLER
5 bool "Reset Controller Support"
6 default y if ARCH_HAS_RESET_CONTROLLER
7 help
8 Generic Reset Controller support.
9
10 This framework is designed to abstract reset handling of devices
11 via GPIOs or SoC-internal reset controller modules.
12
13 If unsure, say no.
Stephen Gallimoree5d76072013-08-07 15:53:12 +010014
Masahiro Yamada998cd462016-05-03 15:29:52 +090015if RESET_CONTROLLER
16
Thor Thayer62700682017-02-22 11:10:17 -060017config RESET_A10SR
18 tristate "Altera Arria10 System Resource Reset"
19 depends on MFD_ALTERA_A10SR
20 help
21 This option enables support for the external reset functions for
22 peripheral PHYs on the Altera Arria10 System Resource Chip.
23
Philipp Zabele27b4a62016-07-28 15:30:08 +020024config RESET_ATH79
25 bool "AR71xx Reset Driver" if COMPILE_TEST
26 default ATH79
27 help
28 This enables the ATH79 reset controller driver that supports the
29 AR71xx SoC reset controller.
30
Eugeniy Paltsev37634922017-09-14 17:28:42 +030031config RESET_AXS10X
32 bool "AXS10x Reset Driver" if COMPILE_TEST
33 default ARC_PLAT_AXS10X
34 help
35 This enables the reset controller driver for AXS10x.
36
Philipp Zabel70d467e2016-07-28 15:31:12 +020037config RESET_BERLIN
38 bool "Berlin Reset Driver" if COMPILE_TEST
39 default ARCH_BERLIN
40 help
41 This enables the reset controller driver for Marvell Berlin SoCs.
42
Vineet Gupta13541222017-08-31 11:06:07 -070043config RESET_HSDK
44 bool "Synopsys HSDK Reset Driver"
Thomas Meyer2d48a232017-09-09 06:02:46 +020045 depends on HAS_IOMEM
Geert Uytterhoeven544e3bf2017-09-11 14:22:08 +020046 depends on ARC_SOC_HSDK || COMPILE_TEST
Eugeniy Paltseve0be8642017-07-19 21:45:11 +030047 help
Vineet Gupta13541222017-08-31 11:06:07 -070048 This enables the reset controller driver for HSDK board.
Eugeniy Paltseve0be8642017-07-19 21:45:11 +030049
Andrey Smirnovabf97752017-02-21 08:13:31 -080050config RESET_IMX7
51 bool "i.MX7 Reset Driver" if COMPILE_TEST
Masahiro Yamada8fa56622018-03-06 20:15:11 +090052 depends on HAS_IOMEM
Andrey Smirnovabf97752017-02-21 08:13:31 -080053 default SOC_IMX7D
54 select MFD_SYSCON
55 help
56 This enables the reset controller driver for i.MX7 SoCs.
57
Martin Blumenstingl79797b62017-08-20 00:18:17 +020058config RESET_LANTIQ
59 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
60 default SOC_TYPE_XWAY
61 help
62 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
63
Philipp Zabelcd7f4b82016-07-28 15:32:01 +020064config RESET_LPC18XX
65 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
66 default ARCH_LPC18XX
67 help
68 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
69
Philipp Zabel44336c22016-07-28 15:32:36 +020070config RESET_MESON
71 bool "Meson Reset Driver" if COMPILE_TEST
72 default ARCH_MESON
73 help
74 This enables the reset driver for Amlogic Meson SoCs.
75
Neil Armstrong6e667fa2016-04-01 16:16:13 +020076config RESET_OXNAS
77 bool
78
Philipp Zabelfab3f732016-07-28 15:33:07 +020079config RESET_PISTACHIO
80 bool "Pistachio Reset Driver" if COMPILE_TEST
81 default MACH_PISTACHIO
82 help
83 This enables the reset driver for ImgTec Pistachio SoCs.
84
Philipp Zabel81c22ad2017-08-11 12:58:43 +020085config RESET_SIMPLE
86 bool "Simple Reset Controller Driver" if COMPILE_TEST
Joel Stanley1d7592f2018-02-20 12:13:29 +103087 default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
Philipp Zabel81c22ad2017-08-11 12:58:43 +020088 help
89 This enables a simple reset controller driver for reset lines that
90 that can be asserted and deasserted by toggling bits in a contiguous,
91 exclusive register space.
92
Joel Stanley1d7592f2018-02-20 12:13:29 +103093 Currently this driver supports:
94 - Altera SoCFPGAs
95 - ASPEED BMC SoCs
96 - RCC reset controller in STM32 MCUs
97 - Allwinner SoCs
98 - ZTE's zx2967 family
Philipp Zabel7e0e9012016-07-28 15:34:15 +020099
Gabriel Fernandez197858b2018-03-19 08:25:51 +0100100config RESET_STM32MP157
101 bool "STM32MP157 Reset Driver" if COMPILE_TEST
102 default MACH_STM32MP157
103 help
104 This enables the RCC reset controller driver for STM32 MPUs.
105
Philipp Zabel0ae08412016-08-09 09:28:44 +0200106config RESET_SUNXI
107 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
108 default ARCH_SUNXI
Philipp Zabele13c2052017-08-11 12:58:43 +0200109 select RESET_SIMPLE
Philipp Zabel0ae08412016-08-09 09:28:44 +0200110 help
111 This enables the reset driver for Allwinner SoCs.
112
Andrew F. Davis28df1692017-05-24 13:09:30 -0500113config RESET_TI_SCI
114 tristate "TI System Control Interface (TI-SCI) reset driver"
115 depends on TI_SCI_PROTOCOL
116 help
117 This enables the reset driver support over TI System Control Interface
118 available on some new TI's SoCs. If you wish to use reset resources
119 managed by the TI System Controller, say Y here. Otherwise, say N.
120
Suman Annadd9bf862017-05-23 22:00:12 -0500121config RESET_TI_SYSCON
Andrew F. Daviscc7c2bb2016-06-27 12:12:17 -0500122 tristate "TI SYSCON Reset Driver"
123 depends on HAS_IOMEM
124 select MFD_SYSCON
125 help
126 This enables the reset driver support for TI devices with
127 memory-mapped reset registers as part of a syscon device node. If
128 you wish to use the reset framework for such memory-mapped devices,
129 say Y here. Otherwise, say N.
130
Masahiro Yamada54e991b2016-08-02 13:18:29 +0900131config RESET_UNIPHIER
132 tristate "Reset controller driver for UniPhier SoCs"
133 depends on ARCH_UNIPHIER || COMPILE_TEST
134 depends on OF && MFD_SYSCON
135 default ARCH_UNIPHIER
136 help
137 Support for reset controllers on UniPhier SoCs.
138 Say Y if you want to control reset signals provided by System Control
139 block, Media I/O block, Peripheral Block.
140
Philipp Zabel6f51b862016-08-09 09:28:54 +0200141config RESET_ZYNQ
142 bool "ZYNQ Reset Driver" if COMPILE_TEST
143 default ARCH_ZYNQ
144 help
145 This enables the reset controller driver for Xilinx Zynq SoCs.
146
Stephen Gallimoree5d76072013-08-07 15:53:12 +0100147source "drivers/reset/sti/Kconfig"
Chen Fengf59d23c2015-11-20 10:10:05 +0800148source "drivers/reset/hisilicon/Kconfig"
Thierry Redingdc606c52016-08-18 15:50:09 +0200149source "drivers/reset/tegra/Kconfig"
Masahiro Yamada998cd462016-05-03 15:29:52 +0900150
151endif