blob: 19062dcf1e8093afec16c18e356c02cdb2fdf204 [file] [log] [blame]
Greg Rose92915f72010-01-09 02:24:10 +00001/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
Mark Rustad2e7cfbd2014-03-04 03:02:13 +00004 Copyright(c) 1999 - 2014 Intel Corporation.
Greg Rose92915f72010-01-09 02:24:10 +00005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
Jeff Kirsherdbd96362011-10-21 19:38:18 +000032
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
Greg Rose92915f72010-01-09 02:24:10 +000035#include <linux/types.h>
Jiri Pirkodadcd652011-07-21 03:25:09 +000036#include <linux/bitops.h>
Greg Rose92915f72010-01-09 02:24:10 +000037#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
Alexander Duyck70a10e22012-05-11 08:33:21 +000045#include <linux/sctp.h>
Greg Rose92915f72010-01-09 02:24:10 +000046#include <linux/ipv6.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090047#include <linux/slab.h>
Greg Rose92915f72010-01-09 02:24:10 +000048#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
Jiri Pirko01789342011-08-16 06:29:00 +000051#include <linux/if.h>
Greg Rose92915f72010-01-09 02:24:10 +000052#include <linux/if_vlan.h>
Paul Gortmaker70c71602011-05-22 16:47:17 -040053#include <linux/prefetch.h>
Greg Rose92915f72010-01-09 02:24:10 +000054
55#include "ixgbevf.h"
56
Stephen Hemminger3d8fe982012-01-18 22:13:34 +000057const char ixgbevf_driver_name[] = "ixgbevf";
Greg Rose92915f72010-01-09 02:24:10 +000058static const char ixgbevf_driver_string[] =
Greg Rose422e05d2011-03-12 02:01:29 +000059 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
Greg Rose92915f72010-01-09 02:24:10 +000060
Don Skidmore86f359f2014-01-17 01:21:38 -080061#define DRV_VERSION "2.12.1-k"
Greg Rose92915f72010-01-09 02:24:10 +000062const char ixgbevf_driver_version[] = DRV_VERSION;
Greg Rose66c87bd2010-11-16 19:26:43 -080063static char ixgbevf_copyright[] =
Greg Rose5c47a2b2012-01-06 02:53:30 +000064 "Copyright (c) 2009 - 2012 Intel Corporation.";
Greg Rose92915f72010-01-09 02:24:10 +000065
66static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
Greg Rose2316aa22010-12-02 07:12:26 +000067 [board_82599_vf] = &ixgbevf_82599_vf_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
Greg Rose92915f72010-01-09 02:24:10 +000069};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
Benoit Taine9baa3c32014-08-08 15:56:03 +020079static const struct pci_device_id ixgbevf_pci_tbl[] = {
Stephen Hemminger39ba22b2013-02-06 02:37:04 +000080 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
Greg Rose92915f72010-01-09 02:24:10 +000082 /* required last entry */
83 {0, }
84};
85MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
86
87MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
Emil Tantilovb8ce18c2014-04-05 05:39:42 +000088MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
Greg Rose92915f72010-01-09 02:24:10 +000089MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
stephen hemmingerb3f4d592012-03-13 06:04:20 +000092#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
93static int debug = -1;
94module_param(debug, int, 0);
95MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
Greg Rose92915f72010-01-09 02:24:10 +000096
97/* forward decls */
Don Skidmore220fe052013-09-21 01:40:49 +000098static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
Alexander Duyckfa71ae22012-05-11 08:32:50 +000099static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
Alexander Duyck56e94092012-07-20 08:10:03 +0000100static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000101
Mark Rustaddbf8b0d2014-03-04 03:02:34 +0000102static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
103{
104 struct ixgbevf_adapter *adapter = hw->back;
105
106 if (!hw->hw_addr)
107 return;
108 hw->hw_addr = NULL;
109 dev_err(&adapter->pdev->dev, "Adapter removed\n");
Mark Rustadea699562014-03-12 00:38:51 +0000110 if (test_bit(__IXGBEVF_WORK_INIT, &adapter->state))
111 schedule_work(&adapter->watchdog_task);
Mark Rustaddbf8b0d2014-03-04 03:02:34 +0000112}
113
114static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
115{
116 u32 value;
117
118 /* The following check not only optimizes a bit by not
119 * performing a read on the status register when the
120 * register just read was a status register read that
121 * returned IXGBE_FAILED_READ_REG. It also blocks any
122 * potential recursion.
123 */
124 if (reg == IXGBE_VFSTATUS) {
125 ixgbevf_remove_adapter(hw);
126 return;
127 }
Mark Rustad32c74942014-03-18 07:03:35 +0000128 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
Mark Rustaddbf8b0d2014-03-04 03:02:34 +0000129 if (value == IXGBE_FAILED_READ_REG)
130 ixgbevf_remove_adapter(hw);
131}
132
Mark Rustad32c74942014-03-18 07:03:35 +0000133u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
Mark Rustaddbf8b0d2014-03-04 03:02:34 +0000134{
135 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
136 u32 value;
137
138 if (IXGBE_REMOVED(reg_addr))
139 return IXGBE_FAILED_READ_REG;
140 value = readl(reg_addr + reg);
141 if (unlikely(value == IXGBE_FAILED_READ_REG))
142 ixgbevf_check_remove(hw, reg);
143 return value;
144}
145
Ben Hutchings49ce9c22012-07-10 10:56:00 +0000146/**
Greg Rose65d676c2011-02-03 06:54:13 +0000147 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
Greg Rose92915f72010-01-09 02:24:10 +0000148 * @adapter: pointer to adapter struct
149 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
150 * @queue: queue to map the corresponding interrupt to
151 * @msix_vector: the vector to map to the corresponding queue
Greg Rose92915f72010-01-09 02:24:10 +0000152 */
153static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
154 u8 queue, u8 msix_vector)
155{
156 u32 ivar, index;
157 struct ixgbe_hw *hw = &adapter->hw;
158 if (direction == -1) {
159 /* other causes */
160 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
161 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
162 ivar &= ~0xFF;
163 ivar |= msix_vector;
164 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
165 } else {
166 /* tx or rx causes */
167 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
168 index = ((16 * (queue & 1)) + (8 * direction));
169 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
170 ivar &= ~(0xFF << index);
171 ivar |= (msix_vector << index);
172 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
173 }
174}
175
Alexander Duyck70a10e22012-05-11 08:33:21 +0000176static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800177 struct ixgbevf_tx_buffer *tx_buffer)
Greg Rose92915f72010-01-09 02:24:10 +0000178{
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800179 if (tx_buffer->skb) {
180 dev_kfree_skb_any(tx_buffer->skb);
181 if (dma_unmap_len(tx_buffer, len))
Alexander Duyck70a10e22012-05-11 08:33:21 +0000182 dma_unmap_single(tx_ring->dev,
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800183 dma_unmap_addr(tx_buffer, dma),
184 dma_unmap_len(tx_buffer, len),
Nick Nunley2a1f8792010-04-27 13:10:50 +0000185 DMA_TO_DEVICE);
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800186 } else if (dma_unmap_len(tx_buffer, len)) {
187 dma_unmap_page(tx_ring->dev,
188 dma_unmap_addr(tx_buffer, dma),
189 dma_unmap_len(tx_buffer, len),
190 DMA_TO_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +0000191 }
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800192 tx_buffer->next_to_watch = NULL;
193 tx_buffer->skb = NULL;
194 dma_unmap_len_set(tx_buffer, len, 0);
195 /* tx_buffer must be completely set up in the transmit path */
Greg Rose92915f72010-01-09 02:24:10 +0000196}
197
Greg Rose92915f72010-01-09 02:24:10 +0000198#define IXGBE_MAX_TXD_PWR 14
199#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
200
201/* Tx Descriptors needed, worst case */
Alexander Duyck35959902012-05-11 08:32:40 +0000202#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
203#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
Greg Rose92915f72010-01-09 02:24:10 +0000204
205static void ixgbevf_tx_timeout(struct net_device *netdev);
206
207/**
208 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000209 * @q_vector: board private structure
Greg Rose92915f72010-01-09 02:24:10 +0000210 * @tx_ring: tx ring to clean
211 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000212static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
Greg Rose92915f72010-01-09 02:24:10 +0000213 struct ixgbevf_ring *tx_ring)
214{
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000215 struct ixgbevf_adapter *adapter = q_vector->adapter;
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800216 struct ixgbevf_tx_buffer *tx_buffer;
217 union ixgbe_adv_tx_desc *tx_desc;
Greg Rose92915f72010-01-09 02:24:10 +0000218 unsigned int total_bytes = 0, total_packets = 0;
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800219 unsigned int budget = tx_ring->count / 2;
220 unsigned int i = tx_ring->next_to_clean;
Greg Rose92915f72010-01-09 02:24:10 +0000221
Alexander Duyck10cc1bd2012-07-16 23:44:48 +0000222 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
223 return true;
224
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800225 tx_buffer = &tx_ring->tx_buffer_info[i];
226 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
227 i -= tx_ring->count;
Greg Rose92915f72010-01-09 02:24:10 +0000228
Alexander Duycke757e3e2013-01-31 07:43:22 +0000229 do {
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800230 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000231
232 /* if next_to_watch is not set then there is no work pending */
233 if (!eop_desc)
234 break;
235
236 /* prevent any other reads prior to eop_desc */
237 read_barrier_depends();
238
239 /* if DD is not set pending work has not been completed */
240 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
241 break;
242
243 /* clear next_to_watch to prevent false hangs */
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800244 tx_buffer->next_to_watch = NULL;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000245
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800246 /* update the statistics for this packet */
247 total_bytes += tx_buffer->bytecount;
248 total_packets += tx_buffer->gso_segs;
Greg Rose92915f72010-01-09 02:24:10 +0000249
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800250 /* free the skb */
251 dev_kfree_skb_any(tx_buffer->skb);
252
253 /* unmap skb header data */
254 dma_unmap_single(tx_ring->dev,
255 dma_unmap_addr(tx_buffer, dma),
256 dma_unmap_len(tx_buffer, len),
257 DMA_TO_DEVICE);
258
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800259 /* clear tx_buffer data */
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800260 tx_buffer->skb = NULL;
261 dma_unmap_len_set(tx_buffer, len, 0);
Greg Rose92915f72010-01-09 02:24:10 +0000262
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800263 /* unmap remaining buffers */
264 while (tx_desc != eop_desc) {
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800265 tx_buffer++;
266 tx_desc++;
Greg Rose92915f72010-01-09 02:24:10 +0000267 i++;
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800268 if (unlikely(!i)) {
269 i -= tx_ring->count;
270 tx_buffer = tx_ring->tx_buffer_info;
271 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
272 }
Alexander Duycke757e3e2013-01-31 07:43:22 +0000273
Emil Tantilov9bdfefd2014-01-17 18:30:04 -0800274 /* unmap any remaining paged data */
275 if (dma_unmap_len(tx_buffer, len)) {
276 dma_unmap_page(tx_ring->dev,
277 dma_unmap_addr(tx_buffer, dma),
278 dma_unmap_len(tx_buffer, len),
279 DMA_TO_DEVICE);
280 dma_unmap_len_set(tx_buffer, len, 0);
281 }
Greg Rose92915f72010-01-09 02:24:10 +0000282 }
283
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800284 /* move us one more past the eop_desc for start of next pkt */
285 tx_buffer++;
286 tx_desc++;
287 i++;
288 if (unlikely(!i)) {
289 i -= tx_ring->count;
290 tx_buffer = tx_ring->tx_buffer_info;
291 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
292 }
293
294 /* issue prefetch for next Tx descriptor */
295 prefetch(tx_desc);
296
297 /* update budget accounting */
298 budget--;
299 } while (likely(budget));
300
301 i += tx_ring->count;
Greg Rose92915f72010-01-09 02:24:10 +0000302 tx_ring->next_to_clean = i;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000303 u64_stats_update_begin(&tx_ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -0800304 tx_ring->stats.bytes += total_bytes;
305 tx_ring->stats.packets += total_packets;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000306 u64_stats_update_end(&tx_ring->syncp);
Greg Roseac6ed8f2012-08-31 05:59:28 +0000307 q_vector->tx.total_bytes += total_bytes;
308 q_vector->tx.total_packets += total_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000309
Emil Tantilov7ad1a092014-01-17 18:30:03 -0800310#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
311 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
312 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
313 /* Make sure that anybody stopping the queue after this
314 * sees the new next_to_clean.
315 */
316 smp_mb();
317
318 if (__netif_subqueue_stopped(tx_ring->netdev,
319 tx_ring->queue_index) &&
320 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
321 netif_wake_subqueue(tx_ring->netdev,
322 tx_ring->queue_index);
323 ++tx_ring->tx_stats.restart_queue;
324 }
325 }
326
327 return !!budget;
Greg Rose92915f72010-01-09 02:24:10 +0000328}
329
330/**
331 * ixgbevf_receive_skb - Send a completed packet up the stack
332 * @q_vector: structure containing interrupt and ring information
333 * @skb: packet to send up
Greg Rose92915f72010-01-09 02:24:10 +0000334 * @rx_desc: rx descriptor
335 **/
336static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
Emil Tantilovec62fe22014-11-08 01:39:20 +0000337 struct sk_buff *skb,
Greg Rose92915f72010-01-09 02:24:10 +0000338 union ixgbe_adv_rx_desc *rx_desc)
339{
340 struct ixgbevf_adapter *adapter = q_vector->adapter;
Emil Tantilovec62fe22014-11-08 01:39:20 +0000341 bool is_vlan = !!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP);
Greg Rosedd1ed3b2011-08-27 02:06:25 +0000342 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
Greg Rose92915f72010-01-09 02:24:10 +0000343
Pascal Bouchareine5d9a5332012-06-14 02:18:18 +0000344 if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
Patrick McHardy86a9bad2013-04-19 02:04:30 +0000345 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
Jiri Pirkodadcd652011-07-21 03:25:09 +0000346
Greg Rose366c1092012-11-13 04:03:18 +0000347 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
348 napi_gro_receive(&q_vector->napi, skb);
349 else
350 netif_rx(skb);
Greg Rose92915f72010-01-09 02:24:10 +0000351}
352
353/**
Jacob Keller08681612013-09-21 06:24:09 +0000354 * ixgbevf_rx_skb - Helper function to determine proper Rx method
355 * @q_vector: structure containing interrupt and ring information
356 * @skb: packet to send up
Jacob Keller08681612013-09-21 06:24:09 +0000357 * @rx_desc: rx descriptor
358 **/
359static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
Emil Tantilovec62fe22014-11-08 01:39:20 +0000360 struct sk_buff *skb,
Jacob Keller08681612013-09-21 06:24:09 +0000361 union ixgbe_adv_rx_desc *rx_desc)
362{
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000363#ifdef CONFIG_NET_RX_BUSY_POLL
364 skb_mark_napi_id(skb, &q_vector->napi);
365
366 if (ixgbevf_qv_busy_polling(q_vector)) {
367 netif_receive_skb(skb);
368 /* exit early if we busy polled */
369 return;
370 }
371#endif /* CONFIG_NET_RX_BUSY_POLL */
372
Emil Tantilovec62fe22014-11-08 01:39:20 +0000373 ixgbevf_receive_skb(q_vector, skb, rx_desc);
Jacob Keller08681612013-09-21 06:24:09 +0000374}
375
Emil Tantilovec62fe22014-11-08 01:39:20 +0000376/* ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
377 * @ring: structure containig ring specific data
378 * @rx_desc: current Rx descriptor being processed
Greg Rose92915f72010-01-09 02:24:10 +0000379 * @skb: skb currently being received and modified
Emil Tantilovec62fe22014-11-08 01:39:20 +0000380 */
Greg Rose55fb2772012-11-06 05:53:32 +0000381static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
Emil Tantilovec62fe22014-11-08 01:39:20 +0000382 union ixgbe_adv_rx_desc *rx_desc,
383 struct sk_buff *skb)
Greg Rose92915f72010-01-09 02:24:10 +0000384{
Eric Dumazetbc8acf22010-09-02 13:07:41 -0700385 skb_checksum_none_assert(skb);
Greg Rose92915f72010-01-09 02:24:10 +0000386
387 /* Rx csum disabled */
Alexander Duyckfb401952012-05-11 08:33:16 +0000388 if (!(ring->netdev->features & NETIF_F_RXCSUM))
Greg Rose92915f72010-01-09 02:24:10 +0000389 return;
390
391 /* if IP and error */
Emil Tantilovec62fe22014-11-08 01:39:20 +0000392 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
393 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
Emil Tantilov095e2612014-01-17 18:30:00 -0800394 ring->rx_stats.csum_err++;
Greg Rose92915f72010-01-09 02:24:10 +0000395 return;
396 }
397
Emil Tantilovec62fe22014-11-08 01:39:20 +0000398 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
Greg Rose92915f72010-01-09 02:24:10 +0000399 return;
400
Emil Tantilovec62fe22014-11-08 01:39:20 +0000401 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
Emil Tantilov095e2612014-01-17 18:30:00 -0800402 ring->rx_stats.csum_err++;
Greg Rose92915f72010-01-09 02:24:10 +0000403 return;
404 }
405
406 /* It must be a TCP or UDP packet with a valid checksum */
407 skb->ip_summed = CHECKSUM_UNNECESSARY;
Greg Rose92915f72010-01-09 02:24:10 +0000408}
409
Emil Tantilovbafa5782014-11-08 01:39:15 +0000410static bool ixgbevf_alloc_mapped_skb(struct ixgbevf_ring *rx_ring,
411 struct ixgbevf_rx_buffer *bi)
412{
413 struct sk_buff *skb = bi->skb;
414 dma_addr_t dma = bi->dma;
415
416 if (unlikely(skb))
417 return true;
418
419 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
420 rx_ring->rx_buf_len);
421 if (unlikely(!skb)) {
422 rx_ring->rx_stats.alloc_rx_buff_failed++;
423 return false;
424 }
425
426 dma = dma_map_single(rx_ring->dev, skb->data,
427 rx_ring->rx_buf_len, DMA_FROM_DEVICE);
428
429 /* if mapping failed free memory back to system since
430 * there isn't much point in holding memory we can't use
431 */
432 if (dma_mapping_error(rx_ring->dev, dma)) {
433 dev_kfree_skb_any(skb);
434
435 rx_ring->rx_stats.alloc_rx_buff_failed++;
436 return false;
437 }
438
439 bi->skb = skb;
440 bi->dma = dma;
441
442 return true;
443}
444
Greg Rose92915f72010-01-09 02:24:10 +0000445/**
446 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
Emil Tantilov095e2612014-01-17 18:30:00 -0800447 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
Emil Tantilovbafa5782014-11-08 01:39:15 +0000448 * @cleaned_count: number of buffers to replace
Greg Rose92915f72010-01-09 02:24:10 +0000449 **/
Emil Tantilov095e2612014-01-17 18:30:00 -0800450static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
Emil Tantilovbafa5782014-11-08 01:39:15 +0000451 u16 cleaned_count)
Greg Rose92915f72010-01-09 02:24:10 +0000452{
Greg Rose92915f72010-01-09 02:24:10 +0000453 union ixgbe_adv_rx_desc *rx_desc;
454 struct ixgbevf_rx_buffer *bi;
Alexander Duyckfb401952012-05-11 08:33:16 +0000455 unsigned int i = rx_ring->next_to_use;
Greg Rose92915f72010-01-09 02:24:10 +0000456
Emil Tantilovbafa5782014-11-08 01:39:15 +0000457 /* nothing to do or no valid netdev defined */
458 if (!cleaned_count || !rx_ring->netdev)
459 return;
Greg Roseb9dd2452012-11-02 05:50:21 +0000460
Emil Tantilovbafa5782014-11-08 01:39:15 +0000461 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
462 bi = &rx_ring->rx_buffer_info[i];
463 i -= rx_ring->count;
Greg Roseb9dd2452012-11-02 05:50:21 +0000464
Emil Tantilovbafa5782014-11-08 01:39:15 +0000465 do {
466 if (!ixgbevf_alloc_mapped_skb(rx_ring, bi))
467 break;
Emil Tantilov05d063a2014-01-17 18:29:59 -0800468
Emil Tantilovbafa5782014-11-08 01:39:15 +0000469 /* Refresh the desc even if pkt_addr didn't change
470 * because each write-back erases this info.
471 */
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000472 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
Greg Rose92915f72010-01-09 02:24:10 +0000473
Emil Tantilovbafa5782014-11-08 01:39:15 +0000474 rx_desc++;
475 bi++;
Greg Rose92915f72010-01-09 02:24:10 +0000476 i++;
Emil Tantilovbafa5782014-11-08 01:39:15 +0000477 if (unlikely(!i)) {
478 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
479 bi = rx_ring->rx_buffer_info;
480 i -= rx_ring->count;
481 }
Greg Rose92915f72010-01-09 02:24:10 +0000482
Emil Tantilovbafa5782014-11-08 01:39:15 +0000483 /* clear the hdr_addr for the next_to_use descriptor */
484 rx_desc->read.hdr_addr = 0;
485
486 cleaned_count--;
487 } while (cleaned_count);
488
489 i += rx_ring->count;
490
491 if (rx_ring->next_to_use != i) {
492 /* record the next descriptor to use */
493 rx_ring->next_to_use = i;
494
495 /* Force memory writes to complete before letting h/w
496 * know there are new descriptors to fetch. (Only
497 * applicable for weak-ordered memory model archs,
498 * such as IA-64).
499 */
500 wmb();
501 ixgbevf_write_tail(rx_ring, i);
502 }
Greg Rose92915f72010-01-09 02:24:10 +0000503}
504
505static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000506 u32 qmask)
Greg Rose92915f72010-01-09 02:24:10 +0000507{
Greg Rose92915f72010-01-09 02:24:10 +0000508 struct ixgbe_hw *hw = &adapter->hw;
509
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000510 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
Greg Rose92915f72010-01-09 02:24:10 +0000511}
512
Jacob Keller08e50a22013-09-21 06:24:14 +0000513static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
514 struct ixgbevf_ring *rx_ring,
515 int budget)
Greg Rose92915f72010-01-09 02:24:10 +0000516{
Greg Rose92915f72010-01-09 02:24:10 +0000517 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
518 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
519 struct sk_buff *skb;
520 unsigned int i;
Greg Rose92915f72010-01-09 02:24:10 +0000521 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
Emil Tantilovbafa5782014-11-08 01:39:15 +0000522 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
Greg Rose92915f72010-01-09 02:24:10 +0000523
524 i = rx_ring->next_to_clean;
Alexander Duyck908421f2012-05-11 08:33:00 +0000525 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +0000526 rx_buffer_info = &rx_ring->rx_buffer_info[i];
527
Emil Tantilovec62fe22014-11-08 01:39:20 +0000528 while (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD)) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000529 if (!budget)
Greg Rose92915f72010-01-09 02:24:10 +0000530 break;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000531 budget--;
Greg Rose92915f72010-01-09 02:24:10 +0000532
Jeff Kirsher2d0bb1c2010-08-08 16:02:31 +0000533 rmb(); /* read descriptor and rx_buffer_info after status DD */
Emil Tantilovec62fe22014-11-08 01:39:20 +0000534
Greg Rose92915f72010-01-09 02:24:10 +0000535 skb = rx_buffer_info->skb;
536 prefetch(skb->data - NET_IP_ALIGN);
537 rx_buffer_info->skb = NULL;
538
Emil Tantilovec62fe22014-11-08 01:39:20 +0000539 dma_unmap_single(rx_ring->dev, rx_buffer_info->dma,
540 rx_ring->rx_buf_len,
541 DMA_FROM_DEVICE);
542 rx_buffer_info->dma = 0;
543 skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
Greg Rose92915f72010-01-09 02:24:10 +0000544
Greg Rose92915f72010-01-09 02:24:10 +0000545 i++;
546 if (i == rx_ring->count)
547 i = 0;
548
Alexander Duyck908421f2012-05-11 08:33:00 +0000549 next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +0000550 prefetch(next_rxd);
551 cleaned_count++;
552
553 next_buffer = &rx_ring->rx_buffer_info[i];
554
Emil Tantilovec62fe22014-11-08 01:39:20 +0000555 if (!(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))) {
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000556 skb->next = next_buffer->skb;
Alexander Duyck5c60f812012-09-01 05:12:38 +0000557 IXGBE_CB(skb->next)->prev = skb;
Emil Tantilov095e2612014-01-17 18:30:00 -0800558 rx_ring->rx_stats.non_eop_descs++;
Greg Rose92915f72010-01-09 02:24:10 +0000559 goto next_desc;
560 }
561
Alexander Duyck5c60f812012-09-01 05:12:38 +0000562 /* we should not be chaining buffers, if we did drop the skb */
563 if (IXGBE_CB(skb)->prev) {
564 do {
565 struct sk_buff *this = skb;
566 skb = IXGBE_CB(skb)->prev;
567 dev_kfree_skb(this);
568 } while (skb);
569 goto next_desc;
570 }
571
Greg Rose92915f72010-01-09 02:24:10 +0000572 /* ERR_MASK will only have valid bits if EOP set */
Emil Tantilovec62fe22014-11-08 01:39:20 +0000573 if (unlikely(ixgbevf_test_staterr(rx_desc,
574 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
Greg Rose92915f72010-01-09 02:24:10 +0000575 dev_kfree_skb_irq(skb);
576 goto next_desc;
577 }
578
Emil Tantilovec62fe22014-11-08 01:39:20 +0000579 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
Greg Rose92915f72010-01-09 02:24:10 +0000580
581 /* probably a little skewed due to removing CRC */
582 total_rx_bytes += skb->len;
583 total_rx_packets++;
584
Alexander Duyckfb401952012-05-11 08:33:16 +0000585 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
Greg Rose92915f72010-01-09 02:24:10 +0000586
John Fastabend815cccb2012-10-24 08:13:09 +0000587 /* Workaround hardware that can't do proper VEPA multicast
588 * source pruning.
589 */
Florian Fainellibd9d5592014-02-28 15:46:49 -0800590 if ((skb->pkt_type == PACKET_BROADCAST ||
591 skb->pkt_type == PACKET_MULTICAST) &&
Emil Tantilov095e2612014-01-17 18:30:00 -0800592 ether_addr_equal(rx_ring->netdev->dev_addr,
Joe Perches7367d0b2013-09-01 11:51:23 -0700593 eth_hdr(skb)->h_source)) {
John Fastabend815cccb2012-10-24 08:13:09 +0000594 dev_kfree_skb_irq(skb);
595 goto next_desc;
596 }
597
Emil Tantilovec62fe22014-11-08 01:39:20 +0000598 ixgbevf_rx_skb(q_vector, skb, rx_desc);
Greg Rose92915f72010-01-09 02:24:10 +0000599
600next_desc:
Greg Rose92915f72010-01-09 02:24:10 +0000601 /* return some buffers to hardware, one at a time is too slow */
602 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
Emil Tantilov095e2612014-01-17 18:30:00 -0800603 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
Greg Rose92915f72010-01-09 02:24:10 +0000604 cleaned_count = 0;
605 }
606
607 /* use prefetched values */
608 rx_desc = next_rxd;
609 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Greg Rose92915f72010-01-09 02:24:10 +0000610 }
611
612 rx_ring->next_to_clean = i;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000613 u64_stats_update_begin(&rx_ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -0800614 rx_ring->stats.packets += total_rx_packets;
615 rx_ring->stats.bytes += total_rx_bytes;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000616 u64_stats_update_end(&rx_ring->syncp);
Greg Roseac6ed8f2012-08-31 05:59:28 +0000617 q_vector->rx.total_packets += total_rx_packets;
618 q_vector->rx.total_bytes += total_rx_bytes;
Greg Rose92915f72010-01-09 02:24:10 +0000619
Emil Tantilovbafa5782014-11-08 01:39:15 +0000620 if (cleaned_count)
621 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
622
Jacob Keller08e50a22013-09-21 06:24:14 +0000623 return total_rx_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000624}
625
626/**
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000627 * ixgbevf_poll - NAPI polling calback
Greg Rose92915f72010-01-09 02:24:10 +0000628 * @napi: napi struct with our devices info in it
629 * @budget: amount of work driver is allowed to do this pass, in packets
630 *
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000631 * This function will clean more than one or more rings associated with a
Greg Rose92915f72010-01-09 02:24:10 +0000632 * q_vector.
633 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000634static int ixgbevf_poll(struct napi_struct *napi, int budget)
Greg Rose92915f72010-01-09 02:24:10 +0000635{
636 struct ixgbevf_q_vector *q_vector =
637 container_of(napi, struct ixgbevf_q_vector, napi);
638 struct ixgbevf_adapter *adapter = q_vector->adapter;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000639 struct ixgbevf_ring *ring;
640 int per_ring_budget;
641 bool clean_complete = true;
642
643 ixgbevf_for_each_ring(ring, q_vector->tx)
644 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
Greg Rose92915f72010-01-09 02:24:10 +0000645
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000646#ifdef CONFIG_NET_RX_BUSY_POLL
647 if (!ixgbevf_qv_lock_napi(q_vector))
648 return budget;
649#endif
650
Greg Rose92915f72010-01-09 02:24:10 +0000651 /* attempt to distribute budget to each queue fairly, but don't allow
652 * the budget to go below 1 because we'll exit polling */
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000653 if (q_vector->rx.count > 1)
654 per_ring_budget = max(budget/q_vector->rx.count, 1);
655 else
656 per_ring_budget = budget;
Greg Rose92915f72010-01-09 02:24:10 +0000657
Greg Rose366c1092012-11-13 04:03:18 +0000658 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000659 ixgbevf_for_each_ring(ring, q_vector->rx)
Jacob Keller08e50a22013-09-21 06:24:14 +0000660 clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring,
661 per_ring_budget)
662 < per_ring_budget);
Greg Rose366c1092012-11-13 04:03:18 +0000663 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
Greg Rose92915f72010-01-09 02:24:10 +0000664
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000665#ifdef CONFIG_NET_RX_BUSY_POLL
666 ixgbevf_qv_unlock_napi(q_vector);
667#endif
668
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000669 /* If all work not completed, return budget and keep polling */
670 if (!clean_complete)
671 return budget;
672 /* all work done, exit the polling mode */
673 napi_complete(napi);
674 if (adapter->rx_itr_setting & 1)
675 ixgbevf_set_itr(q_vector);
Mark Rustad2e7cfbd2014-03-04 03:02:13 +0000676 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
677 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000678 ixgbevf_irq_enable_queues(adapter,
679 1 << q_vector->v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000680
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000681 return 0;
Greg Rose92915f72010-01-09 02:24:10 +0000682}
683
Greg Rosece422602012-05-22 02:17:49 +0000684/**
685 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
686 * @q_vector: structure containing interrupt and ring information
687 */
Jacob Keller38496232013-10-22 06:19:18 +0000688void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
Greg Rosece422602012-05-22 02:17:49 +0000689{
690 struct ixgbevf_adapter *adapter = q_vector->adapter;
691 struct ixgbe_hw *hw = &adapter->hw;
692 int v_idx = q_vector->v_idx;
693 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
694
695 /*
696 * set the WDIS bit to not clear the timer bits and cause an
697 * immediate assertion of the interrupt
698 */
699 itr_reg |= IXGBE_EITR_CNT_WDIS;
700
701 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
702}
Greg Rose92915f72010-01-09 02:24:10 +0000703
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000704#ifdef CONFIG_NET_RX_BUSY_POLL
705/* must be called with local_bh_disable()d */
706static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
707{
708 struct ixgbevf_q_vector *q_vector =
709 container_of(napi, struct ixgbevf_q_vector, napi);
710 struct ixgbevf_adapter *adapter = q_vector->adapter;
711 struct ixgbevf_ring *ring;
712 int found = 0;
713
714 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
715 return LL_FLUSH_FAILED;
716
717 if (!ixgbevf_qv_lock_poll(q_vector))
718 return LL_FLUSH_BUSY;
719
720 ixgbevf_for_each_ring(ring, q_vector->rx) {
721 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
Jacob Keller3b5dca22013-09-21 06:24:25 +0000722#ifdef BP_EXTENDED_STATS
723 if (found)
Emil Tantilov095e2612014-01-17 18:30:00 -0800724 ring->stats.cleaned += found;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000725 else
Emil Tantilov095e2612014-01-17 18:30:00 -0800726 ring->stats.misses++;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000727#endif
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000728 if (found)
729 break;
730 }
731
732 ixgbevf_qv_unlock_poll(q_vector);
733
734 return found;
735}
736#endif /* CONFIG_NET_RX_BUSY_POLL */
737
Greg Rose92915f72010-01-09 02:24:10 +0000738/**
739 * ixgbevf_configure_msix - Configure MSI-X hardware
740 * @adapter: board private structure
741 *
742 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
743 * interrupts.
744 **/
745static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
746{
747 struct ixgbevf_q_vector *q_vector;
Alexander Duyck6b43c442012-05-11 08:32:45 +0000748 int q_vectors, v_idx;
Greg Rose92915f72010-01-09 02:24:10 +0000749
750 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000751 adapter->eims_enable_mask = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000752
753 /*
754 * Populate the IVAR table and set the ITR values to the
755 * corresponding register.
756 */
757 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
Alexander Duyck6b43c442012-05-11 08:32:45 +0000758 struct ixgbevf_ring *ring;
Greg Rose92915f72010-01-09 02:24:10 +0000759 q_vector = adapter->q_vector[v_idx];
Greg Rose92915f72010-01-09 02:24:10 +0000760
Alexander Duyck6b43c442012-05-11 08:32:45 +0000761 ixgbevf_for_each_ring(ring, q_vector->rx)
762 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000763
Alexander Duyck6b43c442012-05-11 08:32:45 +0000764 ixgbevf_for_each_ring(ring, q_vector->tx)
765 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000766
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000767 if (q_vector->tx.ring && !q_vector->rx.ring) {
768 /* tx only vector */
769 if (adapter->tx_itr_setting == 1)
770 q_vector->itr = IXGBE_10K_ITR;
771 else
772 q_vector->itr = adapter->tx_itr_setting;
773 } else {
774 /* rx or rx/tx vector */
775 if (adapter->rx_itr_setting == 1)
776 q_vector->itr = IXGBE_20K_ITR;
777 else
778 q_vector->itr = adapter->rx_itr_setting;
779 }
Greg Rose92915f72010-01-09 02:24:10 +0000780
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000781 /* add q_vector eims value to global eims_enable_mask */
782 adapter->eims_enable_mask |= 1 << v_idx;
783
784 ixgbevf_write_eitr(q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000785 }
786
787 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000788 /* setup eims_other and add value to global eims_enable_mask */
789 adapter->eims_other = 1 << v_idx;
790 adapter->eims_enable_mask |= adapter->eims_other;
Greg Rose92915f72010-01-09 02:24:10 +0000791}
792
793enum latency_range {
794 lowest_latency = 0,
795 low_latency = 1,
796 bulk_latency = 2,
797 latency_invalid = 255
798};
799
800/**
801 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000802 * @q_vector: structure containing interrupt and ring information
803 * @ring_container: structure containing ring performance data
Greg Rose92915f72010-01-09 02:24:10 +0000804 *
805 * Stores a new ITR value based on packets and byte
806 * counts during the last interrupt. The advantage of per interrupt
807 * computation is faster updates and more accurate ITR for the current
808 * traffic pattern. Constants in this function were computed
809 * based on theoretical maximum wire speed and thresholds were set based
810 * on testing data as well as attempting to minimize response time
811 * while increasing bulk throughput.
812 **/
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000813static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
814 struct ixgbevf_ring_container *ring_container)
Greg Rose92915f72010-01-09 02:24:10 +0000815{
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000816 int bytes = ring_container->total_bytes;
817 int packets = ring_container->total_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000818 u32 timepassed_us;
819 u64 bytes_perint;
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000820 u8 itr_setting = ring_container->itr;
Greg Rose92915f72010-01-09 02:24:10 +0000821
822 if (packets == 0)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000823 return;
Greg Rose92915f72010-01-09 02:24:10 +0000824
825 /* simple throttlerate management
826 * 0-20MB/s lowest (100000 ints/s)
827 * 20-100MB/s low (20000 ints/s)
828 * 100-1249MB/s bulk (8000 ints/s)
829 */
830 /* what was last interrupt timeslice? */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000831 timepassed_us = q_vector->itr >> 2;
Greg Rose92915f72010-01-09 02:24:10 +0000832 bytes_perint = bytes / timepassed_us; /* bytes/usec */
833
834 switch (itr_setting) {
835 case lowest_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000836 if (bytes_perint > 10)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000837 itr_setting = low_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000838 break;
839 case low_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000840 if (bytes_perint > 20)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000841 itr_setting = bulk_latency;
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000842 else if (bytes_perint <= 10)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000843 itr_setting = lowest_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000844 break;
845 case bulk_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000846 if (bytes_perint <= 20)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000847 itr_setting = low_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000848 break;
849 }
850
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000851 /* clear work counters since we have the values we need */
852 ring_container->total_bytes = 0;
853 ring_container->total_packets = 0;
854
855 /* write updated itr to ring container */
856 ring_container->itr = itr_setting;
Greg Rose92915f72010-01-09 02:24:10 +0000857}
858
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000859static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
Greg Rose92915f72010-01-09 02:24:10 +0000860{
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000861 u32 new_itr = q_vector->itr;
862 u8 current_itr;
Greg Rose92915f72010-01-09 02:24:10 +0000863
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000864 ixgbevf_update_itr(q_vector, &q_vector->tx);
865 ixgbevf_update_itr(q_vector, &q_vector->rx);
Greg Rose92915f72010-01-09 02:24:10 +0000866
Alexander Duyck6b43c442012-05-11 08:32:45 +0000867 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
Greg Rose92915f72010-01-09 02:24:10 +0000868
869 switch (current_itr) {
870 /* counts and packets in update_itr are dependent on these numbers */
871 case lowest_latency:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000872 new_itr = IXGBE_100K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000873 break;
874 case low_latency:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000875 new_itr = IXGBE_20K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000876 break;
877 case bulk_latency:
878 default:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000879 new_itr = IXGBE_8K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000880 break;
881 }
882
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000883 if (new_itr != q_vector->itr) {
Greg Rose92915f72010-01-09 02:24:10 +0000884 /* do an exponential smoothing */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000885 new_itr = (10 * new_itr * q_vector->itr) /
886 ((9 * new_itr) + q_vector->itr);
887
888 /* save the algorithm value here */
889 q_vector->itr = new_itr;
890
891 ixgbevf_write_eitr(q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000892 }
Greg Rose92915f72010-01-09 02:24:10 +0000893}
894
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000895static irqreturn_t ixgbevf_msix_other(int irq, void *data)
Greg Rose92915f72010-01-09 02:24:10 +0000896{
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000897 struct ixgbevf_adapter *adapter = data;
Greg Rose92915f72010-01-09 02:24:10 +0000898 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +0000899
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000900 hw->mac.get_link_status = 1;
Greg Rose375b27c2012-01-18 22:13:31 +0000901
Mark Rustad2e7cfbd2014-03-04 03:02:13 +0000902 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
903 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
Don Skidmorec7bb4172013-10-01 04:33:49 -0700904 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rose3a2c4032012-02-01 01:28:15 +0000905
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000906 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
907
Greg Rose92915f72010-01-09 02:24:10 +0000908 return IRQ_HANDLED;
909}
910
Greg Rose92915f72010-01-09 02:24:10 +0000911/**
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000912 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
Greg Rose92915f72010-01-09 02:24:10 +0000913 * @irq: unused
914 * @data: pointer to our q_vector struct for this interrupt vector
915 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000916static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
Greg Rose92915f72010-01-09 02:24:10 +0000917{
918 struct ixgbevf_q_vector *q_vector = data;
Greg Rose92915f72010-01-09 02:24:10 +0000919
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000920 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000921 if (q_vector->rx.ring || q_vector->tx.ring)
922 napi_schedule(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +0000923
924 return IRQ_HANDLED;
925}
926
927static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
928 int r_idx)
929{
930 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
931
Don Skidmore87e70ab2014-01-16 02:30:08 -0800932 a->rx_ring[r_idx]->next = q_vector->rx.ring;
933 q_vector->rx.ring = a->rx_ring[r_idx];
Alexander Duyck6b43c442012-05-11 08:32:45 +0000934 q_vector->rx.count++;
Greg Rose92915f72010-01-09 02:24:10 +0000935}
936
937static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
938 int t_idx)
939{
940 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
941
Don Skidmore87e70ab2014-01-16 02:30:08 -0800942 a->tx_ring[t_idx]->next = q_vector->tx.ring;
943 q_vector->tx.ring = a->tx_ring[t_idx];
Alexander Duyck6b43c442012-05-11 08:32:45 +0000944 q_vector->tx.count++;
Greg Rose92915f72010-01-09 02:24:10 +0000945}
946
947/**
948 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
949 * @adapter: board private structure to initialize
950 *
951 * This function maps descriptor rings to the queue-specific vectors
952 * we were allotted through the MSI-X enabling code. Ideally, we'd have
953 * one vector per ring/queue, but on a constrained vector budget, we
954 * group the rings as "efficiently" as possible. You would add new
955 * mapping configurations in here.
956 **/
957static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
958{
959 int q_vectors;
960 int v_start = 0;
961 int rxr_idx = 0, txr_idx = 0;
962 int rxr_remaining = adapter->num_rx_queues;
963 int txr_remaining = adapter->num_tx_queues;
964 int i, j;
965 int rqpv, tqpv;
966 int err = 0;
967
968 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
969
970 /*
971 * The ideal configuration...
972 * We have enough vectors to map one per queue.
973 */
974 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
975 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
976 map_vector_to_rxq(adapter, v_start, rxr_idx);
977
978 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
979 map_vector_to_txq(adapter, v_start, txr_idx);
980 goto out;
981 }
982
983 /*
984 * If we don't have enough vectors for a 1-to-1
985 * mapping, we'll have to group them so there are
986 * multiple queues per vector.
987 */
988 /* Re-adjusting *qpv takes care of the remainder. */
989 for (i = v_start; i < q_vectors; i++) {
990 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
991 for (j = 0; j < rqpv; j++) {
992 map_vector_to_rxq(adapter, i, rxr_idx);
993 rxr_idx++;
994 rxr_remaining--;
995 }
996 }
997 for (i = v_start; i < q_vectors; i++) {
998 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
999 for (j = 0; j < tqpv; j++) {
1000 map_vector_to_txq(adapter, i, txr_idx);
1001 txr_idx++;
1002 txr_remaining--;
1003 }
1004 }
1005
1006out:
1007 return err;
1008}
1009
1010/**
1011 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1012 * @adapter: board private structure
1013 *
1014 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1015 * interrupts from the kernel.
1016 **/
1017static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1018{
1019 struct net_device *netdev = adapter->netdev;
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001020 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1021 int vector, err;
Greg Rose92915f72010-01-09 02:24:10 +00001022 int ri = 0, ti = 0;
1023
Greg Rose92915f72010-01-09 02:24:10 +00001024 for (vector = 0; vector < q_vectors; vector++) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001025 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1026 struct msix_entry *entry = &adapter->msix_entries[vector];
Greg Rose92915f72010-01-09 02:24:10 +00001027
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001028 if (q_vector->tx.ring && q_vector->rx.ring) {
1029 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1030 "%s-%s-%d", netdev->name, "TxRx", ri++);
1031 ti++;
1032 } else if (q_vector->rx.ring) {
1033 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1034 "%s-%s-%d", netdev->name, "rx", ri++);
1035 } else if (q_vector->tx.ring) {
1036 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1037 "%s-%s-%d", netdev->name, "tx", ti++);
Greg Rose92915f72010-01-09 02:24:10 +00001038 } else {
1039 /* skip this unused q_vector */
1040 continue;
1041 }
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001042 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1043 q_vector->name, q_vector);
Greg Rose92915f72010-01-09 02:24:10 +00001044 if (err) {
1045 hw_dbg(&adapter->hw,
1046 "request_irq failed for MSIX interrupt "
1047 "Error: %d\n", err);
1048 goto free_queue_irqs;
1049 }
1050 }
1051
Greg Rose92915f72010-01-09 02:24:10 +00001052 err = request_irq(adapter->msix_entries[vector].vector,
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001053 &ixgbevf_msix_other, 0, netdev->name, adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001054 if (err) {
1055 hw_dbg(&adapter->hw,
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001056 "request_irq for msix_other failed: %d\n", err);
Greg Rose92915f72010-01-09 02:24:10 +00001057 goto free_queue_irqs;
1058 }
1059
1060 return 0;
1061
1062free_queue_irqs:
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001063 while (vector) {
1064 vector--;
1065 free_irq(adapter->msix_entries[vector].vector,
1066 adapter->q_vector[vector]);
1067 }
xunleera1f6c6b2013-03-05 07:44:20 +00001068 /* This failure is non-recoverable - it indicates the system is
1069 * out of MSIX vector resources and the VF driver cannot run
1070 * without them. Set the number of msix vectors to zero
1071 * indicating that not enough can be allocated. The error
1072 * will be returned to the user indicating device open failed.
1073 * Any further attempts to force the driver to open will also
1074 * fail. The only way to recover is to unload the driver and
1075 * reload it again. If the system has recovered some MSIX
1076 * vectors then it may succeed.
1077 */
1078 adapter->num_msix_vectors = 0;
Greg Rose92915f72010-01-09 02:24:10 +00001079 return err;
1080}
1081
1082static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1083{
1084 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1085
1086 for (i = 0; i < q_vectors; i++) {
1087 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
Alexander Duyck6b43c442012-05-11 08:32:45 +00001088 q_vector->rx.ring = NULL;
1089 q_vector->tx.ring = NULL;
1090 q_vector->rx.count = 0;
1091 q_vector->tx.count = 0;
Greg Rose92915f72010-01-09 02:24:10 +00001092 }
1093}
1094
1095/**
1096 * ixgbevf_request_irq - initialize interrupts
1097 * @adapter: board private structure
1098 *
1099 * Attempts to configure interrupts using the best available
1100 * capabilities of the hardware and kernel.
1101 **/
1102static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1103{
1104 int err = 0;
1105
1106 err = ixgbevf_request_msix_irqs(adapter);
1107
1108 if (err)
1109 hw_dbg(&adapter->hw,
1110 "request_irq failed, Error %d\n", err);
1111
1112 return err;
1113}
1114
1115static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1116{
Greg Rose92915f72010-01-09 02:24:10 +00001117 int i, q_vectors;
1118
1119 q_vectors = adapter->num_msix_vectors;
Greg Rose92915f72010-01-09 02:24:10 +00001120 i = q_vectors - 1;
1121
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001122 free_irq(adapter->msix_entries[i].vector, adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001123 i--;
1124
1125 for (; i >= 0; i--) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001126 /* free only the irqs that were actually requested */
1127 if (!adapter->q_vector[i]->rx.ring &&
1128 !adapter->q_vector[i]->tx.ring)
1129 continue;
1130
Greg Rose92915f72010-01-09 02:24:10 +00001131 free_irq(adapter->msix_entries[i].vector,
1132 adapter->q_vector[i]);
1133 }
1134
1135 ixgbevf_reset_q_vectors(adapter);
1136}
1137
1138/**
1139 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1140 * @adapter: board private structure
1141 **/
1142static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1143{
Greg Rose92915f72010-01-09 02:24:10 +00001144 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001145 int i;
Greg Rose92915f72010-01-09 02:24:10 +00001146
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001147 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001148 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001149 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001150
1151 IXGBE_WRITE_FLUSH(hw);
1152
1153 for (i = 0; i < adapter->num_msix_vectors; i++)
1154 synchronize_irq(adapter->msix_entries[i].vector);
1155}
1156
1157/**
1158 * ixgbevf_irq_enable - Enable default interrupt generation settings
1159 * @adapter: board private structure
1160 **/
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001161static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001162{
1163 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001164
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001165 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1166 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1167 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
Greg Rose92915f72010-01-09 02:24:10 +00001168}
1169
1170/**
Don Skidmorede02dec2014-01-16 02:30:09 -08001171 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1172 * @adapter: board private structure
1173 * @ring: structure containing ring specific data
1174 *
1175 * Configure the Tx descriptor ring after a reset.
1176 **/
1177static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1178 struct ixgbevf_ring *ring)
1179{
1180 struct ixgbe_hw *hw = &adapter->hw;
1181 u64 tdba = ring->dma;
1182 int wait_loop = 10;
1183 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1184 u8 reg_idx = ring->reg_idx;
1185
1186 /* disable queue to avoid issues while updating state */
1187 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1188 IXGBE_WRITE_FLUSH(hw);
1189
1190 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1191 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1192 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1193 ring->count * sizeof(union ixgbe_adv_tx_desc));
1194
1195 /* disable head writeback */
1196 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1197 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1198
1199 /* enable relaxed ordering */
1200 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1201 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1202 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1203
1204 /* reset head and tail pointers */
1205 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1206 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
Mark Rustaddbf8b0d2014-03-04 03:02:34 +00001207 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
Don Skidmorede02dec2014-01-16 02:30:09 -08001208
1209 /* reset ntu and ntc to place SW in sync with hardwdare */
1210 ring->next_to_clean = 0;
1211 ring->next_to_use = 0;
1212
1213 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1214 * to or less than the number of on chip descriptors, which is
1215 * currently 40.
1216 */
1217 txdctl |= (8 << 16); /* WTHRESH = 8 */
1218
1219 /* Setting PTHRESH to 32 both improves performance */
1220 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1221 32; /* PTHRESH = 32 */
1222
1223 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1224
1225 /* poll to verify queue is enabled */
1226 do {
1227 usleep_range(1000, 2000);
1228 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1229 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1230 if (!wait_loop)
1231 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1232}
1233
1234/**
Greg Rose92915f72010-01-09 02:24:10 +00001235 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1236 * @adapter: board private structure
1237 *
1238 * Configure the Tx unit of the MAC after a reset.
1239 **/
1240static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1241{
Don Skidmorede02dec2014-01-16 02:30:09 -08001242 u32 i;
Greg Rose92915f72010-01-09 02:24:10 +00001243
1244 /* Setup the HW Tx Head and Tail descriptor pointers */
Don Skidmorede02dec2014-01-16 02:30:09 -08001245 for (i = 0; i < adapter->num_tx_queues; i++)
1246 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001247}
1248
1249#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1250
1251static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1252{
1253 struct ixgbevf_ring *rx_ring;
1254 struct ixgbe_hw *hw = &adapter->hw;
1255 u32 srrctl;
1256
Don Skidmore87e70ab2014-01-16 02:30:08 -08001257 rx_ring = adapter->rx_ring[index];
Greg Rose92915f72010-01-09 02:24:10 +00001258
1259 srrctl = IXGBE_SRRCTL_DROP_EN;
1260
Alexander Duyck77d5dfc2012-05-11 08:32:19 +00001261 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
Greg Rose92915f72010-01-09 02:24:10 +00001262
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001263 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1264 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1265
Greg Rose92915f72010-01-09 02:24:10 +00001266 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1267}
1268
Don Skidmore1bb9c632013-09-21 01:57:33 +00001269static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1270{
1271 struct ixgbe_hw *hw = &adapter->hw;
1272
1273 /* PSRTYPE must be initialized in 82599 */
1274 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1275 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1276 IXGBE_PSRTYPE_L2HDR;
1277
1278 if (adapter->num_rx_queues > 1)
1279 psrtype |= 1 << 29;
1280
1281 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1282}
1283
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001284static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
1285{
1286 struct ixgbe_hw *hw = &adapter->hw;
1287 struct net_device *netdev = adapter->netdev;
1288 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1289 int i;
1290 u16 rx_buf_len;
1291
1292 /* notify the PF of our intent to use this size of frame */
1293 ixgbevf_rlpml_set_vf(hw, max_frame);
1294
1295 /* PF will allow an extra 4 bytes past for vlan tagged frames */
1296 max_frame += VLAN_HLEN;
1297
1298 /*
Greg Rose85624ca2012-11-13 04:03:19 +00001299 * Allocate buffer sizes that fit well into 32K and
1300 * take into account max frame size of 9.5K
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001301 */
1302 if ((hw->mac.type == ixgbe_mac_X540_vf) &&
1303 (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
1304 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Greg Rose85624ca2012-11-13 04:03:19 +00001305 else if (max_frame <= IXGBEVF_RXBUFFER_2K)
1306 rx_buf_len = IXGBEVF_RXBUFFER_2K;
1307 else if (max_frame <= IXGBEVF_RXBUFFER_4K)
1308 rx_buf_len = IXGBEVF_RXBUFFER_4K;
1309 else if (max_frame <= IXGBEVF_RXBUFFER_8K)
1310 rx_buf_len = IXGBEVF_RXBUFFER_8K;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001311 else
Greg Rose85624ca2012-11-13 04:03:19 +00001312 rx_buf_len = IXGBEVF_RXBUFFER_10K;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001313
1314 for (i = 0; i < adapter->num_rx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08001315 adapter->rx_ring[i]->rx_buf_len = rx_buf_len;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001316}
1317
Don Skidmorede02dec2014-01-16 02:30:09 -08001318#define IXGBEVF_MAX_RX_DESC_POLL 10
1319static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1320 struct ixgbevf_ring *ring)
1321{
1322 struct ixgbe_hw *hw = &adapter->hw;
1323 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1324 u32 rxdctl;
1325 u8 reg_idx = ring->reg_idx;
1326
Mark Rustad26597802014-03-04 03:02:45 +00001327 if (IXGBE_REMOVED(hw->hw_addr))
1328 return;
Don Skidmorede02dec2014-01-16 02:30:09 -08001329 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1330 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1331
1332 /* write value back with RXDCTL.ENABLE bit cleared */
1333 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1334
1335 /* the hardware may take up to 100us to really disable the rx queue */
1336 do {
1337 udelay(10);
1338 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1339 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1340
1341 if (!wait_loop)
1342 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1343 reg_idx);
1344}
1345
1346static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1347 struct ixgbevf_ring *ring)
1348{
1349 struct ixgbe_hw *hw = &adapter->hw;
1350 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1351 u32 rxdctl;
1352 u8 reg_idx = ring->reg_idx;
1353
Mark Rustad26597802014-03-04 03:02:45 +00001354 if (IXGBE_REMOVED(hw->hw_addr))
1355 return;
Don Skidmorede02dec2014-01-16 02:30:09 -08001356 do {
1357 usleep_range(1000, 2000);
1358 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1359 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1360
1361 if (!wait_loop)
1362 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1363 reg_idx);
1364}
1365
1366static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1367 struct ixgbevf_ring *ring)
1368{
1369 struct ixgbe_hw *hw = &adapter->hw;
1370 u64 rdba = ring->dma;
1371 u32 rxdctl;
1372 u8 reg_idx = ring->reg_idx;
1373
1374 /* disable queue to avoid issues while updating state */
1375 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1376 ixgbevf_disable_rx_queue(adapter, ring);
1377
1378 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1379 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1380 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1381 ring->count * sizeof(union ixgbe_adv_rx_desc));
1382
1383 /* enable relaxed ordering */
1384 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1385 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1386
1387 /* reset head and tail pointers */
1388 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1389 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
Mark Rustaddbf8b0d2014-03-04 03:02:34 +00001390 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
Don Skidmorede02dec2014-01-16 02:30:09 -08001391
1392 /* reset ntu and ntc to place SW in sync with hardwdare */
1393 ring->next_to_clean = 0;
1394 ring->next_to_use = 0;
1395
1396 ixgbevf_configure_srrctl(adapter, reg_idx);
1397
1398 /* prevent DMA from exceeding buffer space available */
1399 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1400 rxdctl |= ring->rx_buf_len | IXGBE_RXDCTL_RLPML_EN;
1401 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1402 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1403
1404 ixgbevf_rx_desc_queue_enable(adapter, ring);
Emil Tantilov095e2612014-01-17 18:30:00 -08001405 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
Don Skidmorede02dec2014-01-16 02:30:09 -08001406}
1407
Greg Rose92915f72010-01-09 02:24:10 +00001408/**
1409 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1410 * @adapter: board private structure
1411 *
1412 * Configure the Rx unit of the MAC after a reset.
1413 **/
1414static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1415{
Don Skidmorede02dec2014-01-16 02:30:09 -08001416 int i;
Greg Rose92915f72010-01-09 02:24:10 +00001417
Don Skidmore1bb9c632013-09-21 01:57:33 +00001418 ixgbevf_setup_psrtype(adapter);
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001419
1420 /* set_rx_buffer_len must be called before ring initialization */
1421 ixgbevf_set_rx_buffer_len(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001422
Greg Rose92915f72010-01-09 02:24:10 +00001423 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1424 * the Base and Length of the Rx Descriptor Ring */
Don Skidmorede02dec2014-01-16 02:30:09 -08001425 for (i = 0; i < adapter->num_rx_queues; i++)
1426 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001427}
1428
Patrick McHardy80d5c362013-04-19 02:04:28 +00001429static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1430 __be16 proto, u16 vid)
Greg Rose92915f72010-01-09 02:24:10 +00001431{
1432 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1433 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001434 int err;
1435
John Fastabend55fdd45b2012-10-01 14:52:20 +00001436 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001437
Greg Rose92915f72010-01-09 02:24:10 +00001438 /* add VID to filter table */
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001439 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001440
John Fastabend55fdd45b2012-10-01 14:52:20 +00001441 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001442
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001443 /* translate error return types so error makes sense */
1444 if (err == IXGBE_ERR_MBX)
1445 return -EIO;
1446
1447 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1448 return -EACCES;
1449
Jiri Pirkodadcd652011-07-21 03:25:09 +00001450 set_bit(vid, adapter->active_vlans);
Jiri Pirko8e586132011-12-08 19:52:37 -05001451
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001452 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001453}
1454
Patrick McHardy80d5c362013-04-19 02:04:28 +00001455static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1456 __be16 proto, u16 vid)
Greg Rose92915f72010-01-09 02:24:10 +00001457{
1458 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1459 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001460 int err = -EOPNOTSUPP;
Greg Rose92915f72010-01-09 02:24:10 +00001461
John Fastabend55fdd45b2012-10-01 14:52:20 +00001462 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001463
Greg Rose92915f72010-01-09 02:24:10 +00001464 /* remove VID from filter table */
Greg Rose92fe0bf2012-11-02 05:50:47 +00001465 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001466
John Fastabend55fdd45b2012-10-01 14:52:20 +00001467 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001468
Jiri Pirkodadcd652011-07-21 03:25:09 +00001469 clear_bit(vid, adapter->active_vlans);
Jiri Pirko8e586132011-12-08 19:52:37 -05001470
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001471 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001472}
1473
1474static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1475{
Jiri Pirkodadcd652011-07-21 03:25:09 +00001476 u16 vid;
Greg Rose92915f72010-01-09 02:24:10 +00001477
Jiri Pirkodadcd652011-07-21 03:25:09 +00001478 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
Patrick McHardy80d5c362013-04-19 02:04:28 +00001479 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1480 htons(ETH_P_8021Q), vid);
Greg Rose92915f72010-01-09 02:24:10 +00001481}
1482
Greg Rose46ec20f2011-05-13 01:33:42 +00001483static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1484{
1485 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1486 struct ixgbe_hw *hw = &adapter->hw;
1487 int count = 0;
1488
1489 if ((netdev_uc_count(netdev)) > 10) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00001490 pr_err("Too many unicast filters - No Space\n");
Greg Rose46ec20f2011-05-13 01:33:42 +00001491 return -ENOSPC;
1492 }
1493
1494 if (!netdev_uc_empty(netdev)) {
1495 struct netdev_hw_addr *ha;
1496 netdev_for_each_uc_addr(ha, netdev) {
1497 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1498 udelay(200);
1499 }
1500 } else {
1501 /*
1502 * If the list is empty then send message to PF driver to
1503 * clear all macvlans on this VF.
1504 */
1505 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1506 }
1507
1508 return count;
1509}
1510
Greg Rose92915f72010-01-09 02:24:10 +00001511/**
Greg Rosedee847f2012-11-02 05:50:57 +00001512 * ixgbevf_set_rx_mode - Multicast and unicast set
Greg Rose92915f72010-01-09 02:24:10 +00001513 * @netdev: network interface device structure
1514 *
1515 * The set_rx_method entry point is called whenever the multicast address
Greg Rosedee847f2012-11-02 05:50:57 +00001516 * list, unicast address list or the network interface flags are updated.
1517 * This routine is responsible for configuring the hardware for proper
1518 * multicast mode and configuring requested unicast filters.
Greg Rose92915f72010-01-09 02:24:10 +00001519 **/
1520static void ixgbevf_set_rx_mode(struct net_device *netdev)
1521{
1522 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1523 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001524
John Fastabend55fdd45b2012-10-01 14:52:20 +00001525 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001526
Greg Rose92915f72010-01-09 02:24:10 +00001527 /* reprogram multicast list */
Greg Rose92fe0bf2012-11-02 05:50:47 +00001528 hw->mac.ops.update_mc_addr_list(hw, netdev);
Greg Rose46ec20f2011-05-13 01:33:42 +00001529
1530 ixgbevf_write_uc_addr_list(netdev);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001531
John Fastabend55fdd45b2012-10-01 14:52:20 +00001532 spin_unlock_bh(&adapter->mbx_lock);
Greg Rose92915f72010-01-09 02:24:10 +00001533}
1534
1535static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1536{
1537 int q_idx;
1538 struct ixgbevf_q_vector *q_vector;
1539 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1540
1541 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Greg Rose92915f72010-01-09 02:24:10 +00001542 q_vector = adapter->q_vector[q_idx];
Jacob Kellerc777cdf2013-09-21 06:24:20 +00001543#ifdef CONFIG_NET_RX_BUSY_POLL
1544 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1545#endif
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001546 napi_enable(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +00001547 }
1548}
1549
1550static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1551{
1552 int q_idx;
1553 struct ixgbevf_q_vector *q_vector;
1554 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1555
1556 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1557 q_vector = adapter->q_vector[q_idx];
Greg Rose92915f72010-01-09 02:24:10 +00001558 napi_disable(&q_vector->napi);
Jacob Kellerc777cdf2013-09-21 06:24:20 +00001559#ifdef CONFIG_NET_RX_BUSY_POLL
1560 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1561 pr_info("QV %d locked\n", q_idx);
1562 usleep_range(1000, 20000);
1563 }
1564#endif /* CONFIG_NET_RX_BUSY_POLL */
Greg Rose92915f72010-01-09 02:24:10 +00001565 }
1566}
1567
Don Skidmore220fe052013-09-21 01:40:49 +00001568static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1569{
1570 struct ixgbe_hw *hw = &adapter->hw;
1571 unsigned int def_q = 0;
1572 unsigned int num_tcs = 0;
1573 unsigned int num_rx_queues = 1;
1574 int err;
1575
1576 spin_lock_bh(&adapter->mbx_lock);
1577
1578 /* fetch queue configuration from the PF */
1579 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1580
1581 spin_unlock_bh(&adapter->mbx_lock);
1582
1583 if (err)
1584 return err;
1585
1586 if (num_tcs > 1) {
1587 /* update default Tx ring register index */
Don Skidmore87e70ab2014-01-16 02:30:08 -08001588 adapter->tx_ring[0]->reg_idx = def_q;
Don Skidmore220fe052013-09-21 01:40:49 +00001589
1590 /* we need as many queues as traffic classes */
1591 num_rx_queues = num_tcs;
1592 }
1593
1594 /* if we have a bad config abort request queue reset */
1595 if (adapter->num_rx_queues != num_rx_queues) {
1596 /* force mailbox timeout to prevent further messages */
1597 hw->mbx.timeout = 0;
1598
1599 /* wait for watchdog to come around and bail us out */
1600 adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
1601 }
1602
1603 return 0;
1604}
1605
Greg Rose92915f72010-01-09 02:24:10 +00001606static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1607{
Don Skidmore220fe052013-09-21 01:40:49 +00001608 ixgbevf_configure_dcb(adapter);
1609
Don Skidmorede02dec2014-01-16 02:30:09 -08001610 ixgbevf_set_rx_mode(adapter->netdev);
Greg Rose92915f72010-01-09 02:24:10 +00001611
1612 ixgbevf_restore_vlan(adapter);
1613
1614 ixgbevf_configure_tx(adapter);
1615 ixgbevf_configure_rx(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001616}
1617
Greg Rose33bd9f62010-03-19 02:59:52 +00001618static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1619{
1620 /* Only save pre-reset stats if there are some */
1621 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1622 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1623 adapter->stats.base_vfgprc;
1624 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1625 adapter->stats.base_vfgptc;
1626 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1627 adapter->stats.base_vfgorc;
1628 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1629 adapter->stats.base_vfgotc;
1630 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1631 adapter->stats.base_vfmprc;
1632 }
1633}
1634
1635static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1636{
1637 struct ixgbe_hw *hw = &adapter->hw;
1638
1639 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1640 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1641 adapter->stats.last_vfgorc |=
1642 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1643 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1644 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1645 adapter->stats.last_vfgotc |=
1646 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1647 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1648
1649 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1650 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1651 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1652 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1653 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1654}
1655
Alexander Duyck31186782012-07-20 08:09:58 +00001656static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
1657{
1658 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck56e94092012-07-20 08:10:03 +00001659 int api[] = { ixgbe_mbox_api_11,
1660 ixgbe_mbox_api_10,
Alexander Duyck31186782012-07-20 08:09:58 +00001661 ixgbe_mbox_api_unknown };
1662 int err = 0, idx = 0;
1663
John Fastabend55fdd45b2012-10-01 14:52:20 +00001664 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck31186782012-07-20 08:09:58 +00001665
1666 while (api[idx] != ixgbe_mbox_api_unknown) {
1667 err = ixgbevf_negotiate_api_version(hw, api[idx]);
1668 if (!err)
1669 break;
1670 idx++;
1671 }
1672
John Fastabend55fdd45b2012-10-01 14:52:20 +00001673 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck31186782012-07-20 08:09:58 +00001674}
1675
Greg Rose795180d2012-04-17 04:29:34 +00001676static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001677{
1678 struct net_device *netdev = adapter->netdev;
1679 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001680
1681 ixgbevf_configure_msix(adapter);
1682
John Fastabend55fdd45b2012-10-01 14:52:20 +00001683 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001684
Greg Rose92fe0bf2012-11-02 05:50:47 +00001685 if (is_valid_ether_addr(hw->mac.addr))
1686 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1687 else
1688 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001689
John Fastabend55fdd45b2012-10-01 14:52:20 +00001690 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001691
Peter Zijlstra4e857c52014-03-17 18:06:10 +01001692 smp_mb__before_atomic();
Greg Rose92915f72010-01-09 02:24:10 +00001693 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1694 ixgbevf_napi_enable_all(adapter);
1695
1696 /* enable transmits */
1697 netif_tx_start_all_queues(netdev);
1698
Greg Rose33bd9f62010-03-19 02:59:52 +00001699 ixgbevf_save_reset_stats(adapter);
1700 ixgbevf_init_last_counter_stats(adapter);
1701
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001702 hw->mac.get_link_status = 1;
Greg Rose92915f72010-01-09 02:24:10 +00001703 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rose92915f72010-01-09 02:24:10 +00001704}
1705
Greg Rose795180d2012-04-17 04:29:34 +00001706void ixgbevf_up(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001707{
Greg Rose92915f72010-01-09 02:24:10 +00001708 struct ixgbe_hw *hw = &adapter->hw;
1709
1710 ixgbevf_configure(adapter);
1711
Greg Rose795180d2012-04-17 04:29:34 +00001712 ixgbevf_up_complete(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001713
1714 /* clear any pending interrupts, may auto mask */
1715 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1716
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001717 ixgbevf_irq_enable(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001718}
1719
1720/**
1721 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
Greg Rose92915f72010-01-09 02:24:10 +00001722 * @rx_ring: ring to free buffers from
1723 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08001724static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00001725{
Greg Rose92915f72010-01-09 02:24:10 +00001726 unsigned long size;
1727 unsigned int i;
1728
Greg Rosec0456c22010-01-22 22:47:18 +00001729 if (!rx_ring->rx_buffer_info)
1730 return;
Greg Rose92915f72010-01-09 02:24:10 +00001731
Greg Rosec0456c22010-01-22 22:47:18 +00001732 /* Free all the Rx ring sk_buffs */
Greg Rose92915f72010-01-09 02:24:10 +00001733 for (i = 0; i < rx_ring->count; i++) {
1734 struct ixgbevf_rx_buffer *rx_buffer_info;
1735
1736 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1737 if (rx_buffer_info->dma) {
Emil Tantilov05d063a2014-01-17 18:29:59 -08001738 dma_unmap_single(rx_ring->dev, rx_buffer_info->dma,
Greg Rose92915f72010-01-09 02:24:10 +00001739 rx_ring->rx_buf_len,
Nick Nunley2a1f8792010-04-27 13:10:50 +00001740 DMA_FROM_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +00001741 rx_buffer_info->dma = 0;
1742 }
1743 if (rx_buffer_info->skb) {
1744 struct sk_buff *skb = rx_buffer_info->skb;
1745 rx_buffer_info->skb = NULL;
1746 do {
1747 struct sk_buff *this = skb;
Alexander Duyck5c60f812012-09-01 05:12:38 +00001748 skb = IXGBE_CB(skb)->prev;
Greg Rose92915f72010-01-09 02:24:10 +00001749 dev_kfree_skb(this);
1750 } while (skb);
1751 }
Greg Rose92915f72010-01-09 02:24:10 +00001752 }
1753
1754 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1755 memset(rx_ring->rx_buffer_info, 0, size);
1756
1757 /* Zero out the descriptor ring */
1758 memset(rx_ring->desc, 0, rx_ring->size);
Greg Rose92915f72010-01-09 02:24:10 +00001759}
1760
1761/**
1762 * ixgbevf_clean_tx_ring - Free Tx Buffers
Greg Rose92915f72010-01-09 02:24:10 +00001763 * @tx_ring: ring to be cleaned
1764 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08001765static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00001766{
1767 struct ixgbevf_tx_buffer *tx_buffer_info;
1768 unsigned long size;
1769 unsigned int i;
1770
Greg Rosec0456c22010-01-22 22:47:18 +00001771 if (!tx_ring->tx_buffer_info)
1772 return;
1773
Greg Rose92915f72010-01-09 02:24:10 +00001774 /* Free all the Tx ring sk_buffs */
Greg Rose92915f72010-01-09 02:24:10 +00001775 for (i = 0; i < tx_ring->count; i++) {
1776 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck70a10e22012-05-11 08:33:21 +00001777 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
Greg Rose92915f72010-01-09 02:24:10 +00001778 }
1779
1780 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1781 memset(tx_ring->tx_buffer_info, 0, size);
1782
1783 memset(tx_ring->desc, 0, tx_ring->size);
Greg Rose92915f72010-01-09 02:24:10 +00001784}
1785
1786/**
1787 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1788 * @adapter: board private structure
1789 **/
1790static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1791{
1792 int i;
1793
1794 for (i = 0; i < adapter->num_rx_queues; i++)
Emil Tantilov05d063a2014-01-17 18:29:59 -08001795 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001796}
1797
1798/**
1799 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1800 * @adapter: board private structure
1801 **/
1802static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1803{
1804 int i;
1805
1806 for (i = 0; i < adapter->num_tx_queues; i++)
Emil Tantilov05d063a2014-01-17 18:29:59 -08001807 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001808}
1809
1810void ixgbevf_down(struct ixgbevf_adapter *adapter)
1811{
1812 struct net_device *netdev = adapter->netdev;
1813 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmorede02dec2014-01-16 02:30:09 -08001814 int i;
Greg Rose92915f72010-01-09 02:24:10 +00001815
1816 /* signal that we are down to the interrupt handler */
Mark Rustad5b346dc2014-03-04 03:02:18 +00001817 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
1818 return; /* do nothing if already down */
Don Skidmore858c3dd2013-10-01 04:33:50 -07001819
1820 /* disable all enabled rx queues */
1821 for (i = 0; i < adapter->num_rx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08001822 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001823
1824 netif_tx_disable(netdev);
1825
1826 msleep(10);
1827
1828 netif_tx_stop_all_queues(netdev);
1829
1830 ixgbevf_irq_disable(adapter);
1831
1832 ixgbevf_napi_disable_all(adapter);
1833
1834 del_timer_sync(&adapter->watchdog_timer);
1835 /* can't call flush scheduled work here because it can deadlock
1836 * if linkwatch_event tries to acquire the rtnl_lock which we are
1837 * holding */
1838 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1839 msleep(1);
1840
1841 /* disable transmits in the hardware now that interrupts are off */
1842 for (i = 0; i < adapter->num_tx_queues; i++) {
Don Skidmorede02dec2014-01-16 02:30:09 -08001843 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
1844
1845 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
1846 IXGBE_TXDCTL_SWFLSH);
Greg Rose92915f72010-01-09 02:24:10 +00001847 }
1848
1849 netif_carrier_off(netdev);
1850
1851 if (!pci_channel_offline(adapter->pdev))
1852 ixgbevf_reset(adapter);
1853
1854 ixgbevf_clean_all_tx_rings(adapter);
1855 ixgbevf_clean_all_rx_rings(adapter);
1856}
1857
1858void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1859{
1860 WARN_ON(in_interrupt());
Greg Rosec0456c22010-01-22 22:47:18 +00001861
Greg Rose92915f72010-01-09 02:24:10 +00001862 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1863 msleep(1);
1864
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001865 ixgbevf_down(adapter);
1866 ixgbevf_up(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001867
1868 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1869}
1870
1871void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1872{
1873 struct ixgbe_hw *hw = &adapter->hw;
1874 struct net_device *netdev = adapter->netdev;
1875
Don Skidmore798e3812013-10-01 04:33:51 -07001876 if (hw->mac.ops.reset_hw(hw)) {
Greg Rose92915f72010-01-09 02:24:10 +00001877 hw_dbg(hw, "PF still resetting\n");
Don Skidmore798e3812013-10-01 04:33:51 -07001878 } else {
Greg Rose92915f72010-01-09 02:24:10 +00001879 hw->mac.ops.init_hw(hw);
Don Skidmore798e3812013-10-01 04:33:51 -07001880 ixgbevf_negotiate_api(adapter);
1881 }
Greg Rose92915f72010-01-09 02:24:10 +00001882
1883 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1884 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1885 netdev->addr_len);
1886 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1887 netdev->addr_len);
1888 }
1889}
1890
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001891static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1892 int vectors)
Greg Rose92915f72010-01-09 02:24:10 +00001893{
Emil Tantilova5f93372012-11-13 04:03:17 +00001894 int vector_threshold;
Greg Rose92915f72010-01-09 02:24:10 +00001895
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001896 /* We'll want at least 2 (vector_threshold):
1897 * 1) TxQ[0] + RxQ[0] handler
1898 * 2) Other (Link Status Change, etc.)
Greg Rose92915f72010-01-09 02:24:10 +00001899 */
1900 vector_threshold = MIN_MSIX_COUNT;
1901
1902 /* The more we get, the more we will assign to Tx/Rx Cleanup
1903 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1904 * Right now, we simply care about how many we'll get; we'll
1905 * set them up later while requesting irq's.
1906 */
Alexander Gordeev5c1e35882014-02-18 11:11:46 +01001907 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
1908 vector_threshold, vectors);
Greg Rose92915f72010-01-09 02:24:10 +00001909
Alexander Gordeev5c1e35882014-02-18 11:11:46 +01001910 if (vectors < 0) {
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001911 dev_err(&adapter->pdev->dev,
1912 "Unable to allocate MSI-X interrupts\n");
Greg Rose92915f72010-01-09 02:24:10 +00001913 kfree(adapter->msix_entries);
1914 adapter->msix_entries = NULL;
Alexander Gordeev5c1e35882014-02-18 11:11:46 +01001915 return vectors;
Greg Rose92915f72010-01-09 02:24:10 +00001916 }
Greg Rosedee847f2012-11-02 05:50:57 +00001917
Alexander Gordeev5c1e35882014-02-18 11:11:46 +01001918 /* Adjust for only the vectors we'll use, which is minimum
1919 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1920 * vectors we were allocated.
1921 */
1922 adapter->num_msix_vectors = vectors;
1923
1924 return 0;
Greg Rose92915f72010-01-09 02:24:10 +00001925}
1926
Ben Hutchings49ce9c22012-07-10 10:56:00 +00001927/**
1928 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
Greg Rose92915f72010-01-09 02:24:10 +00001929 * @adapter: board private structure to initialize
1930 *
1931 * This is the top level queue allocation routine. The order here is very
1932 * important, starting with the "most" number of features turned on at once,
1933 * and ending with the smallest set of features. This way large combinations
1934 * can be allocated if they're turned on, and smaller combinations are the
1935 * fallthrough conditions.
1936 *
1937 **/
1938static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1939{
Don Skidmore220fe052013-09-21 01:40:49 +00001940 struct ixgbe_hw *hw = &adapter->hw;
1941 unsigned int def_q = 0;
1942 unsigned int num_tcs = 0;
1943 int err;
1944
Greg Rose92915f72010-01-09 02:24:10 +00001945 /* Start with base case */
1946 adapter->num_rx_queues = 1;
1947 adapter->num_tx_queues = 1;
Don Skidmore220fe052013-09-21 01:40:49 +00001948
1949 spin_lock_bh(&adapter->mbx_lock);
1950
1951 /* fetch queue configuration from the PF */
1952 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1953
1954 spin_unlock_bh(&adapter->mbx_lock);
1955
1956 if (err)
1957 return;
1958
1959 /* we need as many queues as traffic classes */
1960 if (num_tcs > 1)
1961 adapter->num_rx_queues = num_tcs;
Greg Rose92915f72010-01-09 02:24:10 +00001962}
1963
1964/**
1965 * ixgbevf_alloc_queues - Allocate memory for all rings
1966 * @adapter: board private structure to initialize
1967 *
1968 * We allocate one ring per queue at run-time since we don't know the
1969 * number of queues at compile-time. The polling_netdev array is
1970 * intended for Multiqueue, but should work fine with a single queue.
1971 **/
1972static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1973{
Don Skidmore87e70ab2014-01-16 02:30:08 -08001974 struct ixgbevf_ring *ring;
1975 int rx = 0, tx = 0;
Greg Rose92915f72010-01-09 02:24:10 +00001976
Don Skidmore87e70ab2014-01-16 02:30:08 -08001977 for (; tx < adapter->num_tx_queues; tx++) {
1978 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1979 if (!ring)
1980 goto err_allocation;
Greg Rose92915f72010-01-09 02:24:10 +00001981
Don Skidmore87e70ab2014-01-16 02:30:08 -08001982 ring->dev = &adapter->pdev->dev;
1983 ring->netdev = adapter->netdev;
1984 ring->count = adapter->tx_ring_count;
1985 ring->queue_index = tx;
1986 ring->reg_idx = tx;
Greg Rose92915f72010-01-09 02:24:10 +00001987
Don Skidmore87e70ab2014-01-16 02:30:08 -08001988 adapter->tx_ring[tx] = ring;
Greg Rose92915f72010-01-09 02:24:10 +00001989 }
1990
Don Skidmore87e70ab2014-01-16 02:30:08 -08001991 for (; rx < adapter->num_rx_queues; rx++) {
1992 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1993 if (!ring)
1994 goto err_allocation;
1995
1996 ring->dev = &adapter->pdev->dev;
1997 ring->netdev = adapter->netdev;
1998
1999 ring->count = adapter->rx_ring_count;
2000 ring->queue_index = rx;
2001 ring->reg_idx = rx;
2002
2003 adapter->rx_ring[rx] = ring;
Greg Rose92915f72010-01-09 02:24:10 +00002004 }
2005
2006 return 0;
2007
Don Skidmore87e70ab2014-01-16 02:30:08 -08002008err_allocation:
2009 while (tx) {
2010 kfree(adapter->tx_ring[--tx]);
2011 adapter->tx_ring[tx] = NULL;
2012 }
2013
2014 while (rx) {
2015 kfree(adapter->rx_ring[--rx]);
2016 adapter->rx_ring[rx] = NULL;
2017 }
Greg Rose92915f72010-01-09 02:24:10 +00002018 return -ENOMEM;
2019}
2020
2021/**
2022 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2023 * @adapter: board private structure to initialize
2024 *
2025 * Attempt to configure the interrupts using the best available
2026 * capabilities of the hardware and the kernel.
2027 **/
2028static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2029{
Greg Rose91e2b892012-10-03 00:57:23 +00002030 struct net_device *netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00002031 int err = 0;
2032 int vector, v_budget;
2033
2034 /*
2035 * It's easy to be greedy for MSI-X vectors, but it really
2036 * doesn't do us much good if we have a lot more vectors
2037 * than CPU's. So let's be conservative and only ask for
Alexander Duyckfa71ae22012-05-11 08:32:50 +00002038 * (roughly) the same number of vectors as there are CPU's.
2039 * The default is to use pairs of vectors.
Greg Rose92915f72010-01-09 02:24:10 +00002040 */
Alexander Duyckfa71ae22012-05-11 08:32:50 +00002041 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2042 v_budget = min_t(int, v_budget, num_online_cpus());
2043 v_budget += NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00002044
2045 /* A failure in MSI-X entry allocation isn't fatal, but it does
2046 * mean we disable MSI-X capabilities of the adapter. */
2047 adapter->msix_entries = kcalloc(v_budget,
2048 sizeof(struct msix_entry), GFP_KERNEL);
2049 if (!adapter->msix_entries) {
2050 err = -ENOMEM;
2051 goto out;
2052 }
2053
2054 for (vector = 0; vector < v_budget; vector++)
2055 adapter->msix_entries[vector].entry = vector;
2056
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00002057 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2058 if (err)
2059 goto out;
Greg Rose92915f72010-01-09 02:24:10 +00002060
Greg Rose91e2b892012-10-03 00:57:23 +00002061 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2062 if (err)
2063 goto out;
2064
2065 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
2066
Greg Rose92915f72010-01-09 02:24:10 +00002067out:
2068 return err;
2069}
2070
2071/**
2072 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2073 * @adapter: board private structure to initialize
2074 *
2075 * We allocate one q_vector per queue interrupt. If allocation fails we
2076 * return -ENOMEM.
2077 **/
2078static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2079{
2080 int q_idx, num_q_vectors;
2081 struct ixgbevf_q_vector *q_vector;
Greg Rose92915f72010-01-09 02:24:10 +00002082
2083 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00002084
2085 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2086 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2087 if (!q_vector)
2088 goto err_out;
2089 q_vector->adapter = adapter;
2090 q_vector->v_idx = q_idx;
Alexander Duyckfa71ae22012-05-11 08:32:50 +00002091 netif_napi_add(adapter->netdev, &q_vector->napi,
2092 ixgbevf_poll, 64);
Jacob Kellerc777cdf2013-09-21 06:24:20 +00002093#ifdef CONFIG_NET_RX_BUSY_POLL
2094 napi_hash_add(&q_vector->napi);
2095#endif
Greg Rose92915f72010-01-09 02:24:10 +00002096 adapter->q_vector[q_idx] = q_vector;
2097 }
2098
2099 return 0;
2100
2101err_out:
2102 while (q_idx) {
2103 q_idx--;
2104 q_vector = adapter->q_vector[q_idx];
Jacob Kellerc777cdf2013-09-21 06:24:20 +00002105#ifdef CONFIG_NET_RX_BUSY_POLL
2106 napi_hash_del(&q_vector->napi);
2107#endif
Greg Rose92915f72010-01-09 02:24:10 +00002108 netif_napi_del(&q_vector->napi);
2109 kfree(q_vector);
2110 adapter->q_vector[q_idx] = NULL;
2111 }
2112 return -ENOMEM;
2113}
2114
2115/**
2116 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2117 * @adapter: board private structure to initialize
2118 *
2119 * This function frees the memory allocated to the q_vectors. In addition if
2120 * NAPI is enabled it will delete any references to the NAPI struct prior
2121 * to freeing the q_vector.
2122 **/
2123static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2124{
John Fastabendf4477702012-09-16 08:19:46 +00002125 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00002126
2127 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2128 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2129
2130 adapter->q_vector[q_idx] = NULL;
Jacob Kellerc777cdf2013-09-21 06:24:20 +00002131#ifdef CONFIG_NET_RX_BUSY_POLL
2132 napi_hash_del(&q_vector->napi);
2133#endif
John Fastabendf4477702012-09-16 08:19:46 +00002134 netif_napi_del(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +00002135 kfree(q_vector);
2136 }
2137}
2138
2139/**
2140 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2141 * @adapter: board private structure
2142 *
2143 **/
2144static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2145{
2146 pci_disable_msix(adapter->pdev);
2147 kfree(adapter->msix_entries);
2148 adapter->msix_entries = NULL;
Greg Rose92915f72010-01-09 02:24:10 +00002149}
2150
2151/**
2152 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2153 * @adapter: board private structure to initialize
2154 *
2155 **/
2156static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2157{
2158 int err;
2159
2160 /* Number of supported queues */
2161 ixgbevf_set_num_queues(adapter);
2162
2163 err = ixgbevf_set_interrupt_capability(adapter);
2164 if (err) {
2165 hw_dbg(&adapter->hw,
2166 "Unable to setup interrupt capabilities\n");
2167 goto err_set_interrupt;
2168 }
2169
2170 err = ixgbevf_alloc_q_vectors(adapter);
2171 if (err) {
2172 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2173 "vectors\n");
2174 goto err_alloc_q_vectors;
2175 }
2176
2177 err = ixgbevf_alloc_queues(adapter);
2178 if (err) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002179 pr_err("Unable to allocate memory for queues\n");
Greg Rose92915f72010-01-09 02:24:10 +00002180 goto err_alloc_queues;
2181 }
2182
2183 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2184 "Tx Queue count = %u\n",
2185 (adapter->num_rx_queues > 1) ? "Enabled" :
2186 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2187
2188 set_bit(__IXGBEVF_DOWN, &adapter->state);
2189
2190 return 0;
2191err_alloc_queues:
2192 ixgbevf_free_q_vectors(adapter);
2193err_alloc_q_vectors:
2194 ixgbevf_reset_interrupt_capability(adapter);
2195err_set_interrupt:
2196 return err;
2197}
2198
2199/**
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00002200 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2201 * @adapter: board private structure to clear interrupt scheme on
2202 *
2203 * We go through and clear interrupt specific resources and reset the structure
2204 * to pre-load conditions
2205 **/
2206static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2207{
Don Skidmore87e70ab2014-01-16 02:30:08 -08002208 int i;
2209
2210 for (i = 0; i < adapter->num_tx_queues; i++) {
2211 kfree(adapter->tx_ring[i]);
2212 adapter->tx_ring[i] = NULL;
2213 }
2214 for (i = 0; i < adapter->num_rx_queues; i++) {
2215 kfree(adapter->rx_ring[i]);
2216 adapter->rx_ring[i] = NULL;
2217 }
2218
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00002219 adapter->num_tx_queues = 0;
2220 adapter->num_rx_queues = 0;
2221
2222 ixgbevf_free_q_vectors(adapter);
2223 ixgbevf_reset_interrupt_capability(adapter);
2224}
2225
2226/**
Greg Rose92915f72010-01-09 02:24:10 +00002227 * ixgbevf_sw_init - Initialize general software structures
2228 * (struct ixgbevf_adapter)
2229 * @adapter: board private structure to initialize
2230 *
2231 * ixgbevf_sw_init initializes the Adapter private data structure.
2232 * Fields are initialized based on PCI device information and
2233 * OS network device settings (MTU size).
2234 **/
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05002235static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00002236{
2237 struct ixgbe_hw *hw = &adapter->hw;
2238 struct pci_dev *pdev = adapter->pdev;
Greg Rosee1941a72013-02-13 03:02:05 +00002239 struct net_device *netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00002240 int err;
2241
2242 /* PCI config space info */
2243
2244 hw->vendor_id = pdev->vendor;
2245 hw->device_id = pdev->device;
Sergei Shtylyovff938e42011-02-28 11:57:33 -08002246 hw->revision_id = pdev->revision;
Greg Rose92915f72010-01-09 02:24:10 +00002247 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2248 hw->subsystem_device_id = pdev->subsystem_device;
2249
2250 hw->mbx.ops.init_params(hw);
Alexander Duyck56e94092012-07-20 08:10:03 +00002251
2252 /* assume legacy case in which PF would only give VF 2 queues */
2253 hw->mac.max_tx_queues = 2;
2254 hw->mac.max_rx_queues = 2;
2255
Don Skidmore798e3812013-10-01 04:33:51 -07002256 /* lock to protect mailbox accesses */
2257 spin_lock_init(&adapter->mbx_lock);
2258
Greg Rose92915f72010-01-09 02:24:10 +00002259 err = hw->mac.ops.reset_hw(hw);
2260 if (err) {
2261 dev_info(&pdev->dev,
Greg Rosee1941a72013-02-13 03:02:05 +00002262 "PF still in reset state. Is the PF interface up?\n");
Greg Rose92915f72010-01-09 02:24:10 +00002263 } else {
2264 err = hw->mac.ops.init_hw(hw);
2265 if (err) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002266 pr_err("init_shared_code failed: %d\n", err);
Greg Rose92915f72010-01-09 02:24:10 +00002267 goto out;
2268 }
Don Skidmore798e3812013-10-01 04:33:51 -07002269 ixgbevf_negotiate_api(adapter);
Greg Rosee1941a72013-02-13 03:02:05 +00002270 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2271 if (err)
2272 dev_info(&pdev->dev, "Error reading MAC address\n");
2273 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2274 dev_info(&pdev->dev,
2275 "MAC address not assigned by administrator.\n");
2276 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2277 }
2278
2279 if (!is_valid_ether_addr(netdev->dev_addr)) {
2280 dev_info(&pdev->dev, "Assigning random MAC address\n");
2281 eth_hw_addr_random(netdev);
2282 memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len);
Greg Rose92915f72010-01-09 02:24:10 +00002283 }
2284
2285 /* Enable dynamic interrupt throttling rates */
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002286 adapter->rx_itr_setting = 1;
2287 adapter->tx_itr_setting = 1;
Greg Rose92915f72010-01-09 02:24:10 +00002288
Greg Rose92915f72010-01-09 02:24:10 +00002289 /* set default ring sizes */
2290 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2291 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2292
Greg Rose92915f72010-01-09 02:24:10 +00002293 set_bit(__IXGBEVF_DOWN, &adapter->state);
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00002294 return 0;
Greg Rose92915f72010-01-09 02:24:10 +00002295
2296out:
2297 return err;
2298}
2299
Greg Rose92915f72010-01-09 02:24:10 +00002300#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2301 { \
2302 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2303 if (current_counter < last_counter) \
2304 counter += 0x100000000LL; \
2305 last_counter = current_counter; \
2306 counter &= 0xFFFFFFFF00000000LL; \
2307 counter |= current_counter; \
2308 }
2309
2310#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2311 { \
2312 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2313 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2314 u64 current_counter = (current_counter_msb << 32) | \
2315 current_counter_lsb; \
2316 if (current_counter < last_counter) \
2317 counter += 0x1000000000LL; \
2318 last_counter = current_counter; \
2319 counter &= 0xFFFFFFF000000000LL; \
2320 counter |= current_counter; \
2321 }
2322/**
2323 * ixgbevf_update_stats - Update the board statistics counters.
2324 * @adapter: board private structure
2325 **/
2326void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2327{
2328 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose55fb2772012-11-06 05:53:32 +00002329 int i;
Greg Rose92915f72010-01-09 02:24:10 +00002330
Greg Rose088245a2013-01-04 07:37:31 +00002331 if (!adapter->link_up)
2332 return;
2333
Greg Rose92915f72010-01-09 02:24:10 +00002334 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2335 adapter->stats.vfgprc);
2336 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2337 adapter->stats.vfgptc);
2338 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2339 adapter->stats.last_vfgorc,
2340 adapter->stats.vfgorc);
2341 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2342 adapter->stats.last_vfgotc,
2343 adapter->stats.vfgotc);
2344 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2345 adapter->stats.vfmprc);
Greg Rose55fb2772012-11-06 05:53:32 +00002346
2347 for (i = 0; i < adapter->num_rx_queues; i++) {
2348 adapter->hw_csum_rx_error +=
Don Skidmore87e70ab2014-01-16 02:30:08 -08002349 adapter->rx_ring[i]->hw_csum_rx_error;
Don Skidmore87e70ab2014-01-16 02:30:08 -08002350 adapter->rx_ring[i]->hw_csum_rx_error = 0;
Greg Rose55fb2772012-11-06 05:53:32 +00002351 }
Greg Rose92915f72010-01-09 02:24:10 +00002352}
2353
2354/**
2355 * ixgbevf_watchdog - Timer Call-back
2356 * @data: pointer to adapter cast into an unsigned long
2357 **/
2358static void ixgbevf_watchdog(unsigned long data)
2359{
2360 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2361 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002362 u32 eics = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002363 int i;
2364
2365 /*
2366 * Do the watchdog outside of interrupt context due to the lovely
2367 * delays that some of the newer hardware requires
2368 */
2369
2370 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2371 goto watchdog_short_circuit;
2372
2373 /* get one bit for every active tx/rx interrupt vector */
2374 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2375 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
Alexander Duyck6b43c442012-05-11 08:32:45 +00002376 if (qv->rx.ring || qv->tx.ring)
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002377 eics |= 1 << i;
Greg Rose92915f72010-01-09 02:24:10 +00002378 }
2379
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002380 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
Greg Rose92915f72010-01-09 02:24:10 +00002381
2382watchdog_short_circuit:
2383 schedule_work(&adapter->watchdog_task);
2384}
2385
2386/**
2387 * ixgbevf_tx_timeout - Respond to a Tx Hang
2388 * @netdev: network interface device structure
2389 **/
2390static void ixgbevf_tx_timeout(struct net_device *netdev)
2391{
2392 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2393
2394 /* Do the reset outside of interrupt context */
2395 schedule_work(&adapter->reset_task);
2396}
2397
2398static void ixgbevf_reset_task(struct work_struct *work)
2399{
2400 struct ixgbevf_adapter *adapter;
2401 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2402
2403 /* If we're already down or resetting, just bail */
2404 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
Mark Rustad2e7cfbd2014-03-04 03:02:13 +00002405 test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
Greg Rose92915f72010-01-09 02:24:10 +00002406 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2407 return;
2408
2409 adapter->tx_timeout_count++;
2410
2411 ixgbevf_reinit_locked(adapter);
2412}
2413
2414/**
2415 * ixgbevf_watchdog_task - worker thread to bring link up
2416 * @work: pointer to work_struct containing our data
2417 **/
2418static void ixgbevf_watchdog_task(struct work_struct *work)
2419{
2420 struct ixgbevf_adapter *adapter = container_of(work,
2421 struct ixgbevf_adapter,
2422 watchdog_task);
2423 struct net_device *netdev = adapter->netdev;
2424 struct ixgbe_hw *hw = &adapter->hw;
2425 u32 link_speed = adapter->link_speed;
2426 bool link_up = adapter->link_up;
Greg Rose92fe0bf2012-11-02 05:50:47 +00002427 s32 need_reset;
Greg Rose92915f72010-01-09 02:24:10 +00002428
Mark Rustad26597802014-03-04 03:02:45 +00002429 if (IXGBE_REMOVED(hw->hw_addr)) {
2430 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2431 rtnl_lock();
2432 ixgbevf_down(adapter);
2433 rtnl_unlock();
2434 }
2435 return;
2436 }
Don Skidmore220fe052013-09-21 01:40:49 +00002437 ixgbevf_queue_reset_subtask(adapter);
2438
Greg Rose92915f72010-01-09 02:24:10 +00002439 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2440
2441 /*
2442 * Always check the link on the watchdog because we have
2443 * no LSC interrupt
2444 */
Greg Rose92fe0bf2012-11-02 05:50:47 +00002445 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002446
Greg Rose92fe0bf2012-11-02 05:50:47 +00002447 need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002448
Greg Rose92fe0bf2012-11-02 05:50:47 +00002449 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002450
Greg Rose92fe0bf2012-11-02 05:50:47 +00002451 if (need_reset) {
2452 adapter->link_up = link_up;
2453 adapter->link_speed = link_speed;
2454 netif_carrier_off(netdev);
2455 netif_tx_stop_all_queues(netdev);
2456 schedule_work(&adapter->reset_task);
2457 goto pf_has_reset;
Greg Rose92915f72010-01-09 02:24:10 +00002458 }
2459 adapter->link_up = link_up;
2460 adapter->link_speed = link_speed;
2461
2462 if (link_up) {
2463 if (!netif_carrier_ok(netdev)) {
Greg Roseb876a742013-01-19 06:40:22 +00002464 char *link_speed_string;
2465 switch (link_speed) {
2466 case IXGBE_LINK_SPEED_10GB_FULL:
2467 link_speed_string = "10 Gbps";
2468 break;
2469 case IXGBE_LINK_SPEED_1GB_FULL:
2470 link_speed_string = "1 Gbps";
2471 break;
2472 case IXGBE_LINK_SPEED_100_FULL:
2473 link_speed_string = "100 Mbps";
2474 break;
2475 default:
2476 link_speed_string = "unknown speed";
2477 break;
2478 }
Greg Rose6fe59672013-01-04 07:37:26 +00002479 dev_info(&adapter->pdev->dev,
Greg Roseb876a742013-01-19 06:40:22 +00002480 "NIC Link is Up, %s\n", link_speed_string);
Greg Rose92915f72010-01-09 02:24:10 +00002481 netif_carrier_on(netdev);
2482 netif_tx_wake_all_queues(netdev);
Greg Rose92915f72010-01-09 02:24:10 +00002483 }
2484 } else {
2485 adapter->link_up = false;
2486 adapter->link_speed = 0;
2487 if (netif_carrier_ok(netdev)) {
Greg Rose6fe59672013-01-04 07:37:26 +00002488 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
Greg Rose92915f72010-01-09 02:24:10 +00002489 netif_carrier_off(netdev);
2490 netif_tx_stop_all_queues(netdev);
2491 }
2492 }
2493
Greg Rose92915f72010-01-09 02:24:10 +00002494 ixgbevf_update_stats(adapter);
2495
Greg Rose33bd9f62010-03-19 02:59:52 +00002496pf_has_reset:
Greg Rose92915f72010-01-09 02:24:10 +00002497 /* Reset the timer */
Mark Rustad2e7cfbd2014-03-04 03:02:13 +00002498 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
2499 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
Greg Rose92915f72010-01-09 02:24:10 +00002500 mod_timer(&adapter->watchdog_timer,
2501 round_jiffies(jiffies + (2 * HZ)));
2502
2503 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2504}
2505
2506/**
2507 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
Greg Rose92915f72010-01-09 02:24:10 +00002508 * @tx_ring: Tx descriptor ring for a specific queue
2509 *
2510 * Free all transmit software resources
2511 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002512void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002513{
Emil Tantilov05d063a2014-01-17 18:29:59 -08002514 ixgbevf_clean_tx_ring(tx_ring);
Greg Rose92915f72010-01-09 02:24:10 +00002515
2516 vfree(tx_ring->tx_buffer_info);
2517 tx_ring->tx_buffer_info = NULL;
2518
Don Skidmorede02dec2014-01-16 02:30:09 -08002519 /* if not set, then don't free */
2520 if (!tx_ring->desc)
2521 return;
2522
Emil Tantilov05d063a2014-01-17 18:29:59 -08002523 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002524 tx_ring->dma);
Greg Rose92915f72010-01-09 02:24:10 +00002525
2526 tx_ring->desc = NULL;
2527}
2528
2529/**
2530 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2531 * @adapter: board private structure
2532 *
2533 * Free all transmit software resources
2534 **/
2535static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2536{
2537 int i;
2538
2539 for (i = 0; i < adapter->num_tx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08002540 if (adapter->tx_ring[i]->desc)
Emil Tantilov05d063a2014-01-17 18:29:59 -08002541 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002542}
2543
2544/**
2545 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
Greg Rose92915f72010-01-09 02:24:10 +00002546 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2547 *
2548 * Return 0 on success, negative on failure
2549 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002550int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002551{
Greg Rose92915f72010-01-09 02:24:10 +00002552 int size;
2553
2554 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
Eric Dumazet89bf67f2010-11-22 00:15:06 +00002555 tx_ring->tx_buffer_info = vzalloc(size);
Greg Rose92915f72010-01-09 02:24:10 +00002556 if (!tx_ring->tx_buffer_info)
2557 goto err;
Greg Rose92915f72010-01-09 02:24:10 +00002558
2559 /* round up to nearest 4K */
2560 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2561 tx_ring->size = ALIGN(tx_ring->size, 4096);
2562
Emil Tantilov05d063a2014-01-17 18:29:59 -08002563 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002564 &tx_ring->dma, GFP_KERNEL);
Greg Rose92915f72010-01-09 02:24:10 +00002565 if (!tx_ring->desc)
2566 goto err;
2567
Greg Rose92915f72010-01-09 02:24:10 +00002568 return 0;
2569
2570err:
2571 vfree(tx_ring->tx_buffer_info);
2572 tx_ring->tx_buffer_info = NULL;
2573 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2574 "descriptor ring\n");
2575 return -ENOMEM;
2576}
2577
2578/**
2579 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2580 * @adapter: board private structure
2581 *
2582 * If this function returns with an error, then it's possible one or
2583 * more of the rings is populated (while the rest are not). It is the
2584 * callers duty to clean those orphaned rings.
2585 *
2586 * Return 0 on success, negative on failure
2587 **/
2588static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2589{
2590 int i, err = 0;
2591
2592 for (i = 0; i < adapter->num_tx_queues; i++) {
Emil Tantilov05d063a2014-01-17 18:29:59 -08002593 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002594 if (!err)
2595 continue;
2596 hw_dbg(&adapter->hw,
2597 "Allocation for Tx Queue %u failed\n", i);
2598 break;
2599 }
2600
2601 return err;
2602}
2603
2604/**
2605 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
Greg Rose92915f72010-01-09 02:24:10 +00002606 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2607 *
2608 * Returns 0 on success, negative on failure
2609 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002610int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002611{
Greg Rose92915f72010-01-09 02:24:10 +00002612 int size;
2613
2614 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
Eric Dumazet89bf67f2010-11-22 00:15:06 +00002615 rx_ring->rx_buffer_info = vzalloc(size);
Joe Perchese404dec2012-01-29 12:56:23 +00002616 if (!rx_ring->rx_buffer_info)
Emil Tantilov05d063a2014-01-17 18:29:59 -08002617 goto err;
Greg Rose92915f72010-01-09 02:24:10 +00002618
2619 /* Round up to nearest 4K */
2620 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2621 rx_ring->size = ALIGN(rx_ring->size, 4096);
2622
Emil Tantilov05d063a2014-01-17 18:29:59 -08002623 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002624 &rx_ring->dma, GFP_KERNEL);
Greg Rose92915f72010-01-09 02:24:10 +00002625
Emil Tantilov05d063a2014-01-17 18:29:59 -08002626 if (!rx_ring->desc)
2627 goto err;
Greg Rose92915f72010-01-09 02:24:10 +00002628
Greg Rose92915f72010-01-09 02:24:10 +00002629 return 0;
Emil Tantilov05d063a2014-01-17 18:29:59 -08002630err:
2631 vfree(rx_ring->rx_buffer_info);
2632 rx_ring->rx_buffer_info = NULL;
2633 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
Greg Rose92915f72010-01-09 02:24:10 +00002634 return -ENOMEM;
2635}
2636
2637/**
2638 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2639 * @adapter: board private structure
2640 *
2641 * If this function returns with an error, then it's possible one or
2642 * more of the rings is populated (while the rest are not). It is the
2643 * callers duty to clean those orphaned rings.
2644 *
2645 * Return 0 on success, negative on failure
2646 **/
2647static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2648{
2649 int i, err = 0;
2650
2651 for (i = 0; i < adapter->num_rx_queues; i++) {
Emil Tantilov05d063a2014-01-17 18:29:59 -08002652 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002653 if (!err)
2654 continue;
2655 hw_dbg(&adapter->hw,
2656 "Allocation for Rx Queue %u failed\n", i);
2657 break;
2658 }
2659 return err;
2660}
2661
2662/**
2663 * ixgbevf_free_rx_resources - Free Rx Resources
Greg Rose92915f72010-01-09 02:24:10 +00002664 * @rx_ring: ring to clean the resources from
2665 *
2666 * Free all receive software resources
2667 **/
Emil Tantilov05d063a2014-01-17 18:29:59 -08002668void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
Greg Rose92915f72010-01-09 02:24:10 +00002669{
Emil Tantilov05d063a2014-01-17 18:29:59 -08002670 ixgbevf_clean_rx_ring(rx_ring);
Greg Rose92915f72010-01-09 02:24:10 +00002671
2672 vfree(rx_ring->rx_buffer_info);
2673 rx_ring->rx_buffer_info = NULL;
2674
Emil Tantilov05d063a2014-01-17 18:29:59 -08002675 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002676 rx_ring->dma);
Greg Rose92915f72010-01-09 02:24:10 +00002677
2678 rx_ring->desc = NULL;
2679}
2680
2681/**
2682 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2683 * @adapter: board private structure
2684 *
2685 * Free all receive software resources
2686 **/
2687static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2688{
2689 int i;
2690
2691 for (i = 0; i < adapter->num_rx_queues; i++)
Don Skidmore87e70ab2014-01-16 02:30:08 -08002692 if (adapter->rx_ring[i]->desc)
Emil Tantilov05d063a2014-01-17 18:29:59 -08002693 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00002694}
2695
2696/**
2697 * ixgbevf_open - Called when a network interface is made active
2698 * @netdev: network interface device structure
2699 *
2700 * Returns 0 on success, negative value on failure
2701 *
2702 * The open entry point is called when a network interface is made
2703 * active by the system (IFF_UP). At this point all resources needed
2704 * for transmit and receive operations are allocated, the interrupt
2705 * handler is registered with the OS, the watchdog timer is started,
2706 * and the stack is notified that the interface is ready.
2707 **/
2708static int ixgbevf_open(struct net_device *netdev)
2709{
2710 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2711 struct ixgbe_hw *hw = &adapter->hw;
2712 int err;
2713
xunleera1f6c6b2013-03-05 07:44:20 +00002714 /* A previous failure to open the device because of a lack of
2715 * available MSIX vector resources may have reset the number
2716 * of msix vectors variable to zero. The only way to recover
2717 * is to unload/reload the driver and hope that the system has
2718 * been able to recover some MSIX vector resources.
2719 */
2720 if (!adapter->num_msix_vectors)
2721 return -ENOMEM;
2722
Greg Rose92915f72010-01-09 02:24:10 +00002723 /* disallow open during test */
2724 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2725 return -EBUSY;
2726
2727 if (hw->adapter_stopped) {
2728 ixgbevf_reset(adapter);
2729 /* if adapter is still stopped then PF isn't up and
2730 * the vf can't start. */
2731 if (hw->adapter_stopped) {
2732 err = IXGBE_ERR_MBX;
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002733 pr_err("Unable to start - perhaps the PF Driver isn't "
2734 "up yet\n");
Greg Rose92915f72010-01-09 02:24:10 +00002735 goto err_setup_reset;
2736 }
2737 }
2738
2739 /* allocate transmit descriptors */
2740 err = ixgbevf_setup_all_tx_resources(adapter);
2741 if (err)
2742 goto err_setup_tx;
2743
2744 /* allocate receive descriptors */
2745 err = ixgbevf_setup_all_rx_resources(adapter);
2746 if (err)
2747 goto err_setup_rx;
2748
2749 ixgbevf_configure(adapter);
2750
2751 /*
2752 * Map the Tx/Rx rings to the vectors we were allotted.
2753 * if request_irq will be called in this function map_rings
2754 * must be called *before* up_complete
2755 */
2756 ixgbevf_map_rings_to_vectors(adapter);
2757
Greg Rose795180d2012-04-17 04:29:34 +00002758 ixgbevf_up_complete(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002759
2760 /* clear any pending interrupts, may auto mask */
2761 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2762 err = ixgbevf_request_irq(adapter);
2763 if (err)
2764 goto err_req_irq;
2765
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002766 ixgbevf_irq_enable(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002767
2768 return 0;
2769
2770err_req_irq:
2771 ixgbevf_down(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002772err_setup_rx:
2773 ixgbevf_free_all_rx_resources(adapter);
2774err_setup_tx:
2775 ixgbevf_free_all_tx_resources(adapter);
2776 ixgbevf_reset(adapter);
2777
2778err_setup_reset:
2779
2780 return err;
2781}
2782
2783/**
2784 * ixgbevf_close - Disables a network interface
2785 * @netdev: network interface device structure
2786 *
2787 * Returns 0, this is not allowed to fail
2788 *
2789 * The close entry point is called when an interface is de-activated
2790 * by the OS. The hardware is still under the drivers control, but
2791 * needs to be disabled. A global MAC reset is issued to stop the
2792 * hardware, and all transmit and receive resources are freed.
2793 **/
2794static int ixgbevf_close(struct net_device *netdev)
2795{
2796 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2797
2798 ixgbevf_down(adapter);
2799 ixgbevf_free_irq(adapter);
2800
2801 ixgbevf_free_all_tx_resources(adapter);
2802 ixgbevf_free_all_rx_resources(adapter);
2803
2804 return 0;
2805}
2806
Don Skidmore220fe052013-09-21 01:40:49 +00002807static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
2808{
2809 struct net_device *dev = adapter->netdev;
2810
2811 if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
2812 return;
2813
2814 adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
2815
2816 /* if interface is down do nothing */
2817 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2818 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2819 return;
2820
2821 /* Hardware has to reinitialize queues and interrupts to
2822 * match packet buffer alignment. Unfortunately, the
2823 * hardware is not flexible enough to do this dynamically.
2824 */
2825 if (netif_running(dev))
2826 ixgbevf_close(dev);
2827
2828 ixgbevf_clear_interrupt_scheme(adapter);
2829 ixgbevf_init_interrupt_scheme(adapter);
2830
2831 if (netif_running(dev))
2832 ixgbevf_open(dev);
2833}
2834
Alexander Duyck70a10e22012-05-11 08:33:21 +00002835static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
2836 u32 vlan_macip_lens, u32 type_tucmd,
2837 u32 mss_l4len_idx)
2838{
2839 struct ixgbe_adv_tx_context_desc *context_desc;
2840 u16 i = tx_ring->next_to_use;
2841
2842 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
2843
2844 i++;
2845 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2846
2847 /* set bits to identify this as an advanced context descriptor */
2848 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
2849
2850 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2851 context_desc->seqnum_seed = 0;
2852 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
2853 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2854}
2855
2856static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002857 struct ixgbevf_tx_buffer *first,
2858 u8 *hdr_len)
Greg Rose92915f72010-01-09 02:24:10 +00002859{
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002860 struct sk_buff *skb = first->skb;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002861 u32 vlan_macip_lens, type_tucmd;
Greg Rose92915f72010-01-09 02:24:10 +00002862 u32 mss_l4len_idx, l4len;
Francois Romieu8f12c032014-03-30 03:14:32 +00002863 int err;
Greg Rose92915f72010-01-09 02:24:10 +00002864
Emil Tantilov01a545c2014-02-27 20:32:45 -08002865 if (skb->ip_summed != CHECKSUM_PARTIAL)
2866 return 0;
2867
Alexander Duyck70a10e22012-05-11 08:33:21 +00002868 if (!skb_is_gso(skb))
2869 return 0;
Greg Rose92915f72010-01-09 02:24:10 +00002870
Francois Romieu8f12c032014-03-30 03:14:32 +00002871 err = skb_cow_head(skb, 0);
2872 if (err < 0)
2873 return err;
Greg Rose92915f72010-01-09 02:24:10 +00002874
Alexander Duyck70a10e22012-05-11 08:33:21 +00002875 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2876 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
2877
2878 if (skb->protocol == htons(ETH_P_IP)) {
2879 struct iphdr *iph = ip_hdr(skb);
2880 iph->tot_len = 0;
2881 iph->check = 0;
2882 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2883 iph->daddr, 0,
2884 IPPROTO_TCP,
2885 0);
2886 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002887 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
2888 IXGBE_TX_FLAGS_CSUM |
2889 IXGBE_TX_FLAGS_IPV4;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002890 } else if (skb_is_gso_v6(skb)) {
2891 ipv6_hdr(skb)->payload_len = 0;
2892 tcp_hdr(skb)->check =
2893 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2894 &ipv6_hdr(skb)->daddr,
2895 0, IPPROTO_TCP, 0);
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002896 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
2897 IXGBE_TX_FLAGS_CSUM;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002898 }
2899
2900 /* compute header lengths */
2901 l4len = tcp_hdrlen(skb);
2902 *hdr_len += l4len;
2903 *hdr_len = skb_transport_offset(skb) + l4len;
2904
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002905 /* update gso size and bytecount with header size */
2906 first->gso_segs = skb_shinfo(skb)->gso_segs;
2907 first->bytecount += (first->gso_segs - 1) * *hdr_len;
2908
Alexander Duyck70a10e22012-05-11 08:33:21 +00002909 /* mss_l4len_id: use 1 as index for TSO */
2910 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
2911 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
2912 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
2913
2914 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
2915 vlan_macip_lens = skb_network_header_len(skb);
2916 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002917 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002918
2919 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2920 type_tucmd, mss_l4len_idx);
2921
2922 return 1;
Greg Rose92915f72010-01-09 02:24:10 +00002923}
2924
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002925static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
2926 struct ixgbevf_tx_buffer *first)
Greg Rose92915f72010-01-09 02:24:10 +00002927{
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002928 struct sk_buff *skb = first->skb;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002929 u32 vlan_macip_lens = 0;
2930 u32 mss_l4len_idx = 0;
2931 u32 type_tucmd = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002932
Alexander Duyck70a10e22012-05-11 08:33:21 +00002933 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2934 u8 l4_hdr = 0;
2935 switch (skb->protocol) {
Joe Perches0933ce42014-03-13 05:19:30 +00002936 case htons(ETH_P_IP):
Alexander Duyck70a10e22012-05-11 08:33:21 +00002937 vlan_macip_lens |= skb_network_header_len(skb);
2938 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2939 l4_hdr = ip_hdr(skb)->protocol;
2940 break;
Joe Perches0933ce42014-03-13 05:19:30 +00002941 case htons(ETH_P_IPV6):
Alexander Duyck70a10e22012-05-11 08:33:21 +00002942 vlan_macip_lens |= skb_network_header_len(skb);
2943 l4_hdr = ipv6_hdr(skb)->nexthdr;
2944 break;
2945 default:
2946 if (unlikely(net_ratelimit())) {
2947 dev_warn(tx_ring->dev,
2948 "partial checksum but proto=%x!\n",
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002949 first->protocol);
Greg Rose92915f72010-01-09 02:24:10 +00002950 }
Alexander Duyck70a10e22012-05-11 08:33:21 +00002951 break;
Greg Rose92915f72010-01-09 02:24:10 +00002952 }
2953
Alexander Duyck70a10e22012-05-11 08:33:21 +00002954 switch (l4_hdr) {
2955 case IPPROTO_TCP:
2956 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2957 mss_l4len_idx = tcp_hdrlen(skb) <<
2958 IXGBE_ADVTXD_L4LEN_SHIFT;
2959 break;
2960 case IPPROTO_SCTP:
2961 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
2962 mss_l4len_idx = sizeof(struct sctphdr) <<
2963 IXGBE_ADVTXD_L4LEN_SHIFT;
2964 break;
2965 case IPPROTO_UDP:
2966 mss_l4len_idx = sizeof(struct udphdr) <<
2967 IXGBE_ADVTXD_L4LEN_SHIFT;
2968 break;
2969 default:
2970 if (unlikely(net_ratelimit())) {
2971 dev_warn(tx_ring->dev,
2972 "partial checksum but l4 proto=%x!\n",
2973 l4_hdr);
2974 }
2975 break;
2976 }
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002977
2978 /* update TX checksum flag */
2979 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
Greg Rose92915f72010-01-09 02:24:10 +00002980 }
2981
Alexander Duyck70a10e22012-05-11 08:33:21 +00002982 /* vlan_macip_lens: MACLEN, VLAN tag */
2983 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08002984 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002985
2986 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2987 type_tucmd, mss_l4len_idx);
Greg Rose92915f72010-01-09 02:24:10 +00002988}
2989
Emil Tantilov29d37fa2014-01-17 18:30:05 -08002990static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
2991{
2992 /* set type for advanced descriptor with frame checksum insertion */
2993 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
2994 IXGBE_ADVTXD_DCMD_IFCS |
2995 IXGBE_ADVTXD_DCMD_DEXT);
2996
2997 /* set HW vlan bit if vlan is present */
2998 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2999 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
3000
3001 /* set segmentation enable bits for TSO/FSO */
3002 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3003 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
3004
3005 return cmd_type;
3006}
3007
3008static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3009 u32 tx_flags, unsigned int paylen)
3010{
3011 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
3012
3013 /* enable L4 checksum for TSO and TX checksum offload */
3014 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3015 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
3016
3017 /* enble IPv4 checksum for TSO */
3018 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3019 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
3020
3021 /* use index 1 context for TSO/FSO/FCOE */
3022 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3023 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
3024
3025 /* Check Context must be set if Tx switch is enabled, which it
3026 * always is for case where virtual functions are running
3027 */
3028 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
3029
3030 tx_desc->read.olinfo_status = olinfo_status;
3031}
3032
3033static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3034 struct ixgbevf_tx_buffer *first,
3035 const u8 hdr_len)
Greg Rose92915f72010-01-09 02:24:10 +00003036{
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08003037 dma_addr_t dma;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003038 struct sk_buff *skb = first->skb;
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003039 struct ixgbevf_tx_buffer *tx_buffer;
3040 union ixgbe_adv_tx_desc *tx_desc;
3041 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3042 unsigned int data_len = skb->data_len;
3043 unsigned int size = skb_headlen(skb);
3044 unsigned int paylen = skb->len - hdr_len;
3045 u32 tx_flags = first->tx_flags;
3046 __le32 cmd_type;
3047 u16 i = tx_ring->next_to_use;
Greg Rose92915f72010-01-09 02:24:10 +00003048
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003049 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +00003050
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003051 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3052 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
Greg Rose92915f72010-01-09 02:24:10 +00003053
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003054 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3055 if (dma_mapping_error(tx_ring->dev, dma))
3056 goto dma_error;
3057
3058 /* record length, and DMA address */
3059 dma_unmap_len_set(first, len, size);
3060 dma_unmap_addr_set(first, dma, dma);
3061
3062 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3063
3064 for (;;) {
3065 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3066 tx_desc->read.cmd_type_len =
3067 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
3068
3069 i++;
3070 tx_desc++;
3071 if (i == tx_ring->count) {
3072 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3073 i = 0;
3074 }
3075
3076 dma += IXGBE_MAX_DATA_PER_TXD;
3077 size -= IXGBE_MAX_DATA_PER_TXD;
3078
3079 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3080 tx_desc->read.olinfo_status = 0;
3081 }
3082
3083 if (likely(!data_len))
3084 break;
3085
3086 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
3087
3088 i++;
3089 tx_desc++;
3090 if (i == tx_ring->count) {
3091 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3092 i = 0;
3093 }
3094
3095 size = skb_frag_size(frag);
3096 data_len -= size;
3097
3098 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3099 DMA_TO_DEVICE);
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08003100 if (dma_mapping_error(tx_ring->dev, dma))
Greg Rose92915f72010-01-09 02:24:10 +00003101 goto dma_error;
Greg Rose92915f72010-01-09 02:24:10 +00003102
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003103 tx_buffer = &tx_ring->tx_buffer_info[i];
3104 dma_unmap_len_set(tx_buffer, len, size);
3105 dma_unmap_addr_set(tx_buffer, dma, dma);
Emil Tantilov9bdfefd2014-01-17 18:30:04 -08003106
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003107 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3108 tx_desc->read.olinfo_status = 0;
3109
3110 frag++;
Greg Rose92915f72010-01-09 02:24:10 +00003111 }
3112
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003113 /* write last descriptor with RS and EOP bits */
3114 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3115 tx_desc->read.cmd_type_len = cmd_type;
Greg Rose92915f72010-01-09 02:24:10 +00003116
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003117 /* set the timestamp */
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003118 first->time_stamp = jiffies;
Greg Rose92915f72010-01-09 02:24:10 +00003119
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003120 /* Force memory writes to complete before letting h/w know there
3121 * are new descriptors to fetch. (Only applicable for weak-ordered
3122 * memory model archs, such as IA-64).
3123 *
3124 * We also need this memory barrier (wmb) to make certain all of the
3125 * status bits have been updated before next_to_watch is written.
3126 */
3127 wmb();
Greg Rose92915f72010-01-09 02:24:10 +00003128
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003129 /* set next_to_watch value indicating a packet is present */
3130 first->next_to_watch = tx_desc;
3131
3132 i++;
3133 if (i == tx_ring->count)
3134 i = 0;
3135
3136 tx_ring->next_to_use = i;
3137
3138 /* notify HW of packet */
Mark Rustad06380db2014-03-04 03:02:23 +00003139 ixgbevf_write_tail(tx_ring, i);
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003140
3141 return;
Greg Rose92915f72010-01-09 02:24:10 +00003142dma_error:
Alexander Duyck70a10e22012-05-11 08:33:21 +00003143 dev_err(tx_ring->dev, "TX DMA map failed\n");
Greg Rose92915f72010-01-09 02:24:10 +00003144
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003145 /* clear dma mappings for failed tx_buffer_info map */
3146 for (;;) {
3147 tx_buffer = &tx_ring->tx_buffer_info[i];
3148 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3149 if (tx_buffer == first)
3150 break;
3151 if (i == 0)
3152 i = tx_ring->count;
Greg Rose92915f72010-01-09 02:24:10 +00003153 i--;
Greg Rose92915f72010-01-09 02:24:10 +00003154 }
3155
Greg Rose92915f72010-01-09 02:24:10 +00003156 tx_ring->next_to_use = i;
Greg Rose92915f72010-01-09 02:24:10 +00003157}
3158
Alexander Duyckfb401952012-05-11 08:33:16 +00003159static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
Greg Rose92915f72010-01-09 02:24:10 +00003160{
Alexander Duyckfb401952012-05-11 08:33:16 +00003161 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
Greg Rose92915f72010-01-09 02:24:10 +00003162 /* Herbert's original patch had:
3163 * smp_mb__after_netif_stop_queue();
3164 * but since that doesn't exist yet, just open code it. */
3165 smp_mb();
3166
3167 /* We need to check again in a case another CPU has just
3168 * made room available. */
Don Skidmoref880d072013-10-23 02:17:52 +00003169 if (likely(ixgbevf_desc_unused(tx_ring) < size))
Greg Rose92915f72010-01-09 02:24:10 +00003170 return -EBUSY;
3171
3172 /* A reprieve! - use start_queue because it doesn't call schedule */
Alexander Duyckfb401952012-05-11 08:33:16 +00003173 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
Emil Tantilov095e2612014-01-17 18:30:00 -08003174 ++tx_ring->tx_stats.restart_queue;
3175
Greg Rose92915f72010-01-09 02:24:10 +00003176 return 0;
3177}
3178
Alexander Duyckfb401952012-05-11 08:33:16 +00003179static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
Greg Rose92915f72010-01-09 02:24:10 +00003180{
Don Skidmoref880d072013-10-23 02:17:52 +00003181 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
Greg Rose92915f72010-01-09 02:24:10 +00003182 return 0;
Alexander Duyckfb401952012-05-11 08:33:16 +00003183 return __ixgbevf_maybe_stop_tx(tx_ring, size);
Greg Rose92915f72010-01-09 02:24:10 +00003184}
3185
3186static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3187{
3188 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003189 struct ixgbevf_tx_buffer *first;
Greg Rose92915f72010-01-09 02:24:10 +00003190 struct ixgbevf_ring *tx_ring;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003191 int tso;
3192 u32 tx_flags = 0;
Alexander Duyck35959902012-05-11 08:32:40 +00003193 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3194#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3195 unsigned short f;
3196#endif
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003197 u8 hdr_len = 0;
Greg Rosef9d08f162012-10-02 00:50:52 +00003198 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003199
Ben Hutchings46acc462012-11-01 09:11:11 +00003200 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
Greg Rosef9d08f162012-10-02 00:50:52 +00003201 dev_kfree_skb(skb);
3202 return NETDEV_TX_OK;
3203 }
Greg Rose92915f72010-01-09 02:24:10 +00003204
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003205 tx_ring = adapter->tx_ring[skb->queue_mapping];
Greg Rose92915f72010-01-09 02:24:10 +00003206
Alexander Duyck35959902012-05-11 08:32:40 +00003207 /*
3208 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3209 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3210 * + 2 desc gap to keep tail from touching head,
3211 * + 1 desc for context descriptor,
3212 * otherwise try next time
3213 */
3214#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3215 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3216 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3217#else
3218 count += skb_shinfo(skb)->nr_frags;
3219#endif
Alexander Duyckfb401952012-05-11 08:33:16 +00003220 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
Emil Tantilov095e2612014-01-17 18:30:00 -08003221 tx_ring->tx_stats.tx_busy++;
Alexander Duyck35959902012-05-11 08:32:40 +00003222 return NETDEV_TX_BUSY;
3223 }
3224
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003225 /* record the location of the first descriptor for this packet */
3226 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3227 first->skb = skb;
3228 first->bytecount = skb->len;
3229 first->gso_segs = 1;
3230
Jesse Grosseab6d182010-10-20 13:56:03 +00003231 if (vlan_tx_tag_present(skb)) {
Greg Rose92915f72010-01-09 02:24:10 +00003232 tx_flags |= vlan_tx_tag_get(skb);
3233 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3234 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3235 }
3236
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003237 /* record initial flags and protocol */
3238 first->tx_flags = tx_flags;
3239 first->protocol = vlan_get_protocol(skb);
Greg Rose92915f72010-01-09 02:24:10 +00003240
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003241 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3242 if (tso < 0)
3243 goto out_drop;
Emil Tantilovb5d217f2014-02-27 20:32:44 -08003244 else if (!tso)
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003245 ixgbevf_tx_csum(tx_ring, first);
Greg Rose92915f72010-01-09 02:24:10 +00003246
Emil Tantilov29d37fa2014-01-17 18:30:05 -08003247 ixgbevf_tx_map(tx_ring, first, hdr_len);
Greg Rose92915f72010-01-09 02:24:10 +00003248
Alexander Duyckfb401952012-05-11 08:33:16 +00003249 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
Greg Rose92915f72010-01-09 02:24:10 +00003250
3251 return NETDEV_TX_OK;
Emil Tantilov7ad1a092014-01-17 18:30:03 -08003252
3253out_drop:
3254 dev_kfree_skb_any(first->skb);
3255 first->skb = NULL;
3256
3257 return NETDEV_TX_OK;
Greg Rose92915f72010-01-09 02:24:10 +00003258}
3259
3260/**
Greg Rose92915f72010-01-09 02:24:10 +00003261 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3262 * @netdev: network interface device structure
3263 * @p: pointer to an address structure
3264 *
3265 * Returns 0 on success, negative on failure
3266 **/
3267static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3268{
3269 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3270 struct ixgbe_hw *hw = &adapter->hw;
3271 struct sockaddr *addr = p;
3272
3273 if (!is_valid_ether_addr(addr->sa_data))
3274 return -EADDRNOTAVAIL;
3275
3276 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3277 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3278
John Fastabend55fdd45b2012-10-01 14:52:20 +00003279 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00003280
Greg Rose92fe0bf2012-11-02 05:50:47 +00003281 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
Greg Rose92915f72010-01-09 02:24:10 +00003282
John Fastabend55fdd45b2012-10-01 14:52:20 +00003283 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00003284
Greg Rose92915f72010-01-09 02:24:10 +00003285 return 0;
3286}
3287
3288/**
3289 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3290 * @netdev: network interface device structure
3291 * @new_mtu: new value for maximum frame size
3292 *
3293 * Returns 0 on success, negative on failure
3294 **/
3295static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3296{
3297 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3298 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
Greg Rose69bfbec2011-01-26 01:06:12 +00003299 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
Greg Rose69bfbec2011-01-26 01:06:12 +00003300
Alexander Duyck56e94092012-07-20 08:10:03 +00003301 switch (adapter->hw.api_version) {
3302 case ixgbe_mbox_api_11:
Greg Rose69bfbec2011-01-26 01:06:12 +00003303 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
Alexander Duyck56e94092012-07-20 08:10:03 +00003304 break;
3305 default:
3306 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3307 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3308 break;
3309 }
Greg Rose92915f72010-01-09 02:24:10 +00003310
3311 /* MTU < 68 is an error and causes problems on some kernels */
Greg Rose69bfbec2011-01-26 01:06:12 +00003312 if ((new_mtu < 68) || (max_frame > max_possible_frame))
Greg Rose92915f72010-01-09 02:24:10 +00003313 return -EINVAL;
3314
3315 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3316 netdev->mtu, new_mtu);
3317 /* must set new MTU before calling down or up */
3318 netdev->mtu = new_mtu;
3319
3320 if (netif_running(netdev))
3321 ixgbevf_reinit_locked(adapter);
3322
3323 return 0;
3324}
3325
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003326static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
Greg Rose92915f72010-01-09 02:24:10 +00003327{
3328 struct net_device *netdev = pci_get_drvdata(pdev);
3329 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003330#ifdef CONFIG_PM
3331 int retval = 0;
3332#endif
Greg Rose92915f72010-01-09 02:24:10 +00003333
3334 netif_device_detach(netdev);
3335
3336 if (netif_running(netdev)) {
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003337 rtnl_lock();
Greg Rose92915f72010-01-09 02:24:10 +00003338 ixgbevf_down(adapter);
3339 ixgbevf_free_irq(adapter);
3340 ixgbevf_free_all_tx_resources(adapter);
3341 ixgbevf_free_all_rx_resources(adapter);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003342 rtnl_unlock();
Greg Rose92915f72010-01-09 02:24:10 +00003343 }
3344
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003345 ixgbevf_clear_interrupt_scheme(adapter);
3346
3347#ifdef CONFIG_PM
3348 retval = pci_save_state(pdev);
3349 if (retval)
3350 return retval;
3351
3352#endif
Mark Rustadbc0c7152014-03-12 00:38:45 +00003353 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3354 pci_disable_device(pdev);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003355
3356 return 0;
3357}
3358
3359#ifdef CONFIG_PM
3360static int ixgbevf_resume(struct pci_dev *pdev)
3361{
Wei Yongjun27ae2962014-01-16 02:30:07 -08003362 struct net_device *netdev = pci_get_drvdata(pdev);
3363 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003364 u32 err;
3365
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003366 pci_restore_state(pdev);
3367 /*
3368 * pci_restore_state clears dev->state_saved so call
3369 * pci_save_state to restore it.
3370 */
Greg Rose92915f72010-01-09 02:24:10 +00003371 pci_save_state(pdev);
Greg Rose92915f72010-01-09 02:24:10 +00003372
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003373 err = pci_enable_device_mem(pdev);
3374 if (err) {
3375 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3376 return err;
3377 }
Peter Zijlstra4e857c52014-03-17 18:06:10 +01003378 smp_mb__before_atomic();
Mark Rustadbc0c7152014-03-12 00:38:45 +00003379 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003380 pci_set_master(pdev);
3381
Don Skidmore798e3812013-10-01 04:33:51 -07003382 ixgbevf_reset(adapter);
3383
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003384 rtnl_lock();
3385 err = ixgbevf_init_interrupt_scheme(adapter);
3386 rtnl_unlock();
3387 if (err) {
3388 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3389 return err;
3390 }
3391
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003392 if (netif_running(netdev)) {
3393 err = ixgbevf_open(netdev);
3394 if (err)
3395 return err;
3396 }
3397
3398 netif_device_attach(netdev);
3399
3400 return err;
3401}
3402
3403#endif /* CONFIG_PM */
3404static void ixgbevf_shutdown(struct pci_dev *pdev)
3405{
3406 ixgbevf_suspend(pdev, PMSG_SUSPEND);
Greg Rose92915f72010-01-09 02:24:10 +00003407}
3408
Eric Dumazet4197aa72011-06-22 05:01:35 +00003409static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3410 struct rtnl_link_stats64 *stats)
3411{
3412 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3413 unsigned int start;
3414 u64 bytes, packets;
3415 const struct ixgbevf_ring *ring;
3416 int i;
3417
3418 ixgbevf_update_stats(adapter);
3419
3420 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3421
3422 for (i = 0; i < adapter->num_rx_queues; i++) {
Don Skidmore87e70ab2014-01-16 02:30:08 -08003423 ring = adapter->rx_ring[i];
Eric Dumazet4197aa72011-06-22 05:01:35 +00003424 do {
Eric W. Biederman57a77442014-03-13 21:26:42 -07003425 start = u64_stats_fetch_begin_irq(&ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -08003426 bytes = ring->stats.bytes;
3427 packets = ring->stats.packets;
Eric W. Biederman57a77442014-03-13 21:26:42 -07003428 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
Eric Dumazet4197aa72011-06-22 05:01:35 +00003429 stats->rx_bytes += bytes;
3430 stats->rx_packets += packets;
3431 }
3432
3433 for (i = 0; i < adapter->num_tx_queues; i++) {
Don Skidmore87e70ab2014-01-16 02:30:08 -08003434 ring = adapter->tx_ring[i];
Eric Dumazet4197aa72011-06-22 05:01:35 +00003435 do {
Eric W. Biederman57a77442014-03-13 21:26:42 -07003436 start = u64_stats_fetch_begin_irq(&ring->syncp);
Emil Tantilov095e2612014-01-17 18:30:00 -08003437 bytes = ring->stats.bytes;
3438 packets = ring->stats.packets;
Eric W. Biederman57a77442014-03-13 21:26:42 -07003439 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
Eric Dumazet4197aa72011-06-22 05:01:35 +00003440 stats->tx_bytes += bytes;
3441 stats->tx_packets += packets;
3442 }
3443
3444 return stats;
3445}
3446
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003447static const struct net_device_ops ixgbevf_netdev_ops = {
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003448 .ndo_open = ixgbevf_open,
3449 .ndo_stop = ixgbevf_close,
3450 .ndo_start_xmit = ixgbevf_xmit_frame,
3451 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
Eric Dumazet4197aa72011-06-22 05:01:35 +00003452 .ndo_get_stats64 = ixgbevf_get_stats,
Greg Rose92915f72010-01-09 02:24:10 +00003453 .ndo_validate_addr = eth_validate_addr,
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003454 .ndo_set_mac_address = ixgbevf_set_mac,
3455 .ndo_change_mtu = ixgbevf_change_mtu,
3456 .ndo_tx_timeout = ixgbevf_tx_timeout,
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003457 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3458 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
Jacob Kellerc777cdf2013-09-21 06:24:20 +00003459#ifdef CONFIG_NET_RX_BUSY_POLL
3460 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3461#endif
Greg Rose92915f72010-01-09 02:24:10 +00003462};
Greg Rose92915f72010-01-09 02:24:10 +00003463
3464static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3465{
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003466 dev->netdev_ops = &ixgbevf_netdev_ops;
Greg Rose92915f72010-01-09 02:24:10 +00003467 ixgbevf_set_ethtool_ops(dev);
3468 dev->watchdog_timeo = 5 * HZ;
3469}
3470
3471/**
3472 * ixgbevf_probe - Device Initialization Routine
3473 * @pdev: PCI device information struct
3474 * @ent: entry in ixgbevf_pci_tbl
3475 *
3476 * Returns 0 on success, negative on failure
3477 *
3478 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3479 * The OS initialization, configuring of the adapter private structure,
3480 * and a hardware reset occur.
3481 **/
Greg Kroah-Hartman1dd06ae2012-12-06 14:30:56 +00003482static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Greg Rose92915f72010-01-09 02:24:10 +00003483{
3484 struct net_device *netdev;
3485 struct ixgbevf_adapter *adapter = NULL;
3486 struct ixgbe_hw *hw = NULL;
3487 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
Greg Rose92915f72010-01-09 02:24:10 +00003488 int err, pci_using_dac;
3489
3490 err = pci_enable_device(pdev);
3491 if (err)
3492 return err;
3493
Russell King53567aa2013-06-10 12:49:38 +01003494 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
Greg Rose92915f72010-01-09 02:24:10 +00003495 pci_using_dac = 1;
3496 } else {
Russell King53567aa2013-06-10 12:49:38 +01003497 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
Greg Rose92915f72010-01-09 02:24:10 +00003498 if (err) {
Russell King53567aa2013-06-10 12:49:38 +01003499 dev_err(&pdev->dev, "No usable DMA "
3500 "configuration, aborting\n");
3501 goto err_dma;
Greg Rose92915f72010-01-09 02:24:10 +00003502 }
3503 pci_using_dac = 0;
3504 }
3505
3506 err = pci_request_regions(pdev, ixgbevf_driver_name);
3507 if (err) {
3508 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3509 goto err_pci_reg;
3510 }
3511
3512 pci_set_master(pdev);
3513
Greg Rose92915f72010-01-09 02:24:10 +00003514 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3515 MAX_TX_QUEUES);
Greg Rose92915f72010-01-09 02:24:10 +00003516 if (!netdev) {
3517 err = -ENOMEM;
3518 goto err_alloc_etherdev;
3519 }
3520
3521 SET_NETDEV_DEV(netdev, &pdev->dev);
3522
3523 pci_set_drvdata(pdev, netdev);
3524 adapter = netdev_priv(netdev);
3525
3526 adapter->netdev = netdev;
3527 adapter->pdev = pdev;
3528 hw = &adapter->hw;
3529 hw->back = adapter;
stephen hemmingerb3f4d592012-03-13 06:04:20 +00003530 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
Greg Rose92915f72010-01-09 02:24:10 +00003531
3532 /*
3533 * call save state here in standalone driver because it relies on
3534 * adapter struct to exist, and needs to call netdev_priv
3535 */
3536 pci_save_state(pdev);
3537
3538 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3539 pci_resource_len(pdev, 0));
Mark Rustaddbf8b0d2014-03-04 03:02:34 +00003540 adapter->io_addr = hw->hw_addr;
Greg Rose92915f72010-01-09 02:24:10 +00003541 if (!hw->hw_addr) {
3542 err = -EIO;
3543 goto err_ioremap;
3544 }
3545
3546 ixgbevf_assign_netdev_ops(netdev);
3547
Greg Rose92915f72010-01-09 02:24:10 +00003548 /* Setup hw api */
3549 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3550 hw->mac.type = ii->mac;
3551
3552 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
Greg Rosef416dfc2011-06-08 07:32:38 +00003553 sizeof(struct ixgbe_mbx_operations));
Greg Rose92915f72010-01-09 02:24:10 +00003554
Greg Rose92915f72010-01-09 02:24:10 +00003555 /* setup the private structure */
3556 err = ixgbevf_sw_init(adapter);
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00003557 if (err)
3558 goto err_sw_init;
3559
3560 /* The HW MAC address was set and/or determined in sw_init */
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00003561 if (!is_valid_ether_addr(netdev->dev_addr)) {
3562 pr_err("invalid MAC address\n");
3563 err = -EIO;
3564 goto err_sw_init;
3565 }
Greg Rose92915f72010-01-09 02:24:10 +00003566
Michał Mirosław471a76d2011-06-08 08:53:03 +00003567 netdev->hw_features = NETIF_F_SG |
Greg Rose92915f72010-01-09 02:24:10 +00003568 NETIF_F_IP_CSUM |
Michał Mirosław471a76d2011-06-08 08:53:03 +00003569 NETIF_F_IPV6_CSUM |
3570 NETIF_F_TSO |
3571 NETIF_F_TSO6 |
3572 NETIF_F_RXCSUM;
3573
3574 netdev->features = netdev->hw_features |
Patrick McHardyf6469682013-04-19 02:04:27 +00003575 NETIF_F_HW_VLAN_CTAG_TX |
3576 NETIF_F_HW_VLAN_CTAG_RX |
3577 NETIF_F_HW_VLAN_CTAG_FILTER;
Greg Rose92915f72010-01-09 02:24:10 +00003578
Greg Rose92915f72010-01-09 02:24:10 +00003579 netdev->vlan_features |= NETIF_F_TSO;
3580 netdev->vlan_features |= NETIF_F_TSO6;
3581 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyck3bfacf92010-08-02 14:59:04 +00003582 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Greg Rose92915f72010-01-09 02:24:10 +00003583 netdev->vlan_features |= NETIF_F_SG;
3584
3585 if (pci_using_dac)
3586 netdev->features |= NETIF_F_HIGHDMA;
3587
Jiri Pirko01789342011-08-16 06:29:00 +00003588 netdev->priv_flags |= IFF_UNICAST_FLT;
3589
Greg Rose92915f72010-01-09 02:24:10 +00003590 init_timer(&adapter->watchdog_timer);
Joe Perchesc061b182010-08-23 18:20:03 +00003591 adapter->watchdog_timer.function = ixgbevf_watchdog;
Greg Rose92915f72010-01-09 02:24:10 +00003592 adapter->watchdog_timer.data = (unsigned long)adapter;
3593
Mark Rustadea699562014-03-12 00:38:51 +00003594 if (IXGBE_REMOVED(hw->hw_addr)) {
3595 err = -EIO;
3596 goto err_sw_init;
3597 }
Greg Rose92915f72010-01-09 02:24:10 +00003598 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3599 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
Mark Rustadea699562014-03-12 00:38:51 +00003600 set_bit(__IXGBEVF_WORK_INIT, &adapter->state);
Greg Rose92915f72010-01-09 02:24:10 +00003601
3602 err = ixgbevf_init_interrupt_scheme(adapter);
3603 if (err)
3604 goto err_sw_init;
3605
Greg Rose92915f72010-01-09 02:24:10 +00003606 strcpy(netdev->name, "eth%d");
3607
3608 err = register_netdev(netdev);
3609 if (err)
3610 goto err_register;
3611
Greg Rose5d426ad2010-11-16 19:27:19 -08003612 netif_carrier_off(netdev);
3613
Greg Rose33bd9f62010-03-19 02:59:52 +00003614 ixgbevf_init_last_counter_stats(adapter);
3615
Greg Rose92915f72010-01-09 02:24:10 +00003616 /* print the MAC address */
Danny Kukawkaf794e7e2012-02-24 03:45:56 +00003617 hw_dbg(hw, "%pM\n", netdev->dev_addr);
Greg Rose92915f72010-01-09 02:24:10 +00003618
3619 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3620
Greg Rose92915f72010-01-09 02:24:10 +00003621 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
Greg Rose92915f72010-01-09 02:24:10 +00003622 return 0;
3623
3624err_register:
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003625 ixgbevf_clear_interrupt_scheme(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00003626err_sw_init:
3627 ixgbevf_reset_interrupt_capability(adapter);
Mark Rustaddbf8b0d2014-03-04 03:02:34 +00003628 iounmap(adapter->io_addr);
Greg Rose92915f72010-01-09 02:24:10 +00003629err_ioremap:
3630 free_netdev(netdev);
3631err_alloc_etherdev:
3632 pci_release_regions(pdev);
3633err_pci_reg:
3634err_dma:
Mark Rustadbc0c7152014-03-12 00:38:45 +00003635 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3636 pci_disable_device(pdev);
Greg Rose92915f72010-01-09 02:24:10 +00003637 return err;
3638}
3639
3640/**
3641 * ixgbevf_remove - Device Removal Routine
3642 * @pdev: PCI device information struct
3643 *
3644 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3645 * that it should release a PCI device. The could be caused by a
3646 * Hot-Plug event, or because the driver is going to be removed from
3647 * memory.
3648 **/
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05003649static void ixgbevf_remove(struct pci_dev *pdev)
Greg Rose92915f72010-01-09 02:24:10 +00003650{
3651 struct net_device *netdev = pci_get_drvdata(pdev);
3652 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3653
Mark Rustad2e7cfbd2014-03-04 03:02:13 +00003654 set_bit(__IXGBEVF_REMOVING, &adapter->state);
Greg Rose92915f72010-01-09 02:24:10 +00003655
3656 del_timer_sync(&adapter->watchdog_timer);
3657
Tejun Heo23f333a2010-12-12 16:45:14 +01003658 cancel_work_sync(&adapter->reset_task);
Greg Rose92915f72010-01-09 02:24:10 +00003659 cancel_work_sync(&adapter->watchdog_task);
3660
Alexander Duyckfd13a9a2012-05-11 08:32:24 +00003661 if (netdev->reg_state == NETREG_REGISTERED)
Greg Rose92915f72010-01-09 02:24:10 +00003662 unregister_netdev(netdev);
Greg Rose92915f72010-01-09 02:24:10 +00003663
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003664 ixgbevf_clear_interrupt_scheme(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00003665 ixgbevf_reset_interrupt_capability(adapter);
3666
Mark Rustaddbf8b0d2014-03-04 03:02:34 +00003667 iounmap(adapter->io_addr);
Greg Rose92915f72010-01-09 02:24:10 +00003668 pci_release_regions(pdev);
3669
3670 hw_dbg(&adapter->hw, "Remove complete\n");
3671
Greg Rose92915f72010-01-09 02:24:10 +00003672 free_netdev(netdev);
3673
Mark Rustadbc0c7152014-03-12 00:38:45 +00003674 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3675 pci_disable_device(pdev);
Greg Rose92915f72010-01-09 02:24:10 +00003676}
3677
Alexander Duyck9f19f312012-05-11 08:33:32 +00003678/**
3679 * ixgbevf_io_error_detected - called when PCI error is detected
3680 * @pdev: Pointer to PCI device
3681 * @state: The current pci connection state
3682 *
3683 * This function is called after a PCI bus error affecting
3684 * this device has been detected.
3685 */
3686static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
3687 pci_channel_state_t state)
3688{
3689 struct net_device *netdev = pci_get_drvdata(pdev);
3690 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3691
Mark Rustadea699562014-03-12 00:38:51 +00003692 if (!test_bit(__IXGBEVF_WORK_INIT, &adapter->state))
3693 return PCI_ERS_RESULT_DISCONNECT;
3694
Mark Rustadbc0c7152014-03-12 00:38:45 +00003695 rtnl_lock();
Alexander Duyck9f19f312012-05-11 08:33:32 +00003696 netif_device_detach(netdev);
3697
Mark Rustadbc0c7152014-03-12 00:38:45 +00003698 if (state == pci_channel_io_perm_failure) {
3699 rtnl_unlock();
Alexander Duyck9f19f312012-05-11 08:33:32 +00003700 return PCI_ERS_RESULT_DISCONNECT;
Mark Rustadbc0c7152014-03-12 00:38:45 +00003701 }
Alexander Duyck9f19f312012-05-11 08:33:32 +00003702
3703 if (netif_running(netdev))
3704 ixgbevf_down(adapter);
3705
Mark Rustadbc0c7152014-03-12 00:38:45 +00003706 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3707 pci_disable_device(pdev);
3708 rtnl_unlock();
Alexander Duyck9f19f312012-05-11 08:33:32 +00003709
3710 /* Request a slot slot reset. */
3711 return PCI_ERS_RESULT_NEED_RESET;
3712}
3713
3714/**
3715 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
3716 * @pdev: Pointer to PCI device
3717 *
3718 * Restart the card from scratch, as if from a cold-boot. Implementation
3719 * resembles the first-half of the ixgbevf_resume routine.
3720 */
3721static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
3722{
3723 struct net_device *netdev = pci_get_drvdata(pdev);
3724 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3725
3726 if (pci_enable_device_mem(pdev)) {
3727 dev_err(&pdev->dev,
3728 "Cannot re-enable PCI device after reset.\n");
3729 return PCI_ERS_RESULT_DISCONNECT;
3730 }
3731
Peter Zijlstra4e857c52014-03-17 18:06:10 +01003732 smp_mb__before_atomic();
Mark Rustadbc0c7152014-03-12 00:38:45 +00003733 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
Alexander Duyck9f19f312012-05-11 08:33:32 +00003734 pci_set_master(pdev);
3735
3736 ixgbevf_reset(adapter);
3737
3738 return PCI_ERS_RESULT_RECOVERED;
3739}
3740
3741/**
3742 * ixgbevf_io_resume - called when traffic can start flowing again.
3743 * @pdev: Pointer to PCI device
3744 *
3745 * This callback is called when the error recovery driver tells us that
3746 * its OK to resume normal operation. Implementation resembles the
3747 * second-half of the ixgbevf_resume routine.
3748 */
3749static void ixgbevf_io_resume(struct pci_dev *pdev)
3750{
3751 struct net_device *netdev = pci_get_drvdata(pdev);
3752 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3753
3754 if (netif_running(netdev))
3755 ixgbevf_up(adapter);
3756
3757 netif_device_attach(netdev);
3758}
3759
3760/* PCI Error Recovery (ERS) */
Stephen Hemminger3646f0e2012-09-07 09:33:15 -07003761static const struct pci_error_handlers ixgbevf_err_handler = {
Alexander Duyck9f19f312012-05-11 08:33:32 +00003762 .error_detected = ixgbevf_io_error_detected,
3763 .slot_reset = ixgbevf_io_slot_reset,
3764 .resume = ixgbevf_io_resume,
3765};
3766
Greg Rose92915f72010-01-09 02:24:10 +00003767static struct pci_driver ixgbevf_driver = {
3768 .name = ixgbevf_driver_name,
3769 .id_table = ixgbevf_pci_tbl,
3770 .probe = ixgbevf_probe,
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05003771 .remove = ixgbevf_remove,
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003772#ifdef CONFIG_PM
3773 /* Power Management Hooks */
3774 .suspend = ixgbevf_suspend,
3775 .resume = ixgbevf_resume,
3776#endif
Greg Rose92915f72010-01-09 02:24:10 +00003777 .shutdown = ixgbevf_shutdown,
Alexander Duyck9f19f312012-05-11 08:33:32 +00003778 .err_handler = &ixgbevf_err_handler
Greg Rose92915f72010-01-09 02:24:10 +00003779};
3780
3781/**
Greg Rose65d676c2011-02-03 06:54:13 +00003782 * ixgbevf_init_module - Driver Registration Routine
Greg Rose92915f72010-01-09 02:24:10 +00003783 *
Greg Rose65d676c2011-02-03 06:54:13 +00003784 * ixgbevf_init_module is the first routine called when the driver is
Greg Rose92915f72010-01-09 02:24:10 +00003785 * loaded. All it does is register with the PCI subsystem.
3786 **/
3787static int __init ixgbevf_init_module(void)
3788{
3789 int ret;
Jeff Kirsherdbd96362011-10-21 19:38:18 +00003790 pr_info("%s - version %s\n", ixgbevf_driver_string,
3791 ixgbevf_driver_version);
Greg Rose92915f72010-01-09 02:24:10 +00003792
Jeff Kirsherdbd96362011-10-21 19:38:18 +00003793 pr_info("%s\n", ixgbevf_copyright);
Greg Rose92915f72010-01-09 02:24:10 +00003794
3795 ret = pci_register_driver(&ixgbevf_driver);
3796 return ret;
3797}
3798
3799module_init(ixgbevf_init_module);
3800
3801/**
Greg Rose65d676c2011-02-03 06:54:13 +00003802 * ixgbevf_exit_module - Driver Exit Cleanup Routine
Greg Rose92915f72010-01-09 02:24:10 +00003803 *
Greg Rose65d676c2011-02-03 06:54:13 +00003804 * ixgbevf_exit_module is called just before the driver is removed
Greg Rose92915f72010-01-09 02:24:10 +00003805 * from memory.
3806 **/
3807static void __exit ixgbevf_exit_module(void)
3808{
3809 pci_unregister_driver(&ixgbevf_driver);
3810}
3811
3812#ifdef DEBUG
3813/**
Greg Rose65d676c2011-02-03 06:54:13 +00003814 * ixgbevf_get_hw_dev_name - return device name string
Greg Rose92915f72010-01-09 02:24:10 +00003815 * used by hardware layer to print debugging information
3816 **/
3817char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3818{
3819 struct ixgbevf_adapter *adapter = hw->back;
3820 return adapter->netdev->name;
3821}
3822
3823#endif
3824module_exit(ixgbevf_exit_module);
3825
3826/* ixgbevf_main.c */