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R Sricharan6b5de092012-05-10 19:46:00 +05301/*
Sricharan Rfa63d032013-06-07 18:52:47 +05302 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
R Sricharan6b5de092012-05-10 19:46:00 +05303 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussard98ef79572013-05-31 14:32:55 +020010#include "omap5.dtsi"
R Sricharan6b5de092012-05-10 19:46:00 +053011
12/ {
Sricharan Rfa63d032013-06-07 18:52:47 +053013 model = "TI OMAP5 uEVM board";
14 compatible = "ti,omap5-uevm", "ti,omap5";
R Sricharan6b5de092012-05-10 19:46:00 +053015
16 memory {
17 device_type = "memory";
Santosh Shilimkar03178c62013-01-18 11:43:16 +053018 reg = <0x80000000 0x7F000000>; /* 2032 MB */
R Sricharan6b5de092012-05-10 19:46:00 +053019 };
Balaji T K5dd18b02012-08-07 12:48:21 +053020
21 vmmcsd_fixed: fixedregulator-mmcsd {
22 compatible = "regulator-fixed";
23 regulator-name = "vmmcsd_fixed";
24 regulator-min-microvolt = <3000000>;
25 regulator-max-microvolt = <3000000>;
26 };
Sourav Poddar5449fbc2012-07-25 11:03:27 +053027
Roger Quadrosed7f8e82013-06-07 18:52:48 +053028 /* HS USB Port 2 RESET */
29 hsusb2_reset: hsusb2_reset_reg {
30 compatible = "regulator-fixed";
31 regulator-name = "hsusb2_reset";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
34 gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
35 startup-delay-us = <70000>;
36 enable-active-high;
37 };
38
39 /* HS USB Host PHY on PORT 2 */
40 hsusb2_phy: hsusb2_phy {
41 compatible = "usb-nop-xceiv";
42 reset-supply = <&hsusb2_reset>;
43 };
44
45 /* HS USB Port 3 RESET */
46 hsusb3_reset: hsusb3_reset_reg {
47 compatible = "regulator-fixed";
48 regulator-name = "hsusb3_reset";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
51 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
52 startup-delay-us = <70000>;
53 enable-active-high;
54 };
55
56 /* HS USB Host PHY on PORT 3 */
57 hsusb3_phy: hsusb3_phy {
58 compatible = "usb-nop-xceiv";
59 reset-supply = <&hsusb3_reset>;
60 };
61
Dan Murphy66155302013-06-07 18:52:49 +053062 leds {
63 compatible = "gpio-leds";
64 led@1 {
65 label = "omap5:blue:usr1";
66 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
67 linux,default-trigger = "heartbeat";
68 default-state = "off";
69 };
70 };
Balaji T K5dd18b02012-08-07 12:48:21 +053071};
72
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030073&omap5_pmx_core {
74 pinctrl-names = "default";
75 pinctrl-0 = <
76 &twl6040_pins
77 &mcpdm_pins
78 &dmic_pins
79 &mcbsp1_pins
80 &mcbsp2_pins
Roger Quadrosed7f8e82013-06-07 18:52:48 +053081 &usbhost_pins
Dan Murphy66155302013-06-07 18:52:49 +053082 &led_gpio_pins
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030083 >;
84
85 twl6040_pins: pinmux_twl6040_pins {
86 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020087 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030088 >;
89 };
90
91 mcpdm_pins: pinmux_mcpdm_pins {
92 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020093 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
94 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
95 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
96 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
97 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030098 >;
99 };
100
101 dmic_pins: pinmux_dmic_pins {
102 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200103 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
104 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
105 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
106 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300107 >;
108 };
109
110 mcbsp1_pins: pinmux_mcbsp1_pins {
111 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200112 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
113 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
114 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
115 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300116 >;
117 };
118
119 mcbsp2_pins: pinmux_mcbsp2_pins {
120 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200121 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
122 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
123 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
124 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300125 >;
126 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530127
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200128 i2c1_pins: pinmux_i2c1_pins {
129 pinctrl-single,pins = <
130 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
131 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
132 >;
133 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530134
Sourav Poddar9be495c2013-02-13 14:58:22 +0530135 i2c5_pins: pinmux_i2c5_pins {
136 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200137 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
138 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
Sourav Poddar9be495c2013-02-13 14:58:22 +0530139 >;
140 };
Sourav Poddar392adaf2013-02-13 14:58:44 +0530141
142 mcspi2_pins: pinmux_mcspi2_pins {
143 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200144 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
145 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
146 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
147 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530148 >;
149 };
150
151 mcspi3_pins: pinmux_mcspi3_pins {
152 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200153 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
154 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
155 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
156 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530157 >;
158 };
159
160 mcspi4_pins: pinmux_mcspi4_pins {
161 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200162 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
163 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
164 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
165 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530166 >;
167 };
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530168
169 usbhost_pins: pinmux_usbhost_pins {
170 pinctrl-single,pins = <
171 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
172 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
173
174 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
175 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
176
177 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
178 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
179 >;
180 };
Dan Murphy66155302013-06-07 18:52:49 +0530181
182 led_gpio_pins: pinmux_led_gpio_pins {
183 pinctrl-single,pins = <
184 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
185 >;
186 };
Sourav Poddared22fee2013-06-07 18:52:50 +0530187
188 uart1_pins: pinmux_uart1_pins {
189 pinctrl-single,pins = <
190 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
191 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
192 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
193 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
194 >;
195 };
196
197 uart3_pins: pinmux_uart3_pins {
198 pinctrl-single,pins = <
199 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
200 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
201 >;
202 };
203
204 uart5_pins: pinmux_uart5_pins {
205 pinctrl-single,pins = <
206 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
207 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
208 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
209 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
210 >;
211 };
212
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530213};
214
215&omap5_pmx_wkup {
216 pinctrl-names = "default";
217 pinctrl-0 = <
218 &usbhost_wkup_pins
219 >;
220
221 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
222 pinctrl-single,pins = <
223 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
224 >;
225 };
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300226};
227
Balaji T K5dd18b02012-08-07 12:48:21 +0530228&mmc1 {
229 vmmc-supply = <&vmmcsd_fixed>;
230 bus-width = <4>;
231};
232
233&mmc2 {
234 vmmc-supply = <&vmmcsd_fixed>;
235 bus-width = <8>;
236 ti,non-removable;
237};
238
239&mmc3 {
240 bus-width = <4>;
241 ti,non-removable;
242};
243
244&mmc4 {
245 status = "disabled";
246};
247
248&mmc5 {
249 status = "disabled";
R Sricharan6b5de092012-05-10 19:46:00 +0530250};
Sourav Poddar08f3e212012-07-25 11:02:43 +0530251
Sourav Poddar9be495c2013-02-13 14:58:22 +0530252&i2c1 {
253 pinctrl-names = "default";
254 pinctrl-0 = <&i2c1_pins>;
255
256 clock-frequency = <400000>;
257};
258
Sourav Poddar9be495c2013-02-13 14:58:22 +0530259&i2c5 {
260 pinctrl-names = "default";
261 pinctrl-0 = <&i2c5_pins>;
262
263 clock-frequency = <400000>;
264};
265
Peter Ujfalusi42601d52012-10-04 14:57:24 +0300266&mcbsp3 {
267 status = "disabled";
268};
Lokesh Vutla4d2750f2012-11-05 18:22:52 +0530269
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530270&usbhshost {
271 port2-mode = "ehci-hsic";
272 port3-mode = "ehci-hsic";
273};
274
275&usbhsehci {
276 phys = <0 &hsusb2_phy &hsusb3_phy>;
277};
278
Sourav Poddar392adaf2013-02-13 14:58:44 +0530279&mcspi1 {
280
281};
282
283&mcspi2 {
284 pinctrl-names = "default";
285 pinctrl-0 = <&mcspi2_pins>;
286};
287
288&mcspi3 {
289 pinctrl-names = "default";
290 pinctrl-0 = <&mcspi3_pins>;
291};
292
293&mcspi4 {
294 pinctrl-names = "default";
295 pinctrl-0 = <&mcspi4_pins>;
296};
Sourav Poddared22fee2013-06-07 18:52:50 +0530297
298&uart1 {
299 pinctrl-names = "default";
300 pinctrl-0 = <&uart1_pins>;
301};
302
303&uart3 {
304 pinctrl-names = "default";
305 pinctrl-0 = <&uart3_pins>;
306};
307
308&uart5 {
309 pinctrl-names = "default";
310 pinctrl-0 = <&uart5_pins>;
311};