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Andy Fleming00db8182005-07-30 19:31:23 -04001/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000010 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
11 *
Andy Fleming00db8182005-07-30 19:31:23 -040012 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
Andy Fleming00db8182005-07-30 19:31:23 -040018#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010020#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040021#include <linux/errno.h>
22#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010023#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040024#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040033#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100036#include <linux/marvell_phy.h>
David Daneycf41a512010-11-19 12:13:18 +000037#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
Avinash Kumareea3b202013-09-30 09:36:44 +053039#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040040#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053041#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040042
David Daney27d916d2010-11-19 11:58:52 +000043#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020044#define MII_MARVELL_COPPER_PAGE 0x00
45#define MII_MARVELL_FIBER_PAGE 0x01
46#define MII_MARVELL_MSCR_PAGE 0x02
47#define MII_MARVELL_LED_PAGE 0x03
48#define MII_MARVELL_MISC_TEST_PAGE 0x06
49#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000050
Andy Fleming00db8182005-07-30 19:31:23 -040051#define MII_M1011_IEVENT 0x13
52#define MII_M1011_IEVENT_CLEAR 0x0000
53
54#define MII_M1011_IMASK 0x12
55#define MII_M1011_IMASK_INIT 0x6400
56#define MII_M1011_IMASK_CLEAR 0x0000
57
Andy Fleming76884672007-02-09 18:13:58 -060058#define MII_M1011_PHY_SCR 0x10
David Thomson239aa552015-07-10 16:28:25 +120059#define MII_M1011_PHY_SCR_MDI 0x0000
60#define MII_M1011_PHY_SCR_MDI_X 0x0020
Andy Fleming76884672007-02-09 18:13:58 -060061#define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
62
Viet Nga Daob0224172014-10-23 19:41:53 -070063#define MII_M1145_PHY_EXT_SR 0x1b
Andy Fleming76884672007-02-09 18:13:58 -060064#define MII_M1145_PHY_EXT_CR 0x14
65#define MII_M1145_RGMII_RX_DELAY 0x0080
66#define MII_M1145_RGMII_TX_DELAY 0x0002
Viet Nga Daob0224172014-10-23 19:41:53 -070067#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4
68#define MII_M1145_HWCFG_MODE_MASK 0xf
69#define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000
Andy Fleming76884672007-02-09 18:13:58 -060070
Vince Bridgers99d881f2014-10-26 14:22:24 -050071#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK 0x4
72#define MII_M1145_HWCFG_MODE_MASK 0xf
73#define MII_M1145_HWCFG_FIBER_COPPER_AUTO 0x8000
74
Andy Fleming76884672007-02-09 18:13:58 -060075#define MII_M1111_PHY_LED_CONTROL 0x18
76#define MII_M1111_PHY_LED_DIRECT 0x4100
77#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080078#define MII_M1111_PHY_EXT_CR 0x14
79#define MII_M1111_RX_DELAY 0x80
80#define MII_M1111_TX_DELAY 0x2
81#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030082
83#define MII_M1111_HWCFG_MODE_MASK 0xf
84#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
85#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050086#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000087#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030088#define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
89#define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
90
Cyril Chemparathyc477d042010-08-02 09:44:53 +000091#define MII_88E1121_PHY_MSCR_REG 21
92#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
93#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
94#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4))
95
Andrew Lunn0b046802017-01-20 01:37:49 +010096#define MII_88E1121_MISC_TEST 0x1a
97#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
98#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
99#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
100#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
101#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
102#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
103
104#define MII_88E1510_TEMP_SENSOR 0x1b
105#define MII_88E1510_TEMP_SENSOR_MASK 0xff
106
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700107#define MII_88E1318S_PHY_MSCR1_REG 16
108#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700109
Michael Stapelberg3871c382013-03-11 13:56:45 +0000110/* Copper Specific Interrupt Enable Register */
111#define MII_88E1318S_PHY_CSIER 0x12
112/* WOL Event Interrupt Enable */
113#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
114
115/* LED Timer Control Register */
Michael Stapelberg3871c382013-03-11 13:56:45 +0000116#define MII_88E1318S_PHY_LED_TCR 0x12
117#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
118#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
119#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
120
121/* Magic Packet MAC address registers */
122#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
123#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
124#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
125
Michael Stapelberg3871c382013-03-11 13:56:45 +0000126#define MII_88E1318S_PHY_WOL_CTRL 0x10
127#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
128#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
129
Sergei Poselenov140bc922009-04-07 02:01:41 +0000130#define MII_88E1121_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000131#define MII_88E1121_PHY_LED_DEF 0x0030
Sergei Poselenov140bc922009-04-07 02:01:41 +0000132
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300133#define MII_M1011_PHY_STATUS 0x11
134#define MII_M1011_PHY_STATUS_1000 0x8000
135#define MII_M1011_PHY_STATUS_100 0x4000
136#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
137#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
138#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
139#define MII_M1011_PHY_STATUS_LINK 0x0400
140
Michal Simek3da09a52013-05-30 20:08:26 +0000141#define MII_M1116R_CONTROL_REG_MAC 21
142
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200143#define MII_88E3016_PHY_SPEC_CTRL 0x10
144#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
145#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600146
Stefan Roese930b37e2016-02-18 10:59:07 +0100147#define MII_88E1510_GEN_CTRL_REG_1 0x14
148#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
149#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
150#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
151
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200152#define LPA_FIBER_1000HALF 0x40
153#define LPA_FIBER_1000FULL 0x20
154
155#define LPA_PAUSE_FIBER 0x180
156#define LPA_PAUSE_ASYM_FIBER 0x100
157
158#define ADVERTISE_FIBER_1000HALF 0x40
159#define ADVERTISE_FIBER_1000FULL 0x20
160
161#define ADVERTISE_PAUSE_FIBER 0x180
162#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
163
164#define REGISTER_LINK_STATUS 0x400
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200165#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200166
Andy Fleming00db8182005-07-30 19:31:23 -0400167MODULE_DESCRIPTION("Marvell PHY driver");
168MODULE_AUTHOR("Andy Fleming");
169MODULE_LICENSE("GPL");
170
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100171struct marvell_hw_stat {
172 const char *string;
173 u8 page;
174 u8 reg;
175 u8 bits;
176};
177
178static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200179 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100180 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200181 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100182};
183
184struct marvell_priv {
185 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100186 char *hwmon_name;
187 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100188};
189
Andrew Lunn6427bb22017-05-17 03:26:03 +0200190static int marvell_get_page(struct phy_device *phydev)
191{
192 return phy_read(phydev, MII_MARVELL_PHY_PAGE);
193}
194
195static int marvell_set_page(struct phy_device *phydev, int page)
196{
197 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
198}
199
Andrew Lunn53798322017-05-25 21:42:07 +0200200static int marvell_get_set_page(struct phy_device *phydev, int page)
201{
202 int oldpage = marvell_get_page(phydev);
203
204 if (oldpage < 0)
205 return oldpage;
206
207 if (page != oldpage)
208 return marvell_set_page(phydev, page);
209
210 return 0;
211}
212
Andy Fleming00db8182005-07-30 19:31:23 -0400213static int marvell_ack_interrupt(struct phy_device *phydev)
214{
215 int err;
216
217 /* Clear the interrupts by reading the reg */
218 err = phy_read(phydev, MII_M1011_IEVENT);
219
220 if (err < 0)
221 return err;
222
223 return 0;
224}
225
226static int marvell_config_intr(struct phy_device *phydev)
227{
228 int err;
229
Andy Fleming76884672007-02-09 18:13:58 -0600230 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200231 err = phy_write(phydev, MII_M1011_IMASK,
232 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400233 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200234 err = phy_write(phydev, MII_M1011_IMASK,
235 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400236
237 return err;
238}
239
David Thomson239aa552015-07-10 16:28:25 +1200240static int marvell_set_polarity(struct phy_device *phydev, int polarity)
241{
242 int reg;
243 int err;
244 int val;
245
246 /* get the current settings */
247 reg = phy_read(phydev, MII_M1011_PHY_SCR);
248 if (reg < 0)
249 return reg;
250
251 val = reg;
252 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
253 switch (polarity) {
254 case ETH_TP_MDI:
255 val |= MII_M1011_PHY_SCR_MDI;
256 break;
257 case ETH_TP_MDI_X:
258 val |= MII_M1011_PHY_SCR_MDI_X;
259 break;
260 case ETH_TP_MDI_AUTO:
261 case ETH_TP_MDI_INVALID:
262 default:
263 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
264 break;
265 }
266
267 if (val != reg) {
268 /* Set the new polarity value in the register */
269 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
270 if (err)
271 return err;
272 }
273
274 return 0;
275}
276
Andy Fleming00db8182005-07-30 19:31:23 -0400277static int marvell_config_aneg(struct phy_device *phydev)
278{
279 int err;
280
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530281 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600282 if (err < 0)
283 return err;
284
285 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
286 MII_M1111_PHY_LED_DIRECT);
287 if (err < 0)
288 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400289
290 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000291 if (err < 0)
292 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400293
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000294 if (phydev->autoneg != AUTONEG_ENABLE) {
295 int bmcr;
296
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200297 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000298 * genphy_config_aneg() call above) must be followed by
299 * a software reset. Otherwise, the write has no effect.
300 */
301 bmcr = phy_read(phydev, MII_BMCR);
302 if (bmcr < 0)
303 return bmcr;
304
305 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
306 if (err < 0)
307 return err;
308 }
309
310 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400311}
312
Andrew Lunnf2899782017-05-23 17:49:13 +0200313static int m88e1101_config_aneg(struct phy_device *phydev)
314{
315 int err;
316
317 /* This Marvell PHY has an errata which requires
318 * that certain registers get written in order
319 * to restart autonegotiation
320 */
321 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
322
323 if (err < 0)
324 return err;
325
326 err = phy_write(phydev, 0x1d, 0x1f);
327 if (err < 0)
328 return err;
329
330 err = phy_write(phydev, 0x1e, 0x200c);
331 if (err < 0)
332 return err;
333
334 err = phy_write(phydev, 0x1d, 0x5);
335 if (err < 0)
336 return err;
337
338 err = phy_write(phydev, 0x1e, 0);
339 if (err < 0)
340 return err;
341
342 err = phy_write(phydev, 0x1e, 0x100);
343 if (err < 0)
344 return err;
345
346 return marvell_config_aneg(phydev);
347}
348
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530349static int m88e1111_config_aneg(struct phy_device *phydev)
350{
351 int err;
352
353 /* The Marvell PHY has an errata which requires
354 * that certain registers get written in order
355 * to restart autonegotiation
356 */
357 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
358
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530359 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Harini Katakam3ec0a0f2016-06-27 13:09:59 +0530360 if (err < 0)
361 return err;
362
363 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
364 MII_M1111_PHY_LED_DIRECT);
365 if (err < 0)
366 return err;
367
368 err = genphy_config_aneg(phydev);
369 if (err < 0)
370 return err;
371
372 if (phydev->autoneg != AUTONEG_ENABLE) {
373 int bmcr;
374
375 /* A write to speed/duplex bits (that is performed by
376 * genphy_config_aneg() call above) must be followed by
377 * a software reset. Otherwise, the write has no effect.
378 */
379 bmcr = phy_read(phydev, MII_BMCR);
380 if (bmcr < 0)
381 return bmcr;
382
383 err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
384 if (err < 0)
385 return err;
386 }
387
388 return 0;
389}
390
David Daneycf41a512010-11-19 12:13:18 +0000391#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200392/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000393 * marvell,reg-init property stored in the of_node for the phydev.
394 *
395 * marvell,reg-init = <reg-page reg mask value>,...;
396 *
397 * There may be one or more sets of <reg-page reg mask value>:
398 *
399 * reg-page: which register bank to use.
400 * reg: the register.
401 * mask: if non-zero, ANDed with existing register value.
402 * value: ORed with the masked value and written to the regiser.
403 *
404 */
405static int marvell_of_reg_init(struct phy_device *phydev)
406{
407 const __be32 *paddr;
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100408 int len, i, saved_page, current_page, ret;
David Daneycf41a512010-11-19 12:13:18 +0000409
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100410 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000411 return 0;
412
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100413 paddr = of_get_property(phydev->mdio.dev.of_node,
414 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000415 if (!paddr || len < (4 * sizeof(*paddr)))
416 return 0;
417
Andrew Lunn6427bb22017-05-17 03:26:03 +0200418 saved_page = marvell_get_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000419 if (saved_page < 0)
420 return saved_page;
David Daneycf41a512010-11-19 12:13:18 +0000421 current_page = saved_page;
422
423 ret = 0;
424 len /= sizeof(*paddr);
425 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200426 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000427 u16 reg = be32_to_cpup(paddr + i + 1);
428 u16 mask = be32_to_cpup(paddr + i + 2);
429 u16 val_bits = be32_to_cpup(paddr + i + 3);
430 int val;
431
Andrew Lunn6427bb22017-05-17 03:26:03 +0200432 if (page != current_page) {
433 current_page = page;
434 ret = marvell_set_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000435 if (ret < 0)
436 goto err;
437 }
438
439 val = 0;
440 if (mask) {
441 val = phy_read(phydev, reg);
442 if (val < 0) {
443 ret = val;
444 goto err;
445 }
446 val &= mask;
447 }
448 val |= val_bits;
449
450 ret = phy_write(phydev, reg, val);
451 if (ret < 0)
452 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000453 }
454err:
Uwe Kleine-Königb5718b52016-11-10 15:03:01 +0100455 if (current_page != saved_page) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200456 i = marvell_set_page(phydev, saved_page);
David Daneycf41a512010-11-19 12:13:18 +0000457 if (ret == 0)
458 ret = i;
459 }
460 return ret;
461}
462#else
463static int marvell_of_reg_init(struct phy_device *phydev)
464{
465 return 0;
466}
467#endif /* CONFIG_OF_MDIO */
468
Sergei Poselenov140bc922009-04-07 02:01:41 +0000469static int m88e1121_config_aneg(struct phy_device *phydev)
470{
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000471 int err, oldpage, mscr;
472
Andrew Lunn52295662017-05-25 21:42:08 +0200473 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200474 if (oldpage < 0)
475 return oldpage;
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000476
Florian Fainelli32a64162015-05-26 12:19:59 -0700477 if (phy_interface_is_rgmii(phydev)) {
Arnaud Patardbe8c6482010-10-21 03:59:57 -0700478 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
479 MII_88E1121_PHY_MSCR_DELAY_MASK;
480
481 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
482 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
483 MII_88E1121_PHY_MSCR_TX_DELAY);
484 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
485 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
486 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
487 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
488
489 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
490 if (err < 0)
491 return err;
492 }
Cyril Chemparathyc477d042010-08-02 09:44:53 +0000493
Andrew Lunn6427bb22017-05-17 03:26:03 +0200494 marvell_set_page(phydev, oldpage);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000495
496 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
497 if (err < 0)
498 return err;
499
500 err = phy_write(phydev, MII_M1011_PHY_SCR,
501 MII_M1011_PHY_SCR_AUTO_CROSS);
502 if (err < 0)
503 return err;
504
Clemens Gruberfdecf362016-06-11 17:21:26 +0200505 return genphy_config_aneg(phydev);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000506}
507
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700508static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700509{
510 int err, oldpage, mscr;
511
Andrew Lunn52295662017-05-25 21:42:08 +0200512 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200513 if (oldpage < 0)
514 return oldpage;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700515
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700516 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
517 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700518
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700519 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700520 if (err < 0)
521 return err;
522
Andrew Lunn6427bb22017-05-17 03:26:03 +0200523 err = marvell_set_page(phydev, oldpage);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700524 if (err < 0)
525 return err;
526
527 return m88e1121_config_aneg(phydev);
528}
529
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200530/**
531 * ethtool_adv_to_fiber_adv_t
532 * @ethadv: the ethtool advertisement settings
533 *
534 * A small helper function that translates ethtool advertisement
535 * settings to phy autonegotiation advertisements for the
536 * MII_ADV register for fiber link.
537 */
538static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
539{
540 u32 result = 0;
541
542 if (ethadv & ADVERTISED_1000baseT_Half)
543 result |= ADVERTISE_FIBER_1000HALF;
544 if (ethadv & ADVERTISED_1000baseT_Full)
545 result |= ADVERTISE_FIBER_1000FULL;
546
547 if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
548 result |= LPA_PAUSE_ASYM_FIBER;
549 else if (ethadv & ADVERTISE_PAUSE_CAP)
550 result |= (ADVERTISE_PAUSE_FIBER
551 & (~ADVERTISE_PAUSE_ASYM_FIBER));
552
553 return result;
554}
555
556/**
557 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
558 * @phydev: target phy_device struct
559 *
560 * Description: If auto-negotiation is enabled, we configure the
561 * advertising, and then restart auto-negotiation. If it is not
562 * enabled, then we write the BMCR. Adapted for fiber link in
563 * some Marvell's devices.
564 */
565static int marvell_config_aneg_fiber(struct phy_device *phydev)
566{
567 int changed = 0;
568 int err;
569 int adv, oldadv;
570 u32 advertise;
571
572 if (phydev->autoneg != AUTONEG_ENABLE)
573 return genphy_setup_forced(phydev);
574
575 /* Only allow advertising what this PHY supports */
576 phydev->advertising &= phydev->supported;
577 advertise = phydev->advertising;
578
579 /* Setup fiber advertisement */
580 adv = phy_read(phydev, MII_ADVERTISE);
581 if (adv < 0)
582 return adv;
583
584 oldadv = adv;
585 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
586 | LPA_PAUSE_FIBER);
587 adv |= ethtool_adv_to_fiber_adv_t(advertise);
588
589 if (adv != oldadv) {
590 err = phy_write(phydev, MII_ADVERTISE, adv);
591 if (err < 0)
592 return err;
593
594 changed = 1;
595 }
596
597 if (changed == 0) {
598 /* Advertisement hasn't changed, but maybe aneg was never on to
599 * begin with? Or maybe phy was isolated?
600 */
601 int ctl = phy_read(phydev, MII_BMCR);
602
603 if (ctl < 0)
604 return ctl;
605
606 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
607 changed = 1; /* do restart aneg */
608 }
609
610 /* Only restart aneg if we are advertising something different
611 * than we were before.
612 */
613 if (changed > 0)
614 changed = genphy_restart_aneg(phydev);
615
616 return changed;
617}
618
Michal Simek10e24caa2013-05-30 20:08:27 +0000619static int m88e1510_config_aneg(struct phy_device *phydev)
620{
621 int err;
622
Andrew Lunn52295662017-05-25 21:42:08 +0200623 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200624 if (err < 0)
625 goto error;
626
627 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000628 err = m88e1318_config_aneg(phydev);
629 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200630 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000631
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200632 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200633 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200634 if (err < 0)
635 goto error;
636
637 err = marvell_config_aneg_fiber(phydev);
638 if (err < 0)
639 goto error;
640
Andrew Lunn52295662017-05-25 21:42:08 +0200641 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200642
643error:
Andrew Lunn52295662017-05-25 21:42:08 +0200644 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200645 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100646}
647
648static int marvell_config_init(struct phy_device *phydev)
649{
650 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000651 return marvell_of_reg_init(phydev);
652}
653
Michal Simek3da09a52013-05-30 20:08:26 +0000654static int m88e1116r_config_init(struct phy_device *phydev)
655{
656 int temp;
657 int err;
658
659 temp = phy_read(phydev, MII_BMCR);
660 temp |= BMCR_RESET;
661 err = phy_write(phydev, MII_BMCR, temp);
662 if (err < 0)
663 return err;
664
665 mdelay(500);
666
Andrew Lunn52295662017-05-25 21:42:08 +0200667 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000668 if (err < 0)
669 return err;
670
671 temp = phy_read(phydev, MII_M1011_PHY_SCR);
672 temp |= (7 << 12); /* max number of gigabit attempts */
673 temp |= (1 << 11); /* enable downshift */
674 temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
675 err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
676 if (err < 0)
677 return err;
678
Andrew Lunn52295662017-05-25 21:42:08 +0200679 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000680 if (err < 0)
681 return err;
682 temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
683 temp |= (1 << 5);
684 temp |= (1 << 4);
685 err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
686 if (err < 0)
687 return err;
Andrew Lunn52295662017-05-25 21:42:08 +0200688 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michal Simek3da09a52013-05-30 20:08:26 +0000689 if (err < 0)
690 return err;
691
692 temp = phy_read(phydev, MII_BMCR);
693 temp |= BMCR_RESET;
694 err = phy_write(phydev, MII_BMCR, temp);
695 if (err < 0)
696 return err;
697
698 mdelay(500);
699
Clemens Gruber79be1a12016-02-15 23:46:45 +0100700 return marvell_config_init(phydev);
Michal Simek3da09a52013-05-30 20:08:26 +0000701}
702
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200703static int m88e3016_config_init(struct phy_device *phydev)
704{
705 int reg;
706
707 /* Enable Scrambler and Auto-Crossover */
708 reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
709 if (reg < 0)
710 return reg;
711
712 reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
713 reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
714
715 reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
716 if (reg < 0)
717 return reg;
718
Clemens Gruber79be1a12016-02-15 23:46:45 +0100719 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200720}
721
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200722static int m88e1111_config_init_rgmii(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800723{
724 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300725 int temp;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300726
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200727 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
728 if (temp < 0)
729 return temp;
730
731 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
732 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
733 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
734 temp &= ~MII_M1111_TX_DELAY;
735 temp |= MII_M1111_RX_DELAY;
736 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
737 temp &= ~MII_M1111_RX_DELAY;
738 temp |= MII_M1111_TX_DELAY;
739 }
740
741 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
742 if (err < 0)
743 return err;
744
745 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
746 if (temp < 0)
747 return temp;
748
749 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
750
751 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
752 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
753 else
754 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
755
756 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
757}
758
759static int m88e1111_config_init_sgmii(struct phy_device *phydev)
760{
761 int err;
762 int temp;
763
764 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
765 if (temp < 0)
766 return temp;
767
768 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
769 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
770 temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
771
772 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
773 if (err < 0)
774 return err;
775
776 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200777 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200778}
779
780static int m88e1111_config_init_rtbi(struct phy_device *phydev)
781{
782 int err;
783 int temp;
784
785 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
786 if (temp < 0)
787 return temp;
788
789 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
790 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
791 if (err < 0)
792 return err;
793
794 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
795 if (temp < 0)
796 return temp;
797
798 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
799 MII_M1111_HWCFG_FIBER_COPPER_RES);
800 temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO;
801
802 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
803 if (err < 0)
804 return err;
805
806 /* soft reset */
807 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
808 if (err < 0)
809 return err;
810
811 do
812 temp = phy_read(phydev, MII_BMCR);
813 while (temp & BMCR_RESET);
814
815 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
816 if (temp < 0)
817 return temp;
818
819 temp &= ~(MII_M1111_HWCFG_MODE_MASK |
820 MII_M1111_HWCFG_FIBER_COPPER_RES);
821 temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI |
822 MII_M1111_HWCFG_FIBER_COPPER_AUTO;
823
824 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
825}
826
827static int m88e1111_config_init(struct phy_device *phydev)
828{
829 int err;
830
Florian Fainelli32a64162015-05-26 12:19:59 -0700831 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200832 err = m88e1111_config_init_rgmii(phydev);
833 if (err)
Kim Phillips895ee682007-06-05 18:46:47 +0800834 return err;
835 }
836
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500837 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200838 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800839 if (err < 0)
840 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500841 }
842
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000843 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200844 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000845 if (err < 0)
846 return err;
847 }
848
David Daneycf41a512010-11-19 12:13:18 +0000849 err = marvell_of_reg_init(phydev);
850 if (err < 0)
851 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000852
Srinivas Kandagatlacc90cb32012-04-02 06:25:24 +0000853 return phy_write(phydev, MII_BMCR, BMCR_RESET);
Kim Phillips895ee682007-06-05 18:46:47 +0800854}
855
Clemens Gruberfdecf362016-06-11 17:21:26 +0200856static int m88e1121_config_init(struct phy_device *phydev)
857{
858 int err, oldpage;
859
Andrew Lunn52295662017-05-25 21:42:08 +0200860 oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
Andrew Lunn53798322017-05-25 21:42:07 +0200861 if (oldpage < 0)
862 return oldpage;
Clemens Gruberfdecf362016-06-11 17:21:26 +0200863
864 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
865 err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
866 MII_88E1121_PHY_LED_DEF);
867 if (err < 0)
868 return err;
869
Andrew Lunn6427bb22017-05-17 03:26:03 +0200870 marvell_set_page(phydev, oldpage);
Clemens Gruberfdecf362016-06-11 17:21:26 +0200871
872 /* Set marvell,reg-init configuration from device tree */
873 return marvell_config_init(phydev);
874}
875
Clemens Gruber407353e2016-02-23 20:16:58 +0100876static int m88e1510_config_init(struct phy_device *phydev)
877{
878 int err;
879 int temp;
880
881 /* SGMII-to-Copper mode initialization */
882 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
883 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200884 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100885 if (err < 0)
886 return err;
887
888 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
889 temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
890 temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
891 temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
892 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
893 if (err < 0)
894 return err;
895
896 /* PHY reset is necessary after changing MODE[2:0] */
897 temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
898 err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
899 if (err < 0)
900 return err;
901
902 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200903 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100904 if (err < 0)
905 return err;
906 }
907
Clemens Gruberfdecf362016-06-11 17:21:26 +0200908 return m88e1121_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100909}
910
Ron Madrid605f1962008-11-06 09:05:26 +0000911static int m88e1118_config_aneg(struct phy_device *phydev)
912{
913 int err;
914
915 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
916 if (err < 0)
917 return err;
918
919 err = phy_write(phydev, MII_M1011_PHY_SCR,
920 MII_M1011_PHY_SCR_AUTO_CROSS);
921 if (err < 0)
922 return err;
923
924 err = genphy_config_aneg(phydev);
925 return 0;
926}
927
928static int m88e1118_config_init(struct phy_device *phydev)
929{
930 int err;
931
932 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200933 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000934 if (err < 0)
935 return err;
936
937 /* Enable 1000 Mbit */
938 err = phy_write(phydev, 0x15, 0x1070);
939 if (err < 0)
940 return err;
941
942 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200943 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000944 if (err < 0)
945 return err;
946
947 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +1000948 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
949 err = phy_write(phydev, 0x10, 0x1100);
950 else
951 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +0000952 if (err < 0)
953 return err;
954
David Daneycf41a512010-11-19 12:13:18 +0000955 err = marvell_of_reg_init(phydev);
956 if (err < 0)
957 return err;
958
Ron Madrid605f1962008-11-06 09:05:26 +0000959 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200960 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000961 if (err < 0)
962 return err;
963
Srinivas Kandagatlacc90cb32012-04-02 06:25:24 +0000964 return phy_write(phydev, MII_BMCR, BMCR_RESET);
Ron Madrid605f1962008-11-06 09:05:26 +0000965}
966
David Daney90600732010-11-19 11:58:53 +0000967static int m88e1149_config_init(struct phy_device *phydev)
968{
969 int err;
970
971 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200972 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +0000973 if (err < 0)
974 return err;
975
976 /* Enable 1000 Mbit */
977 err = phy_write(phydev, 0x15, 0x1048);
978 if (err < 0)
979 return err;
980
David Daneycf41a512010-11-19 12:13:18 +0000981 err = marvell_of_reg_init(phydev);
982 if (err < 0)
983 return err;
984
David Daney90600732010-11-19 11:58:53 +0000985 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +0200986 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +0000987 if (err < 0)
988 return err;
989
Srinivas Kandagatlacc90cb32012-04-02 06:25:24 +0000990 return phy_write(phydev, MII_BMCR, BMCR_RESET);
David Daney90600732010-11-19 11:58:53 +0000991}
992
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200993static int m88e1145_config_init_rgmii(struct phy_device *phydev)
994{
995 int err;
996 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
997
998 if (temp < 0)
999 return temp;
1000
1001 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
1002
1003 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
1004 if (err < 0)
1005 return err;
1006
1007 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1008 err = phy_write(phydev, 0x1d, 0x0012);
1009 if (err < 0)
1010 return err;
1011
1012 temp = phy_read(phydev, 0x1e);
1013 if (temp < 0)
1014 return temp;
1015
1016 temp &= 0xf03f;
1017 temp |= 2 << 9; /* 36 ohm */
1018 temp |= 2 << 6; /* 39 ohm */
1019
1020 err = phy_write(phydev, 0x1e, temp);
1021 if (err < 0)
1022 return err;
1023
1024 err = phy_write(phydev, 0x1d, 0x3);
1025 if (err < 0)
1026 return err;
1027
1028 err = phy_write(phydev, 0x1e, 0x8000);
1029 }
1030 return err;
1031}
1032
1033static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1034{
1035 int temp = phy_read(phydev, MII_M1145_PHY_EXT_SR);
1036
1037 if (temp < 0)
1038 return temp;
1039
1040 temp &= ~MII_M1145_HWCFG_MODE_MASK;
1041 temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK;
1042 temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO;
1043
1044 return phy_write(phydev, MII_M1145_PHY_EXT_SR, temp);
1045}
1046
Andy Fleming76884672007-02-09 18:13:58 -06001047static int m88e1145_config_init(struct phy_device *phydev)
1048{
1049 int err;
1050
1051 /* Take care of errata E0 & E1 */
1052 err = phy_write(phydev, 0x1d, 0x001b);
1053 if (err < 0)
1054 return err;
1055
1056 err = phy_write(phydev, 0x1e, 0x418f);
1057 if (err < 0)
1058 return err;
1059
1060 err = phy_write(phydev, 0x1d, 0x0016);
1061 if (err < 0)
1062 return err;
1063
1064 err = phy_write(phydev, 0x1e, 0xa2da);
1065 if (err < 0)
1066 return err;
1067
Kim Phillips895ee682007-06-05 18:46:47 +08001068 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001069 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001070 if (err < 0)
1071 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001072 }
1073
Viet Nga Daob0224172014-10-23 19:41:53 -07001074 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001075 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001076 if (err < 0)
1077 return err;
1078 }
1079
David Daneycf41a512010-11-19 12:13:18 +00001080 err = marvell_of_reg_init(phydev);
1081 if (err < 0)
1082 return err;
1083
Andy Fleming76884672007-02-09 18:13:58 -06001084 return 0;
1085}
Andy Fleming00db8182005-07-30 19:31:23 -04001086
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001087/**
1088 * fiber_lpa_to_ethtool_lpa_t
1089 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001090 *
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001091 * A small helper function that translates MII_LPA
1092 * bits to ethtool LP advertisement settings.
1093 */
1094static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
1095{
1096 u32 result = 0;
1097
1098 if (lpa & LPA_FIBER_1000HALF)
1099 result |= ADVERTISED_1000baseT_Half;
1100 if (lpa & LPA_FIBER_1000FULL)
1101 result |= ADVERTISED_1000baseT_Full;
1102
1103 return result;
1104}
1105
1106/**
1107 * marvell_update_link - update link status in real time in @phydev
1108 * @phydev: target phy_device struct
1109 *
1110 * Description: Update the value in phydev->link to reflect the
1111 * current link value.
1112 */
1113static int marvell_update_link(struct phy_device *phydev, int fiber)
1114{
1115 int status;
1116
1117 /* Use the generic register for copper link, or specific
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001118 * register for fiber case
1119 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001120 if (fiber) {
1121 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1122 if (status < 0)
1123 return status;
1124
1125 if ((status & REGISTER_LINK_STATUS) == 0)
1126 phydev->link = 0;
1127 else
1128 phydev->link = 1;
1129 } else {
1130 return genphy_update_link(phydev);
1131 }
1132
1133 return 0;
1134}
1135
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001136static int marvell_read_status_page_an(struct phy_device *phydev,
1137 int fiber)
1138{
1139 int status;
1140 int lpa;
1141 int lpagb;
1142 int adv;
1143
1144 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1145 if (status < 0)
1146 return status;
1147
1148 lpa = phy_read(phydev, MII_LPA);
1149 if (lpa < 0)
1150 return lpa;
1151
1152 lpagb = phy_read(phydev, MII_STAT1000);
1153 if (lpagb < 0)
1154 return lpagb;
1155
1156 adv = phy_read(phydev, MII_ADVERTISE);
1157 if (adv < 0)
1158 return adv;
1159
1160 lpa &= adv;
1161
1162 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1163 phydev->duplex = DUPLEX_FULL;
1164 else
1165 phydev->duplex = DUPLEX_HALF;
1166
1167 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1168 phydev->pause = 0;
1169 phydev->asym_pause = 0;
1170
1171 switch (status) {
1172 case MII_M1011_PHY_STATUS_1000:
1173 phydev->speed = SPEED_1000;
1174 break;
1175
1176 case MII_M1011_PHY_STATUS_100:
1177 phydev->speed = SPEED_100;
1178 break;
1179
1180 default:
1181 phydev->speed = SPEED_10;
1182 break;
1183 }
1184
1185 if (!fiber) {
1186 phydev->lp_advertising =
1187 mii_stat1000_to_ethtool_lpa_t(lpagb) |
1188 mii_lpa_to_ethtool_lpa_t(lpa);
1189
1190 if (phydev->duplex == DUPLEX_FULL) {
1191 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1192 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1193 }
1194 } else {
1195 /* The fiber link is only 1000M capable */
1196 phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
1197
1198 if (phydev->duplex == DUPLEX_FULL) {
1199 if (!(lpa & LPA_PAUSE_FIBER)) {
1200 phydev->pause = 0;
1201 phydev->asym_pause = 0;
1202 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1203 phydev->pause = 1;
1204 phydev->asym_pause = 1;
1205 } else {
1206 phydev->pause = 1;
1207 phydev->asym_pause = 0;
1208 }
1209 }
1210 }
1211 return 0;
1212}
1213
1214static int marvell_read_status_page_fixed(struct phy_device *phydev)
1215{
1216 int bmcr = phy_read(phydev, MII_BMCR);
1217
1218 if (bmcr < 0)
1219 return bmcr;
1220
1221 if (bmcr & BMCR_FULLDPLX)
1222 phydev->duplex = DUPLEX_FULL;
1223 else
1224 phydev->duplex = DUPLEX_HALF;
1225
1226 if (bmcr & BMCR_SPEED1000)
1227 phydev->speed = SPEED_1000;
1228 else if (bmcr & BMCR_SPEED100)
1229 phydev->speed = SPEED_100;
1230 else
1231 phydev->speed = SPEED_10;
1232
1233 phydev->pause = 0;
1234 phydev->asym_pause = 0;
1235 phydev->lp_advertising = 0;
1236
1237 return 0;
1238}
1239
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001240/* marvell_read_status_page
1241 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001242 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001243 * Check the link, then figure out the current state
1244 * by comparing what we advertise with what the link partner
1245 * advertises. Start by checking the gigabit possibilities,
1246 * then move on to 10/100.
1247 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001248static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001249{
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001250 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001251 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001252
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001253 /* Detect and update the link, but return if there
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001254 * was an error
1255 */
Andrew Lunn52295662017-05-25 21:42:08 +02001256 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001257 fiber = 1;
1258 else
1259 fiber = 0;
1260
1261 err = marvell_update_link(phydev, fiber);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001262 if (err)
1263 return err;
1264
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001265 if (phydev->autoneg == AUTONEG_ENABLE)
1266 err = marvell_read_status_page_an(phydev, fiber);
1267 else
1268 err = marvell_read_status_page_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001269
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001270 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001271}
1272
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001273/* marvell_read_status
1274 *
1275 * Some Marvell's phys have two modes: fiber and copper.
1276 * Both need status checked.
1277 * Description:
1278 * First, check the fiber link and status.
1279 * If the fiber link is down, check the copper link and status which
1280 * will be the default value if both link are down.
1281 */
1282static int marvell_read_status(struct phy_device *phydev)
1283{
1284 int err;
1285
1286 /* Check the fiber mode first */
Russell Kinga13c06522017-01-10 23:13:45 +00001287 if (phydev->supported & SUPPORTED_FIBRE &&
1288 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001289 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001290 if (err < 0)
1291 goto error;
1292
Andrew Lunn52295662017-05-25 21:42:08 +02001293 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001294 if (err < 0)
1295 goto error;
1296
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001297 /* If the fiber link is up, it is the selected and
1298 * used link. In this case, we need to stay in the
1299 * fiber page. Please to be careful about that, avoid
1300 * to restore Copper page in other functions which
1301 * could break the behaviour for some fiber phy like
1302 * 88E1512.
1303 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001304 if (phydev->link)
1305 return 0;
1306
1307 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001308 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001309 if (err < 0)
1310 goto error;
1311 }
1312
Andrew Lunn52295662017-05-25 21:42:08 +02001313 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001314
1315error:
Andrew Lunn52295662017-05-25 21:42:08 +02001316 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001317 return err;
1318}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001319
1320/* marvell_suspend
1321 *
1322 * Some Marvell's phys have two modes: fiber and copper.
1323 * Both need to be suspended
1324 */
1325static int marvell_suspend(struct phy_device *phydev)
1326{
1327 int err;
1328
1329 /* Suspend the fiber mode first */
1330 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001331 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001332 if (err < 0)
1333 goto error;
1334
1335 /* With the page set, use the generic suspend */
1336 err = genphy_suspend(phydev);
1337 if (err < 0)
1338 goto error;
1339
1340 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001341 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001342 if (err < 0)
1343 goto error;
1344 }
1345
1346 /* With the page set, use the generic suspend */
1347 return genphy_suspend(phydev);
1348
1349error:
Andrew Lunn52295662017-05-25 21:42:08 +02001350 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001351 return err;
1352}
1353
1354/* marvell_resume
1355 *
1356 * Some Marvell's phys have two modes: fiber and copper.
1357 * Both need to be resumed
1358 */
1359static int marvell_resume(struct phy_device *phydev)
1360{
1361 int err;
1362
1363 /* Resume the fiber mode first */
1364 if (!(phydev->supported & SUPPORTED_FIBRE)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001365 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001366 if (err < 0)
1367 goto error;
1368
1369 /* With the page set, use the generic resume */
1370 err = genphy_resume(phydev);
1371 if (err < 0)
1372 goto error;
1373
1374 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001375 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001376 if (err < 0)
1377 goto error;
1378 }
1379
1380 /* With the page set, use the generic resume */
1381 return genphy_resume(phydev);
1382
1383error:
Andrew Lunn52295662017-05-25 21:42:08 +02001384 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001385 return err;
1386}
1387
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001388static int marvell_aneg_done(struct phy_device *phydev)
1389{
1390 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001391
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001392 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1393}
1394
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001395static int m88e1121_did_interrupt(struct phy_device *phydev)
1396{
1397 int imask;
1398
1399 imask = phy_read(phydev, MII_M1011_IEVENT);
1400
1401 if (imask & MII_M1011_IMASK_INIT)
1402 return 1;
1403
1404 return 0;
1405}
1406
Andrew Lunn23beb382017-05-17 03:26:04 +02001407static void m88e1318_get_wol(struct phy_device *phydev,
1408 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001409{
1410 wol->supported = WAKE_MAGIC;
1411 wol->wolopts = 0;
1412
Andrew Lunn52295662017-05-25 21:42:08 +02001413 if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001414 return;
1415
1416 if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
1417 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1418 wol->wolopts |= WAKE_MAGIC;
1419
Andrew Lunn52295662017-05-25 21:42:08 +02001420 if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001421 return;
1422}
1423
Andrew Lunn23beb382017-05-17 03:26:04 +02001424static int m88e1318_set_wol(struct phy_device *phydev,
1425 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001426{
1427 int err, oldpage, temp;
1428
Andrew Lunn6427bb22017-05-17 03:26:03 +02001429 oldpage = marvell_get_page(phydev);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001430
1431 if (wol->wolopts & WAKE_MAGIC) {
1432 /* Explicitly switch to page 0x00, just to be sure */
Andrew Lunn52295662017-05-25 21:42:08 +02001433 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001434 if (err < 0)
1435 return err;
1436
1437 /* Enable the WOL interrupt */
1438 temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
1439 temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
1440 err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
1441 if (err < 0)
1442 return err;
1443
Andrew Lunn52295662017-05-25 21:42:08 +02001444 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001445 if (err < 0)
1446 return err;
1447
1448 /* Setup LED[2] as interrupt pin (active low) */
1449 temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
1450 temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
1451 temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
1452 temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
1453 err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
1454 if (err < 0)
1455 return err;
1456
Andrew Lunn52295662017-05-25 21:42:08 +02001457 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001458 if (err < 0)
1459 return err;
1460
1461 /* Store the device address for the magic packet */
1462 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1463 ((phydev->attached_dev->dev_addr[5] << 8) |
1464 phydev->attached_dev->dev_addr[4]));
1465 if (err < 0)
1466 return err;
1467 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1468 ((phydev->attached_dev->dev_addr[3] << 8) |
1469 phydev->attached_dev->dev_addr[2]));
1470 if (err < 0)
1471 return err;
1472 err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1473 ((phydev->attached_dev->dev_addr[1] << 8) |
1474 phydev->attached_dev->dev_addr[0]));
1475 if (err < 0)
1476 return err;
1477
1478 /* Clear WOL status and enable magic packet matching */
1479 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1480 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1481 temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1482 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1483 if (err < 0)
1484 return err;
1485 } else {
Andrew Lunn52295662017-05-25 21:42:08 +02001486 err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001487 if (err < 0)
1488 return err;
1489
1490 /* Clear WOL status and disable magic packet matching */
1491 temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1492 temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
1493 temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
1494 err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
1495 if (err < 0)
1496 return err;
1497 }
1498
Andrew Lunn6427bb22017-05-17 03:26:03 +02001499 err = marvell_set_page(phydev, oldpage);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001500 if (err < 0)
1501 return err;
1502
1503 return 0;
1504}
1505
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001506static int marvell_get_sset_count(struct phy_device *phydev)
1507{
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001508 if (phydev->supported & SUPPORTED_FIBRE)
1509 return ARRAY_SIZE(marvell_hw_stats);
1510 else
1511 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001512}
1513
1514static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1515{
1516 int i;
1517
1518 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1519 memcpy(data + i * ETH_GSTRING_LEN,
1520 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1521 }
1522}
1523
1524#ifndef UINT64_MAX
1525#define UINT64_MAX (u64)(~((u64)0))
1526#endif
1527static u64 marvell_get_stat(struct phy_device *phydev, int i)
1528{
1529 struct marvell_hw_stat stat = marvell_hw_stats[i];
1530 struct marvell_priv *priv = phydev->priv;
Andrew Lunn53798322017-05-25 21:42:07 +02001531 int oldpage, val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001532 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001533
Andrew Lunn53798322017-05-25 21:42:07 +02001534 oldpage = marvell_get_set_page(phydev, stat.page);
1535 if (oldpage < 0)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001536 return UINT64_MAX;
1537
1538 val = phy_read(phydev, stat.reg);
1539 if (val < 0) {
Andrew Lunn321b4d42016-02-20 00:35:29 +01001540 ret = UINT64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001541 } else {
1542 val = val & ((1 << stat.bits) - 1);
1543 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001544 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001545 }
1546
Andrew Lunn6427bb22017-05-17 03:26:03 +02001547 marvell_set_page(phydev, oldpage);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001548
Andrew Lunn321b4d42016-02-20 00:35:29 +01001549 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001550}
1551
1552static void marvell_get_stats(struct phy_device *phydev,
1553 struct ethtool_stats *stats, u64 *data)
1554{
1555 int i;
1556
1557 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1558 data[i] = marvell_get_stat(phydev, i);
1559}
1560
Andrew Lunn0b046802017-01-20 01:37:49 +01001561#ifdef CONFIG_HWMON
1562static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1563{
Andrew Lunn975b3882017-05-25 21:42:06 +02001564 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001565 int ret;
1566 int val;
1567
1568 *temp = 0;
1569
1570 mutex_lock(&phydev->lock);
1571
Andrew Lunn52295662017-05-25 21:42:08 +02001572 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001573 if (oldpage < 0) {
1574 mutex_unlock(&phydev->lock);
1575 return oldpage;
1576 }
1577
Andrew Lunn0b046802017-01-20 01:37:49 +01001578 /* Enable temperature sensor */
1579 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1580 if (ret < 0)
1581 goto error;
1582
1583 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1584 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1585 if (ret < 0)
1586 goto error;
1587
1588 /* Wait for temperature to stabilize */
1589 usleep_range(10000, 12000);
1590
1591 val = phy_read(phydev, MII_88E1121_MISC_TEST);
1592 if (val < 0) {
1593 ret = val;
1594 goto error;
1595 }
1596
1597 /* Disable temperature sensor */
1598 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1599 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1600 if (ret < 0)
1601 goto error;
1602
1603 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1604
1605error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001606 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001607 mutex_unlock(&phydev->lock);
1608
1609 return ret;
1610}
1611
1612static int m88e1121_hwmon_read(struct device *dev,
1613 enum hwmon_sensor_types type,
1614 u32 attr, int channel, long *temp)
1615{
1616 struct phy_device *phydev = dev_get_drvdata(dev);
1617 int err;
1618
1619 switch (attr) {
1620 case hwmon_temp_input:
1621 err = m88e1121_get_temp(phydev, temp);
1622 break;
1623 default:
1624 return -EOPNOTSUPP;
1625 }
1626
1627 return err;
1628}
1629
1630static umode_t m88e1121_hwmon_is_visible(const void *data,
1631 enum hwmon_sensor_types type,
1632 u32 attr, int channel)
1633{
1634 if (type != hwmon_temp)
1635 return 0;
1636
1637 switch (attr) {
1638 case hwmon_temp_input:
1639 return 0444;
1640 default:
1641 return 0;
1642 }
1643}
1644
1645static u32 m88e1121_hwmon_chip_config[] = {
1646 HWMON_C_REGISTER_TZ,
1647 0
1648};
1649
1650static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1651 .type = hwmon_chip,
1652 .config = m88e1121_hwmon_chip_config,
1653};
1654
1655static u32 m88e1121_hwmon_temp_config[] = {
1656 HWMON_T_INPUT,
1657 0
1658};
1659
1660static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1661 .type = hwmon_temp,
1662 .config = m88e1121_hwmon_temp_config,
1663};
1664
1665static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1666 &m88e1121_hwmon_chip,
1667 &m88e1121_hwmon_temp,
1668 NULL
1669};
1670
1671static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1672 .is_visible = m88e1121_hwmon_is_visible,
1673 .read = m88e1121_hwmon_read,
1674};
1675
1676static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1677 .ops = &m88e1121_hwmon_hwmon_ops,
1678 .info = m88e1121_hwmon_info,
1679};
1680
1681static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1682{
Andrew Lunn975b3882017-05-25 21:42:06 +02001683 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001684 int ret;
1685
1686 *temp = 0;
1687
1688 mutex_lock(&phydev->lock);
1689
Andrew Lunn52295662017-05-25 21:42:08 +02001690 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001691 if (oldpage < 0) {
1692 mutex_unlock(&phydev->lock);
1693 return oldpage;
1694 }
1695
Andrew Lunn0b046802017-01-20 01:37:49 +01001696 ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
1697 if (ret < 0)
1698 goto error;
1699
1700 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1701
1702error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001703 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001704 mutex_unlock(&phydev->lock);
1705
1706 return ret;
1707}
1708
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001709static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001710{
Andrew Lunn975b3882017-05-25 21:42:06 +02001711 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001712 int ret;
1713
1714 *temp = 0;
1715
1716 mutex_lock(&phydev->lock);
Andrew Lunn53798322017-05-25 21:42:07 +02001717
Andrew Lunn52295662017-05-25 21:42:08 +02001718 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001719 if (oldpage < 0) {
1720 mutex_unlock(&phydev->lock);
1721 return oldpage;
1722 }
Andrew Lunn0b046802017-01-20 01:37:49 +01001723
Andrew Lunn0b046802017-01-20 01:37:49 +01001724 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1725 if (ret < 0)
1726 goto error;
1727
1728 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1729 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1730 /* convert to mC */
1731 *temp *= 1000;
1732
1733error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001734 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001735 mutex_unlock(&phydev->lock);
1736
1737 return ret;
1738}
1739
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001740static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001741{
Andrew Lunn975b3882017-05-25 21:42:06 +02001742 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001743 int ret;
1744
1745 mutex_lock(&phydev->lock);
1746
Andrew Lunn52295662017-05-25 21:42:08 +02001747 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001748 if (oldpage < 0) {
1749 mutex_unlock(&phydev->lock);
1750 return oldpage;
1751 }
1752
Andrew Lunn0b046802017-01-20 01:37:49 +01001753 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1754 if (ret < 0)
1755 goto error;
1756
1757 temp = temp / 1000;
1758 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1759 ret = phy_write(phydev, MII_88E1121_MISC_TEST,
1760 (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
1761 (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
1762
1763error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001764 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001765 mutex_unlock(&phydev->lock);
1766
1767 return ret;
1768}
1769
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001770static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001771{
Andrew Lunn975b3882017-05-25 21:42:06 +02001772 int oldpage;
Andrew Lunn0b046802017-01-20 01:37:49 +01001773 int ret;
1774
1775 *alarm = false;
1776
1777 mutex_lock(&phydev->lock);
1778
Andrew Lunn52295662017-05-25 21:42:08 +02001779 oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
Andrew Lunn975b3882017-05-25 21:42:06 +02001780 if (oldpage < 0) {
1781 mutex_unlock(&phydev->lock);
1782 return oldpage;
1783 }
1784
Andrew Lunn0b046802017-01-20 01:37:49 +01001785 ret = phy_read(phydev, MII_88E1121_MISC_TEST);
1786 if (ret < 0)
1787 goto error;
1788 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1789
1790error:
Andrew Lunn975b3882017-05-25 21:42:06 +02001791 marvell_set_page(phydev, oldpage);
Andrew Lunn0b046802017-01-20 01:37:49 +01001792 mutex_unlock(&phydev->lock);
1793
1794 return ret;
1795}
1796
1797static int m88e1510_hwmon_read(struct device *dev,
1798 enum hwmon_sensor_types type,
1799 u32 attr, int channel, long *temp)
1800{
1801 struct phy_device *phydev = dev_get_drvdata(dev);
1802 int err;
1803
1804 switch (attr) {
1805 case hwmon_temp_input:
1806 err = m88e1510_get_temp(phydev, temp);
1807 break;
1808 case hwmon_temp_crit:
1809 err = m88e1510_get_temp_critical(phydev, temp);
1810 break;
1811 case hwmon_temp_max_alarm:
1812 err = m88e1510_get_temp_alarm(phydev, temp);
1813 break;
1814 default:
1815 return -EOPNOTSUPP;
1816 }
1817
1818 return err;
1819}
1820
1821static int m88e1510_hwmon_write(struct device *dev,
1822 enum hwmon_sensor_types type,
1823 u32 attr, int channel, long temp)
1824{
1825 struct phy_device *phydev = dev_get_drvdata(dev);
1826 int err;
1827
1828 switch (attr) {
1829 case hwmon_temp_crit:
1830 err = m88e1510_set_temp_critical(phydev, temp);
1831 break;
1832 default:
1833 return -EOPNOTSUPP;
1834 }
1835 return err;
1836}
1837
1838static umode_t m88e1510_hwmon_is_visible(const void *data,
1839 enum hwmon_sensor_types type,
1840 u32 attr, int channel)
1841{
1842 if (type != hwmon_temp)
1843 return 0;
1844
1845 switch (attr) {
1846 case hwmon_temp_input:
1847 case hwmon_temp_max_alarm:
1848 return 0444;
1849 case hwmon_temp_crit:
1850 return 0644;
1851 default:
1852 return 0;
1853 }
1854}
1855
1856static u32 m88e1510_hwmon_temp_config[] = {
1857 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1858 0
1859};
1860
1861static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1862 .type = hwmon_temp,
1863 .config = m88e1510_hwmon_temp_config,
1864};
1865
1866static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1867 &m88e1121_hwmon_chip,
1868 &m88e1510_hwmon_temp,
1869 NULL
1870};
1871
1872static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1873 .is_visible = m88e1510_hwmon_is_visible,
1874 .read = m88e1510_hwmon_read,
1875 .write = m88e1510_hwmon_write,
1876};
1877
1878static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1879 .ops = &m88e1510_hwmon_hwmon_ops,
1880 .info = m88e1510_hwmon_info,
1881};
1882
1883static int marvell_hwmon_name(struct phy_device *phydev)
1884{
1885 struct marvell_priv *priv = phydev->priv;
1886 struct device *dev = &phydev->mdio.dev;
1887 const char *devname = dev_name(dev);
1888 size_t len = strlen(devname);
1889 int i, j;
1890
1891 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1892 if (!priv->hwmon_name)
1893 return -ENOMEM;
1894
1895 for (i = j = 0; i < len && devname[i]; i++) {
1896 if (isalnum(devname[i]))
1897 priv->hwmon_name[j++] = devname[i];
1898 }
1899
1900 return 0;
1901}
1902
1903static int marvell_hwmon_probe(struct phy_device *phydev,
1904 const struct hwmon_chip_info *chip)
1905{
1906 struct marvell_priv *priv = phydev->priv;
1907 struct device *dev = &phydev->mdio.dev;
1908 int err;
1909
1910 err = marvell_hwmon_name(phydev);
1911 if (err)
1912 return err;
1913
1914 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1915 dev, priv->hwmon_name, phydev, chip, NULL);
1916
1917 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1918}
1919
1920static int m88e1121_hwmon_probe(struct phy_device *phydev)
1921{
1922 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1923}
1924
1925static int m88e1510_hwmon_probe(struct phy_device *phydev)
1926{
1927 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1928}
1929#else
1930static int m88e1121_hwmon_probe(struct phy_device *phydev)
1931{
1932 return 0;
1933}
1934
1935static int m88e1510_hwmon_probe(struct phy_device *phydev)
1936{
1937 return 0;
1938}
1939#endif
1940
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001941static int marvell_probe(struct phy_device *phydev)
1942{
1943 struct marvell_priv *priv;
1944
Andrew Lunne5a03bf2016-01-06 20:11:16 +01001945 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001946 if (!priv)
1947 return -ENOMEM;
1948
1949 phydev->priv = priv;
1950
1951 return 0;
1952}
1953
Andrew Lunn0b046802017-01-20 01:37:49 +01001954static int m88e1121_probe(struct phy_device *phydev)
1955{
1956 int err;
1957
1958 err = marvell_probe(phydev);
1959 if (err)
1960 return err;
1961
1962 return m88e1121_hwmon_probe(phydev);
1963}
1964
1965static int m88e1510_probe(struct phy_device *phydev)
1966{
1967 int err;
1968
1969 err = marvell_probe(phydev);
1970 if (err)
1971 return err;
1972
1973 return m88e1510_hwmon_probe(phydev);
1974}
1975
Olof Johanssone5479232007-07-03 16:23:46 -05001976static struct phy_driver marvell_drivers[] = {
1977 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001978 .phy_id = MARVELL_PHY_ID_88E1101,
1979 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05001980 .name = "Marvell 88E1101",
1981 .features = PHY_GBIT_FEATURES,
1982 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01001983 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01001984 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02001985 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05001986 .read_status = &genphy_read_status,
1987 .ack_interrupt = &marvell_ack_interrupt,
1988 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01001989 .resume = &genphy_resume,
1990 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001991 .get_sset_count = marvell_get_sset_count,
1992 .get_strings = marvell_get_strings,
1993 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05001994 },
1995 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001996 .phy_id = MARVELL_PHY_ID_88E1112,
1997 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05001998 .name = "Marvell 88E1112",
1999 .features = PHY_GBIT_FEATURES,
2000 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002001 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05002002 .config_init = &m88e1111_config_init,
2003 .config_aneg = &marvell_config_aneg,
2004 .read_status = &genphy_read_status,
2005 .ack_interrupt = &marvell_ack_interrupt,
2006 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002007 .resume = &genphy_resume,
2008 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002009 .get_sset_count = marvell_get_sset_count,
2010 .get_strings = marvell_get_strings,
2011 .get_stats = marvell_get_stats,
Olof Johansson85cfb532007-07-03 16:24:32 -05002012 },
2013 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002014 .phy_id = MARVELL_PHY_ID_88E1111,
2015 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002016 .name = "Marvell 88E1111",
2017 .features = PHY_GBIT_FEATURES,
2018 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002019 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002020 .config_init = &m88e1111_config_init,
Harini Katakam3ec0a0f2016-06-27 13:09:59 +05302021 .config_aneg = &m88e1111_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002022 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002023 .ack_interrupt = &marvell_ack_interrupt,
2024 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002025 .resume = &genphy_resume,
2026 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002027 .get_sset_count = marvell_get_sset_count,
2028 .get_strings = marvell_get_strings,
2029 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002030 },
2031 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002032 .phy_id = MARVELL_PHY_ID_88E1118,
2033 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002034 .name = "Marvell 88E1118",
2035 .features = PHY_GBIT_FEATURES,
2036 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002037 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002038 .config_init = &m88e1118_config_init,
2039 .config_aneg = &m88e1118_config_aneg,
2040 .read_status = &genphy_read_status,
2041 .ack_interrupt = &marvell_ack_interrupt,
2042 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002043 .resume = &genphy_resume,
2044 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002045 .get_sset_count = marvell_get_sset_count,
2046 .get_strings = marvell_get_strings,
2047 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002048 },
2049 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002050 .phy_id = MARVELL_PHY_ID_88E1121R,
2051 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002052 .name = "Marvell 88E1121R",
2053 .features = PHY_GBIT_FEATURES,
2054 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002055 .probe = &m88e1121_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002056 .config_init = &m88e1121_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002057 .config_aneg = &m88e1121_config_aneg,
2058 .read_status = &marvell_read_status,
2059 .ack_interrupt = &marvell_ack_interrupt,
2060 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002061 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002062 .resume = &genphy_resume,
2063 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002064 .get_sset_count = marvell_get_sset_count,
2065 .get_strings = marvell_get_strings,
2066 .get_stats = marvell_get_stats,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002067 },
2068 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002069 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002070 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002071 .name = "Marvell 88E1318S",
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002072 .features = PHY_GBIT_FEATURES,
2073 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002074 .probe = marvell_probe,
Clemens Gruberfdecf362016-06-11 17:21:26 +02002075 .config_init = &m88e1121_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002076 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002077 .read_status = &marvell_read_status,
2078 .ack_interrupt = &marvell_ack_interrupt,
2079 .config_intr = &marvell_config_intr,
2080 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002081 .get_wol = &m88e1318_get_wol,
2082 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002083 .resume = &genphy_resume,
2084 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002085 .get_sset_count = marvell_get_sset_count,
2086 .get_strings = marvell_get_strings,
2087 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002088 },
2089 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002090 .phy_id = MARVELL_PHY_ID_88E1145,
2091 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002092 .name = "Marvell 88E1145",
2093 .features = PHY_GBIT_FEATURES,
2094 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002095 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002096 .config_init = &m88e1145_config_init,
2097 .config_aneg = &marvell_config_aneg,
2098 .read_status = &genphy_read_status,
2099 .ack_interrupt = &marvell_ack_interrupt,
2100 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002101 .resume = &genphy_resume,
2102 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002103 .get_sset_count = marvell_get_sset_count,
2104 .get_strings = marvell_get_strings,
2105 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002106 },
2107 {
David Daney90600732010-11-19 11:58:53 +00002108 .phy_id = MARVELL_PHY_ID_88E1149R,
2109 .phy_id_mask = MARVELL_PHY_ID_MASK,
2110 .name = "Marvell 88E1149R",
2111 .features = PHY_GBIT_FEATURES,
2112 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002113 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002114 .config_init = &m88e1149_config_init,
2115 .config_aneg = &m88e1118_config_aneg,
2116 .read_status = &genphy_read_status,
2117 .ack_interrupt = &marvell_ack_interrupt,
2118 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002119 .resume = &genphy_resume,
2120 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002121 .get_sset_count = marvell_get_sset_count,
2122 .get_strings = marvell_get_strings,
2123 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002124 },
2125 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002126 .phy_id = MARVELL_PHY_ID_88E1240,
2127 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002128 .name = "Marvell 88E1240",
2129 .features = PHY_GBIT_FEATURES,
2130 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002131 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002132 .config_init = &m88e1111_config_init,
2133 .config_aneg = &marvell_config_aneg,
2134 .read_status = &genphy_read_status,
2135 .ack_interrupt = &marvell_ack_interrupt,
2136 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002137 .resume = &genphy_resume,
2138 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002139 .get_sset_count = marvell_get_sset_count,
2140 .get_strings = marvell_get_strings,
2141 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002142 },
Michal Simek3da09a52013-05-30 20:08:26 +00002143 {
2144 .phy_id = MARVELL_PHY_ID_88E1116R,
2145 .phy_id_mask = MARVELL_PHY_ID_MASK,
2146 .name = "Marvell 88E1116R",
2147 .features = PHY_GBIT_FEATURES,
2148 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002149 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002150 .config_init = &m88e1116r_config_init,
2151 .config_aneg = &genphy_config_aneg,
2152 .read_status = &genphy_read_status,
2153 .ack_interrupt = &marvell_ack_interrupt,
2154 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002155 .resume = &genphy_resume,
2156 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002157 .get_sset_count = marvell_get_sset_count,
2158 .get_strings = marvell_get_strings,
2159 .get_stats = marvell_get_stats,
Michal Simek3da09a52013-05-30 20:08:26 +00002160 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002161 {
2162 .phy_id = MARVELL_PHY_ID_88E1510,
2163 .phy_id_mask = MARVELL_PHY_ID_MASK,
2164 .name = "Marvell 88E1510",
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02002165 .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
Arnd Bergmann18702412017-01-23 13:18:41 +01002166 .flags = PHY_HAS_INTERRUPT,
Andrew Lunn0b046802017-01-20 01:37:49 +01002167 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002168 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002169 .config_aneg = &m88e1510_config_aneg,
2170 .read_status = &marvell_read_status,
2171 .ack_interrupt = &marvell_ack_interrupt,
2172 .config_intr = &marvell_config_intr,
2173 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002174 .get_wol = &m88e1318_get_wol,
2175 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002176 .resume = &marvell_resume,
2177 .suspend = &marvell_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002178 .get_sset_count = marvell_get_sset_count,
2179 .get_strings = marvell_get_strings,
2180 .get_stats = marvell_get_stats,
Michal Simek10e24caa2013-05-30 20:08:27 +00002181 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002182 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002183 .phy_id = MARVELL_PHY_ID_88E1540,
2184 .phy_id_mask = MARVELL_PHY_ID_MASK,
2185 .name = "Marvell 88E1540",
2186 .features = PHY_GBIT_FEATURES,
2187 .flags = PHY_HAS_INTERRUPT,
Arnd Bergmann18702412017-01-23 13:18:41 +01002188 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002189 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002190 .config_aneg = &m88e1510_config_aneg,
2191 .read_status = &marvell_read_status,
2192 .ack_interrupt = &marvell_ack_interrupt,
2193 .config_intr = &marvell_config_intr,
2194 .did_interrupt = &m88e1121_did_interrupt,
2195 .resume = &genphy_resume,
2196 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002197 .get_sset_count = marvell_get_sset_count,
2198 .get_strings = marvell_get_strings,
2199 .get_stats = marvell_get_stats,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002200 },
2201 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002202 .phy_id = MARVELL_PHY_ID_88E1545,
2203 .phy_id_mask = MARVELL_PHY_ID_MASK,
2204 .name = "Marvell 88E1545",
2205 .probe = m88e1510_probe,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002206 .features = PHY_GBIT_FEATURES,
2207 .flags = PHY_HAS_INTERRUPT,
2208 .config_init = &marvell_config_init,
2209 .config_aneg = &m88e1510_config_aneg,
2210 .read_status = &marvell_read_status,
2211 .ack_interrupt = &marvell_ack_interrupt,
2212 .config_intr = &marvell_config_intr,
2213 .did_interrupt = &m88e1121_did_interrupt,
2214 .resume = &genphy_resume,
2215 .suspend = &genphy_suspend,
2216 .get_sset_count = marvell_get_sset_count,
2217 .get_strings = marvell_get_strings,
2218 .get_stats = marvell_get_stats,
2219 },
2220 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002221 .phy_id = MARVELL_PHY_ID_88E3016,
2222 .phy_id_mask = MARVELL_PHY_ID_MASK,
2223 .name = "Marvell 88E3016",
2224 .features = PHY_BASIC_FEATURES,
2225 .flags = PHY_HAS_INTERRUPT,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002226 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002227 .config_aneg = &genphy_config_aneg,
2228 .config_init = &m88e3016_config_init,
2229 .aneg_done = &marvell_aneg_done,
2230 .read_status = &marvell_read_status,
2231 .ack_interrupt = &marvell_ack_interrupt,
2232 .config_intr = &marvell_config_intr,
2233 .did_interrupt = &m88e1121_did_interrupt,
2234 .resume = &genphy_resume,
2235 .suspend = &genphy_suspend,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002236 .get_sset_count = marvell_get_sset_count,
2237 .get_strings = marvell_get_strings,
2238 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002239 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002240 {
2241 .phy_id = MARVELL_PHY_ID_88E6390,
2242 .phy_id_mask = MARVELL_PHY_ID_MASK,
2243 .name = "Marvell 88E6390",
2244 .features = PHY_GBIT_FEATURES,
2245 .flags = PHY_HAS_INTERRUPT,
2246 .probe = m88e1510_probe,
2247 .config_init = &marvell_config_init,
2248 .config_aneg = &m88e1510_config_aneg,
2249 .read_status = &marvell_read_status,
2250 .ack_interrupt = &marvell_ack_interrupt,
2251 .config_intr = &marvell_config_intr,
2252 .did_interrupt = &m88e1121_did_interrupt,
2253 .resume = &genphy_resume,
2254 .suspend = &genphy_suspend,
2255 .get_sset_count = marvell_get_sset_count,
2256 .get_strings = marvell_get_strings,
2257 .get_stats = marvell_get_stats,
2258 },
Andy Fleming00db8182005-07-30 19:31:23 -04002259};
2260
Johan Hovold50fd7152014-11-11 19:45:59 +01002261module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002262
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002263static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002264 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2265 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2266 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2267 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2268 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2269 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2270 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2271 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2272 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002273 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002274 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002275 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002276 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002277 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002278 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002279 { }
2280};
2281
2282MODULE_DEVICE_TABLE(mdio, marvell_tbl);