blob: 29a02720b5c94aebbee3202b9fefa08e349b566b [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053059#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#define FM_GPIO 83
61
62enum {
63 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
64 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
65 /* SURF expander */
66 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
67 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
68 GPIO_WLAN_EXT_POR_N,
69 GPIO_DISPLAY_PWR_EN,
70 GPIO_BACKLIGHT_EN,
71 GPIO_PRESSURE_XCLR,
72 GPIO_VREG_S3_EXP,
73 GPIO_UBM2M_PWRDWN,
74 GPIO_ETM_MODE_CS_N,
75 GPIO_HOST_VBUS_EN,
76 GPIO_SPI_MOSI,
77 GPIO_SPI_MISO,
78 GPIO_SPI_CLK,
79 GPIO_SPI_CS0_N,
80 GPIO_CORE_EXPANDER_IO13,
81 GPIO_CORE_EXPANDER_IO14,
82 GPIO_CORE_EXPANDER_IO15,
83 /* Camera expander */
84 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
85 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
86 GPIO_CAM_GP_AFBUSY,
87 GPIO_CAM_GP_CAM_PWDN,
88 GPIO_CAM_GP_CAM1MP_XCLR,
89 GPIO_CAM_GP_CAMIF_RESET_N,
90 GPIO_CAM_GP_STROBE_CE,
91 GPIO_CAM_GP_LED_EN1,
92 GPIO_CAM_GP_LED_EN2,
93};
94
95#if defined(CONFIG_GPIO_SX150X)
96enum {
97 SX150X_CORE,
98 SX150X_CAM,
99};
100
101static struct sx150x_platform_data sx150x_data[] __initdata = {
102 [SX150X_CORE] = {
103 .gpio_base = GPIO_CORE_EXPANDER_BASE,
104 .oscio_is_gpo = false,
105 .io_pullup_ena = 0,
106 .io_pulldn_ena = 0,
107 .io_open_drain_ena = 0xfef8,
108 .irq_summary = -1,
109 },
110 [SX150X_CAM] = {
111 .gpio_base = GPIO_CAM_EXPANDER_BASE,
112 .oscio_is_gpo = false,
113 .io_pullup_ena = 0,
114 .io_pulldn_ena = 0,
115 .io_open_drain_ena = 0x23,
116 .irq_summary = -1,
117 },
118};
119#endif
120
121#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
122
123 /* FM Platform power and shutdown routines */
124#define FPGA_MSM_CNTRL_REG2 0x90008010
125static void config_pcm_i2s_mode(int mode)
126{
127 void __iomem *cfg_ptr;
128 u8 reg2;
129
130 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
131
132 if (!cfg_ptr)
133 return;
134 if (mode) {
135 /*enable the pcm mode in FPGA*/
136 reg2 = readb_relaxed(cfg_ptr);
137 if (reg2 == 0) {
138 reg2 = 1;
139 writeb_relaxed(reg2, cfg_ptr);
140 }
141 } else {
142 /*enable i2s mode in FPGA*/
143 reg2 = readb_relaxed(cfg_ptr);
144 if (reg2 == 1) {
145 reg2 = 0;
146 writeb_relaxed(reg2, cfg_ptr);
147 }
148 }
149 iounmap(cfg_ptr);
150}
151
152static unsigned fm_i2s_config_power_on[] = {
153 /*FM_I2S_SD*/
154 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
155 /*FM_I2S_WS*/
156 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_SCK*/
158 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159};
160
161static unsigned fm_i2s_config_power_off[] = {
162 /*FM_I2S_SD*/
163 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
164 /*FM_I2S_WS*/
165 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_SCK*/
167 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168};
169
170static unsigned bt_config_power_on[] = {
171 /*RFR*/
172 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
173 /*CTS*/
174 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*RX*/
176 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*TX*/
178 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179};
180static unsigned bt_config_pcm_on[] = {
181 /*PCM_DOUT*/
182 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
183 /*PCM_DIN*/
184 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_SYNC*/
186 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_CLK*/
188 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189};
190static unsigned bt_config_power_off[] = {
191 /*RFR*/
192 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
193 /*CTS*/
194 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*RX*/
196 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*TX*/
198 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199};
200static unsigned bt_config_pcm_off[] = {
201 /*PCM_DOUT*/
202 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
203 /*PCM_DIN*/
204 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_SYNC*/
206 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_CLK*/
208 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209};
210
211static int config_i2s(int mode)
212{
213 int pin, rc = 0;
214
215 if (mode == FM_I2S_ON) {
216 if (machine_is_msm7x27a_surf())
217 config_pcm_i2s_mode(0);
218 pr_err("%s mode = FM_I2S_ON", __func__);
219 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
220 pin++) {
221 rc = gpio_tlmm_config(
222 fm_i2s_config_power_on[pin],
223 GPIO_CFG_ENABLE
224 );
225 if (rc < 0)
226 return rc;
227 }
228 } else if (mode == FM_I2S_OFF) {
229 pr_err("%s mode = FM_I2S_OFF", __func__);
230 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
231 pin++) {
232 rc = gpio_tlmm_config(
233 fm_i2s_config_power_off[pin],
234 GPIO_CFG_ENABLE
235 );
236 if (rc < 0)
237 return rc;
238 }
239 }
240 return rc;
241}
242static int config_pcm(int mode)
243{
244 int pin, rc = 0;
245
246 if (mode == BT_PCM_ON) {
247 if (machine_is_msm7x27a_surf())
248 config_pcm_i2s_mode(1);
249 pr_err("%s mode =BT_PCM_ON", __func__);
250 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
251 pin++) {
252 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
253 GPIO_CFG_ENABLE);
254 if (rc < 0)
255 return rc;
256 }
257 } else if (mode == BT_PCM_OFF) {
258 pr_err("%s mode =BT_PCM_OFF", __func__);
259 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
260 pin++) {
261 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
262 GPIO_CFG_ENABLE);
263 if (rc < 0)
264 return rc;
265 }
266
267 }
268
269 return rc;
270}
271
272static int msm_bahama_setup_pcm_i2s(int mode)
273{
274 int fm_state = 0, bt_state = 0;
275 int rc = 0;
276 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
277
278 fm_state = marimba_get_fm_status(&config);
279 bt_state = marimba_get_bt_status(&config);
280
281 switch (mode) {
282 case BT_PCM_ON:
283 case BT_PCM_OFF:
284 if (!fm_state)
285 rc = config_pcm(mode);
286 break;
287 case FM_I2S_ON:
288 rc = config_i2s(mode);
289 break;
290 case FM_I2S_OFF:
291 if (bt_state)
292 rc = config_pcm(BT_PCM_ON);
293 else
294 rc = config_i2s(mode);
295 break;
296 default:
297 rc = -EIO;
298 pr_err("%s:Unsupported mode", __func__);
299 }
300 return rc;
301}
302
Rahul Kashyap181d5552011-07-07 10:39:23 +0530303static int bt_set_gpio(int on)
304{
305 int rc = 0;
306 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
307
308 if (on) {
309 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
310 msleep(100);
311 } else {
312 if (!marimba_get_fm_status(&config) &&
313 !marimba_get_bt_status(&config)) {
314 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
315 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
316 msleep(100);
317 }
318 }
319 if (rc)
320 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
321
322 return rc;
323}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324static struct vreg *fm_regulator;
325static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
326{
327 int rc = 0;
328 const char *id = "FMPW";
329 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530330 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
331 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700332
333 /* Voting for 1.8V Regulator */
334 fm_regulator = vreg_get(NULL , "msme1");
335 if (IS_ERR(fm_regulator)) {
336 pr_err("%s: vreg get failed with : (%ld)\n",
337 __func__, PTR_ERR(fm_regulator));
338 return -EINVAL;
339 }
340
341 /* Set the voltage level to 1.8V */
342 rc = vreg_set_level(fm_regulator, 1800);
343 if (rc < 0) {
344 pr_err("%s: set regulator level failed with :(%d)\n",
345 __func__, rc);
346 goto fm_vreg_fail;
347 }
348
349 /* Enabling the 1.8V regulator */
350 rc = vreg_enable(fm_regulator);
351 if (rc) {
352 pr_err("%s: enable regulator failed with :(%d)\n",
353 __func__, rc);
354 goto fm_vreg_fail;
355 }
356
357 /* Voting for 19.2MHz clock */
358 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
359 PMAPP_CLOCK_VOTE_ON);
360 if (rc < 0) {
361 pr_err("%s: clock vote failed with :(%d)\n",
362 __func__, rc);
363 goto fm_clock_vote_fail;
364 }
365
Rahul Kashyap181d5552011-07-07 10:39:23 +0530366 rc = bt_set_gpio(1);
367 if (rc) {
368 pr_err("%s: bt_set_gpio = %d", __func__, rc);
369 goto fm_gpio_config_fail;
370 }
371 /*re-write FM Slave Id, after reset*/
372 value = BAHAMA_SLAVE_ID_FM_ADDR;
373 rc = marimba_write_bit_mask(&config,
374 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
375 if (rc < 0) {
376 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
377 goto fm_gpio_config_fail;
378 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700379 /* Configuring the FM GPIO */
380 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
381 GPIO_CFG_2MA);
382
383 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
384 if (rc) {
385 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
386 __func__, irqcfg, rc);
387 goto fm_gpio_config_fail;
388 }
389
390 return 0;
391
392fm_gpio_config_fail:
393 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
394 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530395 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700396fm_clock_vote_fail:
397 vreg_disable(fm_regulator);
398
399fm_vreg_fail:
400 vreg_put(fm_regulator);
401
402 return rc;
403};
404
405static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
406{
407 int rc;
408 const char *id = "FMPW";
409
410 /* Releasing the GPIO line used by FM */
411 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
412 GPIO_CFG_2MA);
413
414 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
415 if (rc)
416 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
417 __func__, irqcfg, rc);
418
419 /* Releasing the 1.8V Regulator */
420 if (fm_regulator != NULL) {
421 rc = vreg_disable(fm_regulator);
422
423 if (rc)
424 pr_err("%s: disable regulator failed:(%d)\n",
425 __func__, rc);
426 fm_regulator = NULL;
427 }
428
429 /* Voting off the clock */
430 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
431 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700432 if (rc < 0)
433 pr_err("%s: voting off failed with :(%d)\n",
434 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530435 rc = bt_set_gpio(0);
436 if (rc)
437 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438}
439
440static struct marimba_fm_platform_data marimba_fm_pdata = {
441 .fm_setup = fm_radio_setup,
442 .fm_shutdown = fm_radio_shutdown,
443 .irq = MSM_GPIO_TO_INT(FM_GPIO),
444 .vreg_s2 = NULL,
445 .vreg_xo_out = NULL,
446 /* Configuring the FM SoC as I2S Master */
447 .is_fm_soc_i2s_master = true,
448 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
449};
450
451static struct platform_device msm_bt_power_device = {
452 .name = "bt_power",
453};
454 struct bahama_config_register {
455 u8 reg;
456 u8 value;
457 u8 mask;
458 };
459static const char * const vregs_bahama_name[] = {
460 "msme1",
461 "bt",
462};
463static struct vreg *vregs_bahama[ARRAY_SIZE(vregs_bahama_name)];
464
465static int bahama_bt(int on)
466{
467
468 int rc = 0;
469 int i;
470
471 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
472
473 struct bahama_variant_register {
474 const size_t size;
475 const struct bahama_config_register *set;
476 };
477
478 const struct bahama_config_register *p;
479
480 u8 version;
481
482 const struct bahama_config_register v10_bt_on[] = {
483 { 0xE9, 0x00, 0xFF },
484 { 0xF4, 0x80, 0xFF },
485 { 0xE4, 0x00, 0xFF },
486 { 0xE5, 0x00, 0x0F },
487#ifdef CONFIG_WLAN
488 { 0xE6, 0x38, 0x7F },
489 { 0xE7, 0x06, 0xFF },
490#endif
491 { 0xE9, 0x21, 0xFF },
492 { 0x01, 0x0C, 0x1F },
493 { 0x01, 0x08, 0x1F },
494 };
495
496 const struct bahama_config_register v20_bt_on_fm_off[] = {
497 { 0x11, 0x0C, 0xFF },
498 { 0x13, 0x01, 0xFF },
499 { 0xF4, 0x80, 0xFF },
500 { 0xF0, 0x00, 0xFF },
501 { 0xE9, 0x00, 0xFF },
502#ifdef CONFIG_WLAN
503 { 0x81, 0x00, 0x7F },
504 { 0x82, 0x00, 0xFF },
505 { 0xE6, 0x38, 0x7F },
506 { 0xE7, 0x06, 0xFF },
507#endif
508 { 0x8E, 0x15, 0xFF },
509 { 0x8F, 0x15, 0xFF },
510 { 0x90, 0x15, 0xFF },
511
512 { 0xE9, 0x21, 0xFF },
513 };
514
515 const struct bahama_config_register v20_bt_on_fm_on[] = {
516 { 0x11, 0x0C, 0xFF },
517 { 0x13, 0x01, 0xFF },
518 { 0xF4, 0x86, 0xFF },
519 { 0xF0, 0x06, 0xFF },
520 { 0xE9, 0x00, 0xFF },
521#ifdef CONFIG_WLAN
522 { 0x81, 0x00, 0x7F },
523 { 0x82, 0x00, 0xFF },
524 { 0xE6, 0x38, 0x7F },
525 { 0xE7, 0x06, 0xFF },
526#endif
527 { 0xE9, 0x21, 0xFF },
528 };
529
530 const struct bahama_config_register v10_bt_off[] = {
531 { 0xE9, 0x00, 0xFF },
532 };
533
534 const struct bahama_config_register v20_bt_off_fm_off[] = {
535 { 0xF4, 0x84, 0xFF },
536 { 0xF0, 0x04, 0xFF },
537 { 0xE9, 0x00, 0xFF }
538 };
539
540 const struct bahama_config_register v20_bt_off_fm_on[] = {
541 { 0xF4, 0x86, 0xFF },
542 { 0xF0, 0x06, 0xFF },
543 { 0xE9, 0x00, 0xFF }
544 };
545 const struct bahama_variant_register bt_bahama[2][3] = {
546 {
547 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
548 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
549 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
550 },
551 {
552 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
553 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
554 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
555 }
556 };
557
558 u8 offset = 0; /* index into bahama configs */
559 on = on ? 1 : 0;
560 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530561 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
562 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
563 version read Error, version = %d \n",
564 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700565 return -EIO;
566 }
567
568 if (version == BAHAMA_VER_2_0) {
569 if (marimba_get_fm_status(&config))
570 offset = 0x01;
571 }
572
573 p = bt_bahama[on][version + offset].set;
574
575 dev_info(&msm_bt_power_device.dev,
576 "%s: found version %d\n", __func__, version);
577
578 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
579 u8 value = (p+i)->value;
580 rc = marimba_write_bit_mask(&config,
581 (p+i)->reg,
582 &value,
583 sizeof((p+i)->value),
584 (p+i)->mask);
585 if (rc < 0) {
586 dev_err(&msm_bt_power_device.dev,
587 "%s: reg %x write failed: %d\n",
588 __func__, (p+i)->reg, rc);
589 return rc;
590 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530591 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700592 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
593 __func__, (p+i)->reg,
594 value, (p+i)->mask);
595 value = 0;
596 rc = marimba_read_bit_mask(&config,
597 (p+i)->reg, &value,
598 sizeof((p+i)->value), (p+i)->mask);
599 if (rc < 0)
600 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
601 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530602 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700603 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
604 __func__, (p+i)->reg,
605 value, (p+i)->mask);
606 }
607 /* Update BT Status */
608 if (on)
609 marimba_set_bt_status(&config, true);
610 else
611 marimba_set_bt_status(&config, false);
612 return rc;
613}
614static int bluetooth_switch_regulators(int on)
615{
616 int i, rc = 0;
617
618 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
619 if (!vregs_bahama[i]) {
620 pr_err("%s: vreg_get %s failed(%d)\n",
621 __func__, vregs_bahama_name[i], rc);
622 goto vreg_fail;
623 }
624 rc = on ? vreg_set_level(vregs_bahama[i], i ? 2900 :
625 1800) : 0;
626
627 if (rc < 0) {
628 pr_err("%s: vreg set level failed (%d)\n",
629 __func__, rc);
630 goto vreg_set_level_fail;
631 }
632
633 rc = on ? vreg_enable(vregs_bahama[i]) :
634 vreg_disable(vregs_bahama[i]);
635
636 if (rc < 0) {
637 pr_err("%s: vreg %s %s failed(%d)\n",
638 __func__, vregs_bahama_name[i],
639 on ? "enable" : "disable", rc);
640 goto vreg_fail;
641 }
642 }
643 return rc;
644
645vreg_fail:
646 while (i) {
647 if (on)
648 vreg_disable(vregs_bahama[--i]);
649 }
650vreg_set_level_fail:
651 vreg_put(vregs_bahama[0]);
652 vreg_put(vregs_bahama[1]);
653 return rc;
654}
655
656static unsigned int msm_bahama_setup_power(void)
657{
658 int rc = 0;
659 struct vreg *vreg_s3 = NULL;
660
661 vreg_s3 = vreg_get(NULL, "msme1");
662 if (IS_ERR(vreg_s3)) {
663 pr_err("%s: vreg get failed (%ld)\n",
664 __func__, PTR_ERR(vreg_s3));
665 return PTR_ERR(vreg_s3);
666 }
667 rc = vreg_set_level(vreg_s3, 1800);
668 if (rc < 0) {
669 pr_err("%s: vreg set level failed (%d)\n",
670 __func__, rc);
671 goto vreg_fail;
672 }
673 rc = vreg_enable(vreg_s3);
674 if (rc < 0) {
675 pr_err("%s: vreg enable failed (%d)\n",
676 __func__, rc);
677 goto vreg_fail;
678 }
679
680 /*setup Bahama_sys_reset_n*/
681 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
682 if (rc < 0) {
683 pr_err("%s: gpio_request %d = %d\n", __func__,
684 GPIO_BT_SYS_REST_EN, rc);
685 goto vreg_fail;
686 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530687 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700688 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530689 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690 GPIO_BT_SYS_REST_EN, rc);
691 goto gpio_fail;
692 }
693 return rc;
694
695gpio_fail:
696 gpio_free(GPIO_BT_SYS_REST_EN);
697vreg_fail:
698 vreg_put(vreg_s3);
699 return rc;
700}
701
702static unsigned int msm_bahama_shutdown_power(int value)
703{
704 int rc = 0;
705 struct vreg *vreg_s3 = NULL;
706
707 vreg_s3 = vreg_get(NULL, "msme1");
708 if (IS_ERR(vreg_s3)) {
709 pr_err("%s: vreg get failed (%ld)\n",
710 __func__, PTR_ERR(vreg_s3));
711 return PTR_ERR(vreg_s3);
712 }
713 rc = vreg_disable(vreg_s3);
714 if (rc) {
715 pr_err("%s: vreg disable failed (%d)\n",
716 __func__, rc);
717 vreg_put(vreg_s3);
718 return rc;
719 }
Rahul Kashyape8698c62011-07-20 20:43:05 +0530720 if (value == BAHAMA_ID) {
721 rc = bt_set_gpio(0);
722 if (rc) {
723 pr_err("%s: bt_set_gpio = %d\n",
724 __func__, rc);
725 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530726 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700727 return rc;
728}
729
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700730static unsigned int msm_bahama_core_config(int type)
731{
732 int rc = 0;
733
734 if (type == BAHAMA_ID) {
735 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530736 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700737 const struct bahama_config_register v20_init[] = {
738 /* reg, value, mask */
739 { 0xF4, 0x84, 0xFF }, /* AREG */
740 { 0xF0, 0x04, 0xFF } /* DREG */
741 };
742 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
743 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
744 u8 value = v20_init[i].value;
745 rc = marimba_write_bit_mask(&config,
746 v20_init[i].reg,
747 &value,
748 sizeof(v20_init[i].value),
749 v20_init[i].mask);
750 if (rc < 0) {
751 pr_err("%s: reg %d write failed: %d\n",
752 __func__, v20_init[i].reg, rc);
753 return rc;
754 }
755 pr_debug("%s: reg 0x%02x value 0x%02x"
756 " mask 0x%02x\n",
757 __func__, v20_init[i].reg,
758 v20_init[i].value, v20_init[i].mask);
759 }
760 }
761 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530762 rc = bt_set_gpio(0);
763 if (rc) {
764 pr_err("%s: bt_set_gpio = %d\n",
765 __func__, rc);
766 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700767 pr_debug("core type: %d\n", type);
768 return rc;
769}
770
771static int bluetooth_power(int on)
772{
773 int pin, rc = 0;
774 const char *id = "BTPW";
775 int cid = 0;
776
777 cid = adie_get_detected_connectivity_type();
778 if (cid != BAHAMA_ID) {
779 pr_err("%s: unexpected adie connectivity type: %d\n",
780 __func__, cid);
781 return -ENODEV;
782 }
783 if (on) {
784 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530785 rc = bt_set_gpio(on);
786 if (rc) {
787 pr_err("%s: bt_set_gpio = %d\n",
788 __func__, rc);
789 goto exit;
790 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700791 rc = bluetooth_switch_regulators(on);
792 if (rc < 0) {
793 pr_err("%s: bluetooth_switch_regulators rc = %d",
794 __func__, rc);
795 goto exit;
796 }
797 /*setup BT GPIO lines*/
798 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
799 pin++) {
800 rc = gpio_tlmm_config(bt_config_power_on[pin],
801 GPIO_CFG_ENABLE);
802 if (rc < 0) {
803 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
804 __func__,
805 bt_config_power_on[pin],
806 rc);
807 goto fail_power;
808 }
809 }
810 /*Setup BT clocks*/
811 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
812 PMAPP_CLOCK_VOTE_ON);
813 if (rc < 0) {
814 pr_err("Failed to vote for TCXO_D1 ON\n");
815 goto fail_clock;
816 }
817 msleep(20);
818
819 /*I2C config for Bahama*/
820 rc = bahama_bt(1);
821 if (rc < 0) {
822 pr_err("%s: bahama_bt rc = %d", __func__, rc);
823 goto fail_i2c;
824 }
825 msleep(20);
826
827 /*setup BT PCM lines*/
828 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
829 if (rc < 0) {
830 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
831 __func__, rc);
832 goto fail_power;
833 }
834 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
835 PMAPP_CLOCK_VOTE_PIN_CTRL);
836 if (rc < 0)
837 pr_err("%s:Pin Control Failed, rc = %d",
838 __func__, rc);
839
840 } else {
841 rc = bahama_bt(0);
842 if (rc < 0)
843 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530844
845 rc = bt_set_gpio(on);
846 if (rc) {
847 pr_err("%s: bt_set_gpio = %d\n",
848 __func__, rc);
849 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700850fail_i2c:
851 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
852 PMAPP_CLOCK_VOTE_OFF);
853 if (rc < 0)
854 pr_err("%s: Failed to vote Off D1\n", __func__);
855fail_clock:
856 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
857 pin++) {
858 rc = gpio_tlmm_config(bt_config_power_off[pin],
859 GPIO_CFG_ENABLE);
860 if (rc < 0) {
861 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
862 __func__, bt_config_power_off[pin], rc);
863 }
864 }
865 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
866 if (rc < 0) {
867 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
868 __func__, rc);
869 }
870fail_power:
871 rc = bluetooth_switch_regulators(0);
872 if (rc < 0) {
873 pr_err("%s: switch_regulators : rc = %d",\
874 __func__, rc);
875 goto exit;
876 }
877 }
878 return rc;
879exit:
880 pr_err("%s: failed with rc = %d", __func__, rc);
881 return rc;
882}
883
884static int __init bt_power_init(void)
885{
886 int i, rc = 0;
887 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
888 vregs_bahama[i] = vreg_get(NULL,
889 vregs_bahama_name[i]);
890 if (IS_ERR(vregs_bahama[i])) {
891 pr_err("%s: vreg get %s failed (%ld)\n",
892 __func__, vregs_bahama_name[i],
893 PTR_ERR(vregs_bahama[i]));
894 rc = PTR_ERR(vregs_bahama[i]);
895 goto vreg_get_fail;
896 }
897 }
898
899 msm_bt_power_device.dev.platform_data = &bluetooth_power;
900
901 return rc;
902
903vreg_get_fail:
904 while (i)
905 vreg_put(vregs_bahama[--i]);
906 return rc;
907}
908
909static struct marimba_platform_data marimba_pdata = {
910 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
911 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
912 .bahama_setup = msm_bahama_setup_power,
913 .bahama_shutdown = msm_bahama_shutdown_power,
914 .bahama_core_config = msm_bahama_core_config,
915 .fm = &marimba_fm_pdata,
916};
917
918#endif
919
920#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
921static struct i2c_board_info core_exp_i2c_info[] __initdata = {
922 {
923 I2C_BOARD_INFO("sx1509q", 0x3e),
924 },
925};
926static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
927 {
928 I2C_BOARD_INFO("sx1508q", 0x22),
929 .platform_data = &sx150x_data[SX150X_CAM],
930 },
931};
932#endif
933#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
934static struct i2c_board_info bahama_devices[] = {
935{
936 I2C_BOARD_INFO("marimba", 0xc),
937 .platform_data = &marimba_pdata,
938},
939};
940#endif
941
942#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
943static void __init register_i2c_devices(void)
944{
945
946 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
947 cam_exp_i2c_info,
948 ARRAY_SIZE(cam_exp_i2c_info));
949
950 if (machine_is_msm7x27a_surf())
951 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
952
953 core_exp_i2c_info[0].platform_data =
954 &sx150x_data[SX150X_CORE];
955
956 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
957 core_exp_i2c_info,
958 ARRAY_SIZE(core_exp_i2c_info));
959#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
960 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
961 bahama_devices,
962 ARRAY_SIZE(bahama_devices));
963#endif
964}
965#endif
966
967static struct msm_gpio qup_i2c_gpios_io[] = {
968 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
969 "qup_scl" },
970 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
971 "qup_sda" },
972 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
973 "qup_scl" },
974 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
975 "qup_sda" },
976};
977
978static struct msm_gpio qup_i2c_gpios_hw[] = {
979 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
980 "qup_scl" },
981 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
982 "qup_sda" },
983 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
984 "qup_scl" },
985 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
986 "qup_sda" },
987};
988
989static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
990{
991 int rc;
992
993 if (adap_id < 0 || adap_id > 1)
994 return;
995
996 /* Each adapter gets 2 lines from the table */
997 if (config_type)
998 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
999 else
1000 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1001 if (rc < 0)
1002 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1003}
1004
1005static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1006 .clk_freq = 100000,
1007 .clk = "gsbi_qup_clk",
1008 .pclk = "gsbi_qup_pclk",
1009 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1010};
1011
1012static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1013 .clk_freq = 100000,
1014 .clk = "gsbi_qup_clk",
1015 .pclk = "gsbi_qup_pclk",
1016 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1017};
1018
1019#ifdef CONFIG_ARCH_MSM7X27A
1020#define MSM_PMEM_MDP_SIZE 0x1DD1000
1021#define MSM_PMEM_ADSP_SIZE 0x1000000
1022
1023#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1024#define MSM_FB_SIZE 0x260000
1025#else
1026#define MSM_FB_SIZE 0x195000
1027#endif
1028
1029#endif
1030
1031static struct android_usb_platform_data android_usb_pdata = {
1032 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1033};
1034
1035static struct platform_device android_usb_device = {
1036 .name = "android_usb",
1037 .id = -1,
1038 .dev = {
1039 .platform_data = &android_usb_pdata,
1040 },
1041};
1042
1043#ifdef CONFIG_USB_EHCI_MSM_72K
1044static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1045{
1046 int rc = 0;
1047 unsigned gpio;
1048
1049 gpio = GPIO_HOST_VBUS_EN;
1050
1051 rc = gpio_request(gpio, "i2c_host_vbus_en");
1052 if (rc < 0) {
1053 pr_err("failed to request %d GPIO\n", gpio);
1054 return;
1055 }
1056 gpio_direction_output(gpio, !!on);
1057 gpio_set_value_cansleep(gpio, !!on);
1058 gpio_free(gpio);
1059}
1060
1061static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1062 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1063};
1064
1065static void __init msm7x2x_init_host(void)
1066{
1067 msm_add_host(0, &msm_usb_host_pdata);
1068}
1069#endif
1070
1071#ifdef CONFIG_USB_MSM_OTG_72K
1072static int hsusb_rpc_connect(int connect)
1073{
1074 if (connect)
1075 return msm_hsusb_rpc_connect();
1076 else
1077 return msm_hsusb_rpc_close();
1078}
1079
1080static struct vreg *vreg_3p3;
1081static int msm_hsusb_ldo_init(int init)
1082{
1083 if (init) {
1084 vreg_3p3 = vreg_get(NULL, "usb");
1085 if (IS_ERR(vreg_3p3))
1086 return PTR_ERR(vreg_3p3);
1087 } else
1088 vreg_put(vreg_3p3);
1089
1090 return 0;
1091}
1092
1093static int msm_hsusb_ldo_enable(int enable)
1094{
1095 static int ldo_status;
1096
1097 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1098 return -ENODEV;
1099
1100 if (ldo_status == enable)
1101 return 0;
1102
1103 ldo_status = enable;
1104
1105 if (enable)
1106 return vreg_enable(vreg_3p3);
1107
1108 return vreg_disable(vreg_3p3);
1109}
1110
1111#ifndef CONFIG_USB_EHCI_MSM_72K
1112static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1113{
1114 int ret = 0;
1115
1116 if (init)
1117 ret = msm_pm_app_rpc_init(callback);
1118 else
1119 msm_pm_app_rpc_deinit(callback);
1120
1121 return ret;
1122}
1123#endif
1124
1125static struct msm_otg_platform_data msm_otg_pdata = {
1126#ifndef CONFIG_USB_EHCI_MSM_72K
1127 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1128#else
1129 .vbus_power = msm_hsusb_vbus_power,
1130#endif
1131 .rpc_connect = hsusb_rpc_connect,
1132 .core_clk = 1,
1133 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1134 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1135 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1136 .se1_gating = SE1_GATING_DISABLE,
1137 .ldo_init = msm_hsusb_ldo_init,
1138 .ldo_enable = msm_hsusb_ldo_enable,
1139 .chg_init = hsusb_chg_init,
1140 .chg_connected = hsusb_chg_connected,
1141 .chg_vbus_draw = hsusb_chg_vbus_draw,
1142};
1143#endif
1144
1145static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1146 .is_phy_status_timer_on = 1,
1147};
1148
1149static struct resource smc91x_resources[] = {
1150 [0] = {
1151 .start = 0x90000300,
1152 .end = 0x900003ff,
1153 .flags = IORESOURCE_MEM,
1154 },
1155 [1] = {
1156 .start = MSM_GPIO_TO_INT(4),
1157 .end = MSM_GPIO_TO_INT(4),
1158 .flags = IORESOURCE_IRQ,
1159 },
1160};
1161
1162static struct platform_device smc91x_device = {
1163 .name = "smc91x",
1164 .id = 0,
1165 .num_resources = ARRAY_SIZE(smc91x_resources),
1166 .resource = smc91x_resources,
1167};
1168
1169#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1170 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1171 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1172 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1173
1174static unsigned long vreg_sts, gpio_sts;
1175static struct vreg *vreg_mmc;
1176static struct vreg *vreg_emmc;
1177
1178struct sdcc_vreg {
1179 struct vreg *vreg_data;
1180 unsigned level;
1181};
1182
1183static struct sdcc_vreg sdcc_vreg_data[4];
1184
1185struct sdcc_gpio {
1186 struct msm_gpio *cfg_data;
1187 uint32_t size;
1188 struct msm_gpio *sleep_cfg_data;
1189};
1190
1191static struct msm_gpio sdc1_cfg_data[] = {
1192 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1193 "sdc1_dat_3"},
1194 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1195 "sdc1_dat_2"},
1196 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1197 "sdc1_dat_1"},
1198 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1199 "sdc1_dat_0"},
1200 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1201 "sdc1_cmd"},
1202 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1203 "sdc1_clk"},
1204};
1205
1206static struct msm_gpio sdc2_cfg_data[] = {
1207 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1208 "sdc2_clk"},
1209 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1210 "sdc2_cmd"},
1211 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1212 "sdc2_dat_3"},
1213 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1214 "sdc2_dat_2"},
1215 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1216 "sdc2_dat_1"},
1217 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1218 "sdc2_dat_0"},
1219};
1220
1221static struct msm_gpio sdc2_sleep_cfg_data[] = {
1222 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1223 "sdc2_clk"},
1224 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1225 "sdc2_cmd"},
1226 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1227 "sdc2_dat_3"},
1228 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1229 "sdc2_dat_2"},
1230 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1231 "sdc2_dat_1"},
1232 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1233 "sdc2_dat_0"},
1234};
1235static struct msm_gpio sdc3_cfg_data[] = {
1236 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1237 "sdc3_clk"},
1238 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1239 "sdc3_cmd"},
1240 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1241 "sdc3_dat_3"},
1242 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1243 "sdc3_dat_2"},
1244 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1245 "sdc3_dat_1"},
1246 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1247 "sdc3_dat_0"},
1248#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1249 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1250 "sdc3_dat_7"},
1251 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1252 "sdc3_dat_6"},
1253 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1254 "sdc3_dat_5"},
1255 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1256 "sdc3_dat_4"},
1257#endif
1258};
1259
1260static struct msm_gpio sdc4_cfg_data[] = {
1261 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1262 "sdc4_dat_3"},
1263 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1264 "sdc4_dat_2"},
1265 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1266 "sdc4_dat_1"},
1267 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1268 "sdc4_cmd"},
1269 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1270 "sdc4_dat_0"},
1271 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1272 "sdc4_clk"},
1273};
1274
1275static struct sdcc_gpio sdcc_cfg_data[] = {
1276 {
1277 .cfg_data = sdc1_cfg_data,
1278 .size = ARRAY_SIZE(sdc1_cfg_data),
1279 },
1280 {
1281 .cfg_data = sdc2_cfg_data,
1282 .size = ARRAY_SIZE(sdc2_cfg_data),
1283 .sleep_cfg_data = sdc2_sleep_cfg_data,
1284 },
1285 {
1286 .cfg_data = sdc3_cfg_data,
1287 .size = ARRAY_SIZE(sdc3_cfg_data),
1288 },
1289 {
1290 .cfg_data = sdc4_cfg_data,
1291 .size = ARRAY_SIZE(sdc4_cfg_data),
1292 },
1293};
1294
1295static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1296{
1297 int rc = 0;
1298 struct sdcc_gpio *curr;
1299
1300 curr = &sdcc_cfg_data[dev_id - 1];
1301 if (!(test_bit(dev_id, &gpio_sts)^enable))
1302 return rc;
1303
1304 if (enable) {
1305 set_bit(dev_id, &gpio_sts);
1306 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1307 if (rc)
1308 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1309 __func__, dev_id);
1310 } else {
1311 clear_bit(dev_id, &gpio_sts);
1312 if (curr->sleep_cfg_data) {
1313 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1314 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1315 return rc;
1316 }
1317 msm_gpios_disable_free(curr->cfg_data, curr->size);
1318 }
1319 return rc;
1320}
1321
1322static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1323{
1324 int rc = 0;
1325 struct sdcc_vreg *curr;
1326
1327 curr = &sdcc_vreg_data[dev_id - 1];
1328
1329 if (!(test_bit(dev_id, &vreg_sts)^enable))
1330 return rc;
1331
1332 if (enable) {
1333 set_bit(dev_id, &vreg_sts);
1334 rc = vreg_set_level(curr->vreg_data, curr->level);
1335 if (rc)
1336 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1337
1338 rc = vreg_enable(curr->vreg_data);
1339 if (rc)
1340 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1341 } else {
1342 clear_bit(dev_id, &vreg_sts);
1343 rc = vreg_disable(curr->vreg_data);
1344 if (rc)
1345 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1346 }
1347 return rc;
1348}
1349
1350static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1351{
1352 int rc = 0;
1353 struct platform_device *pdev;
1354
1355 pdev = container_of(dv, struct platform_device, dev);
1356
1357 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1358 if (rc)
1359 goto out;
1360
1361 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1362out:
1363 return rc;
1364}
1365
1366#define GPIO_SDC1_HW_DET 85
1367
1368#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1369 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1370static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1371{
1372 int status;
1373
1374 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1375 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1376 if (status)
1377 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1378 GPIO_SDC1_HW_DET);
1379
1380 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1381 if (status) {
1382 pr_err("%s:Failed to request GPIO %d\n", __func__,
1383 GPIO_SDC1_HW_DET);
1384 } else {
1385 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1386 if (!status)
1387 status = gpio_get_value(GPIO_SDC1_HW_DET);
1388 gpio_free(GPIO_SDC1_HW_DET);
1389 }
1390 return status;
1391}
1392#endif
1393
1394#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1395static struct mmc_platform_data sdc1_plat_data = {
1396 .ocr_mask = MMC_VDD_28_29,
1397 .translate_vdd = msm_sdcc_setup_power,
1398 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1399 .msmsdcc_fmin = 144000,
1400 .msmsdcc_fmid = 24576000,
1401 .msmsdcc_fmax = 49152000,
1402#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1403 .status = msm7x2xa_sdcc_slot_status,
1404 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1405 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1406#endif
1407};
1408#endif
1409
1410#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1411static struct mmc_platform_data sdc2_plat_data = {
1412 /*
1413 * SDC2 supports only 1.8V, claim for 2.85V range is just
1414 * for allowing buggy cards who advertise 2.8V even though
1415 * they can operate at 1.8V supply.
1416 */
1417 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1418 .translate_vdd = msm_sdcc_setup_power,
1419 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1420#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1421 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1422#endif
1423 .msmsdcc_fmin = 144000,
1424 .msmsdcc_fmid = 24576000,
1425 .msmsdcc_fmax = 49152000,
1426#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1427 .dummy52_required = 1,
1428#endif
1429};
1430#endif
1431
1432#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1433static struct mmc_platform_data sdc3_plat_data = {
1434 .ocr_mask = MMC_VDD_28_29,
1435 .translate_vdd = msm_sdcc_setup_power,
1436#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1437 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1438#else
1439 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1440#endif
1441 .msmsdcc_fmin = 144000,
1442 .msmsdcc_fmid = 24576000,
1443 .msmsdcc_fmax = 49152000,
1444 .nonremovable = 1,
1445};
1446#endif
1447
1448#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1449 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1450static struct mmc_platform_data sdc4_plat_data = {
1451 .ocr_mask = MMC_VDD_28_29,
1452 .translate_vdd = msm_sdcc_setup_power,
1453 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1454 .msmsdcc_fmin = 144000,
1455 .msmsdcc_fmid = 24576000,
1456 .msmsdcc_fmax = 49152000,
1457};
1458#endif
1459#endif
1460
1461#ifdef CONFIG_SERIAL_MSM_HS
1462static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1463 .inject_rx_on_wakeup = 1,
1464 .rx_to_inject = 0xFD,
1465};
1466#endif
1467static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1468 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1469 .idle_supported = 1,
1470 .suspend_supported = 1,
1471 .idle_enabled = 1,
1472 .suspend_enabled = 1,
1473 .latency = 16000,
1474 .residency = 20000,
1475 },
1476 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1477 .idle_supported = 1,
1478 .suspend_supported = 1,
1479 .idle_enabled = 1,
1480 .suspend_enabled = 1,
1481 .latency = 12000,
1482 .residency = 20000,
1483 },
1484 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1485 .idle_supported = 1,
1486 .suspend_supported = 1,
1487 .idle_enabled = 0,
1488 .suspend_enabled = 1,
1489 .latency = 2000,
1490 .residency = 0,
1491 },
1492 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1493 .idle_supported = 1,
1494 .suspend_supported = 1,
1495 .idle_enabled = 1,
1496 .suspend_enabled = 1,
1497 .latency = 2,
1498 .residency = 0,
1499 },
1500};
1501
1502static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1503 .name = "pmem_adsp",
1504 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1505 .cached = 0,
1506 .memory_type = MEMTYPE_EBI1,
1507};
1508
1509static struct platform_device android_pmem_adsp_device = {
1510 .name = "android_pmem",
1511 .id = 1,
1512 .dev = { .platform_data = &android_pmem_adsp_pdata },
1513};
1514
1515static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1516static int __init pmem_mdp_size_setup(char *p)
1517{
1518 pmem_mdp_size = memparse(p, NULL);
1519 return 0;
1520}
1521
1522early_param("pmem_mdp_size", pmem_mdp_size_setup);
1523
1524static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1525static int __init pmem_adsp_size_setup(char *p)
1526{
1527 pmem_adsp_size = memparse(p, NULL);
1528 return 0;
1529}
1530
1531early_param("pmem_adsp_size", pmem_adsp_size_setup);
1532
1533static unsigned fb_size = MSM_FB_SIZE;
1534static int __init fb_size_setup(char *p)
1535{
1536 fb_size = memparse(p, NULL);
1537 return 0;
1538}
1539
1540early_param("fb_size", fb_size_setup);
1541
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001542static const char * const msm_fb_lcdc_vreg[] = {
1543 "gp2",
1544 "msme1",
1545};
1546
1547static const int msm_fb_lcdc_vreg_mV[] = {
1548 2850,
1549 1800,
1550};
1551
1552struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1553
1554static uint32_t lcdc_gpio_initialized;
1555
1556static void lcdc_toshiba_gpio_init(void)
1557{
1558 int i, rc = 0;
1559 if (!lcdc_gpio_initialized) {
1560 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1561 pr_err("failed to request gpio spi_clk\n");
1562 return;
1563 }
1564 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1565 pr_err("failed to request gpio spi_cs0_N\n");
1566 goto fail_gpio6;
1567 }
1568 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1569 pr_err("failed to request gpio spi_mosi\n");
1570 goto fail_gpio5;
1571 }
1572 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1573 pr_err("failed to request gpio spi_miso\n");
1574 goto fail_gpio4;
1575 }
1576 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1577 pr_err("failed to request gpio_disp_pwr\n");
1578 goto fail_gpio3;
1579 }
1580 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1581 pr_err("failed to request gpio_bkl_en\n");
1582 goto fail_gpio2;
1583 }
1584 pmapp_disp_backlight_init();
1585
1586 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1587 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1588
1589 rc = vreg_set_level(lcdc_vreg[i],
1590 msm_fb_lcdc_vreg_mV[i]);
1591
1592 if (rc < 0) {
1593 pr_err("%s: set regulator level failed "
1594 "with :(%d)\n", __func__, rc);
1595 goto fail_gpio1;
1596 }
1597 }
1598 lcdc_gpio_initialized = 1;
1599 }
1600 return;
1601
1602fail_gpio1:
1603 for (; i > 0; i--)
1604 vreg_put(lcdc_vreg[i - 1]);
1605
1606 gpio_free(GPIO_BACKLIGHT_EN);
1607fail_gpio2:
1608 gpio_free(GPIO_DISPLAY_PWR_EN);
1609fail_gpio3:
1610 gpio_free(GPIO_SPI_MISO);
1611fail_gpio4:
1612 gpio_free(GPIO_SPI_MOSI);
1613fail_gpio5:
1614 gpio_free(GPIO_SPI_CS0_N);
1615fail_gpio6:
1616 gpio_free(GPIO_SPI_CLK);
1617 lcdc_gpio_initialized = 0;
1618}
1619
1620static uint32_t lcdc_gpio_table[] = {
1621 GPIO_SPI_CLK,
1622 GPIO_SPI_CS0_N,
1623 GPIO_SPI_MOSI,
1624 GPIO_DISPLAY_PWR_EN,
1625 GPIO_BACKLIGHT_EN,
1626 GPIO_SPI_MISO,
1627};
1628
1629static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1630{
1631 int n;
1632
1633 if (lcdc_gpio_initialized) {
1634 /* All are IO Expander GPIOs */
1635 for (n = 0; n < (len - 1); n++)
1636 gpio_direction_output(table[n], 1);
1637 }
1638}
1639
1640static void lcdc_toshiba_config_gpios(int enable)
1641{
1642 config_lcdc_gpio_table(lcdc_gpio_table,
1643 ARRAY_SIZE(lcdc_gpio_table), enable);
1644}
1645
1646static int msm_fb_lcdc_power_save(int on)
1647{
1648 int i, rc = 0;
1649 /* Doing the init of the LCDC GPIOs very late as they are from
1650 an I2C-controlled IO Expander */
1651 lcdc_toshiba_gpio_init();
1652
1653 if (lcdc_gpio_initialized) {
1654 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1655 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1656
1657 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1658 if (on) {
1659 rc = vreg_enable(lcdc_vreg[i]);
1660
1661 if (rc) {
1662 printk(KERN_ERR "vreg_enable: %s vreg"
1663 "operation failed\n",
1664 msm_fb_lcdc_vreg[i]);
1665 goto lcdc_vreg_fail;
1666 }
1667 } else {
1668 rc = vreg_disable(lcdc_vreg[i]);
1669
1670 if (rc) {
1671 printk(KERN_ERR "vreg_disable: %s vreg "
1672 "operation failed\n",
1673 msm_fb_lcdc_vreg[i]);
1674 goto lcdc_vreg_fail;
1675 }
1676 }
1677 }
1678 }
1679
1680 return rc;
1681
1682lcdc_vreg_fail:
1683 if (on) {
1684 for (; i > 0; i--)
1685 vreg_disable(lcdc_vreg[i - 1]);
1686 } else {
1687 for (; i > 0; i--)
1688 vreg_enable(lcdc_vreg[i - 1]);
1689 }
1690
1691return rc;
1692
1693}
1694
1695
1696static int lcdc_toshiba_set_bl(int level)
1697{
1698 int ret;
1699
1700 ret = pmapp_disp_backlight_set_brightness(level);
1701 if (ret)
1702 pr_err("%s: can't set lcd backlight!\n", __func__);
1703
1704 return ret;
1705}
1706
1707
1708static struct lcdc_platform_data lcdc_pdata = {
Jeevan Shriram15f2a5e2011-07-13 21:45:26 +05301709 .lcdc_gpio_config = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001710 .lcdc_power_save = msm_fb_lcdc_power_save,
1711};
1712
1713static int lcd_panel_spi_gpio_num[] = {
1714 GPIO_SPI_MOSI, /* spi_sdi */
1715 GPIO_SPI_MISO, /* spi_sdoi */
1716 GPIO_SPI_CLK, /* spi_clk */
1717 GPIO_SPI_CS0_N, /* spi_cs */
1718};
1719
1720static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1721 .panel_config_gpio = lcdc_toshiba_config_gpios,
1722 .pmic_backlight = lcdc_toshiba_set_bl,
1723 .gpio_num = lcd_panel_spi_gpio_num,
1724};
1725
1726static struct platform_device lcdc_toshiba_panel_device = {
1727 .name = "lcdc_toshiba_fwvga_pt",
1728 .id = 0,
1729 .dev = {
1730 .platform_data = &lcdc_toshiba_panel_data,
1731 }
1732};
1733
1734static struct resource msm_fb_resources[] = {
1735 {
1736 .flags = IORESOURCE_DMA,
1737 }
1738};
1739
1740static int msm_fb_detect_panel(const char *name)
1741{
1742 int ret = -EPERM;
1743
1744 if (machine_is_msm7x27a_surf()) {
1745 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1746 ret = 0;
1747 } else {
1748 ret = -ENODEV;
1749 }
1750
1751 return ret;
1752}
1753
1754static struct msm_fb_platform_data msm_fb_pdata = {
1755 .detect_client = msm_fb_detect_panel,
1756};
1757
1758static struct platform_device msm_fb_device = {
1759 .name = "msm_fb",
1760 .id = 0,
1761 .num_resources = ARRAY_SIZE(msm_fb_resources),
1762 .resource = msm_fb_resources,
1763 .dev = {
1764 .platform_data = &msm_fb_pdata,
1765 }
1766};
1767
1768#ifdef CONFIG_FB_MSM_MIPI_DSI
1769static int mipi_renesas_set_bl(int level)
1770{
1771 int ret;
1772
1773 ret = pmapp_disp_backlight_set_brightness(level);
1774
1775 if (ret)
1776 pr_err("%s: can't set lcd backlight!\n", __func__);
1777
1778 return ret;
1779}
1780
1781static struct msm_panel_common_pdata mipi_renesas_pdata = {
1782 .pmic_backlight = mipi_renesas_set_bl,
1783};
1784
1785
1786static struct platform_device mipi_dsi_renesas_panel_device = {
1787 .name = "mipi_renesas",
1788 .id = 0,
1789 .dev = {
1790 .platform_data = &mipi_renesas_pdata,
1791 }
1792};
1793#endif
1794
1795static void __init msm7x27a_init_mmc(void)
1796{
1797 vreg_emmc = vreg_get(NULL, "emmc");
1798 if (IS_ERR(vreg_emmc)) {
1799 pr_err("%s: vreg get failed (%ld)\n",
1800 __func__, PTR_ERR(vreg_emmc));
1801 return;
1802 }
1803
1804 vreg_mmc = vreg_get(NULL, "mmc");
1805 if (IS_ERR(vreg_mmc)) {
1806 pr_err("%s: vreg get failed (%ld)\n",
1807 __func__, PTR_ERR(vreg_mmc));
1808 return;
1809 }
1810
1811 /* eMMC slot */
1812#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1813 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1814 sdcc_vreg_data[2].level = 3000;
1815 msm_add_sdcc(3, &sdc3_plat_data);
1816#endif
1817 /* Micro-SD slot */
1818#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1819 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1820 sdcc_vreg_data[0].level = 2850;
1821 msm_add_sdcc(1, &sdc1_plat_data);
1822#endif
1823 /* SDIO WLAN slot */
1824#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1825 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1826 sdcc_vreg_data[1].level = 2850;
1827 msm_add_sdcc(2, &sdc2_plat_data);
1828#endif
1829 /* Not Used */
1830#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1831 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1832 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1833 sdcc_vreg_data[3].level = 2850;
1834 msm_add_sdcc(4, &sdc4_plat_data);
1835#endif
1836}
1837#define SND(desc, num) { .name = #desc, .id = num }
1838static struct snd_endpoint snd_endpoints_list[] = {
1839 SND(HANDSET, 0),
1840 SND(MONO_HEADSET, 2),
1841 SND(HEADSET, 3),
1842 SND(SPEAKER, 6),
1843 SND(TTY_HEADSET, 8),
1844 SND(TTY_VCO, 9),
1845 SND(TTY_HCO, 10),
1846 SND(BT, 12),
1847 SND(IN_S_SADC_OUT_HANDSET, 16),
1848 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1849 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1850 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1851 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1852 SND(CURRENT, 34),
1853 SND(FM_ANALOG_STEREO_HEADSET, 35),
1854 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1855};
1856#undef SND
1857
1858static struct msm_snd_endpoints msm_device_snd_endpoints = {
1859 .endpoints = snd_endpoints_list,
1860 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1861};
1862
1863static struct platform_device msm_device_snd = {
1864 .name = "msm_snd",
1865 .id = -1,
1866 .dev = {
1867 .platform_data = &msm_device_snd_endpoints
1868 },
1869};
1870
1871#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1872 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1873 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1874 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1875 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1876 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1877#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1878 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1879 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1880 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1881 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1882 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1883#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1884 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1885 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1886 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1887 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1888 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1889#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1890 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1891 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1892 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1893 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1894 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1895#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1896
1897static unsigned int dec_concurrency_table[] = {
1898 /* Audio LP */
1899 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1900 0, 0, 0,
1901
1902 /* Concurrency 1 */
1903 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1904 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1905 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1906 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1907 (DEC4_FORMAT),
1908
1909 /* Concurrency 2 */
1910 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1911 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1912 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1913 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1914 (DEC4_FORMAT),
1915
1916 /* Concurrency 3 */
1917 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1918 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1919 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1920 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1921 (DEC4_FORMAT),
1922
1923 /* Concurrency 4 */
1924 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1925 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1926 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1927 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1928 (DEC4_FORMAT),
1929
1930 /* Concurrency 5 */
1931 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1932 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1933 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1934 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1935 (DEC4_FORMAT),
1936
1937 /* Concurrency 6 */
1938 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1939 0, 0, 0, 0,
1940
1941 /* Concurrency 7 */
1942 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1943 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1944 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1945 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1946 (DEC4_FORMAT),
1947};
1948
1949#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1950 .module_queueid = queueid, .module_decid = decid, \
1951 .nr_codec_support = nr_codec}
1952
1953static struct msm_adspdec_info dec_info_list[] = {
1954 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1955 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1956 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1957 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1958 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1959};
1960
1961static struct msm_adspdec_database msm_device_adspdec_database = {
1962 .num_dec = ARRAY_SIZE(dec_info_list),
1963 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1964 ARRAY_SIZE(dec_info_list)),
1965 .dec_concurrency_table = dec_concurrency_table,
1966 .dec_info_list = dec_info_list,
1967};
1968
1969static struct platform_device msm_device_adspdec = {
1970 .name = "msm_adspdec",
1971 .id = -1,
1972 .dev = {
1973 .platform_data = &msm_device_adspdec_database
1974 },
1975};
1976
1977static struct android_pmem_platform_data android_pmem_audio_pdata = {
1978 .name = "pmem_audio",
1979 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1980 .cached = 0,
1981 .memory_type = MEMTYPE_EBI1,
1982};
1983
1984static struct platform_device android_pmem_audio_device = {
1985 .name = "android_pmem",
1986 .id = 2,
1987 .dev = { .platform_data = &android_pmem_audio_pdata },
1988};
1989
1990static struct android_pmem_platform_data android_pmem_pdata = {
1991 .name = "pmem",
1992 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1993 .cached = 1,
1994 .memory_type = MEMTYPE_EBI1,
1995};
1996static struct platform_device android_pmem_device = {
1997 .name = "android_pmem",
1998 .id = 0,
1999 .dev = { .platform_data = &android_pmem_pdata },
2000};
2001
2002static u32 msm_calculate_batt_capacity(u32 current_voltage);
2003
2004static struct msm_psy_batt_pdata msm_psy_batt_data = {
2005 .voltage_min_design = 2800,
2006 .voltage_max_design = 4300,
2007 .avail_chg_sources = AC_CHG | USB_CHG ,
2008 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2009 .calculate_capacity = &msm_calculate_batt_capacity,
2010};
2011
2012static u32 msm_calculate_batt_capacity(u32 current_voltage)
2013{
2014 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2015 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2016
2017 return (current_voltage - low_voltage) * 100
2018 / (high_voltage - low_voltage);
2019}
2020
2021static struct platform_device msm_batt_device = {
2022 .name = "msm-battery",
2023 .id = -1,
2024 .dev.platform_data = &msm_psy_batt_data,
2025};
2026
2027static struct smsc911x_platform_config smsc911x_config = {
2028 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2029 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2030 .flags = SMSC911X_USE_16BIT,
2031};
2032
2033static struct resource smsc911x_resources[] = {
2034 [0] = {
2035 .start = 0x90000000,
2036 .end = 0x90007fff,
2037 .flags = IORESOURCE_MEM,
2038 },
2039 [1] = {
2040 .start = MSM_GPIO_TO_INT(48),
2041 .end = MSM_GPIO_TO_INT(48),
2042 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2043 },
2044};
2045
2046static struct platform_device smsc911x_device = {
2047 .name = "smsc911x",
2048 .id = 0,
2049 .num_resources = ARRAY_SIZE(smsc911x_resources),
2050 .resource = smsc911x_resources,
2051 .dev = {
2052 .platform_data = &smsc911x_config,
2053 },
2054};
2055
2056static struct msm_gpio smsc911x_gpios[] = {
2057 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2058 "smsc911x_irq" },
2059 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2060 "eth_fifo_sel" },
2061};
2062
2063#define ETH_FIFO_SEL_GPIO 49
2064static void msm7x27a_cfg_smsc911x(void)
2065{
2066 int res;
2067
2068 res = msm_gpios_request_enable(smsc911x_gpios,
2069 ARRAY_SIZE(smsc911x_gpios));
2070 if (res) {
2071 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2072 return;
2073 }
2074
2075 /* ETH_FIFO_SEL */
2076 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2077 if (res) {
2078 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2079 ETH_FIFO_SEL_GPIO);
2080 msm_gpios_disable_free(smsc911x_gpios,
2081 ARRAY_SIZE(smsc911x_gpios));
2082 return;
2083 }
2084 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2085}
2086
2087#ifdef CONFIG_MSM_CAMERA
2088static uint32_t camera_off_gpio_table[] = {
2089 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2090};
2091
2092static uint32_t camera_on_gpio_table[] = {
2093 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2094};
2095
2096#ifdef CONFIG_MSM_CAMERA_FLASH
2097static struct msm_camera_sensor_flash_src msm_flash_src = {
2098 .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER,
2099 ._fsrc.current_driver_src.led1 = GPIO_CAM_GP_LED_EN1,
2100 ._fsrc.current_driver_src.led2 = GPIO_CAM_GP_LED_EN2,
2101};
2102#endif
2103
2104static struct vreg *vreg_gp1;
2105static struct vreg *vreg_gp2;
2106static struct vreg *vreg_gp3;
2107static void msm_camera_vreg_config(int vreg_en)
2108{
2109 int rc;
2110
2111 if (vreg_gp1 == NULL) {
2112 vreg_gp1 = vreg_get(NULL, "msme1");
2113 if (IS_ERR(vreg_gp1)) {
2114 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2115 __func__, "msme1", PTR_ERR(vreg_gp1));
2116 return;
2117 }
2118
2119 rc = vreg_set_level(vreg_gp1, 1800);
2120 if (rc) {
2121 pr_err("%s: GP1 set_level failed (%d)\n",
2122 __func__, rc);
2123 return;
2124 }
2125 }
2126
2127 if (vreg_gp2 == NULL) {
2128 vreg_gp2 = vreg_get(NULL, "gp2");
2129 if (IS_ERR(vreg_gp2)) {
2130 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2131 __func__, "gp2", PTR_ERR(vreg_gp2));
2132 return;
2133 }
2134
2135 rc = vreg_set_level(vreg_gp2, 2850);
2136 if (rc) {
2137 pr_err("%s: GP2 set_level failed (%d)\n",
2138 __func__, rc);
2139 }
2140 }
2141
2142 if (vreg_gp3 == NULL) {
2143 vreg_gp3 = vreg_get(NULL, "usb2");
2144 if (IS_ERR(vreg_gp3)) {
2145 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2146 __func__, "gp3", PTR_ERR(vreg_gp3));
2147 return;
2148 }
2149
2150 rc = vreg_set_level(vreg_gp3, 1800);
2151 if (rc) {
2152 pr_err("%s: GP3 set level failed (%d)\n",
2153 __func__, rc);
2154 }
2155 }
2156
2157 if (vreg_en) {
2158 rc = vreg_enable(vreg_gp1);
2159 if (rc) {
2160 pr_err("%s: GP1 enable failed (%d)\n",
2161 __func__, rc);
2162 return;
2163 }
2164
2165 rc = vreg_enable(vreg_gp2);
2166 if (rc) {
2167 pr_err("%s: GP2 enable failed (%d)\n",
2168 __func__, rc);
2169 }
2170
2171 rc = vreg_enable(vreg_gp3);
2172 if (rc) {
2173 pr_err("%s: GP3 enable failed (%d)\n",
2174 __func__, rc);
2175 }
2176 } else {
2177 rc = vreg_disable(vreg_gp1);
2178 if (rc)
2179 pr_err("%s: GP1 disable failed (%d)\n",
2180 __func__, rc);
2181
2182 rc = vreg_disable(vreg_gp2);
2183 if (rc) {
2184 pr_err("%s: GP2 disable failed (%d)\n",
2185 __func__, rc);
2186 }
2187
2188 rc = vreg_disable(vreg_gp3);
2189 if (rc) {
2190 pr_err("%s: GP3 disable failed (%d)\n",
2191 __func__, rc);
2192 }
2193 }
2194}
2195
2196static int config_gpio_table(uint32_t *table, int len)
2197{
2198 int rc = 0, i = 0;
2199
2200 for (i = 0; i < len; i++) {
2201 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2202 if (rc) {
2203 pr_err("%s not able to get gpio\n", __func__);
2204 for (i--; i >= 0; i--)
2205 gpio_tlmm_config(camera_off_gpio_table[i],
2206 GPIO_CFG_ENABLE);
2207 break;
2208 }
2209 }
2210 return rc;
2211}
2212
2213static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2214static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2215static int config_camera_on_gpios_rear(void)
2216{
2217 int rc = 0;
2218
2219 if (machine_is_msm7x27a_ffa())
2220 msm_camera_vreg_config(1);
2221
2222 rc = config_gpio_table(camera_on_gpio_table,
2223 ARRAY_SIZE(camera_on_gpio_table));
2224 if (rc < 0) {
2225 pr_err("%s: CAMSENSOR gpio table request"
2226 "failed\n", __func__);
2227 return rc;
2228 }
2229
2230 return rc;
2231}
2232
2233static void config_camera_off_gpios_rear(void)
2234{
2235 if (machine_is_msm7x27a_ffa())
2236 msm_camera_vreg_config(0);
2237
2238 config_gpio_table(camera_off_gpio_table,
2239 ARRAY_SIZE(camera_off_gpio_table));
2240}
2241
2242static int config_camera_on_gpios_front(void)
2243{
2244 int rc = 0;
2245
2246 if (machine_is_msm7x27a_ffa())
2247 msm_camera_vreg_config(1);
2248
2249 rc = config_gpio_table(camera_on_gpio_table,
2250 ARRAY_SIZE(camera_on_gpio_table));
2251 if (rc < 0) {
2252 pr_err("%s: CAMSENSOR gpio table request"
2253 "failed\n", __func__);
2254 return rc;
2255 }
2256
2257 return rc;
2258}
2259
2260static void config_camera_off_gpios_front(void)
2261{
2262 if (machine_is_msm7x27a_ffa())
2263 msm_camera_vreg_config(0);
2264
2265 config_gpio_table(camera_off_gpio_table,
2266 ARRAY_SIZE(camera_off_gpio_table));
2267}
2268
2269struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2270 .camera_gpio_on = config_camera_on_gpios_rear,
2271 .camera_gpio_off = config_camera_off_gpios_rear,
2272 .ioext.csiphy = 0xA1000000,
2273 .ioext.csisz = 0x00100000,
2274 .ioext.csiirq = INT_CSI_IRQ_1,
2275 .ioclk.mclk_clk_rate = 24000000,
2276 .ioclk.vfe_clk_rate = 192000000,
2277 .ioext.appphy = MSM_CLK_CTL_PHYS,
2278 .ioext.appsz = MSM_CLK_CTL_SIZE,
2279};
2280
2281struct msm_camera_device_platform_data msm_camera_device_data_front = {
2282 .camera_gpio_on = config_camera_on_gpios_front,
2283 .camera_gpio_off = config_camera_off_gpios_front,
2284 .ioext.csiphy = 0xA0F00000,
2285 .ioext.csisz = 0x00100000,
2286 .ioext.csiirq = INT_CSI_IRQ_0,
2287 .ioclk.mclk_clk_rate = 24000000,
2288 .ioclk.vfe_clk_rate = 192000000,
2289 .ioext.appphy = MSM_CLK_CTL_PHYS,
2290 .ioext.appsz = MSM_CLK_CTL_SIZE,
2291};
2292
2293#ifdef CONFIG_S5K4E1
2294static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2295 .mount_angle = 90
2296};
2297
2298static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2299 .flash_type = MSM_CAMERA_FLASH_LED,
2300 .flash_src = &msm_flash_src
2301};
2302
2303static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2304 .sensor_name = "s5k4e1",
2305 .sensor_reset_enable = 1,
2306 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2307 .sensor_pwd = 85,
2308 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2309 .vcm_enable = 1,
2310 .pdata = &msm_camera_device_data_rear,
2311 .flash_data = &flash_s5k4e1,
2312 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2313 .csi_if = 1
2314};
2315
2316static struct platform_device msm_camera_sensor_s5k4e1 = {
2317 .name = "msm_camera_s5k4e1",
2318 .dev = {
2319 .platform_data = &msm_camera_sensor_s5k4e1_data,
2320 },
2321};
2322#endif
2323
2324#ifdef CONFIG_IMX072
2325static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2326 .mount_angle = 90
2327};
2328
2329static struct msm_camera_sensor_flash_data flash_imx072 = {
2330 .flash_type = MSM_CAMERA_FLASH_LED,
2331 .flash_src = &msm_flash_src
2332};
2333
2334static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2335 .sensor_name = "imx072",
2336 .sensor_reset_enable = 1,
2337 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2338 .sensor_pwd = 85,
2339 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2340 .vcm_enable = 1,
2341 .pdata = &msm_camera_device_data_rear,
2342 .flash_data = &flash_imx072,
2343 .sensor_platform_info = &imx072_sensor_7627a_info,
2344 .csi_if = 1
2345};
2346
2347static struct platform_device msm_camera_sensor_imx072 = {
2348 .name = "msm_camera_imx072",
2349 .dev = {
2350 .platform_data = &msm_camera_sensor_imx072_data,
2351 },
2352};
2353#endif
2354
2355#ifdef CONFIG_WEBCAM_OV9726
2356static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2357 .mount_angle = 90
2358};
2359
2360static struct msm_camera_sensor_flash_data flash_ov9726 = {
2361 .flash_type = MSM_CAMERA_FLASH_NONE,
2362 .flash_src = &msm_flash_src
2363};
2364
2365static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2366 .sensor_name = "ov9726",
2367 .sensor_reset_enable = 0,
2368 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2369 .sensor_pwd = 85,
2370 .vcm_pwd = 1,
2371 .vcm_enable = 0,
2372 .pdata = &msm_camera_device_data_front,
2373 .flash_data = &flash_ov9726,
2374 .sensor_platform_info = &ov9726_sensor_7627a_info,
2375 .csi_if = 1
2376};
2377
2378static struct platform_device msm_camera_sensor_ov9726 = {
2379 .name = "msm_camera_ov9726",
2380 .dev = {
2381 .platform_data = &msm_camera_sensor_ov9726_data,
2382 },
2383};
2384#endif
2385
2386#ifdef CONFIG_MT9E013
2387static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2388 .mount_angle = 90
2389};
2390
2391static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2392 .flash_type = MSM_CAMERA_FLASH_LED,
2393 .flash_src = &msm_flash_src
2394};
2395
2396static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2397 .sensor_name = "mt9e013",
2398 .sensor_reset = 0,
2399 .sensor_reset_enable = 1,
2400 .sensor_pwd = 85,
2401 .vcm_pwd = 1,
2402 .vcm_enable = 0,
2403 .pdata = &msm_camera_device_data_rear,
2404 .flash_data = &flash_mt9e013,
2405 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2406 .csi_if = 1
2407};
2408
2409static struct platform_device msm_camera_sensor_mt9e013 = {
2410 .name = "msm_camera_mt9e013",
2411 .dev = {
2412 .platform_data = &msm_camera_sensor_mt9e013_data,
2413 },
2414};
2415#endif
2416
2417static struct i2c_board_info i2c_camera_devices[] = {
2418 #ifdef CONFIG_S5K4E1
2419 {
2420 I2C_BOARD_INFO("s5k4e1", 0x36),
2421 },
2422 {
2423 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2424 },
2425 #endif
2426 #ifdef CONFIG_WEBCAM_OV9726
2427 {
2428 I2C_BOARD_INFO("ov9726", 0x10),
2429 },
2430 #endif
2431 #ifdef CONFIG_IMX072
2432 {
2433 I2C_BOARD_INFO("imx072", 0x34),
2434 },
2435 #endif
2436 #ifdef CONFIG_MT9E013
2437 {
2438 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2439 },
2440 #endif
2441 {
2442 I2C_BOARD_INFO("sc628a", 0x37),
2443 },
2444};
2445#endif
2446#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2447 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2448static struct msm_gpio uart2dm_gpios[] = {
2449 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2450 "uart2dm_rfr_n" },
2451 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2452 "uart2dm_cts_n" },
2453 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2454 "uart2dm_rx" },
2455 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2456 "uart2dm_tx" },
2457};
2458
2459static void msm7x27a_cfg_uart2dm_serial(void)
2460{
2461 int ret;
2462 ret = msm_gpios_request_enable(uart2dm_gpios,
2463 ARRAY_SIZE(uart2dm_gpios));
2464 if (ret)
2465 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2466}
2467#else
2468static void msm7x27a_cfg_uart2dm_serial(void) { }
2469#endif
2470
2471static struct platform_device *rumi_sim_devices[] __initdata = {
2472 &msm_device_dmov,
2473 &msm_device_smd,
2474 &smc91x_device,
2475 &msm_device_uart1,
2476 &msm_device_nand,
2477 &msm_device_uart_dm1,
2478 &msm_gsbi0_qup_i2c_device,
2479 &msm_gsbi1_qup_i2c_device,
2480};
2481
2482static struct platform_device *surf_ffa_devices[] __initdata = {
2483 &msm_device_dmov,
2484 &msm_device_smd,
2485 &msm_device_uart1,
2486 &msm_device_uart_dm1,
2487 &msm_device_uart_dm2,
2488 &msm_device_nand,
2489 &msm_gsbi0_qup_i2c_device,
2490 &msm_gsbi1_qup_i2c_device,
2491 &msm_device_otg,
2492 &msm_device_gadget_peripheral,
2493 &android_usb_device,
2494 &android_pmem_device,
2495 &android_pmem_adsp_device,
2496 &android_pmem_audio_device,
2497 &msm_device_snd,
2498 &msm_device_adspdec,
2499 &msm_fb_device,
2500 &lcdc_toshiba_panel_device,
2501 &msm_batt_device,
2502 &smsc911x_device,
2503#ifdef CONFIG_S5K4E1
2504 &msm_camera_sensor_s5k4e1,
2505#endif
2506#ifdef CONFIG_IMX072
2507 &msm_camera_sensor_imx072,
2508#endif
2509#ifdef CONFIG_WEBCAM_OV9726
2510 &msm_camera_sensor_ov9726,
2511#endif
2512#ifdef CONFIG_MT9E013
2513 &msm_camera_sensor_mt9e013,
2514#endif
2515#ifdef CONFIG_FB_MSM_MIPI_DSI
2516 &mipi_dsi_renesas_panel_device,
2517#endif
2518 &msm_kgsl_3d0,
2519#ifdef CONFIG_BT
2520 &msm_bt_power_device,
2521#endif
2522};
2523
2524static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2525static int __init pmem_kernel_ebi1_size_setup(char *p)
2526{
2527 pmem_kernel_ebi1_size = memparse(p, NULL);
2528 return 0;
2529}
2530early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2531
2532static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2533static int __init pmem_audio_size_setup(char *p)
2534{
2535 pmem_audio_size = memparse(p, NULL);
2536 return 0;
2537}
2538early_param("pmem_audio_size", pmem_audio_size_setup);
2539
2540static void __init msm_msm7x2x_allocate_memory_regions(void)
2541{
2542 void *addr;
2543 unsigned long size;
2544
2545 size = fb_size ? : MSM_FB_SIZE;
2546 addr = alloc_bootmem_align(size, 0x1000);
2547 msm_fb_resources[0].start = __pa(addr);
2548 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2549 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2550 size, addr, __pa(addr));
2551}
2552
2553static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2554 [MEMTYPE_SMI] = {
2555 },
2556 [MEMTYPE_EBI0] = {
2557 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2558 },
2559 [MEMTYPE_EBI1] = {
2560 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2561 },
2562};
2563
2564static void __init size_pmem_devices(void)
2565{
2566#ifdef CONFIG_ANDROID_PMEM
2567 android_pmem_adsp_pdata.size = pmem_adsp_size;
2568 android_pmem_pdata.size = pmem_mdp_size;
2569 android_pmem_audio_pdata.size = pmem_audio_size;
2570#endif
2571}
2572
2573static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2574{
2575 msm7x27a_reserve_table[p->memory_type].size += p->size;
2576}
2577
2578static void __init reserve_pmem_memory(void)
2579{
2580#ifdef CONFIG_ANDROID_PMEM
2581 reserve_memory_for(&android_pmem_adsp_pdata);
2582 reserve_memory_for(&android_pmem_pdata);
2583 reserve_memory_for(&android_pmem_audio_pdata);
2584 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2585#endif
2586}
2587
2588static void __init msm7x27a_calculate_reserve_sizes(void)
2589{
2590 size_pmem_devices();
2591 reserve_pmem_memory();
2592}
2593
2594static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2595{
2596 return MEMTYPE_EBI1;
2597}
2598
2599static struct reserve_info msm7x27a_reserve_info __initdata = {
2600 .memtype_reserve_table = msm7x27a_reserve_table,
2601 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2602 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2603};
2604
2605static void __init msm7x27a_reserve(void)
2606{
2607 reserve_info = &msm7x27a_reserve_info;
2608 msm_reserve();
2609}
2610
2611static void __init msm_device_i2c_init(void)
2612{
2613 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2614 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2615}
2616
2617static struct msm_panel_common_pdata mdp_pdata = {
2618 .gpio = 97,
2619 .mdp_rev = MDP_REV_303,
2620};
2621
2622#define GPIO_LCDC_BRDG_PD 128
2623#define GPIO_LCDC_BRDG_RESET_N 129
2624
2625#define LCDC_RESET_PHYS 0x90008014
2626static void __iomem *lcdc_reset_ptr;
2627
2628static unsigned mipi_dsi_gpio[] = {
2629 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2630 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2631 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2632 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2633};
2634
2635enum {
2636 DSI_SINGLE_LANE = 1,
2637 DSI_TWO_LANES,
2638};
2639
2640static int msm_fb_get_lane_config(void)
2641{
2642 int rc = DSI_TWO_LANES;
2643
2644 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2645 rc = DSI_SINGLE_LANE;
2646 pr_info("DSI Single Lane\n");
2647 } else {
2648 pr_info("DSI Two Lanes\n");
2649 }
2650 return rc;
2651}
2652
2653static int msm_fb_dsi_client_reset(void)
2654{
2655 int rc = 0;
2656
2657 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2658 if (rc < 0) {
2659 pr_err("failed to request lcd brdg reset_n\n");
2660 return rc;
2661 }
2662
2663 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2664 if (rc < 0) {
2665 pr_err("failed to request lcd brdg pd\n");
2666 return rc;
2667 }
2668
2669 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2670 if (rc) {
2671 pr_err("Failed to enable LCDC Bridge reset enable\n");
2672 goto gpio_error;
2673 }
2674
2675 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2676 if (rc) {
2677 pr_err("Failed to enable LCDC Bridge pd enable\n");
2678 goto gpio_error2;
2679 }
2680
2681 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2682 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2683 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2684
2685 if (!rc) {
2686 if (machine_is_msm7x27a_surf()) {
2687 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2688 sizeof(uint32_t));
2689
2690 if (!lcdc_reset_ptr)
2691 return 0;
2692 }
2693 return rc;
2694 } else {
2695 goto gpio_error;
2696 }
2697
2698gpio_error2:
2699 pr_err("Failed GPIO bridge pd\n");
2700 gpio_free(GPIO_LCDC_BRDG_PD);
2701
2702gpio_error:
2703 pr_err("Failed GPIO bridge reset\n");
2704 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2705 return rc;
2706}
2707
2708static const char * const msm_fb_dsi_vreg[] = {
2709 "gp2",
2710 "msme1",
2711};
2712
2713static const int msm_fb_dsi_vreg_mV[] = {
2714 2850,
2715 1800,
2716};
2717
2718static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2719static int dsi_gpio_initialized;
2720
2721static int mipi_dsi_panel_power(int on)
2722{
2723 int i, rc = 0;
2724 uint32_t lcdc_reset_cfg;
2725
2726 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2727 if (!dsi_gpio_initialized) {
2728 pmapp_disp_backlight_init();
2729
2730 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2731 if (rc < 0) {
2732 pr_err("failed to request gpio_disp_pwr\n");
2733 return rc;
2734 }
2735
2736 if (machine_is_msm7x27a_surf()) {
2737 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2738 if (rc < 0) {
2739 pr_err("failed to enable display pwr\n");
2740 goto fail_gpio1;
2741 }
2742
2743 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2744 if (rc < 0) {
2745 pr_err("failed to request gpio_bkl_en\n");
2746 goto fail_gpio1;
2747 }
2748
2749 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2750 if (rc < 0) {
2751 pr_err("failed to enable backlight\n");
2752 goto fail_gpio2;
2753 }
2754 }
2755
2756 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2757 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2758
2759 if (IS_ERR(dsi_vreg[i])) {
2760 pr_err("%s: vreg get failed with : (%ld)\n",
2761 __func__, PTR_ERR(dsi_vreg[i]));
2762 goto fail_gpio2;
2763 }
2764
2765 rc = vreg_set_level(dsi_vreg[i],
2766 msm_fb_dsi_vreg_mV[i]);
2767
2768 if (rc < 0) {
2769 pr_err("%s: set regulator level failed "
2770 "with :(%d)\n", __func__, rc);
2771 goto vreg_fail1;
2772 }
2773 }
2774 dsi_gpio_initialized = 1;
2775 }
2776
2777 if (machine_is_msm7x27a_surf()) {
2778 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2779 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2780 } else if (machine_is_msm7x27a_ffa()) {
2781 if (on) {
2782 /* This line drives an active low pin on FFA */
2783 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2784 !on);
2785 if (rc < 0)
2786 pr_err("failed to set direction for "
2787 "display pwr\n");
2788 } else {
2789 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2790 !on);
2791 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2792 if (rc < 0)
2793 pr_err("failed to set direction for "
2794 "display pwr\n");
2795 }
2796 }
2797
2798 if (on) {
2799 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2800
2801 if (machine_is_msm7x27a_surf()) {
2802 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2803 rmb();
2804 lcdc_reset_cfg &= ~1;
2805
2806 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2807 msleep(20);
2808 wmb();
2809 lcdc_reset_cfg |= 1;
2810 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2811 } else {
2812 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2813 0);
2814 msleep(20);
2815 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2816 1);
2817 }
2818
2819 if (pmapp_disp_backlight_set_brightness(100))
2820 pr_err("backlight set brightness failed\n");
2821 } else {
2822 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2823
2824 if (pmapp_disp_backlight_set_brightness(0))
2825 pr_err("backlight set brightness failed\n");
2826 }
2827
2828 /*Configure vreg lines */
2829 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2830 if (on) {
2831 rc = vreg_enable(dsi_vreg[i]);
2832
2833 if (rc) {
2834 printk(KERN_ERR "vreg_enable: %s vreg"
2835 "operation failed\n",
2836 msm_fb_dsi_vreg[i]);
2837
2838 goto vreg_fail2;
2839 }
2840 } else {
2841 rc = vreg_disable(dsi_vreg[i]);
2842
2843 if (rc) {
2844 printk(KERN_ERR "vreg_disable: %s vreg "
2845 "operation failed\n",
2846 msm_fb_dsi_vreg[i]);
2847 goto vreg_fail2;
2848 }
2849 }
2850 }
2851
2852 return rc;
2853
2854vreg_fail2:
2855 if (on) {
2856 for (; i > 0; i--)
2857 vreg_disable(dsi_vreg[i - 1]);
2858 } else {
2859 for (; i > 0; i--)
2860 vreg_enable(dsi_vreg[i - 1]);
2861 }
2862
2863 return rc;
2864
2865vreg_fail1:
2866 for (; i > 0; i--)
2867 vreg_put(dsi_vreg[i - 1]);
2868
2869fail_gpio2:
2870 gpio_free(GPIO_BACKLIGHT_EN);
2871fail_gpio1:
2872 gpio_free(GPIO_DISPLAY_PWR_EN);
2873 dsi_gpio_initialized = 0;
2874 return rc;
2875}
2876
2877#define MDP_303_VSYNC_GPIO 97
2878
2879#ifdef CONFIG_FB_MSM_MDP303
2880static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2881 .vsync_gpio = MDP_303_VSYNC_GPIO,
2882 .dsi_power_save = mipi_dsi_panel_power,
2883 .dsi_client_reset = msm_fb_dsi_client_reset,
2884 .get_lane_config = msm_fb_get_lane_config,
2885};
2886#endif
2887
2888static void __init msm_fb_add_devices(void)
2889{
2890 msm_fb_register_device("mdp", &mdp_pdata);
2891 msm_fb_register_device("lcdc", &lcdc_pdata);
2892 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2893}
2894
2895#define MSM_EBI2_PHYS 0xa0d00000
2896#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2897
2898static void __init msm7x27a_init_ebi2(void)
2899{
2900 uint32_t ebi2_cfg;
2901 void __iomem *ebi2_cfg_ptr;
2902
2903 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2904 if (!ebi2_cfg_ptr)
2905 return;
2906
2907 ebi2_cfg = readl(ebi2_cfg_ptr);
2908 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2909 ebi2_cfg |= (1 << 4); /* CS2 */
2910
2911 writel(ebi2_cfg, ebi2_cfg_ptr);
2912 iounmap(ebi2_cfg_ptr);
2913
2914 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2915 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2916 sizeof(uint32_t));
2917 if (!ebi2_cfg_ptr)
2918 return;
2919
2920 ebi2_cfg = readl(ebi2_cfg_ptr);
2921 if (machine_is_msm7x27a_surf())
2922 ebi2_cfg |= (1 << 31);
2923
2924 writel(ebi2_cfg, ebi2_cfg_ptr);
2925 iounmap(ebi2_cfg_ptr);
2926}
2927
2928#define ATMEL_TS_I2C_NAME "maXTouch"
2929static struct vreg *vreg_l12;
2930static struct vreg *vreg_s3;
2931
2932#define ATMEL_TS_GPIO_IRQ 82
2933
2934static int atmel_ts_power_on(bool on)
2935{
2936 int rc;
2937
2938 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2939 if (rc) {
2940 pr_err("%s: vreg %sable failed (%d)\n",
2941 __func__, on ? "en" : "dis", rc);
2942 return rc;
2943 }
2944
2945 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2946 if (rc) {
2947 pr_err("%s: vreg %sable failed (%d) for S3\n",
2948 __func__, on ? "en" : "dis", rc);
2949 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2950 return rc;
2951 }
2952 /* vreg stabilization delay */
2953 msleep(50);
2954 return 0;
2955}
2956
2957static int atmel_ts_platform_init(struct i2c_client *client)
2958{
2959 int rc;
2960
2961 vreg_l12 = vreg_get(NULL, "gp2");
2962 if (IS_ERR(vreg_l12)) {
2963 pr_err("%s: vreg_get for L2 failed\n", __func__);
2964 return PTR_ERR(vreg_l12);
2965 }
2966
2967 rc = vreg_set_level(vreg_l12, 2850);
2968 if (rc) {
2969 pr_err("%s: vreg set level failed (%d) for l2\n",
2970 __func__, rc);
2971 goto vreg_put_l2;
2972 }
2973
2974 vreg_s3 = vreg_get(NULL, "msme1");
2975 if (IS_ERR(vreg_s3)) {
2976 pr_err("%s: vreg_get for S3 failed\n", __func__);
2977 rc = PTR_ERR(vreg_s3);
2978 goto vreg_put_l2;
2979 }
2980
2981 rc = vreg_set_level(vreg_s3, 1800);
2982 if (rc) {
2983 pr_err("%s: vreg set level failed (%d) for S3\n",
2984 __func__, rc);
2985 goto vreg_put_s3;
2986 }
2987
2988 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
2989 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
2990 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
2991 if (rc) {
2992 pr_err("%s: gpio_tlmm_config for %d failed\n",
2993 __func__, ATMEL_TS_GPIO_IRQ);
2994 goto vreg_put_s3;
2995 }
2996
2997 /* configure touchscreen interrupt gpio */
2998 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
2999 if (rc) {
3000 pr_err("%s: unable to request gpio %d\n",
3001 __func__, ATMEL_TS_GPIO_IRQ);
3002 goto ts_gpio_tlmm_unconfig;
3003 }
3004
3005 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3006 if (rc < 0) {
3007 pr_err("%s: unable to set the direction of gpio %d\n",
3008 __func__, ATMEL_TS_GPIO_IRQ);
3009 goto free_ts_gpio;
3010 }
3011 return 0;
3012
3013free_ts_gpio:
3014 gpio_free(ATMEL_TS_GPIO_IRQ);
3015ts_gpio_tlmm_unconfig:
3016 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3017 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3018 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3019vreg_put_s3:
3020 vreg_put(vreg_s3);
3021vreg_put_l2:
3022 vreg_put(vreg_l12);
3023 return rc;
3024}
3025
3026static int atmel_ts_platform_exit(struct i2c_client *client)
3027{
3028 gpio_free(ATMEL_TS_GPIO_IRQ);
3029 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3030 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3031 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3032 vreg_disable(vreg_s3);
3033 vreg_put(vreg_s3);
3034 vreg_disable(vreg_l12);
3035 vreg_put(vreg_l12);
3036 return 0;
3037}
3038
3039static u8 atmel_ts_read_chg(void)
3040{
3041 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3042}
3043
3044static u8 atmel_ts_valid_interrupt(void)
3045{
3046 return !atmel_ts_read_chg();
3047}
3048
3049#define ATMEL_X_OFFSET 13
3050#define ATMEL_Y_OFFSET 0
3051
3052static struct mxt_platform_data atmel_ts_pdata = {
3053 .numtouch = 4,
3054 .init_platform_hw = atmel_ts_platform_init,
3055 .exit_platform_hw = atmel_ts_platform_exit,
3056 .power_on = atmel_ts_power_on,
3057 .display_res_x = 480,
3058 .display_res_y = 864,
3059 .min_x = ATMEL_X_OFFSET,
3060 .max_x = (505 - ATMEL_X_OFFSET),
3061 .min_y = ATMEL_Y_OFFSET,
3062 .max_y = (863 - ATMEL_Y_OFFSET),
3063 .valid_interrupt = atmel_ts_valid_interrupt,
3064 .read_chg = atmel_ts_read_chg,
3065};
3066
3067static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3068 {
3069 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3070 .platform_data = &atmel_ts_pdata,
3071 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3072 },
3073};
3074
3075#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3076
3077static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3078static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3079
3080static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3081 ARRAY_SIZE(kp_row_gpios)] = {
3082 [KP_INDEX(0, 0)] = KEY_7,
3083 [KP_INDEX(0, 1)] = KEY_DOWN,
3084 [KP_INDEX(0, 2)] = KEY_UP,
3085 [KP_INDEX(0, 3)] = KEY_RIGHT,
3086 [KP_INDEX(0, 4)] = KEY_ENTER,
3087
3088 [KP_INDEX(1, 0)] = KEY_LEFT,
3089 [KP_INDEX(1, 1)] = KEY_SEND,
3090 [KP_INDEX(1, 2)] = KEY_1,
3091 [KP_INDEX(1, 3)] = KEY_4,
3092 [KP_INDEX(1, 4)] = KEY_CLEAR,
3093
3094 [KP_INDEX(2, 0)] = KEY_6,
3095 [KP_INDEX(2, 1)] = KEY_5,
3096 [KP_INDEX(2, 2)] = KEY_8,
3097 [KP_INDEX(2, 3)] = KEY_3,
3098 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3099
3100 [KP_INDEX(3, 0)] = KEY_9,
3101 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3102 [KP_INDEX(3, 2)] = KEY_0,
3103 [KP_INDEX(3, 3)] = KEY_2,
3104 [KP_INDEX(3, 4)] = KEY_SLEEP,
3105
3106 [KP_INDEX(4, 0)] = KEY_BACK,
3107 [KP_INDEX(4, 1)] = KEY_HOME,
3108 [KP_INDEX(4, 2)] = KEY_MENU,
3109 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3110 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3111};
3112
3113/* SURF keypad platform device information */
3114static struct gpio_event_matrix_info kp_matrix_info = {
3115 .info.func = gpio_event_matrix_func,
3116 .keymap = keymap,
3117 .output_gpios = kp_row_gpios,
3118 .input_gpios = kp_col_gpios,
3119 .noutputs = ARRAY_SIZE(kp_row_gpios),
3120 .ninputs = ARRAY_SIZE(kp_col_gpios),
3121 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3122 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3123 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3124 GPIOKPF_PRINT_UNMAPPED_KEYS,
3125};
3126
3127static struct gpio_event_info *kp_info[] = {
3128 &kp_matrix_info.info
3129};
3130
3131static struct gpio_event_platform_data kp_pdata = {
3132 .name = "7x27a_kp",
3133 .info = kp_info,
3134 .info_count = ARRAY_SIZE(kp_info)
3135};
3136
3137static struct platform_device kp_pdev = {
3138 .name = GPIO_EVENT_DEV_NAME,
3139 .id = -1,
3140 .dev = {
3141 .platform_data = &kp_pdata,
3142 },
3143};
3144
3145static struct msm_handset_platform_data hs_platform_data = {
3146 .hs_name = "7k_handset",
3147 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3148};
3149
3150static struct platform_device hs_pdev = {
3151 .name = "msm-handset",
3152 .id = -1,
3153 .dev = {
3154 .platform_data = &hs_platform_data,
3155 },
3156};
3157
3158#define LED_GPIO_PDM 96
3159#define UART1DM_RX_GPIO 45
3160static void __init msm7x2x_init(void)
3161{
Trilok Sonia416c492011-07-22 20:20:23 +05303162 msm7x2x_misc_init();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003163
3164 /* Common functions for SURF/FFA/RUMI3 */
3165 msm_device_i2c_init();
3166 msm7x27a_init_mmc();
3167 msm7x27a_init_ebi2();
3168 msm7x27a_cfg_uart2dm_serial();
3169#ifdef CONFIG_SERIAL_MSM_HS
3170 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3171 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3172#endif
3173
3174 if (machine_is_msm7x27a_rumi3()) {
3175 platform_add_devices(rumi_sim_devices,
3176 ARRAY_SIZE(rumi_sim_devices));
3177 }
3178 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3179#ifdef CONFIG_USB_MSM_OTG_72K
3180 msm_otg_pdata.swfi_latency =
3181 msm7x27a_pm_data
3182 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3183 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3184#endif
3185 msm_device_gadget_peripheral.dev.platform_data =
3186 &msm_gadget_pdata;
3187 msm7x27a_cfg_smsc911x();
3188 platform_add_devices(msm_footswitch_devices,
3189 msm_num_footswitch_devices);
3190 platform_add_devices(surf_ffa_devices,
3191 ARRAY_SIZE(surf_ffa_devices));
3192 msm_fb_add_devices();
3193#ifdef CONFIG_USB_EHCI_MSM_72K
3194 msm7x2x_init_host();
3195#endif
3196 }
3197
3198 msm_pm_set_platform_data(msm7x27a_pm_data,
3199 ARRAY_SIZE(msm7x27a_pm_data));
3200
3201#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3202 register_i2c_devices();
3203#endif
3204#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3205 bt_power_init();
3206#endif
3207 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3208 atmel_ts_pdata.min_x = 0;
3209 atmel_ts_pdata.max_x = 480;
3210 atmel_ts_pdata.min_y = 0;
3211 atmel_ts_pdata.max_y = 320;
3212 }
3213
3214 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3215 atmel_ts_i2c_info,
3216 ARRAY_SIZE(atmel_ts_i2c_info));
3217
3218 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3219 i2c_camera_devices,
3220 ARRAY_SIZE(i2c_camera_devices));
3221 platform_device_register(&kp_pdev);
3222 platform_device_register(&hs_pdev);
3223
3224 /* configure it as a pdm function*/
3225 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3226 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3227 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3228 pr_err("%s: gpio_tlmm_config for %d failed\n",
3229 __func__, LED_GPIO_PDM);
3230 else
3231 platform_device_register(&led_pdev);
3232
3233#ifdef CONFIG_MSM_RPC_VIBRATOR
3234 if (machine_is_msm7x27a_ffa())
3235 msm_init_pmic_vibrator();
3236#endif
3237 /*7x25a kgsl initializations*/
3238 msm7x25a_kgsl_3d0_init();
3239}
3240
3241static void __init msm7x2x_init_early(void)
3242{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003243 msm_msm7x2x_allocate_memory_regions();
3244}
3245
3246MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3247 .boot_params = PHYS_OFFSET + 0x100,
3248 .map_io = msm_common_io_init,
3249 .reserve = msm7x27a_reserve,
3250 .init_irq = msm_init_irq,
3251 .init_machine = msm7x2x_init,
3252 .timer = &msm_timer,
3253 .init_early = msm7x2x_init_early,
3254MACHINE_END
3255MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3256 .boot_params = PHYS_OFFSET + 0x100,
3257 .map_io = msm_common_io_init,
3258 .reserve = msm7x27a_reserve,
3259 .init_irq = msm_init_irq,
3260 .init_machine = msm7x2x_init,
3261 .timer = &msm_timer,
3262 .init_early = msm7x2x_init_early,
3263MACHINE_END
3264MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3265 .boot_params = PHYS_OFFSET + 0x100,
3266 .map_io = msm_common_io_init,
3267 .reserve = msm7x27a_reserve,
3268 .init_irq = msm_init_irq,
3269 .init_machine = msm7x2x_init,
3270 .timer = &msm_timer,
3271 .init_early = msm7x2x_init_early,
3272MACHINE_END