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gerrit-public.fairphone.software / kernel / msm / 096c5dfc7c7926f5dbd9b69d9f3c1bf85fab7db2 / . / arch / arm / boot / dts / msm8226.dtsi
blob: eff4fae517ad15ad2657390043bf63aeb2d4779e [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]52 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
53 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]54 };
55
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]56 memory {
57 secure_mem: secure_region {
58 linux,contiguous-region;
59 reg = <0 0x3800000>;
60 label = "secure_mem";
61 };
62 };
63
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]64 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]65 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]66 interrupts = <1 2 0 1 3 0>;
67 clock-frequency = <19200000>;
68 };
69
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]70 timer@f9020000 {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges;
74 compatible = "arm,armv7-timer-mem";
75 reg = <0xf9020000 0x1000>;
76 clock-frequency = <19200000>;
77
78 frame@f9021000 {
79 frame-number = <0>;
80 interrupts = <0 8 0x4>,
81 <0 7 0x4>;
82 reg = <0xf9021000 0x1000>,
83 <0xf9022000 0x1000>;
84 };
85
86 frame@f9023000 {
87 frame-number = <1>;
88 interrupts = <0 9 0x4>;
89 reg = <0xf9023000 0x1000>;
90 status = "disabled";
91 };
92
93 frame@f9024000 {
94 frame-number = <2>;
95 interrupts = <0 10 0x4>;
96 reg = <0xf9024000 0x1000>;
97 status = "disabled";
98 };
99
100 frame@f9025000 {
101 frame-number = <3>;
102 interrupts = <0 11 0x4>;
103 reg = <0xf9025000 0x1000>;
104 status = "disabled";
105 };
106
107 frame@f9026000 {
108 frame-number = <4>;
109 interrupts = <0 12 0x4>;
110 reg = <0xf9026000 0x1000>;
111 status = "disabled";
112 };
113
114 frame@f9027000 {
115 frame-number = <5>;
116 interrupts = <0 13 0x4>;
117 reg = <0xf9027000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9028000 {
122 frame-number = <6>;
123 interrupts = <0 14 0x4>;
124 reg = <0xf9028000 0x1000>;
125 status = "disabled";
126 };
127 };
128
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]129 qcom,vidc@fdc00000 {
130 compatible = "qcom,msm-vidc";
131 reg = <0xfdc00000 0xff000>;
132 interrupts = <0 44 0>;
133 qcom,load-freq-tbl = <352800 160000000>,
134 <244800 133330000>,
135 <108000 66700000>;
136 qcom,hfi = "venus";
137 qcom,bus-ports = <1>;
138 qcom,reg-presets = <0xE0024 0x0>,
139 <0x80124 0x3>,
140 <0xE0020 0x5555556>,
141 <0x800B0 0x10101001>,
142 <0x800B4 0x00101010>,
143 <0x800C0 0x1010100f>,
144 <0x800C4 0x00101010>,
145 <0x800D0 0x00000010>,
146 <0x800D4 0x00000010>,
147 <0x800D8 0x00000707>;
148 qcom,enc-ddr-ab-ib = <0 0>,
149 <129000 142000>,
150 <384000 422000>,
151 <866000 953000>;
152 qcom,dec-ddr-ab-ib = <0 0>,
153 <103000 134000>,
154 <268000 348000>,
155 <505000 657000>;
156 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
157 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
158 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
159 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]160 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]161 };
162
163 qcom,wfd {
164 compatible = "qcom,msm-wfd";
165 };
166
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]167 serial@f991f000 {
168 compatible = "qcom,msm-lsuart-v14";
169 reg = <0xf991f000 0x1000>;
170 interrupts = <0 109 0>;
171 status = "disabled";
172 };
173
174 serial@f995e000 {
175 compatible = "qcom,msm-lsuart-v14";
176 reg = <0xf995e000 0x1000>;
177 interrupts = <0 114 0>;
178 status = "disabled";
179 };
180
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]181 qcom,msm-imem@fe805000 {
182 compatible = "qcom,msm-imem";
183 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
184 };
185
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]186 qcom,sps@f9984000 {
187 compatible = "qcom,msm_sps";
188 reg = <0xf9984000 0x15000>,
189 <0xf9999000 0xb000>;
190 interrupts = <0 94 0>;
191 };
192
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]193 qcom,usbbam@f9a44000 {
194 compatible = "qcom,usb-bam-msm";
195 reg = <0xf9a44000 0x11000>;
196 reg-names = "hsusb";
197 interrupts = <0 135 0>;
198 interrupt-names = "hsusb";
199 qcom,usb-bam-num-pipes = <16>;
200 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
201 qcom,ignore-core-reset-ack;
202 qcom,disable-clk-gating;
203
204 qcom,pipe0 {
205 label = "hsusb-qdss-in-0";
206 qcom,usb-bam-mem-type = <3>;
207 qcom,bam-type = <1>;
208 qcom,dir = <1>;
209 qcom,pipe-num = <0>;
210 qcom,peer-bam = <1>;
211 qcom,src-bam-physical-address = <0xfc37c000>;
212 qcom,src-bam-pipe-index = <0>;
213 qcom,dst-bam-physical-address = <0xf9a44000>;
214 qcom,dst-bam-pipe-index = <2>;
215 qcom,data-fifo-offset = <0x0>;
216 qcom,data-fifo-size = <0x600>;
217 qcom,descriptor-fifo-offset = <0x600>;
218 qcom,descriptor-fifo-size = <0x200>;
219 };
220 };
221
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]222 usb@f9a55000 {
223 compatible = "qcom,hsusb-otg";
224 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]225 interrupts = <0 134 0>, <0 140 0>;
226 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]227 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]228 HSUSB_1p8-supply = <&pm8226_l10>;
229 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]230 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]231
232 qcom,hsusb-otg-phy-type = <2>;
233 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]234 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]235 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]236 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]237
238 qcom,msm-bus,name = "usb2";
239 qcom,msm-bus,num-cases = <2>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]240 qcom,msm-bus,num-paths = <1>;
241 qcom,msm-bus,vectors-KBps =
242 <87 512 0 0>,
243 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]244 };
245
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]246 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]247 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]248 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]249 };
250
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]251 wcd9xxx_intc: wcd9xxx-irq {
252 compatible = "qcom,wcd9xxx-irq";
253 interrupt-controller;
254 #interrupt-cells = <1>;
255 interrupt-parent = <&msmgpio>;
256 interrupts = <68 0>;
257 interrupt-names = "cdc-int";
258 };
259
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]260 slim@fe12f000 {
261 cell-index = <1>;
262 compatible = "qcom,slim-ngd";
263 reg = <0xfe12f000 0x35000>,
264 <0xfe104000 0x20000>;
265 reg-names = "slimbus_physical", "slimbus_bam_physical";
266 interrupts = <0 163 0>, <0 164 0>;
267 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]268
269 tapan_codec {
270 compatible = "qcom,tapan-slim-pgd";
271 elemental-addr = [00 01 E0 00 17 02];
272
273 interrupt-parent = <&wcd9xxx_intc>;
274 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
275 17 18 19 20 21 22 23 24 25 26 27 28>;
276 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
277
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]278 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]279 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
280 qcom,cdc-vdd-buck-current = <650000>;
281
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]282 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]283 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
284 qcom,cdc-vdd-h-current = <25000>;
285
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]286 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]287 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
288 qcom,cdc-vdd-px-current = <25000>;
289
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]290 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]291 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
292 qcom,cdc-vdd-a-1p2v-current = <10000>;
293
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]294 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]295 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
296 qcom,cdc-vdd-cx-current = <10000>;
297
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]298 qcom,cdc-static-supplies = "cdc-vdd-buck",
299 "cdc-vdd-h",
300 "cdc-vdd-px",
301 "cdc-vdd-a-1p2v",
302 "cdc-vdd-cx";
303
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]304 qcom,cdc-micbias-ldoh-v = <0x3>;
305 qcom,cdc-micbias-cfilt1-mv = <1800>;
306 qcom,cdc-micbias-cfilt2-mv = <1800>;
307 qcom,cdc-micbias-cfilt3-mv = <1800>;
308
309 qcom,cdc-micbias1-cfilt-sel = <0x0>;
310 qcom,cdc-micbias2-cfilt-sel = <0x1>;
311 qcom,cdc-micbias3-cfilt-sel = <0x2>;
312
313 qcom,cdc-mclk-clk-rate = <9600000>;
314 qcom,cdc-slim-ifd = "tapan-slim-ifd";
315 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
316 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]317 };
318
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]319 qcom,msm-adsp-loader {
320 compatible = "qcom,adsp-loader";
321 qcom,adsp-state = <0>;
322 };
323
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]324 sound {
325 compatible = "qcom,msm8226-audio-tapan";
326 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]327 qcom,tapan-mclk-clk-freq = <9600000>;
328 };
329
330 qcom,msm-pcm {
331 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]332 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]333 };
334
335 qcom,msm-pcm-routing {
336 compatible = "qcom,msm-pcm-routing";
337 };
338
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]339 qcom,msm-pcm-low-latency {
340 compatible = "qcom,msm-pcm-dsp";
341 qcom,msm-pcm-dsp-id = <1>;
342 qcom,msm-pcm-low-latency;
343 };
344
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]345 qcom,msm-pcm-lpa {
346 compatible = "qcom,msm-pcm-lpa";
347 };
348
349 qcom,msm-compr-dsp {
350 compatible = "qcom,msm-compr-dsp";
351 };
352
353 qcom,msm-voip-dsp {
354 compatible = "qcom,msm-voip-dsp";
355 };
356
357 qcom,msm-pcm-voice {
358 compatible = "qcom,msm-pcm-voice";
359 };
360
361 qcom,msm-stub-codec {
362 compatible = "qcom,msm-stub-codec";
363 };
364
365 qcom,msm-dai-fe {
366 compatible = "qcom,msm-dai-fe";
367 };
368
369 qcom,msm-pcm-afe {
370 compatible = "qcom,msm-pcm-afe";
371 };
372
373 qcom,msm-dai-q6-hdmi {
374 compatible = "qcom,msm-dai-q6-hdmi";
375 qcom,msm-dai-q6-dev-id = <8>;
376 };
377
378 qcom,msm-dai-q6 {
379 compatible = "qcom,msm-dai-q6";
380 qcom,msm-dai-q6-sb-0-rx {
381 compatible = "qcom,msm-dai-q6-dev";
382 qcom,msm-dai-q6-dev-id = <16384>;
383 };
384
385 qcom,msm-dai-q6-sb-0-tx {
386 compatible = "qcom,msm-dai-q6-dev";
387 qcom,msm-dai-q6-dev-id = <16385>;
388 };
389
390 qcom,msm-dai-q6-sb-1-rx {
391 compatible = "qcom,msm-dai-q6-dev";
392 qcom,msm-dai-q6-dev-id = <16386>;
393 };
394
395 qcom,msm-dai-q6-sb-1-tx {
396 compatible = "qcom,msm-dai-q6-dev";
397 qcom,msm-dai-q6-dev-id = <16387>;
398 };
399
400 qcom,msm-dai-q6-sb-3-rx {
401 compatible = "qcom,msm-dai-q6-dev";
402 qcom,msm-dai-q6-dev-id = <16390>;
403 };
404
405 qcom,msm-dai-q6-sb-3-tx {
406 compatible = "qcom,msm-dai-q6-dev";
407 qcom,msm-dai-q6-dev-id = <16391>;
408 };
409
410 qcom,msm-dai-q6-sb-4-rx {
411 compatible = "qcom,msm-dai-q6-dev";
412 qcom,msm-dai-q6-dev-id = <16392>;
413 };
414
415 qcom,msm-dai-q6-sb-4-tx {
416 compatible = "qcom,msm-dai-q6-dev";
417 qcom,msm-dai-q6-dev-id = <16393>;
418 };
419
420 qcom,msm-dai-q6-bt-sco-rx {
421 compatible = "qcom,msm-dai-q6-dev";
422 qcom,msm-dai-q6-dev-id = <12288>;
423 };
424
425 qcom,msm-dai-q6-bt-sco-tx {
426 compatible = "qcom,msm-dai-q6-dev";
427 qcom,msm-dai-q6-dev-id = <12289>;
428 };
429
430 qcom,msm-dai-q6-int-fm-rx {
431 compatible = "qcom,msm-dai-q6-dev";
432 qcom,msm-dai-q6-dev-id = <12292>;
433 };
434
435 qcom,msm-dai-q6-int-fm-tx {
436 compatible = "qcom,msm-dai-q6-dev";
437 qcom,msm-dai-q6-dev-id = <12293>;
438 };
439
440 qcom,msm-dai-q6-be-afe-pcm-rx {
441 compatible = "qcom,msm-dai-q6-dev";
442 qcom,msm-dai-q6-dev-id = <224>;
443 };
444
445 qcom,msm-dai-q6-be-afe-pcm-tx {
446 compatible = "qcom,msm-dai-q6-dev";
447 qcom,msm-dai-q6-dev-id = <225>;
448 };
449
450 qcom,msm-dai-q6-afe-proxy-rx {
451 compatible = "qcom,msm-dai-q6-dev";
452 qcom,msm-dai-q6-dev-id = <241>;
453 };
454
455 qcom,msm-dai-q6-afe-proxy-tx {
456 compatible = "qcom,msm-dai-q6-dev";
457 qcom,msm-dai-q6-dev-id = <240>;
458 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]459
460 qcom,msm-dai-q6-incall-record-rx {
461 compatible = "qcom,msm-dai-q6-dev";
462 qcom,msm-dai-q6-dev-id = <32771>;
463 };
464
465 qcom,msm-dai-q6-incall-record-tx {
466 compatible = "qcom,msm-dai-q6-dev";
467 qcom,msm-dai-q6-dev-id = <32772>;
468 };
469
470 qcom,msm-dai-q6-incall-music-rx {
471 compatible = "qcom,msm-dai-q6-dev";
472 qcom,msm-dai-q6-dev-id = <32773>;
473 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]474 };
475
476 qcom,msm-pcm-hostless {
477 compatible = "qcom,msm-pcm-hostless";
478 };
479
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]480 qcom,wcnss-wlan@fb000000 {
481 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]482 reg = <0xfb000000 0x280000>,
483 <0xf9011008 0x04>;
484 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]485 interrupts = <0 145 0 0 146 0>;
486 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
487
488 qcom,pronto-vddmx-supply = <&pm8226_l3>;
489 qcom,pronto-vddcx-supply = <&pm8226_s1>;
490 qcom,pronto-vddpx-supply = <&pm8226_l6>;
491 qcom,iris-vddxo-supply = <&pm8226_l10>;
492 qcom,iris-vddrfa-supply = <&pm8226_l24>;
493 qcom,iris-vddpa-supply = <&pm8226_l16>;
494 qcom,iris-vdddig-supply = <&pm8226_l24>;
495
496 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
497 qcom,has_pronto_hw;
498 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]499
500 qcom,msm-adsp-sensors {
501 compatible = "qcom,msm-adsp-sensors";
502 qcom,src-id = <11>;
503 qcom,dst-id = <604>;
504 qcom,ab = <32505856>;
505 qcom,ib = <32505856>;
506 };
507
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]508 qcom,wdt@f9017000 {
509 compatible = "qcom,msm-watchdog";
510 reg = <0xf9017000 0x1000>;
511 interrupts = <0 3 0>, <0 4 0>;
512 qcom,bark-time = <11000>;
513 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]514 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]515 };
516
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]517 qcom,smem@fa00000 {
518 compatible = "qcom,smem";
519 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]520 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]521 <0xfc428000 0x4000>;
522 reg-names = "smem", "irq-reg-base", "aux-mem1";
523
524 qcom,smd-modem {
525 compatible = "qcom,smd";
526 qcom,smd-edge = <0>;
527 qcom,smd-irq-offset = <0x8>;
528 qcom,smd-irq-bitmask = <0x1000>;
529 qcom,pil-string = "modem";
530 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]531 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]532
533 qcom,smsm-modem {
534 compatible = "qcom,smsm";
535 qcom,smsm-edge = <0>;
536 qcom,smsm-irq-offset = <0x8>;
537 qcom,smsm-irq-bitmask = <0x2000>;
538 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]539 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]540
541 qcom,smd-adsp {
542 compatible = "qcom,smd";
543 qcom,smd-edge = <1>;
544 qcom,smd-irq-offset = <0x8>;
545 qcom,smd-irq-bitmask = <0x100>;
546 qcom,pil-string = "adsp";
547 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]548 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]549
550 qcom,smsm-adsp {
551 compatible = "qcom,smsm";
552 qcom,smsm-edge = <1>;
553 qcom,smsm-irq-offset = <0x8>;
554 qcom,smsm-irq-bitmask = <0x200>;
555 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]556 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]557
558 qcom,smd-wcnss {
559 compatible = "qcom,smd";
560 qcom,smd-edge = <6>;
561 qcom,smd-irq-offset = <0x8>;
562 qcom,smd-irq-bitmask = <0x20000>;
563 qcom,pil-string = "wcnss";
564 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]565 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]566
567 qcom,smsm-wcnss {
568 compatible = "qcom,smsm";
569 qcom,smsm-edge = <6>;
570 qcom,smsm-irq-offset = <0x8>;
571 qcom,smsm-irq-bitmask = <0x80000>;
572 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]573 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]574
575 qcom,smd-rpm {
576 compatible = "qcom,smd";
577 qcom,smd-edge = <15>;
578 qcom,smd-irq-offset = <0x8>;
579 qcom,smd-irq-bitmask = <0x1>;
580 interrupts = <0 168 1>;
581 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]582 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]583 };
584
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]585 rpm_bus: qcom,rpm-smd {
586 compatible = "qcom,rpm-smd";
587 rpm-channel-name = "rpm_requests";
588 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]589 };
590
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]591 sdcc1: qcom,sdcc@f9824000 {
592 cell-index = <1>; /* SDC1 eMMC slot */
593 compatible = "qcom,msm-sdcc";
594
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]595 reg = <0xf9824000 0x800>,
596 <0xf9824800 0x100>,
597 <0xf9804000 0x7000>;
598 reg-names = "core_mem", "dml_mem", "bam_mem";
599 interrupts = <0 123 0>, <0 137 0>;
600 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]601
602 qcom,bus-width = <8>;
603 status = "disabled";
604 };
605
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]606 sdhc_1: sdhci@f9824900 {
607 compatible = "qcom,sdhci-msm";
608 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
609 reg-names = "hc_mem", "core_mem";
610
611 interrupts = <0 123 0>, <0 138 0>;
612 interrupt-names = "hc_irq", "pwr_irq";
613
614 qcom,bus-width = <8>;
615 status = "disabled";
616 };
617
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]618 sdcc2: qcom,sdcc@f98a4000 {
619 cell-index = <2>; /* SDC2 SD card slot */
620 compatible = "qcom,msm-sdcc";
621
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]622 reg = <0xf98a4000 0x800>,
623 <0xf98a4800 0x100>,
624 <0xf9884000 0x7000>;
625 reg-names = "core_mem", "dml_mem", "bam_mem";
626 interrupts = <0 125 0>, <0 220 0>;
627 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]628
629 qcom,bus-width = <4>;
630 status = "disabled";
631 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]632
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]633 sdhc_2: sdhci@f98a4900 {
634 compatible = "qcom,sdhci-msm";
635 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
636 reg-names = "hc_mem", "core_mem";
637
638 interrupts = <0 125 0>, <0 221 0>;
639 interrupt-names = "hc_irq", "pwr_irq";
640
641 qcom,bus-width = <4>;
642 status = "disabled";
643 };
644
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]645 spmi_bus: qcom,spmi@fc4c0000 {
646 cell-index = <0>;
647 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]648 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]649 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]650 <0Xfc4cb000 0x1000>,
651 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]652 /* 190,ee0_krait_hlos_spmi_periph_irq */
653 /* 187,channel_0_krait_hlos_trans_done_irq */
654 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]655 qcom,pmic-arb-ee = <0>;
656 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]657 };
658
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]659 i2c@f9926000 { /* BLSP-1 QUP-4 */
660 cell-index = <0>;
661 compatible = "qcom,i2c-qup";
662 reg = <0xf9926000 0x1000>;
663 #address-cells = <1>;
664 #size-cells = <0>;
665 reg-names = "qup_phys_addr";
666 interrupts = <0 98 0>;
667 interrupt-names = "qup_err_intr";
668 qcom,i2c-bus-freq = <100000>;
669 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]670
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]671 i2c@f9927000 { /* BLSP1 QUP5 */
672 cell-index = <5>;
673 compatible = "qcom,i2c-qup";
674 #address-cells = <1>;
675 #size-cells = <0>;
676 reg-names = "qup_phys_addr";
677 reg = <0xf9927000 0x1000>;
678 interrupt-names = "qup_err_intr";
679 interrupts = <0 99 0>;
680 qcom,i2c-bus-freq = <100000>;
681 qcom,i2c-src-freq = <19200000>;
682 };
683
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]684 qcom,acpuclk@f9011050 {
685 compatible = "qcom,acpuclk-a7";
686 reg = <0xf9011050 0x8>;
687 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]688 a7_cpu-supply = <&apc_vreg_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]689 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]690 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]691
692 qcom,ocmem@fdd00000 {
693 compatible = "qcom,msm-ocmem";
694 reg = <0xfdd00000 0x2000>,
695 <0xfdd02000 0x2000>,
696 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]697 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]698 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
699 interrupts = <0 76 0 0 77 0>;
700 interrupt-names = "ocmem_irq", "dm_irq";
701 qcom,ocmem-num-regions = <0x1>;
702 qcom,ocmem-num-macros = <0x2>;
703 qcom,resource-type = <0x706d636f>;
704 #address-cells = <1>;
705 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]706 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]707
708 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]709 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]710 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]711 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]712 };
713 };
714
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]715 qcom,venus@fdce0000 {
716 compatible = "qcom,pil-venus";
717 reg = <0xfdce0000 0x4000>,
718 <0xfdc80000 0x400>;
719 reg-names = "wrapper_base", "vbif_base";
720 vdd-supply = <&gdsc_venus>;
721
722 qcom,firmware-name = "venus";
723 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]724
725 qcom,pronto@fb21b000 {
726 compatible = "qcom,pil-pronto";
727 reg = <0xfb21b000 0x3000>,
728 <0xfc401700 0x4>,
729 <0xfd485300 0xc>;
730 reg-names = "pmu_base", "clk_base", "halt_base";
731 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]732 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]733
734 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]735
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]736 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]737 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]738 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]739
740 /* GPIO output to wcnss */
741 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]742 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]743
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]744 qcom,iris-fm {
745 compatible = "qcom,iris_fm";
746 };
747
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]748 qcom,lpass@fe200000 {
749 compatible = "qcom,pil-q6v5-lpass";
750 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]751 <0xfd485100 0x00010>,
752 <0xfc4016c0 0x00004>;
753 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]754 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]755 interrupts = <0 162 1>;
756
757 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]758
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]759 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]760 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]761 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]762
763 /* GPIO output to lpass */
764 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]765 };
766
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]767 qcom,mss@fc880000 {
768 compatible = "qcom,pil-q6v5-mss";
769 reg = <0xfc880000 0x100>,
770 <0xfd485000 0x400>,
771 <0xfc820000 0x020>,
772 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]773 <0xfd485194 0x4>;
774 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]775 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]776
777 interrupts = <0 24 1>;
778 vdd_mss-supply = <&pm8226_s1>;
779 vdd_cx-supply = <&pm8226_s1_corner>;
780 vdd_mx-supply = <&pm8226_l3>;
781 vdd_pll-supply = <&pm8226_l8>;
782 qcom,vdd_pll = <1800000>;
783
784 qcom,is-loadable;
785 qcom,firmware-name = "mba";
786 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]787
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]788 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]789 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]790 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]791
792 /* GPIO output to mss */
793 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]794 };
795
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]796 qcom,msm-mem-hole {
797 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]798 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]799 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]800
801 tsens: tsens@fc4a8000 {
802 compatible = "qcom,msm-tsens";
803 reg = <0xfc4a8000 0x2000>,
804 <0xfc4b8000 0x1000>;
805 reg-names = "tsens_physical", "tsens_eeprom_physical";
806 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]807 qcom,sensors = <4>;
808 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]809 qcom,calib-mode = "fuse_map2";
810 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]811
812 qcom,msm-thermal {
813 compatible = "qcom,msm-thermal";
814 qcom,sensor-id = <0>;
815 qcom,poll-ms = <250>;
816 qcom,limit-temp = <60>;
817 qcom,temp-hysteresis = <10>;
818 qcom,freq-step = <2>;
819 };
820
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]821 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
822 compatible = "qcom,spi-qup-v2";
823 #address-cells = <1>;
824 #size-cells = <0>;
825 reg-names = "spi_physical", "spi_bam_physical";
826 reg = <0xf9923000 0x1000>,
827 <0xf9904000 0xF000>;
828 interrupt-names = "spi_irq", "spi_bam_irq";
829 interrupts = <0 95 0>, <0 238 0>;
830 spi-max-frequency = <19200000>;
831
832 gpios = <&msmgpio 3 0>, /* CLK */
833 <&msmgpio 1 0>, /* MISO */
834 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]835 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]836
837 qcom,infinite-mode = <0>;
838 qcom,use-bam;
839 qcom,ver-reg-exists;
840 qcom,bam-consumer-pipe-index = <12>;
841 qcom,bam-producer-pipe-index = <13>;
842 };
843
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]844 qcom,bam_dmux@fc834000 {
845 compatible = "qcom,bam_dmux";
846 reg = <0xfc834000 0x7000>;
847 interrupts = <0 29 1>;
848 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]849
850 qcom,msm-rtb {
851 compatible = "qcom,msm-rtb";
852 qcom,memory-reservation-type = "EBI1";
853 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
854 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]855
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]856 qcom,msm-rng@f9bff000 {
857 compatible = "qcom,msm-rng";
858 reg = <0xf9bff000 0x200>;
859 qcom,msm-rng-iface-clk;
860 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]861
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]862 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]863 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]864 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]865 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]866
867 jtag_mm0: jtagmm@fc33c000 {
868 compatible = "qcom,jtag-mm";
869 reg = <0xfc33c000 0x1000>,
870 <0xfc330000 0x1000>;
871 reg-names = "etm-base","debug-base";
872 };
873
874 jtag_mm1: jtagmm@fc33d000 {
875 compatible = "qcom,jtag-mm";
876 reg = <0xfc33d000 0x1000>,
877 <0xfc332000 0x1000>;
878 reg-names = "etm-base","debug-base";
879 };
880
881 jtag_mm2: jtagmm@fc33e000 {
882 compatible = "qcom,jtag-mm";
883 reg = <0xfc33e000 0x1000>,
884 <0xfc334000 0x1000>;
885 reg-names = "etm-base","debug-base";
886 };
887
888 jtag_mm3: jtagmm@fc33f000 {
889 compatible = "qcom,jtag-mm";
890 reg = <0xfc33f000 0x1000>,
891 <0xfc336000 0x1000>;
892 reg-names = "etm-base","debug-base";
893 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]894
895 qcom,ipc-spinlock@fd484000 {
896 compatible = "qcom,ipc-spinlock-sfpb";
897 reg = <0xfd484000 0x400>;
898 qcom,num-locks = <8>;
899 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]900
901 qcom,qseecom@d980000 {
902 compatible = "qcom,qseecom";
903 reg = <0xd980000 0x256000>;
904 reg-names = "secapp-region";
905 qcom,disk-encrypt-pipe-pair = <2>;
906 qcom,hlos-ce-hw-instance = <0>;
907 qcom,qsee-ce-hw-instance = <0>;
908 qcom,msm-bus,name = "qseecom-noc";
909 qcom,msm-bus,num-cases = <4>;
910 qcom,msm-bus,active-only = <0>;
911 qcom,msm-bus,num-paths = <1>;
912 qcom,msm-bus,vectors-KBps =
913 <55 512 0 0>,
914 <55 512 3936000 393600>,
915 <55 512 3936000 393600>,
916 <55 512 3936000 393600>;
917 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]918};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]919
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]920&gdsc_venus {
921 status = "ok";
922};
923
924&gdsc_mdss {
925 status = "ok";
926};
927
928&gdsc_jpeg {
929 status = "ok";
930};
931
932&gdsc_vfe {
933 status = "ok";
934};
935
936&gdsc_oxili_cx {
937 status = "ok";
938};
939
940&gdsc_usb_hsic {
941 status = "ok";
942};
943
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]944/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]945/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]946/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]947
948&pm8226_vadc {
949 chan@0 {
950 label = "usb_in";
951 reg = <0>;
952 qcom,decimation = <0>;
953 qcom,pre-div-channel-scaling = <4>;
954 qcom,calibration-type = "absolute";
955 qcom,scale-function = <0>;
956 qcom,hw-settle-time = <0>;
957 qcom,fast-avg-setup = <0>;
958 };
959
960 chan@2 {
961 label = "vchg_sns";
962 reg = <2>;
963 qcom,decimation = <0>;
964 qcom,pre-div-channel-scaling = <3>;
965 qcom,calibration-type = "absolute";
966 qcom,scale-function = <0>;
967 qcom,hw-settle-time = <0>;
968 qcom,fast-avg-setup = <0>;
969 };
970
971 chan@5 {
972 label = "vcoin";
973 reg = <5>;
974 qcom,decimation = <0>;
975 qcom,pre-div-channel-scaling = <1>;
976 qcom,calibration-type = "absolute";
977 qcom,scale-function = <0>;
978 qcom,hw-settle-time = <0>;
979 qcom,fast-avg-setup = <0>;
980 };
981
982 chan@6 {
983 label = "vbat_sns";
984 reg = <6>;
985 qcom,decimation = <0>;
986 qcom,pre-div-channel-scaling = <1>;
987 qcom,calibration-type = "absolute";
988 qcom,scale-function = <0>;
989 qcom,hw-settle-time = <0>;
990 qcom,fast-avg-setup = <0>;
991 };
992
993 chan@7 {
994 label = "vph_pwr";
995 reg = <7>;
996 qcom,decimation = <0>;
997 qcom,pre-div-channel-scaling = <1>;
998 qcom,calibration-type = "absolute";
999 qcom,scale-function = <0>;
1000 qcom,hw-settle-time = <0>;
1001 qcom,fast-avg-setup = <0>;
1002 };
1003
1004 chan@30 {
1005 label = "batt_therm";
1006 reg = <0x30>;
1007 qcom,decimation = <0>;
1008 qcom,pre-div-channel-scaling = <0>;
1009 qcom,calibration-type = "ratiometric";
1010 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1011 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1012 qcom,fast-avg-setup = <0>;
1013 };
1014
1015 chan@31 {
1016 label = "batt_id";
1017 reg = <0x31>;
1018 qcom,decimation = <0>;
1019 qcom,pre-div-channel-scaling = <0>;
1020 qcom,calibration-type = "ratiometric";
1021 qcom,scale-function = <0>;
1022 qcom,hw-settle-time = <2>;
1023 qcom,fast-avg-setup = <0>;
1024 };
1025
1026 chan@b2 {
1027 label = "xo_therm_pu2";
1028 reg = <0xb2>;
1029 qcom,decimation = <0>;
1030 qcom,pre-div-channel-scaling = <0>;
1031 qcom,calibration-type = "ratiometric";
1032 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1033 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1034 qcom,fast-avg-setup = <0>;
1035 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1036
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1037 chan@39 {
1038 label = "usb_id_nopull";
1039 reg = <0x39>;
1040 qcom,decimation = <0>;
1041 qcom,pre-div-channel-scaling = <0>;
1042 qcom,calibration-type = "ratiometric";
1043 qcom,scale-function = <0>;
1044 qcom,hw-settle-time = <2>;
1045 qcom,fast-avg-setup = <0>;
1046 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1047};
1048
1049&pm8226_chg {
1050 status = "ok";
1051
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1052 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1053 status = "ok";
1054 };
1055
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1056 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1057 status = "ok";
1058 };
1059
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1060 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1061 status = "ok";
1062 };
1063
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1064 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1065 status = "ok";
1066 };
1067
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1068 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1069 status = "ok";
1070 };
1071
1072 qcom,chg-misc@1600 {
1073 status = "ok";
1074 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1075};