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Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +05301MSM SoC HSUSB controllers
2
3OTG:
4
5Required properties :
6- compatible : should be "qcom,hsusb-otg"
7- regs : offset and length of the register set in the memory map
8- interrupts: IRQ line
Jack Pham3f4459e2012-09-28 15:55:16 -07009- interrupt-names: OTG interrupt name(s) referenced in interrupts above
10 HSUSB OTG expects "core_irq" and optionally "async_irq".
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053011- qcom,hsusb-otg-phy-type: PHY type can be one of
12 1 - Chipidea 45nm PHY
13 2 - Synopsis 28nm PHY
14- qcom,hsusb-otg-mode: Operational mode. Can be one of
15 1 - Peripheral only mode
16 2 - Host only mode
17 3 - OTG mode
18 Based on the mode, OTG driver registers platform devices for
19 gadget and host.
20- qcom,hsusb-otg-control: OTG control (VBUS and ID notifications)
21 can be one of
22 1 - PHY control
23 2 - PMIC control
24 3 - User control (via debugfs)
25
26Optional properties :
Manu Gautam0ddbd922012-09-21 17:17:38 +053027- qcom,hsusb-otg-disable-reset: If present then core is RESET only during
28 init, otherwise core is RESET for every cable disconnect as well
29- qcom,hsusb-otg-pnoc-errata-fix: If present then workaround for PNOC
30 performance issue is applied which requires changing the mem-type
31 attribute via VMIDMT.
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053032- qcom,hsusb-otg-default-mode: The default USB mode after boot-up.
33 Applicable only when OTG is controlled by user. Can be one of
34 0 - None. Low power mode
35 1 - Peripheral
36 2 - Host
37- qcom,hsusb-otg-phy-init-seq: PHY configuration sequence. val, reg pairs
38 terminate with -1
39- qcom,hsusb-otg-power-budget: VBUS power budget in mA
40 0 will be treated as 500mA
41- qcom,hsusb-otg-pclk-src-name: The source of pclk
42- qcom,hsusb-otg-pmic-id-irq: ID, routed to PMIC IRQ number
Manu Gautam2e8ac102012-08-31 11:41:16 -070043- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
44 below optional properties:
45 - qcom,msm_bus,name
46 - qcom,msm_bus,num_cases
47 - qcom,msm_bus,active_only
48 - qcom,msm_bus,num_paths
49 - qcom,msm_bus,vectors
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053050
51Example HSUSB OTG controller device node :
David Brown225abee2012-02-09 22:28:50 -080052 usb@f9690000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053053 compatible = "qcom,hsusb-otg";
David Brown225abee2012-02-09 22:28:50 -080054 reg = <0xf9690000 0x400>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053055 interrupts = <134>;
Jack Pham3f4459e2012-09-28 15:55:16 -070056 interrupt-names = "core_irq";
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053057
58 qcom,hsusb-otg-phy-type = <2>;
59 qcom,hsusb-otg-mode = <1>;
60 qcom,hsusb-otg-otg-control = <1>;
Manu Gautambd53fba2012-07-31 16:13:06 +053061 qcom,hsusb-otg-disable-reset;
Manu Gautam0ddbd922012-09-21 17:17:38 +053062 qcom,hsusb-otg-pnoc-errata-fix;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053063 qcom,hsusb-otg-default-mode = <2>;
David Brown225abee2012-02-09 22:28:50 -080064 qcom,hsusb-otg-phy-init-seq = <0x01 0x90 0xffffffff>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053065 qcom,hsusb-otg-power-budget = <500>;
66 qcom,hsusb-otg-pclk-src-name = "dfab_usb_clk";
67 qcom,hsusb-otg-pmic-id-irq = <47>
Manu Gautam2e8ac102012-08-31 11:41:16 -070068
69 qcom,msm_bus,name = "usb2";
70 qcom,msm_bus,num_cases = <2>;
71 qcom,msm_bus,active_only = <0>;
72 qcom,msm_bus,num_paths = <1>;
73 qcom,msm_bus,vectors =
74 <87 512 0 0>,
75 <87 512 60000000 960000000>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053076 };
Shimrit Malichi255b5342012-08-02 21:01:43 +030077
Vijayavardhan Vennapusa1f5da0b2013-01-08 20:03:57 +053078MSM HSUSB EHCI controller
79
80Required properties :
81- compatible : should be "qcom,ehci-host"
82- reg : offset and length of the register set in the memory map
83- interrupts: IRQ lines used by this controller
84- interrupt-names : Required interrupt resource entries are:
85 HSUSB EHCI expects "core_irq" and optionally "async_irq".
86- <supply-name>-supply: handle to the regulator device tree node
87 Required "supply-name" is "HSUSB_VDDCX" "HSUSB_1p8-supply" "HSUSB_3p3-supply".
88- qcom,usb2-power-budget: maximum vbus power (in mA) that can be provided.
89
90Optional properties :
91- qcom,usb2-enable-hsphy2: If present, select second PHY for USB operation.
92
93Example MSM HSUSB EHCI controller device node :
94 ehci: qcom,ehci-host@f9a55000 {
95 compatible = "qcom,ehci-host";
96 reg = <0xf9a55000 0x400>;
97 interrupts = <0 134 0>, <0 140 0>;
98 interrupt-names = "core_irq", "async_irq";
99 HSUSB_VDDCX-supply = <&pm8841_s2>;
100 HSUSB_1p8-supply = <&pm8941_l6>;
101 HSUSB_3p3-supply = <&pm8941_l24>;
102 qcom,usb2-enable-hsphy2;
103 qcom,usb2-power-budget = <500>;
104 };
105
Manu Gautam43c61a12012-08-22 17:09:37 -0700106ANDROID USB:
107
108Required properties:
109- compatible: should be "qcom,android-usb"
110
111Optional properties :
Vijayavardhan Vennapusa8ceade82012-11-01 15:11:21 +0530112- reg : offset and length of memory region that is used by device to
Manu Gautam43c61a12012-08-22 17:09:37 -0700113 update USB PID and serial numbers used by bootloader in DLOAD mode.
Vijayavardhan Vennapusa8ceade82012-11-01 15:11:21 +0530114- qcom,android-usb-swfi-latency : value to be used by device to vote
115 for DMA latency in microsecs.
Manu Gautam43c61a12012-08-22 17:09:37 -0700116
117Example Android USB device node :
118 android_usb@fc42b0c8 {
119 compatible = "qcom,android-usb";
120 reg = <0xfc42b0c8 0xc8>;
Vijayavardhan Vennapusa8ceade82012-11-01 15:11:21 +0530121 qcom,android-usb-swfi-latency = <1>;
Manu Gautam43c61a12012-08-22 17:09:37 -0700122 };
123
124
Shimrit Malichi255b5342012-08-02 21:01:43 +0300125BAM:
126
127Required properties:
128- compatible: should be "qcom,usb-bam-msm"
Manu Gautam6afd5872012-07-25 09:16:55 +0530129- reg : pairs of physical base addresses and region sizes
130 of all the memory mapped BAM devices present
Jack Phamd61ff562012-11-21 19:25:53 +0200131- reg-names : Register region name(s), in 1-1 correspondence with the
132 registers in 'reg'. This list should contain at least as many names
133 as the number of unique values given in both 'usb-active-bam' and
134 all the subnodes' 'usb-bam-type' properties.
135
136 If SSUSB_BAM is used, "ssusb" should be present.
137 If HSUSB_BAM is used, "hsusb" should be present.
138 If HSIC_BAM is used, "hsic" should be present.
139
140 If a QSCRATCH RAM1 register is designated for providing USB3
141 private memory to use as a BAM FIFO, specify "qscratch_ram1_reg".
Manu Gautam6afd5872012-07-25 09:16:55 +0530142- interrupts: IRQ lines for BAM devices
Jack Phamd61ff562012-11-21 19:25:53 +0200143- interrupt-names: BAM interrupt name(s), in 1-1 correspondence with
144 'interrupts' above.
145
146 If SSUSB_BAM is used, "ssusb" should be present.
147 If HSUSB_BAM is used, "hsusb" should be present.
148 If HSIC_BAM is used, "hsic" should be present.
Shimrit Malichi255b5342012-08-02 21:01:43 +0300149- qcom,usb-active-bam: active BAM type. Can be one of
Manu Gautam6afd5872012-07-25 09:16:55 +0530150 0 - SSUSB_BAM
151 1 - HSUSB_BAM
152 2 - HSIC_BAM
Shimrit Malichi255b5342012-08-02 21:01:43 +0300153- qcom,usb-total-bam-num: total number of BAMs that are supported
154- qcom,usb-bam-num-pipes: max number of pipes that can be used
155- qcom,usb-base-address: physical base address of the BAM
156
157A number of USB BAM pipe parameters are represented as sub-nodes:
158
159Subnode Required:
Manu Gautam6afd5872012-07-25 09:16:55 +0530160- label: a string describing the pipe's direction and BAM instance under use
Shimrit Malichi255b5342012-08-02 21:01:43 +0300161- qcom,usb-bam-type: BAM type. Can be one of
Manu Gautam6afd5872012-07-25 09:16:55 +0530162 0 - SSUSB_BAM
163 1 - HSUSB_BAM
164 2 - HSIC_BAM
165- qcom,usb-bam-mem-type: Type of memory used by this PIPE. Can be one of
166 0 - Uses SPS's dedicated pipe memory
167 1 - USB's private memory residing @ 'qcom,usb-base-address'
168 2 - System RAM allocated by driver
Shimrit Malichi255b5342012-08-02 21:01:43 +0300169- qcom,src-bam-physical-address: source BAM physical address
170- qcom,src-bam-pipe-index: source BAM pipe index
171- qcom,dst-bam-physical-address: destination BAM physical address
172- qcom,dst-bam-pipe-index: destination BAM pipe index
173- qcom,data-fifo-offset: data fifo offset address
174- qcom,data-fifo-size: data fifo size
175- qcom,descriptor-fifo-offset: descriptor fifo offset address
176- qcom,descriptor-fifo-size: descriptor fifo size
177
Manu Gautam355270a2012-12-21 16:52:50 +0530178Optional Properties for Subnode:
179- qcom,reset-bam-on-connect: If present then BAM is RESET before connecting
180 pipe. This may be required if BAM peripheral is also reset before connect.
181
Manu Gautamd21e2282012-08-23 13:38:50 -0700182Optional properties :
183- qcom,ignore-core-reset-ack: If present then BAM ignores ACK from USB core
184 while performing PIPE RESET
185
Shimrit Malichi255b5342012-08-02 21:01:43 +0300186Example USB BAM controller device node:
187
188 qcom,usbbam@f9304000 {
189 compatible = "qcom,usb-bam-msm";
Manu Gautam6afd5872012-07-25 09:16:55 +0530190 reg = <0xf9304000 0x5000>,
Manu Gautam4658d892012-08-20 18:24:52 -0700191 <0xf9a44000 0x11000>,
192 <0xf92f880c 0x4>;
193 reg-names = "ssusb", "hsusb", "qscratch_ram1_reg";
Manu Gautam6afd5872012-07-25 09:16:55 +0530194 interrupts = <0 132 0 0 135 0>;
195 interrupt-names = "ssusb", "hsusb";
Shimrit Malichi255b5342012-08-02 21:01:43 +0300196 qcom,usb-active-bam = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530197 qcom,usb-total-bam-num = <2>;
Shimrit Malichi255b5342012-08-02 21:01:43 +0300198 qcom,usb-bam-num-pipes = <16>;
199 qcom,usb-base-address = <0xf9200000>;
Manu Gautamd21e2282012-08-23 13:38:50 -0700200 qcom,ignore-core-reset-ack;
Shimrit Malichi255b5342012-08-02 21:01:43 +0300201
202 qcom,pipe1 {
203 label = "usb-to-peri-qdss-dwc3";
204 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530205 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi255b5342012-08-02 21:01:43 +0300206 qcom,src-bam-physical-address = <0>;
207 qcom,src-bam-pipe-index = <0>;
208 qcom,dst-bam-physical-address = <0>;
209 qcom,dst-bam-pipe-index = <0>;
210 qcom,data-fifo-offset = <0>;
211 qcom,data-fifo-size = <0>;
212 qcom,descriptor-fifo-offset = <0>;
213 qcom,descriptor-fifo-size = <0>;
214 };
215
216 qcom,pipe2 {
217 label = "peri-to-usb-qdss-dwc3";
218 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530219 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi255b5342012-08-02 21:01:43 +0300220 qcom,src-bam-physical-address = <0xfc37C000>;
221 qcom,src-bam-pipe-index = <0>;
222 qcom,dst-bam-physical-address = <0xf9304000>;
223 qcom,dst-bam-pipe-index = <2>;
224 qcom,data-fifo-offset = <0xf0000>;
225 qcom,data-fifo-size = <0x4000>;
226 qcom,descriptor-fifo-offset = <0xf4000>;
227 qcom,descriptor-fifo-size = <0x1400>;
Manu Gautam355270a2012-12-21 16:52:50 +0530228 qcom,reset-bam-on-connect;
Shimrit Malichi255b5342012-08-02 21:01:43 +0300229 };
Manu Gautam6afd5872012-07-25 09:16:55 +0530230
231 qcom,pipe3 {
232 label = "usb-to-peri-qdss-hsusb";
233 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -0700234 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530235 qcom,src-bam-physical-address = <0>;
236 qcom,src-bam-pipe-index = <0>;
237 qcom,dst-bam-physical-address = <0>;
238 qcom,dst-bam-pipe-index = <0>;
239 qcom,data-fifo-offset = <0>;
240 qcom,data-fifo-size = <0>;
241 qcom,descriptor-fifo-offset = <0>;
242 qcom,descriptor-fifo-size = <0>;
243 };
244
245 qcom,pipe4 {
246 label = "peri-to-usb-qdss-hsusb";
247 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -0700248 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530249 qcom,src-bam-physical-address = <0xfc37c000>;
250 qcom,src-bam-pipe-index = <0>;
251 qcom,dst-bam-physical-address = <0xf9a44000>;
252 qcom,dst-bam-pipe-index = <2>;
Manu Gautam4658d892012-08-20 18:24:52 -0700253 qcom,data-fifo-offset = <0xf4000>;
254 qcom,data-fifo-size = <0x1000>;
255 qcom,descriptor-fifo-offset = <0xf5000>;
256 qcom,descriptor-fifo-size = <0x400>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530257 };
Shimrit Malichi255b5342012-08-02 21:01:43 +0300258 };