blob: eeb05d49dcc61df63662d09d3b2c2439f013abd6 [file] [log] [blame]
Sathish Ambley9d69ac32012-03-21 10:28:26 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
Sathish Ambley4df614c2011-10-07 16:30:46 -070012
13/include/ "skeleton.dtsi"
Praveen Chidambaram716c91be2012-10-03 17:32:03 -060014/include/ "msm8974-pm.dtsi"
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070015/include/ "msm8974-iommu.dtsi"
Kevin Chan350b6932012-08-01 02:21:00 -070016/include/ "msm8974-camera.dtsi"
Pratik Patelf20bacb2012-07-21 14:46:36 -070017/include/ "msm8974-coresight.dtsi"
Matt Wagantallfc727212012-01-06 18:18:25 -080018/include/ "msm-gdsc.dtsi"
Olav Haugan49173442012-08-01 13:23:18 -070019/include/ "msm8974-ion.dtsi"
Pu Chen1335e872012-08-01 08:45:25 -060020/include/ "msm8974-gpu.dtsi"
Adrian Salido-Morenoa80c69e2012-07-31 18:11:09 -070021/include/ "msm8974-mdss.dtsi"
Sathish Ambley4df614c2011-10-07 16:30:46 -070022
23/ {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070024 model = "Qualcomm MSM 8974";
25 compatible = "qcom,msm8974";
Sathish Ambley4df614c2011-10-07 16:30:46 -070026 interrupt-parent = <&intc>;
27
28 intc: interrupt-controller@F9000000 {
29 compatible = "qcom,msm-qgic2";
30 interrupt-controller;
Michael Bohanc7224532012-01-06 16:02:52 -080031 #interrupt-cells = <3>;
Sathish Ambley4df614c2011-10-07 16:30:46 -070032 reg = <0xF9000000 0x1000>,
33 <0xF9002000 0x1000>;
34 };
Sathish Ambley3d50c762011-10-25 15:26:00 -070035
Sathish Ambleye046b242012-04-09 12:38:05 -070036 msmgpio: gpio@fd510000 {
Michael Bohan0425f6f2012-01-17 14:36:39 -080037 compatible = "qcom,msm-gpio";
Rohit Vaswanib1cc4932012-07-23 21:30:11 -070038 gpio-controller;
39 #gpio-cells = <2>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080040 interrupt-controller;
41 #interrupt-cells = <2>;
Sathish Ambleye046b242012-04-09 12:38:05 -070042 reg = <0xfd510000 0x4000>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080043 };
44
Joonwoo Park27a61782012-09-18 16:28:50 -070045 wcd9xxx_intc: wcd9xxx-irq {
46 compatible = "qcom,wcd9xxx-irq";
47 interrupt-controller;
48 #interrupt-cells = <1>;
49 interrupt-parent = <&msmgpio>;
50 interrupts = <72 0>;
51 interrupt-names = "cdc-int";
52 };
53
Sathish Ambley098f9bd2011-11-09 16:32:53 -080054 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080055 compatible = "arm,armv7-timer";
Sathish Ambleyddd099e2012-04-25 13:24:47 -070056 interrupts = <1 2 0 1 3 0>;
Sathish Ambley2f27a172012-03-16 10:46:28 -070057 clock-frequency = <19200000>;
Sathish Ambley098f9bd2011-11-09 16:32:53 -080058 };
59
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080060 qcom,vidc@fdc00000 {
61 compatible = "qcom,msm-vidc";
62 reg = <0xfdc00000 0xff000>;
63 interrupts = <0 44 0>;
Vinay Kalia14c92172012-10-10 20:35:13 -070064 vidc-cp-map = <0x1000000 0x3f000000>;
Vinay Kalia68398a42012-06-22 18:36:12 -070065 vidc-ns-map = <0x40000000 0x40000000>;
Vinay Kalia40680aa2012-07-23 12:45:39 -070066 load-freq-tbl = <979200 410000000>,
Vinay Kalia42d37ea2012-08-27 23:28:46 -070067 <783360 410000000>,
Vinay Kalia435bbd52012-09-10 17:08:33 -070068 <489600 266670000>,
Vinay Kalia42d37ea2012-08-27 23:28:46 -070069 <244800 133330000>;
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080070 };
71
Deva Ramasubramanianf8ec9d692012-07-12 20:42:12 -070072 qcom,wfd {
73 compatible = "qcom,msm-wfd";
74 };
75
David Brown225abee2012-02-09 22:28:50 -080076 serial@f991f000 {
Sathish Ambley3d50c762011-10-25 15:26:00 -070077 compatible = "qcom,msm-lsuart-v14";
David Brown225abee2012-02-09 22:28:50 -080078 reg = <0xf991f000 0x1000>;
Michael Bohanc7224532012-01-06 16:02:52 -080079 interrupts = <0 109 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070080 status = "disabled";
Sathish Ambley3d50c762011-10-25 15:26:00 -070081 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053082
Sathish Ambley9d69ac32012-03-21 10:28:26 -070083 serial@f995e000 {
84 compatible = "qcom,msm-lsuart-v14";
85 reg = <0xf995e000 0x1000>;
86 interrupts = <0 114 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070087 status = "disabled";
Sathish Ambley9d69ac32012-03-21 10:28:26 -070088 };
89
Stepan Moskovchenko5269b602012-08-08 17:57:09 -070090 serial@f991e000 {
91 compatible = "qcom,msm-lsuart-v14";
92 reg = <0xf991e000 0x1000>;
93 interrupts = <0 108 0>;
94 status = "disabled";
95 };
96
David Keitel7df02732012-08-17 16:33:06 -070097 usb_otg: usb@f9a55000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053098 compatible = "qcom,hsusb-otg";
David Brown225abee2012-02-09 22:28:50 -080099 reg = <0xf9a55000 0x400>;
Manu Gautamf8c45642012-08-10 10:20:56 -0700100 interrupts = <0 134 0 0 140 0>;
101 interrupt-names = "core_irq", "async_irq";
Michael Bohane66a3a92012-03-26 12:47:28 -0700102 HSUSB_VDDCX-supply = <&pm8841_s2>;
103 HSUSB_1p8-supply = <&pm8941_l6>;
104 HSUSB_3p3-supply = <&pm8941_l24>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530105
106 qcom,hsusb-otg-phy-type = <2>;
Manu Gautam4fea0af2012-09-06 12:52:48 -0700107 qcom,hsusb-otg-phy-init-seq = <0x63 0x81 0xffffffff>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530108 qcom,hsusb-otg-mode = <1>;
Sridhar Parasurama418ce22012-09-26 09:35:21 -0700109 qcom,hsusb-otg-otg-control = <1>;
Manu Gautambd53fba2012-07-31 16:13:06 +0530110 qcom,hsusb-otg-disable-reset;
Manu Gautam0ddbd922012-09-21 17:17:38 +0530111 qcom,hsusb-otg-pnoc-errata-fix;
Manu Gautam2e8ac102012-08-31 11:41:16 -0700112
Gagan Macb2372ae2012-08-20 19:24:32 -0600113 qcom,msm-bus,name = "usb2";
114 qcom,msm-bus,num-cases = <2>;
115 qcom,msm-bus,active-only = <0>;
116 qcom,msm-bus,num-paths = <1>;
117 qcom,msm-bus,vectors-KBps =
Manu Gautam2e8ac102012-08-31 11:41:16 -0700118 <87 512 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600119 <87 512 60000 960000>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530120 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530121
Manu Gautam43c61a12012-08-22 17:09:37 -0700122 android_usb@fc42b0c8 {
123 compatible = "qcom,android-usb";
124 reg = <0xfc42b0c8 0xc8>;
Vijayavardhan Vennapusa58c8b662012-11-01 15:34:31 +0530125 qcom,android-usb-swfi-latency = <1>;
Manu Gautam43c61a12012-08-22 17:09:37 -0700126 };
127
Krishna Kondab6da6932012-08-19 12:04:05 -0700128 sdcc1: qcom,sdcc@f9824000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530129 cell-index = <1>; /* SDC1 eMMC slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530130 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700131 reg = <0xf9824000 0x800>,
132 <0xf9824800 0x100>,
133 <0xf9804000 0x7000>;
134 reg-names = "core_mem", "dml_mem", "bam_mem";
135 interrupts = <0 123 0>, <0 137 0>;
136 interrupt-names = "core_irq", "bam_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530137 vdd-supply = <&pm8941_l20>;
138 vdd-io-supply = <&pm8941_s3>;
139
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700140 qcom,vdd-always-on;
141 qcom,vdd-lpm-sup;
142 qcom,vdd-voltage-level = <2950000 2950000>;
143 qcom,vdd-current-level = <800 500000>;
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530144
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700145 qcom,vdd-io-always-on;
146 qcom,vdd-io-voltage-level = <1800000 1800000>;
147 qcom,vdd-io-current-level = <250 154000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530148
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700149 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
150 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
151 qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
152 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530153
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530154 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700155 qcom,sup-voltages = <2950 2950>;
156 qcom,bus-width = <8>;
157 qcom,nonremovable;
158 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Sridhar Parasuram15645742012-11-18 12:07:59 -0800159
160 qcom,msm-bus,name = "sdcc1";
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530161 qcom,msm-bus,num-cases = <8>;
Sridhar Parasuram15645742012-11-18 12:07:59 -0800162 qcom,msm-bus,active-only = <0>;
163 qcom,msm-bus,num-paths = <1>;
164 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530165 <78 512 1600 3200>, /* 400 KB/s*/
166 <78 512 80000 160000>, /* 20 MB/s */
167 <78 512 100000 200000>, /* 25 MB/s */
168 <78 512 200000 400000>, /* 50 MB/s */
169 <78 512 400000 800000>, /* 100 MB/s */
170 <78 512 800000 1600000>, /* 200 MB/s */
171 <78 512 2048000 4096000>; /* Max. bandwidth */
172 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
Sujit Reddy Thumma3adba2b2012-11-03 09:42:01 +0530173 qcom,dat1-mpm-int = <42>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530174 };
175
Krishna Kondab6da6932012-08-19 12:04:05 -0700176 sdcc2: qcom,sdcc@f98a4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530177 cell-index = <2>; /* SDC2 SD card slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530178 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700179 reg = <0xf98a4000 0x800>,
180 <0xf98a4800 0x100>,
181 <0xf9884000 0x7000>;
182 reg-names = "core_mem", "dml_mem", "bam_mem";
183 interrupts = <0 125 0>, <0 220 0>;
184 interrupt-names = "core_irq", "bam_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530185 vdd-supply = <&pm8941_l21>;
186 vdd-io-supply = <&pm8941_l13>;
187
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700188 qcom,vdd-voltage-level = <2950000 2950000>;
189 qcom,vdd-current-level = <9000 800000>;
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530190
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700191 qcom,vdd-io-always-on;
192 qcom,vdd-io-lpm-sup;
193 qcom,vdd-io-voltage-level = <1800000 2950000>;
194 qcom,vdd-io-current-level = <6 22000>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530195
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700196 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
197 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
198 qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
199 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530200
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530201 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700202 qcom,sup-voltages = <2950 2950>;
203 qcom,bus-width = <4>;
204 qcom,xpc;
205 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
206 qcom,current-limit = <800>;
Sridhar Parasuram15645742012-11-18 12:07:59 -0800207
208 qcom,msm-bus,name = "sdcc2";
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530209 qcom,msm-bus,num-cases = <8>;
Sridhar Parasuram15645742012-11-18 12:07:59 -0800210 qcom,msm-bus,active-only = <0>;
211 qcom,msm-bus,num-paths = <1>;
212 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530213 <81 512 1600 3200>, /* 400 KB/s*/
214 <81 512 80000 160000>, /* 20 MB/s */
215 <81 512 100000 200000>, /* 25 MB/s */
216 <81 512 200000 400000>, /* 50 MB/s */
217 <81 512 400000 800000>, /* 100 MB/s */
218 <81 512 800000 1600000>, /* 200 MB/s */
219 <81 512 2048000 4096000>; /* Max. bandwidth */
220 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
Sujit Reddy Thumma3adba2b2012-11-03 09:42:01 +0530221 qcom,dat1-mpm-int = <44>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530222 };
223
Krishna Kondab6da6932012-08-19 12:04:05 -0700224 sdcc3: qcom,sdcc@f9864000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530225 cell-index = <3>; /* SDC3 SDIO slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530226 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700227 reg = <0xf9864000 0x800>,
228 <0xf9864800 0x100>,
229 <0xf9844000 0x7000>;
230 reg-names = "core_mem", "dml_mem", "bam_mem";
Sujit Reddy Thumma3adba2b2012-11-03 09:42:01 +0530231 #address-cells = <0>;
232 interrupt-parent = <&sdcc3>;
233 interrupts = <0 1 2>;
234 #interrupt-cells = <1>;
235 interrupt-map-mask = <0xffffffff>;
236 interrupt-map = <0 &intc 0 127 0
237 1 &intc 0 223 0
238 2 &msmgpio 37 0x8>;
239 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530240
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530241 gpios = <&msmgpio 40 0>, /* CLK */
242 <&msmgpio 39 0>, /* CMD */
243 <&msmgpio 38 0>, /* DATA0 */
244 <&msmgpio 37 0>, /* DATA1 */
245 <&msmgpio 36 0>, /* DATA2 */
246 <&msmgpio 35 0>; /* DATA3 */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700247 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530248
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530249 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700250 qcom,sup-voltages = <1800 1800>;
251 qcom,bus-width = <4>;
252 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sridhar Parasuram15645742012-11-18 12:07:59 -0800253
254 qcom,msm-bus,name = "sdcc3";
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530255 qcom,msm-bus,num-cases = <8>;
Sridhar Parasuram15645742012-11-18 12:07:59 -0800256 qcom,msm-bus,active-only = <0>;
257 qcom,msm-bus,num-paths = <1>;
258 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530259 <79 512 1600 3200>, /* 400 KB/s*/
260 <79 512 80000 160000>, /* 20 MB/s */
261 <79 512 100000 200000>, /* 25 MB/s */
262 <79 512 200000 400000>, /* 50 MB/s */
263 <79 512 400000 800000>, /* 100 MB/s */
264 <79 512 800000 1600000>, /* 200 MB/s */
265 <79 512 2048000 4096000>; /* Max. bandwidth */
266 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530267 status = "disable";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530268 };
269
Krishna Kondab6da6932012-08-19 12:04:05 -0700270 sdcc4: qcom,sdcc@f98e4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530271 cell-index = <4>; /* SDC4 SDIO slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530272 compatible = "qcom,msm-sdcc";
Krishna Konda99783e622012-08-29 10:40:15 -0700273 reg = <0xf98e4000 0x800>,
274 <0xf98e4800 0x100>,
275 <0xf98c4000 0x7000>;
276 reg-names = "core_mem", "dml_mem", "bam_mem";
Sujit Reddy Thumma3adba2b2012-11-03 09:42:01 +0530277 #address-cells = <0>;
278 interrupt-parent = <&sdcc4>;
279 interrupts = <0 1 2>;
280 #interrupt-cells = <1>;
281 interrupt-map-mask = <0xffffffff>;
282 interrupt-map = <0 &intc 0 129 0
283 1 &intc 0 226 0
284 2 &msmgpio 95 0x8>;
285 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530286
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530287 gpios = <&msmgpio 93 0>, /* CLK */
288 <&msmgpio 91 0>, /* CMD */
289 <&msmgpio 96 0>, /* DATA0 */
290 <&msmgpio 95 0>, /* DATA1 */
291 <&msmgpio 94 0>, /* DATA2 */
292 <&msmgpio 92 0>; /* DATA3 */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700293 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530294
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530295 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700296 qcom,sup-voltages = <1800 1800>;
297 qcom,bus-width = <4>;
298 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sridhar Parasuram15645742012-11-18 12:07:59 -0800299
300 qcom,msm-bus,name = "sdcc4";
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530301 qcom,msm-bus,num-cases = <8>;
Sridhar Parasuram15645742012-11-18 12:07:59 -0800302 qcom,msm-bus,active-only = <0>;
303 qcom,msm-bus,num-paths = <1>;
304 qcom,msm-bus,vectors-KBps = <80 512 0 0>, /* No vote */
Sujit Reddy Thumma1443c832012-11-26 12:26:56 +0530305 <80 512 1600 3200>, /* 400 KB/s*/
306 <80 512 80000 160000>, /* 20 MB/s */
307 <80 512 100000 200000>, /* 25 MB/s */
308 <80 512 200000 400000>, /* 50 MB/s */
309 <80 512 400000 800000>, /* 100 MB/s */
310 <80 512 800000 1600000>, /* 200 MB/s */
311 <80 512 2048000 4096000>; /* Max. bandwidth */
312 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>;
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530313 status = "disable";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530314 };
Yan He1466daa2011-11-30 17:25:38 -0800315
David Brown225abee2012-02-09 22:28:50 -0800316 qcom,sps@f9980000 {
Yan He1466daa2011-11-30 17:25:38 -0800317 compatible = "qcom,msm_sps";
David Brown225abee2012-02-09 22:28:50 -0800318 reg = <0xf9984000 0x15000>,
319 <0xf9999000 0xb000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800320 interrupts = <0 94 0>;
Yan He1466daa2011-11-30 17:25:38 -0800321
322 qcom,bam-dma-res-pipes = <6>;
323 };
324
Sagar Dhariae0bb6502012-08-10 20:25:51 -0600325 spi@f9966000 {
326 compatible = "qcom,spi-qup-v2";
327 cell-index = <7>;
328 reg = <0xf9966000 0x1000>;
329 interrupts = <0 104 0>;
330 spi-max-frequency = <19200000>;
331 #address-cells = <1>;
332 #size-cells = <0>;
333 gpios = <&msmgpio 56 0>, /* CLK */
334 <&msmgpio 54 0>, /* MISO */
335 <&msmgpio 53 0>; /* MOSI */
336 cs-gpios = <&msmgpio 55 0>;
Siddartha Mohanadoss81e9f8b2012-09-19 21:49:14 -0700337
338 epm-adc@0 {
339 compatible = "cy,epm-adc-cy8c5568lti-114";
340 reg = <0>;
341 interrupt-parent = <&msmgpio>;
342 spi-max-frequency = <960000>;
343 qcom,channels = <31>;
344 qcom,gain = <100 100 100 50 100 100 1 100 1 50
345 1 100 1 100 50 50 50 50 50 50
346 100 50 100 50 50 50 50 50 50 50
347 50>;
348 qcom,rsense = <2 2 2 200 20 2 1 2 1 30
349 1 10 1 30 50 30 500 30 100 30
350 100 500 20 200 1000 20 1000 1000 70 200
351 50>;
352 qcom,channel-type = <0x2a40>;
353 };
Sagar Dhariae0bb6502012-08-10 20:25:51 -0600354 };
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700355
Joonwoo Park6ecc51a2012-10-20 22:32:32 -0700356 slim_msm: slim@fe12f000 {
Sagar Dhariaa316a962012-03-21 16:13:22 -0600357 cell-index = <1>;
Sagar Dhariad27ab412012-09-27 00:31:51 -0600358 compatible = "qcom,slim-ngd";
Sagar Dhariaa316a962012-03-21 16:13:22 -0600359 reg = <0xfe12f000 0x35000>,
360 <0xfe104000 0x20000>;
361 reg-names = "slimbus_physical", "slimbus_bam_physical";
362 interrupts = <0 163 0 0 164 0>;
363 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Kiran Kandie8bf5d52012-08-06 16:03:16 -0700364
365 taiko_codec {
366 compatible = "qcom,taiko-slim-pgd";
367 elemental-addr = [00 01 A0 00 17 02];
368
Joonwoo Park27a61782012-09-18 16:28:50 -0700369 interrupt-parent = <&wcd9xxx_intc>;
370 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28>;
371
Kiran Kandie8bf5d52012-08-06 16:03:16 -0700372 qcom,cdc-reset-gpio = <&msmgpio 63 0>;
373
374 cdc-vdd-buck-supply = <&pm8941_s2>;
375 qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
376 qcom,cdc-vdd-buck-current = <650000>;
377
378 cdc-vdd-tx-h-supply = <&pm8941_s3>;
379 qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
380 qcom,cdc-vdd-tx-h-current = <25000>;
381
382 cdc-vdd-rx-h-supply = <&pm8941_s3>;
383 qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
384 qcom,cdc-vdd-rx-h-current = <25000>;
385
386 cdc-vddpx-1-supply = <&pm8941_s3>;
387 qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
388 qcom,cdc-vddpx-1-current = <10000>;
389
390 cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
391 qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
392 qcom,cdc-vdd-a-1p2v-current = <10000>;
393
394 cdc-vddcx-1-supply = <&pm8941_l1>;
395 qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
396 qcom,cdc-vddcx-1-current = <10000>;
397
398 cdc-vddcx-2-supply = <&pm8941_l1>;
399 qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
400 qcom,cdc-vddcx-2-current = <10000>;
401
402 qcom,cdc-micbias-ldoh-v = <0x3>;
403 qcom,cdc-micbias-cfilt1-mv = <1800>;
404 qcom,cdc-micbias-cfilt2-mv = <2700>;
405 qcom,cdc-micbias-cfilt3-mv = <1800>;
406 qcom,cdc-micbias1-cfilt-sel = <0x0>;
407 qcom,cdc-micbias2-cfilt-sel = <0x1>;
408 qcom,cdc-micbias3-cfilt-sel = <0x2>;
409 qcom,cdc-micbias4-cfilt-sel = <0x2>;
410
411 qcom,cdc-slim-ifd = "taiko-slim-ifd";
412 qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
413 };
Sagar Dhariaa316a962012-03-21 16:13:22 -0600414 };
415
Kiran Kandi0121ad12012-08-20 13:01:47 -0700416 sound {
417 compatible = "qcom,msm8974-audio-taiko";
418 qcom,model = "msm8974-taiko-snd-card";
419
420 qcom,audio-routing =
421 "RX_BIAS", "MCLK",
422 "LDO_H", "MCLK",
Kiran Kandi0121ad12012-08-20 13:01:47 -0700423 "AMIC1", "MIC BIAS1 Internal1",
424 "MIC BIAS1 Internal1", "Handset Mic",
425 "AMIC2", "MIC BIAS2 External",
426 "MIC BIAS2 External", "Headset Mic",
Kiran Kandi8ad43072012-10-22 13:06:43 -0700427 "AMIC3", "MIC BIAS2 External",
428 "MIC BIAS2 External", "ANCRight Headset Mic",
429 "AMIC4", "MIC BIAS2 External",
430 "MIC BIAS2 External", "ANCLeft Headset Mic",
Kiran Kandi0121ad12012-08-20 13:01:47 -0700431 "DMIC1", "MIC BIAS1 External",
432 "MIC BIAS1 External", "Digital Mic1",
433 "DMIC2", "MIC BIAS1 External",
434 "MIC BIAS1 External", "Digital Mic2",
435 "DMIC3", "MIC BIAS3 External",
436 "MIC BIAS3 External", "Digital Mic3",
437 "DMIC4", "MIC BIAS3 External",
438 "MIC BIAS3 External", "Digital Mic4",
439 "DMIC5", "MIC BIAS4 External",
440 "MIC BIAS4 External", "Digital Mic5",
441 "DMIC6", "MIC BIAS4 External",
442 "MIC BIAS4 External", "Digital Mic6";
Kiran Kandi79db1b02012-08-21 13:48:19 -0700443
444 qcom,cdc-mclk-gpios = <&pm8941_gpios 15 0>;
445 taiko-mclk-clk = <&pm8941_clkdiv1>;
446 qcom,taiko-mclk-clk-freq = <9600000>;
Kiran Kandi0121ad12012-08-20 13:01:47 -0700447 };
448
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700449 spmi_bus: qcom,spmi@fc4c0000 {
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700450 cell-index = <0>;
451 compatible = "qcom,spmi-pmic-arb";
452 reg = <0xfc4cf000 0x1000>,
453 <0Xfc4cb000 0x1000>;
454 /* 190,ee0_krait_hlos_spmi_periph_irq */
455 /* 187,channel_0_krait_hlos_trans_done_irq */
456 interrupts = <0 190 0 0 187 0>;
457 qcom,pmic-arb-ee = <0>;
458 qcom,pmic-arb-channel = <0>;
Gilad Avidov1d175ba2012-08-06 17:05:22 -0600459 qcom,pmic-arb-ppid-map = <0x40400000>, /* BUS */
460 <0x40500001>, /* INT */
461 <0x40600002>, /* SPMI */
462 <0x40800003>, /* PON */
463 <0x42400004>, /* TEMP_ALARM */
464 <0x47000005>, /* PBS_CORE */
465 <0x47100006>, /* PBS_CLIENT0 */
466 <0x47200007>, /* PBS_CLIENT1 */
467 <0x47300008>, /* PBS_CLIENT2 */
468 <0x47400009>, /* PBS_CLIENT3 */
469 <0x4750000a>, /* PBS_CLIENT4 */
470 <0x4760000b>, /* PBS_CLIENT5 */
471 <0x4770000c>, /* PBS_CLIENT6 */
472 <0x4780000d>, /* PBS_CLIENT7 */
473 <0x4a00000e>, /* MPP1 */
474 <0x4a100021>, /* MPP2 */
475 <0x4a20000f>, /* MPP3 */
476 <0x4a300010>, /* MPP4 */
477 <0x51000011>, /* BCLK_GEN_MAIN */
478 <0x51d00012>, /* S4_CTRL */
479 <0x51e00013>, /* S4_PS */
480 <0x51f00014>, /* S4_FREQ */
481 <0x52000015>, /* S5_CTRL */
482 <0x52100016>, /* S5_PS */
483 <0x52200017>, /* S5_FREQ */
484 <0x52300018>, /* S6_CTRL */
485 <0x52400019>, /* S6_PS */
486 <0x5250001a>, /* S6_FREQ */
487 <0x5260001b>, /* S7_CTRL */
488 <0x5270001c>, /* S7_PS */
489 <0x5280001d>, /* S7_FREQ */
490 <0x5290001e>, /* S8_CTRL */
491 <0x52a0001f>, /* S8_PS */
492 <0x52b00020>, /* S8_FREQ */
493 <0x00400022>, /* BUS */
494 <0x00500023>, /* INT */
495 <0x00600024>, /* SPMI */
496 <0x00800025>, /* PON */
497 <0x00b00027>, /* VREG_TFT */
498 <0x01000028>, /* SMBB_CHGR */
499 <0x01100029>, /* SMBB_BUCK */
500 <0x0120002a>, /* SMBB_BAT_IF */
501 <0x0130002b>, /* SMBB_USB_CHGPTH */
502 <0x0140002c>, /* SMBB_DC_CHGPTH */
503 <0x0150002d>, /* SMBB_BOOST */
504 <0x0160002e>, /* SMBB_MISC */
505 <0x0170002f>, /* SMBB_FREQ */
506 <0x02400030>, /* TEMP_ALARM */
507 <0x02800031>, /* COIN */
508 <0x03100032>, /* VADC1_USR */
509 <0x03300033>, /* VADC1_BMS */
510 <0x03400034>, /* VADC2_BTM */
511 <0x03600035>, /* IADC1_USR */
512 <0x03800036>, /* IADC1_BMS */
513 <0x04000037>, /* BMS1 */
514 <0x05700039>, /* DIFF_CLK1 */
515 <0x05c0003b>, /* DIV_CLK2 */
516 <0x0610003d>, /* RTC_ALARM */
517 <0x0620003e>, /* RTC_TIMER */
518 <0x07100040>, /* PBS_CLIENT0 */
519 <0x07200041>, /* PBS_CLIENT1 */
520 <0x07300042>, /* PBS_CLIENT2 */
521 <0x07400043>, /* PBS_CLIENT3 */
522 <0x07500044>, /* PBS_CLIENT4 */
523 <0x07600045>, /* PBS_CLIENT5 */
524 <0x07700046>, /* PBS_CLIENT6 */
525 <0x07800047>, /* PBS_CLIENT7 */
526 <0x07900048>, /* PBS_CLIENT8 */
527 <0x07a00049>, /* PBS_CLIENT9 */
528 <0x07b0004a>, /* PBS_CLIENT10 */
529 <0x07c0004b>, /* PBS_CLIENT11 */
530 <0x07d0004c>, /* PBS_CLIENT12 */
531 <0x07e0004d>, /* PBS_CLIENT13 */
532 <0x07f0004e>, /* PBS_CLIENT14 */
533 <0x0800004f>, /* PBS_CLIENT15 */
534 <0x0a100050>, /* MPP2 */
535 <0x0a300051>, /* MPP4 */
536 <0x0a400052>, /* MPP5 */
537 <0x0a500053>, /* MPP6 */
538 <0x0a600054>, /* MPP7 */
539 <0x0a700055>, /* MPP8 */
540 <0x0c000056>, /* GPIO1 */
541 <0x0c100057>, /* GPIO2 */
542 <0x0c200058>, /* GPIO3 */
543 <0x0c300059>, /* GPIO4 */
544 <0x0c40005a>, /* GPIO5 */
545 <0x0c50005b>, /* GPIO6 */
546 <0x0c60005c>, /* GPIO7 */
547 <0x0c70005d>, /* GPIO8 */
548 <0x0c80005e>, /* GPIO9 */
549 <0x0c90005f>, /* GPIO10 */
550 <0x0ca00060>, /* GPIO11 */
551 <0x0cb00061>, /* GPIO12 */
552 <0x0cc00062>, /* GPIO13 */
553 <0x0cd00063>, /* GPIO14 */
554 <0x0ce00064>, /* GPIO15 */
555 <0x0cf00065>, /* GPIO16 */
556 <0x0d200066>, /* GPIO19 */
557 <0x0d300067>, /* GPIO20 */
558 <0x0d500068>, /* GPIO22 */
559 <0x0d600069>, /* GPIO23 */
560 <0x0d70006a>, /* GPIO24 */
561 <0x0d80006b>, /* GPIO25 */
562 <0x0d90006c>, /* GPIO26 */
563 <0x0da0006d>, /* GPIO27 */
564 <0x0dc0006e>, /* GPIO29 */
565 <0x0dd0006f>, /* GPIO30 */
566 <0x0df00070>, /* GPIO32 */
567 <0x0e000071>, /* GPIO33 */
568 <0x0e100072>, /* GPIO34 */
569 <0x0e200073>, /* GPIO35 */
570 <0x0e300074>, /* GPIO36 */
571 <0x11000075>, /* BUCK_CMN */
572 <0x1a000076>, /* BOOST */
573 <0x1a100077>, /* BOOST_FREQ */
574 <0x1a800078>, /* KEYPAD1 */
575 <0x1b000079>, /* LPG_LUT */
576 <0x1b10007a>, /* LPG_CHAN1 */
577 <0x1b20007b>, /* LPG_CHAN2 */
578 <0x1b30007c>, /* LPG_CHAN3 */
579 <0x1b40007d>, /* LPG_CHAN4 */
580 <0x1b50007e>, /* LPG_CHAN5 */
581 <0x1b60007f>, /* LPG_CHAN6 */
582 <0x1b700080>, /* LPG_CHAN7 */
583 <0x1b800081>, /* LPG_CHAN8 */
584 <0x1bc00082>, /* PWM_3D */
585 <0x1c000083>, /* VIB1 */
586 <0x1d000084>, /* TRI_LED */
587 <0x1d300085>, /* FLASH1 */
588 <0x1d800086>, /* WLED1 */
589 <0x1e200087>, /* KPDBL_MAIN */
590 <0x1e300088>, /* KPDBL_LUT */
591 <0x1e400089>, /* LPG_CHAN9 */
592 <0x1e50008a>, /* LPG_CHAN10 */
593 <0x1e60008b>, /* LPG_CHAN11 */
594 <0x1e70008c>; /* LPG_CHAN12 */
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700595 };
Sagar Dharia218edb92012-01-15 18:03:01 -0700596
Amir Samuelovb5266182012-10-23 09:45:41 +0200597 i2c@f9967000 { /* BLSP#11 */
Sagar Dharia218edb92012-01-15 18:03:01 -0700598 cell-index = <0>;
599 compatible = "qcom,i2c-qup";
Sagar Dharia8a73da92012-08-11 16:41:25 -0600600 reg = <0Xf9967000 0x1000>;
Amir Samuelovb5266182012-10-23 09:45:41 +0200601 #address-cells = <1>;
602 #size-cells = <0>;
Sagar Dharia218edb92012-01-15 18:03:01 -0700603 reg-names = "qup_phys_addr";
Sagar Dharia8a73da92012-08-11 16:41:25 -0600604 interrupts = <0 105 0>;
Sagar Dharia218edb92012-01-15 18:03:01 -0700605 interrupt-names = "qup_err_intr";
606 qcom,i2c-bus-freq = <100000>;
607 qcom,i2c-src-freq = <24000000>;
608 };
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800609
Amy Malochebc7e9672012-08-15 10:30:40 -0700610 i2c@f9924000 {
611 cell-index = <2>;
612 compatible = "qcom,i2c-qup";
613 reg = <0xf9924000 0x1000>;
614 #address-cells = <1>;
615 #size-cells = <0>;
616 reg-names = "qup_phys_addr";
617 interrupts = <0 96 0>;
618 interrupt-names = "qup_err_intr";
619 qcom,i2c-bus-freq = <100000>;
620 qcom,i2c-src-freq = <24000000>;
621 };
622
Subbaraman Narayanamurthy3f93ab12012-08-17 19:39:47 -0700623 spi@f9923000 {
624 cell-index = <0>;
625 compatible = "qcom,spi-qup-v2";
626 reg = <0xf9923000 0x1000>;
627 interrupts = <0 95 0>;
628 spi-max-frequency = <19200000>;
629 #address-cells = <1>;
630 #size-cells = <0>;
631 gpios = <&msmgpio 3 0>, /* CLK */
632 <&msmgpio 1 0>, /* MISO */
633 <&msmgpio 0 0>; /* MOSI */
634 cs-gpios = <&msmgpio 9 0>;
635 };
636
Matt Wagantall48523022012-04-23 13:28:42 -0700637 qcom,acpuclk@f9000000 {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -0700638 compatible = "qcom,acpuclk-8974";
Matt Wagantallbf9eb2c2012-05-31 09:44:22 -0700639 krait0-supply = <&krait0_vreg>;
640 krait1-supply = <&krait1_vreg>;
641 krait2-supply = <&krait2_vreg>;
642 krait3-supply = <&krait3_vreg>;
David Collins1c91ea72012-05-03 16:17:35 -0700643 krait0_mem-supply = <&pm8841_s1_ao>;
644 krait1_mem-supply = <&pm8841_s1_ao>;
645 krait2_mem-supply = <&pm8841_s1_ao>;
646 krait3_mem-supply = <&pm8841_s1_ao>;
647 krait0_dig-supply = <&pm8841_s2_corner_ao>;
648 krait1_dig-supply = <&pm8841_s2_corner_ao>;
649 krait2_dig-supply = <&pm8841_s2_corner_ao>;
650 krait3_dig-supply = <&pm8841_s2_corner_ao>;
Matt Wagantall337cdb72012-06-29 12:07:27 -0700651 krait0_hfpll_a-supply = <&pm8941_s2_ao>;
652 krait1_hfpll_a-supply = <&pm8941_s2_ao>;
653 krait2_hfpll_a-supply = <&pm8941_s2_ao>;
654 krait3_hfpll_a-supply = <&pm8941_s2_ao>;
655 l2_hfpll_a-supply = <&pm8941_s2_ao>;
656 krait0_hfpll_b-supply = <&pm8941_l12_ao>;
657 krait1_hfpll_b-supply = <&pm8941_l12_ao>;
658 krait2_hfpll_b-supply = <&pm8941_l12_ao>;
659 krait3_hfpll_b-supply = <&pm8941_l12_ao>;
660 l2_hfpll_b-supply = <&pm8941_l12_ao>;
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800661 };
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200662
Vijayavardhan Vennapusaa3de1cc2012-10-23 11:32:27 +0530663 usb3: qcom,ssusb@f9200000 {
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200664 compatible = "qcom,dwc-usb3-msm";
Ido Shayevitz7ad8ded2012-08-28 04:30:58 +0300665 reg = <0xf9200000 0xfc000>,
666 <0xfd4ab000 0x4>;
Manu Gautamf2649e82012-10-23 10:06:55 +0530667 interrupts = <0 131 0>, <0 179 0>, <0 133 0>;
668 interrupt-names = "irq", "otg_irq", "hs_phy_irq";
Vijayavardhan Vennapusa4cdef832012-11-09 14:46:41 +0530669 ssusb_vdd_dig-supply = <&pm8841_s2_corner>;
Manu Gautam60e01352012-05-29 09:00:34 +0530670 SSUSB_1p8-supply = <&pm8941_l6>;
Vijayavardhan Vennapusa4cdef832012-11-09 14:46:41 +0530671 hsusb_vdd_dig-supply = <&pm8841_s2_corner>;
Manu Gautam60e01352012-05-29 09:00:34 +0530672 HSUSB_1p8-supply = <&pm8941_l6>;
673 HSUSB_3p3-supply = <&pm8941_l24>;
Manu Gautamf1fceddf2012-10-12 14:02:50 +0530674 vbus_dwc3-supply = <&pm8941_mvs1>;
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200675 qcom,dwc-usb3-msm-dbm-eps = <4>;
Vijayavardhan Vennapusa4cdef832012-11-09 14:46:41 +0530676 qcom,vdd-voltage-level = <1 5 7>;
Manu Gautam2617deb2012-08-31 17:50:06 -0700677
Gagan Macb2372ae2012-08-20 19:24:32 -0600678 qcom,msm-bus,name = "usb3";
679 qcom,msm-bus,num-cases = <2>;
680 qcom,msm-bus,active-only = <0>;
681 qcom,msm-bus,num-paths = <1>;
682 qcom,msm-bus,vectors-KBps =
Manu Gautam2617deb2012-08-31 17:50:06 -0700683 <61 512 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600684 <61 512 240000 960000>;
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200685 };
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700686
Matt Wagantallfc727212012-01-06 18:18:25 -0800687 gdsc_oxili_gx: qcom,gdsc@fd8c4024 {
688 parent-supply = <&pm8841_s4>;
689 };
690
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700691 qcom,lpass@fe200000 {
692 compatible = "qcom,pil-q6v5-lpass";
693 reg = <0xfe200000 0x00100>,
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700694 <0xfd485100 0x00010>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700695 reg-names = "qdsp6_base", "halt_base";
Stephen Boyd1be799e2012-10-17 15:50:42 -0700696 interrupts = <0 162 1>;
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700697
Matt Wagantall6e6b8cd2012-05-24 12:42:24 -0700698 qcom,firmware-name = "adsp";
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700699 };
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800700
Joonwoo Park7ecf08d2012-08-17 11:35:12 -0700701 qcom,msm-adsp-loader {
702 compatible = "qcom,adsp-loader";
Venkat Sudhir480db8a2012-11-09 15:31:50 -0800703 qcom,adsp-state = <0>;
Joonwoo Park7ecf08d2012-08-17 11:35:12 -0700704 };
705
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700706 qcom,msm-pcm {
707 compatible = "qcom,msm-pcm-dsp";
708 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700709
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700710 qcom,msm-pcm-routing {
711 compatible = "qcom,msm-pcm-routing";
712 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700713
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700714 qcom,msm-pcm-lpa {
715 compatible = "qcom,msm-pcm-lpa";
716 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700717
Harmandeep Singha3453a72012-07-03 12:31:09 -0700718 qcom,msm-compr-dsp {
719 compatible = "qcom,msm-compr-dsp";
720 };
721
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700722 qcom,msm-voip-dsp {
723 compatible = "qcom,msm-voip-dsp";
724 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700725
Phani Kumar Uppalapati9fbe9462012-08-24 15:09:36 -0700726 qcom,msm-pcm-voice {
727 compatible = "qcom,msm-pcm-voice";
728 };
729
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700730 qcom,msm-stub-codec {
731 compatible = "qcom,msm-stub-codec";
732 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700733
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700734 qcom,msm-dai-fe {
735 compatible = "qcom,msm-dai-fe";
736 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700737
Phani Kumar Uppalapati580884a2012-09-24 19:40:27 -0700738 qcom,msm-pcm-afe {
739 compatible = "qcom,msm-pcm-afe";
740 };
741
Harmandeep Singh4be68502012-10-01 18:59:04 -0700742 qcom,msm-dai-q6-hdmi {
743 compatible = "qcom,msm-dai-q6-hdmi";
744 qcom,msm-dai-q6-dev-id = <8>;
745 };
746
Joonwoo Park6572ac52012-07-10 17:17:00 -0700747 qcom,msm-dai-q6 {
748 compatible = "qcom,msm-dai-q6";
749 qcom,msm-dai-q6-sb-0-rx {
750 compatible = "qcom,msm-dai-q6-dev";
751 qcom,msm-dai-q6-dev-id = <16384>;
752 };
753
754 qcom,msm-dai-q6-sb-0-tx {
755 compatible = "qcom,msm-dai-q6-dev";
756 qcom,msm-dai-q6-dev-id = <16385>;
757 };
Phani Kumar Uppalapati1d303092012-09-24 19:55:56 -0700758
Phani Kumar Uppalapatiefad7312012-10-09 18:43:36 -0700759 qcom,msm-dai-q6-sb-1-rx {
760 compatible = "qcom,msm-dai-q6-dev";
761 qcom,msm-dai-q6-dev-id = <16386>;
762 };
763
764 qcom,msm-dai-q6-sb-1-tx {
765 compatible = "qcom,msm-dai-q6-dev";
766 qcom,msm-dai-q6-dev-id = <16387>;
767 };
768
769 qcom,msm-dai-q6-sb-3-rx {
770 compatible = "qcom,msm-dai-q6-dev";
771 qcom,msm-dai-q6-dev-id = <16390>;
772 };
773
774 qcom,msm-dai-q6-sb-3-tx {
775 compatible = "qcom,msm-dai-q6-dev";
776 qcom,msm-dai-q6-dev-id = <16391>;
777 };
778
779 qcom,msm-dai-q6-sb-4-rx {
780 compatible = "qcom,msm-dai-q6-dev";
781 qcom,msm-dai-q6-dev-id = <16392>;
782 };
783
784 qcom,msm-dai-q6-sb-4-tx {
785 compatible = "qcom,msm-dai-q6-dev";
786 qcom,msm-dai-q6-dev-id = <16393>;
787 };
788
Phani Kumar Uppalapati1d303092012-09-24 19:55:56 -0700789 qcom,msm-dai-q6-bt-sco-rx {
790 compatible = "qcom,msm-dai-q6-dev";
791 qcom,msm-dai-q6-dev-id = <12288>;
792 };
793
794 qcom,msm-dai-q6-bt-sco-tx {
795 compatible = "qcom,msm-dai-q6-dev";
796 qcom,msm-dai-q6-dev-id = <12289>;
797 };
798
Phani Kumar Uppalapatibebe7382012-10-08 19:19:01 -0700799 qcom,msm-dai-q6-int-fm-rx {
800 compatible = "qcom,msm-dai-q6-dev";
801 qcom,msm-dai-q6-dev-id = <12292>;
802 };
803
804 qcom,msm-dai-q6-int-fm-tx {
805 compatible = "qcom,msm-dai-q6-dev";
806 qcom,msm-dai-q6-dev-id = <12293>;
807 };
808
Phani Kumar Uppalapati1d303092012-09-24 19:55:56 -0700809 qcom,msm-dai-q6-be-afe-pcm-rx {
810 compatible = "qcom,msm-dai-q6-dev";
811 qcom,msm-dai-q6-dev-id = <224>;
812 };
813
814 qcom,msm-dai-q6-be-afe-pcm-tx {
815 compatible = "qcom,msm-dai-q6-dev";
816 qcom,msm-dai-q6-dev-id = <225>;
817 };
818
819 qcom,msm-dai-q6-afe-proxy-rx {
820 compatible = "qcom,msm-dai-q6-dev";
821 qcom,msm-dai-q6-dev-id = <241>;
822 };
823
824 qcom,msm-dai-q6-afe-proxy-tx {
825 compatible = "qcom,msm-dai-q6-dev";
826 qcom,msm-dai-q6-dev-id = <240>;
827 };
Joonwoo Park6572ac52012-07-10 17:17:00 -0700828 };
829
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700830 qcom,msm-auxpcm {
831 compatible = "qcom,msm-auxpcm-resource";
832 qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
833 qcom,msm-cpudai-auxpcm-mode = <0>;
834 qcom,msm-cpudai-auxpcm-sync = <1>;
835 qcom,msm-cpudai-auxpcm-frame = <5>;
836 qcom,msm-cpudai-auxpcm-quant = <2>;
837 qcom,msm-cpudai-auxpcm-slot = <1>;
838 qcom,msm-cpudai-auxpcm-data = <0>;
839 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>;
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700840
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700841 qcom,msm-auxpcm-rx {
842 qcom,msm-auxpcm-dev-id = <4106>;
843 compatible = "qcom,msm-auxpcm-dev";
844 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700845
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700846 qcom,msm-auxpcm-tx {
847 qcom,msm-auxpcm-dev-id = <4107>;
848 compatible = "qcom,msm-auxpcm-dev";
849 };
850 };
851
Kiran Kandi1a2772e2012-11-16 09:25:36 -0800852 qcom,msm-dai-mi2s {
853 compatible = "qcom,msm-dai-mi2s";
854 qcom,msm-dai-q6-mi2s-quat {
855 compatible = "qcom,msm-dai-q6-mi2s";
856 qcom,msm-dai-q6-mi2s-dev-id = <3>;
857 qcom,msm-mi2s-rx-lines = <1>;
858 qcom,msm-mi2s-tx-lines = <2>;
859 };
860 };
861
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700862 qcom,msm-pcm-hostless {
863 compatible = "qcom,msm-pcm-hostless";
864 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700865
Phani Kumar Uppalapati8b3a1bb2012-06-26 19:56:58 -0700866 qcom,msm-ocmem-audio {
867 compatible = "qcom,msm-ocmem-audio";
Gagan Macb2372ae2012-08-20 19:24:32 -0600868 qcom,msm-bus,name = "audio-ocmem";
869 qcom,msm-bus,num-cases = <2>;
870 qcom,msm-bus,active-only = <0>;
871 qcom,msm-bus,num-paths = <1>;
872 qcom,msm-bus,vectors-KBps =
Phani Kumar Uppalapati31492952012-09-25 20:25:53 -0700873 <11 604 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600874 <11 604 32506 32506>;
Phani Kumar Uppalapati8b3a1bb2012-06-26 19:56:58 -0700875 };
876
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700877 qcom,mss@fc880000 {
878 compatible = "qcom,pil-q6v5-mss";
879 reg = <0xfc880000 0x100>,
880 <0xfd485000 0x400>,
881 <0xfc820000 0x020>,
Stephen Boyd3da4fd02012-07-06 10:00:12 -0700882 <0xfc401680 0x004>,
883 <0x0d1fc000 0x4000>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700884 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Stephen Boyd3da4fd02012-07-06 10:00:12 -0700885 "restart_reg", "metadata_base";
Matt Wagantall1f168152012-09-25 13:26:47 -0700886
Stephen Boyd3da4fd02012-07-06 10:00:12 -0700887 interrupts = <0 24 1>;
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700888 vdd_mss-supply = <&pm8841_s3>;
Matt Wagantall70315fb2012-12-03 16:33:28 -0800889 vdd_mx-supply = <&pm8841_s1>;
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700890
Vikram Mulukutla2d4f0862012-11-16 11:57:34 -0800891 qcom,is-loadable;
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700892 qcom,firmware-name = "mba";
893 qcom,pil-self-auth = <1>;
894 };
895
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800896 qcom,pronto@fb21b000 {
897 compatible = "qcom,pil-pronto";
898 reg = <0xfb21b000 0x3000>,
899 <0xfc401700 0x4>,
900 <0xfd485300 0xc>;
Matt Wagantall1f168152012-09-25 13:26:47 -0700901 reg-names = "pmu_base", "clk_base", "halt_base";
Stephen Boyd1be799e2012-10-17 15:50:42 -0700902 interrupts = <0 149 1>;
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800903 vdd_pronto_pll-supply = <&pm8941_l12>;
904
905 qcom,firmware-name = "wcnss";
906 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700907
Sameer Thalappil37c27af2012-09-05 13:33:06 -0700908 qcom,wcnss-wlan@fb000000 {
909 compatible = "qcom,wcnss_wlan";
910 reg = <0xfb000000 0x280000>;
911 reg-names = "wcnss_mmio";
912 interrupts = <0 145 0 0 146 0>;
913 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
914
915 qcom,pronto-vddmx-supply = <&pm8841_s1>;
916 qcom,pronto-vddcx-supply = <&pm8841_s2>;
917 qcom,pronto-vddpx-supply = <&pm8941_s3>;
918 qcom,iris-vddxo-supply = <&pm8941_l6>;
919 qcom,iris-vddrfa-supply = <&pm8941_l11>;
920 qcom,iris-vddpa-supply = <&pm8941_l19>;
921 qcom,iris-vdddig-supply = <&pm8941_l3>;
922
923 gpios = <&msmgpio 36 0>, <&msmgpio 37 0>, <&msmgpio 38 0>, <&msmgpio 39 0>, <&msmgpio 40 0>;
924 qcom,has_48mhz_xo;
925 qcom,has_pronto_hw;
926 };
927
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700928 qcom,ocmem@fdd00000 {
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700929 compatible = "qcom,msm-ocmem";
930 reg = <0xfdd00000 0x2000>,
931 <0xfdd02000 0x2000>,
932 <0xfe039000 0x400>,
933 <0xfec00000 0x180000>;
934 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
935 interrupts = <0 76 0 0 77 0>;
936 interrupt-names = "ocmem_irq", "dm_irq";
937 qcom,ocmem-num-regions = <0x3>;
Naveen Ramarajba3a6262012-08-02 17:14:27 -0700938 qcom,resource-type = <0x706d636f>;
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700939 #address-cells = <1>;
940 #size-cells = <1>;
941 ranges = <0x0 0xfec00000 0x180000>;
942
943 partition@0 {
944 reg = <0x0 0x100000>;
945 qcom,ocmem-part-name = "graphics";
946 qcom,ocmem-part-min = <0x80000>;
947 };
948
949 partition@80000 {
950 reg = <0x80000 0xA0000>;
951 qcom,ocmem-part-name = "lp_audio";
952 qcom,ocmem-part-min = <0xA0000>;
953 };
954
955 partition@E0000 {
956 reg = <0x120000 0x20000>;
Naveen Ramarajcc4ec152012-05-14 09:55:29 -0700957 qcom,ocmem-part-name = "other_os";
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700958 qcom,ocmem-part-min = <0x20000>;
959 };
960
961 partition@100000 {
962 reg = <0x100000 0x80000>;
963 qcom,ocmem-part-name = "video";
964 qcom,ocmem-part-min = <0x55000>;
965 };
966
967 partition@140000 {
968 reg = <0x140000 0x40000>;
969 qcom,ocmem-part-name = "sensors";
970 qcom,ocmem-part-min = <0x40000>;
971 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700972 };
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600973
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700974 rpm_bus: qcom,rpm-smd {
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600975 compatible = "qcom,rpm-smd";
976 rpm-channel-name = "rpm_requests";
977 rpm-channel-type = <15>; /* SMD_APPS_RPM */
978 };
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700979
980 qcom,msm-rng@f9bff000 {
981 compatible = "qcom,msm-rng";
982 reg = <0xf9bff000 0x200>;
983 };
Ramesh Masavarapufb1f01e2012-06-14 09:40:40 -0700984
985 qcom,qseecom@fe806000 {
986 compatible = "qcom,qseecom";
Neeti Desaidb076c52012-11-05 11:48:34 -0800987 reg = <0x7f00000 0x500000>;
988 reg-names = "secapp-region";
Gagan Macb2372ae2012-08-20 19:24:32 -0600989 qcom,msm-bus,name = "qseecom-noc";
990 qcom,msm-bus,num-cases = <4>;
991 qcom,msm-bus,active-only = <0>;
992 qcom,msm-bus,num-paths = <1>;
993 qcom,msm-bus,vectors-KBps =
Ramesh Masavarapu4e7b67d2012-09-14 12:12:23 -0700994 <55 512 0 0>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600995 <55 512 3936000 393600>,
996 <55 512 3936000 393600>,
997 <55 512 3936000 393600>;
Ramesh Masavarapufb1f01e2012-06-14 09:40:40 -0700998 };
Adrian Salido-Moreno5ef3ac02012-05-14 18:40:47 -0700999
Hanumant72aec702012-06-25 11:51:07 -07001000 qcom,wdt@f9017000 {
1001 compatible = "qcom,msm-watchdog";
1002 reg = <0xf9017000 0x1000>;
1003 interrupts = <0 3 0 0 4 0>;
1004 qcom,bark-time = <11000>;
1005 qcom,pet-time = <10000>;
1006 qcom,ipi-ping = <1>;
1007 };
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -07001008
Ramesh Masavarapu00847832012-09-12 13:57:37 -07001009 qcom,tz-log@fc03000 {
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -07001010 compatible = "qcom,tz-log";
Ramesh Masavarapu00847832012-09-12 13:57:37 -07001011 reg = <0x0fc03000 0x1000>;
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -07001012 };
Tianyi Gou828798d2012-05-02 21:12:38 -07001013
1014 qcom,venus@fdce0000 {
1015 compatible = "qcom,pil-venus";
1016 reg = <0xfdce0000 0x4000>,
1017 <0xfdc80208 0x8>;
Matt Wagantall1f168152012-09-25 13:26:47 -07001018 reg-names = "wrapper_base", "vbif_base";
Tianyi Gou828798d2012-05-02 21:12:38 -07001019 vdd-supply = <&gdsc_venus>;
1020
1021 qcom,firmware-name = "venus";
Tianyi Gou828798d2012-05-02 21:12:38 -07001022 };
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -07001023
Stepan Moskovchenkoc79a7382012-07-19 17:24:32 -07001024 qcom,cache_erp {
1025 compatible = "qcom,cache_erp";
1026 interrupts = <1 9 0>, <0 2 0>;
1027 interrupt-names = "l1_irq", "l2_irq";
1028 };
1029
Stepan Moskovchenko81f347d2012-09-12 18:53:21 -07001030 qcom,cache_dump {
1031 compatible = "qcom,cache_dump";
1032 qcom,l1-dump-size = <0x100000>;
1033 qcom,l2-dump-size = <0x500000>;
1034 qcom,memory-reservation-type = "EBI1";
1035 qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
1036 };
1037
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -07001038 tsens@fc4a8000 {
1039 compatible = "qcom,msm-tsens";
1040 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss18c1edd2012-09-11 11:49:21 -07001041 <0xfc4b8000 0x1000>;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -07001042 reg-names = "tsens_physical", "tsens_eeprom_physical";
1043 interrupts = <0 184 0>;
Siddartha Mohanadossf105cc02012-10-16 10:40:40 -07001044 qcom,calibration-less-mode;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -07001045 qcom,sensors = <11>;
Siddartha Mohanadoss205bce62012-07-27 17:17:18 -07001046 qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 3200
1047 3200 3200>;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -07001048 };
Laura Abbottf7e44042012-06-22 12:50:32 -07001049
1050 qcom,msm-rtb {
1051 compatible = "qcom,msm-rtb";
1052 qcom,memory-reservation-type = "EBI1";
1053 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1054 };
Mona Hossainb43e94b2012-05-07 08:52:06 -07001055
Mitchel Humpherys6ae3ae42012-10-30 15:12:52 -07001056 qcom,msm-contig-mem {
1057 compatible = "qcom,msm-contig-mem";
1058 qcom,memory-reservation-type = "EBI1";
1059 qcom,memory-reservation-size = <0x280000>; /* 2.5M EBI1 buffer */
1060 };
1061
Mona Hossainb43e94b2012-05-07 08:52:06 -07001062 qcom,qcedev@fd440000 {
1063 compatible = "qcom,qcedev";
1064 reg = <0xfd440000 0x20000>,
1065 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -07001066 reg-names = "crypto-base","crypto-bam-base";
Ramesh Masavarapu12759ad2012-09-06 20:11:05 -07001067 interrupts = <0 236 0>;
1068 qcom,bam-pipe-pair = <1>;
Mona Hossainb43e94b2012-05-07 08:52:06 -07001069 };
1070
1071 qcom,qcrypto@fd444000 {
1072 compatible = "qcom,qcrypto";
1073 reg = <0xfd440000 0x20000>,
1074 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -07001075 reg-names = "crypto-base","crypto-bam-base";
Ramesh Masavarapu12759ad2012-09-06 20:11:05 -07001076 interrupts = <0 236 0>;
1077 qcom,bam-pipe-pair = <2>;
Mona Hossainb43e94b2012-05-07 08:52:06 -07001078 };
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001079
1080 qcom,usbbam@f9304000 {
1081 compatible = "qcom,usb-bam-msm";
Manu Gautam6afd5872012-07-25 09:16:55 +05301082 reg = <0xf9304000 0x5000>,
Manu Gautam4658d892012-08-20 18:24:52 -07001083 <0xf9a44000 0x11000>,
1084 <0xf92f880c 0x4>;
1085 reg-names = "ssusb", "hsusb", "qscratch_ram1_reg";
Manu Gautam6afd5872012-07-25 09:16:55 +05301086 interrupts = <0 132 0 0 135 0>;
1087 interrupt-names = "ssusb", "hsusb";
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001088 qcom,usb-active-bam = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301089 qcom,usb-total-bam-num = <2>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001090 qcom,usb-bam-num-pipes = <16>;
1091 qcom,usb-base-address = <0xf9200000>;
Manu Gautamd4fa0022012-08-28 13:16:36 -07001092 qcom,ignore-core-reset-ack;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001093
1094 qcom,pipe1 {
1095 label = "usb-to-peri-qdss-dwc3";
1096 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301097 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001098 qcom,src-bam-physical-address = <0>;
1099 qcom,src-bam-pipe-index = <0>;
1100 qcom,dst-bam-physical-address = <0>;
1101 qcom,dst-bam-pipe-index = <0>;
1102 qcom,data-fifo-offset = <0>;
1103 qcom,data-fifo-size = <0>;
1104 qcom,descriptor-fifo-offset = <0>;
1105 qcom,descriptor-fifo-size = <0>;
1106 };
1107
1108 qcom,pipe2 {
1109 label = "peri-to-usb-qdss-dwc3";
1110 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301111 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001112 qcom,src-bam-physical-address = <0xfc37C000>;
1113 qcom,src-bam-pipe-index = <0>;
1114 qcom,dst-bam-physical-address = <0xf9304000>;
1115 qcom,dst-bam-pipe-index = <2>;
1116 qcom,data-fifo-offset = <0xf0000>;
Manu Gautam9c70c892012-10-19 16:34:26 +05301117 qcom,data-fifo-size = <0x1800>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001118 qcom,descriptor-fifo-offset = <0xf4000>;
1119 qcom,descriptor-fifo-size = <0x1400>;
1120 };
Manu Gautam6afd5872012-07-25 09:16:55 +05301121
1122 qcom,pipe3 {
1123 label = "usb-to-peri-qdss-hsusb";
1124 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -07001125 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301126 qcom,src-bam-physical-address = <0>;
1127 qcom,src-bam-pipe-index = <0>;
1128 qcom,dst-bam-physical-address = <0>;
1129 qcom,dst-bam-pipe-index = <0>;
1130 qcom,data-fifo-offset = <0>;
1131 qcom,data-fifo-size = <0>;
1132 qcom,descriptor-fifo-offset = <0>;
1133 qcom,descriptor-fifo-size = <0>;
1134 };
1135
1136 qcom,pipe4 {
1137 label = "peri-to-usb-qdss-hsusb";
1138 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -07001139 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301140 qcom,src-bam-physical-address = <0xfc37c000>;
1141 qcom,src-bam-pipe-index = <0>;
1142 qcom,dst-bam-physical-address = <0xf9a44000>;
1143 qcom,dst-bam-pipe-index = <2>;
Manu Gautam4658d892012-08-20 18:24:52 -07001144 qcom,data-fifo-offset = <0xf4000>;
1145 qcom,data-fifo-size = <0x1000>;
1146 qcom,descriptor-fifo-offset = <0xf5000>;
1147 qcom,descriptor-fifo-size = <0x400>;
Manu Gautam6afd5872012-07-25 09:16:55 +05301148 };
Shimrit Malichi57ae1492012-08-06 14:03:45 +03001149 };
Eugene Seahce52ef22012-07-12 12:40:38 -06001150
1151 qcom,msm-thermal {
1152 compatible = "qcom,msm-thermal";
1153 qcom,sensor-id = <0>;
1154 qcom,poll-ms = <250>;
1155 qcom,limit-temp = <60>;
1156 qcom,temp-hysteresis = <10>;
1157 qcom,freq-step = <2>;
1158 };
Anirudh Ghayalb70740f2012-08-01 09:00:49 +05301159
Jeff Hugo110bced2012-08-21 14:10:27 -06001160 qcom,bam_dmux@fc834000 {
1161 compatible = "qcom,bam_dmux";
1162 reg = <0xfc834000 0x7000>;
1163 interrupts = <0 29 1>;
1164 };
Pushkar Joshie54e93a2012-09-27 12:28:20 -07001165
1166 qcom,msm-wdog-debug@fc401000 {
1167 compatible = "qcom,msm-wdog-debug";
1168 reg = <0xfc401000 0x1000>;
1169 };
Hanumant Singhe39a0c32012-09-05 17:57:57 -07001170 qcom,msm-mem-hole {
1171 compatible = "qcom,msm-mem-hole";
Neeti Desaidb076c52012-11-05 11:48:34 -08001172 qcom,memblock-remove = <0x7f00000 0x8000000>; /* Address and Size of Hole */
Hanumant Singhe39a0c32012-09-05 17:57:57 -07001173 };
Jeff Hugo412356e2012-09-27 17:14:23 -06001174
1175 qcom,smem@fa00000 {
1176 compatible = "qcom,smem";
1177 reg = <0xfa00000 0x200000>,
1178 <0xfa006000 0x1000>,
1179 <0xfc428000 0x4000>;
1180 reg-names = "smem", "irq-reg-base", "aux-mem1";
1181
1182 qcom,smd-modem {
1183 compatible = "qcom,smd";
1184 qcom,smd-edge = <0>;
1185 qcom,smd-irq-offset = <0x8>;
1186 qcom,smd-irq-bitmask = <0x1000>;
1187 qcom,pil-string = "modem";
1188 interrupts = <0 25 1>;
1189 };
1190
1191 qcom,smsm-modem {
1192 compatible = "qcom,smsm";
1193 qcom,smsm-edge = <0>;
1194 qcom,smsm-irq-offset = <0x8>;
1195 qcom,smsm-irq-bitmask = <0x2000>;
1196 interrupts = <0 26 1>;
1197 };
1198
1199 qcom,smd-adsp {
1200 compatible = "qcom,smd";
1201 qcom,smd-edge = <1>;
1202 qcom,smd-irq-offset = <0x8>;
1203 qcom,smd-irq-bitmask = <0x100>;
1204 qcom,pil-string = "adsp";
1205 interrupts = <0 156 1>;
1206 };
1207
1208 qcom,smsm-adsp {
1209 compatible = "qcom,smsm";
1210 qcom,smsm-edge = <1>;
1211 qcom,smsm-irq-offset = <0x8>;
1212 qcom,smsm-irq-bitmask = <0x200>;
1213 interrupts = <0 157 1>;
1214 };
1215
1216 qcom,smd-wcnss {
1217 compatible = "qcom,smd";
1218 qcom,smd-edge = <6>;
1219 qcom,smd-irq-offset = <0x8>;
1220 qcom,smd-irq-bitmask = <0x20000>;
1221 qcom,pil-string = "wcnss";
1222 interrupts = <0 142 1>;
1223 };
1224
1225 qcom,smsm-wcnss {
1226 compatible = "qcom,smsm";
1227 qcom,smsm-edge = <6>;
1228 qcom,smsm-irq-offset = <0x8>;
1229 qcom,smsm-irq-bitmask = <0x80000>;
1230 interrupts = <0 144 1>;
1231 };
1232
1233 qcom,smd-rpm {
1234 compatible = "qcom,smd";
1235 qcom,smd-edge = <15>;
1236 qcom,smd-irq-offset = <0x8>;
1237 qcom,smd-irq-bitmask = <0x1>;
1238 interrupts = <0 168 1>;
1239 qcom,irq-no-suspend;
1240 };
1241 };
Sathish Ambley4df614c2011-10-07 16:30:46 -07001242};
Varad Deshmukh18057ed2012-07-03 16:34:53 -07001243
Patrick Dalye8977aa2012-11-06 15:25:58 -08001244&gdsc_venus {
1245 status = "ok";
1246};
1247
1248&gdsc_mdss {
1249 status = "ok";
1250};
1251
1252&gdsc_jpeg {
1253 status = "ok";
1254};
1255
1256&gdsc_vfe {
1257 status = "ok";
1258};
1259
1260&gdsc_oxili_gx {
1261 status = "ok";
1262};
1263
1264&gdsc_oxili_cx {
1265 status = "ok";
1266};
1267
1268&gdsc_usb_hsic {
1269 status = "ok";
1270};
1271
Varad Deshmukh18057ed2012-07-03 16:34:53 -07001272/include/ "msm-pm8x41-rpm-regulator.dtsi"
1273/include/ "msm-pm8841.dtsi"
1274/include/ "msm-pm8941.dtsi"
1275/include/ "msm8974-regulator.dtsi"
Michael Bohanee1f8fe2012-08-03 18:32:16 -07001276/include/ "msm8974-clock.dtsi"