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Stepan Moskovchenko73a50f62012-05-03 17:29:12 -07001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070011 */
12
13#ifndef MSM_IOMMU_H
14#define MSM_IOMMU_H
15
16#include <linux/interrupt.h>
Stepan Moskovchenko41f3f512011-02-24 18:00:39 -080017#include <linux/clk.h>
Stepan Moskovchenko6751acc2012-06-21 17:36:47 -070018#include <linux/regulator/consumer.h>
Stepan Moskovchenko15f209c2011-10-31 15:32:44 -070019#include <mach/socinfo.h>
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070020
Stepan Moskovchenko6ee3be82011-11-08 15:24:53 -080021extern pgprot_t pgprot_kernel;
Sathish Ambleyd1b89ed2012-02-07 21:47:47 -080022extern struct platform_device *msm_iommu_root_dev;
Stepan Moskovchenko08bd6832010-11-15 18:19:35 -080023
Stepan Moskovchenkob2438892011-08-31 17:16:19 -070024/* Domain attributes */
25#define MSM_IOMMU_DOMAIN_PT_CACHEABLE 0x1
26
Stepan Moskovchenko08bd6832010-11-15 18:19:35 -080027/* Mask for the cache policy attribute */
28#define MSM_IOMMU_CP_MASK 0x03
29
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070030/* Maximum number of Machine IDs that we are allowing to be mapped to the same
31 * context bank. The number of MIDs mapped to the same CB does not affect
32 * performance, but there is a practical limit on how many distinct MIDs may
33 * be present. These mappings are typically determined at design time and are
34 * not expected to change at run time.
35 */
Stepan Moskovchenko23513c32010-11-12 19:29:47 -080036#define MAX_NUM_MIDS 32
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070037
38/**
39 * struct msm_iommu_dev - a single IOMMU hardware instance
40 * name Human-readable name given to this IOMMU HW instance
Stepan Moskovchenkoa43d8c12011-02-24 18:00:42 -080041 * ncb Number of context banks present on this IOMMU HW instance
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070042 */
43struct msm_iommu_dev {
44 const char *name;
Stepan Moskovchenkoa43d8c12011-02-24 18:00:42 -080045 int ncb;
Shubhraprakash Das935e6a52012-04-05 14:47:30 -060046 int ttbr_split;
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070047};
48
49/**
50 * struct msm_iommu_ctx_dev - an IOMMU context bank instance
51 * name Human-readable name given to this context bank
52 * num Index of this context bank within the hardware
53 * mids List of Machine IDs that are to be mapped into this context
54 * bank, terminated by -1. The MID is a set of signals on the
55 * AXI bus that identifies the function associated with a specific
56 * memory request. (See ARM spec).
57 */
58struct msm_iommu_ctx_dev {
59 const char *name;
60 int num;
61 int mids[MAX_NUM_MIDS];
62};
63
64
65/**
66 * struct msm_iommu_drvdata - A single IOMMU hardware instance
67 * @base: IOMMU config port base address (VA)
Stepan Moskovchenkoa43d8c12011-02-24 18:00:42 -080068 * @ncb The number of contexts on this IOMMU
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070069 * @irq: Interrupt number
Stepan Moskovchenko41f3f512011-02-24 18:00:39 -080070 * @clk: The bus clock for this IOMMU hardware instance
71 * @pclk: The clock for the IOMMU bus interconnect
72 *
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070073 * A msm_iommu_drvdata holds the global driver data about a single piece
74 * of an IOMMU hardware instance.
75 */
76struct msm_iommu_drvdata {
77 void __iomem *base;
Stepan Moskovchenkoa43d8c12011-02-24 18:00:42 -080078 int ncb;
Shubhraprakash Das935e6a52012-04-05 14:47:30 -060079 int ttbr_split;
Stepan Moskovchenko41f3f512011-02-24 18:00:39 -080080 struct clk *clk;
81 struct clk *pclk;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070082 const char *name;
Stepan Moskovchenko6751acc2012-06-21 17:36:47 -070083 struct regulator *gdsc;
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -070084};
85
86/**
87 * struct msm_iommu_ctx_drvdata - an IOMMU context bank instance
88 * @num: Hardware context number of this context
89 * @pdev: Platform device associated wit this HW instance
90 * @attached_elm: List element for domains to track which devices are
91 * attached to them
92 *
93 * A msm_iommu_ctx_drvdata holds the driver data for a single context bank
94 * within each IOMMU hardware instance
95 */
96struct msm_iommu_ctx_drvdata {
97 int num;
98 struct platform_device *pdev;
99 struct list_head attached_elm;
Stepan Moskovchenko73a50f62012-05-03 17:29:12 -0700100 struct iommu_domain *attached_domain;
101 const char *name;
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -0700102};
103
104/*
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -0700105 * Interrupt handler for the IOMMU context fault interrupt. Hooking the
106 * interrupt is not supported in the API yet, but this will print an error
107 * message and dump useful IOMMU registers.
108 */
109irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id);
Sathish Ambleyd1b89ed2012-02-07 21:47:47 -0800110irqreturn_t msm_iommu_fault_handler_v2(int irq, void *dev_id);
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -0700111
Shubhraprakash Dasf4f600f2011-08-12 13:27:34 -0600112#ifdef CONFIG_MSM_IOMMU
113/*
114 * Look up an IOMMU context device by its context name. NULL if none found.
115 * Useful for testing and drivers that do not yet fully have IOMMU stuff in
116 * their platform devices.
117 */
118struct device *msm_iommu_get_ctx(const char *ctx_name);
119#else
120static inline struct device *msm_iommu_get_ctx(const char *ctx_name)
121{
122 return NULL;
123}
124#endif
125
Stepan Moskovchenko0720d1f2010-08-24 18:31:10 -0700126#endif
Stepan Moskovchenko15f209c2011-10-31 15:32:44 -0700127
Sathish Ambleyd1b89ed2012-02-07 21:47:47 -0800128static inline int msm_soc_version_supports_iommu_v1(void)
Stepan Moskovchenko15f209c2011-10-31 15:32:44 -0700129{
Sathish Ambleyd1b89ed2012-02-07 21:47:47 -0800130#ifdef CONFIG_OF
131 struct device_node *node;
132
133 node = of_find_compatible_node(NULL, NULL, "qcom,msm-smmu-v2");
134 if (node) {
135 of_node_put(node);
136 return 0;
137 }
138#endif
Stepan Moskovchenko15f209c2011-10-31 15:32:44 -0700139 if (cpu_is_msm8960() &&
140 SOCINFO_VERSION_MAJOR(socinfo_get_version()) < 2)
141 return 0;
142
143 if (cpu_is_msm8x60() &&
144 (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2 ||
145 SOCINFO_VERSION_MINOR(socinfo_get_version()) < 1)) {
146 return 0;
147 }
148 return 1;
149}