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Simmi Pateriya1b9a3092013-01-02 11:49:26 +05301/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070021#include <linux/wait.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053022#include <linux/mfd/wcd9xxx/core.h>
23#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
24#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
25#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053026#include <sound/pcm.h>
27#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <sound/soc.h>
29#include <sound/soc-dapm.h>
30#include <sound/tlv.h>
31#include <linux/bitops.h>
32#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080033#include <linux/pm_runtime.h>
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070034#include <linux/kernel.h>
35#include <linux/gpio.h>
Joonwoo Parkecf379c2012-10-04 16:57:52 -070036#include <linux/irq.h>
37#include <linux/wakelock.h>
38#include <linux/suspend.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039#include "wcd9310.h"
40
Joonwoo Parkc1c67a92012-08-07 16:05:36 -070041static int cfilt_adjust_ms = 10;
42module_param(cfilt_adjust_ms, int, 0644);
43MODULE_PARM_DESC(cfilt_adjust_ms, "delay after adjusting cfilt voltage in ms");
44
Kiran Kandi1e6371d2012-03-29 11:48:57 -070045#define WCD9310_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
46 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
47 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
48
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070049
50#define NUM_DECIMATORS 10
51#define NUM_INTERPOLATORS 7
52#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080053#define TABLA_CFILT_FAST_MODE 0x00
54#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080055#define MBHC_FW_READ_ATTEMPTS 15
56#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070057
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070058#define SLIM_CLOSE_TIMEOUT 1000
59
Joonwoo Park03324832012-03-19 19:36:16 -070060enum {
61 MBHC_USE_HPHL_TRIGGER = 1,
62 MBHC_USE_MB_TRIGGER = 2
63};
64
65#define MBHC_NUM_DCE_PLUG_DETECT 3
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070066#define NUM_ATTEMPTS_INSERT_DETECT 25
67#define NUM_ATTEMPTS_TO_REPORT 5
Joonwoo Park03324832012-03-19 19:36:16 -070068
Joonwoo Park2cc13f02012-05-09 12:44:25 -070069#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | \
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -070070 SND_JACK_OC_HPHR | SND_JACK_LINEOUT | \
71 SND_JACK_UNSUPPORTED)
Patrick Lai49efeac2011-11-03 11:01:12 -070072
Santosh Mardie15e2302011-11-15 10:39:23 +053073#define TABLA_I2S_MASTER_MODE_MASK 0x08
74
Patrick Laic7cae882011-11-18 11:52:49 -080075#define TABLA_OCP_ATTEMPT 1
76
Kuirong Wang906ac472012-07-09 12:54:44 -070077enum {
78 AIF1_PB = 0,
79 AIF1_CAP,
80 AIF2_PB,
81 AIF2_CAP,
82 AIF3_PB,
83 AIF3_CAP,
84 NUM_CODEC_DAIS,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080085};
86
Kuirong Wang906ac472012-07-09 12:54:44 -070087enum {
88 RX_MIX1_INP_SEL_ZERO = 0,
89 RX_MIX1_INP_SEL_SRC1,
90 RX_MIX1_INP_SEL_SRC2,
91 RX_MIX1_INP_SEL_IIR1,
92 RX_MIX1_INP_SEL_IIR2,
93 RX_MIX1_INP_SEL_RX1,
94 RX_MIX1_INP_SEL_RX2,
95 RX_MIX1_INP_SEL_RX3,
96 RX_MIX1_INP_SEL_RX4,
97 RX_MIX1_INP_SEL_RX5,
98 RX_MIX1_INP_SEL_RX6,
99 RX_MIX1_INP_SEL_RX7,
100};
101
Kuirong Wang678e4172012-06-26 15:35:22 -0700102#define TABLA_COMP_DIGITAL_GAIN_HP_OFFSET 3
103#define TABLA_COMP_DIGITAL_GAIN_LINEOUT_OFFSET 6
Kuirong Wang906ac472012-07-09 12:54:44 -0700104
Joonwoo Park0976d012011-12-22 11:48:18 -0800105#define TABLA_MCLK_RATE_12288KHZ 12288000
106#define TABLA_MCLK_RATE_9600KHZ 9600000
107
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800108#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -0800109#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800110
Joonwoo Park03324832012-03-19 19:36:16 -0700111#define TABLA_MBHC_BUTTON_MIN 0x8000
112
Joonwoo Park03324832012-03-19 19:36:16 -0700113#define TABLA_MBHC_FAKE_INSERT_LOW 10
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700114#define TABLA_MBHC_FAKE_INSERT_HIGH 80
115#define TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO 150
Joonwoo Park03324832012-03-19 19:36:16 -0700116
117#define TABLA_MBHC_STATUS_REL_DETECTION 0x0C
118
Joonwoo Parkdb606b02012-08-11 13:46:30 -0700119#define TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS 50
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700120
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700121#define TABLA_MBHC_FAKE_INS_DELTA_MV 200
122#define TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV 300
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700123
124#define TABLA_HS_DETECT_PLUG_TIME_MS (5 * 1000)
125#define TABLA_HS_DETECT_PLUG_INERVAL_MS 100
126
127#define TABLA_GPIO_IRQ_DEBOUNCE_TIME_US 5000
128
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700129#define TABLA_MBHC_GND_MIC_SWAP_THRESHOLD 2
130
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -0800131#define TABLA_ACQUIRE_LOCK(x) do { \
132 mutex_lock_nested(&x, SINGLE_DEPTH_NESTING); \
133} while (0)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700134#define TABLA_RELEASE_LOCK(x) do { mutex_unlock(&x); } while (0)
135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
137static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
138static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800139static struct snd_soc_dai_driver tabla_dai[];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800140static const DECLARE_TLV_DB_SCALE(aux_pga_gain, 0, 2, 0);
Kiran Kandi93923902012-06-20 17:00:25 -0700141static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
142 struct snd_kcontrol *kcontrol, int event);
143static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
144 struct snd_kcontrol *kcontrol, int event);
145
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700146
147enum tabla_bandgap_type {
148 TABLA_BANDGAP_OFF = 0,
149 TABLA_BANDGAP_AUDIO_MODE,
150 TABLA_BANDGAP_MBHC_MODE,
151};
152
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700153struct mbhc_micbias_regs {
154 u16 cfilt_val;
155 u16 cfilt_ctl;
156 u16 mbhc_reg;
157 u16 int_rbias;
158 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -0800159 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700160};
161
Ben Romberger1f045a72011-11-04 10:14:57 -0700162/* Codec supports 2 IIR filters */
163enum {
164 IIR1 = 0,
165 IIR2,
166 IIR_MAX,
167};
168/* Codec supports 5 bands */
169enum {
170 BAND1 = 0,
171 BAND2,
172 BAND3,
173 BAND4,
174 BAND5,
175 BAND_MAX,
176};
177
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800178enum {
179 COMPANDER_1 = 0,
180 COMPANDER_2,
181 COMPANDER_MAX,
182};
183
184enum {
185 COMPANDER_FS_8KHZ = 0,
186 COMPANDER_FS_16KHZ,
187 COMPANDER_FS_32KHZ,
188 COMPANDER_FS_48KHZ,
Kiran Kandi1e6371d2012-03-29 11:48:57 -0700189 COMPANDER_FS_96KHZ,
190 COMPANDER_FS_192KHZ,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800191 COMPANDER_FS_MAX,
192};
193
Kuirong Wang678e4172012-06-26 15:35:22 -0700194enum {
195 COMP_SHUTDWN_TIMEOUT_PCM_1 = 0,
196 COMP_SHUTDWN_TIMEOUT_PCM_240,
197 COMP_SHUTDWN_TIMEOUT_PCM_480,
198 COMP_SHUTDWN_TIMEOUT_PCM_960,
199 COMP_SHUTDWN_TIMEOUT_PCM_1440,
200 COMP_SHUTDWN_TIMEOUT_PCM_2880,
201 COMP_SHUTDWN_TIMEOUT_PCM_5760,
202};
203
Joonwoo Parka9444452011-12-08 18:48:27 -0800204/* Flags to track of PA and DAC state.
205 * PA and DAC should be tracked separately as AUXPGA loopback requires
206 * only PA to be turned on without DAC being on. */
207enum tabla_priv_ack_flags {
208 TABLA_HPHL_PA_OFF_ACK = 0,
209 TABLA_HPHR_PA_OFF_ACK,
210 TABLA_HPHL_DAC_OFF_ACK,
211 TABLA_HPHR_DAC_OFF_ACK
212};
213
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800214
215struct comp_sample_dependent_params {
216 u32 peak_det_timeout;
217 u32 rms_meter_div_fact;
218 u32 rms_meter_resamp_fact;
Kuirong Wang678e4172012-06-26 15:35:22 -0700219 u32 shutdown_timeout;
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800220};
221
Joonwoo Park0976d012011-12-22 11:48:18 -0800222/* Data used by MBHC */
223struct mbhc_internal_cal_data {
224 u16 dce_z;
225 u16 dce_mb;
226 u16 sta_z;
227 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800228 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800229 u32 t_dce;
230 u32 t_sta;
231 u32 micb_mv;
232 u16 v_ins_hu;
233 u16 v_ins_h;
234 u16 v_b1_hu;
235 u16 v_b1_h;
236 u16 v_b1_huc;
237 u16 v_brh;
238 u16 v_brl;
239 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800240 u8 npoll;
241 u8 nbounce_wait;
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700242 s16 adj_v_hs_max;
243 u16 adj_v_ins_hu;
244 u16 adj_v_ins_h;
245 s16 v_inval_ins_low;
246 s16 v_inval_ins_high;
Joonwoo Park0976d012011-12-22 11:48:18 -0800247};
248
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800249struct tabla_reg_address {
250 u16 micb_4_ctl;
251 u16 micb_4_int_rbias;
252 u16 micb_4_mbhc;
253};
254
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700255enum tabla_mbhc_plug_type {
Joonwoo Park41956722012-04-18 13:13:07 -0700256 PLUG_TYPE_INVALID = -1,
257 PLUG_TYPE_NONE,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700258 PLUG_TYPE_HEADSET,
259 PLUG_TYPE_HEADPHONE,
260 PLUG_TYPE_HIGH_HPH,
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700261 PLUG_TYPE_GND_MIC_SWAP,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700262};
263
264enum tabla_mbhc_state {
265 MBHC_STATE_NONE = -1,
266 MBHC_STATE_POTENTIAL,
267 MBHC_STATE_POTENTIAL_RECOVERY,
268 MBHC_STATE_RELEASE,
269};
270
Kiran Kandid8cf5212012-03-02 15:34:53 -0800271struct hpf_work {
272 struct tabla_priv *tabla;
273 u32 decimator;
274 u8 tx_hpf_cut_of_freq;
275 struct delayed_work dwork;
276};
277
278static struct hpf_work tx_hpf_work[NUM_DECIMATORS];
279
Kuirong Wang906ac472012-07-09 12:54:44 -0700280static const struct wcd9xxx_ch tabla_rx_chs[TABLA_RX_MAX] = {
281 WCD9XXX_CH(10, 0),
282 WCD9XXX_CH(11, 1),
283 WCD9XXX_CH(12, 2),
284 WCD9XXX_CH(13, 3),
285 WCD9XXX_CH(14, 4),
286 WCD9XXX_CH(15, 5),
287 WCD9XXX_CH(16, 6)
288};
289
290static const struct wcd9xxx_ch tabla_tx_chs[TABLA_TX_MAX] = {
291 WCD9XXX_CH(0, 0),
292 WCD9XXX_CH(1, 1),
293 WCD9XXX_CH(2, 2),
294 WCD9XXX_CH(3, 3),
295 WCD9XXX_CH(4, 4),
296 WCD9XXX_CH(5, 5),
297 WCD9XXX_CH(6, 6),
298 WCD9XXX_CH(7, 7),
299 WCD9XXX_CH(8, 8),
300 WCD9XXX_CH(9, 9)
301};
302
303static const u32 vport_check_table[NUM_CODEC_DAIS] = {
304 0, /* AIF1_PB */
305 (1 << AIF2_CAP) | (1 << AIF3_CAP), /* AIF1_CAP */
306 0, /* AIF2_PB */
307 (1 << AIF1_CAP) | (1 << AIF3_CAP), /* AIF2_CAP */
308 0, /* AIF2_PB */
309 (1 << AIF1_CAP) | (1 << AIF2_CAP), /* AIF2_CAP */
310};
311
Venkat Sudhir96dd28c2012-12-04 17:00:19 -0800312static const u32 vport_i2s_check_table[NUM_CODEC_DAIS] = {
313 0, /* AIF1_PB */
314 0, /* AIF1_CAP */
315};
316
Bradley Rubin229c6a52011-07-12 16:18:48 -0700317struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700318 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800319 struct tabla_reg_address reg_addr;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700320 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700321 u32 cfilt1_cnt;
322 u32 cfilt2_cnt;
323 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700324 u32 rx_bias_count;
Kiran Kandi0ba468f2012-05-08 11:45:05 -0700325 s32 dmic_1_2_clk_cnt;
326 s32 dmic_3_4_clk_cnt;
327 s32 dmic_5_6_clk_cnt;
328
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700329 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700330 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700331 bool clock_active;
332 bool config_mode_active;
333 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800334 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700335 int buttons_pressed;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700336 enum tabla_mbhc_state mbhc_state;
337 struct tabla_mbhc_config mbhc_cfg;
Joonwoo Park0976d012011-12-22 11:48:18 -0800338 struct mbhc_internal_cal_data mbhc_data;
Simmi Pateriya71d63872012-11-08 01:06:30 +0530339 u32 ldo_h_count;
340 u32 micbias_enable_count[TABLA_NUM_MICBIAS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700341
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530342 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700343 u32 anc_slot;
Damir Didjustoc6f83cb2012-12-03 00:54:14 -0800344 bool anc_func;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700345 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700346 /* Delayed work to report long button press */
Joonwoo Park03324832012-03-19 19:36:16 -0700347 struct delayed_work mbhc_btn_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700348
349 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700350 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700351
Joonwoo Parka9444452011-12-08 18:48:27 -0800352 /* track PA/DAC state */
353 unsigned long hph_pa_dac_state;
354
Santosh Mardie15e2302011-11-15 10:39:23 +0530355 /*track tabla interface type*/
356 u8 intf_type;
357
Patrick Lai49efeac2011-11-03 11:01:12 -0700358 u32 hph_status; /* track headhpone status */
359 /* define separate work for left and right headphone OCP to avoid
360 * additional checking on which OCP event to report so no locking
361 * to ensure synchronization is required
362 */
363 struct work_struct hphlocp_work; /* reporting left hph ocp off */
364 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800365
Patrick Laic7cae882011-11-18 11:52:49 -0800366 u8 hphlocp_cnt; /* headphone left ocp retry */
367 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800368
Patrick Lai64b43262011-12-06 17:29:15 -0800369 /* Work to perform MBHC Firmware Read */
370 struct delayed_work mbhc_firmware_dwork;
371 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800372
373 /* num of slim ports required */
Kuirong Wang906ac472012-07-09 12:54:44 -0700374 struct wcd9xxx_codec_dai_data dai[NUM_CODEC_DAIS];
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800375
376 /*compander*/
377 int comp_enabled[COMPANDER_MAX];
378 u32 comp_fs[COMPANDER_MAX];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800379
380 /* Maintain the status of AUX PGA */
381 int aux_pga_cnt;
382 u8 aux_l_gain;
383 u8 aux_r_gain;
Joonwoo Park03324832012-03-19 19:36:16 -0700384
Joonwoo Park03324832012-03-19 19:36:16 -0700385 struct delayed_work mbhc_insert_dwork;
386 unsigned long mbhc_last_resume; /* in jiffies */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700387
388 u8 current_plug;
389 struct work_struct hs_correct_plug_work;
390 bool hs_detect_work_stop;
391 bool hs_polling_irq_prepared;
392 bool lpi_enabled; /* low power insertion detection */
393 bool in_gpio_handler;
394 /* Currently, only used for mbhc purpose, to protect
395 * concurrent execution of mbhc threaded irq handlers and
396 * kill race between DAPM and MBHC.But can serve as a
397 * general lock to protect codec resource
398 */
399 struct mutex codec_resource_lock;
400
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -0700401 /* Work to perform polling on microphone voltage
402 * in order to correct plug type once plug type
403 * is detected as headphone
404 */
405 struct work_struct hs_correct_plug_work_nogpio;
406
Joonwoo Parkecf379c2012-10-04 16:57:52 -0700407 bool gpio_irq_resend;
408 struct wake_lock irq_resend_wlock;
409
Bradley Rubincb3950a2011-08-18 13:07:26 -0700410#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700411 struct dentry *debugfs_poke;
412 struct dentry *debugfs_mbhc;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700413#endif
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700414};
415
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800416static const u32 comp_shift[] = {
417 0,
Kuirong Wang678e4172012-06-26 15:35:22 -0700418 1,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800419};
420
421static const int comp_rx_path[] = {
422 COMPANDER_1,
423 COMPANDER_1,
424 COMPANDER_2,
425 COMPANDER_2,
426 COMPANDER_2,
427 COMPANDER_2,
428 COMPANDER_MAX,
429};
430
Kuirong Wang678e4172012-06-26 15:35:22 -0700431static const struct comp_sample_dependent_params
432 comp_samp_params[COMPANDER_FS_MAX] = {
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800433 {
Kuirong Wang678e4172012-06-26 15:35:22 -0700434 .peak_det_timeout = 0x6,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800435 .rms_meter_div_fact = 0x9 << 4,
Kuirong Wang678e4172012-06-26 15:35:22 -0700436 .rms_meter_resamp_fact = 0x06,
437 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_240 << 3,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800438 },
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800439 {
Kuirong Wang678e4172012-06-26 15:35:22 -0700440 .peak_det_timeout = 0x7,
441 .rms_meter_div_fact = 0xA << 4,
442 .rms_meter_resamp_fact = 0x0C,
443 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_480 << 3,
444 },
445 {
446 .peak_det_timeout = 0x8,
447 .rms_meter_div_fact = 0xB << 4,
448 .rms_meter_resamp_fact = 0x30,
449 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_960 << 3,
450 },
451 {
452 .peak_det_timeout = 0x9,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800453 .rms_meter_div_fact = 0xB << 4,
454 .rms_meter_resamp_fact = 0x28,
Kuirong Wang678e4172012-06-26 15:35:22 -0700455 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_1440 << 3,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800456 },
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800457 {
Kuirong Wang678e4172012-06-26 15:35:22 -0700458 .peak_det_timeout = 0xA,
459 .rms_meter_div_fact = 0xC << 4,
460 .rms_meter_resamp_fact = 0x50,
461 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_2880 << 3,
462 },
463 {
464 .peak_det_timeout = 0xB,
465 .rms_meter_div_fact = 0xC << 4,
466 .rms_meter_resamp_fact = 0x50,
467 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_5760 << 3,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800468 },
469};
470
Kuirong Wange9c8a222012-03-28 16:24:09 -0700471static unsigned short rx_digital_gain_reg[] = {
472 TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
473 TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
474 TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
475 TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
476 TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
477 TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
478 TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
479};
480
481
482static unsigned short tx_digital_gain_reg[] = {
483 TABLA_A_CDC_TX1_VOL_CTL_GAIN,
484 TABLA_A_CDC_TX2_VOL_CTL_GAIN,
485 TABLA_A_CDC_TX3_VOL_CTL_GAIN,
486 TABLA_A_CDC_TX4_VOL_CTL_GAIN,
487 TABLA_A_CDC_TX5_VOL_CTL_GAIN,
488 TABLA_A_CDC_TX6_VOL_CTL_GAIN,
489 TABLA_A_CDC_TX7_VOL_CTL_GAIN,
490 TABLA_A_CDC_TX8_VOL_CTL_GAIN,
491 TABLA_A_CDC_TX9_VOL_CTL_GAIN,
492 TABLA_A_CDC_TX10_VOL_CTL_GAIN,
493};
494
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700495static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
496 struct snd_kcontrol *kcontrol, int event)
497{
498 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700499
500 pr_debug("%s %d\n", __func__, event);
501 switch (event) {
502 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700503 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
504 0x01);
505 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
506 usleep_range(200, 200);
507 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
508 break;
509 case SND_SOC_DAPM_PRE_PMD:
510 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
511 0x10);
512 usleep_range(20, 20);
513 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
514 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
515 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
516 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
517 0x00);
Fred Oh54d24d72012-11-29 15:57:36 -0800518 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
519 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700520 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700521 break;
522 }
523 return 0;
524}
525
Bradley Rubina7096d02011-08-03 18:29:02 -0700526static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_value *ucontrol)
528{
529 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
531 ucontrol->value.integer.value[0] = tabla->anc_slot;
532 return 0;
533}
534
535static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
536 struct snd_ctl_elem_value *ucontrol)
537{
538 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
539 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
540 tabla->anc_slot = ucontrol->value.integer.value[0];
541 return 0;
542}
543
Damir Didjustoc6f83cb2012-12-03 00:54:14 -0800544static int tabla_get_anc_func(struct snd_kcontrol *kcontrol,
545 struct snd_ctl_elem_value *ucontrol)
546{
547 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
548 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
549 ucontrol->value.integer.value[0] = (tabla->anc_func == true ? 1 : 0);
550 return 0;
551}
552
553static int tabla_put_anc_func(struct snd_kcontrol *kcontrol,
554 struct snd_ctl_elem_value *ucontrol)
555{
556 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
557 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
558 struct snd_soc_dapm_context *dapm = &codec->dapm;
559
560 mutex_lock(&dapm->codec->mutex);
561
562 tabla->anc_func = (!ucontrol->value.integer.value[0] ? false : true);
563
564 dev_dbg(codec->dev, "%s: anc_func %x", __func__, tabla->anc_func);
565
566 if (tabla->anc_func == true) {
567 snd_soc_dapm_enable_pin(dapm, "ANC HPHR");
568 snd_soc_dapm_enable_pin(dapm, "ANC HPHL");
569 snd_soc_dapm_enable_pin(dapm, "ANC HEADPHONE");
570 snd_soc_dapm_disable_pin(dapm, "HPHR");
571 snd_soc_dapm_disable_pin(dapm, "HPHL");
572 snd_soc_dapm_disable_pin(dapm, "HEADPHONE");
573 } else {
574 snd_soc_dapm_disable_pin(dapm, "ANC HPHR");
575 snd_soc_dapm_disable_pin(dapm, "ANC HPHL");
576 snd_soc_dapm_disable_pin(dapm, "ANC HEADPHONE");
577 snd_soc_dapm_enable_pin(dapm, "HPHR");
578 snd_soc_dapm_enable_pin(dapm, "HPHL");
579 snd_soc_dapm_enable_pin(dapm, "HEADPHONE");
580 }
581 snd_soc_dapm_sync(dapm);
582 mutex_unlock(&dapm->codec->mutex);
583 return 0;
584}
585
Kiran Kandid2d86b52011-09-09 17:44:28 -0700586static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
587 struct snd_ctl_elem_value *ucontrol)
588{
589 u8 ear_pa_gain;
590 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
591
592 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
593
594 ear_pa_gain = ear_pa_gain >> 5;
595
596 if (ear_pa_gain == 0x00) {
597 ucontrol->value.integer.value[0] = 0;
598 } else if (ear_pa_gain == 0x04) {
599 ucontrol->value.integer.value[0] = 1;
600 } else {
601 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
602 __func__, ear_pa_gain);
603 return -EINVAL;
604 }
605
606 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
607
608 return 0;
609}
610
611static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
612 struct snd_ctl_elem_value *ucontrol)
613{
614 u8 ear_pa_gain;
615 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
616
617 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
618 ucontrol->value.integer.value[0]);
619
620 switch (ucontrol->value.integer.value[0]) {
621 case 0:
622 ear_pa_gain = 0x00;
623 break;
624 case 1:
625 ear_pa_gain = 0x80;
626 break;
627 default:
628 return -EINVAL;
629 }
630
631 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
632 return 0;
633}
634
Ben Romberger1f045a72011-11-04 10:14:57 -0700635static int tabla_get_iir_enable_audio_mixer(
636 struct snd_kcontrol *kcontrol,
637 struct snd_ctl_elem_value *ucontrol)
638{
639 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
640 int iir_idx = ((struct soc_multi_mixer_control *)
641 kcontrol->private_value)->reg;
642 int band_idx = ((struct soc_multi_mixer_control *)
643 kcontrol->private_value)->shift;
644
645 ucontrol->value.integer.value[0] =
646 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
647 (1 << band_idx);
648
649 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
650 iir_idx, band_idx,
651 (uint32_t)ucontrol->value.integer.value[0]);
652 return 0;
653}
654
655static int tabla_put_iir_enable_audio_mixer(
656 struct snd_kcontrol *kcontrol,
657 struct snd_ctl_elem_value *ucontrol)
658{
659 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
660 int iir_idx = ((struct soc_multi_mixer_control *)
661 kcontrol->private_value)->reg;
662 int band_idx = ((struct soc_multi_mixer_control *)
663 kcontrol->private_value)->shift;
664 int value = ucontrol->value.integer.value[0];
665
666 /* Mask first 5 bits, 6-8 are reserved */
667 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
668 (1 << band_idx), (value << band_idx));
669
670 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
671 iir_idx, band_idx, value);
672 return 0;
673}
674static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
675 int iir_idx, int band_idx,
676 int coeff_idx)
677{
678 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800679 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700680 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800681 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700682
683 /* Mask bits top 2 bits since they are reserved */
684 return ((snd_soc_read(codec,
685 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
686 (snd_soc_read(codec,
687 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
688 (snd_soc_read(codec,
689 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
690 (snd_soc_read(codec,
691 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
692 0x3FFFFFFF;
693}
694
695static int tabla_get_iir_band_audio_mixer(
696 struct snd_kcontrol *kcontrol,
697 struct snd_ctl_elem_value *ucontrol)
698{
699 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
700 int iir_idx = ((struct soc_multi_mixer_control *)
701 kcontrol->private_value)->reg;
702 int band_idx = ((struct soc_multi_mixer_control *)
703 kcontrol->private_value)->shift;
704
705 ucontrol->value.integer.value[0] =
706 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
707 ucontrol->value.integer.value[1] =
708 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
709 ucontrol->value.integer.value[2] =
710 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
711 ucontrol->value.integer.value[3] =
712 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
713 ucontrol->value.integer.value[4] =
714 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
715
716 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
717 "%s: IIR #%d band #%d b1 = 0x%x\n"
718 "%s: IIR #%d band #%d b2 = 0x%x\n"
719 "%s: IIR #%d band #%d a1 = 0x%x\n"
720 "%s: IIR #%d band #%d a2 = 0x%x\n",
721 __func__, iir_idx, band_idx,
722 (uint32_t)ucontrol->value.integer.value[0],
723 __func__, iir_idx, band_idx,
724 (uint32_t)ucontrol->value.integer.value[1],
725 __func__, iir_idx, band_idx,
726 (uint32_t)ucontrol->value.integer.value[2],
727 __func__, iir_idx, band_idx,
728 (uint32_t)ucontrol->value.integer.value[3],
729 __func__, iir_idx, band_idx,
730 (uint32_t)ucontrol->value.integer.value[4]);
731 return 0;
732}
733
734static void set_iir_band_coeff(struct snd_soc_codec *codec,
735 int iir_idx, int band_idx,
736 int coeff_idx, uint32_t value)
737{
738 /* Mask top 3 bits, 6-8 are reserved */
739 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800740 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700741 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800742 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700743
744 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800745 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700746 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800747 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700748
749 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800750 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700751 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800752 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700753
Ben Romberger0915aae2012-02-06 23:32:43 -0800754 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700755 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800756 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700757
Ben Romberger0915aae2012-02-06 23:32:43 -0800758 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700759 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800760 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700761}
762
763static int tabla_put_iir_band_audio_mixer(
764 struct snd_kcontrol *kcontrol,
765 struct snd_ctl_elem_value *ucontrol)
766{
767 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
768 int iir_idx = ((struct soc_multi_mixer_control *)
769 kcontrol->private_value)->reg;
770 int band_idx = ((struct soc_multi_mixer_control *)
771 kcontrol->private_value)->shift;
772
773 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
774 ucontrol->value.integer.value[0]);
775 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
776 ucontrol->value.integer.value[1]);
777 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
778 ucontrol->value.integer.value[2]);
779 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
780 ucontrol->value.integer.value[3]);
781 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
782 ucontrol->value.integer.value[4]);
783
784 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
785 "%s: IIR #%d band #%d b1 = 0x%x\n"
786 "%s: IIR #%d band #%d b2 = 0x%x\n"
787 "%s: IIR #%d band #%d a1 = 0x%x\n"
788 "%s: IIR #%d band #%d a2 = 0x%x\n",
789 __func__, iir_idx, band_idx,
790 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
791 __func__, iir_idx, band_idx,
792 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
793 __func__, iir_idx, band_idx,
794 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
795 __func__, iir_idx, band_idx,
796 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
797 __func__, iir_idx, band_idx,
798 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
799 return 0;
800}
801
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800802static int tabla_compander_gain_offset(
803 struct snd_soc_codec *codec, u32 enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700804 unsigned int reg, int mask, int event, u32 comp)
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800805{
806 int pa_mode = snd_soc_read(codec, reg) & mask;
807 int gain_offset = 0;
808 /* if PMU && enable is 1-> offset is 3
809 * if PMU && enable is 0-> offset is 0
810 * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
811 * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
812 */
813
Kuirong Wang678e4172012-06-26 15:35:22 -0700814 if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0)) {
815 if (comp == COMPANDER_1)
816 gain_offset = TABLA_COMP_DIGITAL_GAIN_HP_OFFSET;
817 if (comp == COMPANDER_2)
818 gain_offset = TABLA_COMP_DIGITAL_GAIN_LINEOUT_OFFSET;
819 }
820 if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0)) {
821 if (comp == COMPANDER_1)
822 gain_offset = -TABLA_COMP_DIGITAL_GAIN_HP_OFFSET;
823 if (comp == COMPANDER_2)
824 gain_offset = -TABLA_COMP_DIGITAL_GAIN_LINEOUT_OFFSET;
825
826 }
827 pr_debug("%s: compander #%d gain_offset %d\n",
828 __func__, comp + 1, gain_offset);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800829 return gain_offset;
830}
831
832
833static int tabla_config_gain_compander(
834 struct snd_soc_codec *codec,
835 u32 compander, u32 enable, int event)
836{
837 int value = 0;
838 int mask = 1 << 4;
839 int gain = 0;
840 int gain_offset;
841 if (compander >= COMPANDER_MAX) {
842 pr_err("%s: Error, invalid compander channel\n", __func__);
843 return -EINVAL;
844 }
845
846 if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
847 value = 1 << 4;
848
849 if (compander == COMPANDER_1) {
850 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700851 TABLA_A_RX_HPH_L_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800852 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
853 gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
854 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
855 0xFF, gain - gain_offset);
856 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700857 TABLA_A_RX_HPH_R_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800858 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
859 gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
860 snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
861 0xFF, gain - gain_offset);
862 } else if (compander == COMPANDER_2) {
863 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700864 TABLA_A_RX_LINE_1_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800865 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
866 gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
867 snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
868 0xFF, gain - gain_offset);
869 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700870 TABLA_A_RX_LINE_3_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800871 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
872 gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
873 snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
874 0xFF, gain - gain_offset);
875 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700876 TABLA_A_RX_LINE_2_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800877 snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
878 gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
879 snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
880 0xFF, gain - gain_offset);
881 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700882 TABLA_A_RX_LINE_4_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800883 snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
884 gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
885 snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
886 0xFF, gain - gain_offset);
887 }
888 return 0;
889}
890static int tabla_get_compander(struct snd_kcontrol *kcontrol,
891 struct snd_ctl_elem_value *ucontrol)
892{
893
894 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
895 int comp = ((struct soc_multi_mixer_control *)
896 kcontrol->private_value)->max;
897 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
898
899 ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
900
901 return 0;
902}
903
904static int tabla_set_compander(struct snd_kcontrol *kcontrol,
905 struct snd_ctl_elem_value *ucontrol)
906{
907 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
908 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
909 int comp = ((struct soc_multi_mixer_control *)
910 kcontrol->private_value)->max;
911 int value = ucontrol->value.integer.value[0];
Kuirong Wang678e4172012-06-26 15:35:22 -0700912 pr_debug("%s: compander #%d enable %d\n",
913 __func__, comp + 1, value);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800914 if (value == tabla->comp_enabled[comp]) {
915 pr_debug("%s: compander #%d enable %d no change\n",
Kuirong Wang678e4172012-06-26 15:35:22 -0700916 __func__, comp + 1, value);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800917 return 0;
918 }
919 tabla->comp_enabled[comp] = value;
920 return 0;
921}
922
923
924static int tabla_config_compander(struct snd_soc_dapm_widget *w,
925 struct snd_kcontrol *kcontrol,
926 int event)
927{
928 struct snd_soc_codec *codec = w->codec;
929 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
930 u32 rate = tabla->comp_fs[w->shift];
Kuirong Wang678e4172012-06-26 15:35:22 -0700931 u32 status;
932 unsigned long timeout;
933 pr_debug("%s: compander #%d enable %d event %d\n",
934 __func__, w->shift + 1,
935 tabla->comp_enabled[w->shift], event);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800936 switch (event) {
937 case SND_SOC_DAPM_PRE_PMU:
938 if (tabla->comp_enabled[w->shift] != 0) {
939 /* Enable both L/R compander clocks */
940 snd_soc_update_bits(codec,
941 TABLA_A_CDC_CLK_RX_B2_CTL,
Kuirong Wang678e4172012-06-26 15:35:22 -0700942 1 << comp_shift[w->shift],
943 1 << comp_shift[w->shift]);
944 /* Clear the HALT for the compander*/
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800945 snd_soc_update_bits(codec,
946 TABLA_A_CDC_COMP1_B1_CTL +
947 w->shift * 8, 1 << 2, 0);
948 /* Toggle compander reset bits*/
949 snd_soc_update_bits(codec,
950 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
Kuirong Wang678e4172012-06-26 15:35:22 -0700951 1 << comp_shift[w->shift],
952 1 << comp_shift[w->shift]);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800953 snd_soc_update_bits(codec,
954 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
Kuirong Wang678e4172012-06-26 15:35:22 -0700955 1 << comp_shift[w->shift], 0);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800956 tabla_config_gain_compander(codec, w->shift, 1, event);
Kuirong Wang678e4172012-06-26 15:35:22 -0700957 /* Compander enable -> 0x370/0x378*/
958 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
959 w->shift * 8, 0x03, 0x03);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800960 /* Update the RMS meter resampling*/
961 snd_soc_update_bits(codec,
962 TABLA_A_CDC_COMP1_B3_CTL +
963 w->shift * 8, 0xFF, 0x01);
Kuirong Wang678e4172012-06-26 15:35:22 -0700964 snd_soc_update_bits(codec,
965 TABLA_A_CDC_COMP1_B2_CTL +
966 w->shift * 8, 0xF0, 0x50);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800967 /* Wait for 1ms*/
Kuirong Wang678e4172012-06-26 15:35:22 -0700968 usleep_range(5000, 5000);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800969 }
970 break;
971 case SND_SOC_DAPM_POST_PMU:
972 /* Set sample rate dependent paramater*/
973 if (tabla->comp_enabled[w->shift] != 0) {
974 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
975 w->shift * 8, 0x03, rate);
976 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
977 w->shift * 8, 0x0F,
978 comp_samp_params[rate].peak_det_timeout);
979 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
980 w->shift * 8, 0xF0,
981 comp_samp_params[rate].rms_meter_div_fact);
982 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
983 w->shift * 8, 0xFF,
984 comp_samp_params[rate].rms_meter_resamp_fact);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800985 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
Kuirong Wang678e4172012-06-26 15:35:22 -0700986 w->shift * 8, 0x38,
987 comp_samp_params[rate].shutdown_timeout);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800988 }
989 break;
990 case SND_SOC_DAPM_PRE_PMD:
Kuirong Wang678e4172012-06-26 15:35:22 -0700991 if (tabla->comp_enabled[w->shift] != 0) {
992 status = snd_soc_read(codec,
993 TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS +
994 w->shift * 8);
995 pr_debug("%s: compander #%d shutdown status %d in event %d\n",
996 __func__, w->shift + 1, status, event);
997 /* Halt the compander*/
998 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
999 w->shift * 8, 1 << 2, 1 << 2);
1000 }
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001001 break;
1002 case SND_SOC_DAPM_POST_PMD:
Kuirong Wang678e4172012-06-26 15:35:22 -07001003 if (tabla->comp_enabled[w->shift] != 0) {
1004 /* Wait up to a second for shutdown complete */
1005 timeout = jiffies + HZ;
1006 do {
1007 status = snd_soc_read(codec,
1008 TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS +
1009 w->shift * 8);
1010 if (status == 0x3)
1011 break;
1012 usleep_range(5000, 5000);
1013 } while (!(time_after(jiffies, timeout)));
1014 /* Restore the gain */
1015 tabla_config_gain_compander(codec, w->shift,
1016 tabla->comp_enabled[w->shift],
1017 event);
1018 /* Disable the compander*/
1019 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
1020 w->shift * 8, 0x03, 0x00);
1021 /* Turn off the clock for compander in pair*/
1022 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
1023 0x03 << comp_shift[w->shift], 0);
1024 /* Clear the HALT for the compander*/
1025 snd_soc_update_bits(codec,
1026 TABLA_A_CDC_COMP1_B1_CTL +
1027 w->shift * 8, 1 << 2, 0);
1028 }
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001029 break;
1030 }
1031 return 0;
1032}
1033
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08001034static const char *const tabla_anc_func_text[] = {"OFF", "ON"};
1035static const struct soc_enum tabla_anc_func_enum =
1036 SOC_ENUM_SINGLE_EXT(2, tabla_anc_func_text);
1037
Kiran Kandid2d86b52011-09-09 17:44:28 -07001038static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
1039static const struct soc_enum tabla_ear_pa_gain_enum[] = {
1040 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
1041};
1042
Santosh Mardi024010f2011-10-18 06:27:21 +05301043/*cut of frequency for high pass filter*/
1044static const char *cf_text[] = {
1045 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
1046};
1047
1048static const struct soc_enum cf_dec1_enum =
1049 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
1050
1051static const struct soc_enum cf_dec2_enum =
1052 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
1053
1054static const struct soc_enum cf_dec3_enum =
1055 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
1056
1057static const struct soc_enum cf_dec4_enum =
1058 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
1059
1060static const struct soc_enum cf_dec5_enum =
1061 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
1062
1063static const struct soc_enum cf_dec6_enum =
1064 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
1065
1066static const struct soc_enum cf_dec7_enum =
1067 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
1068
1069static const struct soc_enum cf_dec8_enum =
1070 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
1071
1072static const struct soc_enum cf_dec9_enum =
1073 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
1074
1075static const struct soc_enum cf_dec10_enum =
1076 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
1077
1078static const struct soc_enum cf_rxmix1_enum =
1079 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
1080
1081static const struct soc_enum cf_rxmix2_enum =
1082 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
1083
1084static const struct soc_enum cf_rxmix3_enum =
1085 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
1086
1087static const struct soc_enum cf_rxmix4_enum =
1088 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
1089
1090static const struct soc_enum cf_rxmix5_enum =
1091 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
1092;
1093static const struct soc_enum cf_rxmix6_enum =
1094 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
1095
1096static const struct soc_enum cf_rxmix7_enum =
1097 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
1098
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001099static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -07001100
1101 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
1102 tabla_pa_gain_get, tabla_pa_gain_put),
1103
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001104 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
1105 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001106 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
1107 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001108 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
1109 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001110 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
1111 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001112 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
1113 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001114
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001115 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
1116 line_gain),
1117 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
1118 line_gain),
1119
Bradley Rubin410383f2011-07-22 13:44:23 -07001120 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
1121 -84, 40, digital_gain),
1122 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
1123 -84, 40, digital_gain),
1124 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
1125 -84, 40, digital_gain),
1126 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
1127 -84, 40, digital_gain),
1128 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
1129 -84, 40, digital_gain),
1130 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
1131 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -08001132 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
1133 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001134
Bradley Rubin410383f2011-07-22 13:44:23 -07001135 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001136 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -07001137 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -07001139 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
1140 digital_gain),
1141 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
1142 digital_gain),
1143 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
1144 digital_gain),
1145 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
1146 digital_gain),
1147 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
1148 digital_gain),
1149 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
1150 digital_gain),
1151 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
1152 digital_gain),
1153 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
1154 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -07001155 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
1156 40, digital_gain),
1157 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
1158 40, digital_gain),
1159 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
1160 40, digital_gain),
1161 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
1162 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001163 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
1164 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001165 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
1166 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001167 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
1168 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001169
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001170 SOC_SINGLE_TLV("AUX_PGA_LEFT Volume", TABLA_A_AUX_L_GAIN, 0, 39, 0,
1171 aux_pga_gain),
1172 SOC_SINGLE_TLV("AUX_PGA_RIGHT Volume", TABLA_A_AUX_R_GAIN, 0, 39, 0,
1173 aux_pga_gain),
1174
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001175 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -08001176 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001177 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -07001178
1179 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
1180 tabla_put_anc_slot),
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08001181 SOC_ENUM_EXT("ANC Function", tabla_anc_func_enum, tabla_get_anc_func,
1182 tabla_put_anc_func),
Santosh Mardi024010f2011-10-18 06:27:21 +05301183 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
1184 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
1185 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
1186 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
1187 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
1188 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
1189 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
1190 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
1191 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
1192 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
1193
1194 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
1195 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
1196 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
1197 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
1198 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
1199 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
1200 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
1201 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
1202 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
1203 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
1204
1205 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
1206 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
1207 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
1208 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
1209 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
1210 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
1211 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
1212
1213 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
1214 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
1215 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
1216 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
1217 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
1218 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
1219 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -07001220
1221 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
1222 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1223 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
1224 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1225 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
1226 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1227 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
1228 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1229 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
1230 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1231 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
1232 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1233 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
1234 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1235 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
1236 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1237 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
1238 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1239 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
1240 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1241
1242 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
1243 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1244 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
1245 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1246 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
1247 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1248 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
1249 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1250 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
1251 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1252 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
1253 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1254 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
1255 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1256 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
1257 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1258 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
1259 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1260 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
1261 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001262 SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
1263 tabla_get_compander, tabla_set_compander),
1264 SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
1265 tabla_get_compander, tabla_set_compander),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001266};
1267
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001268static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
1269 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
1270};
1271
1272static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
1273 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
1274};
1275
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001276static const char *rx_mix1_text[] = {
1277 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
1278 "RX5", "RX6", "RX7"
1279};
1280
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001281static const char *rx_mix2_text[] = {
1282 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2"
1283};
1284
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001285static const char *rx_dsm_text[] = {
1286 "CIC_OUT", "DSM_INV"
1287};
1288
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001289static const char *sb_tx1_mux_text[] = {
1290 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1291 "DEC1"
1292};
1293
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001294static const char *sb_tx2_mux_text[] = {
1295 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1296 "DEC2"
1297};
1298
1299static const char *sb_tx3_mux_text[] = {
1300 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1301 "DEC3"
1302};
1303
1304static const char *sb_tx4_mux_text[] = {
1305 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1306 "DEC4"
1307};
1308
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001309static const char *sb_tx5_mux_text[] = {
1310 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1311 "DEC5"
1312};
1313
1314static const char *sb_tx6_mux_text[] = {
1315 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1316 "DEC6"
1317};
1318
1319static const char const *sb_tx7_to_tx10_mux_text[] = {
1320 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1321 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1322 "DEC9", "DEC10"
1323};
1324
1325static const char *dec1_mux_text[] = {
1326 "ZERO", "DMIC1", "ADC6",
1327};
1328
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001329static const char *dec2_mux_text[] = {
1330 "ZERO", "DMIC2", "ADC5",
1331};
1332
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001333static const char *dec3_mux_text[] = {
1334 "ZERO", "DMIC3", "ADC4",
1335};
1336
1337static const char *dec4_mux_text[] = {
1338 "ZERO", "DMIC4", "ADC3",
1339};
1340
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001341static const char *dec5_mux_text[] = {
1342 "ZERO", "DMIC5", "ADC2",
1343};
1344
1345static const char *dec6_mux_text[] = {
1346 "ZERO", "DMIC6", "ADC1",
1347};
1348
1349static const char const *dec7_mux_text[] = {
1350 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
1351};
1352
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001353static const char *dec8_mux_text[] = {
1354 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
1355};
1356
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001357static const char *dec9_mux_text[] = {
1358 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
1359};
1360
1361static const char *dec10_mux_text[] = {
1362 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
1363};
1364
Bradley Rubin229c6a52011-07-12 16:18:48 -07001365static const char const *anc_mux_text[] = {
1366 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
1367 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
1368};
1369
1370static const char const *anc1_fb_mux_text[] = {
1371 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
1372};
1373
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07001374static const char *const iir_inp1_text[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001375 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1376 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
1377};
1378
1379static const struct soc_enum rx_mix1_inp1_chain_enum =
1380 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
1381
Bradley Rubin229c6a52011-07-12 16:18:48 -07001382static const struct soc_enum rx_mix1_inp2_chain_enum =
1383 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
1384
Kiran Kandia9fffe92012-05-20 23:42:30 -07001385static const struct soc_enum rx_mix1_inp3_chain_enum =
1386 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B2_CTL, 0, 12, rx_mix1_text);
1387
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001388static const struct soc_enum rx2_mix1_inp1_chain_enum =
1389 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
1390
Bradley Rubin229c6a52011-07-12 16:18:48 -07001391static const struct soc_enum rx2_mix1_inp2_chain_enum =
1392 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
1393
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001394static const struct soc_enum rx3_mix1_inp1_chain_enum =
1395 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
1396
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001397static const struct soc_enum rx3_mix1_inp2_chain_enum =
1398 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
1399
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001400static const struct soc_enum rx4_mix1_inp1_chain_enum =
1401 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
1402
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001403static const struct soc_enum rx4_mix1_inp2_chain_enum =
1404 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
1405
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001406static const struct soc_enum rx5_mix1_inp1_chain_enum =
1407 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
1408
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001409static const struct soc_enum rx5_mix1_inp2_chain_enum =
1410 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
1411
1412static const struct soc_enum rx6_mix1_inp1_chain_enum =
1413 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
1414
1415static const struct soc_enum rx6_mix1_inp2_chain_enum =
1416 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
1417
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001418static const struct soc_enum rx7_mix1_inp1_chain_enum =
1419 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
1420
1421static const struct soc_enum rx7_mix1_inp2_chain_enum =
1422 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
1423
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001424static const struct soc_enum rx1_mix2_inp1_chain_enum =
1425 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 0, 5, rx_mix2_text);
1426
1427static const struct soc_enum rx1_mix2_inp2_chain_enum =
1428 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 3, 5, rx_mix2_text);
1429
1430static const struct soc_enum rx2_mix2_inp1_chain_enum =
1431 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 0, 5, rx_mix2_text);
1432
1433static const struct soc_enum rx2_mix2_inp2_chain_enum =
1434 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 3, 5, rx_mix2_text);
1435
1436static const struct soc_enum rx3_mix2_inp1_chain_enum =
1437 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 0, 5, rx_mix2_text);
1438
1439static const struct soc_enum rx3_mix2_inp2_chain_enum =
1440 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 3, 5, rx_mix2_text);
1441
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001442static const struct soc_enum rx4_dsm_enum =
1443 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
1444
1445static const struct soc_enum rx6_dsm_enum =
1446 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
1447
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001448static const struct soc_enum sb_tx1_mux_enum =
1449 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
1450
1451static const struct soc_enum sb_tx2_mux_enum =
1452 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
1453
1454static const struct soc_enum sb_tx3_mux_enum =
1455 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
1456
1457static const struct soc_enum sb_tx4_mux_enum =
1458 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0, 9, sb_tx4_mux_text);
1459
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001460static const struct soc_enum sb_tx5_mux_enum =
1461 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
1462
1463static const struct soc_enum sb_tx6_mux_enum =
1464 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
1465
1466static const struct soc_enum sb_tx7_mux_enum =
1467 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
1468 sb_tx7_to_tx10_mux_text);
1469
1470static const struct soc_enum sb_tx8_mux_enum =
1471 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
1472 sb_tx7_to_tx10_mux_text);
1473
Kiran Kandi3426e512011-09-13 22:50:10 -07001474static const struct soc_enum sb_tx9_mux_enum =
1475 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
1476 sb_tx7_to_tx10_mux_text);
1477
1478static const struct soc_enum sb_tx10_mux_enum =
1479 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
1480 sb_tx7_to_tx10_mux_text);
1481
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001482static const struct soc_enum dec1_mux_enum =
1483 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
1484
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001485static const struct soc_enum dec2_mux_enum =
1486 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
1487
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001488static const struct soc_enum dec3_mux_enum =
1489 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
1490
1491static const struct soc_enum dec4_mux_enum =
1492 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
1493
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001494static const struct soc_enum dec5_mux_enum =
1495 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
1496
1497static const struct soc_enum dec6_mux_enum =
1498 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
1499
1500static const struct soc_enum dec7_mux_enum =
1501 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
1502
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001503static const struct soc_enum dec8_mux_enum =
1504 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
1505
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001506static const struct soc_enum dec9_mux_enum =
1507 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
1508
1509static const struct soc_enum dec10_mux_enum =
1510 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
1511
Bradley Rubin229c6a52011-07-12 16:18:48 -07001512static const struct soc_enum anc1_mux_enum =
1513 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
1514
1515static const struct soc_enum anc2_mux_enum =
1516 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
1517
1518static const struct soc_enum anc1_fb_mux_enum =
1519 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
1520
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001521static const struct soc_enum iir1_inp1_mux_enum =
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07001522 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir_inp1_text);
1523
1524static const struct soc_enum iir2_inp1_mux_enum =
1525 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ2_B1_CTL, 0, 18, iir_inp1_text);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001526
1527static const struct snd_kcontrol_new rx_mix1_inp1_mux =
1528 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
1529
Bradley Rubin229c6a52011-07-12 16:18:48 -07001530static const struct snd_kcontrol_new rx_mix1_inp2_mux =
1531 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
1532
Kiran Kandia9fffe92012-05-20 23:42:30 -07001533static const struct snd_kcontrol_new rx_mix1_inp3_mux =
1534 SOC_DAPM_ENUM("RX1 MIX1 INP3 Mux", rx_mix1_inp3_chain_enum);
1535
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001536static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
1537 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
1538
Bradley Rubin229c6a52011-07-12 16:18:48 -07001539static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
1540 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
1541
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001542static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
1543 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
1544
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001545static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
1546 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
1547
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001548static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
1549 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
1550
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001551static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
1552 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
1553
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001554static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
1555 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
1556
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001557static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
1558 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
1559
1560static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
1561 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
1562
1563static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
1564 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
1565
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001566static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
1567 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
1568
1569static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
1570 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
1571
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001572static const struct snd_kcontrol_new rx1_mix2_inp1_mux =
1573 SOC_DAPM_ENUM("RX1 MIX2 INP1 Mux", rx1_mix2_inp1_chain_enum);
1574
1575static const struct snd_kcontrol_new rx1_mix2_inp2_mux =
1576 SOC_DAPM_ENUM("RX1 MIX2 INP2 Mux", rx1_mix2_inp2_chain_enum);
1577
1578static const struct snd_kcontrol_new rx2_mix2_inp1_mux =
1579 SOC_DAPM_ENUM("RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
1580
1581static const struct snd_kcontrol_new rx2_mix2_inp2_mux =
1582 SOC_DAPM_ENUM("RX2 MIX2 INP2 Mux", rx2_mix2_inp2_chain_enum);
1583
1584static const struct snd_kcontrol_new rx3_mix2_inp1_mux =
1585 SOC_DAPM_ENUM("RX3 MIX2 INP1 Mux", rx3_mix2_inp1_chain_enum);
1586
1587static const struct snd_kcontrol_new rx3_mix2_inp2_mux =
1588 SOC_DAPM_ENUM("RX3 MIX2 INP2 Mux", rx3_mix2_inp2_chain_enum);
1589
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001590static const struct snd_kcontrol_new rx4_dsm_mux =
1591 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
1592
1593static const struct snd_kcontrol_new rx6_dsm_mux =
1594 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
1595
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001596static const struct snd_kcontrol_new sb_tx1_mux =
1597 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
1598
1599static const struct snd_kcontrol_new sb_tx2_mux =
1600 SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
1601
1602static const struct snd_kcontrol_new sb_tx3_mux =
1603 SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
1604
1605static const struct snd_kcontrol_new sb_tx4_mux =
1606 SOC_DAPM_ENUM("SLIM TX4 MUX Mux", sb_tx4_mux_enum);
1607
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001608static const struct snd_kcontrol_new sb_tx5_mux =
1609 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
1610
1611static const struct snd_kcontrol_new sb_tx6_mux =
1612 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
1613
1614static const struct snd_kcontrol_new sb_tx7_mux =
1615 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
1616
1617static const struct snd_kcontrol_new sb_tx8_mux =
1618 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
1619
Kiran Kandi3426e512011-09-13 22:50:10 -07001620static const struct snd_kcontrol_new sb_tx9_mux =
1621 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
1622
1623static const struct snd_kcontrol_new sb_tx10_mux =
1624 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
1625
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001626
Kiran Kandi59a96b12012-01-16 02:20:03 -08001627static int wcd9310_put_dec_enum(struct snd_kcontrol *kcontrol,
1628 struct snd_ctl_elem_value *ucontrol)
1629{
1630 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1631 struct snd_soc_dapm_widget *w = wlist->widgets[0];
1632 struct snd_soc_codec *codec = w->codec;
1633 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1634 unsigned int dec_mux, decimator;
1635 char *dec_name = NULL;
1636 char *widget_name = NULL;
1637 char *temp;
1638 u16 tx_mux_ctl_reg;
1639 u8 adc_dmic_sel = 0x0;
1640 int ret = 0;
1641
1642 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1643 return -EINVAL;
1644
1645 dec_mux = ucontrol->value.enumerated.item[0];
1646
1647 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
1648 if (!widget_name)
1649 return -ENOMEM;
1650 temp = widget_name;
1651
1652 dec_name = strsep(&widget_name, " ");
1653 widget_name = temp;
1654 if (!dec_name) {
1655 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
1656 ret = -EINVAL;
1657 goto out;
1658 }
1659
1660 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
1661 if (ret < 0) {
1662 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
1663 ret = -EINVAL;
1664 goto out;
1665 }
1666
1667 dev_dbg(w->dapm->dev, "%s(): widget = %s dec_name = %s decimator = %u"
1668 " dec_mux = %u\n", __func__, w->name, dec_name, decimator,
1669 dec_mux);
1670
1671
1672 switch (decimator) {
1673 case 1:
1674 case 2:
1675 case 3:
1676 case 4:
1677 case 5:
1678 case 6:
1679 if (dec_mux == 1)
1680 adc_dmic_sel = 0x1;
1681 else
1682 adc_dmic_sel = 0x0;
1683 break;
1684 case 7:
1685 case 8:
1686 case 9:
1687 case 10:
1688 if ((dec_mux == 1) || (dec_mux == 2))
1689 adc_dmic_sel = 0x1;
1690 else
1691 adc_dmic_sel = 0x0;
1692 break;
1693 default:
1694 pr_err("%s: Invalid Decimator = %u\n", __func__, decimator);
1695 ret = -EINVAL;
1696 goto out;
1697 }
1698
1699 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
1700
1701 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, adc_dmic_sel);
1702
1703 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
1704
1705out:
1706 kfree(widget_name);
1707 return ret;
1708}
1709
1710#define WCD9310_DEC_ENUM(xname, xenum) \
1711{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1712 .info = snd_soc_info_enum_double, \
1713 .get = snd_soc_dapm_get_enum_double, \
1714 .put = wcd9310_put_dec_enum, \
1715 .private_value = (unsigned long)&xenum }
1716
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001717static const struct snd_kcontrol_new dec1_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001718 WCD9310_DEC_ENUM("DEC1 MUX Mux", dec1_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001719
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001720static const struct snd_kcontrol_new dec2_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001721 WCD9310_DEC_ENUM("DEC2 MUX Mux", dec2_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001722
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001723static const struct snd_kcontrol_new dec3_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001724 WCD9310_DEC_ENUM("DEC3 MUX Mux", dec3_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001725
1726static const struct snd_kcontrol_new dec4_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001727 WCD9310_DEC_ENUM("DEC4 MUX Mux", dec4_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001728
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001729static const struct snd_kcontrol_new dec5_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001730 WCD9310_DEC_ENUM("DEC5 MUX Mux", dec5_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001731
1732static const struct snd_kcontrol_new dec6_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001733 WCD9310_DEC_ENUM("DEC6 MUX Mux", dec6_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001734
1735static const struct snd_kcontrol_new dec7_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001736 WCD9310_DEC_ENUM("DEC7 MUX Mux", dec7_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001737
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001738static const struct snd_kcontrol_new dec8_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001739 WCD9310_DEC_ENUM("DEC8 MUX Mux", dec8_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001740
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001741static const struct snd_kcontrol_new dec9_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001742 WCD9310_DEC_ENUM("DEC9 MUX Mux", dec9_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001743
1744static const struct snd_kcontrol_new dec10_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001745 WCD9310_DEC_ENUM("DEC10 MUX Mux", dec10_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001746
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001747static const struct snd_kcontrol_new iir1_inp1_mux =
1748 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1749
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07001750static const struct snd_kcontrol_new iir2_inp1_mux =
1751 SOC_DAPM_ENUM("IIR2 INP1 Mux", iir2_inp1_mux_enum);
1752
Kiran Kandi59a96b12012-01-16 02:20:03 -08001753static const struct snd_kcontrol_new anc1_mux =
1754 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
1755
Bradley Rubin229c6a52011-07-12 16:18:48 -07001756static const struct snd_kcontrol_new anc2_mux =
1757 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001758
Bradley Rubin229c6a52011-07-12 16:18:48 -07001759static const struct snd_kcontrol_new anc1_fb_mux =
1760 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001761
Bradley Rubin229c6a52011-07-12 16:18:48 -07001762static const struct snd_kcontrol_new dac1_switch[] = {
1763 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1764};
1765static const struct snd_kcontrol_new hphl_switch[] = {
1766 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1767};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001768
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001769static const struct snd_kcontrol_new hphl_pa_mix[] = {
1770 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1771 7, 1, 0),
1772 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1773 7, 1, 0),
1774 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1775 TABLA_A_AUX_L_PA_CONN_INV, 7, 1, 0),
1776 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1777 TABLA_A_AUX_R_PA_CONN_INV, 7, 1, 0),
1778};
1779
1780static const struct snd_kcontrol_new hphr_pa_mix[] = {
1781 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1782 6, 1, 0),
1783 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1784 6, 1, 0),
1785 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1786 TABLA_A_AUX_L_PA_CONN_INV, 6, 1, 0),
1787 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1788 TABLA_A_AUX_R_PA_CONN_INV, 6, 1, 0),
1789};
1790
1791static const struct snd_kcontrol_new lineout1_pa_mix[] = {
1792 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1793 5, 1, 0),
1794 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1795 5, 1, 0),
1796 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1797 TABLA_A_AUX_L_PA_CONN_INV, 5, 1, 0),
1798 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1799 TABLA_A_AUX_R_PA_CONN_INV, 5, 1, 0),
1800};
1801
1802static const struct snd_kcontrol_new lineout2_pa_mix[] = {
1803 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1804 4, 1, 0),
1805 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1806 4, 1, 0),
1807 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1808 TABLA_A_AUX_L_PA_CONN_INV, 4, 1, 0),
1809 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1810 TABLA_A_AUX_R_PA_CONN_INV, 4, 1, 0),
1811};
1812
1813static const struct snd_kcontrol_new lineout3_pa_mix[] = {
1814 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1815 3, 1, 0),
1816 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1817 3, 1, 0),
1818 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1819 TABLA_A_AUX_L_PA_CONN_INV, 3, 1, 0),
1820 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1821 TABLA_A_AUX_R_PA_CONN_INV, 3, 1, 0),
1822};
1823
1824static const struct snd_kcontrol_new lineout4_pa_mix[] = {
1825 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1826 2, 1, 0),
1827 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1828 2, 1, 0),
1829 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1830 TABLA_A_AUX_L_PA_CONN_INV, 2, 1, 0),
1831 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1832 TABLA_A_AUX_R_PA_CONN_INV, 2, 1, 0),
1833};
1834
1835static const struct snd_kcontrol_new lineout5_pa_mix[] = {
1836 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1837 1, 1, 0),
1838 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1839 1, 1, 0),
1840 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1841 TABLA_A_AUX_L_PA_CONN_INV, 1, 1, 0),
1842 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1843 TABLA_A_AUX_R_PA_CONN_INV, 1, 1, 0),
1844};
1845
1846static const struct snd_kcontrol_new ear_pa_mix[] = {
1847 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1848 0, 1, 0),
1849 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1850 0, 1, 0),
1851 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1852 TABLA_A_AUX_L_PA_CONN_INV, 0, 1, 0),
1853 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1854 TABLA_A_AUX_R_PA_CONN_INV, 0, 1, 0),
1855};
1856
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001857static const struct snd_kcontrol_new lineout3_ground_switch =
1858 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1859
1860static const struct snd_kcontrol_new lineout4_ground_switch =
1861 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001862
Kuirong Wang906ac472012-07-09 12:54:44 -07001863/* virtual port entries */
1864static int slim_tx_mixer_get(struct snd_kcontrol *kcontrol,
1865 struct snd_ctl_elem_value *ucontrol)
1866{
1867 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1868 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1869
1870 ucontrol->value.integer.value[0] = widget->value;
1871 return 0;
1872}
1873
1874static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
1875 struct snd_ctl_elem_value *ucontrol)
1876{
1877 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1878 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1879 struct snd_soc_codec *codec = widget->codec;
1880 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
1881 struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
1882 struct soc_multi_mixer_control *mixer =
1883 ((struct soc_multi_mixer_control *)kcontrol->private_value);
1884 u32 dai_id = widget->shift;
1885 u32 port_id = mixer->shift;
1886 u32 enable = ucontrol->value.integer.value[0];
Venkat Sudhir96dd28c2012-12-04 17:00:19 -08001887 u32 vtable = vport_check_table[dai_id];
Kuirong Wang906ac472012-07-09 12:54:44 -07001888
1889 pr_debug("%s: wname %s cname %s value %u shift %d item %ld\n", __func__,
1890 widget->name, ucontrol->id.name, widget->value, widget->shift,
1891 ucontrol->value.integer.value[0]);
1892
1893 mutex_lock(&codec->mutex);
1894 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
1895 if (dai_id != AIF1_CAP) {
1896 dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
1897 __func__);
1898 mutex_unlock(&codec->mutex);
1899 return -EINVAL;
1900 }
1901 }
1902 switch (dai_id) {
1903 case AIF1_CAP:
1904 case AIF2_CAP:
1905 case AIF3_CAP:
1906 /* only add to the list if value not set
1907 */
1908 if (enable && !(widget->value & 1 << port_id)) {
Venkat Sudhir96dd28c2012-12-04 17:00:19 -08001909 if (tabla_p->intf_type ==
1910 WCD9XXX_INTERFACE_TYPE_SLIMBUS)
1911 vtable = vport_check_table[dai_id];
1912 if (tabla_p->intf_type == WCD9XXX_INTERFACE_TYPE_I2C)
1913 vtable = vport_i2s_check_table[dai_id];
Kuirong Wangdcc392e2012-10-19 00:33:38 -07001914 if (wcd9xxx_tx_vport_validation(
Venkat Sudhir96dd28c2012-12-04 17:00:19 -08001915 vtable,
Kuirong Wangdcc392e2012-10-19 00:33:38 -07001916 port_id,
1917 tabla_p->dai)) {
Kuirong Wang906ac472012-07-09 12:54:44 -07001918 pr_info("%s: TX%u is used by other virtual port\n",
1919 __func__, port_id + 1);
1920 mutex_unlock(&codec->mutex);
1921 return -EINVAL;
1922 }
1923 widget->value |= 1 << port_id;
1924 list_add_tail(&core->tx_chs[port_id].list,
1925 &tabla_p->dai[dai_id].wcd9xxx_ch_list
1926 );
1927 } else if (!enable && (widget->value & 1 << port_id)) {
1928 widget->value &= ~(1 << port_id);
1929 list_del_init(&core->tx_chs[port_id].list);
1930 } else {
1931 if (enable)
1932 pr_info("%s: TX%u port is used by this virtual port\n",
1933 __func__, port_id + 1);
1934 else
1935 pr_info("%s: TX%u port is not used by this virtual port\n",
1936 __func__, port_id + 1);
1937 /* avoid update power function */
1938 mutex_unlock(&codec->mutex);
1939 return 0;
1940 }
1941 break;
1942 default:
1943 pr_err("Unknown AIF %d\n", dai_id);
1944 mutex_unlock(&codec->mutex);
1945 return -EINVAL;
1946 }
1947 pr_debug("%s: name %s sname %s updated value %u shift %d\n", __func__,
1948 widget->name, widget->sname, widget->value, widget->shift);
1949
1950 snd_soc_dapm_mixer_update_power(widget, kcontrol, enable);
1951
1952 mutex_unlock(&codec->mutex);
1953 return 0;
1954}
1955
1956static int slim_rx_mux_get(struct snd_kcontrol *kcontrol,
1957 struct snd_ctl_elem_value *ucontrol)
1958{
1959 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1960 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1961
1962 ucontrol->value.enumerated.item[0] = widget->value;
1963 return 0;
1964}
1965
1966static const char *const slim_rx_mux_text[] = {
1967 "ZERO", "AIF1_PB", "AIF2_PB", "AIF3_PB"
1968};
1969
1970static int slim_rx_mux_put(struct snd_kcontrol *kcontrol,
1971 struct snd_ctl_elem_value *ucontrol)
1972{
1973 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1974 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1975 struct snd_soc_codec *codec = widget->codec;
1976 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
1977 struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
1978 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1979 u32 port_id = widget->shift;
1980
1981 pr_debug("%s: wname %s cname %s value %u shift %d item %u\n", __func__,
1982 widget->name, ucontrol->id.name, widget->value, widget->shift,
1983 ucontrol->value.enumerated.item[0]);
1984
1985 widget->value = ucontrol->value.enumerated.item[0];
1986
1987 mutex_lock(&codec->mutex);
1988
1989 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
1990 if (widget->value > 1) {
1991 dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
1992 __func__);
Kuirong Wangdcc392e2012-10-19 00:33:38 -07001993 goto err;
Kuirong Wang906ac472012-07-09 12:54:44 -07001994 }
1995 }
1996 /* value need to match the Virtual port and AIF number
1997 */
1998 switch (widget->value) {
1999 case 0:
2000 list_del_init(&core->rx_chs[port_id].list);
2001 break;
2002 case 1:
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002003 if (wcd9xxx_rx_vport_validation(port_id + core->num_tx_port,
2004 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list))
2005 goto pr_err;
Kuirong Wang906ac472012-07-09 12:54:44 -07002006 list_add_tail(&core->rx_chs[port_id].list,
2007 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list);
2008 break;
2009 case 2:
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002010 if (wcd9xxx_rx_vport_validation(port_id + core->num_tx_port,
2011 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list))
2012 goto pr_err;
Kuirong Wang906ac472012-07-09 12:54:44 -07002013 list_add_tail(&core->rx_chs[port_id].list,
2014 &tabla_p->dai[AIF2_PB].wcd9xxx_ch_list);
2015 break;
2016 case 3:
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002017 if (wcd9xxx_rx_vport_validation(port_id + core->num_tx_port,
2018 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list))
2019 goto pr_err;
Kuirong Wang906ac472012-07-09 12:54:44 -07002020 list_add_tail(&core->rx_chs[port_id].list,
2021 &tabla_p->dai[AIF3_PB].wcd9xxx_ch_list);
2022 break;
2023 default:
2024 pr_err("Unknown AIF %d\n", widget->value);
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002025 goto err;
Kuirong Wang906ac472012-07-09 12:54:44 -07002026 }
2027
2028 snd_soc_dapm_mux_update_power(widget, kcontrol, 1, widget->value, e);
2029
2030 mutex_unlock(&codec->mutex);
2031 return 0;
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002032
2033pr_err:
2034 pr_err("%s: RX%u is used by current requesting AIF_PB itself\n",
2035 __func__, port_id + 1);
Santosh Mardi2a831d72012-11-07 20:45:52 +05302036 mutex_unlock(&codec->mutex);
2037 return 0;
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002038err:
2039 mutex_unlock(&codec->mutex);
2040 return -EINVAL;
Kuirong Wang906ac472012-07-09 12:54:44 -07002041}
2042
2043static const struct soc_enum slim_rx_mux_enum =
2044 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim_rx_mux_text), slim_rx_mux_text);
2045
2046static const struct snd_kcontrol_new slim_rx_mux[TABLA_RX_MAX] = {
2047 SOC_DAPM_ENUM_EXT("SLIM RX1 Mux", slim_rx_mux_enum,
2048 slim_rx_mux_get, slim_rx_mux_put),
2049 SOC_DAPM_ENUM_EXT("SLIM RX2 Mux", slim_rx_mux_enum,
2050 slim_rx_mux_get, slim_rx_mux_put),
2051 SOC_DAPM_ENUM_EXT("SLIM RX3 Mux", slim_rx_mux_enum,
2052 slim_rx_mux_get, slim_rx_mux_put),
2053 SOC_DAPM_ENUM_EXT("SLIM RX4 Mux", slim_rx_mux_enum,
2054 slim_rx_mux_get, slim_rx_mux_put),
2055 SOC_DAPM_ENUM_EXT("SLIM RX5 Mux", slim_rx_mux_enum,
2056 slim_rx_mux_get, slim_rx_mux_put),
2057 SOC_DAPM_ENUM_EXT("SLIM RX6 Mux", slim_rx_mux_enum,
2058 slim_rx_mux_get, slim_rx_mux_put),
2059 SOC_DAPM_ENUM_EXT("SLIM RX7 Mux", slim_rx_mux_enum,
2060 slim_rx_mux_get, slim_rx_mux_put),
2061};
2062
2063static const struct snd_kcontrol_new aif_cap_mixer[] = {
2064 SOC_SINGLE_EXT("SLIM TX1", SND_SOC_NOPM, TABLA_TX1, 1, 0,
2065 slim_tx_mixer_get, slim_tx_mixer_put),
2066 SOC_SINGLE_EXT("SLIM TX2", SND_SOC_NOPM, TABLA_TX2, 1, 0,
2067 slim_tx_mixer_get, slim_tx_mixer_put),
2068 SOC_SINGLE_EXT("SLIM TX3", SND_SOC_NOPM, TABLA_TX3, 1, 0,
2069 slim_tx_mixer_get, slim_tx_mixer_put),
2070 SOC_SINGLE_EXT("SLIM TX4", SND_SOC_NOPM, TABLA_TX4, 1, 0,
2071 slim_tx_mixer_get, slim_tx_mixer_put),
2072 SOC_SINGLE_EXT("SLIM TX5", SND_SOC_NOPM, TABLA_TX5, 1, 0,
2073 slim_tx_mixer_get, slim_tx_mixer_put),
2074 SOC_SINGLE_EXT("SLIM TX6", SND_SOC_NOPM, TABLA_TX6, 1, 0,
2075 slim_tx_mixer_get, slim_tx_mixer_put),
2076 SOC_SINGLE_EXT("SLIM TX7", SND_SOC_NOPM, TABLA_TX7, 1, 0,
2077 slim_tx_mixer_get, slim_tx_mixer_put),
2078 SOC_SINGLE_EXT("SLIM TX8", SND_SOC_NOPM, TABLA_TX8, 1, 0,
2079 slim_tx_mixer_get, slim_tx_mixer_put),
2080 SOC_SINGLE_EXT("SLIM TX9", SND_SOC_NOPM, TABLA_TX9, 1, 0,
2081 slim_tx_mixer_get, slim_tx_mixer_put),
2082 SOC_SINGLE_EXT("SLIM TX10", SND_SOC_NOPM, TABLA_TX10, 1, 0,
2083 slim_tx_mixer_get, slim_tx_mixer_put),
2084};
2085
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002086static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002087 int enable)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002088{
2089 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2090
2091 pr_debug("%s %d\n", __func__, enable);
2092
2093 if (enable) {
2094 tabla->adc_count++;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002095 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
2096 } else {
2097 tabla->adc_count--;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002098 if (!tabla->adc_count)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002099 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
Joonwoo Park03324832012-03-19 19:36:16 -07002100 0x2, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002101 }
2102}
2103
2104static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
2105 struct snd_kcontrol *kcontrol, int event)
2106{
2107 struct snd_soc_codec *codec = w->codec;
2108 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002109 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002110
2111 pr_debug("%s %d\n", __func__, event);
2112
2113 if (w->reg == TABLA_A_TX_1_2_EN)
2114 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
2115 else if (w->reg == TABLA_A_TX_3_4_EN)
2116 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
2117 else if (w->reg == TABLA_A_TX_5_6_EN)
2118 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
2119 else {
2120 pr_err("%s: Error, invalid adc register\n", __func__);
2121 return -EINVAL;
2122 }
2123
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002124 if (w->shift == 3)
2125 init_bit_shift = 6;
2126 else if (w->shift == 7)
2127 init_bit_shift = 7;
2128 else {
2129 pr_err("%s: Error, invalid init bit postion adc register\n",
2130 __func__);
2131 return -EINVAL;
2132 }
2133
2134
2135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002136 switch (event) {
2137 case SND_SOC_DAPM_PRE_PMU:
2138 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002139 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
2140 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002141 break;
2142 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002143
2144 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
2145
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002146 break;
2147 case SND_SOC_DAPM_POST_PMD:
2148 tabla_codec_enable_adc_block(codec, 0);
2149 break;
2150 }
2151 return 0;
2152}
2153
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002154static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
2155{
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002156 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2157 0x80);
2158 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
2159 0x04);
2160 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2161 0x01);
2162 usleep_range(1000, 1000);
2163 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2164 0x00);
2165}
2166
2167static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
2168 enum tabla_bandgap_type choice)
2169{
2170 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2171
2172 /* TODO lock resources accessed by audio streams and threaded
2173 * interrupt handlers
2174 */
2175
2176 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
2177 tabla->bandgap_type);
2178
2179 if (tabla->bandgap_type == choice)
2180 return;
2181
2182 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
2183 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2184 tabla_codec_enable_audio_mode_bandgap(codec);
2185 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002186 /* bandgap mode becomes fast,
2187 * mclk should be off or clk buff source souldn't be VBG
2188 * Let's turn off mclk always */
2189 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002190 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
2191 0x2);
2192 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2193 0x80);
2194 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
2195 0x4);
2196 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2197 0x01);
2198 usleep_range(1000, 1000);
2199 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2200 0x00);
2201 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
2202 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
Damir Didjusto7c85d712012-08-16 21:22:29 -07002203 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002204 usleep_range(100, 100);
2205 tabla_codec_enable_audio_mode_bandgap(codec);
2206 } else if (choice == TABLA_BANDGAP_OFF) {
Damir Didjusto7c85d712012-08-16 21:22:29 -07002207 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002208 } else {
2209 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
2210 }
2211 tabla->bandgap_type = choice;
2212}
2213
2214static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
2215{
2216 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2217 pr_debug("%s\n", __func__);
2218 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002219 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002220 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
2221 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002222 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002223 tabla->clock_active = false;
2224}
2225
2226static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
2227{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002228 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002229 return 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002230 else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002231 return 1;
2232 else {
2233 BUG_ON(1);
2234 return -EINVAL;
2235 }
2236}
2237
2238static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
2239{
2240 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2241
2242 if (enable) {
2243 tabla->rx_bias_count++;
2244 if (tabla->rx_bias_count == 1)
2245 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
2246 0x80, 0x80);
2247 } else {
2248 tabla->rx_bias_count--;
2249 if (!tabla->rx_bias_count)
2250 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
2251 0x80, 0x00);
2252 }
2253}
2254
2255static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
2256 int enable)
2257{
2258 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2259
2260 pr_debug("%s: enable = %d\n", __func__, enable);
2261 if (enable) {
2262 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002263 /* bandgap mode to fast */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002264 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
2265 usleep_range(5, 5);
2266 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002267 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002268 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002269 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002270 usleep_range(10, 10);
2271 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002272 usleep_range(10000, 10000);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002273 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
2274 } else {
2275 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002276 0);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002277 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002278 /* clk source to ext clk and clk buff ref to VBG */
2279 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x0C, 0x04);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002280 }
2281 tabla->config_mode_active = enable ? true : false;
2282
2283 return 0;
2284}
2285
2286static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002287 int config_mode)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002288{
2289 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2290
2291 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
2292
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002293 /* transit to RCO requires mclk off */
2294 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002295 if (config_mode) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002296 /* enable RCO and switch to it */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002297 tabla_codec_enable_config_mode(codec, 1);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002298 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002299 usleep_range(1000, 1000);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002300 } else {
2301 /* switch to MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002302 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
2303
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002304 if (tabla->mbhc_polling_active) {
2305 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2306 tabla_codec_enable_config_mode(codec, 0);
2307 }
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002308 }
2309
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002310 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x01, 0x01);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002311 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002312 /* on MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002313 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
2314 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
2315 usleep_range(50, 50);
2316 tabla->clock_active = true;
2317 return 0;
2318}
2319
2320static int tabla_codec_enable_aux_pga(struct snd_soc_dapm_widget *w,
2321 struct snd_kcontrol *kcontrol, int event)
2322{
2323 struct snd_soc_codec *codec = w->codec;
2324 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2325
2326 pr_debug("%s: %d\n", __func__, event);
2327
2328 switch (event) {
2329 case SND_SOC_DAPM_PRE_PMU:
2330 tabla_codec_enable_bandgap(codec,
2331 TABLA_BANDGAP_AUDIO_MODE);
2332 tabla_enable_rx_bias(codec, 1);
2333
2334 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
2335 0x08, 0x08);
2336 /* Enable Zero Cross detect for AUX PGA channel
2337 * and set the initial AUX PGA gain to NEG_0P0_DB
2338 * to avoid glitches.
2339 */
2340 if (w->reg == TABLA_A_AUX_L_EN) {
2341 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
2342 0x20, 0x20);
2343 tabla->aux_l_gain = snd_soc_read(codec,
2344 TABLA_A_AUX_L_GAIN);
2345 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
2346 } else {
2347 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
2348 0x20, 0x20);
2349 tabla->aux_r_gain = snd_soc_read(codec,
2350 TABLA_A_AUX_R_GAIN);
2351 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
2352 }
2353 if (tabla->aux_pga_cnt++ == 1
2354 && !tabla->mclk_enabled) {
2355 tabla_codec_enable_clock_block(codec, 1);
2356 pr_debug("AUX PGA enabled RC osc\n");
2357 }
2358 break;
2359
2360 case SND_SOC_DAPM_POST_PMU:
2361 if (w->reg == TABLA_A_AUX_L_EN)
2362 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
2363 tabla->aux_l_gain);
2364 else
2365 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
2366 tabla->aux_r_gain);
2367 break;
2368
2369 case SND_SOC_DAPM_PRE_PMD:
2370 /* Mute AUX PGA channel in use before disabling AUX PGA */
2371 if (w->reg == TABLA_A_AUX_L_EN) {
2372 tabla->aux_l_gain = snd_soc_read(codec,
2373 TABLA_A_AUX_L_GAIN);
2374 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
2375 } else {
2376 tabla->aux_r_gain = snd_soc_read(codec,
2377 TABLA_A_AUX_R_GAIN);
2378 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
2379 }
2380 break;
2381
2382 case SND_SOC_DAPM_POST_PMD:
2383 tabla_enable_rx_bias(codec, 0);
2384
2385 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
2386 0x08, 0x00);
2387 if (w->reg == TABLA_A_AUX_L_EN) {
2388 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
2389 tabla->aux_l_gain);
2390 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
2391 0x20, 0x00);
2392 } else {
2393 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
2394 tabla->aux_r_gain);
2395 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
2396 0x20, 0x00);
2397 }
2398
2399 if (tabla->aux_pga_cnt-- == 0) {
2400 if (tabla->mbhc_polling_active)
2401 tabla_codec_enable_bandgap(codec,
2402 TABLA_BANDGAP_MBHC_MODE);
2403 else
2404 tabla_codec_enable_bandgap(codec,
2405 TABLA_BANDGAP_OFF);
2406
2407 if (!tabla->mclk_enabled &&
2408 !tabla->mbhc_polling_active) {
2409 tabla_codec_enable_clock_block(codec, 0);
2410 }
2411 }
2412 break;
2413 }
2414 return 0;
2415}
2416
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002417static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
2418 struct snd_kcontrol *kcontrol, int event)
2419{
2420 struct snd_soc_codec *codec = w->codec;
2421 u16 lineout_gain_reg;
2422
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002423 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002424
2425 switch (w->shift) {
2426 case 0:
2427 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
2428 break;
2429 case 1:
2430 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
2431 break;
2432 case 2:
2433 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
2434 break;
2435 case 3:
2436 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
2437 break;
2438 case 4:
2439 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
2440 break;
2441 default:
2442 pr_err("%s: Error, incorrect lineout register value\n",
2443 __func__);
2444 return -EINVAL;
2445 }
2446
2447 switch (event) {
2448 case SND_SOC_DAPM_PRE_PMU:
2449 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
2450 break;
2451 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002452 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002453 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002454 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002455 break;
2456 case SND_SOC_DAPM_POST_PMD:
2457 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
2458 break;
2459 }
2460 return 0;
2461}
2462
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002463
2464static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002465 struct snd_kcontrol *kcontrol, int event)
2466{
2467 struct snd_soc_codec *codec = w->codec;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002468 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2469 u8 dmic_clk_en;
2470 s32 *dmic_clk_cnt;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002471 unsigned int dmic;
2472 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002473
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002474 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
2475 if (ret < 0) {
2476 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002477 return -EINVAL;
2478 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002479
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002480 switch (dmic) {
2481 case 1:
2482 case 2:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002483 dmic_clk_en = 0x01;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002484 dmic_clk_cnt = &(tabla->dmic_1_2_clk_cnt);
2485
2486 pr_debug("%s() event %d DMIC%d dmic_1_2_clk_cnt %d\n",
2487 __func__, event, dmic, *dmic_clk_cnt);
2488
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002489 break;
2490
2491 case 3:
2492 case 4:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002493 dmic_clk_en = 0x04;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002494 dmic_clk_cnt = &(tabla->dmic_3_4_clk_cnt);
2495
2496 pr_debug("%s() event %d DMIC%d dmic_3_4_clk_cnt %d\n",
2497 __func__, event, dmic, *dmic_clk_cnt);
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002498 break;
2499
2500 case 5:
2501 case 6:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002502 dmic_clk_en = 0x10;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002503 dmic_clk_cnt = &(tabla->dmic_5_6_clk_cnt);
2504
2505 pr_debug("%s() event %d DMIC%d dmic_5_6_clk_cnt %d\n",
2506 __func__, event, dmic, *dmic_clk_cnt);
2507
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002508 break;
2509
2510 default:
2511 pr_err("%s: Invalid DMIC Selection\n", __func__);
2512 return -EINVAL;
2513 }
2514
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002515 switch (event) {
2516 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002517
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002518 (*dmic_clk_cnt)++;
2519 if (*dmic_clk_cnt == 1)
2520 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2521 dmic_clk_en, dmic_clk_en);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002522
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 break;
2524 case SND_SOC_DAPM_POST_PMD:
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002525
2526 (*dmic_clk_cnt)--;
2527 if (*dmic_clk_cnt == 0)
2528 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2529 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002530 break;
2531 }
2532 return 0;
2533}
2534
Bradley Rubin229c6a52011-07-12 16:18:48 -07002535
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002536/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002537static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
2538{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002539 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07002540 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
2541 int mbhc_state = tabla->mbhc_state;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002542
Joonwoo Park03324832012-03-19 19:36:16 -07002543 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002544 if (!tabla->mbhc_polling_active) {
2545 pr_debug("Polling is not active, do not start polling\n");
2546 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002547 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002548 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Joonwoo Park03324832012-03-19 19:36:16 -07002549
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07002550 if (tabla->no_mic_headset_override) {
2551 pr_debug("%s setting button threshold to min", __func__);
2552 /* set to min */
2553 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
2554 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
2555 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x80);
2556 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0x00);
2557 } else if (unlikely(mbhc_state == MBHC_STATE_POTENTIAL)) {
2558 pr_debug("%s recovering MBHC state machine\n", __func__);
2559 tabla->mbhc_state = MBHC_STATE_POTENTIAL_RECOVERY;
2560 /* set to max button press threshold */
2561 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL, 0x7F);
2562 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL, 0xFF);
2563 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2564 (TABLA_IS_1_X(tabla_core->version) ?
2565 0x07 : 0x7F));
2566 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0xFF);
2567 /* set to max */
2568 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x7F);
2569 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0xFF);
Joonwoo Park03324832012-03-19 19:36:16 -07002570 }
2571
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002572 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
2573 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
2574 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
Joonwoo Park03324832012-03-19 19:36:16 -07002575 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002576}
2577
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002578/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002579static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
2580{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002581 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2582
Joonwoo Park03324832012-03-19 19:36:16 -07002583 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002584 if (!tabla->mbhc_polling_active) {
2585 pr_debug("polling not active, nothing to pause\n");
2586 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002587 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002588
Simmi Pateriya1b9a3092013-01-02 11:49:26 +05302589 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
2590 msleep(250);
2591 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002592 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Joonwoo Park03324832012-03-19 19:36:16 -07002593 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002594}
2595
Joonwoo Park03324832012-03-19 19:36:16 -07002596static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec, int mode)
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002597{
2598 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2599 u8 reg_mode_val, cur_mode_val;
2600 bool mbhc_was_polling = false;
2601
2602 if (mode)
2603 reg_mode_val = TABLA_CFILT_FAST_MODE;
2604 else
2605 reg_mode_val = TABLA_CFILT_SLOW_MODE;
2606
2607 cur_mode_val = snd_soc_read(codec,
2608 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
2609
2610 if (cur_mode_val != reg_mode_val) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002611 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002612 if (tabla->mbhc_polling_active) {
2613 tabla_codec_pause_hs_polling(codec);
2614 mbhc_was_polling = true;
2615 }
2616 snd_soc_update_bits(codec,
2617 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
2618 if (mbhc_was_polling)
2619 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002620 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002621 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
2622 cur_mode_val, reg_mode_val);
2623 } else {
2624 pr_debug("%s: CFILT Value is already %x\n",
2625 __func__, cur_mode_val);
2626 }
2627}
2628
2629static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
2630 u8 cfilt_sel, int inc)
2631{
2632 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2633 u32 *cfilt_cnt_ptr = NULL;
2634 u16 micb_cfilt_reg;
2635
2636 switch (cfilt_sel) {
2637 case TABLA_CFILT1_SEL:
2638 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
2639 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
2640 break;
2641 case TABLA_CFILT2_SEL:
2642 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
2643 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
2644 break;
2645 case TABLA_CFILT3_SEL:
2646 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
2647 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
2648 break;
2649 default:
2650 return; /* should not happen */
2651 }
2652
2653 if (inc) {
2654 if (!(*cfilt_cnt_ptr)++) {
2655 /* Switch CFILT to slow mode if MBHC CFILT being used */
2656 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2657 tabla_codec_switch_cfilt_mode(codec, 0);
2658
2659 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
2660 }
2661 } else {
2662 /* check if count not zero, decrement
2663 * then check if zero, go ahead disable cfilter
2664 */
2665 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
2666 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
2667
2668 /* Switch CFILT to fast mode if MBHC CFILT being used */
2669 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2670 tabla_codec_switch_cfilt_mode(codec, 1);
2671 }
2672 }
2673}
2674
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002675static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
2676{
2677 int rc = -EINVAL;
2678 unsigned min_mv, max_mv;
2679
2680 switch (ldoh_v) {
2681 case TABLA_LDOH_1P95_V:
2682 min_mv = 160;
2683 max_mv = 1800;
2684 break;
2685 case TABLA_LDOH_2P35_V:
2686 min_mv = 200;
2687 max_mv = 2200;
2688 break;
2689 case TABLA_LDOH_2P75_V:
2690 min_mv = 240;
2691 max_mv = 2600;
2692 break;
2693 case TABLA_LDOH_2P85_V:
2694 min_mv = 250;
2695 max_mv = 2700;
2696 break;
2697 default:
2698 goto done;
2699 }
2700
2701 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
2702 goto done;
2703
2704 for (rc = 4; rc <= 44; rc++) {
2705 min_mv = max_mv * (rc) / 44;
2706 if (min_mv >= cfilt_mv) {
2707 rc -= 4;
2708 break;
2709 }
2710 }
2711done:
2712 return rc;
2713}
2714
2715static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
2716{
2717 u8 hph_reg_val = 0;
2718 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
2719
2720 return (hph_reg_val & 0x30) ? true : false;
2721}
2722
Joonwoo Parka9444452011-12-08 18:48:27 -08002723static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
2724{
2725 u8 hph_reg_val = 0;
2726 if (left)
2727 hph_reg_val = snd_soc_read(codec,
2728 TABLA_A_RX_HPH_L_DAC_CTL);
2729 else
2730 hph_reg_val = snd_soc_read(codec,
2731 TABLA_A_RX_HPH_R_DAC_CTL);
2732
2733 return (hph_reg_val & 0xC0) ? true : false;
2734}
2735
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002736static void tabla_turn_onoff_override(struct snd_soc_codec *codec, bool on)
2737{
2738 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
2739}
2740
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002741/* called under codec_resource_lock acquisition */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002742static void tabla_codec_drive_v_to_micbias(struct snd_soc_codec *codec,
2743 int usec)
2744{
2745 int cfilt_k_val;
2746 bool set = true;
2747 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2748
2749 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
2750 tabla->mbhc_micbias_switched) {
2751 pr_debug("%s: set mic V to micbias V\n", __func__);
2752 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
2753 tabla_turn_onoff_override(codec, true);
2754 while (1) {
2755 cfilt_k_val = tabla_find_k_value(
2756 tabla->pdata->micbias.ldoh_v,
2757 set ? tabla->mbhc_data.micb_mv :
2758 VDDIO_MICBIAS_MV);
2759 snd_soc_update_bits(codec,
2760 tabla->mbhc_bias_regs.cfilt_val,
2761 0xFC, (cfilt_k_val << 2));
2762 if (!set)
2763 break;
2764 usleep_range(usec, usec);
2765 set = false;
2766 }
2767 tabla_turn_onoff_override(codec, false);
2768 }
2769}
2770
2771/* called under codec_resource_lock acquisition */
2772static void __tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2773 int vddio_switch, bool restartpolling,
2774 bool checkpolling)
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002775{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002776 int cfilt_k_val;
Joonwoo Park41956722012-04-18 13:13:07 -07002777 bool override;
2778 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002779
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002780 if (vddio_switch && !tabla->mbhc_micbias_switched &&
2781 (!checkpolling || tabla->mbhc_polling_active)) {
2782 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002783 tabla_codec_pause_hs_polling(codec);
Joonwoo Park41956722012-04-18 13:13:07 -07002784 override = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04;
2785 if (!override)
2786 tabla_turn_onoff_override(codec, true);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002787 /* Adjust threshold if Mic Bias voltage changes */
2788 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002789 cfilt_k_val = tabla_find_k_value(
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002790 tabla->pdata->micbias.ldoh_v,
2791 VDDIO_MICBIAS_MV);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002792 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002793 tabla->mbhc_bias_regs.cfilt_val,
2794 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002795 usleep_range(cfilt_adjust_ms * 1000,
2796 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002797 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2798 tabla->mbhc_data.adj_v_ins_hu & 0xFF);
2799 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2800 (tabla->mbhc_data.adj_v_ins_hu >> 8) &
2801 0xFF);
2802 pr_debug("%s: Programmed MBHC thresholds to VDDIO\n",
2803 __func__);
2804 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002805
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002806 /* enable MIC BIAS Switch to VDDIO */
2807 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2808 0x80, 0x80);
2809 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2810 0x10, 0x00);
Joonwoo Park41956722012-04-18 13:13:07 -07002811 if (!override)
2812 tabla_turn_onoff_override(codec, false);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002813 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002814 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002815
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002816 tabla->mbhc_micbias_switched = true;
2817 pr_debug("%s: VDDIO switch enabled\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002818 } else if (!vddio_switch && tabla->mbhc_micbias_switched) {
2819 if ((!checkpolling || tabla->mbhc_polling_active) &&
2820 restartpolling)
2821 tabla_codec_pause_hs_polling(codec);
2822 /* Reprogram thresholds */
2823 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
2824 cfilt_k_val = tabla_find_k_value(
2825 tabla->pdata->micbias.ldoh_v,
2826 tabla->mbhc_data.micb_mv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002827 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002828 tabla->mbhc_bias_regs.cfilt_val,
2829 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002830 usleep_range(cfilt_adjust_ms * 1000,
2831 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002832 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2833 tabla->mbhc_data.v_ins_hu & 0xFF);
2834 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2835 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
2836 pr_debug("%s: Programmed MBHC thresholds to MICBIAS\n",
2837 __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002838 }
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002839
2840 /* Disable MIC BIAS Switch to VDDIO */
2841 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2842 0x80, 0x00);
2843 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2844 0x10, 0x00);
2845
2846 if ((!checkpolling || tabla->mbhc_polling_active) &&
2847 restartpolling)
2848 tabla_codec_start_hs_polling(codec);
2849
2850 tabla->mbhc_micbias_switched = false;
2851 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002852 }
2853}
2854
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002855static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2856 int vddio_switch)
2857{
2858 return __tabla_codec_switch_micbias(codec, vddio_switch, true, true);
2859}
2860
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002861static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
2862 struct snd_kcontrol *kcontrol, int event)
2863{
2864 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07002865 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2866 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002867 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002868 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002869 char *internal1_text = "Internal1";
2870 char *internal2_text = "Internal2";
2871 char *internal3_text = "Internal3";
Simmi Pateriya71d63872012-11-08 01:06:30 +05302872 const char *micbias1_text = "MIC BIAS1 ";
2873 const char *micbias2_text = "MIC BIAS2 ";
2874 const char *micbias3_text = "MIC BIAS3 ";
2875 const char *micbias4_text = "MIC BIAS4 ";
2876 u32 *micbias_enable_count;
2877 u16 wreg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002878
2879 pr_debug("%s %d\n", __func__, event);
Simmi Pateriya71d63872012-11-08 01:06:30 +05302880 if (strnstr(w->name, micbias1_text, strlen(micbias1_text))) {
2881 wreg = TABLA_A_MICB_1_CTL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002882 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002883 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002884 micb_line = TABLA_MICBIAS1;
Simmi Pateriya71d63872012-11-08 01:06:30 +05302885 } else if (strnstr(w->name, micbias2_text, strlen(micbias2_text))) {
2886 wreg = TABLA_A_MICB_2_CTL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002887 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002888 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002889 micb_line = TABLA_MICBIAS2;
Simmi Pateriya71d63872012-11-08 01:06:30 +05302890 } else if (strnstr(w->name, micbias3_text, strlen(micbias3_text))) {
2891 wreg = TABLA_A_MICB_3_CTL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002892 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002893 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002894 micb_line = TABLA_MICBIAS3;
Simmi Pateriya71d63872012-11-08 01:06:30 +05302895 } else if (strnstr(w->name, micbias4_text, strlen(micbias4_text))) {
2896 wreg = tabla->reg_addr.micb_4_ctl;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002897 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07002898 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002899 micb_line = TABLA_MICBIAS4;
Simmi Pateriya71d63872012-11-08 01:06:30 +05302900 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002901 pr_err("%s: Error, invalid micbias register\n", __func__);
2902 return -EINVAL;
2903 }
2904
Simmi Pateriya71d63872012-11-08 01:06:30 +05302905 micbias_enable_count = &tabla->micbias_enable_count[micb_line];
2906 pr_debug("%s: counter %d\n", __func__, *micbias_enable_count);
2907
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002908 switch (event) {
2909 case SND_SOC_DAPM_PRE_PMU:
Simmi Pateriya71d63872012-11-08 01:06:30 +05302910 if (++*micbias_enable_count > 1) {
2911 pr_debug("%s: do nothing, counter %d\n",
2912 __func__, *micbias_enable_count);
2913 break;
2914 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002915 /* Decide whether to switch the micbias for MBHC */
Simmi Pateriya71d63872012-11-08 01:06:30 +05302916 if (wreg == tabla->mbhc_bias_regs.ctl_reg) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002917 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002918 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002919 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2920 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002921
Simmi Pateriya71d63872012-11-08 01:06:30 +05302922 snd_soc_update_bits(codec, wreg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07002923 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002924
2925 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002926 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002927 else if (strnstr(w->name, internal2_text, 30))
2928 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
2929 else if (strnstr(w->name, internal3_text, 30))
2930 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
2931
Simmi Pateriya71d63872012-11-08 01:06:30 +05302932 snd_soc_update_bits(codec, wreg, 1 << 7, 1 << 7);
2933
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002934 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002935 case SND_SOC_DAPM_POST_PMU:
Simmi Pateriya71d63872012-11-08 01:06:30 +05302936 if (*micbias_enable_count > 1) {
2937 pr_debug("%s: do nothing, counter %d\n",
2938 __func__, *micbias_enable_count);
2939 break;
2940 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08002941 usleep_range(20000, 20000);
2942
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002943 if (tabla->mbhc_polling_active &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002944 tabla->mbhc_cfg.micbias == micb_line) {
2945 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002946 tabla_codec_pause_hs_polling(codec);
2947 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002948 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002949 }
2950 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002951
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002952 case SND_SOC_DAPM_POST_PMD:
Simmi Pateriya71d63872012-11-08 01:06:30 +05302953 if (--*micbias_enable_count > 0) {
2954 pr_debug("%s: do nothing, counter %d\n",
2955 __func__, *micbias_enable_count);
2956 break;
2957 }
2958
2959 snd_soc_update_bits(codec, wreg, 1 << 7, 0);
2960
2961 if ((wreg == tabla->mbhc_bias_regs.ctl_reg) &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002962 tabla_is_hph_pa_on(codec)) {
2963 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002964 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002965 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2966 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002967
Bradley Rubin229c6a52011-07-12 16:18:48 -07002968 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002969 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002970 else if (strnstr(w->name, internal2_text, 30))
2971 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
2972 else if (strnstr(w->name, internal3_text, 30))
2973 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
2974
Patrick Lai3043fba2011-08-01 14:15:57 -07002975 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002976 break;
2977 }
2978
2979 return 0;
2980}
2981
Kiran Kandid8cf5212012-03-02 15:34:53 -08002982
2983static void tx_hpf_corner_freq_callback(struct work_struct *work)
2984{
2985 struct delayed_work *hpf_delayed_work;
2986 struct hpf_work *hpf_work;
2987 struct tabla_priv *tabla;
2988 struct snd_soc_codec *codec;
2989 u16 tx_mux_ctl_reg;
2990 u8 hpf_cut_of_freq;
2991
2992 hpf_delayed_work = to_delayed_work(work);
2993 hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
2994 tabla = hpf_work->tabla;
2995 codec = hpf_work->tabla->codec;
2996 hpf_cut_of_freq = hpf_work->tx_hpf_cut_of_freq;
2997
2998 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL +
2999 (hpf_work->decimator - 1) * 8;
3000
3001 pr_debug("%s(): decimator %u hpf_cut_of_freq 0x%x\n", __func__,
3002 hpf_work->decimator, (unsigned int)hpf_cut_of_freq);
3003
3004 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30, hpf_cut_of_freq << 4);
3005}
3006
3007#define TX_MUX_CTL_CUT_OFF_FREQ_MASK 0x30
3008#define CF_MIN_3DB_4HZ 0x0
3009#define CF_MIN_3DB_75HZ 0x1
3010#define CF_MIN_3DB_150HZ 0x2
3011
Simmi Pateriya71d63872012-11-08 01:06:30 +05303012static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
3013 struct snd_kcontrol *kcontrol, int event);
3014
3015static int tabla_codec_enable_micbias_power(struct snd_soc_dapm_widget *w,
3016 struct snd_kcontrol *kcontrol,
3017 int event)
3018{
3019 struct snd_soc_codec *codec = w->codec;
3020 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3021
3022 pr_debug("%s %d\n", __func__, event);
3023
3024 switch (event) {
3025 case SND_SOC_DAPM_PRE_PMU:
3026 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, true);
3027 tabla_codec_enable_ldo_h(w, kcontrol, event);
3028 tabla_codec_enable_micbias(w, kcontrol, event);
3029 break;
3030 case SND_SOC_DAPM_POST_PMU:
3031 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, true);
3032 break;
3033 case SND_SOC_DAPM_POST_PMD:
3034 tabla_codec_enable_micbias(w, kcontrol, event);
3035 tabla_codec_enable_ldo_h(w, kcontrol, event);
3036 break;
3037 }
3038 return 0;
3039}
3040
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003041static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
3042 struct snd_kcontrol *kcontrol, int event)
3043{
3044 struct snd_soc_codec *codec = w->codec;
Kiran Kandid8cf5212012-03-02 15:34:53 -08003045 unsigned int decimator;
3046 char *dec_name = NULL;
3047 char *widget_name = NULL;
3048 char *temp;
3049 int ret = 0;
3050 u16 dec_reset_reg, tx_vol_ctl_reg, tx_mux_ctl_reg;
3051 u8 dec_hpf_cut_of_freq;
Kuirong Wange9c8a222012-03-28 16:24:09 -07003052 int offset;
3053
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003054
3055 pr_debug("%s %d\n", __func__, event);
3056
Kiran Kandid8cf5212012-03-02 15:34:53 -08003057 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
3058 if (!widget_name)
3059 return -ENOMEM;
3060 temp = widget_name;
3061
3062 dec_name = strsep(&widget_name, " ");
3063 widget_name = temp;
3064 if (!dec_name) {
3065 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
3066 ret = -EINVAL;
3067 goto out;
3068 }
3069
3070 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
3071 if (ret < 0) {
3072 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
3073 ret = -EINVAL;
3074 goto out;
3075 }
3076
3077 pr_debug("%s(): widget = %s dec_name = %s decimator = %u\n", __func__,
3078 w->name, dec_name, decimator);
3079
Kuirong Wange9c8a222012-03-28 16:24:09 -07003080 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003081 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07003082 offset = 0;
3083 } else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003084 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07003085 offset = 8;
3086 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003087 pr_err("%s: Error, incorrect dec\n", __func__);
3088 return -EINVAL;
3089 }
3090
Kiran Kandid8cf5212012-03-02 15:34:53 -08003091 tx_vol_ctl_reg = TABLA_A_CDC_TX1_VOL_CTL_CFG + 8 * (decimator -1);
3092 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
3093
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003094 switch (event) {
3095 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08003096
3097 // Enableable TX digital mute */
3098 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
3099
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003100 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
3101 1 << w->shift);
3102 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
Kiran Kandid8cf5212012-03-02 15:34:53 -08003103
3104 dec_hpf_cut_of_freq = snd_soc_read(codec, tx_mux_ctl_reg);
3105
3106 dec_hpf_cut_of_freq = (dec_hpf_cut_of_freq & 0x30) >> 4;
3107
3108 tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq =
3109 dec_hpf_cut_of_freq;
3110
3111 if ((dec_hpf_cut_of_freq != CF_MIN_3DB_150HZ)) {
3112
3113 /* set cut of freq to CF_MIN_3DB_150HZ (0x1); */
3114 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
3115 CF_MIN_3DB_150HZ << 4);
3116 }
3117
3118 /* enable HPF */
3119 snd_soc_update_bits(codec, tx_mux_ctl_reg , 0x08, 0x00);
3120
3121 break;
3122
3123 case SND_SOC_DAPM_POST_PMU:
3124
3125 /* Disable TX digital mute */
3126 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x00);
3127
3128 if (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq !=
3129 CF_MIN_3DB_150HZ) {
3130
3131 schedule_delayed_work(&tx_hpf_work[decimator - 1].dwork,
3132 msecs_to_jiffies(300));
3133 }
Kuirong Wange9c8a222012-03-28 16:24:09 -07003134 /* apply the digital gain after the decimator is enabled*/
Damir Didjustoed406e22012-11-16 15:44:57 -08003135 if ((w->shift + offset) < ARRAY_SIZE(tx_digital_gain_reg))
Kuirong Wange9c8a222012-03-28 16:24:09 -07003136 snd_soc_write(codec,
3137 tx_digital_gain_reg[w->shift + offset],
3138 snd_soc_read(codec,
3139 tx_digital_gain_reg[w->shift + offset])
3140 );
3141
Kiran Kandid8cf5212012-03-02 15:34:53 -08003142 break;
3143
3144 case SND_SOC_DAPM_PRE_PMD:
3145
3146 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
3147 cancel_delayed_work_sync(&tx_hpf_work[decimator - 1].dwork);
3148 break;
3149
3150 case SND_SOC_DAPM_POST_PMD:
3151
3152 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x08);
3153 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
3154 (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq) << 4);
3155
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003156 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003157 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08003158out:
3159 kfree(widget_name);
3160 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003161}
3162
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003163static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003164 struct snd_kcontrol *kcontrol, int event)
3165{
3166 struct snd_soc_codec *codec = w->codec;
3167
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003168 pr_debug("%s %d %s\n", __func__, event, w->name);
3169
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003170 switch (event) {
3171 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003172 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
3173 1 << w->shift, 1 << w->shift);
3174 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
3175 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003176 break;
Kuirong Wange9c8a222012-03-28 16:24:09 -07003177 case SND_SOC_DAPM_POST_PMU:
3178 /* apply the digital gain after the interpolator is enabled*/
3179 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
3180 snd_soc_write(codec,
3181 rx_digital_gain_reg[w->shift],
3182 snd_soc_read(codec,
3183 rx_digital_gain_reg[w->shift])
3184 );
3185 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003186 }
3187 return 0;
3188}
3189
Simmi Pateriya71d63872012-11-08 01:06:30 +05303190static void tabla_enable_ldo_h(struct snd_soc_codec *codec, u32 enable)
3191{
3192 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3193
3194 if (enable) {
3195 if (++tabla->ldo_h_count == 1)
3196 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1,
3197 0x80, 0x80);
3198 } else {
3199 if (--tabla->ldo_h_count == 0)
3200 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1,
3201 0x80, 0x00);
3202 }
3203}
3204
Bradley Rubin229c6a52011-07-12 16:18:48 -07003205static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
3206 struct snd_kcontrol *kcontrol, int event)
3207{
Simmi Pateriya71d63872012-11-08 01:06:30 +05303208 struct snd_soc_codec *codec = w->codec;
3209
3210 pr_debug("%s %d\n", __func__, event);
3211
Bradley Rubin229c6a52011-07-12 16:18:48 -07003212 switch (event) {
Simmi Pateriya71d63872012-11-08 01:06:30 +05303213 case SND_SOC_DAPM_PRE_PMU:
3214 tabla_enable_ldo_h(codec, 1);
3215 usleep_range(1000, 1000);
3216 break;
Bradley Rubin229c6a52011-07-12 16:18:48 -07003217 case SND_SOC_DAPM_POST_PMD:
Simmi Pateriya71d63872012-11-08 01:06:30 +05303218 tabla_enable_ldo_h(codec, 0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07003219 usleep_range(1000, 1000);
3220 break;
3221 }
3222 return 0;
3223}
3224
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003225static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
3226 struct snd_kcontrol *kcontrol, int event)
3227{
3228 struct snd_soc_codec *codec = w->codec;
3229
3230 pr_debug("%s %d\n", __func__, event);
3231
3232 switch (event) {
3233 case SND_SOC_DAPM_PRE_PMU:
3234 tabla_enable_rx_bias(codec, 1);
3235 break;
3236 case SND_SOC_DAPM_POST_PMD:
3237 tabla_enable_rx_bias(codec, 0);
3238 break;
3239 }
3240 return 0;
3241}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003242static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
3243 struct snd_kcontrol *kcontrol, int event)
3244{
3245 struct snd_soc_codec *codec = w->codec;
3246
3247 pr_debug("%s %s %d\n", __func__, w->name, event);
3248
3249 switch (event) {
3250 case SND_SOC_DAPM_PRE_PMU:
3251 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3252 break;
3253 case SND_SOC_DAPM_POST_PMD:
3254 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3255 break;
3256 }
3257 return 0;
3258}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003259
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003260static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
3261 struct snd_soc_jack *jack, int status,
3262 int mask)
3263{
3264 /* XXX: wake_lock_timeout()? */
Joonwoo Park03324832012-03-19 19:36:16 -07003265 snd_soc_jack_report_no_dapm(jack, status, mask);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003266}
3267
Patrick Lai49efeac2011-11-03 11:01:12 -07003268static void hphocp_off_report(struct tabla_priv *tabla,
3269 u32 jack_status, int irq)
3270{
3271 struct snd_soc_codec *codec;
Joonwoo Park03324832012-03-19 19:36:16 -07003272 if (!tabla) {
3273 pr_err("%s: Bad tabla private data\n", __func__);
3274 return;
3275 }
Patrick Lai49efeac2011-11-03 11:01:12 -07003276
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003277 pr_debug("%s: clear ocp status %x\n", __func__, jack_status);
Joonwoo Park03324832012-03-19 19:36:16 -07003278 codec = tabla->codec;
3279 if (tabla->hph_status & jack_status) {
Patrick Lai49efeac2011-11-03 11:01:12 -07003280 tabla->hph_status &= ~jack_status;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003281 if (tabla->mbhc_cfg.headset_jack)
3282 tabla_snd_soc_jack_report(tabla,
3283 tabla->mbhc_cfg.headset_jack,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003284 tabla->hph_status,
3285 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08003286 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
3287 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08003288 /* reset retry counter as PA is turned off signifying
3289 * start of new OCP detection session
3290 */
Joonwoo Parkf6574c72012-10-10 17:29:57 -07003291 if (WCD9XXX_IRQ_HPH_PA_OCPL_FAULT)
Patrick Laic7cae882011-11-18 11:52:49 -08003292 tabla->hphlocp_cnt = 0;
3293 else
3294 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303295 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07003296 }
3297}
3298
3299static void hphlocp_off_report(struct work_struct *work)
3300{
3301 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
3302 hphlocp_work);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07003303 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
3304 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07003305}
3306
3307static void hphrocp_off_report(struct work_struct *work)
3308{
3309 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
3310 hphrocp_work);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07003311 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
3312 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07003313}
3314
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003315static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
3316 struct snd_kcontrol *kcontrol, int event)
3317{
3318 struct snd_soc_codec *codec = w->codec;
3319 const char *filename;
3320 const struct firmware *fw;
3321 int i;
3322 int ret;
3323 int num_anc_slots;
3324 struct anc_header *anc_head;
3325 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3326 u32 anc_writes_size = 0;
3327 int anc_size_remaining;
3328 u32 *anc_ptr;
3329 u16 reg;
3330 u8 mask, val, old_val;
3331 u8 mbhc_micb_ctl_val;
3332
3333 pr_debug("%s: DAPM Event %d ANC func is %d\n",
3334 __func__, event, tabla->anc_func);
3335
3336 if (tabla->anc_func == 0)
3337 return 0;
3338
3339 switch (event) {
3340 case SND_SOC_DAPM_PRE_PMU:
3341 mbhc_micb_ctl_val = snd_soc_read(codec,
3342 tabla->mbhc_bias_regs.ctl_reg);
3343
3344 if (!(mbhc_micb_ctl_val & 0x80)) {
3345 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
3346 tabla_codec_switch_micbias(codec, 1);
3347 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3348 }
3349
3350 filename = "wcd9310/wcd9310_anc.bin";
3351
3352 ret = request_firmware(&fw, filename, codec->dev);
3353 if (ret != 0) {
3354 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
3355 ret);
3356 return -ENODEV;
3357 }
3358
3359 if (fw->size < sizeof(struct anc_header)) {
3360 dev_err(codec->dev, "Not enough data\n");
3361 release_firmware(fw);
3362 return -ENOMEM;
3363 }
3364
3365 /* First number is the number of register writes */
3366 anc_head = (struct anc_header *)(fw->data);
3367 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
3368 anc_size_remaining = fw->size - sizeof(struct anc_header);
3369 num_anc_slots = anc_head->num_anc_slots;
3370
3371 if (tabla->anc_slot >= num_anc_slots) {
3372 dev_err(codec->dev, "Invalid ANC slot selected\n");
3373 release_firmware(fw);
3374 return -EINVAL;
3375 }
3376
3377 for (i = 0; i < num_anc_slots; i++) {
3378
3379 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
3380 dev_err(codec->dev, "Invalid register format\n");
3381 release_firmware(fw);
3382 return -EINVAL;
3383 }
3384 anc_writes_size = (u32)(*anc_ptr);
3385 anc_size_remaining -= sizeof(u32);
3386 anc_ptr += 1;
3387
3388 if (anc_writes_size * TABLA_PACKED_REG_SIZE
3389 > anc_size_remaining) {
3390 dev_err(codec->dev, "Invalid register format\n");
3391 release_firmware(fw);
3392 return -ENOMEM;
3393 }
3394
3395 if (tabla->anc_slot == i)
3396 break;
3397
3398 anc_size_remaining -= (anc_writes_size *
3399 TABLA_PACKED_REG_SIZE);
3400 anc_ptr += anc_writes_size;
3401 }
3402 if (i == num_anc_slots) {
3403 dev_err(codec->dev, "Selected ANC slot not present\n");
3404 release_firmware(fw);
3405 return -ENOMEM;
3406 }
3407
3408 for (i = 0; i < anc_writes_size; i++) {
3409 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
3410 mask, val);
3411 old_val = snd_soc_read(codec, reg);
3412 snd_soc_write(codec, reg, (old_val & ~mask) |
3413 (val & mask));
3414 }
3415 usleep_range(10000, 10000);
3416 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x30);
3417 msleep(30);
3418 release_firmware(fw);
3419 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
3420 /* if MBHC polling is active, set TX7_MBHC_EN bit 7 */
3421 if (tabla->mbhc_polling_active)
3422 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80,
3423 0x80);
3424 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3425 break;
3426 case SND_SOC_DAPM_POST_PMD:
3427 /* schedule work is required because at the time HPH PA DAPM
3428 * event callback is called by DAPM framework, CODEC dapm mutex
3429 * would have been locked while snd_soc_jack_report also
3430 * attempts to acquire same lock.
3431 */
3432 if (w->shift == 5) {
3433 clear_bit(TABLA_HPHL_PA_OFF_ACK,
3434 &tabla->hph_pa_dac_state);
3435 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
3436 &tabla->hph_pa_dac_state);
3437 if (tabla->hph_status & SND_JACK_OC_HPHL)
3438 schedule_work(&tabla->hphlocp_work);
3439 } else if (w->shift == 4) {
3440 clear_bit(TABLA_HPHR_PA_OFF_ACK,
3441 &tabla->hph_pa_dac_state);
3442 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
3443 &tabla->hph_pa_dac_state);
3444 if (tabla->hph_status & SND_JACK_OC_HPHR)
3445 schedule_work(&tabla->hphrocp_work);
3446 }
3447
3448 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
3449 tabla_codec_switch_micbias(codec, 0);
3450 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3451
3452 break;
3453 case SND_SOC_DAPM_PRE_PMD:
3454 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
3455 msleep(40);
3456 /* unset TX7_MBHC_EN bit 7 */
3457 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
3458 snd_soc_update_bits(codec, TABLA_A_CDC_ANC1_CTL, 0x01, 0x00);
3459 snd_soc_update_bits(codec, TABLA_A_CDC_ANC2_CTL, 0x01, 0x00);
3460 msleep(20);
3461 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0x0F);
3462 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
3463 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
3464 break;
3465 }
3466 return 0;
3467}
3468
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003469static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
3470 struct snd_kcontrol *kcontrol, int event)
3471{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003472 struct snd_soc_codec *codec = w->codec;
3473 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3474 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003475 pr_debug("%s: event = %d\n", __func__, event);
3476
3477 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003478 case SND_SOC_DAPM_PRE_PMU:
3479 mbhc_micb_ctl_val = snd_soc_read(codec,
3480 tabla->mbhc_bias_regs.ctl_reg);
3481
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003482 if (!(mbhc_micb_ctl_val & 0x80)) {
3483 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003484 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003485 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3486 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003487 break;
3488
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003489 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07003490 /* schedule work is required because at the time HPH PA DAPM
3491 * event callback is called by DAPM framework, CODEC dapm mutex
3492 * would have been locked while snd_soc_jack_report also
3493 * attempts to acquire same lock.
3494 */
Joonwoo Parka9444452011-12-08 18:48:27 -08003495 if (w->shift == 5) {
3496 clear_bit(TABLA_HPHL_PA_OFF_ACK,
3497 &tabla->hph_pa_dac_state);
3498 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
3499 &tabla->hph_pa_dac_state);
3500 if (tabla->hph_status & SND_JACK_OC_HPHL)
3501 schedule_work(&tabla->hphlocp_work);
3502 } else if (w->shift == 4) {
3503 clear_bit(TABLA_HPHR_PA_OFF_ACK,
3504 &tabla->hph_pa_dac_state);
3505 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
3506 &tabla->hph_pa_dac_state);
3507 if (tabla->hph_status & SND_JACK_OC_HPHR)
3508 schedule_work(&tabla->hphrocp_work);
3509 }
3510
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003511 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park03324832012-03-19 19:36:16 -07003512 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003513 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003514
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003515 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
3516 w->name);
3517 usleep_range(10000, 10000);
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003518 break;
3519 }
3520 return 0;
3521}
3522
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003523static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003524 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003525{
3526 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003527 unsigned int cfilt;
3528
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003529 switch (tabla->mbhc_cfg.micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003530 case TABLA_MICBIAS1:
3531 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
3532 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
3533 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
3534 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
3535 break;
3536 case TABLA_MICBIAS2:
3537 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
3538 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
3539 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
3540 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
3541 break;
3542 case TABLA_MICBIAS3:
3543 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
3544 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
3545 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
3546 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
3547 break;
3548 case TABLA_MICBIAS4:
3549 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003550 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
3551 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
3552 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003553 break;
3554 default:
3555 /* Should never reach here */
3556 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07003557 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003558 }
3559
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003560 micbias_regs->cfilt_sel = cfilt;
3561
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003562 switch (cfilt) {
3563 case TABLA_CFILT1_SEL:
3564 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
3565 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003566 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003567 break;
3568 case TABLA_CFILT2_SEL:
3569 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
3570 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003571 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003572 break;
3573 case TABLA_CFILT3_SEL:
3574 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
3575 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003576 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003577 break;
3578 }
3579}
Santosh Mardie15e2302011-11-15 10:39:23 +05303580static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
3581 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
3582 4, 0, NULL, 0),
3583 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
3584 0, NULL, 0),
3585};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003586
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003587static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
3588 struct snd_kcontrol *kcontrol, int event)
3589{
3590 struct snd_soc_codec *codec = w->codec;
3591
3592 pr_debug("%s %s %d\n", __func__, w->name, event);
3593
3594 switch (event) {
3595 case SND_SOC_DAPM_PRE_PMU:
3596 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3597 break;
3598
3599 case SND_SOC_DAPM_POST_PMD:
3600 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3601 break;
3602 }
3603 return 0;
3604}
3605
Damir Didjusto7c85d712012-08-16 21:22:29 -07003606static int tabla_ear_pa_event(struct snd_soc_dapm_widget *w,
3607 struct snd_kcontrol *kcontrol, int event)
3608{
3609 struct snd_soc_codec *codec = w->codec;
3610
3611 pr_debug("%s %d\n", __func__, event);
3612
3613 switch (event) {
3614 case SND_SOC_DAPM_PRE_PMU:
3615 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x50, 0x50);
3616 break;
3617
3618 case SND_SOC_DAPM_PRE_PMD:
3619 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x10, 0x00);
3620 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x40, 0x00);
3621 break;
3622 }
3623 return 0;
3624}
3625
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003626static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
Simmi Pateriya71d63872012-11-08 01:06:30 +05303627 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", SND_SOC_NOPM, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303628 0, tabla_codec_enable_micbias,
3629 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3630 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003631};
3632
3633static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
Simmi Pateriya71d63872012-11-08 01:06:30 +05303634 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", SND_SOC_NOPM, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303635 0, tabla_codec_enable_micbias,
3636 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3637 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003638};
3639
Santosh Mardie15e2302011-11-15 10:39:23 +05303640static const struct snd_soc_dapm_route audio_i2s_map[] = {
3641 {"RX_I2S_CLK", NULL, "CDC_CONN"},
3642 {"SLIM RX1", NULL, "RX_I2S_CLK"},
3643 {"SLIM RX2", NULL, "RX_I2S_CLK"},
3644 {"SLIM RX3", NULL, "RX_I2S_CLK"},
3645 {"SLIM RX4", NULL, "RX_I2S_CLK"},
3646
3647 {"SLIM TX7", NULL, "TX_I2S_CLK"},
3648 {"SLIM TX8", NULL, "TX_I2S_CLK"},
3649 {"SLIM TX9", NULL, "TX_I2S_CLK"},
3650 {"SLIM TX10", NULL, "TX_I2S_CLK"},
3651};
3652
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003653static const struct snd_soc_dapm_route audio_map[] = {
3654 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003655
Kuirong Wang906ac472012-07-09 12:54:44 -07003656 {"AIF1 CAP", NULL, "AIF1_CAP Mixer"},
3657 {"AIF2 CAP", NULL, "AIF2_CAP Mixer"},
3658 {"AIF3 CAP", NULL, "AIF3_CAP Mixer"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003659
Kuirong Wang906ac472012-07-09 12:54:44 -07003660 /* SLIM_MIXER("AIF1_CAP Mixer"),*/
3661 {"AIF1_CAP Mixer", "SLIM TX1", "SLIM TX1 MUX"},
3662 {"AIF1_CAP Mixer", "SLIM TX2", "SLIM TX2 MUX"},
3663 {"AIF1_CAP Mixer", "SLIM TX3", "SLIM TX3 MUX"},
3664 {"AIF1_CAP Mixer", "SLIM TX4", "SLIM TX4 MUX"},
3665 {"AIF1_CAP Mixer", "SLIM TX5", "SLIM TX5 MUX"},
3666 {"AIF1_CAP Mixer", "SLIM TX6", "SLIM TX6 MUX"},
3667 {"AIF1_CAP Mixer", "SLIM TX7", "SLIM TX7 MUX"},
3668 {"AIF1_CAP Mixer", "SLIM TX8", "SLIM TX8 MUX"},
3669 {"AIF1_CAP Mixer", "SLIM TX9", "SLIM TX9 MUX"},
3670 {"AIF1_CAP Mixer", "SLIM TX10", "SLIM TX10 MUX"},
3671 /* SLIM_MIXER("AIF2_CAP Mixer"),*/
3672 {"AIF2_CAP Mixer", "SLIM TX1", "SLIM TX1 MUX"},
3673 {"AIF2_CAP Mixer", "SLIM TX2", "SLIM TX2 MUX"},
3674 {"AIF2_CAP Mixer", "SLIM TX3", "SLIM TX3 MUX"},
3675 {"AIF2_CAP Mixer", "SLIM TX4", "SLIM TX4 MUX"},
3676 {"AIF2_CAP Mixer", "SLIM TX5", "SLIM TX5 MUX"},
3677 {"AIF2_CAP Mixer", "SLIM TX6", "SLIM TX6 MUX"},
3678 {"AIF2_CAP Mixer", "SLIM TX7", "SLIM TX7 MUX"},
3679 {"AIF2_CAP Mixer", "SLIM TX8", "SLIM TX8 MUX"},
3680 {"AIF2_CAP Mixer", "SLIM TX9", "SLIM TX9 MUX"},
3681 {"AIF2_CAP Mixer", "SLIM TX10", "SLIM TX10 MUX"},
3682 /* SLIM_MIXER("AIF3_CAP Mixer"),*/
3683 {"AIF3_CAP Mixer", "SLIM TX1", "SLIM TX1 MUX"},
3684 {"AIF3_CAP Mixer", "SLIM TX2", "SLIM TX2 MUX"},
3685 {"AIF3_CAP Mixer", "SLIM TX3", "SLIM TX3 MUX"},
3686 {"AIF3_CAP Mixer", "SLIM TX4", "SLIM TX4 MUX"},
3687 {"AIF3_CAP Mixer", "SLIM TX5", "SLIM TX5 MUX"},
3688 {"AIF3_CAP Mixer", "SLIM TX6", "SLIM TX6 MUX"},
3689 {"AIF3_CAP Mixer", "SLIM TX7", "SLIM TX7 MUX"},
3690 {"AIF3_CAP Mixer", "SLIM TX8", "SLIM TX8 MUX"},
3691 {"AIF3_CAP Mixer", "SLIM TX9", "SLIM TX9 MUX"},
3692 {"AIF3_CAP Mixer", "SLIM TX10", "SLIM TX10 MUX"},
3693
3694 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003695 {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
3696
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003697 {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003698 {"SLIM TX3 MUX", "RMIX1", "RX1 MIX1"},
3699 {"SLIM TX3 MUX", "RMIX2", "RX2 MIX1"},
3700 {"SLIM TX3 MUX", "RMIX3", "RX3 MIX1"},
3701 {"SLIM TX3 MUX", "RMIX4", "RX4 MIX1"},
3702 {"SLIM TX3 MUX", "RMIX5", "RX5 MIX1"},
3703 {"SLIM TX3 MUX", "RMIX6", "RX6 MIX1"},
3704 {"SLIM TX3 MUX", "RMIX7", "RX7 MIX1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003705
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003706 {"SLIM TX4 MUX", "DEC4", "DEC4 MUX"},
3707
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003708 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003709 {"SLIM TX5 MUX", "RMIX1", "RX1 MIX1"},
3710 {"SLIM TX5 MUX", "RMIX2", "RX2 MIX1"},
3711 {"SLIM TX5 MUX", "RMIX3", "RX3 MIX1"},
3712 {"SLIM TX5 MUX", "RMIX4", "RX4 MIX1"},
3713 {"SLIM TX5 MUX", "RMIX5", "RX5 MIX1"},
3714 {"SLIM TX5 MUX", "RMIX6", "RX6 MIX1"},
3715 {"SLIM TX5 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003716
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003717 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
3718
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003719 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003720 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003721 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
3722 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003723 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
3724 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003725 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
3726 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003727 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
3728 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003729 {"SLIM TX7 MUX", "RMIX1", "RX1 MIX1"},
3730 {"SLIM TX7 MUX", "RMIX2", "RX2 MIX1"},
3731 {"SLIM TX7 MUX", "RMIX3", "RX3 MIX1"},
3732 {"SLIM TX7 MUX", "RMIX4", "RX4 MIX1"},
3733 {"SLIM TX7 MUX", "RMIX5", "RX5 MIX1"},
3734 {"SLIM TX7 MUX", "RMIX6", "RX6 MIX1"},
3735 {"SLIM TX7 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003736
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003737 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
3738 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
3739 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07003740 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003741 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
3742 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003743 {"SLIM TX8 MUX", "DEC7", "DEC7 MUX"},
3744 {"SLIM TX8 MUX", "DEC8", "DEC8 MUX"},
3745 {"SLIM TX8 MUX", "DEC9", "DEC9 MUX"},
3746 {"SLIM TX8 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003747
Kiran Kandi3426e512011-09-13 22:50:10 -07003748 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
3749 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
3750 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
3751 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
3752 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
3753 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
3754 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
3755 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
3756 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
3757 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
3758
Kiran Kandi3426e512011-09-13 22:50:10 -07003759 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
3760 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
3761 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
3762 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
3763 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
3764 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
3765 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
3766 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
3767 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
3768 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
3769
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003770 /* Earpiece (RX MIX1) */
3771 {"EAR", NULL, "EAR PA"},
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003772 {"EAR PA", NULL, "EAR_PA_MIXER"},
3773 {"EAR_PA_MIXER", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003774 {"DAC1", NULL, "CP"},
3775
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003776 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX2"},
3777 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX2"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003778
3779 /* Headset (RX MIX1 and RX MIX2) */
3780 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003781 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003782
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003783 {"HPHL", NULL, "HPHL_PA_MIXER"},
3784 {"HPHL_PA_MIXER", NULL, "HPHL DAC"},
3785
3786 {"HPHR", NULL, "HPHR_PA_MIXER"},
3787 {"HPHR_PA_MIXER", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003788
3789 {"HPHL DAC", NULL, "CP"},
3790 {"HPHR DAC", NULL, "CP"},
3791
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003792 {"ANC HEADPHONE", NULL, "ANC HPHL"},
3793 {"ANC HEADPHONE", NULL, "ANC HPHR"},
3794
3795 {"ANC HPHL", NULL, "HPHL_PA_MIXER"},
3796 {"ANC HPHR", NULL, "HPHR_PA_MIXER"},
3797
Bradley Rubin229c6a52011-07-12 16:18:48 -07003798 {"ANC1 MUX", "ADC1", "ADC1"},
3799 {"ANC1 MUX", "ADC2", "ADC2"},
3800 {"ANC1 MUX", "ADC3", "ADC3"},
3801 {"ANC1 MUX", "ADC4", "ADC4"},
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003802 {"ANC1 MUX", "DMIC1", "DMIC1"},
3803 {"ANC1 MUX", "DMIC2", "DMIC2"},
3804 {"ANC1 MUX", "DMIC3", "DMIC3"},
3805 {"ANC1 MUX", "DMIC4", "DMIC4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003806 {"ANC2 MUX", "ADC1", "ADC1"},
3807 {"ANC2 MUX", "ADC2", "ADC2"},
3808 {"ANC2 MUX", "ADC3", "ADC3"},
3809 {"ANC2 MUX", "ADC4", "ADC4"},
3810
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003811 {"ANC HPHR", NULL, "CDC_CONN"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003812 {"DAC1", "Switch", "RX1 CHAIN"},
3813 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003814 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003815
Kiran Kandidb0a4b02011-08-23 09:32:09 -07003816 {"LINEOUT1", NULL, "LINEOUT1 PA"},
3817 {"LINEOUT2", NULL, "LINEOUT2 PA"},
3818 {"LINEOUT3", NULL, "LINEOUT3 PA"},
3819 {"LINEOUT4", NULL, "LINEOUT4 PA"},
3820 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003821
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003822 {"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
3823 {"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
3824 {"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
3825 {"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
3826 {"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
3827 {"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
3828 {"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
3829 {"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
3830 {"LINEOUT5 PA", NULL, "LINEOUT5_PA_MIXER"},
3831 {"LINEOUT5_PA_MIXER", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003832
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003833 {"LINEOUT1 DAC", NULL, "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003834 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
3835
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003836 {"RX1 CHAIN", NULL, "RX1 MIX2"},
3837 {"RX2 CHAIN", NULL, "RX2 MIX2"},
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003838 {"RX1 MIX2", NULL, "ANC1 MUX"},
3839 {"RX2 MIX2", NULL, "ANC2 MUX"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003840
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003841 {"CP", NULL, "RX_BIAS"},
3842 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
3843 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
3844 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
3845 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003846 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003847
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003848 {"RX1 MIX1", NULL, "COMP1_CLK"},
3849 {"RX2 MIX1", NULL, "COMP1_CLK"},
3850 {"RX3 MIX1", NULL, "COMP2_CLK"},
3851 {"RX5 MIX1", NULL, "COMP2_CLK"},
3852
3853
Bradley Rubin229c6a52011-07-12 16:18:48 -07003854 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
3855 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003856 {"RX1 MIX1", NULL, "RX1 MIX1 INP3"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003857 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
3858 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003859 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
3860 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
3861 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
3862 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
3863 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
3864 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
3865 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
3866 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003867 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
3868 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003869 {"RX1 MIX2", NULL, "RX1 MIX1"},
3870 {"RX1 MIX2", NULL, "RX1 MIX2 INP1"},
3871 {"RX1 MIX2", NULL, "RX1 MIX2 INP2"},
3872 {"RX2 MIX2", NULL, "RX2 MIX1"},
3873 {"RX2 MIX2", NULL, "RX2 MIX2 INP1"},
3874 {"RX2 MIX2", NULL, "RX2 MIX2 INP2"},
3875 {"RX3 MIX2", NULL, "RX3 MIX1"},
3876 {"RX3 MIX2", NULL, "RX3 MIX2 INP1"},
3877 {"RX3 MIX2", NULL, "RX3 MIX2 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003878
Kuirong Wang906ac472012-07-09 12:54:44 -07003879 /* SLIM_MUX("AIF1_PB", "AIF1 PB"),*/
3880 {"SLIM RX1 MUX", "AIF1_PB", "AIF1 PB"},
3881 {"SLIM RX2 MUX", "AIF1_PB", "AIF1 PB"},
3882 {"SLIM RX3 MUX", "AIF1_PB", "AIF1 PB"},
3883 {"SLIM RX4 MUX", "AIF1_PB", "AIF1 PB"},
3884 {"SLIM RX5 MUX", "AIF1_PB", "AIF1 PB"},
3885 {"SLIM RX6 MUX", "AIF1_PB", "AIF1 PB"},
3886 {"SLIM RX7 MUX", "AIF1_PB", "AIF1 PB"},
3887 /* SLIM_MUX("AIF2_PB", "AIF2 PB"),*/
3888 {"SLIM RX1 MUX", "AIF2_PB", "AIF2 PB"},
3889 {"SLIM RX2 MUX", "AIF2_PB", "AIF2 PB"},
3890 {"SLIM RX3 MUX", "AIF2_PB", "AIF2 PB"},
3891 {"SLIM RX4 MUX", "AIF2_PB", "AIF2 PB"},
3892 {"SLIM RX5 MUX", "AIF2_PB", "AIF2 PB"},
3893 {"SLIM RX6 MUX", "AIF2_PB", "AIF2 PB"},
3894 {"SLIM RX7 MUX", "AIF2_PB", "AIF2 PB"},
3895 /* SLIM_MUX("AIF3_PB", "AIF3 PB"),*/
3896 {"SLIM RX1 MUX", "AIF3_PB", "AIF3 PB"},
3897 {"SLIM RX2 MUX", "AIF3_PB", "AIF3 PB"},
3898 {"SLIM RX3 MUX", "AIF3_PB", "AIF3 PB"},
3899 {"SLIM RX4 MUX", "AIF3_PB", "AIF3 PB"},
3900 {"SLIM RX5 MUX", "AIF3_PB", "AIF3 PB"},
3901 {"SLIM RX6 MUX", "AIF3_PB", "AIF3 PB"},
3902 {"SLIM RX7 MUX", "AIF3_PB", "AIF3 PB"},
3903
3904 {"SLIM RX1", NULL, "SLIM RX1 MUX"},
3905 {"SLIM RX2", NULL, "SLIM RX2 MUX"},
3906 {"SLIM RX3", NULL, "SLIM RX3 MUX"},
3907 {"SLIM RX4", NULL, "SLIM RX4 MUX"},
3908 {"SLIM RX5", NULL, "SLIM RX5 MUX"},
3909 {"SLIM RX6", NULL, "SLIM RX6 MUX"},
3910 {"SLIM RX7", NULL, "SLIM RX7 MUX"},
3911
3912 /* Mixer control for output path */
Bradley Rubin229c6a52011-07-12 16:18:48 -07003913 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
3914 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303915 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
3916 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003917 {"RX1 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003918 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
3919 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003920 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003921 {"RX1 MIX1 INP1", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003922 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
3923 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303924 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
3925 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003926 {"RX1 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003927 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
3928 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003929 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003930 {"RX1 MIX1 INP2", "IIR2", "IIR2"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003931 {"RX1 MIX1 INP3", "RX1", "SLIM RX1"},
3932 {"RX1 MIX1 INP3", "RX2", "SLIM RX2"},
3933 {"RX1 MIX1 INP3", "RX3", "SLIM RX3"},
3934 {"RX1 MIX1 INP3", "RX4", "SLIM RX4"},
3935 {"RX1 MIX1 INP3", "RX5", "SLIM RX5"},
3936 {"RX1 MIX1 INP3", "RX6", "SLIM RX6"},
3937 {"RX1 MIX1 INP3", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003938 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
3939 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303940 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
3941 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003942 {"RX2 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003943 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
3944 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003945 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003946 {"RX2 MIX1 INP1", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003947 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
3948 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303949 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
3950 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003951 {"RX2 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003952 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
3953 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003954 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003955 {"RX2 MIX1 INP2", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003956 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
3957 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303958 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
3959 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003960 {"RX3 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003961 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
3962 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003963 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003964 {"RX3 MIX1 INP1", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003965 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
3966 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303967 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
3968 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003969 {"RX3 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003970 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
3971 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003972 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003973 {"RX3 MIX1 INP2", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003974 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
3975 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303976 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
3977 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003978 {"RX4 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003979 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
3980 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003981 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003982 {"RX4 MIX1 INP1", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003983 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
3984 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303985 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003986 {"RX4 MIX1 INP2", "RX5", "SLIM RX5"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303987 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003988 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
3989 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003990 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07003991 {"RX4 MIX1 INP2", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003992 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
3993 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303994 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
3995 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003996 {"RX5 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003997 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
3998 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003999 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004000 {"RX5 MIX1 INP1", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07004001 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
4002 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05304003 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
4004 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07004005 {"RX5 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08004006 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
4007 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07004008 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004009 {"RX5 MIX1 INP2", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07004010 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
4011 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05304012 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
4013 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07004014 {"RX6 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08004015 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
4016 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07004017 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004018 {"RX6 MIX1 INP1", "IIR2", "IIR2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07004019 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
4020 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05304021 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
4022 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07004023 {"RX6 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08004024 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
4025 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07004026 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004027 {"RX6 MIX1 INP2", "IIR2", "IIR2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07004028 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
4029 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05304030 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
4031 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07004032 {"RX7 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08004033 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
4034 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07004035 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004036 {"RX7 MIX1 INP1", "IIR2", "IIR2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07004037 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
4038 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05304039 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
4040 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07004041 {"RX7 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08004042 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
4043 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07004044 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004045 {"RX7 MIX1 INP2", "IIR2", "IIR2"},
4046
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004047 {"RX1 MIX2 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004048 {"RX1 MIX2 INP1", "IIR2", "IIR2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004049 {"RX1 MIX2 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004050 {"RX1 MIX2 INP2", "IIR2", "IIR2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004051 {"RX2 MIX2 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004052 {"RX2 MIX2 INP1", "IIR2", "IIR2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004053 {"RX2 MIX2 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004054 {"RX2 MIX2 INP2", "IIR2", "IIR2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004055 {"RX3 MIX2 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004056 {"RX3 MIX2 INP1", "IIR2", "IIR2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004057 {"RX3 MIX2 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004058 {"RX3 MIX2 INP2", "IIR2", "IIR2"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004059
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004060 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004061 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07004062 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004063 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07004064 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004065 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004066 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07004067 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004068 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004069 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07004070 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004071 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004072 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07004073 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004074 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004075 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07004076 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004077 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004078 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004079 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004080 {"DEC7 MUX", "DMIC6", "DMIC6"},
4081 {"DEC7 MUX", "ADC1", "ADC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07004082 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004083 {"DEC7 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004084 {"DEC8 MUX", "DMIC2", "DMIC2"},
4085 {"DEC8 MUX", "DMIC5", "DMIC5"},
4086 {"DEC8 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004087 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004088 {"DEC8 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004089 {"DEC9 MUX", "DMIC4", "DMIC4"},
4090 {"DEC9 MUX", "DMIC5", "DMIC5"},
4091 {"DEC9 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004092 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004093 {"DEC9 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004094 {"DEC10 MUX", "DMIC3", "DMIC3"},
4095 {"DEC10 MUX", "DMIC6", "DMIC6"},
4096 {"DEC10 MUX", "ADC1", "ADC1"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004097 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07004098 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004099
4100 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004101 {"ADC1", NULL, "AMIC1"},
4102 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07004103 {"ADC3", NULL, "AMIC3"},
4104 {"ADC4", NULL, "AMIC4"},
4105 {"ADC5", NULL, "AMIC5"},
4106 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004107
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08004108 /* AUX PGA Connections */
4109 {"HPHL_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4110 {"HPHL_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4111 {"HPHL_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4112 {"HPHL_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4113 {"HPHR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4114 {"HPHR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4115 {"HPHR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4116 {"HPHR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4117 {"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4118 {"LINEOUT1_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4119 {"LINEOUT1_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4120 {"LINEOUT1_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4121 {"LINEOUT2_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4122 {"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4123 {"LINEOUT2_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4124 {"LINEOUT2_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4125 {"LINEOUT3_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4126 {"LINEOUT3_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4127 {"LINEOUT3_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4128 {"LINEOUT3_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4129 {"LINEOUT4_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4130 {"LINEOUT4_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4131 {"LINEOUT4_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4132 {"LINEOUT4_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4133 {"LINEOUT5_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4134 {"LINEOUT5_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4135 {"LINEOUT5_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4136 {"LINEOUT5_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4137 {"EAR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4138 {"EAR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4139 {"EAR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4140 {"EAR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4141 {"AUX_PGA_Left", NULL, "AMIC5"},
4142 {"AUX_PGA_Right", NULL, "AMIC6"},
4143
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004144 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07004145 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
4146 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
4147 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
4148 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
4149 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004150 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07004151 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
4152 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
4153 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
4154 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07004155
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07004156 {"IIR2", NULL, "IIR2 INP1 MUX"},
4157 {"IIR2 INP1 MUX", "DEC1", "DEC1 MUX"},
4158 {"IIR2 INP1 MUX", "DEC2", "DEC2 MUX"},
4159 {"IIR2 INP1 MUX", "DEC3", "DEC3 MUX"},
4160 {"IIR2 INP1 MUX", "DEC4", "DEC4 MUX"},
4161 {"IIR2 INP1 MUX", "DEC5", "DEC5 MUX"},
4162 {"IIR2 INP1 MUX", "DEC6", "DEC6 MUX"},
4163 {"IIR2 INP1 MUX", "DEC7", "DEC7 MUX"},
4164 {"IIR2 INP1 MUX", "DEC8", "DEC8 MUX"},
4165 {"IIR2 INP1 MUX", "DEC9", "DEC9 MUX"},
4166 {"IIR2 INP1 MUX", "DEC10", "DEC10 MUX"},
4167
Bradley Rubin229c6a52011-07-12 16:18:48 -07004168 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
4169 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
4170 {"MIC BIAS1 External", NULL, "LDO_H"},
4171 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
4172 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
4173 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
4174 {"MIC BIAS2 External", NULL, "LDO_H"},
4175 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
4176 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
4177 {"MIC BIAS3 External", NULL, "LDO_H"},
4178 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004179};
4180
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004181static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
4182
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004183 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004184 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
4185
4186 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
4187
4188 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004189 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004190 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
4191
4192 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
4193 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
4194
4195 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
4196 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
4197 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
4198};
4199
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004200
4201static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
4202
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004203 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004204 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
4205
4206 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
4207
4208 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
4209
4210 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
4211 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
4212
4213 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
4214};
4215
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004216static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
4217{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004218 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304219 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004220
4221 if (TABLA_IS_1_X(tabla_core->version)) {
4222 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
4223 if (tabla_1_reg_readable[i] == reg)
4224 return 1;
4225 }
4226 } else {
4227 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
4228 if (tabla_2_reg_readable[i] == reg)
4229 return 1;
4230 }
4231 }
4232
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004233 return tabla_reg_readable[reg];
4234}
Kuirong Wange9c8a222012-03-28 16:24:09 -07004235static bool tabla_is_digital_gain_register(unsigned int reg)
4236{
4237 bool rtn = false;
4238 switch (reg) {
4239 case TABLA_A_CDC_RX1_VOL_CTL_B2_CTL:
4240 case TABLA_A_CDC_RX2_VOL_CTL_B2_CTL:
4241 case TABLA_A_CDC_RX3_VOL_CTL_B2_CTL:
4242 case TABLA_A_CDC_RX4_VOL_CTL_B2_CTL:
4243 case TABLA_A_CDC_RX5_VOL_CTL_B2_CTL:
4244 case TABLA_A_CDC_RX6_VOL_CTL_B2_CTL:
4245 case TABLA_A_CDC_RX7_VOL_CTL_B2_CTL:
4246 case TABLA_A_CDC_TX1_VOL_CTL_GAIN:
4247 case TABLA_A_CDC_TX2_VOL_CTL_GAIN:
4248 case TABLA_A_CDC_TX3_VOL_CTL_GAIN:
4249 case TABLA_A_CDC_TX4_VOL_CTL_GAIN:
4250 case TABLA_A_CDC_TX5_VOL_CTL_GAIN:
4251 case TABLA_A_CDC_TX6_VOL_CTL_GAIN:
4252 case TABLA_A_CDC_TX7_VOL_CTL_GAIN:
4253 case TABLA_A_CDC_TX8_VOL_CTL_GAIN:
4254 case TABLA_A_CDC_TX9_VOL_CTL_GAIN:
4255 case TABLA_A_CDC_TX10_VOL_CTL_GAIN:
4256 rtn = true;
4257 break;
4258 default:
4259 break;
4260 }
4261 return rtn;
4262}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004263static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
4264{
4265 /* Registers lower than 0x100 are top level registers which can be
4266 * written by the Tabla core driver.
4267 */
4268
4269 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
4270 return 1;
4271
Ben Romberger1f045a72011-11-04 10:14:57 -07004272 /* IIR Coeff registers are not cacheable */
4273 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
4274 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
4275 return 1;
4276
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08004277 /* ANC filter registers are not cacheable */
4278 if ((reg >= TABLA_A_CDC_ANC1_FILT1_B1_CTL) &&
4279 (reg <= TABLA_A_CDC_ANC1_FILT2_B3_CTL))
4280 return 1;
4281 if ((reg >= TABLA_A_CDC_ANC2_FILT1_B1_CTL) &&
4282 (reg <= TABLA_A_CDC_ANC2_FILT2_B3_CTL))
4283 return 1;
4284
Kuirong Wange9c8a222012-03-28 16:24:09 -07004285 /* Digital gain register is not cacheable so we have to write
4286 * the setting even it is the same
4287 */
4288 if (tabla_is_digital_gain_register(reg))
4289 return 1;
4290
Joonwoo Parkab2c5872012-05-03 15:16:02 -07004291 /* HPH status registers */
4292 if (reg == TABLA_A_RX_HPH_L_STATUS || reg == TABLA_A_RX_HPH_R_STATUS)
4293 return 1;
4294
Kuirong Wang678e4172012-06-26 15:35:22 -07004295 if (reg == TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS ||
4296 reg == TABLA_A_CDC_COMP2_SHUT_DOWN_STATUS)
4297 return 1;
4298
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004299 return 0;
4300}
4301
4302#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
4303static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
4304 unsigned int value)
4305{
4306 int ret;
Kuirong Wang906ac472012-07-09 12:54:44 -07004307
4308 if (reg == SND_SOC_NOPM)
4309 return 0;
4310
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004311 BUG_ON(reg > TABLA_MAX_REGISTER);
4312
4313 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004314 ret = snd_soc_cache_write(codec, reg, value);
4315 if (ret != 0)
4316 dev_err(codec->dev, "Cache write to %x failed: %d\n",
4317 reg, ret);
4318 }
4319
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304320 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004321}
4322static unsigned int tabla_read(struct snd_soc_codec *codec,
4323 unsigned int reg)
4324{
4325 unsigned int val;
4326 int ret;
4327
Kuirong Wang906ac472012-07-09 12:54:44 -07004328 if (reg == SND_SOC_NOPM)
4329 return 0;
4330
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004331 BUG_ON(reg > TABLA_MAX_REGISTER);
4332
4333 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
4334 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004335 ret = snd_soc_cache_read(codec, reg, &val);
4336 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004337 return val;
4338 } else
4339 dev_err(codec->dev, "Cache read from %x failed: %d\n",
4340 reg, ret);
4341 }
4342
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304343 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004344 return val;
4345}
4346
Joonwoo Parkcf473b42012-03-29 19:48:16 -07004347static s16 tabla_get_current_v_ins(struct tabla_priv *tabla, bool hu)
4348{
4349 s16 v_ins;
4350 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
4351 tabla->mbhc_micbias_switched)
4352 v_ins = hu ? (s16)tabla->mbhc_data.adj_v_ins_hu :
4353 (s16)tabla->mbhc_data.adj_v_ins_h;
4354 else
4355 v_ins = hu ? (s16)tabla->mbhc_data.v_ins_hu :
4356 (s16)tabla->mbhc_data.v_ins_h;
4357 return v_ins;
4358}
4359
4360static s16 tabla_get_current_v_hs_max(struct tabla_priv *tabla)
4361{
4362 s16 v_hs_max;
4363 struct tabla_mbhc_plug_type_cfg *plug_type;
4364
4365 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
4366 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
4367 tabla->mbhc_micbias_switched)
4368 v_hs_max = tabla->mbhc_data.adj_v_hs_max;
4369 else
4370 v_hs_max = plug_type->v_hs_max;
4371 return v_hs_max;
4372}
4373
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07004374static void tabla_codec_calibrate_rel(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004375{
Joonwoo Park0976d012011-12-22 11:48:18 -08004376 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004377
Joonwoo Park0976d012011-12-22 11:48:18 -08004378 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
4379 tabla->mbhc_data.v_b1_hu & 0xFF);
4380 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
4381 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
4382
4383 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
4384 tabla->mbhc_data.v_b1_h & 0xFF);
4385 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
4386 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
4387
4388 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
4389 tabla->mbhc_data.v_brh & 0xFF);
4390 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
4391 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
4392
4393 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
4394 tabla->mbhc_data.v_brl & 0xFF);
4395 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
4396 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07004397}
4398
4399static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
4400{
4401 u8 *n_ready, *n_cic;
4402 struct tabla_mbhc_btn_detect_cfg *btn_det;
4403 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4404 const s16 v_ins_hu = tabla_get_current_v_ins(tabla, true);
4405
4406 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
4407
4408 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
4409 v_ins_hu & 0xFF);
4410 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
4411 (v_ins_hu >> 8) & 0xFF);
4412
4413 tabla_codec_calibrate_rel(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08004414
Joonwoo Parkc0672392012-01-11 11:03:14 -08004415 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08004416 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08004417 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08004418 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
4419 tabla->mbhc_data.npoll);
4420 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
4421 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08004422 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08004423 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
4424 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004425}
4426
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004427static int tabla_startup(struct snd_pcm_substream *substream,
4428 struct snd_soc_dai *dai)
4429{
Kuirong Wanga545e722012-02-06 19:12:54 -08004430 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004431 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
4432 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08004433 if ((tabla_core != NULL) &&
4434 (tabla_core->dev != NULL) &&
4435 (tabla_core->dev->parent != NULL))
4436 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004437
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004438 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004439}
4440
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004441static void tabla_shutdown(struct snd_pcm_substream *substream,
4442 struct snd_soc_dai *dai)
4443{
4444 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
4445 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
4446 u32 active = 0;
4447
4448 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
4449 substream->name, substream->stream);
4450 if (tabla->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
4451 return;
4452
4453 if (dai->id <= NUM_CODEC_DAIS) {
Kuirong Wang906ac472012-07-09 12:54:44 -07004454 if (tabla->dai[dai->id].ch_mask) {
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004455 active = 1;
Joonwoo Park9bbb4d12012-11-09 19:58:11 -08004456 pr_debug("%s(): Codec DAI: chmask[%d] = 0x%lx\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07004457 __func__, dai->id, tabla->dai[dai->id].ch_mask);
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004458 }
4459 }
4460
4461 if ((tabla_core != NULL) &&
4462 (tabla_core->dev != NULL) &&
4463 (tabla_core->dev->parent != NULL) &&
4464 (active == 0)) {
4465 pm_runtime_mark_last_busy(tabla_core->dev->parent);
4466 pm_runtime_put(tabla_core->dev->parent);
4467 }
4468}
4469
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004470int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable, bool dapm)
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004471{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004472 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4473
Joonwoo Parkcf473b42012-03-29 19:48:16 -07004474 pr_debug("%s: mclk_enable = %u, dapm = %d\n", __func__, mclk_enable,
4475 dapm);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004476 if (dapm)
4477 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004478 if (mclk_enable) {
4479 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004480
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004481 if (tabla->mbhc_polling_active) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07004482 tabla_codec_pause_hs_polling(codec);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004483 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004484 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004485 TABLA_BANDGAP_AUDIO_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004486 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004487 tabla_codec_calibrate_hs_polling(codec);
4488 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304489 } else {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004490 tabla_codec_disable_clock_block(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304491 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004492 TABLA_BANDGAP_AUDIO_MODE);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304493 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004494 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004495 } else {
4496
4497 if (!tabla->mclk_enabled) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004498 if (dapm)
4499 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004500 pr_err("Error, MCLK already diabled\n");
4501 return -EINVAL;
4502 }
4503 tabla->mclk_enabled = false;
4504
4505 if (tabla->mbhc_polling_active) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004506 tabla_codec_pause_hs_polling(codec);
4507 tabla_codec_disable_clock_block(codec);
4508 tabla_codec_enable_bandgap(codec,
Simmi Pateriya71d63872012-11-08 01:06:30 +05304509 TABLA_BANDGAP_MBHC_MODE);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004510 tabla_enable_rx_bias(codec, 1);
4511 tabla_codec_enable_clock_block(codec, 1);
4512 tabla_codec_calibrate_hs_polling(codec);
4513 tabla_codec_start_hs_polling(codec);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004514 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
4515 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304516 } else {
4517 tabla_codec_disable_clock_block(codec);
4518 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004519 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004520 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004521 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004522 if (dapm)
4523 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004524 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004525}
4526
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004527static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
4528 int clk_id, unsigned int freq, int dir)
4529{
4530 pr_debug("%s\n", __func__);
4531 return 0;
4532}
4533
4534static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
4535{
Santosh Mardie15e2302011-11-15 10:39:23 +05304536 u8 val = 0;
4537 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
4538
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004539 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05304540 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
4541 case SND_SOC_DAIFMT_CBS_CFS:
4542 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304543 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004544 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05304545 snd_soc_update_bits(dai->codec,
4546 TABLA_A_CDC_CLK_TX_I2S_CTL,
4547 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004548 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05304549 snd_soc_update_bits(dai->codec,
4550 TABLA_A_CDC_CLK_RX_I2S_CTL,
4551 TABLA_I2S_MASTER_MODE_MASK, 0);
4552 }
4553 break;
4554 case SND_SOC_DAIFMT_CBM_CFM:
4555 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304556 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304557 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004558 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05304559 snd_soc_update_bits(dai->codec,
4560 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004561 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05304562 snd_soc_update_bits(dai->codec,
4563 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
4564 }
4565 break;
4566 default:
4567 return -EINVAL;
4568 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004569 return 0;
4570}
4571
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004572static int tabla_set_channel_map(struct snd_soc_dai *dai,
4573 unsigned int tx_num, unsigned int *tx_slot,
4574 unsigned int rx_num, unsigned int *rx_slot)
4575
4576{
4577 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Kuirong Wang906ac472012-07-09 12:54:44 -07004578 struct wcd9xxx *core = dev_get_drvdata(dai->codec->dev->parent);
4579
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004580 if (!tx_slot && !rx_slot) {
4581 pr_err("%s: Invalid\n", __func__);
4582 return -EINVAL;
4583 }
Kuirong Wang906ac472012-07-09 12:54:44 -07004584 pr_debug("%s(): dai_name = %s DAI-ID %x tx_ch %d rx_ch %d\n"
4585 "tabla->intf_type %d\n",
4586 __func__, dai->name, dai->id, tx_num, rx_num,
4587 tabla->intf_type);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004588
Kuirong Wang906ac472012-07-09 12:54:44 -07004589 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
4590 wcd9xxx_init_slimslave(core, core->slim->laddr,
4591 tx_num, tx_slot, rx_num, rx_slot);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004592 return 0;
4593}
4594
4595static int tabla_get_channel_map(struct snd_soc_dai *dai,
4596 unsigned int *tx_num, unsigned int *tx_slot,
4597 unsigned int *rx_num, unsigned int *rx_slot)
4598
4599{
Kuirong Wang906ac472012-07-09 12:54:44 -07004600 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(dai->codec);
4601 u32 i = 0;
4602 struct wcd9xxx_ch *ch;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004603
Kuirong Wang906ac472012-07-09 12:54:44 -07004604 switch (dai->id) {
4605 case AIF1_PB:
4606 case AIF2_PB:
4607 case AIF3_PB:
4608 if (!rx_slot || !rx_num) {
4609 pr_err("%s: Invalid rx_slot %d or rx_num %d\n",
4610 __func__, (u32) rx_slot, (u32) rx_num);
4611 return -EINVAL;
4612 }
4613 list_for_each_entry(ch, &tabla_p->dai[dai->id].wcd9xxx_ch_list,
4614 list) {
4615 rx_slot[i++] = ch->ch_num;
4616 }
4617 *rx_num = i;
4618 break;
4619 case AIF1_CAP:
4620 case AIF2_CAP:
4621 case AIF3_CAP:
4622 if (!tx_slot || !tx_num) {
4623 pr_err("%s: Invalid tx_slot %d or tx_num %d\n",
4624 __func__, (u32) tx_slot, (u32) tx_num);
4625 return -EINVAL;
4626 }
4627 list_for_each_entry(ch, &tabla_p->dai[dai->id].wcd9xxx_ch_list,
4628 list) {
4629 tx_slot[i++] = ch->ch_num;
4630 }
4631 *tx_num = i;
4632 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004633
Kuirong Wang906ac472012-07-09 12:54:44 -07004634 default:
4635 pr_err("%s: Invalid DAI ID %x\n", __func__, dai->id);
4636 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004637 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004638 return 0;
4639}
4640
Kiran Kandi93923902012-06-20 17:00:25 -07004641
Kiran Kandi93923902012-06-20 17:00:25 -07004642static int tabla_set_interpolator_rate(struct snd_soc_dai *dai,
Kuirong Wang906ac472012-07-09 12:54:44 -07004643 u8 rx_fs_rate_reg_val,
4644 u32 compander_fs,
4645 u32 sample_rate)
Kiran Kandi93923902012-06-20 17:00:25 -07004646{
Kuirong Wang906ac472012-07-09 12:54:44 -07004647 u32 j;
Kiran Kandi93923902012-06-20 17:00:25 -07004648 u8 rx_mix1_inp;
4649 u16 rx_mix_1_reg_1, rx_mix_1_reg_2;
4650 u16 rx_fs_reg;
4651 u8 rx_mix_1_reg_1_val, rx_mix_1_reg_2_val;
4652 struct snd_soc_codec *codec = dai->codec;
Kuirong Wang906ac472012-07-09 12:54:44 -07004653 struct wcd9xxx_ch *ch;
Kiran Kandi93923902012-06-20 17:00:25 -07004654 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Kiran Kandi93923902012-06-20 17:00:25 -07004655
Kuirong Wang906ac472012-07-09 12:54:44 -07004656 list_for_each_entry(ch, &tabla->dai[dai->id].wcd9xxx_ch_list, list) {
Kiran Kandi93923902012-06-20 17:00:25 -07004657
Kuirong Wang906ac472012-07-09 12:54:44 -07004658 rx_mix1_inp = ch->port - RX_MIX1_INP_SEL_RX1;
Kiran Kandi93923902012-06-20 17:00:25 -07004659
Kuirong Wang906ac472012-07-09 12:54:44 -07004660 if ((rx_mix1_inp < RX_MIX1_INP_SEL_RX1) ||
4661 (rx_mix1_inp > RX_MIX1_INP_SEL_RX7)) {
4662 pr_err("%s: Invalid TABLA_RX%u port. Dai ID is %d\n",
4663 __func__, rx_mix1_inp - 5 , dai->id);
Kiran Kandi93923902012-06-20 17:00:25 -07004664 return -EINVAL;
4665 }
4666
4667 rx_mix_1_reg_1 = TABLA_A_CDC_CONN_RX1_B1_CTL;
4668
4669 for (j = 0; j < NUM_INTERPOLATORS; j++) {
Kiran Kandi93923902012-06-20 17:00:25 -07004670 rx_mix_1_reg_2 = rx_mix_1_reg_1 + 1;
4671
4672 rx_mix_1_reg_1_val = snd_soc_read(codec,
Kuirong Wang906ac472012-07-09 12:54:44 -07004673 rx_mix_1_reg_1);
Kiran Kandi93923902012-06-20 17:00:25 -07004674 rx_mix_1_reg_2_val = snd_soc_read(codec,
Kuirong Wang906ac472012-07-09 12:54:44 -07004675 rx_mix_1_reg_2);
Kiran Kandi93923902012-06-20 17:00:25 -07004676
4677 if (((rx_mix_1_reg_1_val & 0x0F) == rx_mix1_inp) ||
Kuirong Wang906ac472012-07-09 12:54:44 -07004678 (((rx_mix_1_reg_1_val >> 4) & 0x0F) == rx_mix1_inp) ||
4679 ((rx_mix_1_reg_2_val & 0x0F) == rx_mix1_inp)) {
Kiran Kandi93923902012-06-20 17:00:25 -07004680
4681 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL + 8 * j;
4682
Kuirong Wang906ac472012-07-09 12:54:44 -07004683 pr_debug("%s: AIF_PB DAI(%d) connected to RX%u\n",
4684 __func__, dai->id, j + 1);
Kiran Kandi93923902012-06-20 17:00:25 -07004685
4686 pr_debug("%s: set RX%u sample rate to %u\n",
4687 __func__, j + 1, sample_rate);
4688
4689 snd_soc_update_bits(codec, rx_fs_reg,
Kuirong Wang906ac472012-07-09 12:54:44 -07004690 0xE0, rx_fs_rate_reg_val);
Kiran Kandi93923902012-06-20 17:00:25 -07004691
4692 if (comp_rx_path[j] < COMPANDER_MAX)
4693 tabla->comp_fs[comp_rx_path[j]]
4694 = compander_fs;
4695 }
4696 if (j <= 2)
4697 rx_mix_1_reg_1 += 3;
4698 else
4699 rx_mix_1_reg_1 += 2;
4700 }
4701 }
4702 return 0;
4703}
4704
4705static int tabla_set_decimator_rate(struct snd_soc_dai *dai,
Kuirong Wang906ac472012-07-09 12:54:44 -07004706 u8 tx_fs_rate_reg_val,
4707 u32 sample_rate)
Kiran Kandi93923902012-06-20 17:00:25 -07004708{
4709 struct snd_soc_codec *codec = dai->codec;
Kuirong Wang906ac472012-07-09 12:54:44 -07004710 struct wcd9xxx_ch *ch;
4711 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4712 u32 tx_port;
Kiran Kandi93923902012-06-20 17:00:25 -07004713 u16 tx_port_reg, tx_fs_reg;
4714 u8 tx_port_reg_val;
4715 s8 decimator;
4716
Kuirong Wang906ac472012-07-09 12:54:44 -07004717 list_for_each_entry(ch, &tabla->dai[dai->id].wcd9xxx_ch_list, list) {
Kiran Kandi93923902012-06-20 17:00:25 -07004718
Kuirong Wang906ac472012-07-09 12:54:44 -07004719 tx_port = ch->port + 1;
4720 pr_debug("%s: dai->id = %d, tx_port = %d",
4721 __func__, dai->id, tx_port);
Kiran Kandi93923902012-06-20 17:00:25 -07004722
4723 if ((tx_port < 1) || (tx_port > NUM_DECIMATORS)) {
Kuirong Wang906ac472012-07-09 12:54:44 -07004724 pr_err("%s: Invalid SLIM TX%u port. DAI ID is %d\n",
4725 __func__, tx_port, dai->id);
Kiran Kandi93923902012-06-20 17:00:25 -07004726 return -EINVAL;
4727 }
4728
4729 tx_port_reg = TABLA_A_CDC_CONN_TX_SB_B1_CTL + (tx_port - 1);
4730 tx_port_reg_val = snd_soc_read(codec, tx_port_reg);
4731
4732 decimator = 0;
4733
4734 if ((tx_port >= 1) && (tx_port <= 6)) {
4735
4736 tx_port_reg_val = tx_port_reg_val & 0x0F;
4737 if (tx_port_reg_val == 0x8)
4738 decimator = tx_port;
4739
4740 } else if ((tx_port >= 7) && (tx_port <= NUM_DECIMATORS)) {
4741
4742 tx_port_reg_val = tx_port_reg_val & 0x1F;
4743
4744 if ((tx_port_reg_val >= 0x8) &&
4745 (tx_port_reg_val <= 0x11)) {
4746
4747 decimator = (tx_port_reg_val - 0x8) + 1;
4748 }
4749 }
4750
4751 if (decimator) { /* SLIM_TX port has a DEC as input */
4752
4753 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL +
Kuirong Wang906ac472012-07-09 12:54:44 -07004754 8 * (decimator - 1);
Kiran Kandi93923902012-06-20 17:00:25 -07004755
4756 pr_debug("%s: set DEC%u (-> SLIM_TX%u) rate to %u\n",
4757 __func__, decimator, tx_port, sample_rate);
4758
4759 snd_soc_update_bits(codec, tx_fs_reg, 0x07,
Kuirong Wang906ac472012-07-09 12:54:44 -07004760 tx_fs_rate_reg_val);
Kiran Kandi93923902012-06-20 17:00:25 -07004761
4762 } else {
4763 if ((tx_port_reg_val >= 0x1) &&
Kuirong Wang906ac472012-07-09 12:54:44 -07004764 (tx_port_reg_val <= 0x7)) {
Kiran Kandi93923902012-06-20 17:00:25 -07004765
4766 pr_debug("%s: RMIX%u going to SLIM TX%u\n",
4767 __func__, tx_port_reg_val, tx_port);
4768
4769 } else if ((tx_port_reg_val >= 0x8) &&
Kuirong Wang906ac472012-07-09 12:54:44 -07004770 (tx_port_reg_val <= 0x11)) {
Kiran Kandi93923902012-06-20 17:00:25 -07004771
4772 pr_err("%s: ERROR: Should not be here\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07004773 __func__);
4774 pr_err("%s: ERROR: DEC connected to SLIM TX%u\n",
4775 __func__, tx_port);
Kiran Kandi93923902012-06-20 17:00:25 -07004776 return -EINVAL;
4777
4778 } else if (tx_port_reg_val == 0) {
4779 pr_debug("%s: no signal to SLIM TX%u\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07004780 __func__, tx_port);
Kiran Kandi93923902012-06-20 17:00:25 -07004781 } else {
Kuirong Wang906ac472012-07-09 12:54:44 -07004782 pr_err("%s: ERROR: wrong signal to SLIM TX%u\n",
4783 __func__, tx_port);
4784 pr_err("%s: ERROR: wrong signal = %u\n",
4785 __func__, tx_port_reg_val);
Kiran Kandi93923902012-06-20 17:00:25 -07004786 return -EINVAL;
4787 }
4788 }
4789 }
4790 return 0;
4791}
4792
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004793static int tabla_hw_params(struct snd_pcm_substream *substream,
Kuirong Wang906ac472012-07-09 12:54:44 -07004794 struct snd_pcm_hw_params *params,
4795 struct snd_soc_dai *dai)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004796{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004797 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05304798 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Kiran Kandi93923902012-06-20 17:00:25 -07004799 u8 tx_fs_rate_reg_val, rx_fs_rate_reg_val;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004800 u32 compander_fs;
Kiran Kandi93923902012-06-20 17:00:25 -07004801 int ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004802
Kiran Kandia9fffe92012-05-20 23:42:30 -07004803 pr_debug("%s: dai_name = %s DAI-ID %x rate %d num_ch %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004804 dai->name, dai->id, params_rate(params),
4805 params_channels(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004806
4807 switch (params_rate(params)) {
4808 case 8000:
Kiran Kandi93923902012-06-20 17:00:25 -07004809 tx_fs_rate_reg_val = 0x00;
4810 rx_fs_rate_reg_val = 0x00;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004811 compander_fs = COMPANDER_FS_8KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004812 break;
4813 case 16000:
Kiran Kandi93923902012-06-20 17:00:25 -07004814 tx_fs_rate_reg_val = 0x01;
4815 rx_fs_rate_reg_val = 0x20;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004816 compander_fs = COMPANDER_FS_16KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004817 break;
4818 case 32000:
Kiran Kandi93923902012-06-20 17:00:25 -07004819 tx_fs_rate_reg_val = 0x02;
4820 rx_fs_rate_reg_val = 0x40;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004821 compander_fs = COMPANDER_FS_32KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004822 break;
4823 case 48000:
Kiran Kandi93923902012-06-20 17:00:25 -07004824 tx_fs_rate_reg_val = 0x03;
4825 rx_fs_rate_reg_val = 0x60;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004826 compander_fs = COMPANDER_FS_48KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004827 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004828 case 96000:
Kiran Kandi93923902012-06-20 17:00:25 -07004829 tx_fs_rate_reg_val = 0x04;
4830 rx_fs_rate_reg_val = 0x80;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004831 compander_fs = COMPANDER_FS_96KHZ;
4832 break;
4833 case 192000:
Kiran Kandi93923902012-06-20 17:00:25 -07004834 tx_fs_rate_reg_val = 0x05;
4835 rx_fs_rate_reg_val = 0xA0;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004836 compander_fs = COMPANDER_FS_192KHZ;
4837 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004838 default:
4839 pr_err("%s: Invalid sampling rate %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004840 params_rate(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004841 return -EINVAL;
4842 }
4843
Kiran Kandi93923902012-06-20 17:00:25 -07004844 switch (substream->stream) {
4845 case SNDRV_PCM_STREAM_CAPTURE:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004846
Kiran Kandi93923902012-06-20 17:00:25 -07004847 ret = tabla_set_decimator_rate(dai, tx_fs_rate_reg_val,
Kuirong Wang906ac472012-07-09 12:54:44 -07004848 params_rate(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004849 if (ret < 0) {
4850 pr_err("%s: set decimator rate failed %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004851 ret);
Kiran Kandi93923902012-06-20 17:00:25 -07004852 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004853 }
Kiran Kandi93923902012-06-20 17:00:25 -07004854
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304855 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304856 switch (params_format(params)) {
4857 case SNDRV_PCM_FORMAT_S16_LE:
4858 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004859 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304860 break;
4861 case SNDRV_PCM_FORMAT_S32_LE:
4862 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004863 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304864 break;
4865 default:
Kuirong Wang906ac472012-07-09 12:54:44 -07004866 pr_err("%s: Invalid format %d\n", __func__,
4867 params_format(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004868 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304869 }
4870 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
Kuirong Wang906ac472012-07-09 12:54:44 -07004871 0x07, tx_fs_rate_reg_val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004872 } else {
Kuirong Wang906ac472012-07-09 12:54:44 -07004873 switch (params_format(params)) {
4874 case SNDRV_PCM_FORMAT_S16_LE:
4875 tabla->dai[dai->id].bit_width = 16;
4876 break;
4877 default:
4878 pr_err("%s: Invalid TX format %d\n", __func__,
4879 params_format(params));
4880 return -EINVAL;
4881 }
4882 tabla->dai[dai->id].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304883 }
Kiran Kandi93923902012-06-20 17:00:25 -07004884 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004885
Kiran Kandi93923902012-06-20 17:00:25 -07004886 case SNDRV_PCM_STREAM_PLAYBACK:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004887
Kiran Kandi93923902012-06-20 17:00:25 -07004888 ret = tabla_set_interpolator_rate(dai, rx_fs_rate_reg_val,
Kuirong Wang906ac472012-07-09 12:54:44 -07004889 compander_fs,
4890 params_rate(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004891 if (ret < 0) {
4892 pr_err("%s: set decimator rate failed %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004893 ret);
Kiran Kandi93923902012-06-20 17:00:25 -07004894 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004895 }
Kiran Kandi93923902012-06-20 17:00:25 -07004896
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304897 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304898 switch (params_format(params)) {
4899 case SNDRV_PCM_FORMAT_S16_LE:
4900 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004901 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304902 break;
4903 case SNDRV_PCM_FORMAT_S32_LE:
4904 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004905 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304906 break;
4907 default:
Kuirong Wang906ac472012-07-09 12:54:44 -07004908 pr_err("%s: Invalid RX format %d\n", __func__,
4909 params_format(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004910 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304911 }
4912 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
Kiran Kandi93923902012-06-20 17:00:25 -07004913 0x03, (rx_fs_rate_reg_val >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004914 } else {
Kuirong Wang906ac472012-07-09 12:54:44 -07004915 switch (params_format(params)) {
4916 case SNDRV_PCM_FORMAT_S16_LE:
4917 tabla->dai[dai->id].bit_width = 16;
4918 break;
4919 default:
4920 pr_err("%s: Invalid format %d\n", __func__,
4921 params_format(params));
4922 return -EINVAL;
4923 }
4924 tabla->dai[dai->id].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304925 }
Kiran Kandi93923902012-06-20 17:00:25 -07004926 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004927
Kiran Kandi93923902012-06-20 17:00:25 -07004928 default:
4929 pr_err("%s: Invalid stream type %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004930 substream->stream);
Kiran Kandi93923902012-06-20 17:00:25 -07004931 return -EINVAL;
4932 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004933 return 0;
4934}
4935
4936static struct snd_soc_dai_ops tabla_dai_ops = {
4937 .startup = tabla_startup,
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004938 .shutdown = tabla_shutdown,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004939 .hw_params = tabla_hw_params,
4940 .set_sysclk = tabla_set_dai_sysclk,
4941 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004942 .set_channel_map = tabla_set_channel_map,
4943 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004944};
4945
4946static struct snd_soc_dai_driver tabla_dai[] = {
4947 {
4948 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004949 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004950 .playback = {
4951 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004952 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004953 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004954 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004955 .rate_min = 8000,
4956 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004957 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004958 },
4959 .ops = &tabla_dai_ops,
4960 },
4961 {
4962 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004963 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004964 .capture = {
4965 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004966 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004967 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004968 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004969 .rate_min = 8000,
4970 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004971 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004972 },
4973 .ops = &tabla_dai_ops,
4974 },
Neema Shettyd3a89262012-02-16 10:23:50 -08004975 {
4976 .name = "tabla_rx2",
4977 .id = AIF2_PB,
4978 .playback = {
4979 .stream_name = "AIF2 Playback",
4980 .rates = WCD9310_RATES,
4981 .formats = TABLA_FORMATS,
4982 .rate_min = 8000,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004983 .rate_max = 192000,
Neema Shettyd3a89262012-02-16 10:23:50 -08004984 .channels_min = 1,
4985 .channels_max = 2,
4986 },
4987 .ops = &tabla_dai_ops,
4988 },
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004989 {
4990 .name = "tabla_tx2",
4991 .id = AIF2_CAP,
4992 .capture = {
4993 .stream_name = "AIF2 Capture",
4994 .rates = WCD9310_RATES,
4995 .formats = TABLA_FORMATS,
4996 .rate_max = 192000,
4997 .rate_min = 8000,
4998 .channels_min = 1,
4999 .channels_max = 4,
5000 },
5001 .ops = &tabla_dai_ops,
5002 },
Neema Shetty3fb1b802012-04-27 13:53:24 -07005003 {
5004 .name = "tabla_tx3",
5005 .id = AIF3_CAP,
5006 .capture = {
5007 .stream_name = "AIF3 Capture",
5008 .rates = WCD9310_RATES,
5009 .formats = TABLA_FORMATS,
5010 .rate_max = 48000,
5011 .rate_min = 8000,
5012 .channels_min = 1,
5013 .channels_max = 2,
5014 },
5015 .ops = &tabla_dai_ops,
5016 },
Kiran Kandia9fffe92012-05-20 23:42:30 -07005017 {
5018 .name = "tabla_rx3",
5019 .id = AIF3_PB,
5020 .playback = {
5021 .stream_name = "AIF3 Playback",
5022 .rates = WCD9310_RATES,
5023 .formats = TABLA_FORMATS,
5024 .rate_min = 8000,
5025 .rate_max = 192000,
5026 .channels_min = 1,
5027 .channels_max = 2,
5028 },
5029 .ops = &tabla_dai_ops,
5030 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005031};
Santosh Mardie15e2302011-11-15 10:39:23 +05305032
5033static struct snd_soc_dai_driver tabla_i2s_dai[] = {
5034 {
5035 .name = "tabla_i2s_rx1",
Kuirong Wang906ac472012-07-09 12:54:44 -07005036 .id = AIF1_PB,
Santosh Mardie15e2302011-11-15 10:39:23 +05305037 .playback = {
5038 .stream_name = "AIF1 Playback",
5039 .rates = WCD9310_RATES,
5040 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07005041 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05305042 .rate_min = 8000,
5043 .channels_min = 1,
5044 .channels_max = 4,
5045 },
5046 .ops = &tabla_dai_ops,
5047 },
5048 {
5049 .name = "tabla_i2s_tx1",
Kuirong Wang906ac472012-07-09 12:54:44 -07005050 .id = AIF1_CAP,
Santosh Mardie15e2302011-11-15 10:39:23 +05305051 .capture = {
5052 .stream_name = "AIF1 Capture",
5053 .rates = WCD9310_RATES,
5054 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07005055 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05305056 .rate_min = 8000,
5057 .channels_min = 1,
5058 .channels_max = 4,
5059 },
5060 .ops = &tabla_dai_ops,
5061 },
5062};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005063
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07005064static int tabla_codec_enable_chmask(struct tabla_priv *tabla_p,
Kuirong Wang906ac472012-07-09 12:54:44 -07005065 int event, int index)
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07005066{
5067 int ret = 0;
Kuirong Wang906ac472012-07-09 12:54:44 -07005068 struct wcd9xxx_ch *ch;
5069
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07005070 switch (event) {
5071 case SND_SOC_DAPM_POST_PMU:
Kuirong Wang906ac472012-07-09 12:54:44 -07005072 list_for_each_entry(ch,
5073 &tabla_p->dai[index].wcd9xxx_ch_list, list) {
5074 ret = wcd9xxx_get_slave_port(ch->ch_num);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07005075 if (ret < 0) {
5076 pr_err("%s: Invalid slave port ID: %d\n",
5077 __func__, ret);
5078 ret = -EINVAL;
5079 break;
5080 }
5081 tabla_p->dai[index].ch_mask |= 1 << ret;
5082 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07005083 break;
5084 case SND_SOC_DAPM_POST_PMD:
5085 ret = wait_event_timeout(tabla_p->dai[index].dai_wait,
5086 (tabla_p->dai[index].ch_mask == 0),
5087 msecs_to_jiffies(SLIM_CLOSE_TIMEOUT));
5088 if (!ret) {
5089 pr_err("%s: Slim close tx/rx wait timeout\n",
5090 __func__);
5091 ret = -EINVAL;
Kuirong Wang906ac472012-07-09 12:54:44 -07005092 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07005093 break;
5094 }
5095 return ret;
5096}
5097
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005098static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
Kuirong Wang906ac472012-07-09 12:54:44 -07005099 struct snd_kcontrol *kcontrol,
5100 int event)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005101{
Kuirong Wang906ac472012-07-09 12:54:44 -07005102 struct wcd9xxx *core;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005103 struct snd_soc_codec *codec = w->codec;
5104 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
Kuirong Wang906ac472012-07-09 12:54:44 -07005105 u32 ret = 0;
5106 struct wcd9xxx_codec_dai_data *dai;
5107
5108 core = dev_get_drvdata(codec->dev->parent);
5109
5110 pr_debug("%s: event called! codec name %s num_dai %d\n"
5111 "stream name %s event %d\n",
5112 __func__, w->codec->name, w->codec->num_dai,
5113 w->sname, event);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005114
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005115 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005116 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
Kuirong Wang906ac472012-07-09 12:54:44 -07005117 if (event == SND_SOC_DAPM_POST_PMD && (core != NULL) &&
5118 (core->dev != NULL) &&
5119 (core->dev->parent != NULL)) {
5120 pm_runtime_mark_last_busy(core->dev->parent);
5121 pm_runtime_put(core->dev->parent);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005122 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005123 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005124 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005125 pr_debug("%s: w->name %s w->shift %d event %d\n",
5126 __func__, w->name, w->shift, event);
5127 dai = &tabla_p->dai[w->shift];
Kiran Kandia9fffe92012-05-20 23:42:30 -07005128
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005129 switch (event) {
5130 case SND_SOC_DAPM_POST_PMU:
Kuirong Wang906ac472012-07-09 12:54:44 -07005131 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMU,
5132 w->shift);
5133 ret = wcd9xxx_cfg_slim_sch_rx(core, &dai->wcd9xxx_ch_list,
5134 dai->rate, dai->bit_width,
5135 &dai->grph);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005136 break;
5137 case SND_SOC_DAPM_POST_PMD:
Kuirong Wang906ac472012-07-09 12:54:44 -07005138 ret = wcd9xxx_close_slim_sch_rx(core,
5139 &dai->wcd9xxx_ch_list,
5140 dai->grph);
5141 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMD,
5142 w->shift);
5143 if (ret < 0) {
5144 ret = wcd9xxx_disconnect_port(core,
5145 &dai->wcd9xxx_ch_list,
5146 dai->grph);
5147 pr_info("%s: Disconnect RX port, ret = %d\n",
5148 __func__, ret);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005149 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005150 if ((core != NULL) &&
5151 (core->dev != NULL) &&
5152 (core->dev->parent != NULL)) {
5153 pm_runtime_mark_last_busy(core->dev->parent);
5154 pm_runtime_put(core->dev->parent);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005155 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005156 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005157 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005158
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005159 return ret;
5160}
5161
5162static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
Kuirong Wang906ac472012-07-09 12:54:44 -07005163 struct snd_kcontrol *kcontrol,
5164 int event)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005165{
Kuirong Wang906ac472012-07-09 12:54:44 -07005166 struct wcd9xxx *core;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005167 struct snd_soc_codec *codec = w->codec;
5168 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
Kuirong Wang906ac472012-07-09 12:54:44 -07005169 u32 ret = 0;
5170 struct wcd9xxx_codec_dai_data *dai;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005171
Kuirong Wang906ac472012-07-09 12:54:44 -07005172 core = dev_get_drvdata(codec->dev->parent);
5173
5174 pr_debug("%s: event called! codec name %s num_dai %d\n"
5175 "stream name %s\n", __func__, w->codec->name,
5176 w->codec->num_dai, w->sname);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005177
5178 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005179 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
Kuirong Wang906ac472012-07-09 12:54:44 -07005180 if (event == SND_SOC_DAPM_POST_PMD && (core != NULL) &&
5181 (core->dev != NULL) &&
5182 (core->dev->parent != NULL)) {
5183 pm_runtime_mark_last_busy(core->dev->parent);
5184 pm_runtime_put(core->dev->parent);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005185 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005186 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005187 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07005188
5189 pr_debug("%s(): %s %d\n", __func__, w->name, event);
5190
Kuirong Wang906ac472012-07-09 12:54:44 -07005191 dai = &tabla_p->dai[w->shift];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005192 switch (event) {
5193 case SND_SOC_DAPM_POST_PMU:
Kuirong Wang906ac472012-07-09 12:54:44 -07005194 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMU,
5195 w->shift);
5196 ret = wcd9xxx_cfg_slim_sch_tx(core, &dai->wcd9xxx_ch_list,
5197 dai->rate,
5198 dai->bit_width,
5199 &dai->grph);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005200 break;
5201 case SND_SOC_DAPM_POST_PMD:
Kuirong Wang906ac472012-07-09 12:54:44 -07005202 ret = wcd9xxx_close_slim_sch_tx(core, &dai->wcd9xxx_ch_list,
5203 dai->grph);
5204 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMD,
5205 w->shift);
5206 if (ret < 0) {
5207 ret = wcd9xxx_disconnect_port(core,
5208 &dai->wcd9xxx_ch_list,
5209 dai->grph);
5210 pr_info("%s: Disconnect TX port, ret = %d\n",
5211 __func__, ret);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005212 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005213 if ((core != NULL) &&
5214 (core->dev != NULL) &&
5215 (core->dev->parent != NULL)) {
5216 pm_runtime_mark_last_busy(core->dev->parent);
5217 pm_runtime_put(core->dev->parent);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005218 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005219 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005220 }
5221 return ret;
5222}
5223
5224/* Todo: Have seperate dapm widgets for I2S and Slimbus.
5225 * Might Need to have callbacks registered only for slimbus
5226 */
5227static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
5228 /*RX stuff */
5229 SND_SOC_DAPM_OUTPUT("EAR"),
5230
Damir Didjusto7c85d712012-08-16 21:22:29 -07005231 SND_SOC_DAPM_PGA_E("EAR PA", SND_SOC_NOPM, 0, 0, NULL,
5232 0, tabla_ear_pa_event, SND_SOC_DAPM_PRE_PMU |
5233 SND_SOC_DAPM_PRE_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005234
Damir Didjusto7c85d712012-08-16 21:22:29 -07005235 SND_SOC_DAPM_MIXER("DAC1", SND_SOC_NOPM, 0, 0, dac1_switch,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005236 ARRAY_SIZE(dac1_switch)),
5237
Kuirong Wang906ac472012-07-09 12:54:44 -07005238 SND_SOC_DAPM_AIF_IN_E("AIF1 PB", "AIF1 Playback", 0, SND_SOC_NOPM,
5239 AIF1_PB, 0, tabla_codec_enable_slimrx,
5240 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5241 SND_SOC_DAPM_AIF_IN_E("AIF2 PB", "AIF2 Playback", 0, SND_SOC_NOPM,
5242 AIF2_PB, 0, tabla_codec_enable_slimrx,
5243 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5244 SND_SOC_DAPM_AIF_IN_E("AIF3 PB", "AIF3 Playback", 0, SND_SOC_NOPM,
5245 AIF3_PB, 0, tabla_codec_enable_slimrx,
5246 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5247
5248 SND_SOC_DAPM_MUX("SLIM RX1 MUX", SND_SOC_NOPM, TABLA_RX1, 0,
5249 &slim_rx_mux[TABLA_RX1]),
5250 SND_SOC_DAPM_MUX("SLIM RX2 MUX", SND_SOC_NOPM, TABLA_RX2, 0,
5251 &slim_rx_mux[TABLA_RX2]),
5252 SND_SOC_DAPM_MUX("SLIM RX3 MUX", SND_SOC_NOPM, TABLA_RX3, 0,
5253 &slim_rx_mux[TABLA_RX3]),
5254 SND_SOC_DAPM_MUX("SLIM RX4 MUX", SND_SOC_NOPM, TABLA_RX4, 0,
5255 &slim_rx_mux[TABLA_RX4]),
5256 SND_SOC_DAPM_MUX("SLIM RX5 MUX", SND_SOC_NOPM, TABLA_RX5, 0,
5257 &slim_rx_mux[TABLA_RX5]),
5258 SND_SOC_DAPM_MUX("SLIM RX6 MUX", SND_SOC_NOPM, TABLA_RX6, 0,
5259 &slim_rx_mux[TABLA_RX6]),
5260 SND_SOC_DAPM_MUX("SLIM RX7 MUX", SND_SOC_NOPM, TABLA_RX7, 0,
5261 &slim_rx_mux[TABLA_RX7]),
5262
5263 SND_SOC_DAPM_MIXER("SLIM RX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5264 SND_SOC_DAPM_MIXER("SLIM RX2", SND_SOC_NOPM, 0, 0, NULL, 0),
5265 SND_SOC_DAPM_MIXER("SLIM RX3", SND_SOC_NOPM, 0, 0, NULL, 0),
5266 SND_SOC_DAPM_MIXER("SLIM RX4", SND_SOC_NOPM, 0, 0, NULL, 0),
5267 SND_SOC_DAPM_MIXER("SLIM RX5", SND_SOC_NOPM, 0, 0, NULL, 0),
5268 SND_SOC_DAPM_MIXER("SLIM RX6", SND_SOC_NOPM, 0, 0, NULL, 0),
5269 SND_SOC_DAPM_MIXER("SLIM RX7", SND_SOC_NOPM, 0, 0, NULL, 0),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005270 /* Headphone */
5271 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
5272 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
5273 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
5274 SND_SOC_DAPM_POST_PMD),
5275 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
5276 hphl_switch, ARRAY_SIZE(hphl_switch)),
5277
5278 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
5279 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
5280 SND_SOC_DAPM_POST_PMD),
5281
5282 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
5283 tabla_hphr_dac_event,
5284 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5285
5286 /* Speaker */
5287 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
5288 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
5289 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
5290 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
5291 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
5292
5293 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
5294 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5295 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5296 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
5297 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5298 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5299 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
5300 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5301 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5302 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
5303 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5304 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5305 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
5306 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5307 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5308
5309 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
5310 , tabla_lineout_dac_event,
5311 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5312 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
5313 , tabla_lineout_dac_event,
5314 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5315 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
5316 , tabla_lineout_dac_event,
5317 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5318 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
5319 &lineout3_ground_switch),
5320 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
5321 , tabla_lineout_dac_event,
5322 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5323 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
5324 &lineout4_ground_switch),
5325 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
5326 , tabla_lineout_dac_event,
5327 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5328
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005329 SND_SOC_DAPM_MIXER_E("RX1 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005330 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5331 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005332 SND_SOC_DAPM_MIXER_E("RX2 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005333 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5334 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005335 SND_SOC_DAPM_MIXER_E("RX3 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005336 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5337 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005338 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005339 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5340 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005341 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005342 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5343 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005344 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005345 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5346 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005347 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005348 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5349 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005350
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005351 SND_SOC_DAPM_MIXER("RX1 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5352 SND_SOC_DAPM_MIXER("RX2 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5353 SND_SOC_DAPM_MIXER("RX3 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5354
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005355 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
5356 &rx4_dsm_mux, tabla_codec_reset_interpolator,
5357 SND_SOC_DAPM_PRE_PMU),
5358
5359 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
5360 &rx6_dsm_mux, tabla_codec_reset_interpolator,
5361 SND_SOC_DAPM_PRE_PMU),
5362
5363 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
5364 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
5365
5366 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5367 &rx_mix1_inp1_mux),
5368 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5369 &rx_mix1_inp2_mux),
Kiran Kandia9fffe92012-05-20 23:42:30 -07005370 SND_SOC_DAPM_MUX("RX1 MIX1 INP3", SND_SOC_NOPM, 0, 0,
5371 &rx_mix1_inp3_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005372 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5373 &rx2_mix1_inp1_mux),
5374 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5375 &rx2_mix1_inp2_mux),
5376 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5377 &rx3_mix1_inp1_mux),
5378 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5379 &rx3_mix1_inp2_mux),
5380 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5381 &rx4_mix1_inp1_mux),
5382 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5383 &rx4_mix1_inp2_mux),
5384 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5385 &rx5_mix1_inp1_mux),
5386 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5387 &rx5_mix1_inp2_mux),
5388 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5389 &rx6_mix1_inp1_mux),
5390 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5391 &rx6_mix1_inp2_mux),
5392 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5393 &rx7_mix1_inp1_mux),
5394 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5395 &rx7_mix1_inp2_mux),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005396 SND_SOC_DAPM_MUX("RX1 MIX2 INP1", SND_SOC_NOPM, 0, 0,
5397 &rx1_mix2_inp1_mux),
5398 SND_SOC_DAPM_MUX("RX1 MIX2 INP2", SND_SOC_NOPM, 0, 0,
5399 &rx1_mix2_inp2_mux),
5400 SND_SOC_DAPM_MUX("RX2 MIX2 INP1", SND_SOC_NOPM, 0, 0,
5401 &rx2_mix2_inp1_mux),
5402 SND_SOC_DAPM_MUX("RX2 MIX2 INP2", SND_SOC_NOPM, 0, 0,
5403 &rx2_mix2_inp2_mux),
5404 SND_SOC_DAPM_MUX("RX3 MIX2 INP1", SND_SOC_NOPM, 0, 0,
5405 &rx3_mix2_inp1_mux),
5406 SND_SOC_DAPM_MUX("RX3 MIX2 INP2", SND_SOC_NOPM, 0, 0,
5407 &rx3_mix2_inp2_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005408
5409 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
5410 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
5411 SND_SOC_DAPM_PRE_PMD),
5412
5413 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
5414 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
5415 SND_SOC_DAPM_POST_PMD),
5416
5417 /* TX */
5418
5419 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
5420 0),
5421
Simmi Pateriya71d63872012-11-08 01:06:30 +05305422 SND_SOC_DAPM_SUPPLY("LDO_H", SND_SOC_NOPM, 0, 0,
5423 tabla_codec_enable_ldo_h, SND_SOC_DAPM_PRE_PMU |
5424 SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005425
Kuirong Wang0f8ade32012-02-27 16:29:45 -08005426 SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
5427 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
5428 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
5429 SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
5430 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
5431 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
5432
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005433 SND_SOC_DAPM_INPUT("AMIC1"),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305434 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005435 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5436 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305437 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005438 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5439 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305440 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005441 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5442 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5443 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
5444 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5445 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5446
5447 SND_SOC_DAPM_INPUT("AMIC3"),
5448 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
5449 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5450 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5451
5452 SND_SOC_DAPM_INPUT("AMIC4"),
5453 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
5454 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5455 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5456
5457 SND_SOC_DAPM_INPUT("AMIC5"),
5458 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
5459 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
5460
5461 SND_SOC_DAPM_INPUT("AMIC6"),
5462 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
5463 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
5464
5465 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005466 &dec1_mux, tabla_codec_enable_dec,
5467 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5468 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005469
5470 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005471 &dec2_mux, tabla_codec_enable_dec,
5472 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5473 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005474
5475 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005476 &dec3_mux, tabla_codec_enable_dec,
5477 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5478 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005479
5480 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005481 &dec4_mux, tabla_codec_enable_dec,
5482 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5483 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005484
5485 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005486 &dec5_mux, tabla_codec_enable_dec,
5487 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5488 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005489
5490 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005491 &dec6_mux, tabla_codec_enable_dec,
5492 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5493 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005494
5495 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005496 &dec7_mux, tabla_codec_enable_dec,
5497 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5498 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005499
5500 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005501 &dec8_mux, tabla_codec_enable_dec,
5502 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5503 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005504
5505 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005506 &dec9_mux, tabla_codec_enable_dec,
5507 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5508 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005509
5510 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005511 &dec10_mux, tabla_codec_enable_dec,
5512 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5513 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005514
5515 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
5516 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
5517
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08005518 SND_SOC_DAPM_OUTPUT("ANC HEADPHONE"),
5519 SND_SOC_DAPM_PGA_E("ANC HPHL", SND_SOC_NOPM, 0, 0, NULL, 0,
5520 tabla_codec_enable_anc,
5521 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
5522 SND_SOC_DAPM_PGA_E("ANC HPHR", SND_SOC_NOPM, 0, 0, NULL, 0,
5523 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU),
5524
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005525
5526 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
5527
5528 SND_SOC_DAPM_INPUT("AMIC2"),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305529 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005530 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Simmi Pateriya71d63872012-11-08 01:06:30 +05305531 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5532 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Power External",
5533 TABLA_A_MICB_2_CTL, 7, 0,
5534 tabla_codec_enable_micbias_power,
5535 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5536 SND_SOC_DAPM_POST_PMD),
5537
5538 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005539 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5540 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305541 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005542 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5543 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305544 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005545 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5546 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305547 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005548 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5549 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305550 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005551 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5552 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Simmi Pateriya71d63872012-11-08 01:06:30 +05305553 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", SND_SOC_NOPM, 0, 0,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005554 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5555 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5556 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
5557 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5558 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5559
Kuirong Wang906ac472012-07-09 12:54:44 -07005560 SND_SOC_DAPM_AIF_OUT_E("AIF1 CAP", "AIF1 Capture", 0, SND_SOC_NOPM,
5561 AIF1_CAP, 0, tabla_codec_enable_slimtx,
5562 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5563
5564 SND_SOC_DAPM_AIF_OUT_E("AIF2 CAP", "AIF2 Capture", 0, SND_SOC_NOPM,
5565 AIF2_CAP, 0, tabla_codec_enable_slimtx,
5566 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5567
5568 SND_SOC_DAPM_AIF_OUT_E("AIF3 CAP", "AIF3 Capture", 0, SND_SOC_NOPM,
5569 AIF3_CAP, 0, tabla_codec_enable_slimtx,
5570 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5571
5572 SND_SOC_DAPM_MIXER("AIF1_CAP Mixer", SND_SOC_NOPM, AIF1_CAP, 0,
5573 aif_cap_mixer, ARRAY_SIZE(aif_cap_mixer)),
5574
5575 SND_SOC_DAPM_MIXER("AIF2_CAP Mixer", SND_SOC_NOPM, AIF2_CAP, 0,
5576 aif_cap_mixer, ARRAY_SIZE(aif_cap_mixer)),
5577
5578 SND_SOC_DAPM_MIXER("AIF3_CAP Mixer", SND_SOC_NOPM, AIF3_CAP, 0,
5579 aif_cap_mixer, ARRAY_SIZE(aif_cap_mixer)),
5580
5581 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, TABLA_TX1, 0,
5582 &sb_tx1_mux),
5583 SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, TABLA_TX2, 0,
5584 &sb_tx2_mux),
5585 SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, TABLA_TX3, 0,
5586 &sb_tx3_mux),
5587 SND_SOC_DAPM_MUX("SLIM TX4 MUX", SND_SOC_NOPM, TABLA_TX4, 0,
5588 &sb_tx4_mux),
5589 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, TABLA_TX5, 0,
5590 &sb_tx5_mux),
5591 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, TABLA_TX6, 0,
5592 &sb_tx6_mux),
5593 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, TABLA_TX7, 0,
5594 &sb_tx7_mux),
5595 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, TABLA_TX8, 0,
5596 &sb_tx8_mux),
5597 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, TABLA_TX9, 0,
5598 &sb_tx9_mux),
5599 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, TABLA_TX10, 0,
5600 &sb_tx10_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005601
5602 /* Digital Mic Inputs */
5603 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
5604 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5605 SND_SOC_DAPM_POST_PMD),
5606
5607 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
5608 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5609 SND_SOC_DAPM_POST_PMD),
5610
5611 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
5612 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5613 SND_SOC_DAPM_POST_PMD),
5614
5615 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
5616 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5617 SND_SOC_DAPM_POST_PMD),
5618
5619 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
5620 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5621 SND_SOC_DAPM_POST_PMD),
5622 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
5623 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5624 SND_SOC_DAPM_POST_PMD),
5625
5626 /* Sidetone */
5627 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
5628 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08005629
Bhalchandra Gajare8ba44462012-07-26 18:08:21 -07005630 SND_SOC_DAPM_MUX("IIR2 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir2_inp1_mux),
5631 SND_SOC_DAPM_PGA("IIR2", TABLA_A_CDC_CLK_SD_CTL, 1, 0, NULL, 0),
5632
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08005633 /* AUX PGA */
5634 SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TABLA_A_AUX_L_EN, 7, 0,
5635 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
5636 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
5637 SND_SOC_DAPM_POST_PMD),
5638
5639 SND_SOC_DAPM_ADC_E("AUX_PGA_Right", NULL, TABLA_A_AUX_R_EN, 7, 0,
5640 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
5641 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
5642 SND_SOC_DAPM_POST_PMD),
5643
5644 /* Lineout, ear and HPH PA Mixers */
5645 SND_SOC_DAPM_MIXER("HPHL_PA_MIXER", SND_SOC_NOPM, 0, 0,
5646 hphl_pa_mix, ARRAY_SIZE(hphl_pa_mix)),
5647
5648 SND_SOC_DAPM_MIXER("HPHR_PA_MIXER", SND_SOC_NOPM, 0, 0,
5649 hphr_pa_mix, ARRAY_SIZE(hphr_pa_mix)),
5650
5651 SND_SOC_DAPM_MIXER("LINEOUT1_PA_MIXER", SND_SOC_NOPM, 0, 0,
5652 lineout1_pa_mix, ARRAY_SIZE(lineout1_pa_mix)),
5653
5654 SND_SOC_DAPM_MIXER("LINEOUT2_PA_MIXER", SND_SOC_NOPM, 0, 0,
5655 lineout2_pa_mix, ARRAY_SIZE(lineout2_pa_mix)),
5656
5657 SND_SOC_DAPM_MIXER("LINEOUT3_PA_MIXER", SND_SOC_NOPM, 0, 0,
5658 lineout3_pa_mix, ARRAY_SIZE(lineout3_pa_mix)),
5659
5660 SND_SOC_DAPM_MIXER("LINEOUT4_PA_MIXER", SND_SOC_NOPM, 0, 0,
5661 lineout4_pa_mix, ARRAY_SIZE(lineout4_pa_mix)),
5662
5663 SND_SOC_DAPM_MIXER("LINEOUT5_PA_MIXER", SND_SOC_NOPM, 0, 0,
5664 lineout5_pa_mix, ARRAY_SIZE(lineout5_pa_mix)),
5665
5666 SND_SOC_DAPM_MIXER("EAR_PA_MIXER", SND_SOC_NOPM, 0, 0,
5667 ear_pa_mix, ARRAY_SIZE(ear_pa_mix)),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005668};
5669
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005670static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005671{
5672 u8 bias_msb, bias_lsb;
5673 short bias_value;
5674
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005675 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
5676 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
5677 bias_value = (bias_msb << 8) | bias_lsb;
5678 return bias_value;
5679}
5680
5681static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
5682{
5683 u8 bias_msb, bias_lsb;
5684 short bias_value;
5685
5686 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
5687 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
5688 bias_value = (bias_msb << 8) | bias_lsb;
5689 return bias_value;
5690}
5691
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005692static void tabla_turn_onoff_rel_detection(struct snd_soc_codec *codec, bool on)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005693{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005694 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, on << 1);
5695}
5696
5697static short __tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5698 bool override_bypass, bool noreldetection)
5699{
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005700 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005701 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
5702
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005703 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005704 if (noreldetection)
5705 tabla_turn_onoff_rel_detection(codec, false);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005706
Joonwoo Park925914c2012-01-05 13:35:18 -08005707 /* Turn on the override */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005708 if (!override_bypass)
5709 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005710 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005711 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5712 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
5713 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005714 usleep_range(tabla->mbhc_data.t_sta_dce,
5715 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005716 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08005717 usleep_range(tabla->mbhc_data.t_dce,
5718 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005719 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005720 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005721 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005722 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5723 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005724 usleep_range(tabla->mbhc_data.t_sta_dce,
5725 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08005726 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5727 usleep_range(tabla->mbhc_data.t_sta,
5728 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005729 bias_value = tabla_codec_read_sta_result(codec);
5730 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5731 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005732 }
Joonwoo Park925914c2012-01-05 13:35:18 -08005733 /* Turn off the override after measuring mic voltage */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005734 if (!override_bypass)
5735 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
5736
5737 if (noreldetection)
5738 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005739 wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005740
Bradley Rubincb1e2732011-06-23 16:49:20 -07005741 return bias_value;
5742}
5743
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005744static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5745 bool norel)
5746{
5747 return __tabla_codec_sta_dce(codec, dce, false, norel);
5748}
5749
5750/* called only from interrupt which is under codec_resource_lock acquisition */
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005751static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005752{
5753 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005754 short bias_value;
Simmi Pateriya71d63872012-11-08 01:06:30 +05305755 u8 cfilt_mode = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005756
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005757 pr_debug("%s: enter, mclk_enabled %d\n", __func__, tabla->mclk_enabled);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005758 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005759 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07005760 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005761 }
5762
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005763 if (!tabla->mclk_enabled) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07005764 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005765 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005766 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005767 tabla_codec_enable_clock_block(codec, 1);
5768 }
5769
5770 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
Simmi Pateriya71d63872012-11-08 01:06:30 +05305771 if (!tabla->mbhc_cfg.micbias_always_on) {
5772 /* Make sure CFILT is in fast mode, save current mode */
5773 cfilt_mode = snd_soc_read(codec,
5774 tabla->mbhc_bias_regs.cfilt_ctl);
5775 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
5776 0x70, 0x00);
5777 }
Patrick Lai3043fba2011-08-01 14:15:57 -07005778
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005779 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005780
5781 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005782 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005783
5784 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
5785 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
5786 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
5787
5788 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005789 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5790 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005791
Joonwoo Park925914c2012-01-05 13:35:18 -08005792 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005793 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5794
Bradley Rubincb1e2732011-06-23 16:49:20 -07005795 tabla_codec_calibrate_hs_polling(codec);
5796
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005797 /* don't flip override */
5798 bias_value = __tabla_codec_sta_dce(codec, 1, true, true);
Simmi Pateriya71d63872012-11-08 01:06:30 +05305799 if (!tabla->mbhc_cfg.micbias_always_on)
5800 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
5801 0x40, cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005802 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005803
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005804 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005805}
5806
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005807static int tabla_cancel_btn_work(struct tabla_priv *tabla)
5808{
5809 int r = 0;
5810 struct wcd9xxx *core = dev_get_drvdata(tabla->codec->dev->parent);
5811
5812 if (cancel_delayed_work_sync(&tabla->mbhc_btn_dwork)) {
5813 /* if scheduled mbhc_btn_dwork is canceled from here,
5814 * we have to unlock from here instead btn_work */
5815 wcd9xxx_unlock_sleep(core);
5816 r = 1;
5817 }
5818 return r;
5819}
5820
5821/* called under codec_resource_lock acquisition */
5822void tabla_set_and_turnoff_hph_padac(struct snd_soc_codec *codec)
Joonwoo Park03324832012-03-19 19:36:16 -07005823{
5824 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005825 u8 wg_time;
5826
5827 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5828 wg_time += 1;
Joonwoo Park03324832012-03-19 19:36:16 -07005829
5830 /* If headphone PA is on, check if userspace receives
5831 * removal event to sync-up PA's state */
5832 if (tabla_is_hph_pa_on(codec)) {
5833 pr_debug("%s PA is on, setting PA_OFF_ACK\n", __func__);
5834 set_bit(TABLA_HPHL_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5835 set_bit(TABLA_HPHR_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5836 } else {
5837 pr_debug("%s PA is off\n", __func__);
5838 }
5839
5840 if (tabla_is_hph_dac_on(codec, 1))
5841 set_bit(TABLA_HPHL_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
5842 if (tabla_is_hph_dac_on(codec, 0))
5843 set_bit(TABLA_HPHR_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005844
5845 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
5846 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
Gopikrishnaiah Anandan3b230b22012-12-07 11:36:58 -05005847 0x80, 0x00);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005848 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
5849 0xC0, 0x00);
5850 usleep_range(wg_time * 1000, wg_time * 1000);
5851}
5852
5853static void tabla_clr_and_turnon_hph_padac(struct tabla_priv *tabla)
5854{
5855 bool pa_turned_on = false;
5856 struct snd_soc_codec *codec = tabla->codec;
5857 u8 wg_time;
5858
5859 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5860 wg_time += 1;
5861
5862 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
5863 &tabla->hph_pa_dac_state)) {
5864 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
5865 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
5866 0xC0, 0xC0);
5867 }
5868 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
5869 &tabla->hph_pa_dac_state)) {
5870 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
5871 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
5872 0xC0, 0xC0);
5873 }
5874
5875 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
5876 &tabla->hph_pa_dac_state)) {
5877 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
5878 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
5879 1 << 4);
5880 pa_turned_on = true;
5881 }
5882 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
5883 &tabla->hph_pa_dac_state)) {
5884 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
5885 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
5886 1 << 5);
5887 pa_turned_on = true;
5888 }
5889
5890 if (pa_turned_on) {
5891 pr_debug("%s: PA was turned off by MBHC and not by DAPM\n",
5892 __func__);
5893 usleep_range(wg_time * 1000, wg_time * 1000);
5894 }
5895}
5896
5897/* called under codec_resource_lock acquisition */
Simmi Pateriya71d63872012-11-08 01:06:30 +05305898static void tabla_codec_enable_mbhc_micbias(struct snd_soc_codec *codec,
5899 bool enable)
5900{
5901 int r;
5902 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
5903
5904 if (!tabla->mbhc_cfg.micbias_always_on)
5905 return;
5906 if (enable) {
5907 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
5908 tabla_codec_update_cfilt_usage(codec,
5909 tabla->mbhc_bias_regs.cfilt_sel, 1);
5910 r = snd_soc_dapm_force_enable_pin(&codec->dapm,
5911 "MIC BIAS2 Power External");
5912 snd_soc_dapm_sync(&codec->dapm);
5913 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
5914 pr_debug("%s: Turning on MICBIAS2 r %d\n", __func__, r);
5915 } else {
5916 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
5917 r = snd_soc_dapm_disable_pin(&codec->dapm,
5918 "MIC BIAS2 Power External");
5919 snd_soc_dapm_sync(&codec->dapm);
5920 tabla_codec_update_cfilt_usage(codec,
5921 tabla->mbhc_bias_regs.cfilt_sel, 0);
5922 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
5923 pr_debug("%s: Turning off MICBIAS2 r %d\n", __func__, r);
5924 }
5925}
5926
5927/* called under codec_resource_lock acquisition */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005928static void tabla_codec_report_plug(struct snd_soc_codec *codec, int insertion,
5929 enum snd_jack_types jack_type)
5930{
5931 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005932 pr_debug("%s: enter insertion %d hph_status %x\n",
5933 __func__, insertion, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005934 if (!insertion) {
5935 /* Report removal */
5936 tabla->hph_status &= ~jack_type;
5937 if (tabla->mbhc_cfg.headset_jack) {
5938 /* cancel possibly scheduled btn work and
5939 * report release if we reported button press */
5940 if (tabla_cancel_btn_work(tabla)) {
5941 pr_debug("%s: button press is canceled\n",
5942 __func__);
5943 } else if (tabla->buttons_pressed) {
5944 pr_debug("%s: Reporting release for reported "
5945 "button press %d\n", __func__,
5946 jack_type);
5947 tabla_snd_soc_jack_report(tabla,
5948 tabla->mbhc_cfg.button_jack, 0,
5949 tabla->buttons_pressed);
5950 tabla->buttons_pressed &=
5951 ~TABLA_JACK_BUTTON_MASK;
5952 }
Simmi Pateriya71d63872012-11-08 01:06:30 +05305953 if (jack_type == SND_JACK_HEADSET)
5954 tabla_codec_enable_mbhc_micbias(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005955 pr_debug("%s: Reporting removal %d(%x)\n", __func__,
5956 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005957 tabla_snd_soc_jack_report(tabla,
5958 tabla->mbhc_cfg.headset_jack,
5959 tabla->hph_status,
5960 TABLA_JACK_MASK);
5961 }
5962 tabla_set_and_turnoff_hph_padac(codec);
5963 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005964 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005965 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005966 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005967 tabla->current_plug = PLUG_TYPE_NONE;
5968 tabla->mbhc_polling_active = false;
5969 } else {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005970 if (tabla->mbhc_cfg.detect_extn_cable) {
5971 /* Report removal of current jack type */
5972 if (tabla->hph_status != jack_type &&
5973 tabla->mbhc_cfg.headset_jack) {
5974 pr_debug("%s: Reporting removal (%x)\n",
5975 __func__, tabla->hph_status);
5976 tabla_snd_soc_jack_report(tabla,
5977 tabla->mbhc_cfg.headset_jack,
5978 0, TABLA_JACK_MASK);
5979 tabla->hph_status = 0;
5980 }
5981 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005982 /* Report insertion */
5983 tabla->hph_status |= jack_type;
5984
5985 if (jack_type == SND_JACK_HEADPHONE)
5986 tabla->current_plug = PLUG_TYPE_HEADPHONE;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005987 else if (jack_type == SND_JACK_UNSUPPORTED)
5988 tabla->current_plug = PLUG_TYPE_GND_MIC_SWAP;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005989 else if (jack_type == SND_JACK_HEADSET) {
5990 tabla->mbhc_polling_active = true;
5991 tabla->current_plug = PLUG_TYPE_HEADSET;
Simmi Pateriya71d63872012-11-08 01:06:30 +05305992 tabla_codec_enable_mbhc_micbias(codec, true);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005993 } else if (jack_type == SND_JACK_LINEOUT)
5994 tabla->current_plug = PLUG_TYPE_HIGH_HPH;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005995 if (tabla->mbhc_cfg.headset_jack) {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005996 pr_debug("%s: Reporting insertion %d(%x)\n", __func__,
5997 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005998 tabla_snd_soc_jack_report(tabla,
5999 tabla->mbhc_cfg.headset_jack,
6000 tabla->hph_status,
6001 TABLA_JACK_MASK);
6002 }
6003 tabla_clr_and_turnon_hph_padac(tabla);
6004 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006005 pr_debug("%s: leave hph_status %x\n", __func__, tabla->hph_status);
Joonwoo Park03324832012-03-19 19:36:16 -07006006}
6007
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006008static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park03324832012-03-19 19:36:16 -07006009 int insertion, int trigger,
6010 bool padac_off)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006011{
6012 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006013 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08006014 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006015 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08006016 const struct tabla_mbhc_plug_detect_cfg *plug_det =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006017 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006018
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006019 pr_debug("%s: enter insertion(%d) trigger(0x%x)\n",
6020 __func__, insertion, trigger);
6021
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006022 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006023 pr_err("Error, no tabla calibration\n");
6024 return -EINVAL;
6025 }
6026
6027 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
6028
Joonwoo Park03324832012-03-19 19:36:16 -07006029 /* Make sure mic bias and Mic line schmitt trigger
6030 * are turned OFF
6031 */
6032 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
6033 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
6034
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006035 if (insertion) {
Bhalchandra Gajareafc86432012-08-23 13:44:07 -07006036 pr_debug("%s: setup for insertion\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006037 tabla_codec_switch_micbias(codec, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006038
Joonwoo Park03324832012-03-19 19:36:16 -07006039 /* DAPM can manipulate PA/DAC bits concurrently */
6040 if (padac_off == true) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006041 tabla_set_and_turnoff_hph_padac(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006042 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006043
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006044 if (trigger & MBHC_USE_HPHL_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07006045 /* Enable HPH Schmitt Trigger */
6046 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11,
6047 0x11);
6048 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
6049 plug_det->hph_current << 2);
6050 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02,
6051 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006052 }
6053 if (trigger & MBHC_USE_MB_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07006054 /* enable the mic line schmitt trigger */
6055 snd_soc_update_bits(codec,
6056 tabla->mbhc_bias_regs.mbhc_reg,
6057 0x60, plug_det->mic_current << 5);
6058 snd_soc_update_bits(codec,
6059 tabla->mbhc_bias_regs.mbhc_reg,
6060 0x80, 0x80);
6061 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
6062 snd_soc_update_bits(codec,
6063 tabla->mbhc_bias_regs.ctl_reg, 0x01,
6064 0x00);
6065 snd_soc_update_bits(codec,
6066 tabla->mbhc_bias_regs.mbhc_reg,
6067 0x10, 0x10);
6068 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006069
6070 /* setup for insetion detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006071 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006072 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006073 pr_debug("setup for removal detection\n");
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006074 /* Make sure the HPH schmitt trigger is OFF */
6075 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
6076
6077 /* enable the mic line schmitt trigger */
Joonwoo Park03324832012-03-19 19:36:16 -07006078 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
6079 0x01, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006080 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08006081 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006082 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
6083 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08006084 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006085 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
6086 0x10, 0x10);
6087
6088 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006089 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006090 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006091
6092 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006093 /* called called by interrupt */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006094 if (!(tabla->clock_active)) {
6095 tabla_codec_enable_config_mode(codec, 1);
6096 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07006097 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08006098 usleep_range(generic->t_shutdown_plug_rem,
6099 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006100 tabla_codec_enable_config_mode(codec, 0);
6101 } else
6102 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07006103 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006104 }
6105
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07006106 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006107
6108 /* If central bandgap disabled */
6109 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
6110 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08006111 usleep_range(generic->t_bg_fast_settle,
6112 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006113 central_bias_enabled = 1;
6114 }
6115
6116 /* If LDO_H disabled */
6117 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
6118 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
6119 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08006120 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006121 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
6122
6123 if (central_bias_enabled)
6124 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
6125 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006126
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08006127 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006128 tabla->mbhc_cfg.micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006129
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006130 wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006131 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006132 pr_debug("%s: leave\n", __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006133 return 0;
6134}
6135
Joonwoo Park0976d012011-12-22 11:48:18 -08006136static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
6137 s16 vin_mv)
6138{
Joonwoo Park0976d012011-12-22 11:48:18 -08006139 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07006140 s16 diff, zero;
Joonwoo Park0976d012011-12-22 11:48:18 -08006141 u32 mb_mv, in;
Joonwoo Park03324832012-03-19 19:36:16 -07006142 u16 value;
Joonwoo Park0976d012011-12-22 11:48:18 -08006143
6144 tabla = snd_soc_codec_get_drvdata(codec);
6145 mb_mv = tabla->mbhc_data.micb_mv;
6146
6147 if (mb_mv == 0) {
6148 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
6149 return -EINVAL;
6150 }
6151
6152 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07006153 diff = (tabla->mbhc_data.dce_mb) - (tabla->mbhc_data.dce_z);
6154 zero = (tabla->mbhc_data.dce_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08006155 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006156 diff = (tabla->mbhc_data.sta_mb) - (tabla->mbhc_data.sta_z);
6157 zero = (tabla->mbhc_data.sta_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08006158 }
6159 in = (u32) diff * vin_mv;
6160
Joonwoo Park03324832012-03-19 19:36:16 -07006161 value = (u16) (in / mb_mv) + zero;
6162 return value;
Joonwoo Park0976d012011-12-22 11:48:18 -08006163}
6164
6165static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
6166 u16 bias_value)
6167{
6168 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07006169 s16 value, z, mb;
Joonwoo Park0976d012011-12-22 11:48:18 -08006170 s32 mv;
6171
6172 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006173 value = bias_value;
Joonwoo Park0976d012011-12-22 11:48:18 -08006174 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07006175 z = (tabla->mbhc_data.dce_z);
6176 mb = (tabla->mbhc_data.dce_mb);
6177 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08006178 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006179 z = (tabla->mbhc_data.sta_z);
6180 mb = (tabla->mbhc_data.sta_mb);
6181 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08006182 }
6183
6184 return mv;
6185}
6186
Joonwoo Park03324832012-03-19 19:36:16 -07006187static void btn_lpress_fn(struct work_struct *work)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006188{
6189 struct delayed_work *delayed_work;
6190 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08006191 short bias_value;
6192 int dce_mv, sta_mv;
Joonwoo Park03324832012-03-19 19:36:16 -07006193 struct wcd9xxx *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006194
6195 pr_debug("%s:\n", __func__);
6196
6197 delayed_work = to_delayed_work(work);
Joonwoo Park03324832012-03-19 19:36:16 -07006198 tabla = container_of(delayed_work, struct tabla_priv, mbhc_btn_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08006199 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006200
6201 if (tabla) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006202 if (tabla->mbhc_cfg.button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08006203 bias_value = tabla_codec_read_sta_result(tabla->codec);
6204 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306205 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08006206 bias_value = tabla_codec_read_dce_result(tabla->codec);
6207 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306208 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08006209 pr_debug("%s: Reporting long button press event"
6210 " STA: %d, DCE: %d\n", __func__,
6211 sta_mv, dce_mv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006212 tabla_snd_soc_jack_report(tabla,
6213 tabla->mbhc_cfg.button_jack,
Joonwoo Park03324832012-03-19 19:36:16 -07006214 tabla->buttons_pressed,
6215 tabla->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006216 }
6217 } else {
6218 pr_err("%s: Bad tabla private data\n", __func__);
6219 }
6220
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006221 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006222 wcd9xxx_unlock_sleep(core);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006223}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006224
Joonwoo Parke067b232012-06-14 13:11:30 -07006225static u16 tabla_get_cfilt_reg(struct snd_soc_codec *codec, u8 cfilt)
6226{
6227 u16 reg;
6228
6229 switch (cfilt) {
6230 case TABLA_CFILT1_SEL:
6231 reg = TABLA_A_MICB_CFILT_1_CTL;
6232 break;
6233 case TABLA_CFILT2_SEL:
6234 reg = TABLA_A_MICB_CFILT_2_CTL;
6235 break;
6236 case TABLA_CFILT3_SEL:
6237 reg = TABLA_A_MICB_CFILT_3_CTL;
6238 break;
6239 default:
6240 BUG();
6241 }
6242 return reg;
6243}
6244
Joonwoo Park0976d012011-12-22 11:48:18 -08006245void tabla_mbhc_cal(struct snd_soc_codec *codec)
6246{
6247 struct tabla_priv *tabla;
6248 struct tabla_mbhc_btn_detect_cfg *btn_det;
Joonwoo Parke067b232012-06-14 13:11:30 -07006249 u8 cfilt_mode, micbias2_cfilt_mode, bg_mode;
Joonwoo Park0976d012011-12-22 11:48:18 -08006250 u8 ncic, nmeas, navg;
6251 u32 mclk_rate;
6252 u32 dce_wait, sta_wait;
6253 u8 *n_cic;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006254 void *calibration;
Joonwoo Parke067b232012-06-14 13:11:30 -07006255 u16 bias2_ctl;
Joonwoo Park0976d012011-12-22 11:48:18 -08006256
6257 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006258 calibration = tabla->mbhc_cfg.calibration;
6259
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006260 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006261 tabla_turn_onoff_rel_detection(codec, false);
Joonwoo Park0976d012011-12-22 11:48:18 -08006262
6263 /* First compute the DCE / STA wait times
6264 * depending on tunable parameters.
6265 * The value is computed in microseconds
6266 */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006267 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08006268 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08006269 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006270 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(calibration)->n_meas;
6271 navg = TABLA_MBHC_CAL_GENERAL_PTR(calibration)->mbhc_navg;
6272 mclk_rate = tabla->mbhc_cfg.mclk_rate;
Joonwoo Park433149a2012-01-11 09:53:54 -08006273 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
6274 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08006275
6276 tabla->mbhc_data.t_dce = dce_wait;
6277 tabla->mbhc_data.t_sta = sta_wait;
6278
6279 /* LDOH and CFILT are already configured during pdata handling.
6280 * Only need to make sure CFILT and bandgap are in Fast mode.
6281 * Need to restore defaults once calculation is done.
6282 */
6283 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
Joonwoo Parke067b232012-06-14 13:11:30 -07006284 micbias2_cfilt_mode =
6285 snd_soc_read(codec, tabla_get_cfilt_reg(codec,
6286 tabla->pdata->micbias.bias2_cfilt_sel));
6287 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
6288 TABLA_CFILT_FAST_MODE);
6289 snd_soc_update_bits(codec,
6290 tabla_get_cfilt_reg(codec,
6291 tabla->pdata->micbias.bias2_cfilt_sel),
6292 0x40, TABLA_CFILT_FAST_MODE);
6293
Joonwoo Park0976d012011-12-22 11:48:18 -08006294 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
6295 0x02);
6296
6297 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
6298 * to perform ADC calibration
6299 */
6300 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006301 tabla->mbhc_cfg.micbias << 5);
Joonwoo Park0976d012011-12-22 11:48:18 -08006302 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
6303 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
6304 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
6305 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
6306
Joonwoo Parke067b232012-06-14 13:11:30 -07006307 /* MICBIAS2 routing for calibration */
6308 bias2_ctl = snd_soc_read(codec, TABLA_A_MICB_2_CTL);
6309 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03, TABLA_MICBIAS2);
6310 snd_soc_write(codec, TABLA_A_MICB_2_CTL,
6311 snd_soc_read(codec, tabla->mbhc_bias_regs.ctl_reg));
6312
Joonwoo Park0976d012011-12-22 11:48:18 -08006313 /* DCE measurement for 0 volts */
6314 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
6315 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
6316 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08006317 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
6318 usleep_range(100, 100);
6319 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
6320 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
6321 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
6322
6323 /* DCE measurment for MB voltage */
6324 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
6325 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
6326 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
6327 usleep_range(100, 100);
6328 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
6329 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
6330 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
6331
6332 /* Sta measuremnt for 0 volts */
6333 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
6334 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
6335 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08006336 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
6337 usleep_range(100, 100);
6338 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
6339 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
6340 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
6341
6342 /* STA Measurement for MB Voltage */
6343 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
6344 usleep_range(100, 100);
6345 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
6346 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
6347 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
6348
6349 /* Restore default settings. */
Joonwoo Parke067b232012-06-14 13:11:30 -07006350 snd_soc_write(codec, TABLA_A_MICB_2_CTL, bias2_ctl);
6351 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
6352 tabla->mbhc_cfg.micbias);
6353
Joonwoo Park0976d012011-12-22 11:48:18 -08006354 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Joonwoo Parke067b232012-06-14 13:11:30 -07006355 snd_soc_update_bits(codec,
6356 tabla_get_cfilt_reg(codec,
6357 tabla->pdata->micbias.bias2_cfilt_sel), 0x40,
6358 micbias2_cfilt_mode);
Joonwoo Park0976d012011-12-22 11:48:18 -08006359 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
6360 cfilt_mode);
6361 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
6362
6363 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
6364 usleep_range(100, 100);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006365
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006366 wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006367 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08006368}
6369
6370void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
6371 const enum tabla_mbhc_btn_det_mem mem)
6372{
6373 void *ret = &btn_det->_v_btn_low;
6374
6375 switch (mem) {
6376 case TABLA_BTN_DET_GAIN:
6377 ret += sizeof(btn_det->_n_cic);
6378 case TABLA_BTN_DET_N_CIC:
6379 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08006380 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08006381 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
6382 case TABLA_BTN_DET_V_BTN_HIGH:
6383 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
6384 case TABLA_BTN_DET_V_BTN_LOW:
6385 /* do nothing */
6386 break;
6387 default:
6388 ret = NULL;
6389 }
6390
6391 return ret;
6392}
6393
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006394static s16 tabla_scale_v_micb_vddio(struct tabla_priv *tabla, int v,
6395 bool tovddio)
6396{
6397 int r;
6398 int vddio_k, mb_k;
6399 vddio_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
6400 VDDIO_MICBIAS_MV);
6401 mb_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
6402 tabla->mbhc_data.micb_mv);
6403 if (tovddio)
6404 r = v * vddio_k / mb_k;
6405 else
6406 r = v * mb_k / vddio_k;
6407 return r;
6408}
6409
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006410static void tabla_mbhc_calc_rel_thres(struct snd_soc_codec *codec, s16 mv)
6411{
6412 s16 deltamv;
6413 struct tabla_priv *tabla;
6414 struct tabla_mbhc_btn_detect_cfg *btn_det;
6415
6416 tabla = snd_soc_codec_get_drvdata(codec);
6417 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
6418
6419 tabla->mbhc_data.v_b1_h =
6420 tabla_codec_v_sta_dce(codec, DCE,
6421 mv + btn_det->v_btn_press_delta_cic);
6422
6423 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
6424
6425 tabla->mbhc_data.v_brl = TABLA_MBHC_BUTTON_MIN;
6426
6427 deltamv = mv + btn_det->v_btn_press_delta_sta;
6428 tabla->mbhc_data.v_b1_hu = tabla_codec_v_sta_dce(codec, STA, deltamv);
6429
6430 deltamv = mv + btn_det->v_btn_press_delta_cic;
6431 tabla->mbhc_data.v_b1_huc = tabla_codec_v_sta_dce(codec, DCE, deltamv);
6432}
6433
6434static void tabla_mbhc_set_rel_thres(struct snd_soc_codec *codec, s16 mv)
6435{
6436 tabla_mbhc_calc_rel_thres(codec, mv);
6437 tabla_codec_calibrate_rel(codec);
6438}
6439
6440static s16 tabla_mbhc_highest_btn_mv(struct snd_soc_codec *codec)
6441{
6442 struct tabla_priv *tabla;
6443 struct tabla_mbhc_btn_detect_cfg *btn_det;
6444 u16 *btn_high;
6445
6446 tabla = snd_soc_codec_get_drvdata(codec);
6447 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
6448 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
6449
6450 return btn_high[btn_det->num_btn - 1];
6451}
6452
Joonwoo Park0976d012011-12-22 11:48:18 -08006453static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
6454{
6455 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08006456 struct tabla_mbhc_btn_detect_cfg *btn_det;
6457 struct tabla_mbhc_plug_type_cfg *plug_type;
Joonwoo Parkc0672392012-01-11 11:03:14 -08006458 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08006459
6460 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006461 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
6462 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08006463
Joonwoo Parkc0672392012-01-11 11:03:14 -08006464 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006465 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park03324832012-03-19 19:36:16 -07006466 tabla->mbhc_data.npoll = 4;
Joonwoo Park0976d012011-12-22 11:48:18 -08006467 tabla->mbhc_data.nbounce_wait = 30;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006468 } else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08006469 tabla->mbhc_data.npoll = 7;
6470 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08006471 }
Joonwoo Park0976d012011-12-22 11:48:18 -08006472
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006473 tabla->mbhc_data.t_sta_dce = ((1000 * 256) /
6474 (tabla->mbhc_cfg.mclk_rate / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08006475 n_ready[tabla_codec_mclk_index(tabla)]) +
6476 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08006477 tabla->mbhc_data.v_ins_hu =
6478 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
6479 tabla->mbhc_data.v_ins_h =
6480 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
6481
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006482 tabla->mbhc_data.v_inval_ins_low = TABLA_MBHC_FAKE_INSERT_LOW;
6483 if (tabla->mbhc_cfg.gpio)
6484 tabla->mbhc_data.v_inval_ins_high =
6485 TABLA_MBHC_FAKE_INSERT_HIGH;
6486 else
6487 tabla->mbhc_data.v_inval_ins_high =
6488 TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO;
6489
6490 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
6491 tabla->mbhc_data.adj_v_hs_max =
6492 tabla_scale_v_micb_vddio(tabla, plug_type->v_hs_max, true);
6493 tabla->mbhc_data.adj_v_ins_hu =
6494 tabla_codec_v_sta_dce(codec, STA,
6495 tabla->mbhc_data.adj_v_hs_max);
6496 tabla->mbhc_data.adj_v_ins_h =
6497 tabla_codec_v_sta_dce(codec, DCE,
6498 tabla->mbhc_data.adj_v_hs_max);
6499 tabla->mbhc_data.v_inval_ins_low =
6500 tabla_scale_v_micb_vddio(tabla,
6501 tabla->mbhc_data.v_inval_ins_low,
6502 false);
6503 tabla->mbhc_data.v_inval_ins_high =
6504 tabla_scale_v_micb_vddio(tabla,
6505 tabla->mbhc_data.v_inval_ins_high,
6506 false);
6507 }
6508
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006509 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park0976d012011-12-22 11:48:18 -08006510
6511 tabla->mbhc_data.v_no_mic =
6512 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
6513}
6514
6515void tabla_mbhc_init(struct snd_soc_codec *codec)
6516{
6517 struct tabla_priv *tabla;
6518 struct tabla_mbhc_general_cfg *generic;
6519 struct tabla_mbhc_btn_detect_cfg *btn_det;
6520 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08006521 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306522 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08006523
6524 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006525 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
6526 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08006527
Joonwoo Park0976d012011-12-22 11:48:18 -08006528 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08006529 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08006530 snd_soc_update_bits(codec,
6531 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
6532 0x07, n);
6533 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
6534 btn_det->c[n]);
6535 }
6536 }
6537 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
6538 btn_det->nc);
6539
6540 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
6541 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08006542 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08006543
6544 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08006545 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
6546 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08006547
6548 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
6549 generic->mbhc_nsa << 4);
6550
6551 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
6552 btn_det->n_meas);
6553
6554 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
6555
6556 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
6557
6558 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
6559 btn_det->mbhc_nsc << 3);
6560
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08006561 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
6562 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08006563
6564 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Park03324832012-03-19 19:36:16 -07006565
6566 snd_soc_update_bits(codec, TABLA_A_MBHC_SCALING_MUX_2, 0xF0, 0xF0);
Joonwoo Parke067b232012-06-14 13:11:30 -07006567
6568 /* override mbhc's micbias */
6569 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
6570 tabla->mbhc_cfg.micbias);
Joonwoo Park0976d012011-12-22 11:48:18 -08006571}
6572
Patrick Lai64b43262011-12-06 17:29:15 -08006573static bool tabla_mbhc_fw_validate(const struct firmware *fw)
6574{
6575 u32 cfg_offset;
6576 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
6577 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
6578
6579 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
6580 return false;
6581
6582 /* previous check guarantees that there is enough fw data up
6583 * to num_btn
6584 */
6585 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
6586 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
6587 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
6588 return false;
6589
6590 /* previous check guarantees that there is enough fw data up
6591 * to start of impedance detection configuration
6592 */
6593 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
6594 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
6595
6596 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
6597 return false;
6598
6599 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
6600 return false;
6601
6602 return true;
6603}
Joonwoo Park03324832012-03-19 19:36:16 -07006604
Joonwoo Parkfee17432012-04-16 16:33:55 -07006605/* called under codec_resource_lock acquisition */
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006606static int tabla_determine_button(const struct tabla_priv *priv,
Joonwoo Parkfee17432012-04-16 16:33:55 -07006607 const s32 micmv)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006608{
6609 s16 *v_btn_low, *v_btn_high;
6610 struct tabla_mbhc_btn_detect_cfg *btn_det;
6611 int i, btn = -1;
6612
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006613 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006614 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
6615 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306616 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkfee17432012-04-16 16:33:55 -07006617
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006618 for (i = 0; i < btn_det->num_btn; i++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07006619 if ((v_btn_low[i] <= micmv) && (v_btn_high[i] >= micmv)) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006620 btn = i;
6621 break;
6622 }
6623 }
6624
6625 if (btn == -1)
6626 pr_debug("%s: couldn't find button number for mic mv %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07006627 __func__, micmv);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006628
6629 return btn;
6630}
6631
6632static int tabla_get_button_mask(const int btn)
6633{
6634 int mask = 0;
6635 switch (btn) {
6636 case 0:
6637 mask = SND_JACK_BTN_0;
6638 break;
6639 case 1:
6640 mask = SND_JACK_BTN_1;
6641 break;
6642 case 2:
6643 mask = SND_JACK_BTN_2;
6644 break;
6645 case 3:
6646 mask = SND_JACK_BTN_3;
6647 break;
6648 case 4:
6649 mask = SND_JACK_BTN_4;
6650 break;
6651 case 5:
6652 mask = SND_JACK_BTN_5;
6653 break;
6654 case 6:
6655 mask = SND_JACK_BTN_6;
6656 break;
6657 case 7:
6658 mask = SND_JACK_BTN_7;
6659 break;
6660 }
6661 return mask;
6662}
6663
Bradley Rubincb1e2732011-06-23 16:49:20 -07006664static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006665{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006666 int i, mask;
Joonwoo Parkfee17432012-04-16 16:33:55 -07006667 short dce, sta;
Joonwoo Park12334832012-07-23 19:27:52 -07006668 s32 mv, mv_s, stamv, stamv_s;
Joonwoo Parkfee17432012-04-16 16:33:55 -07006669 bool vddio;
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006670 u16 *btn_high;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006671 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006672 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006673 const struct tabla_mbhc_btn_detect_cfg *d =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006674 TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006675 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006676 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306677 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park03324832012-03-19 19:36:16 -07006678 int n_btn_meas = d->n_btn_meas;
6679 u8 mbhc_status = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_STATUS) & 0x3E;
Bradley Rubincb1e2732011-06-23 16:49:20 -07006680
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006681 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006682
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006683 btn_high = tabla_mbhc_cal_btn_det_mp(d, TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006684 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6685 if (priv->mbhc_state == MBHC_STATE_POTENTIAL_RECOVERY) {
6686 pr_debug("%s: mbhc is being recovered, skip button press\n",
6687 __func__);
6688 goto done;
6689 }
6690
6691 priv->mbhc_state = MBHC_STATE_POTENTIAL;
6692
6693 if (!priv->mbhc_polling_active) {
6694 pr_warn("%s: mbhc polling is not active, skip button press\n",
6695 __func__);
6696 goto done;
6697 }
Joonwoo Park03324832012-03-19 19:36:16 -07006698
6699 dce = tabla_codec_read_dce_result(codec);
6700 mv = tabla_codec_sta_dce_v(codec, 1, dce);
6701
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006702 /* If GPIO interrupt already kicked in, ignore button press */
6703 if (priv->in_gpio_handler) {
6704 pr_debug("%s: GPIO State Changed, ignore button press\n",
6705 __func__);
6706 btn = -1;
6707 goto done;
6708 }
Simmi Pateriya71d63872012-11-08 01:06:30 +05306709 vddio = !priv->mbhc_cfg.micbias_always_on &&
6710 (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
Joonwoo Parkfee17432012-04-16 16:33:55 -07006711 priv->mbhc_micbias_switched);
6712 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6713
Joonwoo Park03324832012-03-19 19:36:16 -07006714 if (mbhc_status != TABLA_MBHC_STATUS_REL_DETECTION) {
6715 if (priv->mbhc_last_resume &&
6716 !time_after(jiffies, priv->mbhc_last_resume + HZ)) {
6717 pr_debug("%s: Button is already released shortly after "
6718 "resume\n", __func__);
6719 n_btn_meas = 0;
Joonwoo Park03324832012-03-19 19:36:16 -07006720 }
6721 }
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07006722
Joonwoo Park12334832012-07-23 19:27:52 -07006723 /* save hw dce */
Joonwoo Parkfee17432012-04-16 16:33:55 -07006724 btnmeas[meas++] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006725 pr_debug("%s: meas HW - DCE %x,%d,%d button %d\n", __func__,
6726 dce, mv, mv_s, btnmeas[0]);
6727 if (n_btn_meas == 0) {
6728 sta = tabla_codec_read_sta_result(codec);
6729 stamv_s = stamv = tabla_codec_sta_dce_v(codec, 0, sta);
6730 if (vddio)
6731 stamv_s = tabla_scale_v_micb_vddio(priv, stamv, false);
6732 btn = tabla_determine_button(priv, stamv_s);
6733 pr_debug("%s: meas HW - STA %x,%d,%d button %d\n", __func__,
6734 sta, stamv, stamv_s, btn);
6735 BUG_ON(meas != 1);
6736 if (btnmeas[0] != btn)
6737 btn = -1;
6738 }
6739
6740 /* determine pressed button */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006741 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07006742 dce = tabla_codec_sta_dce(codec, 1, false);
6743 mv = tabla_codec_sta_dce_v(codec, 1, dce);
6744 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6745
6746 btnmeas[meas] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006747 pr_debug("%s: meas %d - DCE %x,%d,%d button %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07006748 __func__, meas, dce, mv, mv_s, btnmeas[meas]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006749 /* if large enough measurements are collected,
6750 * start to check if last all n_btn_con measurements were
6751 * in same button low/high range */
6752 if (meas + 1 >= d->n_btn_con) {
6753 for (i = 0; i < d->n_btn_con; i++)
6754 if ((btnmeas[meas] < 0) ||
6755 (btnmeas[meas] != btnmeas[meas - i]))
6756 break;
6757 if (i == d->n_btn_con) {
6758 /* button pressed */
6759 btn = btnmeas[meas];
6760 break;
Joonwoo Park03324832012-03-19 19:36:16 -07006761 } else if ((n_btn_meas - meas) < (d->n_btn_con - 1)) {
6762 /* if left measurements are less than n_btn_con,
6763 * it's impossible to find button number */
6764 break;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006765 }
6766 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006767 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006768
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006769 if (btn >= 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006770 if (priv->in_gpio_handler) {
6771 pr_debug("%s: GPIO already triggered, ignore button "
6772 "press\n", __func__);
6773 goto done;
6774 }
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006775 /* narrow down release threshold */
6776 tabla_mbhc_set_rel_thres(codec, btn_high[btn]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006777 mask = tabla_get_button_mask(btn);
6778 priv->buttons_pressed |= mask;
Joonwoo Park03324832012-03-19 19:36:16 -07006779 wcd9xxx_lock_sleep(core);
6780 if (schedule_delayed_work(&priv->mbhc_btn_dwork,
6781 msecs_to_jiffies(400)) == 0) {
6782 WARN(1, "Button pressed twice without release"
6783 "event\n");
6784 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006785 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08006786 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006787 pr_debug("%s: bogus button press, too short press?\n",
6788 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08006789 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006790
Joonwoo Park03324832012-03-19 19:36:16 -07006791 done:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006792 pr_debug("%s: leave\n", __func__);
6793 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006794 return IRQ_HANDLED;
6795}
6796
Joonwoo Park03324832012-03-19 19:36:16 -07006797static int tabla_is_fake_press(struct tabla_priv *priv)
6798{
6799 int i;
6800 int r = 0;
6801 struct snd_soc_codec *codec = priv->codec;
6802 const int dces = MBHC_NUM_DCE_PLUG_DETECT;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006803 s16 mb_v, v_ins_hu, v_ins_h;
6804
6805 v_ins_hu = tabla_get_current_v_ins(priv, true);
6806 v_ins_h = tabla_get_current_v_ins(priv, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006807
6808 for (i = 0; i < dces; i++) {
6809 usleep_range(10000, 10000);
6810 if (i == 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006811 mb_v = tabla_codec_sta_dce(codec, 0, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006812 pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
6813 tabla_codec_sta_dce_v(codec, 0, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006814 if (mb_v < (s16)priv->mbhc_data.v_b1_hu ||
6815 mb_v > v_ins_hu) {
Joonwoo Park03324832012-03-19 19:36:16 -07006816 r = 1;
6817 break;
6818 }
6819 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006820 mb_v = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006821 pr_debug("%s: DCE[%d]: %d,%d\n", __func__, i, mb_v,
6822 tabla_codec_sta_dce_v(codec, 1, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006823 if (mb_v < (s16)priv->mbhc_data.v_b1_h ||
6824 mb_v > v_ins_h) {
Joonwoo Park03324832012-03-19 19:36:16 -07006825 r = 1;
6826 break;
6827 }
6828 }
6829 }
6830
6831 return r;
6832}
6833
Bradley Rubincb1e2732011-06-23 16:49:20 -07006834static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006835{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08006836 int ret;
Joonwoo Park816b8e62012-01-23 16:03:21 -08006837 struct tabla_priv *priv = data;
6838 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006839
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006840 pr_debug("%s: enter\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006841
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006842 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6843 priv->mbhc_state = MBHC_STATE_RELEASE;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006844
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006845 tabla_codec_drive_v_to_micbias(codec, 10000);
6846
Joonwoo Park03324832012-03-19 19:36:16 -07006847 if (priv->buttons_pressed & TABLA_JACK_BUTTON_MASK) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006848 ret = tabla_cancel_btn_work(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006849 if (ret == 0) {
Joonwoo Park03324832012-03-19 19:36:16 -07006850 pr_debug("%s: Reporting long button release event\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006851 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006852 if (priv->mbhc_cfg.button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006853 tabla_snd_soc_jack_report(priv,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006854 priv->mbhc_cfg.button_jack, 0,
6855 priv->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006856 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006857 if (tabla_is_fake_press(priv)) {
6858 pr_debug("%s: Fake button press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006859 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006860 } else if (priv->mbhc_cfg.button_jack) {
6861 if (priv->in_gpio_handler) {
6862 pr_debug("%s: GPIO kicked in, ignore\n",
6863 __func__);
6864 } else {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006865 pr_debug("%s: Reporting short button "
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006866 "press and release\n",
6867 __func__);
6868 tabla_snd_soc_jack_report(priv,
6869 priv->mbhc_cfg.button_jack,
6870 priv->buttons_pressed,
6871 priv->buttons_pressed);
6872 tabla_snd_soc_jack_report(priv,
6873 priv->mbhc_cfg.button_jack, 0,
6874 priv->buttons_pressed);
6875 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006876 }
6877 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006878
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006879 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
6880 }
6881
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006882 /* revert narrowed release threshold */
6883 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park03324832012-03-19 19:36:16 -07006884 tabla_codec_calibrate_hs_polling(codec);
6885
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006886 if (priv->mbhc_cfg.gpio)
6887 msleep(TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS);
Joonwoo Park03324832012-03-19 19:36:16 -07006888
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006889 tabla_codec_start_hs_polling(codec);
6890
6891 pr_debug("%s: leave\n", __func__);
6892 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006893 return IRQ_HANDLED;
6894}
6895
Bradley Rubincb1e2732011-06-23 16:49:20 -07006896static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
6897{
6898 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08006899 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006900 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006901
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006902 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006903 tabla_codec_enable_config_mode(codec, 1);
6904
6905 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
6906 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006907
Joonwoo Park0976d012011-12-22 11:48:18 -08006908 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
6909
6910 usleep_range(generic->t_shutdown_plug_rem,
6911 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006912
6913 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006914 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006915 tabla_codec_enable_config_mode(codec, 0);
6916
6917 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
6918}
6919
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006920static void tabla_codec_cleanup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006921{
6922 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006923
6924 tabla_codec_shutdown_hs_removal_detect(codec);
6925
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006926 if (!tabla->mclk_enabled) {
Asish Bhattacharya486745a2012-01-20 06:41:53 +05306927 tabla_codec_disable_clock_block(codec);
6928 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006929 }
6930
6931 tabla->mbhc_polling_active = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006932 tabla->mbhc_state = MBHC_STATE_NONE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006933}
6934
Patrick Lai49efeac2011-11-03 11:01:12 -07006935static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
6936{
6937 struct tabla_priv *tabla = data;
6938 struct snd_soc_codec *codec;
6939
6940 pr_info("%s: received HPHL OCP irq\n", __func__);
6941
6942 if (tabla) {
6943 codec = tabla->codec;
Patrick Laic2d833d2012-07-06 22:42:52 -07006944 if ((tabla->hphlocp_cnt < TABLA_OCP_ATTEMPT) &&
6945 (!tabla->hphrocp_cnt)) {
Patrick Laic7cae882011-11-18 11:52:49 -08006946 pr_info("%s: retry\n", __func__);
Patrick Laic2d833d2012-07-06 22:42:52 -07006947 tabla->hphlocp_cnt++;
Patrick Laic7cae882011-11-18 11:52:49 -08006948 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6949 0x00);
6950 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6951 0x10);
6952 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306953 wcd9xxx_disable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006954 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Laic7cae882011-11-18 11:52:49 -08006955 tabla->hph_status |= SND_JACK_OC_HPHL;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006956 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006957 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006958 tabla->mbhc_cfg.headset_jack,
6959 tabla->hph_status,
6960 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006961 }
6962 } else {
6963 pr_err("%s: Bad tabla private data\n", __func__);
6964 }
6965
6966 return IRQ_HANDLED;
6967}
6968
6969static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
6970{
6971 struct tabla_priv *tabla = data;
6972 struct snd_soc_codec *codec;
6973
6974 pr_info("%s: received HPHR OCP irq\n", __func__);
6975
6976 if (tabla) {
6977 codec = tabla->codec;
Patrick Laic2d833d2012-07-06 22:42:52 -07006978 if ((tabla->hphrocp_cnt < TABLA_OCP_ATTEMPT) &&
6979 (!tabla->hphlocp_cnt)) {
Patrick Laic7cae882011-11-18 11:52:49 -08006980 pr_info("%s: retry\n", __func__);
Patrick Laic2d833d2012-07-06 22:42:52 -07006981 tabla->hphrocp_cnt++;
Patrick Laic7cae882011-11-18 11:52:49 -08006982 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6983 0x00);
6984 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6985 0x10);
6986 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306987 wcd9xxx_disable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006988 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Patrick Laic7cae882011-11-18 11:52:49 -08006989 tabla->hph_status |= SND_JACK_OC_HPHR;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006990 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006991 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006992 tabla->mbhc_cfg.headset_jack,
6993 tabla->hph_status,
6994 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006995 }
6996 } else {
6997 pr_err("%s: Bad tabla private data\n", __func__);
6998 }
6999
7000 return IRQ_HANDLED;
7001}
7002
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007003static bool tabla_is_inval_ins_range(struct snd_soc_codec *codec,
7004 s32 mic_volt, bool highhph, bool *highv)
Joonwoo Park03324832012-03-19 19:36:16 -07007005{
7006 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007007 bool invalid = false;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007008 s16 v_hs_max;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007009
7010 /* Perform this check only when the high voltage headphone
7011 * needs to be considered as invalid
7012 */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007013 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007014 *highv = mic_volt > v_hs_max;
7015 if (!highhph && *highv)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007016 invalid = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007017 else if (mic_volt < tabla->mbhc_data.v_inval_ins_high &&
7018 (mic_volt > tabla->mbhc_data.v_inval_ins_low))
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007019 invalid = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007020
7021 return invalid;
7022}
7023
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007024static bool tabla_is_inval_ins_delta(struct snd_soc_codec *codec,
7025 int mic_volt, int mic_volt_prev,
7026 int threshold)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007027{
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007028 return abs(mic_volt - mic_volt_prev) > threshold;
Joonwoo Park03324832012-03-19 19:36:16 -07007029}
7030
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007031/* called under codec_resource_lock acquisition */
7032void tabla_find_plug_and_report(struct snd_soc_codec *codec,
7033 enum tabla_mbhc_plug_type plug_type)
Joonwoo Park03324832012-03-19 19:36:16 -07007034{
7035 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007036
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007037 pr_debug("%s: enter current_plug(%d) new_plug(%d)\n",
7038 __func__, tabla->current_plug, plug_type);
7039
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007040 if (plug_type == PLUG_TYPE_HEADPHONE &&
7041 tabla->current_plug == PLUG_TYPE_NONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007042 /* Nothing was reported previously
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007043 * report a headphone or unsupported
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007044 */
7045 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
7046 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007047 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007048 if (!tabla->mbhc_cfg.detect_extn_cable) {
7049 if (tabla->current_plug == PLUG_TYPE_HEADSET)
7050 tabla_codec_report_plug(codec, 0,
7051 SND_JACK_HEADSET);
7052 else if (tabla->current_plug == PLUG_TYPE_HEADPHONE)
7053 tabla_codec_report_plug(codec, 0,
7054 SND_JACK_HEADPHONE);
7055 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007056 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
7057 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007058 } else if (plug_type == PLUG_TYPE_HEADSET) {
7059 /* If Headphone was reported previously, this will
7060 * only report the mic line
7061 */
7062 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
Simmi Pateriya21375012012-11-26 23:06:01 +05307063 if (!tabla->mbhc_micbias_switched &&
7064 tabla_is_hph_pa_on(codec)) {
7065 /*If the headphone path is on, switch the micbias
7066 to VDDIO to avoid noise due to button polling */
7067 tabla_codec_switch_micbias(codec, 1);
7068 pr_debug("%s: HPH path is still up\n", __func__);
7069 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007070 msleep(100);
7071 tabla_codec_start_hs_polling(codec);
7072 } else if (plug_type == PLUG_TYPE_HIGH_HPH) {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007073 if (tabla->mbhc_cfg.detect_extn_cable) {
7074 /* High impedance device found. Report as LINEOUT*/
7075 tabla_codec_report_plug(codec, 1, SND_JACK_LINEOUT);
7076 tabla_codec_cleanup_hs_polling(codec);
7077 pr_debug("%s: setup mic trigger for further detection\n",
7078 __func__);
7079 tabla->lpi_enabled = true;
7080 /*
7081 * Do not enable HPHL trigger. If playback is active,
7082 * it might lead to continuous false HPHL triggers
7083 */
7084 tabla_codec_enable_hs_detect(codec, 1,
7085 MBHC_USE_MB_TRIGGER,
7086 false);
7087 } else {
7088 if (tabla->current_plug == PLUG_TYPE_NONE)
7089 tabla_codec_report_plug(codec, 1,
7090 SND_JACK_HEADPHONE);
7091 tabla_codec_cleanup_hs_polling(codec);
7092 pr_debug("setup mic trigger for further detection\n");
7093 tabla->lpi_enabled = true;
7094 tabla_codec_enable_hs_detect(codec, 1,
7095 MBHC_USE_MB_TRIGGER |
7096 MBHC_USE_HPHL_TRIGGER,
7097 false);
7098 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007099 } else {
7100 WARN(1, "Unexpected current plug_type %d, plug_type %d\n",
7101 tabla->current_plug, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007102 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007103 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007104}
7105
7106/* should be called under interrupt context that hold suspend */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007107static void tabla_schedule_hs_detect_plug(struct tabla_priv *tabla,
7108 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007109{
7110 pr_debug("%s: scheduling tabla_hs_correct_gpio_plug\n", __func__);
7111 tabla->hs_detect_work_stop = false;
7112 wcd9xxx_lock_sleep(tabla->codec->control_data);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007113 schedule_work(correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007114}
7115
7116/* called under codec_resource_lock acquisition */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007117static void tabla_cancel_hs_detect_plug(struct tabla_priv *tabla,
7118 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007119{
7120 pr_debug("%s: canceling hs_correct_plug_work\n", __func__);
7121 tabla->hs_detect_work_stop = true;
7122 wmb();
7123 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007124 if (cancel_work_sync(correct_plug_work)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007125 pr_debug("%s: hs_correct_plug_work is canceled\n", __func__);
7126 wcd9xxx_unlock_sleep(tabla->codec->control_data);
7127 }
7128 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7129}
7130
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007131static bool tabla_hs_gpio_level_remove(struct tabla_priv *tabla)
7132{
7133 return (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) !=
7134 tabla->mbhc_cfg.gpio_level_insert);
7135}
7136
Joonwoo Park41956722012-04-18 13:13:07 -07007137/* called under codec_resource_lock acquisition */
7138static void tabla_codec_hphr_gnd_switch(struct snd_soc_codec *codec, bool on)
7139{
7140 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, on);
7141 if (on)
7142 usleep_range(5000, 5000);
7143}
7144
7145/* called under codec_resource_lock acquisition and mbhc override = 1 */
7146static enum tabla_mbhc_plug_type
7147tabla_codec_get_plug_type(struct snd_soc_codec *codec, bool highhph)
7148{
7149 int i;
7150 bool gndswitch, vddioswitch;
7151 int scaled;
7152 struct tabla_mbhc_plug_type_cfg *plug_type_ptr;
7153 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Simmi Pateriya71d63872012-11-08 01:06:30 +05307154 const bool vddio = !tabla->mbhc_cfg.micbias_always_on &&
7155 (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV);
7156 int num_det = (MBHC_NUM_DCE_PLUG_DETECT + vddio);
Joonwoo Park41956722012-04-18 13:13:07 -07007157 enum tabla_mbhc_plug_type plug_type[num_det];
7158 s16 mb_v[num_det];
7159 s32 mic_mv[num_det];
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007160 bool inval;
Ravi Kumar Alamanda1c713b22012-09-27 17:14:27 -07007161 bool highdelta = false;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007162 bool ahighv = false, highv;
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07007163 bool gndmicswapped = false;
Joonwoo Park41956722012-04-18 13:13:07 -07007164
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007165 pr_debug("%s: enter\n", __func__);
7166
Joonwoo Park41956722012-04-18 13:13:07 -07007167 /* make sure override is on */
7168 WARN_ON(!(snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04));
7169
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007170 /* GND and MIC swap detection requires at least 2 rounds of DCE */
7171 BUG_ON(num_det < 2);
7172
7173 plug_type_ptr =
7174 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
7175
7176 plug_type[0] = PLUG_TYPE_INVALID;
7177
Joonwoo Park41956722012-04-18 13:13:07 -07007178 /* performs DCEs for N times
7179 * 1st: check if voltage is in invalid range
7180 * 2nd - N-2nd: check voltage range and delta
7181 * N-1st: check voltage range, delta with HPHR GND switch
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07007182 * Nth: check voltage range with VDDIO switch */
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007183 for (i = 0; i < num_det; i++) {
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07007184 gndswitch = (i == (num_det - 2));
7185 vddioswitch = (i == (num_det - 1)) || (i == (num_det - 2));
Joonwoo Park41956722012-04-18 13:13:07 -07007186 if (i == 0) {
7187 mb_v[i] = tabla_codec_setup_hs_polling(codec);
7188 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007189 inval = tabla_is_inval_ins_range(codec, mic_mv[i],
7190 highhph, &highv);
7191 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07007192 scaled = mic_mv[i];
Joonwoo Park41956722012-04-18 13:13:07 -07007193 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007194 if (vddioswitch)
7195 __tabla_codec_switch_micbias(tabla->codec, 1,
7196 false, false);
Joonwoo Park41956722012-04-18 13:13:07 -07007197 if (gndswitch)
7198 tabla_codec_hphr_gnd_switch(codec, true);
7199 mb_v[i] = __tabla_codec_sta_dce(codec, 1, true, true);
7200 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007201 if (vddioswitch)
7202 scaled = tabla_scale_v_micb_vddio(tabla,
Joonwoo Park41956722012-04-18 13:13:07 -07007203 mic_mv[i],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007204 false);
7205 else
7206 scaled = mic_mv[i];
7207 /* !gndswitch & vddioswitch means the previous DCE
7208 * was done with gndswitch, don't compare with DCE
7209 * with gndswitch */
7210 highdelta = tabla_is_inval_ins_delta(codec, scaled,
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07007211 mic_mv[i - 1],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007212 TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV);
7213 inval = (tabla_is_inval_ins_range(codec, mic_mv[i],
7214 highhph, &highv) ||
7215 highdelta);
7216 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07007217 if (gndswitch)
7218 tabla_codec_hphr_gnd_switch(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007219 if (vddioswitch)
7220 __tabla_codec_switch_micbias(tabla->codec, 0,
7221 false, false);
Joonwoo Park41956722012-04-18 13:13:07 -07007222 }
7223 pr_debug("%s: DCE #%d, %04x, V %d, scaled V %d, GND %d, "
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007224 "VDDIO %d, inval %d\n", __func__,
Joonwoo Park41956722012-04-18 13:13:07 -07007225 i + 1, mb_v[i] & 0xffff, mic_mv[i], scaled, gndswitch,
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007226 vddioswitch, inval);
7227 /* don't need to run further DCEs */
Ravi Kumar Alamanda1c713b22012-09-27 17:14:27 -07007228 if ((ahighv || !vddioswitch) && inval)
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007229 break;
7230 mic_mv[i] = scaled;
Ravi Kumar Alamanda1c713b22012-09-27 17:14:27 -07007231
7232 /*
7233 * claim UNSUPPORTED plug insertion when
7234 * good headset is detected but HPHR GND switch makes
7235 * delta difference
7236 */
7237 if (i == (num_det - 2) && highdelta && !ahighv)
7238 gndmicswapped = true;
7239 else if (i == (num_det - 1) && inval) {
7240 if (gndmicswapped)
7241 plug_type[0] = PLUG_TYPE_GND_MIC_SWAP;
7242 else
7243 plug_type[0] = PLUG_TYPE_INVALID;
7244 }
Joonwoo Park41956722012-04-18 13:13:07 -07007245 }
7246
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007247 for (i = 0; (plug_type[0] != PLUG_TYPE_GND_MIC_SWAP && !inval) &&
7248 i < num_det; i++) {
Joonwoo Park41956722012-04-18 13:13:07 -07007249 /*
7250 * If we are here, means none of the all
7251 * measurements are fake, continue plug type detection.
7252 * If all three measurements do not produce same
7253 * plug type, restart insertion detection
7254 */
7255 if (mic_mv[i] < plug_type_ptr->v_no_mic) {
7256 plug_type[i] = PLUG_TYPE_HEADPHONE;
7257 pr_debug("%s: Detect attempt %d, detected Headphone\n",
7258 __func__, i);
7259 } else if (highhph && (mic_mv[i] > plug_type_ptr->v_hs_max)) {
7260 plug_type[i] = PLUG_TYPE_HIGH_HPH;
7261 pr_debug("%s: Detect attempt %d, detected High "
7262 "Headphone\n", __func__, i);
7263 } else {
7264 plug_type[i] = PLUG_TYPE_HEADSET;
7265 pr_debug("%s: Detect attempt %d, detected Headset\n",
7266 __func__, i);
7267 }
7268
7269 if (i > 0 && (plug_type[i - 1] != plug_type[i])) {
7270 pr_err("%s: Detect attempt %d and %d are not same",
7271 __func__, i - 1, i);
7272 plug_type[0] = PLUG_TYPE_INVALID;
7273 inval = true;
7274 break;
7275 }
7276 }
7277
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007278 pr_debug("%s: Detected plug type %d\n", __func__, plug_type[0]);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007279 pr_debug("%s: leave\n", __func__);
Joonwoo Park41956722012-04-18 13:13:07 -07007280 return plug_type[0];
7281}
7282
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007283static void tabla_hs_correct_gpio_plug(struct work_struct *work)
7284{
7285 struct tabla_priv *tabla;
7286 struct snd_soc_codec *codec;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007287 int retry = 0, pt_gnd_mic_swap_cnt = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007288 bool correction = false;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007289 enum tabla_mbhc_plug_type plug_type = PLUG_TYPE_INVALID;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007290 unsigned long timeout;
7291
7292 tabla = container_of(work, struct tabla_priv, hs_correct_plug_work);
7293 codec = tabla->codec;
7294
7295 pr_debug("%s: enter\n", __func__);
7296 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7297
7298 /* Keep override on during entire plug type correction work.
7299 *
7300 * This is okay under the assumption that any GPIO irqs which use
7301 * MBHC block cancel and sync this work so override is off again
7302 * prior to GPIO interrupt handler's MBHC block usage.
7303 * Also while this correction work is running, we can guarantee
7304 * DAPM doesn't use any MBHC block as this work only runs with
7305 * headphone detection.
7306 */
7307 tabla_turn_onoff_override(codec, true);
7308
7309 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7310 while (!time_after(jiffies, timeout)) {
7311 ++retry;
7312 rmb();
7313 if (tabla->hs_detect_work_stop) {
7314 pr_debug("%s: stop requested\n", __func__);
7315 break;
7316 }
7317
7318 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
7319 if (tabla_hs_gpio_level_remove(tabla)) {
7320 pr_debug("%s: GPIO value is low\n", __func__);
7321 break;
7322 }
7323
7324 /* can race with removal interrupt */
7325 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park41956722012-04-18 13:13:07 -07007326 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007327 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7328
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007329 pr_debug("%s: attempt(%d) current_plug(%d) new_plug(%d)\n",
7330 __func__, retry, tabla->current_plug, plug_type);
Joonwoo Park41956722012-04-18 13:13:07 -07007331 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007332 pr_debug("Invalid plug in attempt # %d\n", retry);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007333 if (!tabla->mbhc_cfg.detect_extn_cable &&
7334 retry == NUM_ATTEMPTS_TO_REPORT &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007335 tabla->current_plug == PLUG_TYPE_NONE) {
7336 tabla_codec_report_plug(codec, 1,
7337 SND_JACK_HEADPHONE);
7338 }
Joonwoo Park41956722012-04-18 13:13:07 -07007339 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007340 pr_debug("Good headphone detected, continue polling mic\n");
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007341 if (tabla->mbhc_cfg.detect_extn_cable) {
7342 if (tabla->current_plug != plug_type)
7343 tabla_codec_report_plug(codec, 1,
7344 SND_JACK_HEADPHONE);
7345 } else if (tabla->current_plug == PLUG_TYPE_NONE)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007346 tabla_codec_report_plug(codec, 1,
7347 SND_JACK_HEADPHONE);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007348 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007349 if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
7350 pt_gnd_mic_swap_cnt++;
7351 if (pt_gnd_mic_swap_cnt <
7352 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD)
7353 continue;
7354 else if (pt_gnd_mic_swap_cnt >
7355 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD) {
7356 /* This is due to GND/MIC switch didn't
7357 * work, Report unsupported plug */
7358 } else if (tabla->mbhc_cfg.swap_gnd_mic) {
7359 /* if switch is toggled, check again,
7360 * otherwise report unsupported plug */
7361 if (tabla->mbhc_cfg.swap_gnd_mic(codec))
7362 continue;
7363 }
7364 } else
7365 pt_gnd_mic_swap_cnt = 0;
7366
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007367 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7368 /* Turn off override */
7369 tabla_turn_onoff_override(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007370 /* The valid plug also includes PLUG_TYPE_GND_MIC_SWAP
7371 */
Joonwoo Park41956722012-04-18 13:13:07 -07007372 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007373 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7374 pr_debug("Attempt %d found correct plug %d\n", retry,
Joonwoo Park41956722012-04-18 13:13:07 -07007375 plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007376 correction = true;
7377 break;
7378 }
7379 }
7380
7381 /* Turn off override */
7382 if (!correction)
7383 tabla_turn_onoff_override(codec, false);
7384
7385 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007386
7387 if (tabla->mbhc_cfg.detect_extn_cable) {
7388 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7389 if (tabla->current_plug == PLUG_TYPE_HEADPHONE ||
7390 tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP ||
7391 tabla->current_plug == PLUG_TYPE_INVALID ||
7392 plug_type == PLUG_TYPE_INVALID) {
7393 /* Enable removal detection */
7394 tabla_codec_cleanup_hs_polling(codec);
7395 tabla_codec_enable_hs_detect(codec, 0, 0, false);
7396 }
7397 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7398 }
7399 pr_debug("%s: leave current_plug(%d)\n",
7400 __func__, tabla->current_plug);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007401 /* unlock sleep */
7402 wcd9xxx_unlock_sleep(tabla->codec->control_data);
7403}
7404
7405/* called under codec_resource_lock acquisition */
7406static void tabla_codec_decide_gpio_plug(struct snd_soc_codec *codec)
7407{
Joonwoo Park41956722012-04-18 13:13:07 -07007408 enum tabla_mbhc_plug_type plug_type;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007409 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007410
7411 pr_debug("%s: enter\n", __func__);
7412
7413 tabla_turn_onoff_override(codec, true);
Joonwoo Park41956722012-04-18 13:13:07 -07007414 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007415 tabla_turn_onoff_override(codec, false);
7416
7417 if (tabla_hs_gpio_level_remove(tabla)) {
7418 pr_debug("%s: GPIO value is low when determining plug\n",
7419 __func__);
7420 return;
7421 }
7422
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007423 if (plug_type == PLUG_TYPE_INVALID ||
7424 plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007425 tabla_schedule_hs_detect_plug(tabla,
7426 &tabla->hs_correct_plug_work);
Joonwoo Park41956722012-04-18 13:13:07 -07007427 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007428 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
7429
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007430 tabla_schedule_hs_detect_plug(tabla,
7431 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007432 } else {
Joonwoo Park41956722012-04-18 13:13:07 -07007433 pr_debug("%s: Valid plug found, determine plug type %d\n",
7434 __func__, plug_type);
7435 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007436 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007437 pr_debug("%s: leave\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007438}
7439
7440/* called under codec_resource_lock acquisition */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007441static void tabla_codec_detect_plug_type(struct snd_soc_codec *codec)
7442{
Joonwoo Park41956722012-04-18 13:13:07 -07007443 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007444 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7445 const struct tabla_mbhc_plug_detect_cfg *plug_det =
7446 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007447 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007448 /* Turn on the override,
7449 * tabla_codec_setup_hs_polling requires override on */
7450 tabla_turn_onoff_override(codec, true);
Joonwoo Park03324832012-03-19 19:36:16 -07007451
7452 if (plug_det->t_ins_complete > 20)
7453 msleep(plug_det->t_ins_complete);
7454 else
7455 usleep_range(plug_det->t_ins_complete * 1000,
7456 plug_det->t_ins_complete * 1000);
7457
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007458 if (tabla->mbhc_cfg.gpio) {
7459 /* Turn off the override */
7460 tabla_turn_onoff_override(codec, false);
7461 if (tabla_hs_gpio_level_remove(tabla))
7462 pr_debug("%s: GPIO value is low when determining "
7463 "plug\n", __func__);
7464 else
7465 tabla_codec_decide_gpio_plug(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007466 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007467 return;
7468 }
7469
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007470 plug_type = tabla_codec_get_plug_type(codec, false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007471 tabla_turn_onoff_override(codec, false);
Joonwoo Park03324832012-03-19 19:36:16 -07007472
Joonwoo Park41956722012-04-18 13:13:07 -07007473 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007474 pr_debug("%s: Invalid plug type detected\n", __func__);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007475 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007476 tabla_codec_cleanup_hs_polling(codec);
7477 tabla_codec_enable_hs_detect(codec, 1,
7478 MBHC_USE_MB_TRIGGER |
7479 MBHC_USE_HPHL_TRIGGER, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007480 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
7481 pr_debug("%s: GND-MIC swapped plug type detected\n", __func__);
7482 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
7483 tabla_codec_cleanup_hs_polling(codec);
7484 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Joonwoo Park41956722012-04-18 13:13:07 -07007485 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Park03324832012-03-19 19:36:16 -07007486 pr_debug("%s: Headphone Detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007487 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
7488 tabla_codec_cleanup_hs_polling(codec);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007489 tabla_schedule_hs_detect_plug(tabla,
7490 &tabla->hs_correct_plug_work_nogpio);
Joonwoo Park41956722012-04-18 13:13:07 -07007491 } else if (plug_type == PLUG_TYPE_HEADSET) {
Joonwoo Park03324832012-03-19 19:36:16 -07007492 pr_debug("%s: Headset detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007493 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
Joonwoo Park03324832012-03-19 19:36:16 -07007494 /* avoid false button press detect */
7495 msleep(50);
Joonwoo Park03324832012-03-19 19:36:16 -07007496 tabla_codec_start_hs_polling(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007497 } else if (tabla->mbhc_cfg.detect_extn_cable &&
7498 plug_type == PLUG_TYPE_HIGH_HPH) {
7499 pr_debug("%s: High impedance plug type detected\n", __func__);
7500 tabla_codec_report_plug(codec, 1, SND_JACK_LINEOUT);
7501 /* Enable insertion detection on the other end of cable */
7502 tabla_codec_cleanup_hs_polling(codec);
7503 tabla_codec_enable_hs_detect(codec, 1,
7504 MBHC_USE_MB_TRIGGER, false);
Joonwoo Park03324832012-03-19 19:36:16 -07007505 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007506 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07007507}
7508
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007509/* called only from interrupt which is under codec_resource_lock acquisition */
7510static void tabla_hs_insert_irq_gpio(struct tabla_priv *priv, bool is_removal)
Bradley Rubincb1e2732011-06-23 16:49:20 -07007511{
Bradley Rubincb1e2732011-06-23 16:49:20 -07007512 struct snd_soc_codec *codec = priv->codec;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007513 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007514
7515 if (!is_removal) {
7516 pr_debug("%s: MIC trigger insertion interrupt\n", __func__);
7517
7518 rmb();
7519 if (priv->lpi_enabled)
7520 msleep(100);
7521
7522 rmb();
7523 if (!priv->lpi_enabled) {
7524 pr_debug("%s: lpi is disabled\n", __func__);
7525 } else if (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
7526 priv->mbhc_cfg.gpio_level_insert) {
7527 pr_debug("%s: Valid insertion, "
7528 "detect plug type\n", __func__);
7529 tabla_codec_decide_gpio_plug(codec);
7530 } else {
7531 pr_debug("%s: Invalid insertion, "
7532 "stop plug detection\n", __func__);
7533 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007534 } else if (tabla->mbhc_cfg.detect_extn_cable) {
7535 pr_debug("%s: Removal\n", __func__);
7536 if (!tabla_hs_gpio_level_remove(tabla)) {
7537 /*
7538 * gpio says, something is still inserted, could be
7539 * extension cable i.e. headset is removed from
7540 * extension cable
7541 */
7542 /* cancel detect plug */
7543 tabla_cancel_hs_detect_plug(tabla,
7544 &tabla->hs_correct_plug_work);
7545 tabla_codec_decide_gpio_plug(codec);
7546 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007547 } else {
7548 pr_err("%s: GPIO used, invalid MBHC Removal\n", __func__);
7549 }
7550}
7551
7552/* called only from interrupt which is under codec_resource_lock acquisition */
7553static void tabla_hs_insert_irq_nogpio(struct tabla_priv *priv, bool is_removal,
7554 bool is_mb_trigger)
7555{
Joonwoo Park03324832012-03-19 19:36:16 -07007556 int ret;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007557 struct snd_soc_codec *codec = priv->codec;
7558 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007559 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7560
7561 /* Cancel possibly running hs_detect_work */
7562 tabla_cancel_hs_detect_plug(tabla,
7563 &tabla->hs_correct_plug_work_nogpio);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07007564
7565 if (is_removal) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007566
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07007567 /*
7568 * If headphone is removed while playback is in progress,
7569 * it is possible that micbias will be switched to VDDIO.
7570 */
Joonwoo Park03324832012-03-19 19:36:16 -07007571 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007572 if (priv->current_plug == PLUG_TYPE_HEADPHONE)
7573 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
7574 else if (priv->current_plug == PLUG_TYPE_GND_MIC_SWAP)
7575 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
7576 else
7577 WARN(1, "%s: Unexpected current plug type %d\n",
7578 __func__, priv->current_plug);
Bradley Rubincb1e2732011-06-23 16:49:20 -07007579 tabla_codec_shutdown_hs_removal_detect(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007580 tabla_codec_enable_hs_detect(codec, 1,
7581 MBHC_USE_MB_TRIGGER |
7582 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07007583 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007584 } else if (is_mb_trigger && !is_removal) {
Joonwoo Park03324832012-03-19 19:36:16 -07007585 pr_debug("%s: Waiting for Headphone left trigger\n",
7586 __func__);
7587 wcd9xxx_lock_sleep(core);
7588 if (schedule_delayed_work(&priv->mbhc_insert_dwork,
7589 usecs_to_jiffies(1000000)) == 0) {
7590 pr_err("%s: mbhc_insert_dwork is already scheduled\n",
7591 __func__);
7592 wcd9xxx_unlock_sleep(core);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08007593 }
Joonwoo Park03324832012-03-19 19:36:16 -07007594 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
7595 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007596 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007597 ret = cancel_delayed_work(&priv->mbhc_insert_dwork);
7598 if (ret != 0) {
7599 pr_debug("%s: Complete plug insertion, Detecting plug "
7600 "type\n", __func__);
7601 tabla_codec_detect_plug_type(codec);
7602 wcd9xxx_unlock_sleep(core);
7603 } else {
7604 wcd9xxx_enable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007605 WCD9XXX_IRQ_MBHC_INSERTION);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007606 pr_err("%s: Error detecting plug insertion\n",
7607 __func__);
7608 }
Joonwoo Park03324832012-03-19 19:36:16 -07007609 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007610}
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08007611
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007612/* called only from interrupt which is under codec_resource_lock acquisition */
7613static void tabla_hs_insert_irq_extn(struct tabla_priv *priv,
7614 bool is_mb_trigger)
7615{
7616 struct snd_soc_codec *codec = priv->codec;
7617 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7618
7619 /* Cancel possibly running hs_detect_work */
7620 tabla_cancel_hs_detect_plug(tabla,
7621 &tabla->hs_correct_plug_work);
7622
7623 if (is_mb_trigger) {
7624 pr_debug("%s: Waiting for Headphone left trigger\n",
7625 __func__);
7626 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
7627 false);
7628 } else {
7629 pr_debug("%s: HPHL trigger received, detecting plug type\n",
7630 __func__);
7631 tabla_codec_detect_plug_type(codec);
7632 }
7633}
7634
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007635static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
7636{
7637 bool is_mb_trigger, is_removal;
7638 struct tabla_priv *priv = data;
7639 struct snd_soc_codec *codec = priv->codec;
Bradley Rubincb1e2732011-06-23 16:49:20 -07007640
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007641 pr_debug("%s: enter\n", __func__);
7642 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007643 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007644
7645 is_mb_trigger = !!(snd_soc_read(codec, priv->mbhc_bias_regs.mbhc_reg) &
7646 0x10);
7647 is_removal = !!(snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02);
7648 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
7649
7650 /* Turn off both HPH and MIC line schmitt triggers */
7651 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
7652 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
7653 snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
7654
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007655 if (priv->mbhc_cfg.detect_extn_cable &&
7656 priv->current_plug == PLUG_TYPE_HIGH_HPH)
7657 tabla_hs_insert_irq_extn(priv, is_mb_trigger);
7658 else if (priv->mbhc_cfg.gpio)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007659 tabla_hs_insert_irq_gpio(priv, is_removal);
7660 else
7661 tabla_hs_insert_irq_nogpio(priv, is_removal, is_mb_trigger);
7662
7663 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bradley Rubincb1e2732011-06-23 16:49:20 -07007664 return IRQ_HANDLED;
7665}
7666
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007667static bool is_valid_mic_voltage(struct snd_soc_codec *codec, s32 mic_mv)
7668{
7669 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007670 const struct tabla_mbhc_plug_type_cfg *plug_type =
7671 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
7672 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007673
7674 return (!(mic_mv > 10 && mic_mv < 80) && (mic_mv > plug_type->v_no_mic)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007675 && (mic_mv < v_hs_max)) ? true : false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007676}
7677
7678/* called under codec_resource_lock acquisition
7679 * returns true if mic voltage range is back to normal insertion
7680 * returns false either if timedout or removed */
7681static bool tabla_hs_remove_settle(struct snd_soc_codec *codec)
7682{
7683 int i;
7684 bool timedout, settled = false;
7685 s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
7686 short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
7687 unsigned long retry = 0, timeout;
7688 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007689 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007690
7691 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7692 while (!(timedout = time_after(jiffies, timeout))) {
7693 retry++;
7694 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7695 pr_debug("%s: GPIO indicates removal\n", __func__);
7696 break;
7697 }
7698
7699 if (tabla->mbhc_cfg.gpio) {
7700 if (retry > 1)
7701 msleep(250);
7702 else
7703 msleep(50);
7704 }
7705
7706 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7707 pr_debug("%s: GPIO indicates removal\n", __func__);
7708 break;
7709 }
7710
7711 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
7712 mb_v[i] = tabla_codec_sta_dce(codec, 1, true);
7713 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
7714 pr_debug("%s : DCE run %lu, mic_mv = %d(%x)\n",
7715 __func__, retry, mic_mv[i], mb_v[i]);
7716 }
7717
7718 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7719 pr_debug("%s: GPIO indicates removal\n", __func__);
7720 break;
7721 }
7722
7723 if (tabla->current_plug == PLUG_TYPE_NONE) {
7724 pr_debug("%s : headset/headphone is removed\n",
7725 __func__);
7726 break;
7727 }
7728
7729 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
7730 if (!is_valid_mic_voltage(codec, mic_mv[i]))
7731 break;
7732
7733 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
7734 pr_debug("%s: MIC voltage settled\n", __func__);
7735 settled = true;
7736 msleep(200);
7737 break;
7738 }
7739
7740 /* only for non-GPIO remove irq */
7741 if (!tabla->mbhc_cfg.gpio) {
7742 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007743 if (mic_mv[i] < v_hs_max)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007744 break;
7745 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
7746 pr_debug("%s: Headset is removed\n", __func__);
7747 break;
7748 }
7749 }
7750 }
7751
7752 if (timedout)
7753 pr_debug("%s: Microphone did not settle in %d seconds\n",
7754 __func__, TABLA_HS_DETECT_PLUG_TIME_MS);
7755 return settled;
7756}
7757
7758/* called only from interrupt which is under codec_resource_lock acquisition */
7759static void tabla_hs_remove_irq_gpio(struct tabla_priv *priv)
7760{
7761 struct snd_soc_codec *codec = priv->codec;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007762 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007763 if (tabla_hs_remove_settle(codec))
7764 tabla_codec_start_hs_polling(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007765 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007766}
7767
7768/* called only from interrupt which is under codec_resource_lock acquisition */
7769static void tabla_hs_remove_irq_nogpio(struct tabla_priv *priv)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007770{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007771 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007772 bool removed = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007773 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08007774 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007775 TABLA_MBHC_CAL_GENERAL_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007776 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007777
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007778 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007779 if (priv->current_plug != PLUG_TYPE_HEADSET) {
7780 pr_debug("%s(): Headset is not inserted, ignore removal\n",
7781 __func__);
7782 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7783 0x08, 0x08);
7784 return;
7785 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007786
Joonwoo Park0976d012011-12-22 11:48:18 -08007787 usleep_range(generic->t_shutdown_plug_rem,
7788 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007789
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007790 do {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007791 bias_value = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007792 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
7793 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007794 if (bias_value < tabla_get_current_v_ins(priv, false)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007795 pr_debug("%s: checking false removal\n", __func__);
7796 msleep(500);
7797 removed = !tabla_hs_remove_settle(codec);
7798 pr_debug("%s: headset %sactually removed\n", __func__,
7799 removed ? "" : "not ");
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007800 break;
7801 }
7802 min_us -= priv->mbhc_data.t_dce;
7803 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07007804
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007805 if (removed) {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007806 if (priv->mbhc_cfg.detect_extn_cable) {
7807 if (!tabla_hs_gpio_level_remove(priv)) {
7808 /*
7809 * extension cable is still plugged in
7810 * report it as LINEOUT device
7811 */
7812 tabla_codec_report_plug(codec, 1,
7813 SND_JACK_LINEOUT);
7814 tabla_codec_cleanup_hs_polling(codec);
7815 tabla_codec_enable_hs_detect(codec, 1,
7816 MBHC_USE_MB_TRIGGER,
7817 false);
7818 }
7819 } else {
7820 /* Cancel possibly running hs_detect_work */
7821 tabla_cancel_hs_detect_plug(priv,
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007822 &priv->hs_correct_plug_work_nogpio);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007823 /*
7824 * If this removal is not false, first check the micbias
7825 * switch status and switch it to LDOH if it is already
7826 * switched to VDDIO.
7827 */
7828 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park03324832012-03-19 19:36:16 -07007829
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007830 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
7831 tabla_codec_cleanup_hs_polling(codec);
7832 tabla_codec_enable_hs_detect(codec, 1,
7833 MBHC_USE_MB_TRIGGER |
7834 MBHC_USE_HPHL_TRIGGER,
7835 true);
7836 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007837 } else {
7838 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007839 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007840 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007841}
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007842
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007843static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
7844{
7845 struct tabla_priv *priv = data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007846 bool vddio;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007847 pr_debug("%s: enter, removal interrupt\n", __func__);
7848
7849 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Simmi Pateriya71d63872012-11-08 01:06:30 +05307850 vddio = !priv->mbhc_cfg.micbias_always_on &&
7851 (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007852 priv->mbhc_micbias_switched);
7853 if (vddio)
7854 __tabla_codec_switch_micbias(priv->codec, 0, false, true);
7855
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007856 if ((priv->mbhc_cfg.detect_extn_cable &&
7857 !tabla_hs_gpio_level_remove(priv)) ||
7858 !priv->mbhc_cfg.gpio) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007859 tabla_hs_remove_irq_nogpio(priv);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007860 } else
7861 tabla_hs_remove_irq_gpio(priv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007862
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007863 /* if driver turned off vddio switch and headset is not removed,
7864 * turn on the vddio switch back, if headset is removed then vddio
7865 * switch is off by time now and shouldn't be turn on again from here */
7866 if (vddio && priv->current_plug == PLUG_TYPE_HEADSET)
7867 __tabla_codec_switch_micbias(priv->codec, 1, true, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007868 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007869
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007870 return IRQ_HANDLED;
7871}
7872
Joonwoo Park03324832012-03-19 19:36:16 -07007873void mbhc_insert_work(struct work_struct *work)
7874{
7875 struct delayed_work *dwork;
7876 struct tabla_priv *tabla;
7877 struct snd_soc_codec *codec;
7878 struct wcd9xxx *tabla_core;
7879
7880 dwork = to_delayed_work(work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007881 tabla = container_of(dwork, struct tabla_priv, mbhc_insert_dwork);
Joonwoo Park03324832012-03-19 19:36:16 -07007882 codec = tabla->codec;
7883 tabla_core = dev_get_drvdata(codec->dev->parent);
7884
7885 pr_debug("%s:\n", __func__);
7886
7887 /* Turn off both HPH and MIC line schmitt triggers */
7888 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
7889 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
7890 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007891 wcd9xxx_disable_irq_sync(codec->control_data,
7892 WCD9XXX_IRQ_MBHC_INSERTION);
Joonwoo Park03324832012-03-19 19:36:16 -07007893 tabla_codec_detect_plug_type(codec);
7894 wcd9xxx_unlock_sleep(tabla_core);
7895}
7896
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007897static void tabla_hs_gpio_handler(struct snd_soc_codec *codec)
7898{
7899 bool insert;
7900 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -08007901 struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007902 bool is_removed = false;
7903
7904 pr_debug("%s: enter\n", __func__);
7905
7906 tabla->in_gpio_handler = true;
7907 /* Wait here for debounce time */
7908 usleep_range(TABLA_GPIO_IRQ_DEBOUNCE_TIME_US,
7909 TABLA_GPIO_IRQ_DEBOUNCE_TIME_US);
7910
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -08007911 wcd9xxx_nested_irq_lock(core);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007912 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7913
7914 /* cancel pending button press */
7915 if (tabla_cancel_btn_work(tabla))
7916 pr_debug("%s: button press is canceled\n", __func__);
7917
7918 insert = (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) ==
7919 tabla->mbhc_cfg.gpio_level_insert);
7920 if ((tabla->current_plug == PLUG_TYPE_NONE) && insert) {
7921 tabla->lpi_enabled = false;
7922 wmb();
7923
7924 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007925 tabla_cancel_hs_detect_plug(tabla,
7926 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007927
7928 /* Disable Mic Bias pull down and HPH Switch to GND */
7929 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01,
7930 0x00);
7931 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x00);
7932 tabla_codec_detect_plug_type(codec);
7933 } else if ((tabla->current_plug != PLUG_TYPE_NONE) && !insert) {
7934 tabla->lpi_enabled = false;
7935 wmb();
7936
7937 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007938 tabla_cancel_hs_detect_plug(tabla,
7939 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007940
7941 if (tabla->current_plug == PLUG_TYPE_HEADPHONE) {
7942 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
7943 is_removed = true;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007944 } else if (tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP) {
7945 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
7946 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007947 } else if (tabla->current_plug == PLUG_TYPE_HEADSET) {
7948 tabla_codec_pause_hs_polling(codec);
7949 tabla_codec_cleanup_hs_polling(codec);
7950 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
7951 is_removed = true;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007952 } else if (tabla->current_plug == PLUG_TYPE_HIGH_HPH) {
7953 tabla_codec_report_plug(codec, 0, SND_JACK_LINEOUT);
7954 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007955 }
7956
7957 if (is_removed) {
7958 /* Enable Mic Bias pull down and HPH Switch to GND */
7959 snd_soc_update_bits(codec,
7960 tabla->mbhc_bias_regs.ctl_reg, 0x01,
7961 0x01);
7962 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
7963 0x01);
7964 /* Make sure mic trigger is turned off */
7965 snd_soc_update_bits(codec,
7966 tabla->mbhc_bias_regs.ctl_reg,
7967 0x01, 0x01);
7968 snd_soc_update_bits(codec,
7969 tabla->mbhc_bias_regs.mbhc_reg,
7970 0x90, 0x00);
7971 /* Reset MBHC State Machine */
7972 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7973 0x08, 0x08);
7974 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7975 0x08, 0x00);
7976 /* Turn off override */
7977 tabla_turn_onoff_override(codec, false);
Simmi Pateriya21375012012-11-26 23:06:01 +05307978 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007979 }
7980 }
7981
7982 tabla->in_gpio_handler = false;
7983 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -08007984 wcd9xxx_nested_irq_unlock(core);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007985 pr_debug("%s: leave\n", __func__);
7986}
7987
7988static irqreturn_t tabla_mechanical_plug_detect_irq(int irq, void *data)
7989{
7990 int r = IRQ_HANDLED;
7991 struct snd_soc_codec *codec = data;
Joonwoo Parkecf379c2012-10-04 16:57:52 -07007992 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007993
7994 if (unlikely(wcd9xxx_lock_sleep(codec->control_data) == false)) {
7995 pr_warn("%s: failed to hold suspend\n", __func__);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07007996 /*
7997 * Give up this IRQ for now and resend this IRQ so IRQ can be
7998 * handled after system resume
7999 */
8000 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
8001 tabla->gpio_irq_resend = true;
8002 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8003 wake_lock_timeout(&tabla->irq_resend_wlock, HZ);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008004 r = IRQ_NONE;
8005 } else {
8006 tabla_hs_gpio_handler(codec);
8007 wcd9xxx_unlock_sleep(codec->control_data);
8008 }
8009
8010 return r;
8011}
8012
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07008013static void tabla_hs_correct_plug_nogpio(struct work_struct *work)
8014{
8015 struct tabla_priv *tabla;
8016 struct snd_soc_codec *codec;
8017 unsigned long timeout;
8018 int retry = 0;
8019 enum tabla_mbhc_plug_type plug_type;
8020 bool is_headset = false;
8021
8022 pr_debug("%s(): Poll Microphone voltage for %d seconds\n",
8023 __func__, TABLA_HS_DETECT_PLUG_TIME_MS / 1000);
8024
8025 tabla = container_of(work, struct tabla_priv,
8026 hs_correct_plug_work_nogpio);
8027 codec = tabla->codec;
8028
8029 /* Make sure the MBHC mux is connected to MIC Path */
8030 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
8031
8032 /* setup for microphone polling */
8033 tabla_turn_onoff_override(codec, true);
8034 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
8035
8036 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
8037 while (!time_after(jiffies, timeout)) {
8038 ++retry;
8039
8040 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
8041 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
8042 plug_type = tabla_codec_get_plug_type(codec, false);
8043 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8044
8045 if (plug_type == PLUG_TYPE_HIGH_HPH
8046 || plug_type == PLUG_TYPE_INVALID) {
8047
8048 /* this means the plug is removed
8049 * End microphone polling and setup
8050 * for low power removal detection.
8051 */
8052 pr_debug("%s(): Plug may be removed, setup removal\n",
8053 __func__);
8054 break;
8055 } else if (plug_type == PLUG_TYPE_HEADSET) {
8056 /* Plug is corrected from headphone to headset,
8057 * report headset and end the polling
8058 */
8059 is_headset = true;
8060 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
8061 tabla_turn_onoff_override(codec, false);
8062 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
8063 tabla_codec_start_hs_polling(codec);
8064 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8065 pr_debug("%s(): corrected from headphone to headset\n",
8066 __func__);
8067 break;
8068 }
8069 }
8070
8071 /* Undo setup for microphone polling depending
8072 * result from polling
8073 */
8074 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
8075 if (!is_headset) {
Bhalchandra Gajareafc86432012-08-23 13:44:07 -07008076 pr_debug("%s: Inserted headphone is not a headset\n",
8077 __func__);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07008078 tabla_turn_onoff_override(codec, false);
8079 tabla_codec_cleanup_hs_polling(codec);
8080 tabla_codec_enable_hs_detect(codec, 0, 0, false);
8081 }
8082 wcd9xxx_unlock_sleep(codec->control_data);
8083}
8084
Joonwoo Park1305bab2012-05-21 15:08:42 -07008085static int tabla_mbhc_init_and_calibrate(struct tabla_priv *tabla)
8086{
8087 int ret = 0;
8088 struct snd_soc_codec *codec = tabla->codec;
8089
8090 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
8091 tabla_mbhc_init(codec);
8092 tabla_mbhc_cal(codec);
8093 tabla_mbhc_calc_thres(codec);
8094 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
8095 tabla_codec_calibrate_hs_polling(codec);
8096 if (!tabla->mbhc_cfg.gpio) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07008097 INIT_WORK(&tabla->hs_correct_plug_work_nogpio,
8098 tabla_hs_correct_plug_nogpio);
Joonwoo Park1305bab2012-05-21 15:08:42 -07008099 ret = tabla_codec_enable_hs_detect(codec, 1,
8100 MBHC_USE_MB_TRIGGER |
8101 MBHC_USE_HPHL_TRIGGER,
8102 false);
8103
8104 if (IS_ERR_VALUE(ret))
8105 pr_err("%s: Failed to setup MBHC detection\n",
8106 __func__);
8107 } else {
8108 /* Enable Mic Bias pull down and HPH Switch to GND */
8109 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
8110 0x01, 0x01);
8111 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x01);
8112 INIT_WORK(&tabla->hs_correct_plug_work,
8113 tabla_hs_correct_gpio_plug);
8114 }
8115
8116 if (!IS_ERR_VALUE(ret)) {
8117 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
8118 wcd9xxx_enable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008119 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Joonwoo Park1305bab2012-05-21 15:08:42 -07008120 wcd9xxx_enable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008121 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Joonwoo Park1305bab2012-05-21 15:08:42 -07008122
8123 if (tabla->mbhc_cfg.gpio) {
8124 ret = request_threaded_irq(tabla->mbhc_cfg.gpio_irq,
8125 NULL,
8126 tabla_mechanical_plug_detect_irq,
8127 (IRQF_TRIGGER_RISING |
8128 IRQF_TRIGGER_FALLING),
8129 "tabla-gpio", codec);
8130 if (!IS_ERR_VALUE(ret)) {
8131 ret = enable_irq_wake(tabla->mbhc_cfg.gpio_irq);
8132 /* Bootup time detection */
8133 tabla_hs_gpio_handler(codec);
8134 }
8135 }
8136 }
8137
8138 return ret;
8139}
8140
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008141static void mbhc_fw_read(struct work_struct *work)
8142{
8143 struct delayed_work *dwork;
8144 struct tabla_priv *tabla;
8145 struct snd_soc_codec *codec;
8146 const struct firmware *fw;
Joonwoo Park1305bab2012-05-21 15:08:42 -07008147 int ret = -1, retry = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008148
8149 dwork = to_delayed_work(work);
Joonwoo Park1305bab2012-05-21 15:08:42 -07008150 tabla = container_of(dwork, struct tabla_priv, mbhc_firmware_dwork);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008151 codec = tabla->codec;
8152
8153 while (retry < MBHC_FW_READ_ATTEMPTS) {
8154 retry++;
8155 pr_info("%s:Attempt %d to request MBHC firmware\n",
8156 __func__, retry);
8157 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
8158 codec->dev);
8159
8160 if (ret != 0) {
8161 usleep_range(MBHC_FW_READ_TIMEOUT,
Joonwoo Park1305bab2012-05-21 15:08:42 -07008162 MBHC_FW_READ_TIMEOUT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008163 } else {
8164 pr_info("%s: MBHC Firmware read succesful\n", __func__);
8165 break;
8166 }
8167 }
8168
8169 if (ret != 0) {
8170 pr_err("%s: Cannot load MBHC firmware use default cal\n",
8171 __func__);
8172 } else if (tabla_mbhc_fw_validate(fw) == false) {
8173 pr_err("%s: Invalid MBHC cal data size use default cal\n",
8174 __func__);
8175 release_firmware(fw);
8176 } else {
8177 tabla->mbhc_cfg.calibration = (void *)fw->data;
8178 tabla->mbhc_fw = fw;
8179 }
8180
Joonwoo Park1305bab2012-05-21 15:08:42 -07008181 (void) tabla_mbhc_init_and_calibrate(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008182}
8183
Joonwoo Park03324832012-03-19 19:36:16 -07008184int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008185 const struct tabla_mbhc_config *cfg)
Joonwoo Park03324832012-03-19 19:36:16 -07008186{
8187 struct tabla_priv *tabla;
8188 int rc = 0;
8189
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008190 if (!codec || !cfg->calibration) {
Joonwoo Park03324832012-03-19 19:36:16 -07008191 pr_err("Error: no codec or calibration\n");
8192 return -EINVAL;
8193 }
8194
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008195 if (cfg->mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
8196 if (cfg->mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Joonwoo Park03324832012-03-19 19:36:16 -07008197 pr_err("Error: clock rate %dHz is not yet supported\n",
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008198 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07008199 else
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008200 pr_err("Error: unsupported clock rate %d\n",
8201 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07008202 return -EINVAL;
8203 }
8204
8205 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008206 tabla->mbhc_cfg = *cfg;
8207 tabla->in_gpio_handler = false;
8208 tabla->current_plug = PLUG_TYPE_NONE;
8209 tabla->lpi_enabled = false;
Joonwoo Park03324832012-03-19 19:36:16 -07008210 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
8211
8212 /* Put CFILT in fast mode by default */
Simmi Pateriya71d63872012-11-08 01:06:30 +05308213 if (!tabla->mbhc_cfg.micbias_always_on)
8214 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park03324832012-03-19 19:36:16 -07008215 0x40, TABLA_CFILT_FAST_MODE);
8216 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
8217 INIT_DELAYED_WORK(&tabla->mbhc_btn_dwork, btn_lpress_fn);
8218 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
8219 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
8220 INIT_DELAYED_WORK(&tabla->mbhc_insert_dwork, mbhc_insert_work);
8221
Joonwoo Park1305bab2012-05-21 15:08:42 -07008222 if (!tabla->mbhc_cfg.read_fw_bin)
8223 rc = tabla_mbhc_init_and_calibrate(tabla);
8224 else
Joonwoo Park03324832012-03-19 19:36:16 -07008225 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
8226 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008227
Joonwoo Park03324832012-03-19 19:36:16 -07008228 return rc;
8229}
8230EXPORT_SYMBOL_GPL(tabla_hs_detect);
8231
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008232static irqreturn_t tabla_slimbus_irq(int irq, void *data)
8233{
8234 struct tabla_priv *priv = data;
8235 struct snd_soc_codec *codec = priv->codec;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008236 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
8237 int i, j, port_id, k, ch_mask_temp;
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07008238 unsigned long slimbus_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008239 u8 val;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308240 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
8241 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008242 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
8243 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308244 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008245 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
8246 if (val & 0x1)
8247 pr_err_ratelimited("overflow error on port %x,"
8248 " value %x\n", i*8 + j, val);
8249 if (val & 0x2)
8250 pr_err_ratelimited("underflow error on port %x,"
8251 " value %x\n", i*8 + j, val);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008252 if (val & 0x4) {
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008253 port_id = i*8 + j;
8254 for (k = 0; k < ARRAY_SIZE(tabla_dai); k++) {
8255 ch_mask_temp = 1 << port_id;
Joonwoo Park9bbb4d12012-11-09 19:58:11 -08008256 pr_debug("%s: tabla_p->dai[%d].ch_mask = 0x%lx\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07008257 __func__, k,
8258 tabla_p->dai[k].ch_mask);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008259 if (ch_mask_temp &
8260 tabla_p->dai[k].ch_mask) {
8261 tabla_p->dai[k].ch_mask &=
Kuirong Wang906ac472012-07-09 12:54:44 -07008262 ~ch_mask_temp;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008263 if (!tabla_p->dai[k].ch_mask)
Kuirong Wang906ac472012-07-09 12:54:44 -07008264 wake_up(
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008265 &tabla_p->dai[k].dai_wait);
8266 }
8267 }
8268 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008269 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308270 wcd9xxx_interface_reg_write(codec->control_data,
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07008271 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, slimbus_value);
8272 val = 0x0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008273 }
8274
8275 return IRQ_HANDLED;
8276}
8277
Patrick Lai3043fba2011-08-01 14:15:57 -07008278static int tabla_handle_pdata(struct tabla_priv *tabla)
8279{
8280 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308281 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07008282 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05308283 u8 leg_mode = pdata->amic_settings.legacy_mode;
8284 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
8285 u8 txfe_buff = pdata->amic_settings.txfe_buff;
8286 u8 flag = pdata->amic_settings.use_pdata;
8287 u8 i = 0, j = 0;
8288 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07008289
8290 if (!pdata) {
8291 rc = -ENODEV;
8292 goto done;
8293 }
8294
8295 /* Make sure settings are correct */
8296 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
8297 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
8298 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
8299 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
8300 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
8301 rc = -EINVAL;
8302 goto done;
8303 }
8304
8305 /* figure out k value */
8306 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
8307 pdata->micbias.cfilt1_mv);
8308 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
8309 pdata->micbias.cfilt2_mv);
8310 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
8311 pdata->micbias.cfilt3_mv);
8312
8313 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
8314 rc = -EINVAL;
8315 goto done;
8316 }
8317
8318 /* Set voltage level and always use LDO */
8319 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
8320 (pdata->micbias.ldoh_v << 2));
8321
8322 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
8323 (k1 << 2));
8324 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
8325 (k2 << 2));
8326 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
8327 (k3 << 2));
8328
8329 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
8330 (pdata->micbias.bias1_cfilt_sel << 5));
8331 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
8332 (pdata->micbias.bias2_cfilt_sel << 5));
8333 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
8334 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008335 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
8336 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07008337
Santosh Mardi22920282011-10-26 02:38:40 +05308338 for (i = 0; i < 6; j++, i += 2) {
8339 if (flag & (0x01 << i)) {
8340 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
8341 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
8342 val_txfe = val_txfe |
8343 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
8344 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
8345 0x10, value);
8346 snd_soc_update_bits(codec,
8347 TABLA_A_TX_1_2_TEST_EN + j * 10,
8348 0x30, val_txfe);
8349 }
8350 if (flag & (0x01 << (i + 1))) {
8351 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
8352 val_txfe = (txfe_bypass &
8353 (0x01 << (i + 1))) ? 0x02 : 0x00;
8354 val_txfe |= (txfe_buff &
8355 (0x01 << (i + 1))) ? 0x01 : 0x00;
8356 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
8357 0x01, value);
8358 snd_soc_update_bits(codec,
8359 TABLA_A_TX_1_2_TEST_EN + j * 10,
8360 0x03, val_txfe);
8361 }
8362 }
8363 if (flag & 0x40) {
8364 value = (leg_mode & 0x40) ? 0x10 : 0x00;
8365 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
8366 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
8367 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
8368 0x13, value);
8369 }
Patrick Lai49efeac2011-11-03 11:01:12 -07008370
8371 if (pdata->ocp.use_pdata) {
8372 /* not defined in CODEC specification */
8373 if (pdata->ocp.hph_ocp_limit == 1 ||
8374 pdata->ocp.hph_ocp_limit == 5) {
8375 rc = -EINVAL;
8376 goto done;
8377 }
8378 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
8379 0x0F, pdata->ocp.num_attempts);
8380 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
8381 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
8382 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
8383 0xE0, (pdata->ocp.hph_ocp_limit << 5));
8384 }
Joonwoo Park03324832012-03-19 19:36:16 -07008385
8386 for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
8387 if (!strncmp(pdata->regulator[i].name, "CDC_VDDA_RX", 11)) {
8388 if (pdata->regulator[i].min_uV == 1800000 &&
8389 pdata->regulator[i].max_uV == 1800000) {
8390 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
8391 0x1C);
8392 } else if (pdata->regulator[i].min_uV == 2200000 &&
8393 pdata->regulator[i].max_uV == 2200000) {
8394 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
8395 0x1E);
8396 } else {
8397 pr_err("%s: unsupported CDC_VDDA_RX voltage "
8398 "min %d, max %d\n", __func__,
8399 pdata->regulator[i].min_uV,
8400 pdata->regulator[i].max_uV);
8401 rc = -EINVAL;
8402 }
8403 break;
8404 }
8405 }
Patrick Lai3043fba2011-08-01 14:15:57 -07008406done:
8407 return rc;
8408}
8409
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008410static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
8411
8412 /* Tabla 1.1 MICBIAS changes */
8413 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
8414 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
8415 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008416
8417 /* Tabla 1.1 HPH changes */
8418 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
8419 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
8420
8421 /* Tabla 1.1 EAR PA changes */
8422 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
8423 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
8424 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
8425
8426 /* Tabla 1.1 Lineout_5 Changes */
8427 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
8428
8429 /* Tabla 1.1 RX Changes */
8430 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
8431 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
8432 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
8433 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
8434 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
8435 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
8436 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
8437
8438 /* Tabla 1.1 RX1 and RX2 Changes */
8439 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
8440 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
8441
8442 /* Tabla 1.1 RX3 to RX7 Changes */
8443 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
8444 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
8445 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
8446 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
8447 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
8448
8449 /* Tabla 1.1 CLASSG Changes */
8450 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
8451};
8452
8453static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008454 /* Tabla 2.0 MICBIAS changes */
8455 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
8456};
8457
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008458static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
8459 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
8460};
8461
8462static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
8463 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
8464};
8465
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008466static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
8467{
8468 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308469 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008470
8471 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
8472 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
8473 tabla_1_1_reg_defaults[i].val);
8474
8475 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
8476 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
8477 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008478
8479 if (TABLA_IS_1_X(tabla_core->version)) {
8480 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
8481 i++)
8482 snd_soc_write(codec,
8483 tabla_1_x_only_reg_2_0_defaults[i].reg,
8484 tabla_1_x_only_reg_2_0_defaults[i].val);
8485 } else {
8486 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
8487 snd_soc_write(codec,
8488 tabla_2_only_reg_2_0_defaults[i].reg,
8489 tabla_2_only_reg_2_0_defaults[i].val);
8490 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008491}
8492
8493static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08008494 /* Initialize current threshold to 350MA
8495 * number of wait and run cycles to 4096
8496 */
Patrick Lai49efeac2011-11-03 11:01:12 -07008497 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08008498 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008499
Santosh Mardi32171012011-10-28 23:32:06 +05308500 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
8501
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008502 /* Initialize gain registers to use register gain */
8503 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
8504 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
8505 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
8506 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
8507 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
8508 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
8509
Kuirong Wangccb29c62012-06-15 11:09:07 -07008510 /* Set the MICBIAS default output as pull down*/
8511 {TABLA_A_MICB_1_CTL, 0x01, 0x01},
8512 {TABLA_A_MICB_2_CTL, 0x01, 0x01},
8513 {TABLA_A_MICB_3_CTL, 0x01, 0x01},
8514
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008515 /* Initialize mic biases to differential mode */
8516 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
8517 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
8518 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008519
8520 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
8521
8522 /* Use 16 bit sample size for TX1 to TX6 */
8523 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
8524 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
8525 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
8526 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
8527 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
8528 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
8529
8530 /* Use 16 bit sample size for TX7 to TX10 */
8531 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
8532 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
8533 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
8534 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
8535
8536 /* Use 16 bit sample size for RX */
8537 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
8538 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
8539
8540 /*enable HPF filter for TX paths */
8541 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
8542 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
8543 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
8544 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
8545 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
8546 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
8547 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
8548 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
8549 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
8550 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
Kiran Kandi0ba468f2012-05-08 11:45:05 -07008551
8552 /* config Decimator for DMIC CLK_MODE_1(3.072Mhz@12.88Mhz mclk) */
8553 {TABLA_A_CDC_TX1_DMIC_CTL, 0x1, 0x1},
8554 {TABLA_A_CDC_TX2_DMIC_CTL, 0x1, 0x1},
8555 {TABLA_A_CDC_TX3_DMIC_CTL, 0x1, 0x1},
8556 {TABLA_A_CDC_TX4_DMIC_CTL, 0x1, 0x1},
8557 {TABLA_A_CDC_TX5_DMIC_CTL, 0x1, 0x1},
8558 {TABLA_A_CDC_TX6_DMIC_CTL, 0x1, 0x1},
8559 {TABLA_A_CDC_TX7_DMIC_CTL, 0x1, 0x1},
8560 {TABLA_A_CDC_TX8_DMIC_CTL, 0x1, 0x1},
8561 {TABLA_A_CDC_TX9_DMIC_CTL, 0x1, 0x1},
8562 {TABLA_A_CDC_TX10_DMIC_CTL, 0x1, 0x1},
8563
8564 /* config DMIC clk to CLK_MODE_1 (3.072Mhz@12.88Mhz mclk) */
8565 {TABLA_A_CDC_CLK_DMIC_CTL, 0x2A, 0x2A},
8566
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008567};
8568
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008569static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07008570 /* Set the MICBIAS default output as pull down*/
8571 {TABLA_1_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008572 /* Initialize mic biases to differential mode */
8573 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
8574};
8575
8576static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07008577
8578 /* Set the MICBIAS default output as pull down*/
8579 {TABLA_2_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008580 /* Initialize mic biases to differential mode */
8581 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
8582};
8583
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008584static void tabla_codec_init_reg(struct snd_soc_codec *codec)
8585{
8586 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308587 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008588
8589 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
8590 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
8591 tabla_codec_reg_init_val[i].mask,
8592 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008593 if (TABLA_IS_1_X(tabla_core->version)) {
8594 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
8595 snd_soc_update_bits(codec,
8596 tabla_1_x_codec_reg_init_val[i].reg,
8597 tabla_1_x_codec_reg_init_val[i].mask,
8598 tabla_1_x_codec_reg_init_val[i].val);
8599 } else {
8600 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
8601 i++)
8602 snd_soc_update_bits(codec,
8603 tabla_2_higher_codec_reg_init_val[i].reg,
8604 tabla_2_higher_codec_reg_init_val[i].mask,
8605 tabla_2_higher_codec_reg_init_val[i].val);
8606 }
8607}
8608
8609static void tabla_update_reg_address(struct tabla_priv *priv)
8610{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308611 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008612 struct tabla_reg_address *reg_addr = &priv->reg_addr;
8613
8614 if (TABLA_IS_1_X(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08008615 reg_addr->micb_4_mbhc = TABLA_1_A_MICB_4_MBHC;
8616 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008617 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008618 } else if (TABLA_IS_2_0(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08008619 reg_addr->micb_4_mbhc = TABLA_2_A_MICB_4_MBHC;
8620 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008621 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008622 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008623}
8624
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008625#ifdef CONFIG_DEBUG_FS
8626static int codec_debug_open(struct inode *inode, struct file *file)
8627{
8628 file->private_data = inode->i_private;
8629 return 0;
8630}
8631
8632static ssize_t codec_debug_write(struct file *filp,
8633 const char __user *ubuf, size_t cnt, loff_t *ppos)
8634{
8635 char lbuf[32];
8636 char *buf;
8637 int rc;
8638 struct tabla_priv *tabla = filp->private_data;
8639
8640 if (cnt > sizeof(lbuf) - 1)
8641 return -EINVAL;
8642
8643 rc = copy_from_user(lbuf, ubuf, cnt);
8644 if (rc)
8645 return -EFAULT;
8646
8647 lbuf[cnt] = '\0';
8648 buf = (char *)lbuf;
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07008649 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
8650 tabla->no_mic_headset_override =
8651 (*strsep(&buf, " ") == '0') ? false : true;
8652 if (tabla->no_mic_headset_override && tabla->mbhc_polling_active) {
8653 tabla_codec_pause_hs_polling(tabla->codec);
8654 tabla_codec_start_hs_polling(tabla->codec);
8655 }
8656 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8657 return cnt;
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008658}
8659
8660static ssize_t codec_mbhc_debug_read(struct file *file, char __user *buf,
8661 size_t count, loff_t *pos)
8662{
8663 const int size = 768;
8664 char buffer[size];
8665 int n = 0;
8666 struct tabla_priv *tabla = file->private_data;
8667 struct snd_soc_codec *codec = tabla->codec;
8668 const struct mbhc_internal_cal_data *p = &tabla->mbhc_data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008669 const s16 v_ins_hu_cur = tabla_get_current_v_ins(tabla, true);
8670 const s16 v_ins_h_cur = tabla_get_current_v_ins(tabla, false);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008671
8672 n = scnprintf(buffer, size - n, "dce_z = %x(%dmv)\n", p->dce_z,
8673 tabla_codec_sta_dce_v(codec, 1, p->dce_z));
8674 n += scnprintf(buffer + n, size - n, "dce_mb = %x(%dmv)\n",
8675 p->dce_mb, tabla_codec_sta_dce_v(codec, 1, p->dce_mb));
8676 n += scnprintf(buffer + n, size - n, "sta_z = %x(%dmv)\n",
8677 p->sta_z, tabla_codec_sta_dce_v(codec, 0, p->sta_z));
8678 n += scnprintf(buffer + n, size - n, "sta_mb = %x(%dmv)\n",
8679 p->sta_mb, tabla_codec_sta_dce_v(codec, 0, p->sta_mb));
8680 n += scnprintf(buffer + n, size - n, "t_dce = %x\n", p->t_dce);
8681 n += scnprintf(buffer + n, size - n, "t_sta = %x\n", p->t_sta);
8682 n += scnprintf(buffer + n, size - n, "micb_mv = %dmv\n",
8683 p->micb_mv);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008684 n += scnprintf(buffer + n, size - n, "v_ins_hu = %x(%dmv)%s\n",
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008685 p->v_ins_hu,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008686 tabla_codec_sta_dce_v(codec, 0, p->v_ins_hu),
8687 p->v_ins_hu == v_ins_hu_cur ? "*" : "");
8688 n += scnprintf(buffer + n, size - n, "v_ins_h = %x(%dmv)%s\n",
8689 p->v_ins_h, tabla_codec_sta_dce_v(codec, 1, p->v_ins_h),
8690 p->v_ins_h == v_ins_h_cur ? "*" : "");
8691 n += scnprintf(buffer + n, size - n, "adj_v_ins_hu = %x(%dmv)%s\n",
8692 p->adj_v_ins_hu,
8693 tabla_codec_sta_dce_v(codec, 0, p->adj_v_ins_hu),
8694 p->adj_v_ins_hu == v_ins_hu_cur ? "*" : "");
8695 n += scnprintf(buffer + n, size - n, "adj_v_ins_h = %x(%dmv)%s\n",
8696 p->adj_v_ins_h,
8697 tabla_codec_sta_dce_v(codec, 1, p->adj_v_ins_h),
8698 p->adj_v_ins_h == v_ins_h_cur ? "*" : "");
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008699 n += scnprintf(buffer + n, size - n, "v_b1_hu = %x(%dmv)\n",
8700 p->v_b1_hu, tabla_codec_sta_dce_v(codec, 0, p->v_b1_hu));
8701 n += scnprintf(buffer + n, size - n, "v_b1_h = %x(%dmv)\n",
8702 p->v_b1_h, tabla_codec_sta_dce_v(codec, 1, p->v_b1_h));
8703 n += scnprintf(buffer + n, size - n, "v_b1_huc = %x(%dmv)\n",
8704 p->v_b1_huc,
8705 tabla_codec_sta_dce_v(codec, 1, p->v_b1_huc));
8706 n += scnprintf(buffer + n, size - n, "v_brh = %x(%dmv)\n",
8707 p->v_brh, tabla_codec_sta_dce_v(codec, 1, p->v_brh));
8708 n += scnprintf(buffer + n, size - n, "v_brl = %x(%dmv)\n", p->v_brl,
8709 tabla_codec_sta_dce_v(codec, 0, p->v_brl));
8710 n += scnprintf(buffer + n, size - n, "v_no_mic = %x(%dmv)\n",
8711 p->v_no_mic,
8712 tabla_codec_sta_dce_v(codec, 0, p->v_no_mic));
8713 n += scnprintf(buffer + n, size - n, "npoll = %d\n", p->npoll);
8714 n += scnprintf(buffer + n, size - n, "nbounce_wait = %d\n",
8715 p->nbounce_wait);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008716 n += scnprintf(buffer + n, size - n, "v_inval_ins_low = %d\n",
8717 p->v_inval_ins_low);
8718 n += scnprintf(buffer + n, size - n, "v_inval_ins_high = %d\n",
8719 p->v_inval_ins_high);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07008720 if (tabla->mbhc_cfg.gpio)
8721 n += scnprintf(buffer + n, size - n, "GPIO insert = %d\n",
8722 tabla_hs_gpio_level_remove(tabla));
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008723 buffer[n] = 0;
8724
8725 return simple_read_from_buffer(buf, count, pos, buffer, n);
8726}
8727
8728static const struct file_operations codec_debug_ops = {
8729 .open = codec_debug_open,
8730 .write = codec_debug_write,
8731};
8732
8733static const struct file_operations codec_mbhc_debug_ops = {
8734 .open = codec_debug_open,
8735 .read = codec_mbhc_debug_read,
8736};
8737#endif
8738
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008739static int tabla_codec_probe(struct snd_soc_codec *codec)
8740{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308741 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008742 struct tabla_priv *tabla;
8743 struct snd_soc_dapm_context *dapm = &codec->dapm;
8744 int ret = 0;
8745 int i;
Kuirong Wang906ac472012-07-09 12:54:44 -07008746 void *ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008747
8748 codec->control_data = dev_get_drvdata(codec->dev->parent);
8749 control = codec->control_data;
8750
8751 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
8752 if (!tabla) {
8753 dev_err(codec->dev, "Failed to allocate private data\n");
8754 return -ENOMEM;
8755 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08008756 for (i = 0 ; i < NUM_DECIMATORS; i++) {
8757 tx_hpf_work[i].tabla = tabla;
8758 tx_hpf_work[i].decimator = i + 1;
8759 INIT_DELAYED_WORK(&tx_hpf_work[i].dwork,
8760 tx_hpf_corner_freq_callback);
8761 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008762
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07008763 /* Make sure mbhc micbias register addresses are zeroed out */
8764 memset(&tabla->mbhc_bias_regs, 0,
8765 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07008766 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07008767
Joonwoo Park0976d012011-12-22 11:48:18 -08008768 /* Make sure mbhc intenal calibration data is zeroed out */
8769 memset(&tabla->mbhc_data, 0,
8770 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08008771 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08008772 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
8773 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008774 snd_soc_codec_set_drvdata(codec, tabla);
8775
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07008776 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008777 tabla->bandgap_type = TABLA_BANDGAP_OFF;
8778 tabla->clock_active = false;
8779 tabla->config_mode_active = false;
8780 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08008781 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07008782 tabla->no_mic_headset_override = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008783 tabla->hs_polling_irq_prepared = false;
8784 mutex_init(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008785 tabla->codec = codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008786 tabla->mbhc_state = MBHC_STATE_NONE;
Joonwoo Park03324832012-03-19 19:36:16 -07008787 tabla->mbhc_last_resume = 0;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08008788 for (i = 0; i < COMPANDER_MAX; i++) {
8789 tabla->comp_enabled[i] = 0;
8790 tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
8791 }
Patrick Lai3043fba2011-08-01 14:15:57 -07008792 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308793 tabla->intf_type = wcd9xxx_get_intf_type();
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08008794 tabla->aux_pga_cnt = 0;
8795 tabla->aux_l_gain = 0x1F;
8796 tabla->aux_r_gain = 0x1F;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008797 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05308798 tabla_update_reg_defaults(codec);
8799 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05308800 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07008801 if (IS_ERR_VALUE(ret)) {
8802 pr_err("%s: bad pdata\n", __func__);
8803 goto err_pdata;
8804 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008805
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008806 if (TABLA_IS_1_X(control->version))
Steve Mucklef132c6c2012-06-06 18:30:57 -07008807 snd_soc_add_codec_controls(codec, tabla_1_x_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008808 ARRAY_SIZE(tabla_1_x_snd_controls));
8809 else
Steve Mucklef132c6c2012-06-06 18:30:57 -07008810 snd_soc_add_codec_controls(codec, tabla_2_higher_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008811 ARRAY_SIZE(tabla_2_higher_snd_controls));
8812
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008813 if (TABLA_IS_1_X(control->version))
8814 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
8815 ARRAY_SIZE(tabla_1_x_dapm_widgets));
8816 else
8817 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
8818 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
8819
Kuirong Wang906ac472012-07-09 12:54:44 -07008820 ptr = kmalloc((sizeof(tabla_rx_chs) +
8821 sizeof(tabla_tx_chs)), GFP_KERNEL);
8822 if (!ptr) {
8823 pr_err("%s: no mem for slim chan ctl data\n", __func__);
8824 ret = -ENOMEM;
8825 goto err_nomem_slimch;
8826 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308827 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05308828 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
8829 ARRAY_SIZE(tabla_dapm_i2s_widgets));
8830 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
8831 ARRAY_SIZE(audio_i2s_map));
Kuirong Wang906ac472012-07-09 12:54:44 -07008832 for (i = 0; i < ARRAY_SIZE(tabla_i2s_dai); i++)
8833 INIT_LIST_HEAD(&tabla->dai[i].wcd9xxx_ch_list);
8834 } else if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
8835 for (i = 0; i < NUM_CODEC_DAIS; i++) {
8836 INIT_LIST_HEAD(&tabla->dai[i].wcd9xxx_ch_list);
8837 init_waitqueue_head(&tabla->dai[i].dai_wait);
8838 }
Santosh Mardie15e2302011-11-15 10:39:23 +05308839 }
Kuirong Wang906ac472012-07-09 12:54:44 -07008840
8841 control->num_rx_port = TABLA_RX_MAX;
8842 control->rx_chs = ptr;
8843 memcpy(control->rx_chs, tabla_rx_chs, sizeof(tabla_rx_chs));
8844 control->num_tx_port = TABLA_TX_MAX;
8845 control->tx_chs = ptr + sizeof(tabla_rx_chs);
8846 memcpy(control->tx_chs, tabla_tx_chs, sizeof(tabla_tx_chs));
8847
Kiran Kandi8b3a8302011-09-27 16:13:28 -07008848
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008849 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008850 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008851 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
8852 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008853 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008854 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008855 } else {
8856 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308857 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008858 goto err_pdata;
8859 }
8860
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008861 snd_soc_dapm_sync(dapm);
8862
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008863 ret = wcd9xxx_request_irq(codec->control_data,
8864 WCD9XXX_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008865 tabla_hs_insert_irq, "Headset insert detect", tabla);
8866 if (ret) {
8867 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008868 WCD9XXX_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008869 goto err_insert_irq;
8870 }
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008871 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008872
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008873 ret = wcd9xxx_request_irq(codec->control_data,
8874 WCD9XXX_IRQ_MBHC_REMOVAL,
8875 tabla_hs_remove_irq,
8876 "Headset remove detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008877 if (ret) {
8878 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008879 WCD9XXX_IRQ_MBHC_REMOVAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008880 goto err_remove_irq;
8881 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008882
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008883 ret = wcd9xxx_request_irq(codec->control_data,
8884 WCD9XXX_IRQ_MBHC_POTENTIAL,
8885 tabla_dce_handler, "DC Estimation detect",
8886 tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008887 if (ret) {
8888 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008889 WCD9XXX_IRQ_MBHC_POTENTIAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008890 goto err_potential_irq;
8891 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008892
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008893 ret = wcd9xxx_request_irq(codec->control_data, WCD9XXX_IRQ_MBHC_RELEASE,
8894 tabla_release_handler,
8895 "Button Release detect", tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008896 if (ret) {
8897 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008898 WCD9XXX_IRQ_MBHC_RELEASE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008899 goto err_release_irq;
8900 }
8901
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008902 ret = wcd9xxx_request_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS,
8903 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008904 if (ret) {
8905 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008906 WCD9XXX_IRQ_SLIMBUS);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008907 goto err_slimbus_irq;
8908 }
8909
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308910 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
8911 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008912 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
8913
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308914 ret = wcd9xxx_request_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008915 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT,
8916 tabla_hphl_ocp_irq,
8917 "HPH_L OCP detect", tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008918 if (ret) {
8919 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008920 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008921 goto err_hphl_ocp_irq;
8922 }
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008923 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008924
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308925 ret = wcd9xxx_request_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008926 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT,
8927 tabla_hphr_ocp_irq,
8928 "HPH_R OCP detect", tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008929 if (ret) {
8930 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008931 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008932 goto err_hphr_ocp_irq;
8933 }
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008934 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008935
8936 /*
8937 * Register suspend lock and notifier to resend edge triggered
8938 * gpio IRQs
8939 */
8940 wake_lock_init(&tabla->irq_resend_wlock, WAKE_LOCK_SUSPEND,
8941 "tabla_gpio_irq_resend");
8942 tabla->gpio_irq_resend = false;
8943
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08008944 mutex_lock(&dapm->codec->mutex);
8945 snd_soc_dapm_disable_pin(dapm, "ANC HPHL");
8946 snd_soc_dapm_disable_pin(dapm, "ANC HPHR");
8947 snd_soc_dapm_disable_pin(dapm, "ANC HEADPHONE");
8948 snd_soc_dapm_sync(dapm);
8949 mutex_unlock(&dapm->codec->mutex);
Patrick Lai49efeac2011-11-03 11:01:12 -07008950
Bradley Rubincb3950a2011-08-18 13:07:26 -07008951#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008952 if (ret == 0) {
8953 tabla->debugfs_poke =
8954 debugfs_create_file("TRRS", S_IFREG | S_IRUGO, NULL, tabla,
8955 &codec_debug_ops);
8956 tabla->debugfs_mbhc =
8957 debugfs_create_file("tabla_mbhc", S_IFREG | S_IRUGO,
8958 NULL, tabla, &codec_mbhc_debug_ops);
8959 }
Bradley Rubincb3950a2011-08-18 13:07:26 -07008960#endif
Steve Mucklef132c6c2012-06-06 18:30:57 -07008961 codec->ignore_pmdown_time = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008962 return ret;
8963
Patrick Lai49efeac2011-11-03 11:01:12 -07008964err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308965 wcd9xxx_free_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008966 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008967err_hphl_ocp_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008968 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008969err_slimbus_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008970 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008971err_release_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008972 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL,
8973 tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008974err_potential_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008975 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008976err_remove_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008977 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION,
8978 tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008979err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07008980err_pdata:
Kuirong Wang906ac472012-07-09 12:54:44 -07008981 kfree(ptr);
8982err_nomem_slimch:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008983 mutex_destroy(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008984 kfree(tabla);
8985 return ret;
8986}
8987static int tabla_codec_remove(struct snd_soc_codec *codec)
8988{
8989 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008990
8991 wake_lock_destroy(&tabla->irq_resend_wlock);
8992
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008993 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS, tabla);
8994 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_RELEASE, tabla);
8995 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL,
8996 tabla);
8997 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_REMOVAL, tabla);
8998 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION,
8999 tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07009000 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009001 tabla_codec_disable_clock_block(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07009002 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009003 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08009004 if (tabla->mbhc_fw)
9005 release_firmware(tabla->mbhc_fw);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07009006 mutex_destroy(&tabla->codec_resource_lock);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07009007#ifdef CONFIG_DEBUG_FS
9008 debugfs_remove(tabla->debugfs_poke);
9009 debugfs_remove(tabla->debugfs_mbhc);
9010#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009011 kfree(tabla);
9012 return 0;
9013}
9014static struct snd_soc_codec_driver soc_codec_dev_tabla = {
9015 .probe = tabla_codec_probe,
9016 .remove = tabla_codec_remove,
9017 .read = tabla_read,
9018 .write = tabla_write,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009019 .readable_register = tabla_readable,
9020 .volatile_register = tabla_volatile,
9021
9022 .reg_cache_size = TABLA_CACHE_SIZE,
9023 .reg_cache_default = tabla_reg_defaults,
9024 .reg_word_size = 1,
Steve Mucklef132c6c2012-06-06 18:30:57 -07009025 .controls = tabla_snd_controls,
9026 .num_controls = ARRAY_SIZE(tabla_snd_controls),
9027 .dapm_widgets = tabla_dapm_widgets,
9028 .num_dapm_widgets = ARRAY_SIZE(tabla_dapm_widgets),
9029 .dapm_routes = audio_map,
9030 .num_dapm_routes = ARRAY_SIZE(audio_map),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009031};
Bradley Rubincb3950a2011-08-18 13:07:26 -07009032
Joonwoo Park8b1f0982011-12-08 17:12:45 -08009033#ifdef CONFIG_PM
9034static int tabla_suspend(struct device *dev)
9035{
Joonwoo Park816b8e62012-01-23 16:03:21 -08009036 dev_dbg(dev, "%s: system suspend\n", __func__);
9037 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08009038}
9039
9040static int tabla_resume(struct device *dev)
9041{
Joonwoo Parkecf379c2012-10-04 16:57:52 -07009042 int irq;
Joonwoo Park03324832012-03-19 19:36:16 -07009043 struct platform_device *pdev = to_platform_device(dev);
9044 struct tabla_priv *tabla = platform_get_drvdata(pdev);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07009045
Joonwoo Parkd6e48bd2012-09-20 11:14:15 -07009046 dev_dbg(dev, "%s: system resume tabla %p\n", __func__, tabla);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07009047 if (tabla) {
9048 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Parkd6e48bd2012-09-20 11:14:15 -07009049 tabla->mbhc_last_resume = jiffies;
Joonwoo Parkecf379c2012-10-04 16:57:52 -07009050 if (tabla->gpio_irq_resend) {
9051 WARN_ON(!tabla->mbhc_cfg.gpio_irq);
9052 tabla->gpio_irq_resend = false;
9053
9054 irq = tabla->mbhc_cfg.gpio_irq;
9055 pr_debug("%s: Resending GPIO IRQ %d\n", __func__, irq);
9056 irq_set_pending(irq);
9057 check_irq_resend(irq_to_desc(irq), irq);
9058
9059 /* release suspend lock */
9060 wake_unlock(&tabla->irq_resend_wlock);
9061 }
9062 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
9063 }
9064
Joonwoo Park816b8e62012-01-23 16:03:21 -08009065 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08009066}
9067
9068static const struct dev_pm_ops tabla_pm_ops = {
9069 .suspend = tabla_suspend,
9070 .resume = tabla_resume,
9071};
9072#endif
9073
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009074static int __devinit tabla_probe(struct platform_device *pdev)
9075{
Santosh Mardie15e2302011-11-15 10:39:23 +05309076 int ret = 0;
Steve Mucklef132c6c2012-06-06 18:30:57 -07009077 pr_err("tabla_probe\n");
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05309078 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05309079 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
9080 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05309081 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05309082 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
9083 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
9084 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009085}
9086static int __devexit tabla_remove(struct platform_device *pdev)
9087{
9088 snd_soc_unregister_codec(&pdev->dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009089 return 0;
9090}
9091static struct platform_driver tabla_codec_driver = {
9092 .probe = tabla_probe,
9093 .remove = tabla_remove,
9094 .driver = {
9095 .name = "tabla_codec",
9096 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08009097#ifdef CONFIG_PM
9098 .pm = &tabla_pm_ops,
9099#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009100 },
9101};
9102
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08009103static struct platform_driver tabla1x_codec_driver = {
9104 .probe = tabla_probe,
9105 .remove = tabla_remove,
9106 .driver = {
9107 .name = "tabla1x_codec",
9108 .owner = THIS_MODULE,
9109#ifdef CONFIG_PM
9110 .pm = &tabla_pm_ops,
9111#endif
9112 },
9113};
9114
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009115static int __init tabla_codec_init(void)
9116{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08009117 int rtn = platform_driver_register(&tabla_codec_driver);
9118 if (rtn == 0) {
9119 rtn = platform_driver_register(&tabla1x_codec_driver);
9120 if (rtn != 0)
9121 platform_driver_unregister(&tabla_codec_driver);
9122 }
9123 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009124}
9125
9126static void __exit tabla_codec_exit(void)
9127{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08009128 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009129 platform_driver_unregister(&tabla_codec_driver);
9130}
9131
9132module_init(tabla_codec_init);
9133module_exit(tabla_codec_exit);
9134
9135MODULE_DESCRIPTION("Tabla codec driver");
9136MODULE_VERSION("1.0");
9137MODULE_LICENSE("GPL v2");