blob: 19645095d597aafae3b1ca07842cac0c529cc4c4 [file] [log] [blame]
Vimal Singhc2798e92010-02-15 10:03:33 -08001/*
2 * board-sdp-flash.c
3 * Modified from mach-omap2/board-3430sdp-flash.c
4 *
5 * Copyright (C) 2009 Nokia Corporation
6 * Copyright (C) 2009 Texas Instruments
7 *
8 * Vimal Singh <vimalsingh@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
18#include <linux/io.h>
Sukumar Ghorai4e070372011-01-28 15:42:06 +053019#include <plat/irqs.h>
Vimal Singhc2798e92010-02-15 10:03:33 -080020
21#include <plat/gpmc.h>
22#include <plat/nand.h>
23#include <plat/onenand.h>
24#include <plat/tc.h>
Manjunath Kondaiah G04aeae72010-10-08 09:58:35 -070025
26#include "board-flash.h"
Vimal Singhc2798e92010-02-15 10:03:33 -080027
28#define REG_FPGA_REV 0x10
29#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
30#define MAX_SUPPORTED_GPMC_CONFIG 3
31
32#define DEBUG_BASE 0x08000000 /* debug board */
33
Vimal Singhc2798e92010-02-15 10:03:33 -080034/* various memory sizes */
35#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
36#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
37
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000038static struct physmap_flash_data board_nor_data = {
Vimal Singhc2798e92010-02-15 10:03:33 -080039 .width = 2,
40};
41
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000042static struct resource board_nor_resource = {
Vimal Singhc2798e92010-02-15 10:03:33 -080043 .flags = IORESOURCE_MEM,
44};
45
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000046static struct platform_device board_nor_device = {
Vimal Singhc2798e92010-02-15 10:03:33 -080047 .name = "physmap-flash",
48 .id = 0,
49 .dev = {
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000050 .platform_data = &board_nor_data,
Vimal Singhc2798e92010-02-15 10:03:33 -080051 },
52 .num_resources = 1,
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000053 .resource = &board_nor_resource,
Vimal Singhc2798e92010-02-15 10:03:33 -080054};
55
56static void
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000057__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -080058{
59 int err;
60
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000061 board_nor_data.parts = nor_parts;
62 board_nor_data.nr_parts = nr_parts;
Vimal Singhc2798e92010-02-15 10:03:33 -080063
64 /* Configure start address and size of NOR device */
65 if (omap_rev() >= OMAP3430_REV_ES1_0) {
66 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000067 (unsigned long *)&board_nor_resource.start);
68 board_nor_resource.end = board_nor_resource.start
Vimal Singhc2798e92010-02-15 10:03:33 -080069 + FLASH_SIZE_SDPV2 - 1;
70 } else {
71 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000072 (unsigned long *)&board_nor_resource.start);
73 board_nor_resource.end = board_nor_resource.start
Vimal Singhc2798e92010-02-15 10:03:33 -080074 + FLASH_SIZE_SDPV1 - 1;
75 }
76 if (err < 0) {
77 printk(KERN_ERR "NOR: Can't request GPMC CS\n");
78 return;
79 }
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000080 if (platform_device_register(&board_nor_device) < 0)
Vimal Singhc2798e92010-02-15 10:03:33 -080081 printk(KERN_ERR "Unable to register NOR device\n");
82}
83
84#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
85 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
86static struct omap_onenand_platform_data board_onenand_data = {
87 .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
88};
89
90static void
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000091__init board_onenand_init(struct mtd_partition *onenand_parts,
92 u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -080093{
94 board_onenand_data.cs = cs;
Sukumar Ghorai13d6b732010-07-09 14:27:47 +000095 board_onenand_data.parts = onenand_parts;
96 board_onenand_data.nr_parts = nr_parts;
Vimal Singhc2798e92010-02-15 10:03:33 -080097
98 gpmc_onenand_init(&board_onenand_data);
99}
100#else
101static void
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000102__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -0800103{
104}
105#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
106
107#if defined(CONFIG_MTD_NAND_OMAP2) || \
108 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
109
110/* Note that all values in this struct are in nanoseconds */
111static struct gpmc_timings nand_timings = {
112
113 .sync_clk = 0,
114
115 .cs_on = 0,
116 .cs_rd_off = 36,
117 .cs_wr_off = 36,
118
119 .adv_on = 6,
120 .adv_rd_off = 24,
121 .adv_wr_off = 36,
122
123 .we_off = 30,
124 .oe_off = 48,
125
126 .access = 54,
127 .rd_cycle = 72,
128 .wr_cycle = 72,
129
130 .wr_access = 30,
131 .wr_data_mux_bus = 0,
132};
133
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000134static struct omap_nand_platform_data board_nand_data = {
Vimal Singhc2798e92010-02-15 10:03:33 -0800135 .nand_setup = NULL,
136 .gpmc_t = &nand_timings,
137 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
138 .dev_ready = NULL,
139 .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */
140};
141
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000142void
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530143__init board_nand_init(struct mtd_partition *nand_parts,
144 u8 nr_parts, u8 cs, int nand_type)
Vimal Singhc2798e92010-02-15 10:03:33 -0800145{
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000146 board_nand_data.cs = cs;
147 board_nand_data.parts = nand_parts;
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530148 board_nand_data.nr_parts = nr_parts;
149 board_nand_data.devsize = nand_type;
Vimal Singhc2798e92010-02-15 10:03:33 -0800150
Sukumar Ghorai4e070372011-01-28 15:42:06 +0530151 board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000152 gpmc_nand_init(&board_nand_data);
Vimal Singhc2798e92010-02-15 10:03:33 -0800153}
154#else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000155void
156__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
Vimal Singhc2798e92010-02-15 10:03:33 -0800157{
158}
159#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
160
161/**
162 * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
163 * the various cs values.
164 */
165static u8 get_gpmc0_type(void)
166{
167 u8 cs = 0;
168 void __iomem *fpga_map_addr;
169
170 fpga_map_addr = ioremap(DEBUG_BASE, 4096);
171 if (!fpga_map_addr)
172 return -ENOMEM;
173
174 if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
175 /* we dont have an DEBUG FPGA??? */
176 /* Depend on #defines!! default to strata boot return param */
177 goto unmap;
178
179 /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
180 cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
181
182 /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
183 if (omap_rev() >= OMAP3430_REV_ES1_0)
184 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
185 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
186 ((cs & 2) << 1) | ((cs & 1) << 3);
187 else
188 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
189 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
190unmap:
191 iounmap(fpga_map_addr);
192 return cs;
193}
194
195/**
196 * sdp3430_flash_init - Identify devices connected to GPMC and register.
197 *
198 * @return - void.
199 */
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000200void board_flash_init(struct flash_partitions partition_info[],
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530201 char chip_sel_board[][GPMC_CS_NUM], int nand_type)
Vimal Singhc2798e92010-02-15 10:03:33 -0800202{
203 u8 cs = 0;
204 u8 norcs = GPMC_CS_NUM + 1;
205 u8 nandcs = GPMC_CS_NUM + 1;
206 u8 onenandcs = GPMC_CS_NUM + 1;
207 u8 idx;
208 unsigned char *config_sel = NULL;
209
210 /* REVISIT: Is this return correct idx for 2430 SDP?
211 * for which cs configuration matches for 2430 SDP?
212 */
213 idx = get_gpmc0_type();
214 if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
215 printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
216 return;
217 }
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000218 config_sel = (unsigned char *)(chip_sel_board[idx]);
Vimal Singhc2798e92010-02-15 10:03:33 -0800219
220 while (cs < GPMC_CS_NUM) {
221 switch (config_sel[cs]) {
222 case PDC_NOR:
223 if (norcs > GPMC_CS_NUM)
224 norcs = cs;
225 break;
226 case PDC_NAND:
227 if (nandcs > GPMC_CS_NUM)
228 nandcs = cs;
229 break;
230 case PDC_ONENAND:
231 if (onenandcs > GPMC_CS_NUM)
232 onenandcs = cs;
233 break;
234 };
235 cs++;
236 }
237
238 if (norcs > GPMC_CS_NUM)
Thomas Weber31849482010-03-25 20:21:54 +0000239 printk(KERN_INFO "NOR: Unable to find configuration "
240 "in GPMC\n");
Vimal Singhc2798e92010-02-15 10:03:33 -0800241 else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000242 board_nor_init(partition_info[0].parts,
243 partition_info[0].nr_parts, norcs);
Vimal Singhc2798e92010-02-15 10:03:33 -0800244
245 if (onenandcs > GPMC_CS_NUM)
246 printk(KERN_INFO "OneNAND: Unable to find configuration "
Thomas Weber31849482010-03-25 20:21:54 +0000247 "in GPMC\n");
Vimal Singhc2798e92010-02-15 10:03:33 -0800248 else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000249 board_onenand_init(partition_info[1].parts,
250 partition_info[1].nr_parts, onenandcs);
Vimal Singhc2798e92010-02-15 10:03:33 -0800251
252 if (nandcs > GPMC_CS_NUM)
253 printk(KERN_INFO "NAND: Unable to find configuration "
Thomas Weber31849482010-03-25 20:21:54 +0000254 "in GPMC\n");
Vimal Singhc2798e92010-02-15 10:03:33 -0800255 else
Sukumar Ghorai13d6b732010-07-09 14:27:47 +0000256 board_nand_init(partition_info[2].parts,
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +0530257 partition_info[2].nr_parts, nandcs, nand_type);
Vimal Singhc2798e92010-02-15 10:03:33 -0800258}