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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_optidma.c - Opti DMA PATA for new ATA layer
3 * (C) 2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * The Opti DMA controllers are related to the older PIO PCI controllers
7 * and indeed the VLB ones. The main differences are that the timing
8 * numbers are now based off PCI clocks not VLB and differ, and that
9 * MWDMA is supported.
10 *
11 * This driver should support Viper-N+, FireStar, FireStar Plus.
12 *
13 * These devices support virtual DMA for read (aka the CS5520). Later
14 * chips support UDMA33, but only if the rest of the board logic does,
15 * so you have to get this right. We don't support the virtual DMA
16 * but we do handle UDMA.
17 *
18 * Bits that are worth knowing
19 * Most control registers are shadowed into I/O registers
20 * 0x1F5 bit 0 tells you if the PCI/VLB clock is 33 or 25Mhz
21 * Virtual DMA registers *move* between rev 0x02 and rev 0x10
22 * UDMA requires a 66MHz FSB
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
31#include <linux/delay.h>
32#include <scsi/scsi_host.h>
33#include <linux/libata.h>
34
35#define DRV_NAME "pata_optidma"
Alan Cox5c25bf02007-03-26 21:43:43 -080036#define DRV_VERSION "0.3.2"
Jeff Garzik669a5db2006-08-29 18:12:40 -040037
38enum {
39 READ_REG = 0, /* index of Read cycle timing register */
40 WRITE_REG = 1, /* index of Write cycle timing register */
41 CNTRL_REG = 3, /* index of Control register */
42 STRAP_REG = 5, /* index of Strap register */
43 MISC_REG = 6 /* index of Miscellaneous register */
44};
45
46static int pci_clock; /* 0 = 33 1 = 25 */
47
48/**
49 * optidma_pre_reset - probe begin
Tejun Heocc0680a2007-08-06 18:36:23 +090050 * @link: ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +090051 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040052 *
53 * Set up cable type and use generic probe init
54 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040055
Tejun Heocc0680a2007-08-06 18:36:23 +090056static int optidma_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040057{
Tejun Heocc0680a2007-08-06 18:36:23 +090058 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040059 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Jeff Garzik85cd7252006-08-31 00:03:49 -040060 static const struct pci_bits optidma_enable_bits = {
Jeff Garzik669a5db2006-08-29 18:12:40 -040061 0x40, 1, 0x08, 0x00
62 };
63
Alan Coxc9619222006-09-26 17:53:38 +010064 if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits))
65 return -ENOENT;
66
Tejun Heocc0680a2007-08-06 18:36:23 +090067 return ata_std_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -040068}
69
70/**
71 * optidma_probe_reset - probe reset
72 * @ap: ATA port
73 *
74 * Perform the ATA probe and bus reset sequence plus specific handling
75 * for this hardware. The Opti needs little handling - we have no UDMA66
76 * capability that needs cable detection. All we must do is check the port
77 * is enabled.
78 */
79
80static void optidma_error_handler(struct ata_port *ap)
81{
82 ata_bmdma_drive_eh(ap, optidma_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
83}
84
85/**
86 * optidma_unlock - unlock control registers
87 * @ap: ATA port
88 *
89 * Unlock the control register block for this adapter. Registers must not
90 * be unlocked in a situation where libata might look at them.
91 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040092
Jeff Garzik669a5db2006-08-29 18:12:40 -040093static void optidma_unlock(struct ata_port *ap)
94{
Tejun Heo0d5ff562007-02-01 15:06:36 +090095 void __iomem *regio = ap->ioaddr.cmd_addr;
Jeff Garzik85cd7252006-08-31 00:03:49 -040096
Jeff Garzik669a5db2006-08-29 18:12:40 -040097 /* These 3 unlock the control register access */
Tejun Heo0d5ff562007-02-01 15:06:36 +090098 ioread16(regio + 1);
99 ioread16(regio + 1);
100 iowrite8(3, regio + 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400101}
102
103/**
104 * optidma_lock - issue temporary relock
105 * @ap: ATA port
106 *
107 * Re-lock the configuration register settings.
108 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400109
Jeff Garzik669a5db2006-08-29 18:12:40 -0400110static void optidma_lock(struct ata_port *ap)
111{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900112 void __iomem *regio = ap->ioaddr.cmd_addr;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400113
Jeff Garzik669a5db2006-08-29 18:12:40 -0400114 /* Relock */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900115 iowrite8(0x83, regio + 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400116}
117
118/**
Alan Cox5c25bf02007-03-26 21:43:43 -0800119 * optidma_mode_setup - set mode data
Jeff Garzik669a5db2006-08-29 18:12:40 -0400120 * @ap: ATA interface
121 * @adev: ATA device
122 * @mode: Mode to set
123 *
124 * Called to do the DMA or PIO mode setup. Timing numbers are all
125 * pre computed to keep the code clean. There are two tables depending
126 * on the hardware clock speed.
127 *
128 * WARNING: While we do this the IDE registers vanish. If we take an
129 * IRQ here we depend on the host set locking to avoid catastrophe.
130 */
131
Alan Cox5c25bf02007-03-26 21:43:43 -0800132static void optidma_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400133{
134 struct ata_device *pair = ata_dev_pair(adev);
135 int pio = adev->pio_mode - XFER_PIO_0;
136 int dma = adev->dma_mode - XFER_MW_DMA_0;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900137 void __iomem *regio = ap->ioaddr.cmd_addr;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400138 u8 addr;
139
140 /* Address table precomputed with a DCLK of 2 */
141 static const u8 addr_timing[2][5] = {
142 { 0x30, 0x20, 0x20, 0x10, 0x10 },
143 { 0x20, 0x20, 0x10, 0x10, 0x10 }
144 };
145 static const u8 data_rec_timing[2][5] = {
146 { 0x59, 0x46, 0x30, 0x20, 0x20 },
147 { 0x46, 0x32, 0x20, 0x20, 0x10 }
148 };
149 static const u8 dma_data_rec_timing[2][3] = {
150 { 0x76, 0x20, 0x20 },
151 { 0x54, 0x20, 0x10 }
152 };
153
154 /* Switch from IDE to control mode */
155 optidma_unlock(ap);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400156
Jeff Garzik669a5db2006-08-29 18:12:40 -0400157
158 /*
159 * As with many controllers the address setup time is shared
160 * and must suit both devices if present. FIXME: Check if we
161 * need to look at slowest of PIO/DMA mode of either device
162 */
163
164 if (mode >= XFER_MW_DMA_0)
165 addr = 0;
166 else
167 addr = addr_timing[pci_clock][pio];
Jeff Garzik85cd7252006-08-31 00:03:49 -0400168
Jeff Garzik669a5db2006-08-29 18:12:40 -0400169 if (pair) {
170 u8 pair_addr;
171 /* Hardware constraint */
172 if (pair->dma_mode)
173 pair_addr = 0;
174 else
175 pair_addr = addr_timing[pci_clock][pair->pio_mode - XFER_PIO_0];
176 if (pair_addr > addr)
177 addr = pair_addr;
178 }
Jeff Garzik85cd7252006-08-31 00:03:49 -0400179
Jeff Garzik669a5db2006-08-29 18:12:40 -0400180 /* Commence primary programming sequence */
181 /* First we load the device number into the timing select */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900182 iowrite8(adev->devno, regio + MISC_REG);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400183 /* Now we load the data timings into read data/write data */
184 if (mode < XFER_MW_DMA_0) {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900185 iowrite8(data_rec_timing[pci_clock][pio], regio + READ_REG);
186 iowrite8(data_rec_timing[pci_clock][pio], regio + WRITE_REG);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400187 } else if (mode < XFER_UDMA_0) {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900188 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + READ_REG);
189 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + WRITE_REG);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400190 }
191 /* Finally we load the address setup into the misc register */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900192 iowrite8(addr | adev->devno, regio + MISC_REG);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400193
194 /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900195 iowrite8(0x85, regio + CNTRL_REG);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400196
Jeff Garzik669a5db2006-08-29 18:12:40 -0400197 /* Switch back to IDE mode */
198 optidma_lock(ap);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400199
Jeff Garzik669a5db2006-08-29 18:12:40 -0400200 /* Note: at this point our programming is incomplete. We are
201 not supposed to program PCI 0x43 "things we hacked onto the chip"
202 until we've done both sets of PIO/DMA timings */
203}
204
205/**
Alan Cox5c25bf02007-03-26 21:43:43 -0800206 * optiplus_mode_setup - DMA setup for Firestar Plus
Jeff Garzik669a5db2006-08-29 18:12:40 -0400207 * @ap: ATA port
208 * @adev: device
209 * @mode: desired mode
210 *
211 * The Firestar plus has additional UDMA functionality for UDMA0-2 and
212 * requires we do some additional work. Because the base work we must do
213 * is mostly shared we wrap the Firestar setup functionality in this
214 * one
215 */
216
Alan Cox5c25bf02007-03-26 21:43:43 -0800217static void optiplus_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400218{
219 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
220 u8 udcfg;
221 u8 udslave;
222 int dev2 = 2 * adev->devno;
223 int unit = 2 * ap->port_no + adev->devno;
224 int udma = mode - XFER_UDMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400225
Jeff Garzik669a5db2006-08-29 18:12:40 -0400226 pci_read_config_byte(pdev, 0x44, &udcfg);
227 if (mode <= XFER_UDMA_0) {
228 udcfg &= ~(1 << unit);
Alan Cox5c25bf02007-03-26 21:43:43 -0800229 optidma_mode_setup(ap, adev, adev->dma_mode);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400230 } else {
231 udcfg |= (1 << unit);
232 if (ap->port_no) {
233 pci_read_config_byte(pdev, 0x45, &udslave);
234 udslave &= ~(0x03 << dev2);
235 udslave |= (udma << dev2);
236 pci_write_config_byte(pdev, 0x45, udslave);
237 } else {
238 udcfg &= ~(0x30 << dev2);
239 udcfg |= (udma << dev2);
240 }
241 }
242 pci_write_config_byte(pdev, 0x44, udcfg);
243}
244
245/**
246 * optidma_set_pio_mode - PIO setup callback
247 * @ap: ATA port
248 * @adev: Device
249 *
250 * The libata core provides separate functions for handling PIO and
251 * DMA programming. The architecture of the Firestar makes it easier
252 * for us to have a common function so we provide wrappers
253 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400254
Jeff Garzik669a5db2006-08-29 18:12:40 -0400255static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
256{
Alan Cox5c25bf02007-03-26 21:43:43 -0800257 optidma_mode_setup(ap, adev, adev->pio_mode);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400258}
259
260/**
261 * optidma_set_dma_mode - DMA setup callback
262 * @ap: ATA port
263 * @adev: Device
264 *
265 * The libata core provides separate functions for handling PIO and
266 * DMA programming. The architecture of the Firestar makes it easier
267 * for us to have a common function so we provide wrappers
268 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400269
Jeff Garzik669a5db2006-08-29 18:12:40 -0400270static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
271{
Alan Cox5c25bf02007-03-26 21:43:43 -0800272 optidma_mode_setup(ap, adev, adev->dma_mode);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400273}
274
275/**
276 * optiplus_set_pio_mode - PIO setup callback
277 * @ap: ATA port
278 * @adev: Device
279 *
280 * The libata core provides separate functions for handling PIO and
281 * DMA programming. The architecture of the Firestar makes it easier
282 * for us to have a common function so we provide wrappers
283 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400284
Jeff Garzik669a5db2006-08-29 18:12:40 -0400285static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
286{
Alan Cox5c25bf02007-03-26 21:43:43 -0800287 optiplus_mode_setup(ap, adev, adev->pio_mode);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400288}
289
290/**
291 * optiplus_set_dma_mode - DMA setup callback
292 * @ap: ATA port
293 * @adev: Device
294 *
295 * The libata core provides separate functions for handling PIO and
296 * DMA programming. The architecture of the Firestar makes it easier
297 * for us to have a common function so we provide wrappers
298 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400299
Jeff Garzik669a5db2006-08-29 18:12:40 -0400300static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
301{
Alan Cox5c25bf02007-03-26 21:43:43 -0800302 optiplus_mode_setup(ap, adev, adev->dma_mode);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400303}
304
305/**
306 * optidma_make_bits - PCI setup helper
307 * @adev: ATA device
308 *
309 * Turn the ATA device setup into PCI configuration bits
310 * for register 0x43 and return the two bits needed.
311 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400312
Jeff Garzik669a5db2006-08-29 18:12:40 -0400313static u8 optidma_make_bits43(struct ata_device *adev)
314{
315 static const u8 bits43[5] = {
316 0, 0, 0, 1, 2
317 };
318 if (!ata_dev_enabled(adev))
319 return 0;
320 if (adev->dma_mode)
321 return adev->dma_mode - XFER_MW_DMA_0;
322 return bits43[adev->pio_mode - XFER_PIO_0];
323}
324
325/**
Alan Cox5c25bf02007-03-26 21:43:43 -0800326 * optidma_set_mode - mode setup
Tejun Heo02607312007-08-06 18:36:23 +0900327 * @link: link to set up
Jeff Garzik669a5db2006-08-29 18:12:40 -0400328 *
Alan Cox5c25bf02007-03-26 21:43:43 -0800329 * Use the standard setup to tune the chipset and then finalise the
330 * configuration by writing the nibble of extra bits of data into
331 * the chip.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400332 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400333
Tejun Heo02607312007-08-06 18:36:23 +0900334static int optidma_set_mode(struct ata_link *link, struct ata_device **r_failed)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400335{
Tejun Heo02607312007-08-06 18:36:23 +0900336 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400337 u8 r;
338 int nybble = 4 * ap->port_no;
339 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Tejun Heo02607312007-08-06 18:36:23 +0900340 int rc = ata_do_set_mode(link, r_failed);
Alan Cox5c25bf02007-03-26 21:43:43 -0800341 if (rc == 0) {
342 pci_read_config_byte(pdev, 0x43, &r);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400343
Alan Cox5c25bf02007-03-26 21:43:43 -0800344 r &= (0x0F << nybble);
Tejun Heo02607312007-08-06 18:36:23 +0900345 r |= (optidma_make_bits43(&link->device[0]) +
346 (optidma_make_bits43(&link->device[0]) << 2)) << nybble;
Alan Cox5c25bf02007-03-26 21:43:43 -0800347 pci_write_config_byte(pdev, 0x43, r);
348 }
349 return rc;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400350}
351
352static struct scsi_host_template optidma_sht = {
353 .module = THIS_MODULE,
354 .name = DRV_NAME,
355 .ioctl = ata_scsi_ioctl,
356 .queuecommand = ata_scsi_queuecmd,
357 .can_queue = ATA_DEF_QUEUE,
358 .this_id = ATA_SHT_THIS_ID,
359 .sg_tablesize = LIBATA_MAX_PRD,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400360 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
361 .emulated = ATA_SHT_EMULATED,
362 .use_clustering = ATA_SHT_USE_CLUSTERING,
363 .proc_name = DRV_NAME,
364 .dma_boundary = ATA_DMA_BOUNDARY,
365 .slave_configure = ata_scsi_slave_config,
Tejun Heoafdfe892006-11-29 11:26:47 +0900366 .slave_destroy = ata_scsi_slave_destroy,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400367 .bios_param = ata_std_bios_param,
368};
369
370static struct ata_port_operations optidma_port_ops = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400371 .set_piomode = optidma_set_pio_mode,
372 .set_dmamode = optidma_set_dma_mode,
373
374 .tf_load = ata_tf_load,
375 .tf_read = ata_tf_read,
376 .check_status = ata_check_status,
377 .exec_command = ata_exec_command,
378 .dev_select = ata_std_dev_select,
379
380 .freeze = ata_bmdma_freeze,
381 .thaw = ata_bmdma_thaw,
382 .post_internal_cmd = ata_bmdma_post_internal_cmd,
383 .error_handler = optidma_error_handler,
Alan Cox5c25bf02007-03-26 21:43:43 -0800384 .set_mode = optidma_set_mode,
385 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400386
387 .bmdma_setup = ata_bmdma_setup,
388 .bmdma_start = ata_bmdma_start,
389 .bmdma_stop = ata_bmdma_stop,
390 .bmdma_status = ata_bmdma_status,
391
392 .qc_prep = ata_qc_prep,
393 .qc_issue = ata_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400394
Tejun Heo0d5ff562007-02-01 15:06:36 +0900395 .data_xfer = ata_data_xfer,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400396
397 .irq_handler = ata_interrupt,
398 .irq_clear = ata_bmdma_irq_clear,
Akira Iguchi246ce3b2007-01-26 16:27:58 +0900399 .irq_on = ata_irq_on,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400400
Alan Cox81ad1832007-08-22 22:55:41 +0100401 .port_start = ata_sff_port_start,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400402};
403
404static struct ata_port_operations optiplus_port_ops = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400405 .set_piomode = optiplus_set_pio_mode,
406 .set_dmamode = optiplus_set_dma_mode,
407
408 .tf_load = ata_tf_load,
409 .tf_read = ata_tf_read,
410 .check_status = ata_check_status,
411 .exec_command = ata_exec_command,
412 .dev_select = ata_std_dev_select,
413
414 .freeze = ata_bmdma_freeze,
415 .thaw = ata_bmdma_thaw,
416 .post_internal_cmd = ata_bmdma_post_internal_cmd,
417 .error_handler = optidma_error_handler,
Alan Cox5c25bf02007-03-26 21:43:43 -0800418 .set_mode = optidma_set_mode,
419 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400420
421 .bmdma_setup = ata_bmdma_setup,
422 .bmdma_start = ata_bmdma_start,
423 .bmdma_stop = ata_bmdma_stop,
424 .bmdma_status = ata_bmdma_status,
425
426 .qc_prep = ata_qc_prep,
427 .qc_issue = ata_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400428
Tejun Heo0d5ff562007-02-01 15:06:36 +0900429 .data_xfer = ata_data_xfer,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400430
431 .irq_handler = ata_interrupt,
432 .irq_clear = ata_bmdma_irq_clear,
Akira Iguchi246ce3b2007-01-26 16:27:58 +0900433 .irq_on = ata_irq_on,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400434
Alan Cox81ad1832007-08-22 22:55:41 +0100435 .port_start = ata_sff_port_start,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400436};
437
438/**
439 * optiplus_with_udma - Look for UDMA capable setup
440 * @pdev; ATA controller
441 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400442
Jeff Garzik669a5db2006-08-29 18:12:40 -0400443static int optiplus_with_udma(struct pci_dev *pdev)
444{
445 u8 r;
446 int ret = 0;
447 int ioport = 0x22;
448 struct pci_dev *dev1;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400449
Jeff Garzik669a5db2006-08-29 18:12:40 -0400450 /* Find function 1 */
451 dev1 = pci_get_device(0x1045, 0xC701, NULL);
452 if(dev1 == NULL)
453 return 0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400454
Jeff Garzik669a5db2006-08-29 18:12:40 -0400455 /* Rev must be >= 0x10 */
456 pci_read_config_byte(dev1, 0x08, &r);
457 if (r < 0x10)
458 goto done_nomsg;
459 /* Read the chipset system configuration to check our mode */
460 pci_read_config_byte(dev1, 0x5F, &r);
461 ioport |= (r << 8);
462 outb(0x10, ioport);
463 /* Must be 66Mhz sync */
464 if ((inb(ioport + 2) & 1) == 0)
465 goto done;
466
467 /* Check the ATA arbitration/timing is suitable */
468 pci_read_config_byte(pdev, 0x42, &r);
469 if ((r & 0x36) != 0x36)
470 goto done;
471 pci_read_config_byte(dev1, 0x52, &r);
472 if (r & 0x80) /* IDEDIR disabled */
473 ret = 1;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400474done:
Jeff Garzik669a5db2006-08-29 18:12:40 -0400475 printk(KERN_WARNING "UDMA not supported in this configuration.\n");
476done_nomsg: /* Wrong chip revision */
477 pci_dev_put(dev1);
478 return ret;
479}
480
481static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id)
482{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200483 static const struct ata_port_info info_82c700 = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400484 .sht = &optidma_sht,
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400485 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400486 .pio_mask = 0x1f,
487 .mwdma_mask = 0x07,
488 .port_ops = &optidma_port_ops
489 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200490 static const struct ata_port_info info_82c700_udma = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400491 .sht = &optidma_sht,
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400492 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400493 .pio_mask = 0x1f,
494 .mwdma_mask = 0x07,
495 .udma_mask = 0x07,
496 .port_ops = &optiplus_port_ops
497 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200498 const struct ata_port_info *ppi[] = { &info_82c700, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400499 static int printed_version;
500
501 if (!printed_version++)
502 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
503
504 /* Fixed location chipset magic */
505 inw(0x1F1);
506 inw(0x1F1);
507 pci_clock = inb(0x1F5) & 1; /* 0 = 33Mhz, 1 = 25Mhz */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400508
Jeff Garzik669a5db2006-08-29 18:12:40 -0400509 if (optiplus_with_udma(dev))
Tejun Heo1626aeb2007-05-04 12:43:58 +0200510 ppi[0] = &info_82c700_udma;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400511
Tejun Heo1626aeb2007-05-04 12:43:58 +0200512 return ata_pci_init_one(dev, ppi);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400513}
514
515static const struct pci_device_id optidma[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400516 { PCI_VDEVICE(OPTI, 0xD568), }, /* Opti 82C700 */
517
518 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400519};
520
521static struct pci_driver optidma_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400522 .name = DRV_NAME,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400523 .id_table = optidma,
524 .probe = optidma_init_one,
Alan30ced0f2006-11-22 16:57:36 +0000525 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900526#ifdef CONFIG_PM
Alan30ced0f2006-11-22 16:57:36 +0000527 .suspend = ata_pci_device_suspend,
528 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900529#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400530};
531
532static int __init optidma_init(void)
533{
534 return pci_register_driver(&optidma_pci_driver);
535}
536
Jeff Garzik669a5db2006-08-29 18:12:40 -0400537static void __exit optidma_exit(void)
538{
539 pci_unregister_driver(&optidma_pci_driver);
540}
541
Jeff Garzik669a5db2006-08-29 18:12:40 -0400542MODULE_AUTHOR("Alan Cox");
543MODULE_DESCRIPTION("low-level driver for Opti Firestar/Firestar Plus");
544MODULE_LICENSE("GPL");
545MODULE_DEVICE_TABLE(pci, optidma);
546MODULE_VERSION(DRV_VERSION);
547
548module_init(optidma_init);
549module_exit(optidma_exit);