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gerrit-public.fairphone.software / kernel / msm / 82015c4eae2ac67cfed8e98f8d9a4ee77a2d26ca / . / arch / arm / boot / dts / at91sam9g45.dtsi
blob: 8908f078c307b6cea38e0bc8afaf77193e11b542 [file] [log] [blame]
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]32 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
39 memory@70000000 {
40 reg = <0x70000000 0x10000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]56 #interrupt-cells = <2>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 interrupt-parent;
60 reg = <0xfffff000 0x200>;
61 };
62
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +0800[diff] [blame]63 ramc0: ramc@ffffe400 {
64 compatible = "atmel,at91sam9g45-ddramc";
65 reg = <0xffffe400 0x200
66 0xffffe600 0x200>;
67 };
68
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame]69 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +0800[diff] [blame]74 rstc@fffffd00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffd00 0x10>;
77 };
78
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +0100[diff] [blame]79 pit: timer@fffffd30 {
80 compatible = "atmel,at91sam9260-pit";
81 reg = <0xfffffd30 0xf>;
82 interrupts = <1 4>;
83 };
84
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]85
Jean-Christophe PLAGNIOL-VILLARD82015c42012-03-02 21:01:00 +0800[diff] [blame^]86 shdwc@fffffd10 {
87 compatible = "atmel,at91sam9rl-shdwc";
88 reg = <0xfffffd10 0x10>;
89 };
90
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100[diff] [blame]91 tcb0: timer@fff7c000 {
92 compatible = "atmel,at91rm9200-tcb";
93 reg = <0xfff7c000 0x100>;
94 interrupts = <18 4>;
95 };
96
97 tcb1: timer@fffd4000 {
98 compatible = "atmel,at91rm9200-tcb";
99 reg = <0xfffd4000 0x100>;
100 interrupts = <18 4>;
101 };
102
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]103 dma: dma-controller@ffffec00 {
104 compatible = "atmel,at91sam9g45-dma";
105 reg = <0xffffec00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]106 interrupts = <21 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]107 };
108
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]109 pioA: gpio@fffff200 {
110 compatible = "atmel,at91rm9200-gpio";
111 reg = <0xfffff200 0x100>;
112 interrupts = <2 4>;
113 #gpio-cells = <2>;
114 gpio-controller;
115 interrupt-controller;
116 };
117
118 pioB: gpio@fffff400 {
119 compatible = "atmel,at91rm9200-gpio";
120 reg = <0xfffff400 0x100>;
121 interrupts = <3 4>;
122 #gpio-cells = <2>;
123 gpio-controller;
124 interrupt-controller;
125 };
126
127 pioC: gpio@fffff600 {
128 compatible = "atmel,at91rm9200-gpio";
129 reg = <0xfffff600 0x100>;
130 interrupts = <4 4>;
131 #gpio-cells = <2>;
132 gpio-controller;
133 interrupt-controller;
134 };
135
136 pioD: gpio@fffff800 {
137 compatible = "atmel,at91rm9200-gpio";
138 reg = <0xfffff800 0x100>;
139 interrupts = <5 4>;
140 #gpio-cells = <2>;
141 gpio-controller;
142 interrupt-controller;
143 };
144
145 pioE: gpio@fffffa00 {
146 compatible = "atmel,at91rm9200-gpio";
147 reg = <0xfffffa00 0x100>;
148 interrupts = <5 4>;
149 #gpio-cells = <2>;
150 gpio-controller;
151 interrupt-controller;
152 };
153
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]154 dbgu: serial@ffffee00 {
155 compatible = "atmel,at91sam9260-usart";
156 reg = <0xffffee00 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]157 interrupts = <1 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]158 status = "disabled";
159 };
160
161 usart0: serial@fff8c000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xfff8c000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]164 interrupts = <7 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]165 atmel,use-dma-rx;
166 atmel,use-dma-tx;
167 status = "disabled";
168 };
169
170 usart1: serial@fff90000 {
171 compatible = "atmel,at91sam9260-usart";
172 reg = <0xfff90000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]173 interrupts = <8 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]174 atmel,use-dma-rx;
175 atmel,use-dma-tx;
176 status = "disabled";
177 };
178
179 usart2: serial@fff94000 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xfff94000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]182 interrupts = <9 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]183 atmel,use-dma-rx;
184 atmel,use-dma-tx;
185 status = "disabled";
186 };
187
188 usart3: serial@fff98000 {
189 compatible = "atmel,at91sam9260-usart";
190 reg = <0xfff98000 0x200>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]191 interrupts = <10 4>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]192 atmel,use-dma-rx;
193 atmel,use-dma-tx;
194 status = "disabled";
195 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]196
197 macb0: ethernet@fffbc000 {
198 compatible = "cdns,at32ap7000-macb", "cdns,macb";
199 reg = <0xfffbc000 0x100>;
Nicolas Ferree2615012011-11-22 22:26:09 +0100[diff] [blame]200 interrupts = <25 4>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100[diff] [blame]201 status = "disabled";
202 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]203 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800[diff] [blame]204
205 nand0: nand@40000000 {
206 compatible = "atmel,at91rm9200-nand";
207 #address-cells = <1>;
208 #size-cells = <1>;
209 reg = <0x40000000 0x10000000
210 0xffffe200 0x200
211 >;
212 atmel,nand-addr-offset = <21>;
213 atmel,nand-cmd-offset = <22>;
214 gpios = <&pioC 8 0
215 &pioC 14 0
216 0
217 >;
218 status = "disabled";
219 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]220 };
Jean-Christophe PLAGNIOL-VILLARD8f24bda2012-02-05 18:32:37 +0800[diff] [blame]221
222 i2c@0 {
223 compatible = "i2c-gpio";
224 gpios = <&pioA 20 0 /* sda */
225 &pioA 21 0 /* scl */
226 >;
227 i2c-gpio,sda-open-drain;
228 i2c-gpio,scl-open-drain;
229 i2c-gpio,delay-us = <5>; /* ~100 kHz */
230 #address-cells = <1>;
231 #size-cells = <0>;
232 status = "disabled";
233 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200[diff] [blame]234};