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Abhijeet Dharmapurikar2d996b12013-01-03 17:48:02 -08001/* Copyright (c) 2012-2013 The Linux Foundation. All rights reserved.
David Keitel80668952012-07-27 14:25:49 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#define pr_fmt(fmt) "%s: " fmt, __func__
14
15#include <linux/module.h>
16#include <linux/slab.h>
17#include <linux/err.h>
18#include <linux/spmi.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/radix-tree.h>
22#include <linux/interrupt.h>
David Keiteld681cda2012-10-02 15:44:21 -070023#include <linux/delay.h>
David Keitel80668952012-07-27 14:25:49 -070024#include <linux/qpnp/qpnp-adc.h>
25#include <linux/power_supply.h>
26#include <linux/bitops.h>
27
28/* Interrupt offsets */
29#define INT_RT_STS(base) (base + 0x10)
30#define INT_SET_TYPE(base) (base + 0x11)
31#define INT_POLARITY_HIGH(base) (base + 0x12)
32#define INT_POLARITY_LOW(base) (base + 0x13)
33#define INT_LATCHED_CLR(base) (base + 0x14)
34#define INT_EN_SET(base) (base + 0x15)
35#define INT_EN_CLR(base) (base + 0x16)
36#define INT_LATCHED_STS(base) (base + 0x18)
37#define INT_PENDING_STS(base) (base + 0x19)
38#define INT_MID_SEL(base) (base + 0x1A)
39#define INT_PRIORITY(base) (base + 0x1B)
40
41/* Peripheral register offsets */
42#define CHGR_CHG_OPTION 0x08
43#define CHGR_ATC_STATUS 0x0A
44#define CHGR_VBAT_STATUS 0x0B
45#define CHGR_IBAT_BMS 0x0C
46#define CHGR_IBAT_STS 0x0D
47#define CHGR_VDD_MAX 0x40
48#define CHGR_VDD_SAFE 0x41
49#define CHGR_VDD_MAX_STEP 0x42
50#define CHGR_IBAT_MAX 0x44
51#define CHGR_IBAT_SAFE 0x45
52#define CHGR_VIN_MIN 0x47
53#define CHGR_VIN_MIN_STEP 0x48
54#define CHGR_CHG_CTRL 0x49
55#define CHGR_CHG_FAILED 0x4A
56#define CHGR_ATC_CTRL 0x4B
57#define CHGR_ATC_FAILED 0x4C
58#define CHGR_VBAT_TRKL 0x50
59#define CHGR_VBAT_WEAK 0x52
60#define CHGR_IBAT_ATC_A 0x54
61#define CHGR_IBAT_ATC_B 0x55
62#define CHGR_IBAT_TERM_CHGR 0x5B
63#define CHGR_IBAT_TERM_BMS 0x5C
64#define CHGR_VBAT_DET 0x5D
65#define CHGR_TTRKL_MAX 0x5F
66#define CHGR_TTRKL_MAX_EN 0x60
67#define CHGR_TCHG_MAX 0x61
68#define CHGR_CHG_WDOG_TIME 0x62
69#define CHGR_CHG_WDOG_DLY 0x63
70#define CHGR_CHG_WDOG_PET 0x64
71#define CHGR_CHG_WDOG_EN 0x65
David Keitel9201df32013-01-10 18:38:34 -080072#define CHGR_IR_DROP_COMPEN 0x67
David Keitel80668952012-07-27 14:25:49 -070073#define CHGR_USB_IUSB_MAX 0x44
David Keiteld681cda2012-10-02 15:44:21 -070074#define CHGR_USB_USB_SUSP 0x47
David Keitel6f865cd2012-11-30 15:04:32 -080075#define CHGR_USB_USB_OTG_CTL 0x48
David Keitel80668952012-07-27 14:25:49 -070076#define CHGR_USB_ENUM_T_STOP 0x4E
77#define CHGR_CHG_TEMP_THRESH 0x66
78#define CHGR_BAT_IF_PRES_STATUS 0x08
David Keiteld681cda2012-10-02 15:44:21 -070079#define CHGR_STATUS 0x09
David Keitel80668952012-07-27 14:25:49 -070080#define CHGR_BAT_IF_VCP 0x42
81#define CHGR_BAT_IF_BATFET_CTRL1 0x90
82#define CHGR_MISC_BOOT_DONE 0x42
David Keiteld681cda2012-10-02 15:44:21 -070083#define CHGR_BUCK_COMPARATOR_OVRIDE_3 0xED
David Keitel9201df32013-01-10 18:38:34 -080084#define CHGR_BUCK_BCK_VBAT_REG_MODE 0x74
Sridhar Parasuramae183bd2012-12-21 09:28:46 -080085#define MISC_REVISION2 0x01
David Keitel5c3a7702012-12-20 11:13:21 -080086#define USB_OVP_CTL 0x42
David Keiteld681cda2012-10-02 15:44:21 -070087#define SEC_ACCESS 0xD0
David Keitel80668952012-07-27 14:25:49 -070088
89/* SMBB peripheral subtype values */
90#define REG_OFFSET_PERP_SUBTYPE 0x05
91#define SMBB_CHGR_SUBTYPE 0x01
92#define SMBB_BUCK_SUBTYPE 0x02
93#define SMBB_BAT_IF_SUBTYPE 0x03
94#define SMBB_USB_CHGPTH_SUBTYPE 0x04
95#define SMBB_DC_CHGPTH_SUBTYPE 0x05
96#define SMBB_BOOST_SUBTYPE 0x06
97#define SMBB_MISC_SUBTYPE 0x07
98
99#define QPNP_CHARGER_DEV_NAME "qcom,qpnp-charger"
100
David Keitelb80eda82012-10-15 10:49:11 -0700101/* Status bits and masks */
102#define CHGR_BOOT_DONE BIT(7)
103#define CHGR_CHG_EN BIT(7)
104#define CHGR_ON_BAT_FORCE_BIT BIT(0)
David Keitel5c3a7702012-12-20 11:13:21 -0800105#define USB_VALID_DEB_20MS 0x03
David Keitel9201df32013-01-10 18:38:34 -0800106#define BUCK_VBAT_REG_NODE_SEL_BIT BIT(0)
David Keitelb80eda82012-10-15 10:49:11 -0700107
David Keitel80668952012-07-27 14:25:49 -0700108/* Interrupt definitions */
109/* smbb_chg_interrupts */
110#define CHG_DONE_IRQ BIT(7)
111#define CHG_FAILED_IRQ BIT(6)
112#define FAST_CHG_ON_IRQ BIT(5)
113#define TRKL_CHG_ON_IRQ BIT(4)
114#define STATE_CHANGE_ON_IR BIT(3)
115#define CHGWDDOG_IRQ BIT(2)
116#define VBAT_DET_HI_IRQ BIT(1)
117#define VBAT_DET_LOW_IRQ BIT(0)
118
119/* smbb_buck_interrupts */
120#define VDD_LOOP_IRQ BIT(6)
121#define IBAT_LOOP_IRQ BIT(5)
122#define ICHG_LOOP_IRQ BIT(4)
123#define VCHG_LOOP_IRQ BIT(3)
124#define OVERTEMP_IRQ BIT(2)
125#define VREF_OV_IRQ BIT(1)
126#define VBAT_OV_IRQ BIT(0)
127
128/* smbb_bat_if_interrupts */
129#define PSI_IRQ BIT(4)
130#define VCP_ON_IRQ BIT(3)
131#define BAT_FET_ON_IRQ BIT(2)
132#define BAT_TEMP_OK_IRQ BIT(1)
133#define BATT_PRES_IRQ BIT(0)
134
135/* smbb_usb_interrupts */
136#define CHG_GONE_IRQ BIT(2)
137#define USBIN_VALID_IRQ BIT(1)
138#define COARSE_DET_USB_IRQ BIT(0)
139
140/* smbb_dc_interrupts */
141#define DCIN_VALID_IRQ BIT(1)
142#define COARSE_DET_DC_IRQ BIT(0)
143
144/* smbb_boost_interrupts */
145#define LIMIT_ERROR_IRQ BIT(1)
146#define BOOST_PWR_OK_IRQ BIT(0)
147
148/* smbb_misc_interrupts */
149#define TFTWDOG_IRQ BIT(0)
150
David Keiteld681cda2012-10-02 15:44:21 -0700151/* Workaround flags */
152#define CHG_FLAGS_VCP_WA BIT(0)
153
David Keitel80668952012-07-27 14:25:49 -0700154/**
155 * struct qpnp_chg_chip - device information
156 * @dev: device pointer to access the parent
157 * @spmi: spmi pointer to access spmi information
158 * @chgr_base: charger peripheral base address
159 * @buck_base: buck peripheral base address
160 * @bat_if_base: battery interface peripheral base address
161 * @usb_chgpth_base: USB charge path peripheral base address
162 * @dc_chgpth_base: DC charge path peripheral base address
163 * @boost_base: boost peripheral base address
164 * @misc_base: misc peripheral base address
165 * @freq_base: freq peripheral base address
166 * @chg_done: indicates that charging is completed
167 * @usb_present: present status of usb
168 * @dc_present: present status of dc
David Keitel3dd5e0f2012-12-12 18:12:36 -0800169 * @use_default_batt_values: flag to report default battery properties
David Keitel80668952012-07-27 14:25:49 -0700170 * @max_voltage_mv: the max volts the batt should be charged up to
David Keitel5d44fa52012-12-03 16:37:31 -0800171 * @min_voltage_mv: min battery voltage before turning the FET on
172 * @resume_voltage_mv: voltage at which the battery resumes charging
David Keitel80668952012-07-27 14:25:49 -0700173 * @term_current: the charging based term current
David Keitel5d44fa52012-12-03 16:37:31 -0800174 * @safe_current: battery safety current setting
David Keitel80668952012-07-27 14:25:49 -0700175 * @revision: PMIC revision
David Keitelbe208252013-01-31 14:49:25 -0800176 * @thermal_levels amount of thermal mitigation levels
177 * @thermal_mitigation thermal mitigation level values
178 * @therm_lvl_sel thermal mitigation level selection
David Keitel80668952012-07-27 14:25:49 -0700179 * @dc_psy power supply to export information to userspace
180 * @usb_psy power supply to export information to userspace
181 * @bms_psy power supply to export information to userspace
182 * @batt_psy: power supply to export information to userspace
David Keiteld681cda2012-10-02 15:44:21 -0700183 * @flags: flags to activate specific workarounds
184 * throughout the driver
David Keitel80668952012-07-27 14:25:49 -0700185 *
186 */
187struct qpnp_chg_chip {
188 struct device *dev;
189 struct spmi_device *spmi;
190 u16 chgr_base;
191 u16 buck_base;
192 u16 bat_if_base;
193 u16 usb_chgpth_base;
194 u16 dc_chgpth_base;
195 u16 boost_base;
196 u16 misc_base;
197 u16 freq_base;
198 unsigned int usbin_valid_irq;
David Keitel7450dcd2013-01-29 18:41:41 -0800199 unsigned int dcin_valid_irq;
David Keitel80668952012-07-27 14:25:49 -0700200 unsigned int chg_done_irq;
201 unsigned int chg_failed_irq;
202 bool chg_done;
203 bool usb_present;
204 bool dc_present;
David Keitel03ee6b52012-10-22 12:25:19 -0700205 bool charging_disabled;
David Keitel3dd5e0f2012-12-12 18:12:36 -0800206 bool use_default_batt_values;
David Keitel80668952012-07-27 14:25:49 -0700207 unsigned int max_bat_chg_current;
208 unsigned int safe_voltage_mv;
209 unsigned int max_voltage_mv;
210 unsigned int min_voltage_mv;
David Keitel5d44fa52012-12-03 16:37:31 -0800211 unsigned int resume_voltage_mv;
David Keitel80668952012-07-27 14:25:49 -0700212 unsigned int term_current;
David Keitel5d44fa52012-12-03 16:37:31 -0800213 unsigned int safe_current;
David Keitel80668952012-07-27 14:25:49 -0700214 unsigned int revision;
David Keitelbe208252013-01-31 14:49:25 -0800215 unsigned int thermal_levels;
216 unsigned int therm_lvl_sel;
217 unsigned int *thermal_mitigation;
David Keitel80668952012-07-27 14:25:49 -0700218 struct power_supply dc_psy;
219 struct power_supply *usb_psy;
220 struct power_supply *bms_psy;
221 struct power_supply batt_psy;
David Keiteld681cda2012-10-02 15:44:21 -0700222 uint32_t flags;
David Keitel80668952012-07-27 14:25:49 -0700223};
224
David Keitel80668952012-07-27 14:25:49 -0700225static struct of_device_id qpnp_charger_match_table[] = {
226 { .compatible = QPNP_CHARGER_DEV_NAME, },
227 {}
228};
229
230static int
231qpnp_chg_read(struct qpnp_chg_chip *chip, u8 *val,
232 u16 base, int count)
233{
234 int rc;
235 struct spmi_device *spmi = chip->spmi;
236
237 rc = spmi_ext_register_readl(spmi->ctrl, spmi->sid, base, val,
238 count);
239 if (rc) {
240 pr_err("SPMI read failed base=0x%02x sid=0x%02x rc=%d\n", base,
241 spmi->sid, rc);
242 return rc;
243 }
244 return 0;
245}
246
247static int
248qpnp_chg_write(struct qpnp_chg_chip *chip, u8 *val,
249 u16 base, int count)
250{
251 int rc;
252 struct spmi_device *spmi = chip->spmi;
253
254 rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, base, val,
255 count);
256 if (rc) {
257 pr_err("write failed base=0x%02x sid=0x%02x rc=%d\n",
258 base, spmi->sid, rc);
259 return rc;
260 }
261
262 return 0;
263}
264
265static int
266qpnp_chg_masked_write(struct qpnp_chg_chip *chip, u16 base,
267 u8 mask, u8 val, int count)
268{
269 int rc;
270 u8 reg;
271
272 rc = qpnp_chg_read(chip, &reg, base, count);
273 if (rc) {
274 pr_err("spmi read failed: addr=%03X, rc=%d\n", base, rc);
275 return rc;
276 }
277 pr_debug("addr = 0x%x read 0x%x\n", base, reg);
278
279 reg &= ~mask;
280 reg |= val & mask;
281
282 pr_debug("Writing 0x%x\n", reg);
283
284 rc = qpnp_chg_write(chip, &reg, base, count);
285 if (rc) {
286 pr_err("spmi write failed: addr=%03X, rc=%d\n", base, rc);
287 return rc;
288 }
289
290 return 0;
291}
292
David Keitel6f865cd2012-11-30 15:04:32 -0800293#define USB_OTG_EN_BIT BIT(0)
294static int
295qpnp_chg_is_otg_en_set(struct qpnp_chg_chip *chip)
296{
297 u8 usb_otg_en;
298 int rc;
299
300 rc = qpnp_chg_read(chip, &usb_otg_en,
301 chip->usb_chgpth_base + CHGR_USB_USB_OTG_CTL,
302 1);
303
304 if (rc) {
305 pr_err("spmi read failed: addr=%03X, rc=%d\n",
306 chip->usb_chgpth_base + CHGR_STATUS, rc);
307 return rc;
308 }
309 pr_debug("usb otg en 0x%x\n", usb_otg_en);
310
311 return (usb_otg_en & USB_OTG_EN_BIT) ? 1 : 0;
312}
313
David Keiteld681cda2012-10-02 15:44:21 -0700314#define USB_VALID_BIT BIT(7)
David Keitel80668952012-07-27 14:25:49 -0700315static int
316qpnp_chg_is_usb_chg_plugged_in(struct qpnp_chg_chip *chip)
317{
318 u8 usbin_valid_rt_sts;
319 int rc;
320
321 rc = qpnp_chg_read(chip, &usbin_valid_rt_sts,
David Keiteld681cda2012-10-02 15:44:21 -0700322 chip->usb_chgpth_base + CHGR_STATUS , 1);
David Keitel80668952012-07-27 14:25:49 -0700323
324 if (rc) {
325 pr_err("spmi read failed: addr=%03X, rc=%d\n",
David Keiteld681cda2012-10-02 15:44:21 -0700326 chip->usb_chgpth_base + CHGR_STATUS, rc);
David Keitel80668952012-07-27 14:25:49 -0700327 return rc;
328 }
329 pr_debug("chgr usb sts 0x%x\n", usbin_valid_rt_sts);
330
David Keiteld681cda2012-10-02 15:44:21 -0700331 return (usbin_valid_rt_sts & USB_VALID_BIT) ? 1 : 0;
David Keitel80668952012-07-27 14:25:49 -0700332}
333
334static int
335qpnp_chg_is_dc_chg_plugged_in(struct qpnp_chg_chip *chip)
336{
337 u8 dcin_valid_rt_sts;
338 int rc;
339
340 rc = qpnp_chg_read(chip, &dcin_valid_rt_sts,
341 INT_RT_STS(chip->dc_chgpth_base), 1);
342 if (rc) {
343 pr_err("spmi read failed: addr=%03X, rc=%d\n",
344 INT_RT_STS(chip->dc_chgpth_base), rc);
345 return rc;
346 }
347
348 return (dcin_valid_rt_sts & DCIN_VALID_IRQ) ? 1 : 0;
349}
350
David Keitel80668952012-07-27 14:25:49 -0700351#define QPNP_CHG_IUSB_MAX_MIN_100 100
352#define QPNP_CHG_IUSB_MAX_MIN_150 150
353#define QPNP_CHG_IUSB_MAX_MIN_MA 200
354#define QPNP_CHG_IUSB_MAX_MAX_MA 2500
355#define QPNP_CHG_IUSB_MAX_STEP_MA 100
356static int
357qpnp_chg_iusbmax_set(struct qpnp_chg_chip *chip, int mA)
358{
David Keiteld681cda2012-10-02 15:44:21 -0700359 int rc = 0;
360 u8 usb_reg = 0, temp = 8;
David Keitel80668952012-07-27 14:25:49 -0700361
362 if (mA == QPNP_CHG_IUSB_MAX_MIN_100) {
363 usb_reg = 0x00;
364 pr_debug("current=%d setting %02x\n", mA, usb_reg);
365 return qpnp_chg_write(chip, &usb_reg,
366 chip->usb_chgpth_base + CHGR_USB_IUSB_MAX, 1);
367 } else if (mA == QPNP_CHG_IUSB_MAX_MIN_150) {
368 usb_reg = 0x01;
369 pr_debug("current=%d setting %02x\n", mA, usb_reg);
370 return qpnp_chg_write(chip, &usb_reg,
371 chip->usb_chgpth_base + CHGR_USB_IUSB_MAX, 1);
372 }
373
374 if (mA < QPNP_CHG_IUSB_MAX_MIN_MA
375 || mA > QPNP_CHG_IUSB_MAX_MAX_MA) {
376 pr_err("bad mA=%d asked to set\n", mA);
377 return -EINVAL;
378 }
379
David Keitel80668952012-07-27 14:25:49 -0700380 usb_reg = mA / QPNP_CHG_IUSB_MAX_STEP_MA;
381
David Keiteld681cda2012-10-02 15:44:21 -0700382 if (chip->flags & CHG_FLAGS_VCP_WA) {
383 temp = 0xA5;
384 rc = qpnp_chg_write(chip, &temp,
385 chip->buck_base + SEC_ACCESS, 1);
386 rc = qpnp_chg_masked_write(chip,
387 chip->buck_base + CHGR_BUCK_COMPARATOR_OVRIDE_3,
388 0x0C, 0x0C, 1);
389 }
390
David Keitel80668952012-07-27 14:25:49 -0700391 pr_debug("current=%d setting 0x%x\n", mA, usb_reg);
David Keiteld681cda2012-10-02 15:44:21 -0700392 rc = qpnp_chg_write(chip, &usb_reg,
David Keitel80668952012-07-27 14:25:49 -0700393 chip->usb_chgpth_base + CHGR_USB_IUSB_MAX, 1);
David Keiteld681cda2012-10-02 15:44:21 -0700394
395 if (chip->flags & CHG_FLAGS_VCP_WA) {
396 temp = 0xA5;
397 udelay(200);
398 rc = qpnp_chg_write(chip, &temp,
399 chip->buck_base + SEC_ACCESS, 1);
400 rc = qpnp_chg_masked_write(chip,
401 chip->buck_base + CHGR_BUCK_COMPARATOR_OVRIDE_3,
402 0x0C, 0x00, 1);
403 }
404
405 return rc;
406}
407
408#define USB_SUSPEND_BIT BIT(0)
409static int
410qpnp_chg_usb_suspend_enable(struct qpnp_chg_chip *chip, int enable)
411{
412 return qpnp_chg_masked_write(chip,
413 chip->usb_chgpth_base + CHGR_USB_USB_SUSP,
414 USB_SUSPEND_BIT,
415 enable ? USB_SUSPEND_BIT : 0, 1);
David Keitel80668952012-07-27 14:25:49 -0700416}
417
418#define ENUM_T_STOP_BIT BIT(0)
419static irqreturn_t
420qpnp_chg_usb_usbin_valid_irq_handler(int irq, void *_chip)
421{
422 struct qpnp_chg_chip *chip = _chip;
David Keitel6f865cd2012-11-30 15:04:32 -0800423 int usb_present, host_mode;
David Keitel80668952012-07-27 14:25:49 -0700424
425 usb_present = qpnp_chg_is_usb_chg_plugged_in(chip);
David Keitel6f865cd2012-11-30 15:04:32 -0800426 host_mode = qpnp_chg_is_otg_en_set(chip);
427 pr_debug("usbin-valid triggered: %d host_mode: %d\n",
428 usb_present, host_mode);
429
430 /* In host mode notifications cmoe from USB supply */
431 if (host_mode)
432 return IRQ_HANDLED;
David Keitel80668952012-07-27 14:25:49 -0700433
434 if (chip->usb_present ^ usb_present) {
435 chip->usb_present = usb_present;
Sridhar Parasuramae183bd2012-12-21 09:28:46 -0800436 power_supply_set_present(chip->usb_psy,
437 chip->usb_present);
David Keitel80668952012-07-27 14:25:49 -0700438 }
439
440 return IRQ_HANDLED;
441}
442
David Keitel7450dcd2013-01-29 18:41:41 -0800443static irqreturn_t
444qpnp_chg_dc_dcin_valid_irq_handler(int irq, void *_chip)
445{
446 struct qpnp_chg_chip *chip = _chip;
447 int dc_present;
448
449 dc_present = qpnp_chg_is_dc_chg_plugged_in(chip);
450 pr_debug("dcin-valid triggered: %d\n", dc_present);
451
452 if (chip->dc_present ^ dc_present) {
453 chip->dc_present = dc_present;
454 power_supply_changed(&chip->dc_psy);
455 }
456
457 return IRQ_HANDLED;
458}
459
David Keitel80668952012-07-27 14:25:49 -0700460#define CHGR_CHG_FAILED_BIT BIT(7)
461static irqreturn_t
462qpnp_chg_chgr_chg_failed_irq_handler(int irq, void *_chip)
463{
464 struct qpnp_chg_chip *chip = _chip;
David Keitel4429b1f2012-10-18 10:42:50 -0700465 int rc;
David Keitel80668952012-07-27 14:25:49 -0700466
467 rc = qpnp_chg_masked_write(chip,
David Keiteld681cda2012-10-02 15:44:21 -0700468 chip->chgr_base + CHGR_CHG_FAILED,
David Keitel80668952012-07-27 14:25:49 -0700469 CHGR_CHG_FAILED_BIT,
470 CHGR_CHG_FAILED_BIT, 1);
471 if (rc)
472 pr_err("Failed to write chg_fail clear bit!\n");
473
David Keitel80668952012-07-27 14:25:49 -0700474 return IRQ_HANDLED;
475}
476
477static irqreturn_t
478qpnp_chg_chgr_chg_done_irq_handler(int irq, void *_chip)
479{
480 struct qpnp_chg_chip *chip = _chip;
481
482 pr_debug("CHG_DONE IRQ triggered\n");
483 chip->chg_done = true;
484
485 return IRQ_HANDLED;
486}
487
David Keitel03ee6b52012-10-22 12:25:19 -0700488static int
489qpnp_batt_property_is_writeable(struct power_supply *psy,
490 enum power_supply_property psp)
491{
492 switch (psp) {
493 case POWER_SUPPLY_PROP_CHARGING_ENABLED:
David Keitelbe208252013-01-31 14:49:25 -0800494 case POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL:
David Keitel03ee6b52012-10-22 12:25:19 -0700495 return 1;
496 default:
497 break;
498 }
499
500 return 0;
501}
502
David Keitel6f865cd2012-11-30 15:04:32 -0800503static int
504qpnp_chg_charge_en(struct qpnp_chg_chip *chip, int enable)
505{
506 return qpnp_chg_masked_write(chip, chip->chgr_base + CHGR_CHG_CTRL,
507 CHGR_CHG_EN,
508 enable ? CHGR_CHG_EN : 0, 1);
509}
510
511static int
512qpnp_chg_force_run_on_batt(struct qpnp_chg_chip *chip, int disable)
513{
David Keitelb2eaaee2012-12-19 14:53:28 -0800514 /* Don't run on battery for batteryless hardware */
515 if (chip->use_default_batt_values)
516 return 0;
517
David Keitel6f865cd2012-11-30 15:04:32 -0800518 /* This bit forces the charger to run off of the battery rather
519 * than a connected charger */
520 return qpnp_chg_masked_write(chip, chip->chgr_base + CHGR_CHG_CTRL,
521 CHGR_ON_BAT_FORCE_BIT,
522 disable ? CHGR_ON_BAT_FORCE_BIT : 0, 1);
523}
524
David Keitelbe208252013-01-31 14:49:25 -0800525static int
526qpnp_chg_buck_control(struct qpnp_chg_chip *chip, int enable)
527{
528 int rc;
529
530 if (chip->charging_disabled && enable) {
531 pr_debug("Charging disabled\n");
532 return 0;
533 }
534
535 rc = qpnp_chg_charge_en(chip, enable);
536 if (rc) {
537 pr_err("Failed to control charging %d\n", rc);
538 return rc;
539 }
540
541 rc = qpnp_chg_force_run_on_batt(chip, !enable);
542 if (rc)
543 pr_err("Failed to control charging %d\n", rc);
544
545 return rc;
546}
547
David Keitel6f865cd2012-11-30 15:04:32 -0800548static
549int switch_usb_to_charge_mode(struct qpnp_chg_chip *chip)
550{
551 int rc;
552
553 pr_debug("switch to charge mode\n");
554 if (!qpnp_chg_is_otg_en_set(chip))
555 return 0;
556
557 /* enable usb ovp fet */
558 rc = qpnp_chg_masked_write(chip,
559 chip->usb_chgpth_base + CHGR_USB_USB_OTG_CTL,
560 USB_OTG_EN_BIT,
561 0, 1);
562 if (rc) {
563 pr_err("Failed to turn on usb ovp rc = %d\n", rc);
564 return rc;
565 }
566
567 rc = qpnp_chg_force_run_on_batt(chip, chip->charging_disabled);
568 if (rc) {
569 pr_err("Failed re-enable charging rc = %d\n", rc);
570 return rc;
571 }
572
573 return 0;
574}
575
576static
577int switch_usb_to_host_mode(struct qpnp_chg_chip *chip)
578{
579 int rc;
580
581 pr_debug("switch to host mode\n");
582 if (qpnp_chg_is_otg_en_set(chip))
583 return 0;
584
585 rc = qpnp_chg_force_run_on_batt(chip, 1);
586 if (rc) {
587 pr_err("Failed to disable charging rc = %d\n", rc);
588 return rc;
589 }
590
591 /* force usb ovp fet off */
592 rc = qpnp_chg_masked_write(chip,
593 chip->usb_chgpth_base + CHGR_USB_USB_OTG_CTL,
594 USB_OTG_EN_BIT,
595 USB_OTG_EN_BIT, 1);
596 if (rc) {
597 pr_err("Failed to turn off usb ovp rc = %d\n", rc);
598 return rc;
599 }
600
601 return 0;
602}
603
David Keitel80668952012-07-27 14:25:49 -0700604static enum power_supply_property pm_power_props_mains[] = {
605 POWER_SUPPLY_PROP_PRESENT,
606 POWER_SUPPLY_PROP_ONLINE,
607};
608
609static enum power_supply_property msm_batt_power_props[] = {
David Keitelb80eda82012-10-15 10:49:11 -0700610 POWER_SUPPLY_PROP_CHARGING_ENABLED,
David Keitel80668952012-07-27 14:25:49 -0700611 POWER_SUPPLY_PROP_STATUS,
612 POWER_SUPPLY_PROP_CHARGE_TYPE,
613 POWER_SUPPLY_PROP_HEALTH,
614 POWER_SUPPLY_PROP_PRESENT,
615 POWER_SUPPLY_PROP_TECHNOLOGY,
616 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
617 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
618 POWER_SUPPLY_PROP_VOLTAGE_NOW,
619 POWER_SUPPLY_PROP_CAPACITY,
620 POWER_SUPPLY_PROP_CURRENT_NOW,
621 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
622 POWER_SUPPLY_PROP_TEMP,
David Keitelbe208252013-01-31 14:49:25 -0800623 POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL,
David Keitel80668952012-07-27 14:25:49 -0700624};
625
626static char *pm_power_supplied_to[] = {
627 "battery",
628};
629
630#define USB_WALL_THRESHOLD_MA 500
631static int
632qpnp_power_get_property_mains(struct power_supply *psy,
633 enum power_supply_property psp,
634 union power_supply_propval *val)
635{
636 struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
637 dc_psy);
638
639 switch (psp) {
640 case POWER_SUPPLY_PROP_PRESENT:
641 case POWER_SUPPLY_PROP_ONLINE:
642 val->intval = 0;
David Keitel03ee6b52012-10-22 12:25:19 -0700643 if (chip->charging_disabled)
David Keitel80668952012-07-27 14:25:49 -0700644 return 0;
645
646 val->intval = qpnp_chg_is_dc_chg_plugged_in(chip);
647 break;
648 default:
649 return -EINVAL;
650 }
651 return 0;
652}
653
654static int
655get_prop_battery_voltage_now(struct qpnp_chg_chip *chip)
656{
657 int rc = 0;
658 struct qpnp_vadc_result results;
659
660 if (chip->revision > 0) {
661 rc = qpnp_vadc_read(VBAT_SNS, &results);
662 if (rc) {
663 pr_err("Unable to read vbat rc=%d\n", rc);
664 return 0;
665 }
666 return results.physical;
667 } else {
668 pr_err("vbat reading not supported for 1.0 rc=%d\n", rc);
669 return 0;
670 }
671}
672
673#define BATT_PRES_BIT BIT(7)
674static int
675get_prop_batt_present(struct qpnp_chg_chip *chip)
676{
677 u8 batt_present;
678 int rc;
679
680 rc = qpnp_chg_read(chip, &batt_present,
681 chip->bat_if_base + CHGR_BAT_IF_PRES_STATUS, 1);
682 if (rc) {
683 pr_err("Couldn't read battery status read failed rc=%d\n", rc);
684 return 0;
685 };
686 return (batt_present & BATT_PRES_BIT) ? 1 : 0;
687}
688
689#define BATT_TEMP_HOT BIT(6)
690#define BATT_TEMP_OK BIT(7)
691static int
692get_prop_batt_health(struct qpnp_chg_chip *chip)
693{
694 u8 batt_health;
695 int rc;
696
697 rc = qpnp_chg_read(chip, &batt_health,
David Keiteld681cda2012-10-02 15:44:21 -0700698 chip->bat_if_base + CHGR_STATUS, 1);
David Keitel80668952012-07-27 14:25:49 -0700699 if (rc) {
700 pr_err("Couldn't read battery health read failed rc=%d\n", rc);
701 return POWER_SUPPLY_HEALTH_UNKNOWN;
702 };
703
704 if (BATT_TEMP_OK & batt_health)
705 return POWER_SUPPLY_HEALTH_GOOD;
706 if (BATT_TEMP_HOT & batt_health)
707 return POWER_SUPPLY_HEALTH_OVERHEAT;
708 else
709 return POWER_SUPPLY_HEALTH_COLD;
710}
711
712static int
713get_prop_charge_type(struct qpnp_chg_chip *chip)
714{
715 int rc;
716 u8 chgr_sts;
717
718 if (!get_prop_batt_present(chip))
719 return POWER_SUPPLY_CHARGE_TYPE_NONE;
720
721 rc = qpnp_chg_read(chip, &chgr_sts,
722 INT_RT_STS(chip->chgr_base), 1);
723 if (rc) {
724 pr_err("failed to read interrupt sts %d\n", rc);
725 return POWER_SUPPLY_CHARGE_TYPE_NONE;
726 }
727
728 if (chgr_sts & TRKL_CHG_ON_IRQ)
729 return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
730 if (chgr_sts & FAST_CHG_ON_IRQ)
731 return POWER_SUPPLY_CHARGE_TYPE_FAST;
732
733 return POWER_SUPPLY_CHARGE_TYPE_NONE;
734}
735
736static int
737get_prop_batt_status(struct qpnp_chg_chip *chip)
738{
739 int rc;
740 u8 chgr_sts;
741
742 rc = qpnp_chg_read(chip, &chgr_sts,
743 INT_RT_STS(chip->chgr_base), 1);
744 if (rc) {
745 pr_err("failed to read interrupt sts %d\n", rc);
746 return POWER_SUPPLY_STATUS_DISCHARGING;
747 }
748
749 pr_debug("chgr sts 0x%x\n", chgr_sts);
750 if (chgr_sts & CHG_DONE_IRQ || chip->chg_done)
751 return POWER_SUPPLY_STATUS_FULL;
752 else
753 chip->chg_done = false;
754
755 if (chgr_sts & TRKL_CHG_ON_IRQ)
756 return POWER_SUPPLY_STATUS_CHARGING;
757 if (chgr_sts & FAST_CHG_ON_IRQ)
758 return POWER_SUPPLY_STATUS_CHARGING;
759
760 return POWER_SUPPLY_STATUS_DISCHARGING;
761}
762
763static int
764get_prop_current_now(struct qpnp_chg_chip *chip)
765{
766 union power_supply_propval ret = {0,};
767
768 if (chip->bms_psy) {
769 chip->bms_psy->get_property(chip->bms_psy,
770 POWER_SUPPLY_PROP_CURRENT_NOW, &ret);
771 return ret.intval;
772 } else {
773 pr_debug("No BMS supply registered return 0\n");
774 }
775
776 return 0;
777}
778
779static int
780get_prop_full_design(struct qpnp_chg_chip *chip)
781{
782 union power_supply_propval ret = {0,};
783
784 if (chip->bms_psy) {
785 chip->bms_psy->get_property(chip->bms_psy,
786 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, &ret);
787 return ret.intval;
788 } else {
789 pr_debug("No BMS supply registered return 0\n");
790 }
791
792 return 0;
793}
794
795#define DEFAULT_CAPACITY 50
796static int
797get_prop_capacity(struct qpnp_chg_chip *chip)
798{
799 union power_supply_propval ret = {0,};
800
David Keitel3dd5e0f2012-12-12 18:12:36 -0800801 if (chip->use_default_batt_values || !get_prop_batt_present(chip))
802 return DEFAULT_CAPACITY;
803
David Keitel80668952012-07-27 14:25:49 -0700804 if (chip->bms_psy) {
805 chip->bms_psy->get_property(chip->bms_psy,
806 POWER_SUPPLY_PROP_CAPACITY, &ret);
807 return ret.intval;
808 } else {
809 pr_debug("No BMS supply registered return 50\n");
810 }
811
812 /* return default capacity to avoid userspace
813 * from shutting down unecessarily */
814 return DEFAULT_CAPACITY;
815}
816
David Keitel3dd5e0f2012-12-12 18:12:36 -0800817#define DEFAULT_TEMP 250
David Keitel80668952012-07-27 14:25:49 -0700818#define MAX_TOLERABLE_BATT_TEMP_DDC 680
819static int
820get_prop_batt_temp(struct qpnp_chg_chip *chip)
821{
822 int rc = 0;
823 struct qpnp_vadc_result results;
824
David Keitel3dd5e0f2012-12-12 18:12:36 -0800825 if (chip->use_default_batt_values || !get_prop_batt_present(chip))
826 return DEFAULT_TEMP;
827
David Keitel80668952012-07-27 14:25:49 -0700828 if (chip->revision > 0) {
829 rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &results);
830 if (rc) {
831 pr_debug("Unable to read batt temperature rc=%d\n", rc);
832 return 0;
833 }
834 pr_debug("get_bat_temp %d %lld\n",
835 results.adc_code, results.physical);
836 return (int)results.physical;
837 } else {
838 pr_debug("batt temp not supported for PMIC 1.0 rc=%d\n", rc);
839 }
840
841 /* return default temperature to avoid userspace
842 * from shutting down unecessarily */
843 return DEFAULT_TEMP;
844}
845
846static void
847qpnp_batt_external_power_changed(struct power_supply *psy)
848{
849 struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
850 batt_psy);
851 union power_supply_propval ret = {0,};
852
853 if (!chip->bms_psy)
854 chip->bms_psy = power_supply_get_by_name("bms");
855
856 chip->usb_psy->get_property(chip->usb_psy,
David Keitel6f865cd2012-11-30 15:04:32 -0800857 POWER_SUPPLY_PROP_SCOPE, &ret);
858 if (ret.intval) {
859 if ((ret.intval == POWER_SUPPLY_SCOPE_SYSTEM)
860 && !qpnp_chg_is_otg_en_set(chip)) {
861 switch_usb_to_host_mode(chip);
862 return;
863 }
864 if ((ret.intval == POWER_SUPPLY_SCOPE_DEVICE)
865 && qpnp_chg_is_otg_en_set(chip)) {
866 switch_usb_to_charge_mode(chip);
867 return;
868 }
869 }
870
871 chip->usb_psy->get_property(chip->usb_psy,
David Keitel80668952012-07-27 14:25:49 -0700872 POWER_SUPPLY_PROP_ONLINE, &ret);
873
874 if (ret.intval && qpnp_chg_is_usb_chg_plugged_in(chip)) {
875 chip->usb_psy->get_property(chip->usb_psy,
876 POWER_SUPPLY_PROP_CURRENT_MAX, &ret);
877 qpnp_chg_iusbmax_set(chip, ret.intval / 1000);
David Keiteld681cda2012-10-02 15:44:21 -0700878 if ((ret.intval / 1000) <= QPNP_CHG_IUSB_MAX_MIN_MA)
879 qpnp_chg_usb_suspend_enable(chip, 1);
880 else
881 qpnp_chg_usb_suspend_enable(chip, 0);
David Keitel80668952012-07-27 14:25:49 -0700882 } else {
David Keiteld681cda2012-10-02 15:44:21 -0700883 qpnp_chg_iusbmax_set(chip, QPNP_CHG_IUSB_MAX_MIN_100);
884 qpnp_chg_usb_suspend_enable(chip, 0);
David Keitel80668952012-07-27 14:25:49 -0700885 }
886
887 pr_debug("end of power supply changed\n");
888 power_supply_changed(&chip->batt_psy);
889}
890
891static int
892qpnp_batt_power_get_property(struct power_supply *psy,
893 enum power_supply_property psp,
894 union power_supply_propval *val)
895{
896 struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
897 batt_psy);
898
899 switch (psp) {
900 case POWER_SUPPLY_PROP_STATUS:
901 val->intval = get_prop_batt_status(chip);
902 break;
903 case POWER_SUPPLY_PROP_CHARGE_TYPE:
904 val->intval = get_prop_charge_type(chip);
905 break;
906 case POWER_SUPPLY_PROP_HEALTH:
907 val->intval = get_prop_batt_health(chip);
908 break;
909 case POWER_SUPPLY_PROP_PRESENT:
910 val->intval = get_prop_batt_present(chip);
911 break;
912 case POWER_SUPPLY_PROP_TECHNOLOGY:
913 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
914 break;
915 case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
916 val->intval = chip->max_voltage_mv * 1000;
917 break;
918 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
919 val->intval = chip->min_voltage_mv * 1000;
920 break;
921 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
922 val->intval = get_prop_battery_voltage_now(chip);
923 break;
924 case POWER_SUPPLY_PROP_TEMP:
925 val->intval = get_prop_batt_temp(chip);
926 break;
927 case POWER_SUPPLY_PROP_CAPACITY:
928 val->intval = get_prop_capacity(chip);
929 break;
930 case POWER_SUPPLY_PROP_CURRENT_NOW:
931 val->intval = get_prop_current_now(chip);
932 break;
933 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
934 val->intval = get_prop_full_design(chip);
935 break;
David Keitelb80eda82012-10-15 10:49:11 -0700936 case POWER_SUPPLY_PROP_CHARGING_ENABLED:
David Keitel03ee6b52012-10-22 12:25:19 -0700937 val->intval = !(chip->charging_disabled);
David Keitelb80eda82012-10-15 10:49:11 -0700938 break;
David Keitelbe208252013-01-31 14:49:25 -0800939 case POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL:
940 val->intval = chip->therm_lvl_sel;
David Keitelb80eda82012-10-15 10:49:11 -0700941 break;
942 default:
943 return -EINVAL;
944 }
945
David Keitelb80eda82012-10-15 10:49:11 -0700946 return 0;
David Keitel80668952012-07-27 14:25:49 -0700947}
948
David Keitel80668952012-07-27 14:25:49 -0700949#define QPNP_CHG_VINMIN_MIN_MV 3400
950#define QPNP_CHG_VINMIN_HIGH_MIN_MV 5600
951#define QPNP_CHG_VINMIN_HIGH_MIN_VAL 0x2B
952#define QPNP_CHG_VINMIN_MAX_MV 9600
953#define QPNP_CHG_VINMIN_STEP_MV 50
954#define QPNP_CHG_VINMIN_STEP_HIGH_MV 200
955#define QPNP_CHG_VINMIN_MASK 0x1F
956static int
957qpnp_chg_vinmin_set(struct qpnp_chg_chip *chip, int voltage)
958{
959 u8 temp;
960
961 if (voltage < QPNP_CHG_VINMIN_MIN_MV
962 || voltage > QPNP_CHG_VINMIN_MAX_MV) {
963 pr_err("bad mV=%d asked to set\n", voltage);
964 return -EINVAL;
965 }
966 if (voltage >= QPNP_CHG_VINMIN_HIGH_MIN_MV) {
967 temp = QPNP_CHG_VINMIN_HIGH_MIN_VAL;
968 temp += (voltage - QPNP_CHG_VINMIN_MIN_MV)
969 / QPNP_CHG_VINMIN_STEP_HIGH_MV;
970 } else {
971 temp = (voltage - QPNP_CHG_VINMIN_MIN_MV)
972 / QPNP_CHG_VINMIN_STEP_MV;
973 }
974
975 pr_debug("voltage=%d setting %02x\n", voltage, temp);
976 return qpnp_chg_masked_write(chip,
977 chip->chgr_base + CHGR_VIN_MIN,
978 QPNP_CHG_VINMIN_MASK, temp, 1);
979}
980
David Keitel5d44fa52012-12-03 16:37:31 -0800981#define QPNP_CHG_IBATSAFE_MIN_MA 100
982#define QPNP_CHG_IBATSAFE_MAX_MA 3250
983#define QPNP_CHG_I_STEP_MA 50
984#define QPNP_CHG_I_MIN_MA 100
985#define QPNP_CHG_I_MASK 0x3F
986static int
987qpnp_chg_ibatsafe_set(struct qpnp_chg_chip *chip, int safe_current)
988{
989 u8 temp;
990
991 if (safe_current < QPNP_CHG_IBATSAFE_MIN_MA
992 || safe_current > QPNP_CHG_IBATSAFE_MAX_MA) {
993 pr_err("bad mA=%d asked to set\n", safe_current);
994 return -EINVAL;
995 }
996
997 temp = (safe_current - QPNP_CHG_IBATSAFE_MIN_MA)
998 / QPNP_CHG_I_STEP_MA;
999 return qpnp_chg_masked_write(chip,
1000 chip->chgr_base + CHGR_IBAT_SAFE,
1001 QPNP_CHG_I_MASK, temp, 1);
1002}
David Keitel80668952012-07-27 14:25:49 -07001003
1004#define QPNP_CHG_ITERM_MIN_MA 100
1005#define QPNP_CHG_ITERM_MAX_MA 250
1006#define QPNP_CHG_ITERM_STEP_MA 50
1007#define QPNP_CHG_ITERM_MASK 0x03
1008static int
1009qpnp_chg_ibatterm_set(struct qpnp_chg_chip *chip, int term_current)
1010{
1011 u8 temp;
1012
1013 if (term_current < QPNP_CHG_ITERM_MIN_MA
1014 || term_current > QPNP_CHG_ITERM_MAX_MA) {
1015 pr_err("bad mA=%d asked to set\n", term_current);
1016 return -EINVAL;
1017 }
1018
1019 temp = (term_current - QPNP_CHG_ITERM_MIN_MA)
1020 / QPNP_CHG_ITERM_STEP_MA;
1021 return qpnp_chg_masked_write(chip,
1022 chip->chgr_base + CHGR_IBAT_TERM_CHGR,
1023 QPNP_CHG_ITERM_MASK, temp, 1);
1024}
1025
1026#define QPNP_CHG_IBATMAX_MIN 100
1027#define QPNP_CHG_IBATMAX_MAX 3250
David Keitel80668952012-07-27 14:25:49 -07001028static int
1029qpnp_chg_ibatmax_set(struct qpnp_chg_chip *chip, int chg_current)
1030{
1031 u8 temp;
1032
1033 if (chg_current < QPNP_CHG_IBATMAX_MIN
1034 || chg_current > QPNP_CHG_IBATMAX_MAX) {
1035 pr_err("bad mA=%d asked to set\n", chg_current);
1036 return -EINVAL;
1037 }
1038 temp = (chg_current - QPNP_CHG_I_MIN_MA) / QPNP_CHG_I_STEP_MA;
1039 return qpnp_chg_masked_write(chip, chip->chgr_base + CHGR_IBAT_MAX,
1040 QPNP_CHG_I_MASK, temp, 1);
1041}
1042
David Keitel5d44fa52012-12-03 16:37:31 -08001043#define QPNP_CHG_VBATDET_MIN_MV 3240
1044#define QPNP_CHG_VBATDET_MAX_MV 5780
1045#define QPNP_CHG_VBATDET_STEP_MV 20
1046static int
1047qpnp_chg_vbatdet_set(struct qpnp_chg_chip *chip, int vbatdet_mv)
1048{
1049 u8 temp;
1050
1051 if (vbatdet_mv < QPNP_CHG_VBATDET_MIN_MV
1052 || vbatdet_mv > QPNP_CHG_VBATDET_MAX_MV) {
1053 pr_err("bad mV=%d asked to set\n", vbatdet_mv);
1054 return -EINVAL;
1055 }
1056 temp = (vbatdet_mv - QPNP_CHG_VBATDET_MIN_MV)
1057 / QPNP_CHG_VBATDET_STEP_MV;
1058
1059 pr_debug("voltage=%d setting %02x\n", vbatdet_mv, temp);
1060 return qpnp_chg_write(chip, &temp,
1061 chip->chgr_base + CHGR_VBAT_DET, 1);
1062}
David Keitel80668952012-07-27 14:25:49 -07001063
1064#define QPNP_CHG_V_MIN_MV 3240
1065#define QPNP_CHG_V_MAX_MV 4500
1066#define QPNP_CHG_V_STEP_MV 10
1067static int
1068qpnp_chg_vddsafe_set(struct qpnp_chg_chip *chip, int voltage)
1069{
1070 u8 temp;
1071
1072 if (voltage < QPNP_CHG_V_MIN_MV
1073 || voltage > QPNP_CHG_V_MAX_MV) {
1074 pr_err("bad mV=%d asked to set\n", voltage);
1075 return -EINVAL;
1076 }
1077 temp = (voltage - QPNP_CHG_V_MIN_MV) / QPNP_CHG_V_STEP_MV;
1078 pr_debug("voltage=%d setting %02x\n", voltage, temp);
1079 return qpnp_chg_write(chip, &temp,
1080 chip->chgr_base + CHGR_VDD_SAFE, 1);
1081}
1082
1083#define QPNP_CHG_VDDMAX_MIN 3400
1084static int
1085qpnp_chg_vddmax_set(struct qpnp_chg_chip *chip, int voltage)
1086{
1087 u8 temp = 0;
1088
1089 if (voltage < QPNP_CHG_VDDMAX_MIN
1090 || voltage > QPNP_CHG_V_MAX_MV) {
1091 pr_err("bad mV=%d asked to set\n", voltage);
1092 return -EINVAL;
1093 }
1094
1095 temp = (voltage - QPNP_CHG_V_MIN_MV) / QPNP_CHG_V_STEP_MV;
1096
1097 pr_debug("voltage=%d setting %02x\n", voltage, temp);
Sridhar Parasuramae183bd2012-12-21 09:28:46 -08001098 return qpnp_chg_write(chip, &temp,
1099 chip->chgr_base + CHGR_VDD_MAX, 1);
David Keitel80668952012-07-27 14:25:49 -07001100}
1101
David Keitelbe208252013-01-31 14:49:25 -08001102static void
1103qpnp_chg_set_appropriate_battery_current(struct qpnp_chg_chip *chip)
1104{
1105 unsigned int chg_current = chip->max_bat_chg_current;
1106
1107 if (chip->therm_lvl_sel != 0 && chip->thermal_mitigation)
1108 chg_current = min(chg_current,
1109 chip->thermal_mitigation[chip->therm_lvl_sel]);
1110
1111 pr_debug("setting %d mA\n", chg_current);
1112 qpnp_chg_ibatmax_set(chip, chg_current);
1113}
1114
1115static void
1116qpnp_batt_system_temp_level_set(struct qpnp_chg_chip *chip, int lvl_sel)
1117{
1118 if (lvl_sel >= 0 && lvl_sel < chip->thermal_levels) {
1119 chip->therm_lvl_sel = lvl_sel;
1120 if (lvl_sel == (chip->thermal_levels - 1)) {
1121 /* disable charging if highest value selected */
1122 qpnp_chg_buck_control(chip, 0);
1123 } else {
1124 qpnp_chg_buck_control(chip, 1);
1125 qpnp_chg_set_appropriate_battery_current(chip);
1126 }
1127 } else {
1128 pr_err("Unsupported level selected %d\n", lvl_sel);
1129 }
1130}
1131
1132static int
1133qpnp_batt_power_set_property(struct power_supply *psy,
1134 enum power_supply_property psp,
1135 const union power_supply_propval *val)
1136{
1137 struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
1138 batt_psy);
1139
1140 switch (psp) {
1141 case POWER_SUPPLY_PROP_CHARGING_ENABLED:
1142 chip->charging_disabled = !(val->intval);
1143 qpnp_chg_charge_en(chip, !chip->charging_disabled);
1144 qpnp_chg_force_run_on_batt(chip, chip->charging_disabled);
1145 break;
1146 case POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL:
1147 qpnp_batt_system_temp_level_set(chip, val->intval);
1148 break;
1149 default:
1150 return -EINVAL;
1151 }
1152
1153 power_supply_changed(&chip->batt_psy);
1154 return 0;
1155}
Sridhar Parasuramae183bd2012-12-21 09:28:46 -08001156
1157static void
1158qpnp_chg_setup_flags(struct qpnp_chg_chip *chip)
David Keiteld681cda2012-10-02 15:44:21 -07001159{
Sridhar Parasuramae183bd2012-12-21 09:28:46 -08001160 if (chip->revision > 0)
David Keiteld681cda2012-10-02 15:44:21 -07001161 chip->flags |= CHG_FLAGS_VCP_WA;
1162}
1163
David Keitel80668952012-07-27 14:25:49 -07001164#define WDOG_EN_BIT BIT(7)
1165static int
1166qpnp_chg_hwinit(struct qpnp_chg_chip *chip, u8 subtype,
1167 struct spmi_resource *spmi_resource)
1168{
1169 int rc = 0;
Sridhar Parasuramae183bd2012-12-21 09:28:46 -08001170 u8 reg;
David Keitel80668952012-07-27 14:25:49 -07001171
1172 switch (subtype) {
1173 case SMBB_CHGR_SUBTYPE:
1174 chip->chg_done_irq = spmi_get_irq_byname(chip->spmi,
1175 spmi_resource, "chg-done");
1176 if (chip->chg_done_irq < 0) {
1177 pr_err("Unable to get chg_done irq\n");
1178 return -ENXIO;
1179 }
1180
1181 chip->chg_failed_irq = spmi_get_irq_byname(chip->spmi,
1182 spmi_resource, "chg-failed");
1183 if (chip->chg_failed_irq < 0) {
1184 pr_err("Unable to get chg_failed irq\n");
1185 return -ENXIO;
1186 }
1187 rc |= devm_request_irq(chip->dev, chip->chg_done_irq,
1188 qpnp_chg_chgr_chg_done_irq_handler,
1189 IRQF_TRIGGER_RISING, "chg_done", chip);
1190 if (rc < 0) {
1191 pr_err("Can't request %d chg_done for chg: %d\n",
1192 chip->chg_done_irq, rc);
1193 return -ENXIO;
1194 }
1195 rc |= devm_request_irq(chip->dev, chip->chg_failed_irq,
1196 qpnp_chg_chgr_chg_failed_irq_handler,
1197 IRQF_TRIGGER_RISING, "chg_failed", chip);
1198 if (rc < 0) {
1199 pr_err("Can't request %d chg_failed chg: %d\n",
1200 chip->chg_failed_irq, rc);
1201 return -ENXIO;
1202 }
1203
1204 rc = qpnp_chg_vinmin_set(chip, chip->min_voltage_mv);
1205 if (rc) {
1206 pr_debug("failed setting min_voltage rc=%d\n", rc);
1207 return rc;
1208 }
1209 rc = qpnp_chg_vddmax_set(chip, chip->max_voltage_mv);
1210 if (rc) {
1211 pr_debug("failed setting max_voltage rc=%d\n", rc);
1212 return rc;
1213 }
1214 rc = qpnp_chg_vddsafe_set(chip, chip->safe_voltage_mv);
1215 if (rc) {
1216 pr_debug("failed setting safe_voltage rc=%d\n", rc);
1217 return rc;
1218 }
David Keitel5d44fa52012-12-03 16:37:31 -08001219 rc = qpnp_chg_vbatdet_set(chip, chip->resume_voltage_mv);
1220 if (rc) {
1221 pr_debug("failed setting resume_voltage rc=%d\n", rc);
1222 return rc;
1223 }
David Keitel80668952012-07-27 14:25:49 -07001224 rc = qpnp_chg_ibatmax_set(chip, chip->max_bat_chg_current);
1225 if (rc) {
1226 pr_debug("failed setting ibatmax rc=%d\n", rc);
1227 return rc;
1228 }
1229 rc = qpnp_chg_ibatterm_set(chip, chip->term_current);
1230 if (rc) {
1231 pr_debug("failed setting ibatterm rc=%d\n", rc);
1232 return rc;
1233 }
David Keitel5d44fa52012-12-03 16:37:31 -08001234 rc = qpnp_chg_ibatsafe_set(chip, chip->safe_current);
1235 if (rc) {
1236 pr_debug("failed setting ibat_Safe rc=%d\n", rc);
1237 return rc;
1238 }
David Keitel80668952012-07-27 14:25:49 -07001239 /* HACK: Disable wdog */
1240 rc = qpnp_chg_masked_write(chip, chip->chgr_base + 0x62,
1241 0xFF, 0xA0, 1);
1242
1243 /* HACK: use analog EOC */
1244 rc = qpnp_chg_masked_write(chip, chip->chgr_base +
1245 CHGR_IBAT_TERM_CHGR,
1246 0x80, 0x80, 1);
1247
1248 enable_irq_wake(chip->chg_done_irq);
1249 break;
1250 case SMBB_BUCK_SUBTYPE:
David Keitel9201df32013-01-10 18:38:34 -08001251 rc = qpnp_chg_masked_write(chip,
1252 chip->chgr_base + CHGR_BUCK_BCK_VBAT_REG_MODE,
1253 BUCK_VBAT_REG_NODE_SEL_BIT,
1254 BUCK_VBAT_REG_NODE_SEL_BIT, 1);
1255 if (rc) {
1256 pr_debug("failed to enable IR drop comp rc=%d\n", rc);
1257 return rc;
1258 }
David Keitel80668952012-07-27 14:25:49 -07001259 break;
1260 case SMBB_BAT_IF_SUBTYPE:
David Keitel80668952012-07-27 14:25:49 -07001261 break;
1262 case SMBB_USB_CHGPTH_SUBTYPE:
1263 chip->usbin_valid_irq = spmi_get_irq_byname(chip->spmi,
1264 spmi_resource, "usbin-valid");
1265 if (chip->usbin_valid_irq < 0) {
1266 pr_err("Unable to get usbin irq\n");
1267 return -ENXIO;
1268 }
1269 rc = devm_request_irq(chip->dev, chip->usbin_valid_irq,
1270 qpnp_chg_usb_usbin_valid_irq_handler,
1271 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1272 "chg_usbin_valid", chip);
1273 if (rc < 0) {
1274 pr_err("Can't request %d usbinvalid for chg: %d\n",
1275 chip->usbin_valid_irq, rc);
1276 return -ENXIO;
1277 }
1278
1279 enable_irq_wake(chip->usbin_valid_irq);
1280 chip->usb_present = qpnp_chg_is_usb_chg_plugged_in(chip);
1281 if (chip->usb_present) {
1282 rc = qpnp_chg_masked_write(chip,
1283 chip->usb_chgpth_base + CHGR_USB_ENUM_T_STOP,
1284 ENUM_T_STOP_BIT,
1285 ENUM_T_STOP_BIT, 1);
1286 if (rc) {
1287 pr_err("failed to write enum stop rc=%d\n", rc);
1288 return -ENXIO;
1289 }
1290 }
David Keiteld681cda2012-10-02 15:44:21 -07001291
1292 rc = qpnp_chg_masked_write(chip,
David Keitel5c3a7702012-12-20 11:13:21 -08001293 chip->usb_chgpth_base + USB_OVP_CTL,
1294 USB_VALID_DEB_20MS,
1295 USB_VALID_DEB_20MS, 1);
1296
1297 rc = qpnp_chg_masked_write(chip,
David Keiteld681cda2012-10-02 15:44:21 -07001298 chip->usb_chgpth_base + CHGR_USB_ENUM_T_STOP,
1299 ENUM_T_STOP_BIT,
1300 ENUM_T_STOP_BIT, 1);
1301
David Keitel80668952012-07-27 14:25:49 -07001302 break;
1303 case SMBB_DC_CHGPTH_SUBTYPE:
David Keitel7450dcd2013-01-29 18:41:41 -08001304 chip->dcin_valid_irq = spmi_get_irq_byname(chip->spmi,
1305 spmi_resource, "dcin-valid");
1306 if (chip->dcin_valid_irq < 0) {
1307 pr_err("Unable to get dcin irq\n");
1308 return -ENXIO;
1309 }
1310 rc = devm_request_irq(chip->dev, chip->dcin_valid_irq,
1311 qpnp_chg_dc_dcin_valid_irq_handler,
1312 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1313 "chg_dcin_valid", chip);
1314 if (rc < 0) {
1315 pr_err("Can't request %d dcinvalid for chg: %d\n",
1316 chip->dcin_valid_irq, rc);
1317 return -ENXIO;
1318 }
1319
1320 enable_irq_wake(chip->dcin_valid_irq);
David Keitel80668952012-07-27 14:25:49 -07001321 break;
1322 case SMBB_BOOST_SUBTYPE:
1323 break;
1324 case SMBB_MISC_SUBTYPE:
1325 pr_debug("Setting BOOT_DONE\n");
1326 rc = qpnp_chg_masked_write(chip,
1327 chip->misc_base + CHGR_MISC_BOOT_DONE,
1328 CHGR_BOOT_DONE, CHGR_BOOT_DONE, 1);
Sridhar Parasuramae183bd2012-12-21 09:28:46 -08001329 rc = qpnp_chg_read(chip, &reg,
1330 chip->misc_base + MISC_REVISION2, 1);
1331 if (rc) {
1332 pr_err("failed to read revision register rc=%d\n", rc);
1333 return rc;
1334 }
David Keitel80668952012-07-27 14:25:49 -07001335
Sridhar Parasuramae183bd2012-12-21 09:28:46 -08001336 chip->revision = reg;
David Keitel80668952012-07-27 14:25:49 -07001337 break;
1338 default:
1339 pr_err("Invalid peripheral subtype\n");
1340 }
1341 return rc;
1342}
1343
1344static int __devinit
1345qpnp_charger_probe(struct spmi_device *spmi)
1346{
1347 u8 subtype;
1348 struct qpnp_chg_chip *chip;
1349 struct resource *resource;
1350 struct spmi_resource *spmi_resource;
1351 int rc = 0;
1352
1353 chip = kzalloc(sizeof *chip, GFP_KERNEL);
1354 if (chip == NULL) {
1355 pr_err("kzalloc() failed.\n");
1356 return -ENOMEM;
1357 }
1358
1359 rc = qpnp_vadc_is_ready();
1360 if (rc)
1361 goto fail_chg_enable;
1362
1363 chip->dev = &(spmi->dev);
1364 chip->spmi = spmi;
1365
1366 chip->usb_psy = power_supply_get_by_name("usb");
1367 if (!chip->usb_psy) {
1368 pr_err("usb supply not found deferring probe\n");
1369 rc = -EPROBE_DEFER;
1370 goto fail_chg_enable;
1371 }
1372
1373 /* Get the vddmax property */
1374 rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-vddmax-mv",
1375 &chip->max_voltage_mv);
1376 if (rc && rc != -EINVAL) {
1377 pr_err("Error reading vddmax property %d\n", rc);
1378 goto fail_chg_enable;
1379 }
1380
1381 /* Get the vinmin property */
1382 rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-vinmin-mv",
1383 &chip->min_voltage_mv);
1384 if (rc && rc != -EINVAL) {
1385 pr_err("Error reading vddmax property %d\n", rc);
1386 goto fail_chg_enable;
1387 }
1388
1389 /* Get the vddmax property */
1390 rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-vddsafe-mv",
1391 &chip->safe_voltage_mv);
1392 if (rc && rc != -EINVAL) {
1393 pr_err("Error reading vddsave property %d\n", rc);
1394 goto fail_chg_enable;
1395 }
1396
David Keitel5d44fa52012-12-03 16:37:31 -08001397 /* Get the ibatsafe property */
1398 rc = of_property_read_u32(spmi->dev.of_node,
1399 "qcom,chg-vbatdet-mv",
1400 &chip->resume_voltage_mv);
1401 if (rc) {
1402 pr_err("Error reading vbatdet property %d\n", rc);
1403 goto fail_chg_enable;
1404 }
1405
1406 /* Get the ibatsafe property */
1407 rc = of_property_read_u32(spmi->dev.of_node,
1408 "qcom,chg-ibatsafe-ma",
1409 &chip->safe_current);
1410 if (rc) {
1411 pr_err("Error reading ibatsafe property %d\n", rc);
1412 goto fail_chg_enable;
1413 }
1414
David Keitel80668952012-07-27 14:25:49 -07001415 /* Get the ibatterm property */
1416 rc = of_property_read_u32(spmi->dev.of_node,
1417 "qcom,chg-ibatterm-ma",
1418 &chip->term_current);
1419 if (rc && rc != -EINVAL) {
1420 pr_err("Error reading ibatterm property %d\n", rc);
1421 goto fail_chg_enable;
1422 }
1423
1424 /* Get the ibatmax property */
1425 rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-ibatmax-ma",
1426 &chip->max_bat_chg_current);
1427 if (rc && rc != -EINVAL) {
1428 pr_err("Error reading ibatmax property %d\n", rc);
1429 goto fail_chg_enable;
1430 }
1431
David Keitelbf359042012-10-19 16:54:58 -07001432 /* Get the charging-disabled property */
David Keitel03ee6b52012-10-22 12:25:19 -07001433 chip->charging_disabled = of_property_read_bool(spmi->dev.of_node,
David Keitelbf359042012-10-19 16:54:58 -07001434 "qcom,chg-charging-disabled");
1435
David Keitel3dd5e0f2012-12-12 18:12:36 -08001436 /* Get the fake-batt-values property */
1437 chip->use_default_batt_values = of_property_read_bool(spmi->dev.of_node,
1438 "qcom,chg-use-default-batt-values");
1439
David Keitelbe208252013-01-31 14:49:25 -08001440 of_get_property(spmi->dev.of_node, "qcom,chg-thermal-mitigation",
1441 &(chip->thermal_levels));
1442
1443 if (chip->thermal_levels > sizeof(int)) {
1444 chip->thermal_mitigation = kzalloc(
1445 chip->thermal_levels,
1446 GFP_KERNEL);
1447
1448 if (chip->thermal_mitigation == NULL) {
1449 pr_err("thermal mitigation kzalloc() failed.\n");
1450 goto fail_chg_enable;
1451 }
1452
1453 chip->thermal_levels /= sizeof(int);
1454 rc = of_property_read_u32_array(spmi->dev.of_node,
1455 "qcom,chg-thermal-mitigation",
1456 chip->thermal_mitigation, chip->thermal_levels);
1457 if (rc) {
1458 pr_err("qcom,chg-thermal-mitigation missing in dt\n");
1459 goto fail_chg_enable;
1460 }
1461 }
1462
David Keitel3dd5e0f2012-12-12 18:12:36 -08001463 /* Disable charging when faking battery values */
1464 if (chip->use_default_batt_values)
1465 chip->charging_disabled = true;
1466
David Keitel80668952012-07-27 14:25:49 -07001467 spmi_for_each_container_dev(spmi_resource, spmi) {
1468 if (!spmi_resource) {
1469 pr_err("qpnp_chg: spmi resource absent\n");
1470 rc = -ENXIO;
1471 goto fail_chg_enable;
1472 }
1473
1474 resource = spmi_get_resource(spmi, spmi_resource,
1475 IORESOURCE_MEM, 0);
1476 if (!(resource && resource->start)) {
1477 pr_err("node %s IO resource absent!\n",
1478 spmi->dev.of_node->full_name);
1479 rc = -ENXIO;
1480 goto fail_chg_enable;
1481 }
1482
1483 rc = qpnp_chg_read(chip, &subtype,
1484 resource->start + REG_OFFSET_PERP_SUBTYPE, 1);
1485 if (rc) {
1486 pr_err("Peripheral subtype read failed rc=%d\n", rc);
1487 goto fail_chg_enable;
1488 }
1489
1490 switch (subtype) {
1491 case SMBB_CHGR_SUBTYPE:
1492 chip->chgr_base = resource->start;
1493 rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
1494 if (rc) {
1495 pr_err("Failed to init subtype 0x%x rc=%d\n",
1496 subtype, rc);
1497 goto fail_chg_enable;
1498 }
1499 break;
1500 case SMBB_BUCK_SUBTYPE:
1501 chip->buck_base = resource->start;
1502 rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
1503 if (rc) {
1504 pr_err("Failed to init subtype 0x%x rc=%d\n",
1505 subtype, rc);
1506 goto fail_chg_enable;
1507 }
1508 break;
1509 case SMBB_BAT_IF_SUBTYPE:
1510 chip->bat_if_base = resource->start;
1511 rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
1512 if (rc) {
1513 pr_err("Failed to init subtype 0x%x rc=%d\n",
1514 subtype, rc);
1515 goto fail_chg_enable;
1516 }
1517 break;
1518 case SMBB_USB_CHGPTH_SUBTYPE:
1519 chip->usb_chgpth_base = resource->start;
1520 rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
1521 if (rc) {
1522 pr_err("Failed to init subtype 0x%x rc=%d\n",
1523 subtype, rc);
1524 goto fail_chg_enable;
1525 }
1526 break;
1527 case SMBB_DC_CHGPTH_SUBTYPE:
1528 chip->dc_chgpth_base = resource->start;
1529 rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
1530 if (rc) {
1531 pr_err("Failed to init subtype 0x%x rc=%d\n",
1532 subtype, rc);
1533 goto fail_chg_enable;
1534 }
1535 break;
1536 case SMBB_BOOST_SUBTYPE:
1537 chip->boost_base = resource->start;
1538 rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
1539 if (rc) {
1540 pr_err("Failed to init subtype 0x%x rc=%d\n",
1541 subtype, rc);
1542 goto fail_chg_enable;
1543 }
1544 break;
1545 case SMBB_MISC_SUBTYPE:
1546 chip->misc_base = resource->start;
1547 rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
1548 if (rc) {
1549 pr_err("Failed to init subtype=0x%x rc=%d\n",
1550 subtype, rc);
1551 goto fail_chg_enable;
1552 }
1553 break;
1554 default:
1555 pr_err("Invalid peripheral subtype=0x%x\n", subtype);
1556 rc = -EINVAL;
1557 goto fail_chg_enable;
1558 }
1559 }
1560 dev_set_drvdata(&spmi->dev, chip);
1561 device_init_wakeup(&spmi->dev, 1);
1562
1563 chip->dc_psy.name = "qpnp-dc";
1564 chip->dc_psy.type = POWER_SUPPLY_TYPE_MAINS;
1565 chip->dc_psy.supplied_to = pm_power_supplied_to;
1566 chip->dc_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to);
1567 chip->dc_psy.properties = pm_power_props_mains;
1568 chip->dc_psy.num_properties = ARRAY_SIZE(pm_power_props_mains);
1569 chip->dc_psy.get_property = qpnp_power_get_property_mains;
1570
1571 chip->batt_psy.name = "battery";
1572 chip->batt_psy.type = POWER_SUPPLY_TYPE_BATTERY;
1573 chip->batt_psy.properties = msm_batt_power_props;
1574 chip->batt_psy.num_properties = ARRAY_SIZE(msm_batt_power_props);
1575 chip->batt_psy.get_property = qpnp_batt_power_get_property;
David Keitelb80eda82012-10-15 10:49:11 -07001576 chip->batt_psy.set_property = qpnp_batt_power_set_property;
David Keitel03ee6b52012-10-22 12:25:19 -07001577 chip->batt_psy.property_is_writeable = qpnp_batt_property_is_writeable;
David Keitel80668952012-07-27 14:25:49 -07001578 chip->batt_psy.external_power_changed =
1579 qpnp_batt_external_power_changed;
1580
1581 rc = power_supply_register(chip->dev, &chip->dc_psy);
1582 if (rc < 0) {
1583 pr_err("power_supply_register usb failed rc = %d\n", rc);
1584 goto fail_chg_enable;
1585 }
1586
1587 rc = power_supply_register(chip->dev, &chip->batt_psy);
1588 if (rc < 0) {
1589 pr_err("power_supply_register batt failed rc = %d\n", rc);
1590 goto unregister_dc;
1591 }
1592
Sridhar Parasuramae183bd2012-12-21 09:28:46 -08001593 /* Turn on appropriate workaround flags */
1594 qpnp_chg_setup_flags(chip);
1595
David Keitel80668952012-07-27 14:25:49 -07001596 power_supply_set_present(chip->usb_psy,
1597 qpnp_chg_is_usb_chg_plugged_in(chip));
1598
David Keitel03ee6b52012-10-22 12:25:19 -07001599 qpnp_chg_charge_en(chip, !chip->charging_disabled);
David Keitelb1ddb742012-11-06 19:05:51 -08001600 qpnp_chg_force_run_on_batt(chip, chip->charging_disabled);
David Keitelbf359042012-10-19 16:54:58 -07001601
Abhijeet Dharmapurikar2d996b12013-01-03 17:48:02 -08001602 pr_info("success chg_dis = %d, usb = %d, dc = %d b_health = %d batt_present = %d\n",
1603 chip->charging_disabled,
1604 qpnp_chg_is_usb_chg_plugged_in(chip),
1605 qpnp_chg_is_dc_chg_plugged_in(chip),
1606 get_prop_batt_present(chip),
1607 get_prop_batt_health(chip));
David Keitel80668952012-07-27 14:25:49 -07001608 return 0;
1609
1610unregister_dc:
1611 power_supply_unregister(&chip->dc_psy);
1612fail_chg_enable:
David Keitelbe208252013-01-31 14:49:25 -08001613 kfree(chip->thermal_mitigation);
David Keitel80668952012-07-27 14:25:49 -07001614 kfree(chip);
1615 dev_set_drvdata(&spmi->dev, NULL);
1616 return rc;
1617}
1618
1619static int __devexit
1620qpnp_charger_remove(struct spmi_device *spmi)
1621{
1622 struct qpnp_chg_chip *chip = dev_get_drvdata(&spmi->dev);
David Keitel80668952012-07-27 14:25:49 -07001623 dev_set_drvdata(&spmi->dev, NULL);
1624 kfree(chip);
1625
1626 return 0;
1627}
1628
1629static struct spmi_driver qpnp_charger_driver = {
1630 .probe = qpnp_charger_probe,
1631 .remove = __devexit_p(qpnp_charger_remove),
1632 .driver = {
1633 .name = QPNP_CHARGER_DEV_NAME,
1634 .owner = THIS_MODULE,
1635 .of_match_table = qpnp_charger_match_table,
1636 },
1637};
1638
1639/**
1640 * qpnp_chg_init() - register spmi driver for qpnp-chg
1641 */
1642int __init
1643qpnp_chg_init(void)
1644{
1645 return spmi_driver_register(&qpnp_charger_driver);
1646}
1647module_init(qpnp_chg_init);
1648
1649static void __exit
1650qpnp_chg_exit(void)
1651{
1652 spmi_driver_unregister(&qpnp_charger_driver);
1653}
1654module_exit(qpnp_chg_exit);
1655
1656
1657MODULE_DESCRIPTION("QPNP charger driver");
1658MODULE_LICENSE("GPL v2");
1659MODULE_ALIAS("platform:" QPNP_CHARGER_DEV_NAME);