Ohad Ben-Cohen | ab493a0 | 2011-06-02 02:48:05 +0300 | [diff] [blame] | 1 | # IOMMU_API always gets selected by whoever wants it. |
| 2 | config IOMMU_API |
| 3 | bool |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 4 | |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 5 | menuconfig IOMMU_SUPPORT |
| 6 | bool "IOMMU Hardware Support" |
| 7 | default y |
| 8 | ---help--- |
| 9 | Say Y here if you want to compile device drivers for IO Memory |
| 10 | Management Units into the kernel. These devices usually allow to |
| 11 | remap DMA requests and/or remap interrupts from other devices on the |
| 12 | system. |
| 13 | |
| 14 | if IOMMU_SUPPORT |
| 15 | |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 16 | # MSM IOMMU support |
Olav Haugan | 0858ae0 | 2013-06-04 16:51:50 -0700 | [diff] [blame] | 17 | |
| 18 | # MSM_IOMMU always gets selected by whoever wants it. |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 19 | config MSM_IOMMU |
Olav Haugan | 0858ae0 | 2013-06-04 16:51:50 -0700 | [diff] [blame] | 20 | bool |
| 21 | |
| 22 | # MSM IOMMUv0 support |
| 23 | config MSM_IOMMU_V0 |
| 24 | bool "MSM IOMMUv0 Support" |
| 25 | depends on ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSM8610 |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 26 | select IOMMU_API |
Olav Haugan | 0858ae0 | 2013-06-04 16:51:50 -0700 | [diff] [blame] | 27 | select MSM_IOMMU |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 28 | help |
Olav Haugan | 0858ae0 | 2013-06-04 16:51:50 -0700 | [diff] [blame] | 29 | Support for the IOMMUs (v0) found on certain Qualcomm SOCs. |
| 30 | These IOMMUs allow virtualization of the address space used by most |
| 31 | cores within the multimedia subsystem. |
| 32 | |
| 33 | If unsure, say N here. |
| 34 | |
| 35 | # MSM IOMMUv1 support |
| 36 | config MSM_IOMMU_V1 |
| 37 | bool "MSM IOMMUv1 Support" |
| 38 | depends on ARCH_MSM8974 || ARCH_MPQ8092 || ARCH_MSM8226 || ARCH_APQ8084 |
| 39 | select IOMMU_API |
| 40 | select MSM_IOMMU |
| 41 | help |
| 42 | Support for the IOMMUs (v1) found on certain Qualcomm SOCs. |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 43 | These IOMMUs allow virtualization of the address space used by most |
| 44 | cores within the multimedia subsystem. |
| 45 | |
| 46 | If unsure, say N here. |
| 47 | |
Olav Haugan | c097272 | 2013-09-30 16:56:54 -0700 | [diff] [blame] | 48 | # MSM IOMMU sync lock support |
| 49 | config MSM_IOMMU_SYNC |
| 50 | bool "MSM IOMMU Sync Lock Support" |
| 51 | depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSM8930 || ARCH_MSM8610) && MSM_IOMMU_V0 |
| 52 | help |
| 53 | Say Y here if you want the IOMMU to grab a remote spinlock to ensure |
| 54 | synchronization between IOMMU accesses by CPU and other exectution |
| 55 | environments in the SoC. |
| 56 | |
| 57 | If unsure, say N here. |
| 58 | |
Olav Haugan | 65209cd | 2012-11-07 15:02:56 -0800 | [diff] [blame] | 59 | # MSM IOMMU CPU-GPU sync programming support |
| 60 | config MSM_IOMMU_GPU_SYNC |
| 61 | bool "MSM IOMMU CPU-GPU Sync Support" |
Olav Haugan | c097272 | 2013-09-30 16:56:54 -0700 | [diff] [blame] | 62 | depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSM8930) && MSM_IOMMU_V0 |
| 63 | select MSM_IOMMU_SYNC |
Olav Haugan | 65209cd | 2012-11-07 15:02:56 -0800 | [diff] [blame] | 64 | help |
| 65 | Say Y here if you want to synchronize access to IOMMU configuration |
| 66 | port between CPU and GPU. CPU will grab a remote spinlock before |
| 67 | accessing IOMMU configuration registers and GPU will do the same. |
| 68 | |
| 69 | If unsure, say N here. |
| 70 | |
Olav Haugan | 99660ca | 2012-12-04 13:30:41 -0800 | [diff] [blame] | 71 | config MSM_IOMMU_PMON |
| 72 | bool "MSM IOMMU Perfomance Monitoring Support" |
Olav Haugan | 7a2f99c | 2013-02-04 14:43:26 -0800 | [diff] [blame] | 73 | depends on (ARCH_MSM8974 || ARCH_MSM8610 || ARCH_MSM8226) && MSM_IOMMU |
Olav Haugan | 99660ca | 2012-12-04 13:30:41 -0800 | [diff] [blame] | 74 | help |
| 75 | Support for monitoring IOMMUs performance on certain Qualcomm SOCs. |
| 76 | It captures TLB statistics per context bank of the IOMMU as an |
| 77 | indication of its performance metric. |
| 78 | |
| 79 | If unsure, say N here. |
| 80 | |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 81 | config IOMMU_PGTABLES_L2 |
Steve Muckle | f132c6c | 2012-06-06 18:30:57 -0700 | [diff] [blame] | 82 | bool "Allow SMMU page tables in the L2 cache (Experimental)" |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 83 | depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n |
Steve Muckle | f132c6c | 2012-06-06 18:30:57 -0700 | [diff] [blame] | 84 | help |
| 85 | Improves TLB miss latency at the expense of potential L2 pollution. |
| 86 | However, with large multimedia buffers, the TLB should mostly contain |
| 87 | section mappings and TLB misses should be quite infrequent. |
| 88 | Most people can probably say Y here. |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 89 | |
Olav Haugan | caa12d3 | 2013-06-05 16:05:47 -0700 | [diff] [blame] | 90 | config IOMMU_NON_SECURE |
| 91 | bool "Turns on programming of secure SMMU by kernel" |
| 92 | depends on MSM_IOMMU |
| 93 | help |
| 94 | Say Y here if you want the kernel to program all SMMUs regardless of |
| 95 | whether SMMUs are secure or not. A secure SMMU is an SMMU that has |
| 96 | its global address space programmed by the secure environment. In |
| 97 | addition some of the context banks might be owned/programmed by the |
| 98 | secure environment for a secure SMMU. Enabling this feature can be |
| 99 | used during testing when the secure environment is not available |
| 100 | and the kernel needs to program all the SMMUs. |
| 101 | |
| 102 | If unsure, say N here. |
| 103 | |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 104 | # AMD IOMMU support |
| 105 | config AMD_IOMMU |
| 106 | bool "AMD IOMMU support" |
| 107 | select SWIOTLB |
| 108 | select PCI_MSI |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 109 | select PCI_ATS |
| 110 | select PCI_PRI |
| 111 | select PCI_PASID |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 112 | select IOMMU_API |
| 113 | depends on X86_64 && PCI && ACPI |
| 114 | ---help--- |
| 115 | With this option you can enable support for AMD IOMMU hardware in |
| 116 | your system. An IOMMU is a hardware component which provides |
| 117 | remapping of DMA memory accesses from devices. With an AMD IOMMU you |
| 118 | can isolate the the DMA memory of different devices and protect the |
| 119 | system from misbehaving device drivers or hardware. |
| 120 | |
| 121 | You can find out if your system has an AMD IOMMU if you look into |
| 122 | your BIOS for an option to enable it or if you have an IVRS ACPI |
| 123 | table. |
| 124 | |
| 125 | config AMD_IOMMU_STATS |
| 126 | bool "Export AMD IOMMU statistics to debugfs" |
| 127 | depends on AMD_IOMMU |
| 128 | select DEBUG_FS |
| 129 | ---help--- |
| 130 | This option enables code in the AMD IOMMU driver to collect various |
| 131 | statistics about whats happening in the driver and exports that |
| 132 | information to userspace via debugfs. |
| 133 | If unsure, say N. |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 134 | |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 135 | config AMD_IOMMU_V2 |
| 136 | tristate "AMD IOMMU Version 2 driver (EXPERIMENTAL)" |
Joerg Roedel | 8736b2c | 2011-11-24 16:21:52 +0100 | [diff] [blame] | 137 | depends on AMD_IOMMU && PROFILING && EXPERIMENTAL |
| 138 | select MMU_NOTIFIER |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 139 | ---help--- |
| 140 | This option enables support for the AMD IOMMUv2 features of the IOMMU |
| 141 | hardware. Select this option if you want to use devices that support |
| 142 | the the PCI PRI and PASID interface. |
| 143 | |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 144 | # Intel IOMMU support |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 145 | config DMAR_TABLE |
| 146 | bool |
| 147 | |
| 148 | config INTEL_IOMMU |
| 149 | bool "Support for Intel IOMMU using DMA Remapping Devices" |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 150 | depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
| 151 | select IOMMU_API |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 152 | select DMAR_TABLE |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 153 | help |
| 154 | DMA remapping (DMAR) devices support enables independent address |
| 155 | translations for Direct Memory Access (DMA) from devices. |
| 156 | These DMA remapping devices are reported via ACPI tables |
| 157 | and include PCI device scope covered by these DMA |
| 158 | remapping devices. |
| 159 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 160 | config INTEL_IOMMU_DEFAULT_ON |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 161 | def_bool y |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 162 | prompt "Enable Intel DMA Remapping Devices by default" |
| 163 | depends on INTEL_IOMMU |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 164 | help |
| 165 | Selecting this option will enable a DMAR device at boot time if |
| 166 | one is found. If this option is not selected, DMAR support can |
| 167 | be enabled by passing intel_iommu=on to the kernel. |
| 168 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 169 | config INTEL_IOMMU_BROKEN_GFX_WA |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 170 | bool "Workaround broken graphics drivers (going away soon)" |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 171 | depends on INTEL_IOMMU && BROKEN && X86 |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 172 | ---help--- |
| 173 | Current Graphics drivers tend to use physical address |
| 174 | for DMA and avoid using DMA APIs. Setting this config |
| 175 | option permits the IOMMU driver to set a unity map for |
| 176 | all the OS-visible memory. Hence the driver can continue |
| 177 | to use physical addresses for DMA, at least until this |
| 178 | option is removed in the 2.6.32 kernel. |
| 179 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 180 | config INTEL_IOMMU_FLOPPY_WA |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 181 | def_bool y |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 182 | depends on INTEL_IOMMU && X86 |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 183 | ---help--- |
| 184 | Floppy disk drivers are known to bypass DMA API calls |
| 185 | thereby failing to work when IOMMU is enabled. This |
| 186 | workaround will setup a 1:1 mapping for the first |
| 187 | 16MiB to make floppy (an ISA device) work. |
| 188 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 189 | config IRQ_REMAP |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 190 | bool "Support for Interrupt Remapping (EXPERIMENTAL)" |
| 191 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 192 | select DMAR_TABLE |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 193 | ---help--- |
| 194 | Supports Interrupt remapping for IO-APIC and MSI devices. |
| 195 | To use x2apic mode in the CPU's which support x2APIC enhancements or |
| 196 | to support platforms with CPU's having > 8 bit APIC ID, say Y. |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 197 | |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 198 | # OMAP IOMMU support |
| 199 | config OMAP_IOMMU |
| 200 | bool "OMAP IOMMU Support" |
Ohad Ben-Cohen | 024ae88 | 2011-08-29 07:57:44 +0300 | [diff] [blame] | 201 | depends on ARCH_OMAP |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 202 | select IOMMU_API |
| 203 | |
| 204 | config OMAP_IOVMM |
Joerg Roedel | 7b6d45f | 2011-09-14 16:03:45 +0200 | [diff] [blame] | 205 | tristate "OMAP IO Virtual Memory Manager Support" |
| 206 | depends on OMAP_IOMMU |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 207 | |
| 208 | config OMAP_IOMMU_DEBUG |
| 209 | tristate "Export OMAP IOMMU/IOVMM internals in DebugFS" |
| 210 | depends on OMAP_IOVMM && DEBUG_FS |
| 211 | help |
| 212 | Select this to see extensive information about |
| 213 | the internal state of OMAP IOMMU/IOVMM in debugfs. |
| 214 | |
| 215 | Say N unless you know you need this. |
| 216 | |
Hiroshi DOYU | d53e54b | 2011-11-16 17:36:37 +0200 | [diff] [blame] | 217 | config TEGRA_IOMMU_GART |
| 218 | bool "Tegra GART IOMMU Support" |
| 219 | depends on ARCH_TEGRA_2x_SOC |
| 220 | select IOMMU_API |
| 221 | help |
| 222 | Enables support for remapping discontiguous physical memory |
| 223 | shared with the operating system into contiguous I/O virtual |
| 224 | space through the GART (Graphics Address Relocation Table) |
| 225 | hardware included on Tegra SoCs. |
| 226 | |
Hiroshi DOYU | 7a31f6f | 2011-11-17 07:31:31 +0200 | [diff] [blame] | 227 | config TEGRA_IOMMU_SMMU |
| 228 | bool "Tegra SMMU IOMMU Support" |
| 229 | depends on ARCH_TEGRA_3x_SOC |
| 230 | select IOMMU_API |
| 231 | help |
| 232 | Enables support for remapping discontiguous physical memory |
| 233 | shared with the operating system into contiguous I/O virtual |
| 234 | space through the SMMU (System Memory Management Unit) |
| 235 | hardware included on Tegra SoCs. |
| 236 | |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 237 | endif # IOMMU_SUPPORT |