| Olav Haugan | e6d01ef | 2013-01-25 16:55:44 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
| Sathish Ambley | d1b89ed | 2012-02-07 21:47:47 -0800 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __ARCH_ARM_MACH_MSM_IOMMU_HW_V2_H |
| 14 | #define __ARCH_ARM_MACH_MSM_IOMMU_HW_V2_H |
| 15 | |
| 16 | #define CTX_SHIFT 12 |
| 17 | #define CTX_OFFSET 0x8000 |
| 18 | |
| Sathish Ambley | d1b89ed | 2012-02-07 21:47:47 -0800 | [diff] [blame] | 19 | #define GET_GLOBAL_REG(reg, base) (readl_relaxed((base) + (reg))) |
| 20 | #define GET_CTX_REG(reg, base, ctx) \ |
| 21 | (readl_relaxed((base) + CTX_OFFSET + (reg) + ((ctx) << CTX_SHIFT))) |
| 22 | |
| 23 | #define SET_GLOBAL_REG(reg, base, val) writel_relaxed((val), ((base) + (reg))) |
| 24 | |
| 25 | #define SET_CTX_REG(reg, base, ctx, val) \ |
| 26 | writel_relaxed((val), \ |
| 27 | ((base) + CTX_OFFSET + (reg) + ((ctx) << CTX_SHIFT))) |
| 28 | |
| 29 | /* Wrappers for numbered registers */ |
| 30 | #define SET_GLOBAL_REG_N(b, n, r, v) SET_GLOBAL_REG((b), ((r) + (n << 2)), (v)) |
| 31 | #define GET_GLOBAL_REG_N(b, n, r) GET_GLOBAL_REG((b), ((r) + (n << 2))) |
| 32 | |
| 33 | /* Field wrappers */ |
| 34 | #define GET_GLOBAL_FIELD(b, r, F) \ |
| 35 | GET_FIELD(((b) + (r)), r##_##F##_MASK, r##_##F##_SHIFT) |
| 36 | #define GET_CONTEXT_FIELD(b, c, r, F) \ |
| 37 | GET_FIELD(((b) + CTX_OFFSET + (r) + ((c) << CTX_SHIFT)), \ |
| 38 | r##_##F##_MASK, r##_##F##_SHIFT) |
| 39 | |
| 40 | #define SET_GLOBAL_FIELD(b, r, F, v) \ |
| 41 | SET_FIELD(((b) + (r)), r##_##F##_MASK, r##_##F##_SHIFT, (v)) |
| 42 | #define SET_CONTEXT_FIELD(b, c, r, F, v) \ |
| 43 | SET_FIELD(((b) + CTX_OFFSET + (r) + ((c) << CTX_SHIFT)), \ |
| 44 | r##_##F##_MASK, r##_##F##_SHIFT, (v)) |
| 45 | |
| 46 | /* Wrappers for numbered field registers */ |
| 47 | #define SET_GLOBAL_FIELD_N(b, n, r, F, v) \ |
| 48 | SET_FIELD(((b) + ((n) << 2) + (r)), r##_##F##_MASK, r##_##F##_SHIFT, v) |
| 49 | #define GET_GLOBAL_FIELD_N(b, n, r, F) \ |
| 50 | GET_FIELD(((b) + ((n) << 2) + (r)), r##_##F##_MASK, r##_##F##_SHIFT) |
| 51 | |
| 52 | #define GET_FIELD(addr, mask, shift) ((readl_relaxed(addr) >> (shift)) & (mask)) |
| 53 | |
| 54 | #define SET_FIELD(addr, mask, shift, v) \ |
| 55 | do { \ |
| 56 | int t = readl_relaxed(addr); \ |
| 57 | writel_relaxed((t & ~((mask) << (shift))) + (((v) & \ |
| 58 | (mask)) << (shift)), addr); \ |
| 59 | } while (0) |
| 60 | |
| 61 | |
| 62 | /* Global register space 0 setters / getters */ |
| 63 | #define SET_CR0(b, v) SET_GLOBAL_REG(CR0, (b), (v)) |
| 64 | #define SET_SCR1(b, v) SET_GLOBAL_REG(SCR1, (b), (v)) |
| 65 | #define SET_CR2(b, v) SET_GLOBAL_REG(CR2, (b), (v)) |
| 66 | #define SET_ACR(b, v) SET_GLOBAL_REG(ACR, (b), (v)) |
| 67 | #define SET_IDR0(b, N, v) SET_GLOBAL_REG(IDR0, (b), (v)) |
| 68 | #define SET_IDR1(b, N, v) SET_GLOBAL_REG(IDR1, (b), (v)) |
| 69 | #define SET_IDR2(b, N, v) SET_GLOBAL_REG(IDR2, (b), (v)) |
| 70 | #define SET_IDR7(b, N, v) SET_GLOBAL_REG(IDR7, (b), (v)) |
| 71 | #define SET_GFAR(b, v) SET_GLOBAL_REG(GFAR, (b), (v)) |
| 72 | #define SET_GFSR(b, v) SET_GLOBAL_REG(GFSR, (b), (v)) |
| 73 | #define SET_GFSRRESTORE(b, v) SET_GLOBAL_REG(GFSRRESTORE, (b), (v)) |
| 74 | #define SET_GFSYNR0(b, v) SET_GLOBAL_REG(GFSYNR0, (b), (v)) |
| 75 | #define SET_GFSYNR1(b, v) SET_GLOBAL_REG(GFSYNR1, (b), (v)) |
| 76 | #define SET_GFSYNR2(b, v) SET_GLOBAL_REG(GFSYNR2, (b), (v)) |
| 77 | #define SET_TLBIVMID(b, v) SET_GLOBAL_REG(TLBIVMID, (b), (v)) |
| 78 | #define SET_TLBIALLNSNH(b, v) SET_GLOBAL_REG(TLBIALLNSNH, (b), (v)) |
| 79 | #define SET_TLBIALLH(b, v) SET_GLOBAL_REG(TLBIALLH, (b), (v)) |
| 80 | #define SET_TLBGSYNC(b, v) SET_GLOBAL_REG(TLBGSYNC, (b), (v)) |
| 81 | #define SET_TLBGSTATUS(b, v) SET_GLOBAL_REG(TLBSTATUS, (b), (v)) |
| 82 | #define SET_TLBIVAH(b, v) SET_GLOBAL_REG(TLBIVAH, (b), (v)) |
| 83 | #define SET_GATS1UR(b, v) SET_GLOBAL_REG(GATS1UR, (b), (v)) |
| 84 | #define SET_GATS1UW(b, v) SET_GLOBAL_REG(GATS1UW, (b), (v)) |
| 85 | #define SET_GATS1PR(b, v) SET_GLOBAL_REG(GATS1PR, (b), (v)) |
| 86 | #define SET_GATS1PW(b, v) SET_GLOBAL_REG(GATS1PW, (b), (v)) |
| 87 | #define SET_GATS12UR(b, v) SET_GLOBAL_REG(GATS12UR, (b), (v)) |
| 88 | #define SET_GATS12UW(b, v) SET_GLOBAL_REG(GATS12UW, (b), (v)) |
| 89 | #define SET_GATS12PR(b, v) SET_GLOBAL_REG(GATS12PR, (b), (v)) |
| 90 | #define SET_GATS12PW(b, v) SET_GLOBAL_REG(GATS12PW, (b), (v)) |
| 91 | #define SET_GPAR(b, v) SET_GLOBAL_REG(GPAR, (b), (v)) |
| 92 | #define SET_GATSR(b, v) SET_GLOBAL_REG(GATSR, (b), (v)) |
| 93 | #define SET_NSCR0(b, v) SET_GLOBAL_REG(NSCR0, (b), (v)) |
| 94 | #define SET_NSCR2(b, v) SET_GLOBAL_REG(NSCR2, (b), (v)) |
| 95 | #define SET_NSACR(b, v) SET_GLOBAL_REG(NSACR, (b), (v)) |
| 96 | #define SET_PMCR(b, v) SET_GLOBAL_REG(PMCR, (b), (v)) |
| 97 | #define SET_SMR_N(b, N, v) SET_GLOBAL_REG_N(SMR, N, (b), (v)) |
| 98 | #define SET_S2CR_N(b, N, v) SET_GLOBAL_REG_N(S2CR, N, (b), (v)) |
| 99 | |
| 100 | #define GET_CR0(b) GET_GLOBAL_REG(CR0, (b)) |
| 101 | #define GET_SCR1(b) GET_GLOBAL_REG(SCR1, (b)) |
| 102 | #define GET_CR2(b) GET_GLOBAL_REG(CR2, (b)) |
| 103 | #define GET_ACR(b) GET_GLOBAL_REG(ACR, (b)) |
| 104 | #define GET_IDR0(b, N) GET_GLOBAL_REG(IDR0, (b)) |
| 105 | #define GET_IDR1(b, N) GET_GLOBAL_REG(IDR1, (b)) |
| 106 | #define GET_IDR2(b, N) GET_GLOBAL_REG(IDR2, (b)) |
| 107 | #define GET_IDR7(b, N) GET_GLOBAL_REG(IDR7, (b)) |
| 108 | #define GET_GFAR(b) GET_GLOBAL_REG(GFAR, (b)) |
| 109 | #define GET_GFSR(b) GET_GLOBAL_REG(GFSR, (b)) |
| 110 | #define GET_GFSRRESTORE(b) GET_GLOBAL_REG(GFSRRESTORE, (b)) |
| 111 | #define GET_GFSYNR0(b) GET_GLOBAL_REG(GFSYNR0, (b)) |
| 112 | #define GET_GFSYNR1(b) GET_GLOBAL_REG(GFSYNR1, (b)) |
| 113 | #define GET_GFSYNR2(b) GET_GLOBAL_REG(GFSYNR2, (b)) |
| 114 | #define GET_TLBIVMID(b) GET_GLOBAL_REG(TLBIVMID, (b)) |
| 115 | #define GET_TLBIALLNSNH(b) GET_GLOBAL_REG(TLBIALLNSNH, (b)) |
| 116 | #define GET_TLBIALLH(b) GET_GLOBAL_REG(TLBIALLH, (b)) |
| 117 | #define GET_TLBGSYNC(b) GET_GLOBAL_REG(TLBGSYNC, (b)) |
| 118 | #define GET_TLBGSTATUS(b) GET_GLOBAL_REG(TLBSTATUS, (b)) |
| 119 | #define GET_TLBIVAH(b) GET_GLOBAL_REG(TLBIVAH, (b)) |
| 120 | #define GET_GATS1UR(b) GET_GLOBAL_REG(GATS1UR, (b)) |
| 121 | #define GET_GATS1UW(b) GET_GLOBAL_REG(GATS1UW, (b)) |
| 122 | #define GET_GATS1PR(b) GET_GLOBAL_REG(GATS1PR, (b)) |
| 123 | #define GET_GATS1PW(b) GET_GLOBAL_REG(GATS1PW, (b)) |
| 124 | #define GET_GATS12UR(b) GET_GLOBAL_REG(GATS12UR, (b)) |
| 125 | #define GET_GATS12UW(b) GET_GLOBAL_REG(GATS12UW, (b)) |
| 126 | #define GET_GATS12PR(b) GET_GLOBAL_REG(GATS12PR, (b)) |
| 127 | #define GET_GATS12PW(b) GET_GLOBAL_REG(GATS12PW, (b)) |
| 128 | #define GET_GPAR(b) GET_GLOBAL_REG(GPAR, (b)) |
| 129 | #define GET_GATSR(b) GET_GLOBAL_REG(GATSR, (b)) |
| 130 | #define GET_NSCR0(b) GET_GLOBAL_REG(NSCR0, (b)) |
| 131 | #define GET_NSCR2(b) GET_GLOBAL_REG(NSCR2, (b)) |
| 132 | #define GET_NSACR(b) GET_GLOBAL_REG(NSACR, (b)) |
| 133 | #define GET_PMCR(b, v) GET_GLOBAL_REG(PMCR, (b)) |
| 134 | #define GET_SMR_N(b, N) GET_GLOBAL_REG_N(SMR, N, (b)) |
| 135 | #define GET_S2CR_N(b, N) GET_GLOBAL_REG_N(S2CR, N, (b)) |
| 136 | |
| 137 | /* Global register space 1 setters / getters */ |
| 138 | #define SET_CBAR_N(b, N, v) SET_GLOBAL_REG_N(CBAR, N, (b), (v)) |
| 139 | #define SET_CBFRSYNRA_N(b, N, v) SET_GLOBAL_REG_N(CBFRSYNRA, N, (b), (v)) |
| 140 | |
| 141 | #define GET_CBAR_N(b, N) GET_GLOBAL_REG_N(CBAR, N, (b)) |
| 142 | #define GET_CBFRSYNRA_N(b, N) GET_GLOBAL_REG_N(CBFRSYNRA, N, (b)) |
| 143 | |
| 144 | /* Implementation defined register setters/getters */ |
| Olav Haugan | cd93219 | 2013-01-31 18:30:15 -0800 | [diff] [blame] | 145 | #define SET_MICRO_MMU_CTRL_HALT_REQ(b, v) \ |
| 146 | SET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, HALT_REQ, v) |
| 147 | #define GET_MICRO_MMU_CTRL_IDLE(b) \ |
| 148 | GET_GLOBAL_FIELD(b, MICRO_MMU_CTRL, IDLE) |
| Sathish Ambley | d1b89ed | 2012-02-07 21:47:47 -0800 | [diff] [blame] | 149 | #define SET_PREDICTIONDIS0(b, v) SET_GLOBAL_REG(PREDICTIONDIS0, (b), (v)) |
| 150 | #define SET_PREDICTIONDIS1(b, v) SET_GLOBAL_REG(PREDICTIONDIS1, (b), (v)) |
| 151 | #define SET_S1L1BFBLP0(b, v) SET_GLOBAL_REG(S1L1BFBLP0, (b), (v)) |
| 152 | |
| 153 | /* SSD register setters/getters */ |
| 154 | #define SET_SSDR_N(b, N, v) SET_GLOBAL_REG_N(SSDR_N, N, (b), (v)) |
| 155 | |
| 156 | #define GET_SSDR_N(b, N) GET_GLOBAL_REG_N(SSDR_N, N, (b)) |
| 157 | |
| 158 | /* Context bank register setters/getters */ |
| 159 | #define SET_SCTLR(b, c, v) SET_CTX_REG(CB_SCTLR, (b), (c), (v)) |
| 160 | #define SET_ACTLR(b, c, v) SET_CTX_REG(CB_ACTLR, (b), (c), (v)) |
| 161 | #define SET_RESUME(b, c, v) SET_CTX_REG(CB_RESUME, (b), (c), (v)) |
| 162 | #define SET_TTBR0(b, c, v) SET_CTX_REG(CB_TTBR0, (b), (c), (v)) |
| 163 | #define SET_TTBR1(b, c, v) SET_CTX_REG(CB_TTBR1, (b), (c), (v)) |
| 164 | #define SET_TTBCR(b, c, v) SET_CTX_REG(CB_TTBCR, (b), (c), (v)) |
| 165 | #define SET_CONTEXTIDR(b, c, v) SET_CTX_REG(CB_CONTEXTIDR, (b), (c), (v)) |
| 166 | #define SET_PRRR(b, c, v) SET_CTX_REG(CB_PRRR, (b), (c), (v)) |
| 167 | #define SET_NMRR(b, c, v) SET_CTX_REG(CB_NMRR, (b), (c), (v)) |
| 168 | #define SET_PAR(b, c, v) SET_CTX_REG(CB_PAR, (b), (c), (v)) |
| 169 | #define SET_FSR(b, c, v) SET_CTX_REG(CB_FSR, (b), (c), (v)) |
| 170 | #define SET_FSRRESTORE(b, c, v) SET_CTX_REG(CB_FSRRESTORE, (b), (c), (v)) |
| 171 | #define SET_FAR(b, c, v) SET_CTX_REG(CB_FAR, (b), (c), (v)) |
| 172 | #define SET_FSYNR0(b, c, v) SET_CTX_REG(CB_FSYNR0, (b), (c), (v)) |
| 173 | #define SET_FSYNR1(b, c, v) SET_CTX_REG(CB_FSYNR1, (b), (c), (v)) |
| 174 | #define SET_TLBIVA(b, c, v) SET_CTX_REG(CB_TLBIVA, (b), (c), (v)) |
| 175 | #define SET_TLBIVAA(b, c, v) SET_CTX_REG(CB_TLBIVAA, (b), (c), (v)) |
| 176 | #define SET_TLBIASID(b, c, v) SET_CTX_REG(CB_TLBIASID, (b), (c), (v)) |
| 177 | #define SET_TLBIALL(b, c, v) SET_CTX_REG(CB_TLBIALL, (b), (c), (v)) |
| 178 | #define SET_TLBIVAL(b, c, v) SET_CTX_REG(CB_TLBIVAL, (b), (c), (v)) |
| 179 | #define SET_TLBIVAAL(b, c, v) SET_CTX_REG(CB_TLBIVAAL, (b), (c), (v)) |
| 180 | #define SET_TLBSYNC(b, c, v) SET_CTX_REG(CB_TLBSYNC, (b), (c), (v)) |
| 181 | #define SET_TLBSTATUS(b, c, v) SET_CTX_REG(CB_TLBSTATUS, (b), (c), (v)) |
| 182 | #define SET_ATS1PR(b, c, v) SET_CTX_REG(CB_ATS1PR, (b), (c), (v)) |
| 183 | #define SET_ATS1PW(b, c, v) SET_CTX_REG(CB_ATS1PW, (b), (c), (v)) |
| 184 | #define SET_ATS1UR(b, c, v) SET_CTX_REG(CB_ATS1UR, (b), (c), (v)) |
| 185 | #define SET_ATS1UW(b, c, v) SET_CTX_REG(CB_ATS1UW, (b), (c), (v)) |
| 186 | #define SET_ATSR(b, c, v) SET_CTX_REG(CB_ATSR, (b), (c), (v)) |
| 187 | |
| 188 | #define GET_SCTLR(b, c) GET_CTX_REG(CB_SCTLR, (b), (c)) |
| 189 | #define GET_ACTLR(b, c) GET_CTX_REG(CB_ACTLR, (b), (c)) |
| 190 | #define GET_RESUME(b, c) GET_CTX_REG(CB_RESUME, (b), (c)) |
| 191 | #define GET_TTBR0(b, c) GET_CTX_REG(CB_TTBR0, (b), (c)) |
| 192 | #define GET_TTBR1(b, c) GET_CTX_REG(CB_TTBR1, (b), (c)) |
| 193 | #define GET_TTBCR(b, c) GET_CTX_REG(CB_TTBCR, (b), (c)) |
| 194 | #define GET_CONTEXTIDR(b, c) GET_CTX_REG(CB_CONTEXTIDR, (b), (c)) |
| 195 | #define GET_PRRR(b, c) GET_CTX_REG(CB_PRRR, (b), (c)) |
| 196 | #define GET_NMRR(b, c) GET_CTX_REG(CB_NMRR, (b), (c)) |
| 197 | #define GET_PAR(b, c) GET_CTX_REG(CB_PAR, (b), (c)) |
| 198 | #define GET_FSR(b, c) GET_CTX_REG(CB_FSR, (b), (c)) |
| 199 | #define GET_FSRRESTORE(b, c) GET_CTX_REG(CB_FSRRESTORE, (b), (c)) |
| 200 | #define GET_FAR(b, c) GET_CTX_REG(CB_FAR, (b), (c)) |
| 201 | #define GET_FSYNR0(b, c) GET_CTX_REG(CB_FSYNR0, (b), (c)) |
| 202 | #define GET_FSYNR1(b, c) GET_CTX_REG(CB_FSYNR1, (b), (c)) |
| 203 | #define GET_TLBIVA(b, c) GET_CTX_REG(CB_TLBIVA, (b), (c)) |
| 204 | #define GET_TLBIVAA(b, c) GET_CTX_REG(CB_TLBIVAA, (b), (c)) |
| 205 | #define GET_TLBIASID(b, c) GET_CTX_REG(CB_TLBIASID, (b), (c)) |
| 206 | #define GET_TLBIALL(b, c) GET_CTX_REG(CB_TLBIALL, (b), (c)) |
| 207 | #define GET_TLBIVAL(b, c) GET_CTX_REG(CB_TLBIVAL, (b), (c)) |
| 208 | #define GET_TLBIVAAL(b, c) GET_CTX_REG(CB_TLBIVAAL, (b), (c)) |
| 209 | #define GET_TLBSYNC(b, c) GET_CTX_REG(CB_TLBSYNC, (b), (c)) |
| 210 | #define GET_TLBSTATUS(b, c) GET_CTX_REG(CB_TLBSTATUS, (b), (c)) |
| 211 | #define GET_ATS1PR(b, c) GET_CTX_REG(CB_ATS1PR, (b), (c)) |
| 212 | #define GET_ATS1PW(b, c) GET_CTX_REG(CB_ATS1PW, (b), (c)) |
| 213 | #define GET_ATS1UR(b, c) GET_CTX_REG(CB_ATS1UR, (b), (c)) |
| 214 | #define GET_ATS1UW(b, c) GET_CTX_REG(CB_ATS1UW, (b), (c)) |
| 215 | #define GET_ATSR(b, c) GET_CTX_REG(CB_ATSR, (b), (c)) |
| 216 | |
| 217 | /* Global Register field setters / getters */ |
| 218 | /* Configuration Register: CR0 */ |
| 219 | #define SET_CR0_NSCFG(b, v) SET_GLOBAL_FIELD(b, CR0, NSCFG, v) |
| 220 | #define SET_CR0_WACFG(b, v) SET_GLOBAL_FIELD(b, CR0, WACFG, v) |
| 221 | #define SET_CR0_RACFG(b, v) SET_GLOBAL_FIELD(b, CR0, RACFG, v) |
| 222 | #define SET_CR0_SHCFG(b, v) SET_GLOBAL_FIELD(b, CR0, SHCFG, v) |
| 223 | #define SET_CR0_SMCFCFG(b, v) SET_GLOBAL_FIELD(b, CR0, SMCFCFG, v) |
| 224 | #define SET_CR0_MTCFG(b, v) SET_GLOBAL_FIELD(b, CR0, MTCFG, v) |
| 225 | #define SET_CR0_BSU(b, v) SET_GLOBAL_FIELD(b, CR0, BSU, v) |
| 226 | #define SET_CR0_FB(b, v) SET_GLOBAL_FIELD(b, CR0, FB, v) |
| 227 | #define SET_CR0_PTM(b, v) SET_GLOBAL_FIELD(b, CR0, PTM, v) |
| 228 | #define SET_CR0_VMIDPNE(b, v) SET_GLOBAL_FIELD(b, CR0, VMIDPNE, v) |
| 229 | #define SET_CR0_USFCFG(b, v) SET_GLOBAL_FIELD(b, CR0, USFCFG, v) |
| 230 | #define SET_CR0_GSE(b, v) SET_GLOBAL_FIELD(b, CR0, GSE, v) |
| 231 | #define SET_CR0_STALLD(b, v) SET_GLOBAL_FIELD(b, CR0, STALLD, v) |
| 232 | #define SET_CR0_TRANSIENTCFG(b, v) SET_GLOBAL_FIELD(b, CR0, TRANSIENTCFG, v) |
| 233 | #define SET_CR0_GCFGFIE(b, v) SET_GLOBAL_FIELD(b, CR0, GCFGFIE, v) |
| 234 | #define SET_CR0_GCFGFRE(b, v) SET_GLOBAL_FIELD(b, CR0, GCFGFRE, v) |
| 235 | #define SET_CR0_GFIE(b, v) SET_GLOBAL_FIELD(b, CR0, GFIE, v) |
| 236 | #define SET_CR0_GFRE(b, v) SET_GLOBAL_FIELD(b, CR0, GFRE, v) |
| 237 | #define SET_CR0_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, CR0, CLIENTPD, v) |
| 238 | |
| 239 | #define GET_CR0_NSCFG(b) GET_GLOBAL_FIELD(b, CR0, NSCFG) |
| 240 | #define GET_CR0_WACFG(b) GET_GLOBAL_FIELD(b, CR0, WACFG) |
| 241 | #define GET_CR0_RACFG(b) GET_GLOBAL_FIELD(b, CR0, RACFG) |
| 242 | #define GET_CR0_SHCFG(b) GET_GLOBAL_FIELD(b, CR0, SHCFG) |
| 243 | #define GET_CR0_SMCFCFG(b) GET_GLOBAL_FIELD(b, CR0, SMCFCFG) |
| 244 | #define GET_CR0_MTCFG(b) GET_GLOBAL_FIELD(b, CR0, MTCFG) |
| 245 | #define GET_CR0_BSU(b) GET_GLOBAL_FIELD(b, CR0, BSU) |
| 246 | #define GET_CR0_FB(b) GET_GLOBAL_FIELD(b, CR0, FB) |
| 247 | #define GET_CR0_PTM(b) GET_GLOBAL_FIELD(b, CR0, PTM) |
| 248 | #define GET_CR0_VMIDPNE(b) GET_GLOBAL_FIELD(b, CR0, VMIDPNE) |
| 249 | #define GET_CR0_USFCFG(b) GET_GLOBAL_FIELD(b, CR0, USFCFG) |
| 250 | #define GET_CR0_GSE(b) GET_GLOBAL_FIELD(b, CR0, GSE) |
| 251 | #define GET_CR0_STALLD(b) GET_GLOBAL_FIELD(b, CR0, STALLD) |
| 252 | #define GET_CR0_TRANSIENTCFG(b) GET_GLOBAL_FIELD(b, CR0, TRANSIENTCFG) |
| 253 | #define GET_CR0_GCFGFIE(b) GET_GLOBAL_FIELD(b, CR0, GCFGFIE) |
| 254 | #define GET_CR0_GCFGFRE(b) GET_GLOBAL_FIELD(b, CR0, GCFGFRE) |
| 255 | #define GET_CR0_GFIE(b) GET_GLOBAL_FIELD(b, CR0, GFIE) |
| 256 | #define GET_CR0_GFRE(b) GET_GLOBAL_FIELD(b, CR0, GFRE) |
| 257 | #define GET_CR0_CLIENTPD(b) GET_GLOBAL_FIELD(b, CR0, CLIENTPD) |
| 258 | |
| 259 | /* Configuration Register: CR2 */ |
| 260 | #define SET_CR2_BPVMID(b, v) SET_GLOBAL_FIELD(b, CR2, BPVMID, v) |
| 261 | |
| 262 | #define GET_CR2_BPVMID(b) GET_GLOBAL_FIELD(b, CR2, BPVMID) |
| 263 | |
| 264 | /* Global Address Translation, Stage 1, Privileged Read: GATS1PR */ |
| 265 | #define SET_GATS1PR_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS1PR, ADDR, v) |
| 266 | #define SET_GATS1PR_NDX(b, v) SET_GLOBAL_FIELD(b, GATS1PR, NDX, v) |
| 267 | |
| 268 | #define GET_GATS1PR_ADDR(b) GET_GLOBAL_FIELD(b, GATS1PR, ADDR) |
| 269 | #define GET_GATS1PR_NDX(b) GET_GLOBAL_FIELD(b, GATS1PR, NDX) |
| 270 | |
| 271 | /* Global Address Translation, Stage 1, Privileged Write: GATS1PW */ |
| 272 | #define SET_GATS1PW_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS1PW, ADDR, v) |
| 273 | #define SET_GATS1PW_NDX(b, v) SET_GLOBAL_FIELD(b, GATS1PW, NDX, v) |
| 274 | |
| 275 | #define GET_GATS1PW_ADDR(b) GET_GLOBAL_FIELD(b, GATS1PW, ADDR) |
| 276 | #define GET_GATS1PW_NDX(b) GET_GLOBAL_FIELD(b, GATS1PW, NDX) |
| 277 | |
| 278 | /* Global Address Translation, Stage 1, User Read: GATS1UR */ |
| 279 | #define SET_GATS1UR_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS1UR, ADDR, v) |
| 280 | #define SET_GATS1UR_NDX(b, v) SET_GLOBAL_FIELD(b, GATS1UR, NDX, v) |
| 281 | |
| 282 | #define GET_GATS1UR_ADDR(b) GET_GLOBAL_FIELD(b, GATS1UR, ADDR) |
| 283 | #define GET_GATS1UR_NDX(b) GET_GLOBAL_FIELD(b, GATS1UR, NDX) |
| 284 | |
| 285 | /* Global Address Translation, Stage 1, User Read: GATS1UW */ |
| 286 | #define SET_GATS1UW_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS1UW, ADDR, v) |
| 287 | #define SET_GATS1UW_NDX(b, v) SET_GLOBAL_FIELD(b, GATS1UW, NDX, v) |
| 288 | |
| 289 | #define GET_GATS1UW_ADDR(b) GET_GLOBAL_FIELD(b, GATS1UW, ADDR) |
| 290 | #define GET_GATS1UW_NDX(b) GET_GLOBAL_FIELD(b, GATS1UW, NDX) |
| 291 | |
| 292 | /* Global Address Translation, Stage 1 and 2, Privileged Read: GATS12PR */ |
| 293 | #define SET_GATS12PR_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS12PR, ADDR, v) |
| 294 | #define SET_GATS12PR_NDX(b, v) SET_GLOBAL_FIELD(b, GATS12PR, NDX, v) |
| 295 | |
| 296 | #define GET_GATS12PR_ADDR(b) GET_GLOBAL_FIELD(b, GATS12PR, ADDR) |
| 297 | #define GET_GATS12PR_NDX(b) GET_GLOBAL_FIELD(b, GATS12PR, NDX) |
| 298 | |
| 299 | /* Global Address Translation, Stage 1, Privileged Write: GATS1PW */ |
| 300 | #define SET_GATS12PW_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS12PW, ADDR, v) |
| 301 | #define SET_GATS12PW_NDX(b, v) SET_GLOBAL_FIELD(b, GATS12PW, NDX, v) |
| 302 | |
| 303 | #define GET_GATS12PW_ADDR(b) GET_GLOBAL_FIELD(b, GATS12PW, ADDR) |
| 304 | #define GET_GATS12PW_NDX(b) GET_GLOBAL_FIELD(b, GATS12PW, NDX) |
| 305 | |
| 306 | /* Global Address Translation, Stage 1, User Read: GATS1UR */ |
| 307 | #define SET_GATS12UR_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS12UR, ADDR, v) |
| 308 | #define SET_GATS12UR_NDX(b, v) SET_GLOBAL_FIELD(b, GATS12UR, NDX, v) |
| 309 | |
| 310 | #define GET_GATS12UR_ADDR(b) GET_GLOBAL_FIELD(b, GATS12UR, ADDR) |
| 311 | #define GET_GATS12UR_NDX(b) GET_GLOBAL_FIELD(b, GATS12UR, NDX) |
| 312 | |
| 313 | /* Global Address Translation, Stage 1, User Read: GATS1UW */ |
| 314 | #define SET_GATS12UW_ADDR(b, v) SET_GLOBAL_FIELD(b, GATS12UW, ADDR, v) |
| 315 | #define SET_GATS12UW_NDX(b, v) SET_GLOBAL_FIELD(b, GATS12UW, NDX, v) |
| 316 | |
| 317 | #define GET_GATS12UW_ADDR(b) GET_GLOBAL_FIELD(b, GATS12UW, ADDR) |
| 318 | #define GET_GATS12UW_NDX(b) GET_GLOBAL_FIELD(b, GATS12UW, NDX) |
| 319 | |
| 320 | /* Global Address Translation Status Register: GATSR */ |
| 321 | #define SET_GATSR_ACTIVE(b, v) SET_GLOBAL_FIELD(b, GATSR, ACTIVE, v) |
| 322 | |
| 323 | #define GET_GATSR_ACTIVE(b) GET_GLOBAL_FIELD(b, GATSR, ACTIVE) |
| 324 | |
| 325 | /* Global Fault Address Register: GFAR */ |
| 326 | #define SET_GFAR_FADDR(b, v) SET_GLOBAL_FIELD(b, GFAR, FADDR, v) |
| 327 | |
| 328 | #define GET_GFAR_FADDR(b) GET_GLOBAL_FIELD(b, GFAR, FADDR) |
| 329 | |
| 330 | /* Global Fault Status Register: GFSR */ |
| 331 | #define SET_GFSR_ICF(b, v) SET_GLOBAL_FIELD(b, GFSR, ICF, v) |
| 332 | #define SET_GFSR_USF(b, v) SET_GLOBAL_FIELD(b, GFSR, USF, v) |
| 333 | #define SET_GFSR_SMCF(b, v) SET_GLOBAL_FIELD(b, GFSR, SMCF, v) |
| 334 | #define SET_GFSR_UCBF(b, v) SET_GLOBAL_FIELD(b, GFSR, UCBF, v) |
| 335 | #define SET_GFSR_UCIF(b, v) SET_GLOBAL_FIELD(b, GFSR, UCIF, v) |
| 336 | #define SET_GFSR_CAF(b, v) SET_GLOBAL_FIELD(b, GFSR, CAF, v) |
| 337 | #define SET_GFSR_EF(b, v) SET_GLOBAL_FIELD(b, GFSR, EF, v) |
| 338 | #define SET_GFSR_PF(b, v) SET_GLOBAL_FIELD(b, GFSR, PF, v) |
| 339 | #define SET_GFSR_MULTI(b, v) SET_GLOBAL_FIELD(b, GFSR, MULTI, v) |
| 340 | |
| 341 | #define GET_GFSR_ICF(b) GET_GLOBAL_FIELD(b, GFSR, ICF) |
| 342 | #define GET_GFSR_USF(b) GET_GLOBAL_FIELD(b, GFSR, USF) |
| 343 | #define GET_GFSR_SMCF(b) GET_GLOBAL_FIELD(b, GFSR, SMCF) |
| 344 | #define GET_GFSR_UCBF(b) GET_GLOBAL_FIELD(b, GFSR, UCBF) |
| 345 | #define GET_GFSR_UCIF(b) GET_GLOBAL_FIELD(b, GFSR, UCIF) |
| 346 | #define GET_GFSR_CAF(b) GET_GLOBAL_FIELD(b, GFSR, CAF) |
| 347 | #define GET_GFSR_EF(b) GET_GLOBAL_FIELD(b, GFSR, EF) |
| 348 | #define GET_GFSR_PF(b) GET_GLOBAL_FIELD(b, GFSR, PF) |
| 349 | #define GET_GFSR_MULTI(b) GET_GLOBAL_FIELD(b, GFSR, MULTI) |
| 350 | |
| 351 | /* Global Fault Syndrome Register 0: GFSYNR0 */ |
| 352 | #define SET_GFSYNR0_NESTED(b, v) SET_GLOBAL_FIELD(b, GFSYNR0, NESTED, v) |
| 353 | #define SET_GFSYNR0_WNR(b, v) SET_GLOBAL_FIELD(b, GFSYNR0, WNR, v) |
| 354 | #define SET_GFSYNR0_PNU(b, v) SET_GLOBAL_FIELD(b, GFSYNR0, PNU, v) |
| 355 | #define SET_GFSYNR0_IND(b, v) SET_GLOBAL_FIELD(b, GFSYNR0, IND, v) |
| 356 | #define SET_GFSYNR0_NSSTATE(b, v) SET_GLOBAL_FIELD(b, GFSYNR0, NSSTATE, v) |
| 357 | #define SET_GFSYNR0_NSATTR(b, v) SET_GLOBAL_FIELD(b, GFSYNR0, NSATTR, v) |
| 358 | |
| 359 | #define GET_GFSYNR0_NESTED(b) GET_GLOBAL_FIELD(b, GFSYNR0, NESTED) |
| 360 | #define GET_GFSYNR0_WNR(b) GET_GLOBAL_FIELD(b, GFSYNR0, WNR) |
| 361 | #define GET_GFSYNR0_PNU(b) GET_GLOBAL_FIELD(b, GFSYNR0, PNU) |
| 362 | #define GET_GFSYNR0_IND(b) GET_GLOBAL_FIELD(b, GFSYNR0, IND) |
| 363 | #define GET_GFSYNR0_NSSTATE(b) GET_GLOBAL_FIELD(b, GFSYNR0, NSSTATE) |
| 364 | #define GET_GFSYNR0_NSATTR(b) GET_GLOBAL_FIELD(b, GFSYNR0, NSATTR) |
| 365 | |
| 366 | /* Global Fault Syndrome Register 1: GFSYNR1 */ |
| 367 | #define SET_GFSYNR1_SID(b, v) SET_GLOBAL_FIELD(b, GFSYNR1, SID, v) |
| 368 | |
| 369 | #define GET_GFSYNR1_SID(b) GET_GLOBAL_FIELD(b, GFSYNR1, SID) |
| 370 | |
| 371 | /* Global Physical Address Register: GPAR */ |
| 372 | #define SET_GPAR_F(b, v) SET_GLOBAL_FIELD(b, GPAR, F, v) |
| 373 | #define SET_GPAR_SS(b, v) SET_GLOBAL_FIELD(b, GPAR, SS, v) |
| 374 | #define SET_GPAR_OUTER(b, v) SET_GLOBAL_FIELD(b, GPAR, OUTER, v) |
| 375 | #define SET_GPAR_INNER(b, v) SET_GLOBAL_FIELD(b, GPAR, INNER, v) |
| 376 | #define SET_GPAR_SH(b, v) SET_GLOBAL_FIELD(b, GPAR, SH, v) |
| 377 | #define SET_GPAR_NS(b, v) SET_GLOBAL_FIELD(b, GPAR, NS, v) |
| 378 | #define SET_GPAR_NOS(b, v) SET_GLOBAL_FIELD(b, GPAR, NOS, v) |
| 379 | #define SET_GPAR_PA(b, v) SET_GLOBAL_FIELD(b, GPAR, PA, v) |
| 380 | #define SET_GPAR_TF(b, v) SET_GLOBAL_FIELD(b, GPAR, TF, v) |
| 381 | #define SET_GPAR_AFF(b, v) SET_GLOBAL_FIELD(b, GPAR, AFF, v) |
| 382 | #define SET_GPAR_PF(b, v) SET_GLOBAL_FIELD(b, GPAR, PF, v) |
| 383 | #define SET_GPAR_EF(b, v) SET_GLOBAL_FIELD(b, GPAR, EF, v) |
| 384 | #define SET_GPAR_TLCMCF(b, v) SET_GLOBAL_FIELD(b, GPAR, TLCMCF, v) |
| 385 | #define SET_GPAR_TLBLKF(b, v) SET_GLOBAL_FIELD(b, GPAR, TLBLKF, v) |
| 386 | #define SET_GPAR_UCBF(b, v) SET_GLOBAL_FIELD(b, GPAR, UCBF, v) |
| 387 | |
| 388 | #define GET_GPAR_F(b) GET_GLOBAL_FIELD(b, GPAR, F) |
| 389 | #define GET_GPAR_SS(b) GET_GLOBAL_FIELD(b, GPAR, SS) |
| 390 | #define GET_GPAR_OUTER(b) GET_GLOBAL_FIELD(b, GPAR, OUTER) |
| 391 | #define GET_GPAR_INNER(b) GET_GLOBAL_FIELD(b, GPAR, INNER) |
| 392 | #define GET_GPAR_SH(b) GET_GLOBAL_FIELD(b, GPAR, SH) |
| 393 | #define GET_GPAR_NS(b) GET_GLOBAL_FIELD(b, GPAR, NS) |
| 394 | #define GET_GPAR_NOS(b) GET_GLOBAL_FIELD(b, GPAR, NOS) |
| 395 | #define GET_GPAR_PA(b) GET_GLOBAL_FIELD(b, GPAR, PA) |
| 396 | #define GET_GPAR_TF(b) GET_GLOBAL_FIELD(b, GPAR, TF) |
| 397 | #define GET_GPAR_AFF(b) GET_GLOBAL_FIELD(b, GPAR, AFF) |
| 398 | #define GET_GPAR_PF(b) GET_GLOBAL_FIELD(b, GPAR, PF) |
| 399 | #define GET_GPAR_EF(b) GET_GLOBAL_FIELD(b, GPAR, EF) |
| 400 | #define GET_GPAR_TLCMCF(b) GET_GLOBAL_FIELD(b, GPAR, TLCMCF) |
| 401 | #define GET_GPAR_TLBLKF(b) GET_GLOBAL_FIELD(b, GPAR, TLBLKF) |
| 402 | #define GET_GPAR_UCBF(b) GET_GLOBAL_FIELD(b, GPAR, UCBF) |
| 403 | |
| 404 | /* Identification Register: IDR0 */ |
| 405 | #define SET_IDR0_NUMSMRG(b, v) SET_GLOBAL_FIELD(b, IDR0, NUMSMRG, v) |
| 406 | #define SET_IDR0_NUMSIDB(b, v) SET_GLOBAL_FIELD(b, IDR0, NUMSIDB, v) |
| 407 | #define SET_IDR0_BTM(b, v) SET_GLOBAL_FIELD(b, IDR0, BTM, v) |
| 408 | #define SET_IDR0_CTTW(b, v) SET_GLOBAL_FIELD(b, IDR0, CTTW, v) |
| 409 | #define SET_IDR0_NUMIRPT(b, v) SET_GLOBAL_FIELD(b, IDR0, NUMIRPT, v) |
| 410 | #define SET_IDR0_PTFS(b, v) SET_GLOBAL_FIELD(b, IDR0, PTFS, v) |
| 411 | #define SET_IDR0_SMS(b, v) SET_GLOBAL_FIELD(b, IDR0, SMS, v) |
| 412 | #define SET_IDR0_NTS(b, v) SET_GLOBAL_FIELD(b, IDR0, NTS, v) |
| 413 | #define SET_IDR0_S2TS(b, v) SET_GLOBAL_FIELD(b, IDR0, S2TS, v) |
| 414 | #define SET_IDR0_S1TS(b, v) SET_GLOBAL_FIELD(b, IDR0, S1TS, v) |
| 415 | #define SET_IDR0_SES(b, v) SET_GLOBAL_FIELD(b, IDR0, SES, v) |
| 416 | |
| 417 | #define GET_IDR0_NUMSMRG(b) GET_GLOBAL_FIELD(b, IDR0, NUMSMRG) |
| 418 | #define GET_IDR0_NUMSIDB(b) GET_GLOBAL_FIELD(b, IDR0, NUMSIDB) |
| 419 | #define GET_IDR0_BTM(b) GET_GLOBAL_FIELD(b, IDR0, BTM) |
| 420 | #define GET_IDR0_CTTW(b) GET_GLOBAL_FIELD(b, IDR0, CTTW) |
| 421 | #define GET_IDR0_NUMIRPT(b) GET_GLOBAL_FIELD(b, IDR0, NUMIRPT) |
| 422 | #define GET_IDR0_PTFS(b) GET_GLOBAL_FIELD(b, IDR0, PTFS) |
| 423 | #define GET_IDR0_SMS(b) GET_GLOBAL_FIELD(b, IDR0, SMS) |
| 424 | #define GET_IDR0_NTS(b) GET_GLOBAL_FIELD(b, IDR0, NTS) |
| 425 | #define GET_IDR0_S2TS(b) GET_GLOBAL_FIELD(b, IDR0, S2TS) |
| 426 | #define GET_IDR0_S1TS(b) GET_GLOBAL_FIELD(b, IDR0, S1TS) |
| 427 | #define GET_IDR0_SES(b) GET_GLOBAL_FIELD(b, IDR0, SES) |
| 428 | |
| 429 | /* Identification Register: IDR1 */ |
| 430 | #define SET_IDR1_NUMCB(b, v) SET_GLOBAL_FIELD(b, IDR1, NUMCB, v) |
| 431 | #define SET_IDR1_NUMSSDNDXB(b, v) SET_GLOBAL_FIELD(b, IDR1, NUMSSDNDXB, v) |
| 432 | #define SET_IDR1_SSDTP(b, v) SET_GLOBAL_FIELD(b, IDR1, SSDTP, v) |
| 433 | #define SET_IDR1_SMCD(b, v) SET_GLOBAL_FIELD(b, IDR1, SMCD, v) |
| 434 | #define SET_IDR1_NUMS2CB(b, v) SET_GLOBAL_FIELD(b, IDR1, NUMS2CB, v) |
| 435 | #define SET_IDR1_NUMPAGENDXB(b, v) SET_GLOBAL_FIELD(b, IDR1, NUMPAGENDXB, v) |
| 436 | #define SET_IDR1_PAGESIZE(b, v) SET_GLOBAL_FIELD(b, IDR1, PAGESIZE, v) |
| 437 | |
| 438 | #define GET_IDR1_NUMCB(b) GET_GLOBAL_FIELD(b, IDR1, NUMCB) |
| 439 | #define GET_IDR1_NUMSSDNDXB(b) GET_GLOBAL_FIELD(b, IDR1, NUMSSDNDXB) |
| 440 | #define GET_IDR1_SSDTP(b) GET_GLOBAL_FIELD(b, IDR1, SSDTP) |
| 441 | #define GET_IDR1_SMCD(b) GET_GLOBAL_FIELD(b, IDR1, SMCD) |
| 442 | #define GET_IDR1_NUMS2CB(b) GET_GLOBAL_FIELD(b, IDR1, NUMS2CB) |
| 443 | #define GET_IDR1_NUMPAGENDXB(b) GET_GLOBAL_FIELD(b, IDR1, NUMPAGENDXB) |
| 444 | #define GET_IDR1_PAGESIZE(b) GET_GLOBAL_FIELD(b, IDR1, PAGESIZE) |
| 445 | |
| 446 | /* Identification Register: IDR2 */ |
| 447 | #define SET_IDR2_IAS(b, v) SET_GLOBAL_FIELD(b, IDR2, IAS, v) |
| 448 | #define SET_IDR2_OAS(b, v) SET_GLOBAL_FIELD(b, IDR2, OAS, v) |
| 449 | |
| 450 | #define GET_IDR2_IAS(b) GET_GLOBAL_FIELD(b, IDR2, IAS) |
| 451 | #define GET_IDR2_OAS(b) GET_GLOBAL_FIELD(b, IDR2, OAS) |
| 452 | |
| 453 | /* Identification Register: IDR7 */ |
| 454 | #define SET_IDR7_MINOR(b, v) SET_GLOBAL_FIELD(b, IDR7, MINOR, v) |
| 455 | #define SET_IDR7_MAJOR(b, v) SET_GLOBAL_FIELD(b, IDR7, MAJOR, v) |
| 456 | |
| 457 | #define GET_IDR7_MINOR(b) GET_GLOBAL_FIELD(b, IDR7, MINOR) |
| 458 | #define GET_IDR7_MAJOR(b) GET_GLOBAL_FIELD(b, IDR7, MAJOR) |
| 459 | |
| 460 | /* Stream to Context Register: S2CR_N */ |
| 461 | #define SET_S2CR_CBNDX(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, CBNDX, v) |
| 462 | #define SET_S2CR_SHCFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, SHCFG, v) |
| 463 | #define SET_S2CR_MTCFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, MTCFG, v) |
| 464 | #define SET_S2CR_MEMATTR(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, MEMATTR, v) |
| 465 | #define SET_S2CR_TYPE(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, TYPE, v) |
| 466 | #define SET_S2CR_NSCFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, NSCFG, v) |
| 467 | #define SET_S2CR_RACFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, RACFG, v) |
| 468 | #define SET_S2CR_WACFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, WACFG, v) |
| 469 | #define SET_S2CR_PRIVCFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, PRIVCFG, v) |
| 470 | #define SET_S2CR_INSTCFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, INSTCFG, v) |
| 471 | #define SET_S2CR_TRANSIENTCFG(b, n, v) \ |
| 472 | SET_GLOBAL_FIELD_N(b, n, S2CR, TRANSIENTCFG, v) |
| 473 | #define SET_S2CR_VMID(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, VMID, v) |
| 474 | #define SET_S2CR_BSU(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, BSU, v) |
| 475 | #define SET_S2CR_FB(b, n, v) SET_GLOBAL_FIELD_N(b, n, S2CR, FB, v) |
| 476 | |
| 477 | #define GET_S2CR_CBNDX(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, CBNDX) |
| 478 | #define GET_S2CR_SHCFG(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, SHCFG) |
| 479 | #define GET_S2CR_MTCFG(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, MTCFG) |
| 480 | #define GET_S2CR_MEMATTR(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, MEMATTR) |
| 481 | #define GET_S2CR_TYPE(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, TYPE) |
| 482 | #define GET_S2CR_NSCFG(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, NSCFG) |
| 483 | #define GET_S2CR_RACFG(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, RACFG) |
| 484 | #define GET_S2CR_WACFG(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, WACFG) |
| 485 | #define GET_S2CR_PRIVCFG(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, PRIVCFG) |
| 486 | #define GET_S2CR_INSTCFG(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, INSTCFG) |
| 487 | #define GET_S2CR_TRANSIENTCFG(b, n) \ |
| 488 | GET_GLOBAL_FIELD_N(b, n, S2CR, TRANSIENTCFG) |
| 489 | #define GET_S2CR_VMID(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, VMID) |
| 490 | #define GET_S2CR_BSU(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, BSU) |
| 491 | #define GET_S2CR_FB(b, n) GET_GLOBAL_FIELD_N(b, n, S2CR, FB) |
| 492 | |
| 493 | /* Stream Match Register: SMR_N */ |
| 494 | #define SET_SMR_ID(b, n, v) SET_GLOBAL_FIELD_N(b, n, SMR, ID, v) |
| 495 | #define SET_SMR_MASK(b, n, v) SET_GLOBAL_FIELD_N(b, n, SMR, MASK, v) |
| 496 | #define SET_SMR_VALID(b, n, v) SET_GLOBAL_FIELD_N(b, n, SMR, VALID, v) |
| 497 | |
| 498 | #define GET_SMR_ID(b, n) GET_GLOBAL_FIELD_N(b, n, SMR, ID) |
| 499 | #define GET_SMR_MASK(b, n) GET_GLOBAL_FIELD_N(b, n, SMR, MASK) |
| 500 | #define GET_SMR_VALID(b, n) GET_GLOBAL_FIELD_N(b, n, SMR, VALID) |
| 501 | |
| 502 | /* Global TLB Status: TLBGSTATUS */ |
| 503 | #define SET_TLBGSTATUS_GSACTIVE(b, v) \ |
| 504 | SET_GLOBAL_FIELD(b, TLBGSTATUS, GSACTIVE, v) |
| 505 | |
| 506 | #define GET_TLBGSTATUS_GSACTIVE(b) \ |
| 507 | GET_GLOBAL_FIELD(b, TLBGSTATUS, GSACTIVE) |
| 508 | |
| 509 | /* Invalidate Hyp TLB by VA: TLBIVAH */ |
| 510 | #define SET_TLBIVAH_ADDR(b, v) SET_GLOBAL_FIELD(b, TLBIVAH, ADDR, v) |
| 511 | |
| 512 | #define GET_TLBIVAH_ADDR(b) GET_GLOBAL_FIELD(b, TLBIVAH, ADDR) |
| 513 | |
| 514 | /* Invalidate TLB by VMID: TLBIVMID */ |
| 515 | #define SET_TLBIVMID_VMID(b, v) SET_GLOBAL_FIELD(b, TLBIVMID, VMID, v) |
| 516 | |
| 517 | #define GET_TLBIVMID_VMID(b) GET_GLOBAL_FIELD(b, TLBIVMID, VMID) |
| 518 | |
| 519 | /* Global Register Space 1 Field setters/getters*/ |
| 520 | /* Context Bank Attribute Register: CBAR_N */ |
| 521 | #define SET_CBAR_VMID(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, VMID, v) |
| 522 | #define SET_CBAR_CBNDX(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, CBNDX, v) |
| 523 | #define SET_CBAR_BPSHCFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, BPSHCFG, v) |
| 524 | #define SET_CBAR_HYPC(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, HYPC, v) |
| 525 | #define SET_CBAR_FB(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, FB, v) |
| 526 | #define SET_CBAR_MEMATTR(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, MEMATTR, v) |
| 527 | #define SET_CBAR_TYPE(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, TYPE, v) |
| 528 | #define SET_CBAR_BSU(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, BSU, v) |
| 529 | #define SET_CBAR_RACFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, RACFG, v) |
| 530 | #define SET_CBAR_WACFG(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, WACFG, v) |
| 531 | #define SET_CBAR_IRPTNDX(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBAR, IRPTNDX, v) |
| 532 | |
| 533 | #define GET_CBAR_VMID(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, VMID) |
| 534 | #define GET_CBAR_CBNDX(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, CBNDX) |
| 535 | #define GET_CBAR_BPSHCFG(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, BPSHCFG) |
| 536 | #define GET_CBAR_HYPC(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, HYPC) |
| 537 | #define GET_CBAR_FB(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, FB) |
| 538 | #define GET_CBAR_MEMATTR(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, MEMATTR) |
| 539 | #define GET_CBAR_TYPE(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, TYPE) |
| 540 | #define GET_CBAR_BSU(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, BSU) |
| 541 | #define GET_CBAR_RACFG(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, RACFG) |
| 542 | #define GET_CBAR_WACFG(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, WACFG) |
| 543 | #define GET_CBAR_IRPTNDX(b, n) GET_GLOBAL_FIELD_N(b, n, CBAR, IRPTNDX) |
| 544 | |
| 545 | /* Context Bank Fault Restricted Syndrome Register A: CBFRSYNRA_N */ |
| 546 | #define SET_CBFRSYNRA_SID(b, n, v) SET_GLOBAL_FIELD_N(b, n, CBFRSYNRA, SID, v) |
| 547 | |
| 548 | #define GET_CBFRSYNRA_SID(b, n) GET_GLOBAL_FIELD_N(b, n, CBFRSYNRA, SID) |
| 549 | |
| 550 | /* Stage 1 Context Bank Format Fields */ |
| 551 | #define SET_CB_ACTLR_REQPRIORITY (b, c, v) \ |
| 552 | SET_CONTEXT_FIELD(b, c, CB_ACTLR, REQPRIORITY, v) |
| 553 | #define SET_CB_ACTLR_REQPRIORITYCFG(b, c, v) \ |
| 554 | SET_CONTEXT_FIELD(b, c, CB_ACTLR, REQPRIORITYCFG, v) |
| 555 | #define SET_CB_ACTLR_PRIVCFG(b, c, v) \ |
| 556 | SET_CONTEXT_FIELD(b, c, CB_ACTLR, PRIVCFG, v) |
| 557 | #define SET_CB_ACTLR_BPRCOSH(b, c, v) \ |
| 558 | SET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCOSH, v) |
| 559 | #define SET_CB_ACTLR_BPRCISH(b, c, v) \ |
| 560 | SET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCISH, v) |
| 561 | #define SET_CB_ACTLR_BPRCNSH(b, c, v) \ |
| 562 | SET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCNSH, v) |
| 563 | |
| 564 | #define GET_CB_ACTLR_REQPRIORITY (b, c) \ |
| 565 | GET_CONTEXT_FIELD(b, c, CB_ACTLR, REQPRIORITY) |
| 566 | #define GET_CB_ACTLR_REQPRIORITYCFG(b, c) \ |
| 567 | GET_CONTEXT_FIELD(b, c, CB_ACTLR, REQPRIORITYCFG) |
| 568 | #define GET_CB_ACTLR_PRIVCFG(b, c) GET_CONTEXT_FIELD(b, c, CB_ACTLR, PRIVCFG) |
| 569 | #define GET_CB_ACTLR_BPRCOSH(b, c) GET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCOSH) |
| 570 | #define GET_CB_ACTLR_BPRCISH(b, c) GET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCISH) |
| 571 | #define GET_CB_ACTLR_BPRCNSH(b, c) GET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCNSH) |
| 572 | |
| 573 | /* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */ |
| 574 | #define SET_CB_ATS1PR_ADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_ATS1PR, ADDR, v) |
| 575 | |
| 576 | #define GET_CB_ATS1PR_ADDR(b, c) GET_CONTEXT_FIELD(b, c, CB_ATS1PR, ADDR) |
| 577 | |
| 578 | /* Address Translation, Stage 1, Privileged Write: CB_ATS1PW */ |
| 579 | #define SET_CB_ATS1PW_ADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_ATS1PW, ADDR, v) |
| 580 | |
| 581 | #define GET_CB_ATS1PW_ADDR(b, c) GET_CONTEXT_FIELD(b, c, CB_ATS1PW, ADDR) |
| 582 | |
| 583 | /* Address Translation, Stage 1, User Read: CB_ATS1UR */ |
| 584 | #define SET_CB_ATS1UR_ADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_ATS1UR, ADDR, v) |
| 585 | |
| 586 | #define GET_CB_ATS1UR_ADDR(b, c) GET_CONTEXT_FIELD(b, c, CB_ATS1UR, ADDR) |
| 587 | |
| 588 | /* Address Translation, Stage 1, User Write: CB_ATS1UW */ |
| 589 | #define SET_CB_ATS1UW_ADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_ATS1UW, ADDR, v) |
| 590 | |
| 591 | #define GET_CB_ATS1UW_ADDR(b, c) GET_CONTEXT_FIELD(b, c, CB_ATS1UW, ADDR) |
| 592 | |
| 593 | /* Address Translation Status Register: CB_ATSR */ |
| 594 | #define SET_CB_ATSR_ACTIVE(b, c, v) SET_CONTEXT_FIELD(b, c, CB_ATSR, ACTIVE, v) |
| 595 | |
| 596 | #define GET_CB_ATSR_ACTIVE(b, c) GET_CONTEXT_FIELD(b, c, CB_ATSR, ACTIVE) |
| 597 | |
| 598 | /* Context ID Register: CB_CONTEXTIDR */ |
| 599 | #define SET_CB_CONTEXTIDR_ASID(b, c, v) \ |
| 600 | SET_CONTEXT_FIELD(b, c, CB_CONTEXTIDR, ASID, v) |
| 601 | #define SET_CB_CONTEXTIDR_PROCID(b, c, v) \ |
| 602 | SET_CONTEXT_FIELD(b, c, CB_CONTEXTIDR, PROCID, v) |
| 603 | |
| 604 | #define GET_CB_CONTEXTIDR_ASID(b, c) \ |
| 605 | GET_CONTEXT_FIELD(b, c, CB_CONTEXTIDR, ASID) |
| 606 | #define GET_CB_CONTEXTIDR_PROCID(b, c) \ |
| 607 | GET_CONTEXT_FIELD(b, c, CB_CONTEXTIDR, PROCID) |
| 608 | |
| 609 | /* Fault Address Register: CB_FAR */ |
| 610 | #define SET_CB_FAR_FADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FAR, FADDR, v) |
| 611 | |
| 612 | #define GET_CB_FAR_FADDR(b, c) GET_CONTEXT_FIELD(b, c, CB_FAR, FADDR) |
| 613 | |
| 614 | /* Fault Status Register: CB_FSR */ |
| 615 | #define SET_CB_FSR_TF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, TF, v) |
| 616 | #define SET_CB_FSR_AFF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, AFF, v) |
| 617 | #define SET_CB_FSR_PF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, PF, v) |
| 618 | #define SET_CB_FSR_EF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, EF, v) |
| 619 | #define SET_CB_FSR_TLBMCF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, TLBMCF, v) |
| 620 | #define SET_CB_FSR_TLBLKF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, TLBLKF, v) |
| 621 | #define SET_CB_FSR_SS(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, SS, v) |
| 622 | #define SET_CB_FSR_MULTI(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSR, MULTI, v) |
| 623 | |
| 624 | #define GET_CB_FSR_TF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, TF) |
| 625 | #define GET_CB_FSR_AFF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, AFF) |
| 626 | #define GET_CB_FSR_PF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, PF) |
| 627 | #define GET_CB_FSR_EF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, EF) |
| 628 | #define GET_CB_FSR_TLBMCF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, TLBMCF) |
| 629 | #define GET_CB_FSR_TLBLKF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, TLBLKF) |
| 630 | #define GET_CB_FSR_SS(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, SS) |
| 631 | #define GET_CB_FSR_MULTI(b, c) GET_CONTEXT_FIELD(b, c, CB_FSR, MULTI) |
| 632 | |
| 633 | /* Fault Syndrome Register 0: CB_FSYNR0 */ |
| 634 | #define SET_CB_FSYNR0_PLVL(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSYNR0, PLVL, v) |
| 635 | #define SET_CB_FSYNR0_S1PTWF(b, c, v) \ |
| 636 | SET_CONTEXT_FIELD(b, c, CB_FSYNR0, S1PTWF, v) |
| 637 | #define SET_CB_FSYNR0_WNR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSYNR0, WNR, v) |
| 638 | #define SET_CB_FSYNR0_PNU(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSYNR0, PNU, v) |
| 639 | #define SET_CB_FSYNR0_IND(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSYNR0, IND, v) |
| 640 | #define SET_CB_FSYNR0_NSSTATE(b, c, v) \ |
| 641 | SET_CONTEXT_FIELD(b, c, CB_FSYNR0, NSSTATE, v) |
| 642 | #define SET_CB_FSYNR0_NSATTR(b, c, v) \ |
| 643 | SET_CONTEXT_FIELD(b, c, CB_FSYNR0, NSATTR, v) |
| 644 | #define SET_CB_FSYNR0_ATOF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSYNR0, ATOF, v) |
| 645 | #define SET_CB_FSYNR0_PTWF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSYNR0, PTWF, v) |
| 646 | #define SET_CB_FSYNR0_AFR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_FSYNR0, AFR, v) |
| 647 | #define SET_CB_FSYNR0_S1CBNDX(b, c, v) \ |
| 648 | SET_CONTEXT_FIELD(b, c, CB_FSYNR0, S1CBNDX, v) |
| 649 | |
| 650 | #define GET_CB_FSYNR0_PLVL(b, c) GET_CONTEXT_FIELD(b, c, CB_FSYNR0, PLVL) |
| 651 | #define GET_CB_FSYNR0_S1PTWF(b, c) \ |
| 652 | GET_CONTEXT_FIELD(b, c, CB_FSYNR0, S1PTWF) |
| 653 | #define GET_CB_FSYNR0_WNR(b, c) GET_CONTEXT_FIELD(b, c, CB_FSYNR0, WNR) |
| 654 | #define GET_CB_FSYNR0_PNU(b, c) GET_CONTEXT_FIELD(b, c, CB_FSYNR0, PNU) |
| 655 | #define GET_CB_FSYNR0_IND(b, c) GET_CONTEXT_FIELD(b, c, CB_FSYNR0, IND) |
| 656 | #define GET_CB_FSYNR0_NSSTATE(b, c) \ |
| 657 | GET_CONTEXT_FIELD(b, c, CB_FSYNR0, NSSTATE) |
| 658 | #define GET_CB_FSYNR0_NSATTR(b, c) \ |
| 659 | GET_CONTEXT_FIELD(b, c, CB_FSYNR0, NSATTR) |
| 660 | #define GET_CB_FSYNR0_ATOF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSYNR0, ATOF) |
| 661 | #define GET_CB_FSYNR0_PTWF(b, c) GET_CONTEXT_FIELD(b, c, CB_FSYNR0, PTWF) |
| 662 | #define GET_CB_FSYNR0_AFR(b, c) GET_CONTEXT_FIELD(b, c, CB_FSYNR0, AFR) |
| 663 | #define GET_CB_FSYNR0_S1CBNDX(b, c) \ |
| 664 | GET_CONTEXT_FIELD(b, c, CB_FSYNR0, S1CBNDX) |
| 665 | |
| 666 | /* Normal Memory Remap Register: CB_NMRR */ |
| 667 | #define SET_CB_NMRR_IR0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR0, v) |
| 668 | #define SET_CB_NMRR_IR1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR1, v) |
| 669 | #define SET_CB_NMRR_IR2(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR2, v) |
| 670 | #define SET_CB_NMRR_IR3(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR3, v) |
| 671 | #define SET_CB_NMRR_IR4(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR4, v) |
| 672 | #define SET_CB_NMRR_IR5(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR5, v) |
| 673 | #define SET_CB_NMRR_IR6(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR6, v) |
| 674 | #define SET_CB_NMRR_IR7(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, IR7, v) |
| 675 | #define SET_CB_NMRR_OR0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR0, v) |
| 676 | #define SET_CB_NMRR_OR1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR1, v) |
| 677 | #define SET_CB_NMRR_OR2(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR2, v) |
| 678 | #define SET_CB_NMRR_OR3(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR3, v) |
| 679 | #define SET_CB_NMRR_OR4(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR4, v) |
| 680 | #define SET_CB_NMRR_OR5(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR5, v) |
| 681 | #define SET_CB_NMRR_OR6(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR6, v) |
| 682 | #define SET_CB_NMRR_OR7(b, c, v) SET_CONTEXT_FIELD(b, c, CB_NMRR, OR7, v) |
| 683 | |
| 684 | #define GET_CB_NMRR_IR0(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR0) |
| 685 | #define GET_CB_NMRR_IR1(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR1) |
| 686 | #define GET_CB_NMRR_IR2(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR2) |
| 687 | #define GET_CB_NMRR_IR3(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR3) |
| 688 | #define GET_CB_NMRR_IR4(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR4) |
| 689 | #define GET_CB_NMRR_IR5(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR5) |
| 690 | #define GET_CB_NMRR_IR6(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR6) |
| 691 | #define GET_CB_NMRR_IR7(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, IR7) |
| 692 | #define GET_CB_NMRR_OR0(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, OR0) |
| 693 | #define GET_CB_NMRR_OR1(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, OR1) |
| 694 | #define GET_CB_NMRR_OR2(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, OR2) |
| 695 | #define GET_CB_NMRR_OR3(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, OR3) |
| 696 | #define GET_CB_NMRR_OR4(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, OR4) |
| 697 | #define GET_CB_NMRR_OR5(b, c) GET_CONTEXT_FIELD(b, c, CB_NMRR, OR5) |
| 698 | |
| 699 | /* Physical Address Register: CB_PAR */ |
| 700 | #define SET_CB_PAR_F(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, F, v) |
| 701 | #define SET_CB_PAR_SS(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, SS, v) |
| 702 | #define SET_CB_PAR_OUTER(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, OUTER, v) |
| 703 | #define SET_CB_PAR_INNER(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, INNER, v) |
| 704 | #define SET_CB_PAR_SH(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, SH, v) |
| 705 | #define SET_CB_PAR_NS(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, NS, v) |
| 706 | #define SET_CB_PAR_NOS(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, NOS, v) |
| 707 | #define SET_CB_PAR_PA(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, PA, v) |
| 708 | #define SET_CB_PAR_TF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, TF, v) |
| 709 | #define SET_CB_PAR_AFF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, AFF, v) |
| 710 | #define SET_CB_PAR_PF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, PF, v) |
| 711 | #define SET_CB_PAR_TLBMCF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, TLBMCF, v) |
| 712 | #define SET_CB_PAR_TLBLKF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, TLBLKF, v) |
| 713 | #define SET_CB_PAR_ATOT(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, ATOT, v) |
| 714 | #define SET_CB_PAR_PLVL(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, PLVL, v) |
| 715 | #define SET_CB_PAR_STAGE(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PAR, STAGE, v) |
| 716 | |
| 717 | #define GET_CB_PAR_F(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, F) |
| 718 | #define GET_CB_PAR_SS(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, SS) |
| 719 | #define GET_CB_PAR_OUTER(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, OUTER) |
| 720 | #define GET_CB_PAR_INNER(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, INNER) |
| 721 | #define GET_CB_PAR_SH(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, SH) |
| 722 | #define GET_CB_PAR_NS(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, NS) |
| 723 | #define GET_CB_PAR_NOS(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, NOS) |
| 724 | #define GET_CB_PAR_PA(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, PA) |
| 725 | #define GET_CB_PAR_TF(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, TF) |
| 726 | #define GET_CB_PAR_AFF(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, AFF) |
| 727 | #define GET_CB_PAR_PF(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, PF) |
| 728 | #define GET_CB_PAR_TLBMCF(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, TLBMCF) |
| 729 | #define GET_CB_PAR_TLBLKF(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, TLBLKF) |
| 730 | #define GET_CB_PAR_ATOT(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, ATOT) |
| 731 | #define GET_CB_PAR_PLVL(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, PLVL) |
| 732 | #define GET_CB_PAR_STAGE(b, c) GET_CONTEXT_FIELD(b, c, CB_PAR, STAGE) |
| 733 | |
| 734 | /* Primary Region Remap Register: CB_PRRR */ |
| 735 | #define SET_CB_PRRR_TR0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR0, v) |
| 736 | #define SET_CB_PRRR_TR1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR1, v) |
| 737 | #define SET_CB_PRRR_TR2(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR2, v) |
| 738 | #define SET_CB_PRRR_TR3(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR3, v) |
| 739 | #define SET_CB_PRRR_TR4(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR4, v) |
| 740 | #define SET_CB_PRRR_TR5(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR5, v) |
| 741 | #define SET_CB_PRRR_TR6(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR6, v) |
| 742 | #define SET_CB_PRRR_TR7(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, TR7, v) |
| 743 | #define SET_CB_PRRR_DS0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, DS0, v) |
| 744 | #define SET_CB_PRRR_DS1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, DS1, v) |
| 745 | #define SET_CB_PRRR_NS0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NS0, v) |
| 746 | #define SET_CB_PRRR_NS1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NS1, v) |
| 747 | #define SET_CB_PRRR_NOS0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS0, v) |
| 748 | #define SET_CB_PRRR_NOS1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS1, v) |
| 749 | #define SET_CB_PRRR_NOS2(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS2, v) |
| 750 | #define SET_CB_PRRR_NOS3(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS3, v) |
| 751 | #define SET_CB_PRRR_NOS4(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS4, v) |
| 752 | #define SET_CB_PRRR_NOS5(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS5, v) |
| 753 | #define SET_CB_PRRR_NOS6(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS6, v) |
| 754 | #define SET_CB_PRRR_NOS7(b, c, v) SET_CONTEXT_FIELD(b, c, CB_PRRR, NOS7, v) |
| 755 | |
| 756 | #define GET_CB_PRRR_TR0(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR0) |
| 757 | #define GET_CB_PRRR_TR1(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR1) |
| 758 | #define GET_CB_PRRR_TR2(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR2) |
| 759 | #define GET_CB_PRRR_TR3(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR3) |
| 760 | #define GET_CB_PRRR_TR4(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR4) |
| 761 | #define GET_CB_PRRR_TR5(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR5) |
| 762 | #define GET_CB_PRRR_TR6(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR6) |
| 763 | #define GET_CB_PRRR_TR7(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, TR7) |
| 764 | #define GET_CB_PRRR_DS0(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, DS0) |
| 765 | #define GET_CB_PRRR_DS1(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, DS1) |
| 766 | #define GET_CB_PRRR_NS0(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NS0) |
| 767 | #define GET_CB_PRRR_NS1(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NS1) |
| 768 | #define GET_CB_PRRR_NOS0(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS0) |
| 769 | #define GET_CB_PRRR_NOS1(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS1) |
| 770 | #define GET_CB_PRRR_NOS2(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS2) |
| 771 | #define GET_CB_PRRR_NOS3(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS3) |
| 772 | #define GET_CB_PRRR_NOS4(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS4) |
| 773 | #define GET_CB_PRRR_NOS5(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS5) |
| 774 | #define GET_CB_PRRR_NOS6(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS6) |
| 775 | #define GET_CB_PRRR_NOS7(b, c) GET_CONTEXT_FIELD(b, c, CB_PRRR, NOS7) |
| 776 | |
| 777 | /* Transaction Resume: CB_RESUME */ |
| 778 | #define SET_CB_RESUME_TNR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_RESUME, TNR, v) |
| 779 | |
| 780 | #define GET_CB_RESUME_TNR(b, c) GET_CONTEXT_FIELD(b, c, CB_RESUME, TNR) |
| 781 | |
| 782 | /* System Control Register: CB_SCTLR */ |
| 783 | #define SET_CB_SCTLR_M(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, M, v) |
| 784 | #define SET_CB_SCTLR_TRE(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, TRE, v) |
| 785 | #define SET_CB_SCTLR_AFE(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, AFE, v) |
| 786 | #define SET_CB_SCTLR_AFFD(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, AFFD, v) |
| 787 | #define SET_CB_SCTLR_E(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, E, v) |
| 788 | #define SET_CB_SCTLR_CFRE(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, CFRE, v) |
| 789 | #define SET_CB_SCTLR_CFIE(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, CFIE, v) |
| 790 | #define SET_CB_SCTLR_CFCFG(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, CFCFG, v) |
| 791 | #define SET_CB_SCTLR_HUPCF(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, HUPCF, v) |
| 792 | #define SET_CB_SCTLR_WXN(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, WXN, v) |
| 793 | #define SET_CB_SCTLR_UWXN(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, UWXN, v) |
| 794 | #define SET_CB_SCTLR_ASIDPNE(b, c, v) \ |
| 795 | SET_CONTEXT_FIELD(b, c, CB_SCTLR, ASIDPNE, v) |
| 796 | #define SET_CB_SCTLR_TRANSIENTCFG(b, c, v) \ |
| 797 | SET_CONTEXT_FIELD(b, c, CB_SCTLR, TRANSIENTCFG, v) |
| 798 | #define SET_CB_SCTLR_MEMATTR(b, c, v) \ |
| 799 | SET_CONTEXT_FIELD(b, c, CB_SCTLR, MEMATTR, v) |
| 800 | #define SET_CB_SCTLR_MTCFG(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, MTCFG, v) |
| 801 | #define SET_CB_SCTLR_SHCFG(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, SHCFG, v) |
| 802 | #define SET_CB_SCTLR_RACFG(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, RACFG, v) |
| 803 | #define SET_CB_SCTLR_WACFG(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, WACFG, v) |
| 804 | #define SET_CB_SCTLR_NSCFG(b, c, v) SET_CONTEXT_FIELD(b, c, CB_SCTLR, NSCFG, v) |
| 805 | |
| 806 | #define GET_CB_SCTLR_M(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, M) |
| 807 | #define GET_CB_SCTLR_TRE(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, TRE) |
| 808 | #define GET_CB_SCTLR_AFE(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, AFE) |
| 809 | #define GET_CB_SCTLR_AFFD(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, AFFD) |
| 810 | #define GET_CB_SCTLR_E(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, E) |
| 811 | #define GET_CB_SCTLR_CFRE(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, CFRE) |
| 812 | #define GET_CB_SCTLR_CFIE(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, CFIE) |
| 813 | #define GET_CB_SCTLR_CFCFG(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, CFCFG) |
| 814 | #define GET_CB_SCTLR_HUPCF(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, HUPCF) |
| 815 | #define GET_CB_SCTLR_WXN(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, WXN) |
| 816 | #define GET_CB_SCTLR_UWXN(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, UWXN) |
| 817 | #define GET_CB_SCTLR_ASIDPNE(b, c) \ |
| 818 | GET_CONTEXT_FIELD(b, c, CB_SCTLR, ASIDPNE) |
| 819 | #define GET_CB_SCTLR_TRANSIENTCFG(b, c) \ |
| 820 | GET_CONTEXT_FIELD(b, c, CB_SCTLR, TRANSIENTCFG) |
| 821 | #define GET_CB_SCTLR_MEMATTR(b, c) \ |
| 822 | GET_CONTEXT_FIELD(b, c, CB_SCTLR, MEMATTR) |
| 823 | #define GET_CB_SCTLR_MTCFG(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, MTCFG) |
| 824 | #define GET_CB_SCTLR_SHCFG(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, SHCFG) |
| 825 | #define GET_CB_SCTLR_RACFG(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, RACFG) |
| 826 | #define GET_CB_SCTLR_WACFG(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, WACFG) |
| 827 | #define GET_CB_SCTLR_NSCFG(b, c) GET_CONTEXT_FIELD(b, c, CB_SCTLR, NSCFG) |
| 828 | |
| 829 | /* Invalidate TLB by ASID: CB_TLBIASID */ |
| 830 | #define SET_CB_TLBIASID_ASID(b, c, v) \ |
| 831 | SET_CONTEXT_FIELD(b, c, CB_TLBIASID, ASID, v) |
| 832 | |
| 833 | #define GET_CB_TLBIASID_ASID(b, c) \ |
| 834 | GET_CONTEXT_FIELD(b, c, CB_TLBIASID, ASID) |
| 835 | |
| 836 | /* Invalidate TLB by VA: CB_TLBIVA */ |
| 837 | #define SET_CB_TLBIVA_ASID(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TLBIVA, ASID, v) |
| 838 | #define SET_CB_TLBIVA_VA(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TLBIVA, VA, v) |
| 839 | |
| 840 | #define GET_CB_TLBIVA_ASID(b, c) GET_CONTEXT_FIELD(b, c, CB_TLBIVA, ASID) |
| 841 | #define GET_CB_TLBIVA_VA(b, c) GET_CONTEXT_FIELD(b, c, CB_TLBIVA, VA) |
| 842 | |
| 843 | /* Invalidate TLB by VA, All ASID: CB_TLBIVAA */ |
| 844 | #define SET_CB_TLBIVAA_VA(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TLBIVAA, VA, v) |
| 845 | |
| 846 | #define GET_CB_TLBIVAA_VA(b, c) GET_CONTEXT_FIELD(b, c, CB_TLBIVAA, VA) |
| 847 | |
| 848 | /* Invalidate TLB by VA, All ASID, Last Level: CB_TLBIVAAL */ |
| 849 | #define SET_CB_TLBIVAAL_VA(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TLBIVAAL, VA, v) |
| 850 | |
| 851 | #define GET_CB_TLBIVAAL_VA(b, c) GET_CONTEXT_FIELD(b, c, CB_TLBIVAAL, VA) |
| 852 | |
| 853 | /* Invalidate TLB by VA, Last Level: CB_TLBIVAL */ |
| 854 | #define SET_CB_TLBIVAL_ASID(b, c, v) \ |
| 855 | SET_CONTEXT_FIELD(b, c, CB_TLBIVAL, ASID, v) |
| 856 | #define SET_CB_TLBIVAL_VA(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TLBIVAL, VA, v) |
| 857 | |
| 858 | #define GET_CB_TLBIVAL_ASID(b, c) \ |
| 859 | GET_CONTEXT_FIELD(b, c, CB_TLBIVAL, ASID) |
| 860 | #define GET_CB_TLBIVAL_VA(b, c) GET_CONTEXT_FIELD(b, c, CB_TLBIVAL, VA) |
| 861 | |
| 862 | /* TLB Status: CB_TLBSTATUS */ |
| 863 | #define SET_CB_TLBSTATUS_SACTIVE(b, c, v) \ |
| 864 | SET_CONTEXT_FIELD(b, c, CB_TLBSTATUS, SACTIVE, v) |
| 865 | |
| 866 | #define GET_CB_TLBSTATUS_SACTIVE(b, c) \ |
| 867 | GET_CONTEXT_FIELD(b, c, CB_TLBSTATUS, SACTIVE) |
| 868 | |
| 869 | /* Translation Table Base Control Register: CB_TTBCR */ |
| 870 | #define SET_CB_TTBCR_T0SZ(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBCR, T0SZ, v) |
| 871 | #define SET_CB_TTBCR_PD0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBCR, PD0, v) |
| 872 | #define SET_CB_TTBCR_PD1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBCR, PD1, v) |
| 873 | #define SET_CB_TTBCR_NSCFG0(b, c, v) \ |
| 874 | SET_CONTEXT_FIELD(b, c, CB_TTBCR, NSCFG0, v) |
| 875 | #define SET_CB_TTBCR_NSCFG1(b, c, v) \ |
| 876 | SET_CONTEXT_FIELD(b, c, CB_TTBCR, NSCFG1, v) |
| 877 | #define SET_CB_TTBCR_EAE(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBCR, EAE, v) |
| 878 | |
| 879 | #define GET_CB_TTBCR_T0SZ(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBCR, T0SZ) |
| 880 | #define GET_CB_TTBCR_PD0(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBCR, PD0) |
| 881 | #define GET_CB_TTBCR_PD1(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBCR, PD1) |
| 882 | #define GET_CB_TTBCR_NSCFG0(b, c) \ |
| 883 | GET_CONTEXT_FIELD(b, c, CB_TTBCR, NSCFG0) |
| 884 | #define GET_CB_TTBCR_NSCFG1(b, c) \ |
| 885 | GET_CONTEXT_FIELD(b, c, CB_TTBCR, NSCFG1) |
| 886 | #define GET_CB_TTBCR_EAE(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBCR, EAE) |
| 887 | |
| 888 | /* Translation Table Base Register 0: CB_TTBR */ |
| 889 | #define SET_CB_TTBR0_IRGN1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR0, IRGN1, v) |
| 890 | #define SET_CB_TTBR0_S(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR0, S, v) |
| 891 | #define SET_CB_TTBR0_RGN(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR0, RGN, v) |
| 892 | #define SET_CB_TTBR0_NOS(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR0, NOS, v) |
| 893 | #define SET_CB_TTBR0_IRGN0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR0, IRGN0, v) |
| 894 | #define SET_CB_TTBR0_ADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR0, ADDR, v) |
| 895 | |
| 896 | #define GET_CB_TTBR0_IRGN1(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR0, IRGN1) |
| 897 | #define GET_CB_TTBR0_S(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR0, S) |
| 898 | #define GET_CB_TTBR0_RGN(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR0, RGN) |
| 899 | #define GET_CB_TTBR0_NOS(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR0, NOS) |
| 900 | #define GET_CB_TTBR0_IRGN0(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR0, IRGN0) |
| 901 | #define GET_CB_TTBR0_ADDR(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR0, ADDR) |
| 902 | |
| 903 | /* Translation Table Base Register 1: CB_TTBR1 */ |
| 904 | #define SET_CB_TTBR1_IRGN1(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR1, IRGN1, v) |
| 905 | #define SET_CB_TTBR1_0S(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR1, S, v) |
| 906 | #define SET_CB_TTBR1_RGN(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR1, RGN, v) |
| 907 | #define SET_CB_TTBR1_NOS(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR1, NOS, v) |
| 908 | #define SET_CB_TTBR1_IRGN0(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR1, IRGN0, v) |
| 909 | #define SET_CB_TTBR1_ADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_TTBR1, ADDR, v) |
| 910 | |
| 911 | #define GET_CB_TTBR1_IRGN1(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR1, IRGN1) |
| 912 | #define GET_CB_TTBR1_0S(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR1, S) |
| 913 | #define GET_CB_TTBR1_RGN(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR1, RGN) |
| 914 | #define GET_CB_TTBR1_NOS(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR1, NOS) |
| 915 | #define GET_CB_TTBR1_IRGN0(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR1, IRGN0) |
| 916 | #define GET_CB_TTBR1_ADDR(b, c) GET_CONTEXT_FIELD(b, c, CB_TTBR1, ADDR) |
| 917 | |
| 918 | /* Global Register Space 0 */ |
| 919 | #define CR0 (0x0000) |
| 920 | #define SCR1 (0x0004) |
| 921 | #define CR2 (0x0008) |
| 922 | #define ACR (0x0010) |
| 923 | #define IDR0 (0x0020) |
| 924 | #define IDR1 (0x0024) |
| 925 | #define IDR2 (0x0028) |
| 926 | #define IDR7 (0x003C) |
| 927 | #define GFAR (0x0040) |
| 928 | #define GFSR (0x0044) |
| 929 | #define GFSRRESTORE (0x004C) |
| 930 | #define GFSYNR0 (0x0050) |
| 931 | #define GFSYNR1 (0x0054) |
| 932 | #define GFSYNR2 (0x0058) |
| 933 | #define TLBIVMID (0x0064) |
| 934 | #define TLBIALLNSNH (0x0068) |
| 935 | #define TLBIALLH (0x006C) |
| 936 | #define TLBGSYNC (0x0070) |
| 937 | #define TLBGSTATUS (0x0074) |
| 938 | #define TLBIVAH (0x0078) |
| 939 | #define GATS1UR (0x0100) |
| 940 | #define GATS1UW (0x0108) |
| 941 | #define GATS1PR (0x0110) |
| 942 | #define GATS1PW (0x0118) |
| 943 | #define GATS12UR (0x0120) |
| 944 | #define GATS12UW (0x0128) |
| 945 | #define GATS12PR (0x0130) |
| 946 | #define GATS12PW (0x0138) |
| 947 | #define GPAR (0x0180) |
| 948 | #define GATSR (0x0188) |
| 949 | #define NSCR0 (0x0400) |
| 950 | #define NSCR2 (0x0408) |
| 951 | #define NSACR (0x0410) |
| 952 | #define SMR (0x0800) |
| 953 | #define S2CR (0x0C00) |
| 954 | |
| 955 | /* Global Register Space 1 */ |
| 956 | #define CBAR (0x1000) |
| 957 | #define CBFRSYNRA (0x1400) |
| 958 | |
| 959 | /* Implementation defined Register Space */ |
| Olav Haugan | cd93219 | 2013-01-31 18:30:15 -0800 | [diff] [blame] | 960 | #define MICRO_MMU_CTRL (0x2000) |
| Sathish Ambley | d1b89ed | 2012-02-07 21:47:47 -0800 | [diff] [blame] | 961 | #define PREDICTIONDIS0 (0x204C) |
| 962 | #define PREDICTIONDIS1 (0x2050) |
| 963 | #define S1L1BFBLP0 (0x215C) |
| 964 | |
| 965 | /* Performance Monitoring Register Space */ |
| 966 | #define PMEVCNTR_N (0x3000) |
| 967 | #define PMEVTYPER_N (0x3400) |
| 968 | #define PMCGCR_N (0x3800) |
| 969 | #define PMCGSMR_N (0x3A00) |
| 970 | #define PMCNTENSET_N (0x3C00) |
| 971 | #define PMCNTENCLR_N (0x3C20) |
| 972 | #define PMINTENSET_N (0x3C40) |
| 973 | #define PMINTENCLR_N (0x3C60) |
| 974 | #define PMOVSCLR_N (0x3C80) |
| 975 | #define PMOVSSET_N (0x3CC0) |
| 976 | #define PMCFGR (0x3E00) |
| 977 | #define PMCR (0x3E04) |
| 978 | #define PMCEID0 (0x3E20) |
| 979 | #define PMCEID1 (0x3E24) |
| 980 | #define PMAUTHSTATUS (0x3FB8) |
| 981 | #define PMDEVTYPE (0x3FCC) |
| 982 | |
| 983 | /* Secure Status Determination Address Space */ |
| 984 | #define SSDR_N (0x4000) |
| 985 | |
| 986 | /* Stage 1 Context Bank Format */ |
| 987 | #define CB_SCTLR (0x000) |
| 988 | #define CB_ACTLR (0x004) |
| 989 | #define CB_RESUME (0x008) |
| 990 | #define CB_TTBR0 (0x020) |
| 991 | #define CB_TTBR1 (0x028) |
| 992 | #define CB_TTBCR (0x030) |
| 993 | #define CB_CONTEXTIDR (0x034) |
| 994 | #define CB_PRRR (0x038) |
| 995 | #define CB_NMRR (0x03C) |
| 996 | #define CB_PAR (0x050) |
| 997 | #define CB_FSR (0x058) |
| 998 | #define CB_FSRRESTORE (0x05C) |
| 999 | #define CB_FAR (0x060) |
| 1000 | #define CB_FSYNR0 (0x068) |
| 1001 | #define CB_FSYNR1 (0x06C) |
| 1002 | #define CB_TLBIVA (0x600) |
| 1003 | #define CB_TLBIVAA (0x608) |
| 1004 | #define CB_TLBIASID (0x610) |
| 1005 | #define CB_TLBIALL (0x618) |
| 1006 | #define CB_TLBIVAL (0x620) |
| 1007 | #define CB_TLBIVAAL (0x628) |
| 1008 | #define CB_TLBSYNC (0x7F0) |
| 1009 | #define CB_TLBSTATUS (0x7F4) |
| 1010 | #define CB_ATS1PR (0x800) |
| 1011 | #define CB_ATS1PW (0x808) |
| 1012 | #define CB_ATS1UR (0x810) |
| 1013 | #define CB_ATS1UW (0x818) |
| 1014 | #define CB_ATSR (0x8F0) |
| 1015 | #define CB_PMXEVCNTR_N (0xE00) |
| 1016 | #define CB_PMXEVTYPER_N (0xE80) |
| 1017 | #define CB_PMCFGR (0xF00) |
| 1018 | #define CB_PMCR (0xF04) |
| 1019 | #define CB_PMCEID0 (0xF20) |
| 1020 | #define CB_PMCEID1 (0xF24) |
| 1021 | #define CB_PMCNTENSET (0xF40) |
| 1022 | #define CB_PMCNTENCLR (0xF44) |
| 1023 | #define CB_PMINTENSET (0xF48) |
| 1024 | #define CB_PMINTENCLR (0xF4C) |
| 1025 | #define CB_PMOVSCLR (0xF50) |
| 1026 | #define CB_PMOVSSET (0xF58) |
| 1027 | #define CB_PMAUTHSTATUS (0xFB8) |
| 1028 | |
| 1029 | /* Global Register Fields */ |
| 1030 | /* Configuration Register: CR0 */ |
| 1031 | #define CR0_NSCFG (CR0_NSCFG_MASK << CR0_NSCFG_SHIFT) |
| 1032 | #define CR0_WACFG (CR0_WACFG_MASK << CR0_WACFG_SHIFT) |
| 1033 | #define CR0_RACFG (CR0_RACFG_MASK << CR0_RACFG_SHIFT) |
| 1034 | #define CR0_SHCFG (CR0_SHCFG_MASK << CR0_SHCFG_SHIFT) |
| 1035 | #define CR0_SMCFCFG (CR0_SMCFCFG_MASK << CR0_SMCFCFG_SHIFT) |
| 1036 | #define CR0_MTCFG (CR0_MTCFG_MASK << CR0_MTCFG_SHIFT) |
| 1037 | #define CR0_MEMATTR (CR0_MEMATTR_MASK << CR0_MEMATTR_SHIFT) |
| 1038 | #define CR0_BSU (CR0_BSU_MASK << CR0_BSU_SHIFT) |
| 1039 | #define CR0_FB (CR0_FB_MASK << CR0_FB_SHIFT) |
| 1040 | #define CR0_PTM (CR0_PTM_MASK << CR0_PTM_SHIFT) |
| 1041 | #define CR0_VMIDPNE (CR0_VMIDPNE_MASK << CR0_VMIDPNE_SHIFT) |
| 1042 | #define CR0_USFCFG (CR0_USFCFG_MASK << CR0_USFCFG_SHIFT) |
| 1043 | #define CR0_GSE (CR0_GSE_MASK << CR0_GSE_SHIFT) |
| 1044 | #define CR0_STALLD (CR0_STALLD_MASK << CR0_STALLD_SHIFT) |
| 1045 | #define CR0_TRANSIENTCFG (CR0_TRANSIENTCFG_MASK << CR0_TRANSIENTCFG_SHIFT) |
| 1046 | #define CR0_GCFGFIE (CR0_GCFGFIE_MASK << CR0_GCFGFIE_SHIFT) |
| 1047 | #define CR0_GCFGFRE (CR0_GCFGFRE_MASK << CR0_GCFGFRE_SHIFT) |
| 1048 | #define CR0_GFIE (CR0_GFIE_MASK << CR0_GFIE_SHIFT) |
| 1049 | #define CR0_GFRE (CR0_GFRE_MASK << CR0_GFRE_SHIFT) |
| 1050 | #define CR0_CLIENTPD (CR0_CLIENTPD_MASK << CR0_CLIENTPD_SHIFT) |
| 1051 | |
| 1052 | /* Configuration Register: CR2 */ |
| 1053 | #define CR2_BPVMID (CR2_BPVMID_MASK << CR2_BPVMID_SHIFT) |
| 1054 | |
| 1055 | /* Global Address Translation, Stage 1, Privileged Read: GATS1PR */ |
| 1056 | #define GATS1PR_ADDR (GATS1PR_ADDR_MASK << GATS1PR_ADDR_SHIFT) |
| 1057 | #define GATS1PR_NDX (GATS1PR_NDX_MASK << GATS1PR_NDX_SHIFT) |
| 1058 | |
| 1059 | /* Global Address Translation, Stage 1, Privileged Write: GATS1PW */ |
| 1060 | #define GATS1PW_ADDR (GATS1PW_ADDR_MASK << GATS1PW_ADDR_SHIFT) |
| 1061 | #define GATS1PW_NDX (GATS1PW_NDX_MASK << GATS1PW_NDX_SHIFT) |
| 1062 | |
| 1063 | /* Global Address Translation, Stage 1, User Read: GATS1UR */ |
| 1064 | #define GATS1UR_ADDR (GATS1UR_ADDR_MASK << GATS1UR_ADDR_SHIFT) |
| 1065 | #define GATS1UR_NDX (GATS1UR_NDX_MASK << GATS1UR_NDX_SHIFT) |
| 1066 | |
| 1067 | /* Global Address Translation, Stage 1, User Write: GATS1UW */ |
| 1068 | #define GATS1UW_ADDR (GATS1UW_ADDR_MASK << GATS1UW_ADDR_SHIFT) |
| 1069 | #define GATS1UW_NDX (GATS1UW_NDX_MASK << GATS1UW_NDX_SHIFT) |
| 1070 | |
| 1071 | /* Global Address Translation, Stage 1 and 2, Privileged Read: GATS1PR */ |
| 1072 | #define GATS12PR_ADDR (GATS12PR_ADDR_MASK << GATS12PR_ADDR_SHIFT) |
| 1073 | #define GATS12PR_NDX (GATS12PR_NDX_MASK << GATS12PR_NDX_SHIFT) |
| 1074 | |
| 1075 | /* Global Address Translation, Stage 1 and 2, Privileged Write: GATS1PW */ |
| 1076 | #define GATS12PW_ADDR (GATS12PW_ADDR_MASK << GATS12PW_ADDR_SHIFT) |
| 1077 | #define GATS12PW_NDX (GATS12PW_NDX_MASK << GATS12PW_NDX_SHIFT) |
| 1078 | |
| 1079 | /* Global Address Translation, Stage 1 and 2, User Read: GATS1UR */ |
| 1080 | #define GATS12UR_ADDR (GATS12UR_ADDR_MASK << GATS12UR_ADDR_SHIFT) |
| 1081 | #define GATS12UR_NDX (GATS12UR_NDX_MASK << GATS12UR_NDX_SHIFT) |
| 1082 | |
| 1083 | /* Global Address Translation, Stage 1 and 2, User Write: GATS1UW */ |
| 1084 | #define GATS12UW_ADDR (GATS12UW_ADDR_MASK << GATS12UW_ADDR_SHIFT) |
| 1085 | #define GATS12UW_NDX (GATS12UW_NDX_MASK << GATS12UW_NDX_SHIFT) |
| 1086 | |
| 1087 | /* Global Address Translation Status Register: GATSR */ |
| 1088 | #define GATSR_ACTIVE (GATSR_ACTIVE_MASK << GATSR_ACTIVE_SHIFT) |
| 1089 | |
| 1090 | /* Global Fault Address Register: GFAR */ |
| 1091 | #define GFAR_FADDR (GFAR_FADDR_MASK << GFAR_FADDR_SHIFT) |
| 1092 | |
| 1093 | /* Global Fault Status Register: GFSR */ |
| 1094 | #define GFSR_ICF (GFSR_ICF_MASK << GFSR_ICF_SHIFT) |
| 1095 | #define GFSR_USF (GFSR_USF_MASK << GFSR_USF_SHIFT) |
| 1096 | #define GFSR_SMCF (GFSR_SMCF_MASK << GFSR_SMCF_SHIFT) |
| 1097 | #define GFSR_UCBF (GFSR_UCBF_MASK << GFSR_UCBF_SHIFT) |
| 1098 | #define GFSR_UCIF (GFSR_UCIF_MASK << GFSR_UCIF_SHIFT) |
| 1099 | #define GFSR_CAF (GFSR_CAF_MASK << GFSR_CAF_SHIFT) |
| 1100 | #define GFSR_EF (GFSR_EF_MASK << GFSR_EF_SHIFT) |
| 1101 | #define GFSR_PF (GFSR_PF_MASK << GFSR_PF_SHIFT) |
| 1102 | #define GFSR_MULTI (GFSR_MULTI_MASK << GFSR_MULTI_SHIFT) |
| 1103 | |
| 1104 | /* Global Fault Syndrome Register 0: GFSYNR0 */ |
| 1105 | #define GFSYNR0_NESTED (GFSYNR0_NESTED_MASK << GFSYNR0_NESTED_SHIFT) |
| 1106 | #define GFSYNR0_WNR (GFSYNR0_WNR_MASK << GFSYNR0_WNR_SHIFT) |
| 1107 | #define GFSYNR0_PNU (GFSYNR0_PNU_MASK << GFSYNR0_PNU_SHIFT) |
| 1108 | #define GFSYNR0_IND (GFSYNR0_IND_MASK << GFSYNR0_IND_SHIFT) |
| 1109 | #define GFSYNR0_NSSTATE (GFSYNR0_NSSTATE_MASK << GFSYNR0_NSSTATE_SHIFT) |
| 1110 | #define GFSYNR0_NSATTR (GFSYNR0_NSATTR_MASK << GFSYNR0_NSATTR_SHIFT) |
| 1111 | |
| 1112 | /* Global Fault Syndrome Register 1: GFSYNR1 */ |
| 1113 | #define GFSYNR1_SID (GFSYNR1_SID_MASK << GFSYNR1_SID_SHIFT) |
| 1114 | |
| 1115 | /* Global Physical Address Register: GPAR */ |
| 1116 | #define GPAR_F (GPAR_F_MASK << GPAR_F_SHIFT) |
| 1117 | #define GPAR_SS (GPAR_SS_MASK << GPAR_SS_SHIFT) |
| 1118 | #define GPAR_OUTER (GPAR_OUTER_MASK << GPAR_OUTER_SHIFT) |
| 1119 | #define GPAR_INNER (GPAR_INNER_MASK << GPAR_INNER_SHIFT) |
| 1120 | #define GPAR_SH (GPAR_SH_MASK << GPAR_SH_SHIFT) |
| 1121 | #define GPAR_NS (GPAR_NS_MASK << GPAR_NS_SHIFT) |
| 1122 | #define GPAR_NOS (GPAR_NOS_MASK << GPAR_NOS_SHIFT) |
| 1123 | #define GPAR_PA (GPAR_PA_MASK << GPAR_PA_SHIFT) |
| 1124 | #define GPAR_TF (GPAR_TF_MASK << GPAR_TF_SHIFT) |
| 1125 | #define GPAR_AFF (GPAR_AFF_MASK << GPAR_AFF_SHIFT) |
| 1126 | #define GPAR_PF (GPAR_PF_MASK << GPAR_PF_SHIFT) |
| 1127 | #define GPAR_EF (GPAR_EF_MASK << GPAR_EF_SHIFT) |
| 1128 | #define GPAR_TLCMCF (GPAR_TLBMCF_MASK << GPAR_TLCMCF_SHIFT) |
| 1129 | #define GPAR_TLBLKF (GPAR_TLBLKF_MASK << GPAR_TLBLKF_SHIFT) |
| 1130 | #define GPAR_UCBF (GPAR_UCBF_MASK << GFAR_UCBF_SHIFT) |
| 1131 | |
| 1132 | /* Identification Register: IDR0 */ |
| 1133 | #define IDR0_NUMSMRG (IDR0_NUMSMRG_MASK << IDR0_NUMSMGR_SHIFT) |
| 1134 | #define IDR0_NUMSIDB (IDR0_NUMSIDB_MASK << IDR0_NUMSIDB_SHIFT) |
| 1135 | #define IDR0_BTM (IDR0_BTM_MASK << IDR0_BTM_SHIFT) |
| 1136 | #define IDR0_CTTW (IDR0_CTTW_MASK << IDR0_CTTW_SHIFT) |
| 1137 | #define IDR0_NUMIRPT (IDR0_NUMIPRT_MASK << IDR0_NUMIRPT_SHIFT) |
| 1138 | #define IDR0_PTFS (IDR0_PTFS_MASK << IDR0_PTFS_SHIFT) |
| 1139 | #define IDR0_SMS (IDR0_SMS_MASK << IDR0_SMS_SHIFT) |
| 1140 | #define IDR0_NTS (IDR0_NTS_MASK << IDR0_NTS_SHIFT) |
| 1141 | #define IDR0_S2TS (IDR0_S2TS_MASK << IDR0_S2TS_SHIFT) |
| 1142 | #define IDR0_S1TS (IDR0_S1TS_MASK << IDR0_S1TS_SHIFT) |
| 1143 | #define IDR0_SES (IDR0_SES_MASK << IDR0_SES_SHIFT) |
| 1144 | |
| 1145 | /* Identification Register: IDR1 */ |
| 1146 | #define IDR1_NUMCB (IDR1_NUMCB_MASK << IDR1_NUMCB_SHIFT) |
| 1147 | #define IDR1_NUMSSDNDXB (IDR1_NUMSSDNDXB_MASK << IDR1_NUMSSDNDXB_SHIFT) |
| 1148 | #define IDR1_SSDTP (IDR1_SSDTP_MASK << IDR1_SSDTP_SHIFT) |
| 1149 | #define IDR1_SMCD (IDR1_SMCD_MASK << IDR1_SMCD_SHIFT) |
| 1150 | #define IDR1_NUMS2CB (IDR1_NUMS2CB_MASK << IDR1_NUMS2CB_SHIFT) |
| 1151 | #define IDR1_NUMPAGENDXB (IDR1_NUMPAGENDXB_MASK << IDR1_NUMPAGENDXB_SHIFT) |
| 1152 | #define IDR1_PAGESIZE (IDR1_PAGESIZE_MASK << IDR1_PAGESIZE_SHIFT) |
| 1153 | |
| 1154 | /* Identification Register: IDR2 */ |
| 1155 | #define IDR2_IAS (IDR2_IAS_MASK << IDR2_IAS_SHIFT) |
| 1156 | #define IDR1_OAS (IDR2_OAS_MASK << IDR2_OAS_SHIFT) |
| 1157 | |
| 1158 | /* Identification Register: IDR7 */ |
| 1159 | #define IDR7_MINOR (IDR7_MINOR_MASK << IDR7_MINOR_SHIFT) |
| 1160 | #define IDR7_MAJOR (IDR7_MAJOR_MASK << IDR7_MAJOR_SHIFT) |
| 1161 | |
| 1162 | /* Stream to Context Register: S2CR */ |
| 1163 | #define S2CR_CBNDX (S2CR_CBNDX_MASK << S2cR_CBNDX_SHIFT) |
| 1164 | #define S2CR_SHCFG (S2CR_SHCFG_MASK << s2CR_SHCFG_SHIFT) |
| 1165 | #define S2CR_MTCFG (S2CR_MTCFG_MASK << S2CR_MTCFG_SHIFT) |
| 1166 | #define S2CR_MEMATTR (S2CR_MEMATTR_MASK << S2CR_MEMATTR_SHIFT) |
| 1167 | #define S2CR_TYPE (S2CR_TYPE_MASK << S2CR_TYPE_SHIFT) |
| 1168 | #define S2CR_NSCFG (S2CR_NSCFG_MASK << S2CR_NSCFG_SHIFT) |
| 1169 | #define S2CR_RACFG (S2CR_RACFG_MASK << S2CR_RACFG_SHIFT) |
| 1170 | #define S2CR_WACFG (S2CR_WACFG_MASK << S2CR_WACFG_SHIFT) |
| 1171 | #define S2CR_PRIVCFG (S2CR_PRIVCFG_MASK << S2CR_PRIVCFG_SHIFT) |
| 1172 | #define S2CR_INSTCFG (S2CR_INSTCFG_MASK << S2CR_INSTCFG_SHIFT) |
| 1173 | #define S2CR_TRANSIENTCFG (S2CR_TRANSIENTCFG_MASK << S2CR_TRANSIENTCFG_SHIFT) |
| 1174 | #define S2CR_VMID (S2CR_VMID_MASK << S2CR_VMID_SHIFT) |
| 1175 | #define S2CR_BSU (S2CR_BSU_MASK << S2CR_BSU_SHIFT) |
| 1176 | #define S2CR_FB (S2CR_FB_MASK << S2CR_FB_SHIFT) |
| 1177 | |
| 1178 | /* Stream Match Register: SMR */ |
| 1179 | #define SMR_ID (SMR_ID_MASK << SMR_ID_SHIFT) |
| 1180 | #define SMR_MASK (SMR_MASK_MASK << SMR_MASK_SHIFT) |
| 1181 | #define SMR_VALID (SMR_VALID_MASK << SMR_VALID_SHIFT) |
| 1182 | |
| 1183 | /* Global TLB Status: TLBGSTATUS */ |
| 1184 | #define TLBGSTATUS_GSACTIVE (TLBGSTATUS_GSACTIVE_MASK << \ |
| 1185 | TLBGSTATUS_GSACTIVE_SHIFT) |
| 1186 | /* Invalidate Hyp TLB by VA: TLBIVAH */ |
| 1187 | #define TLBIVAH_ADDR (TLBIVAH_ADDR_MASK << TLBIVAH_ADDR_SHIFT) |
| 1188 | |
| 1189 | /* Invalidate TLB by VMID: TLBIVMID */ |
| 1190 | #define TLBIVMID_VMID (TLBIVMID_VMID_MASK << TLBIVMID_VMID_SHIFT) |
| 1191 | |
| 1192 | /* Context Bank Attribute Register: CBAR */ |
| 1193 | #define CBAR_VMID (CBAR_VMID_MASK << CBAR_VMID_SHIFT) |
| 1194 | #define CBAR_CBNDX (CBAR_CBNDX_MASK << CBAR_CBNDX_SHIFT) |
| 1195 | #define CBAR_BPSHCFG (CBAR_BPSHCFG_MASK << CBAR_BPSHCFG_SHIFT) |
| 1196 | #define CBAR_HYPC (CBAR_HYPC_MASK << CBAR_HYPC_SHIFT) |
| 1197 | #define CBAR_FB (CBAR_FB_MASK << CBAR_FB_SHIFT) |
| 1198 | #define CBAR_MEMATTR (CBAR_MEMATTR_MASK << CBAR_MEMATTR_SHIFT) |
| 1199 | #define CBAR_TYPE (CBAR_TYPE_MASK << CBAR_TYPE_SHIFT) |
| 1200 | #define CBAR_BSU (CBAR_BSU_MASK << CBAR_BSU_SHIFT) |
| 1201 | #define CBAR_RACFG (CBAR_RACFG_MASK << CBAR_RACFG_SHIFT) |
| 1202 | #define CBAR_WACFG (CBAR_WACFG_MASK << CBAR_WACFG_SHIFT) |
| 1203 | #define CBAR_IRPTNDX (CBAR_IRPTNDX_MASK << CBAR_IRPTNDX_SHIFT) |
| 1204 | |
| 1205 | /* Context Bank Fault Restricted Syndrome Register A: CBFRSYNRA */ |
| 1206 | #define CBFRSYNRA_SID (CBFRSYNRA_SID_MASK << CBFRSYNRA_SID_SHIFT) |
| 1207 | |
| 1208 | /* Performance Monitoring Register Fields */ |
| 1209 | |
| 1210 | /* Stage 1 Context Bank Format Fields */ |
| 1211 | /* Auxiliary Control Register: CB_ACTLR */ |
| 1212 | #define CB_ACTLR_REQPRIORITY \ |
| 1213 | (CB_ACTLR_REQPRIORITY_MASK << CB_ACTLR_REQPRIORITY_SHIFT) |
| 1214 | #define CB_ACTLR_REQPRIORITYCFG \ |
| 1215 | (CB_ACTLR_REQPRIORITYCFG_MASK << CB_ACTLR_REQPRIORITYCFG_SHIFT) |
| 1216 | #define CB_ACTLR_PRIVCFG (CB_ACTLR_PRIVCFG_MASK << CB_ACTLR_PRIVCFG_SHIFT) |
| 1217 | #define CB_ACTLR_BPRCOSH (CB_ACTLR_BPRCOSH_MASK << CB_ACTLR_BPRCOSH_SHIFT) |
| 1218 | #define CB_ACTLR_BPRCISH (CB_ACTLR_BPRCISH_MASK << CB_ACTLR_BPRCISH_SHIFT) |
| 1219 | #define CB_ACTLR_BPRCNSH (CB_ACTLR_BPRCNSH_MASK << CB_ACTLR_BPRCNSH_SHIFT) |
| 1220 | |
| 1221 | /* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */ |
| 1222 | #define CB_ATS1PR_ADDR (CB_ATS1PR_ADDR_MASK << CB_ATS1PR_ADDR_SHIFT) |
| 1223 | |
| 1224 | /* Address Translation, Stage 1, Privileged Write: CB_ATS1PW */ |
| 1225 | #define CB_ATS1PW_ADDR (CB_ATS1PW_ADDR_MASK << CB_ATS1PW_ADDR_SHIFT) |
| 1226 | |
| 1227 | /* Address Translation, Stage 1, User Read: CB_ATS1UR */ |
| 1228 | #define CB_ATS1UR_ADDR (CB_ATS1UR_ADDR_MASK << CB_ATS1UR_ADDR_SHIFT) |
| 1229 | |
| 1230 | /* Address Translation, Stage 1, User Write: CB_ATS1UW */ |
| 1231 | #define CB_ATS1UW_ADDR (CB_ATS1UW_ADDR_MASK << CB_ATS1UW_ADDR_SHIFT) |
| 1232 | |
| 1233 | /* Address Translation Status Register: CB_ATSR */ |
| 1234 | #define CB_ATSR_ACTIVE (CB_ATSR_ACTIVE_MASK << CB_ATSR_ACTIVE_SHIFT) |
| 1235 | |
| 1236 | /* Context ID Register: CB_CONTEXTIDR */ |
| 1237 | #define CB_CONTEXTIDR_ASID (CB_CONTEXTIDR_ASID_MASK << \ |
| 1238 | CB_CONTEXTIDR_ASID_SHIFT) |
| 1239 | #define CB_CONTEXTIDR_PROCID (CB_CONTEXTIDR_PROCID_MASK << \ |
| 1240 | CB_CONTEXTIDR_PROCID_SHIFT) |
| 1241 | |
| 1242 | /* Fault Address Register: CB_FAR */ |
| 1243 | #define CB_FAR_FADDR (CB_FAR_FADDR_MASK << CB_FAR_FADDR_SHIFT) |
| 1244 | |
| 1245 | /* Fault Status Register: CB_FSR */ |
| 1246 | #define CB_FSR_TF (CB_FSR_TF_MASK << CB_FSR_TF_SHIFT) |
| 1247 | #define CB_FSR_AFF (CB_FSR_AFF_MASK << CB_FSR_AFF_SHIFT) |
| 1248 | #define CB_FSR_PF (CB_FSR_PF_MASK << CB_FSR_PF_SHIFT) |
| 1249 | #define CB_FSR_EF (CB_FSR_EF_MASK << CB_FSR_EF_SHIFT) |
| 1250 | #define CB_FSR_TLBMCF (CB_FSR_TLBMCF_MASK << CB_FSR_TLBMCF_SHIFT) |
| 1251 | #define CB_FSR_TLBLKF (CB_FSR_TLBLKF_MASK << CB_FSR_TLBLKF_SHIFT) |
| 1252 | #define CB_FSR_SS (CB_FSR_SS_MASK << CB_FSR_SS_SHIFT) |
| 1253 | #define CB_FSR_MULTI (CB_FSR_MULTI_MASK << CB_FSR_MULTI_SHIFT) |
| 1254 | |
| 1255 | /* Fault Syndrome Register 0: CB_FSYNR0 */ |
| 1256 | #define CB_FSYNR0_PLVL (CB_FSYNR0_PLVL_MASK << CB_FSYNR0_PLVL_SHIFT) |
| 1257 | #define CB_FSYNR0_S1PTWF (CB_FSYNR0_S1PTWF_MASK << CB_FSYNR0_S1PTWF_SHIFT) |
| 1258 | #define CB_FSYNR0_WNR (CB_FSYNR0_WNR_MASK << CB_FSYNR0_WNR_SHIFT) |
| 1259 | #define CB_FSYNR0_PNU (CB_FSYNR0_PNU_MASK << CB_FSYNR0_PNU_SHIFT) |
| 1260 | #define CB_FSYNR0_IND (CB_FSYNR0_IND_MASK << CB_FSYNR0_IND_SHIFT) |
| 1261 | #define CB_FSYNR0_NSSTATE (CB_FSYNR0_NSSTATE_MASK << CB_FSYNR0_NSSTATE_SHIFT) |
| 1262 | #define CB_FSYNR0_NSATTR (CB_FSYNR0_NSATTR_MASK << CB_FSYNR0_NSATTR_SHIFT) |
| 1263 | #define CB_FSYNR0_ATOF (CB_FSYNR0_ATOF_MASK << CB_FSYNR0_ATOF_SHIFT) |
| 1264 | #define CB_FSYNR0_PTWF (CB_FSYNR0_PTWF_MASK << CB_FSYNR0_PTWF_SHIFT) |
| 1265 | #define CB_FSYNR0_AFR (CB_FSYNR0_AFR_MASK << CB_FSYNR0_AFR_SHIFT) |
| 1266 | #define CB_FSYNR0_S1CBNDX (CB_FSYNR0_S1CBNDX_MASK << CB_FSYNR0_S1CBNDX_SHIFT) |
| 1267 | |
| 1268 | /* Normal Memory Remap Register: CB_NMRR */ |
| 1269 | #define CB_NMRR_IR0 (CB_NMRR_IR0_MASK << CB_NMRR_IR0_SHIFT) |
| 1270 | #define CB_NMRR_IR1 (CB_NMRR_IR1_MASK << CB_NMRR_IR1_SHIFT) |
| 1271 | #define CB_NMRR_IR2 (CB_NMRR_IR2_MASK << CB_NMRR_IR2_SHIFT) |
| 1272 | #define CB_NMRR_IR3 (CB_NMRR_IR3_MASK << CB_NMRR_IR3_SHIFT) |
| 1273 | #define CB_NMRR_IR4 (CB_NMRR_IR4_MASK << CB_NMRR_IR4_SHIFT) |
| 1274 | #define CB_NMRR_IR5 (CB_NMRR_IR5_MASK << CB_NMRR_IR5_SHIFT) |
| 1275 | #define CB_NMRR_IR6 (CB_NMRR_IR6_MASK << CB_NMRR_IR6_SHIFT) |
| 1276 | #define CB_NMRR_IR7 (CB_NMRR_IR7_MASK << CB_NMRR_IR7_SHIFT) |
| 1277 | #define CB_NMRR_OR0 (CB_NMRR_OR0_MASK << CB_NMRR_OR0_SHIFT) |
| 1278 | #define CB_NMRR_OR1 (CB_NMRR_OR1_MASK << CB_NMRR_OR1_SHIFT) |
| 1279 | #define CB_NMRR_OR2 (CB_NMRR_OR2_MASK << CB_NMRR_OR2_SHIFT) |
| 1280 | #define CB_NMRR_OR3 (CB_NMRR_OR3_MASK << CB_NMRR_OR3_SHIFT) |
| 1281 | #define CB_NMRR_OR4 (CB_NMRR_OR4_MASK << CB_NMRR_OR4_SHIFT) |
| 1282 | #define CB_NMRR_OR5 (CB_NMRR_OR5_MASK << CB_NMRR_OR5_SHIFT) |
| 1283 | #define CB_NMRR_OR6 (CB_NMRR_OR6_MASK << CB_NMRR_OR6_SHIFT) |
| 1284 | #define CB_NMRR_OR7 (CB_NMRR_OR7_MASK << CB_NMRR_OR7_SHIFT) |
| 1285 | |
| 1286 | /* Physical Address Register: CB_PAR */ |
| 1287 | #define CB_PAR_F (CB_PAR_F_MASK << CB_PAR_F_SHIFT) |
| 1288 | #define CB_PAR_SS (CB_PAR_SS_MASK << CB_PAR_SS_SHIFT) |
| 1289 | #define CB_PAR_OUTER (CB_PAR_OUTER_MASK << CB_PAR_OUTER_SHIFT) |
| 1290 | #define CB_PAR_INNER (CB_PAR_INNER_MASK << CB_PAR_INNER_SHIFT) |
| 1291 | #define CB_PAR_SH (CB_PAR_SH_MASK << CB_PAR_SH_SHIFT) |
| 1292 | #define CB_PAR_NS (CB_PAR_NS_MASK << CB_PAR_NS_SHIFT) |
| 1293 | #define CB_PAR_NOS (CB_PAR_NOS_MASK << CB_PAR_NOS_SHIFT) |
| 1294 | #define CB_PAR_PA (CB_PAR_PA_MASK << CB_PAR_PA_SHIFT) |
| 1295 | #define CB_PAR_TF (CB_PAR_TF_MASK << CB_PAR_TF_SHIFT) |
| 1296 | #define CB_PAR_AFF (CB_PAR_AFF_MASK << CB_PAR_AFF_SHIFT) |
| 1297 | #define CB_PAR_PF (CB_PAR_PF_MASK << CB_PAR_PF_SHIFT) |
| 1298 | #define CB_PAR_TLBMCF (CB_PAR_TLBMCF_MASK << CB_PAR_TLBMCF_SHIFT) |
| 1299 | #define CB_PAR_TLBLKF (CB_PAR_TLBLKF_MASK << CB_PAR_TLBLKF_SHIFT) |
| 1300 | #define CB_PAR_ATOT (CB_PAR_ATOT_MASK << CB_PAR_ATOT_SHIFT) |
| 1301 | #define CB_PAR_PLVL (CB_PAR_PLVL_MASK << CB_PAR_PLVL_SHIFT) |
| 1302 | #define CB_PAR_STAGE (CB_PAR_STAGE_MASK << CB_PAR_STAGE_SHIFT) |
| 1303 | |
| 1304 | /* Primary Region Remap Register: CB_PRRR */ |
| 1305 | #define CB_PRRR_TR0 (CB_PRRR_TR0_MASK << CB_PRRR_TR0_SHIFT) |
| 1306 | #define CB_PRRR_TR1 (CB_PRRR_TR1_MASK << CB_PRRR_TR1_SHIFT) |
| 1307 | #define CB_PRRR_TR2 (CB_PRRR_TR2_MASK << CB_PRRR_TR2_SHIFT) |
| 1308 | #define CB_PRRR_TR3 (CB_PRRR_TR3_MASK << CB_PRRR_TR3_SHIFT) |
| 1309 | #define CB_PRRR_TR4 (CB_PRRR_TR4_MASK << CB_PRRR_TR4_SHIFT) |
| 1310 | #define CB_PRRR_TR5 (CB_PRRR_TR5_MASK << CB_PRRR_TR5_SHIFT) |
| 1311 | #define CB_PRRR_TR6 (CB_PRRR_TR6_MASK << CB_PRRR_TR6_SHIFT) |
| 1312 | #define CB_PRRR_TR7 (CB_PRRR_TR7_MASK << CB_PRRR_TR7_SHIFT) |
| 1313 | #define CB_PRRR_DS0 (CB_PRRR_DS0_MASK << CB_PRRR_DS0_SHIFT) |
| 1314 | #define CB_PRRR_DS1 (CB_PRRR_DS1_MASK << CB_PRRR_DS1_SHIFT) |
| 1315 | #define CB_PRRR_NS0 (CB_PRRR_NS0_MASK << CB_PRRR_NS0_SHIFT) |
| 1316 | #define CB_PRRR_NS1 (CB_PRRR_NS1_MASK << CB_PRRR_NS1_SHIFT) |
| 1317 | #define CB_PRRR_NOS0 (CB_PRRR_NOS0_MASK << CB_PRRR_NOS0_SHIFT) |
| 1318 | #define CB_PRRR_NOS1 (CB_PRRR_NOS1_MASK << CB_PRRR_NOS1_SHIFT) |
| 1319 | #define CB_PRRR_NOS2 (CB_PRRR_NOS2_MASK << CB_PRRR_NOS2_SHIFT) |
| 1320 | #define CB_PRRR_NOS3 (CB_PRRR_NOS3_MASK << CB_PRRR_NOS3_SHIFT) |
| 1321 | #define CB_PRRR_NOS4 (CB_PRRR_NOS4_MASK << CB_PRRR_NOS4_SHIFT) |
| 1322 | #define CB_PRRR_NOS5 (CB_PRRR_NOS5_MASK << CB_PRRR_NOS5_SHIFT) |
| 1323 | #define CB_PRRR_NOS6 (CB_PRRR_NOS6_MASK << CB_PRRR_NOS6_SHIFT) |
| 1324 | #define CB_PRRR_NOS7 (CB_PRRR_NOS7_MASK << CB_PRRR_NOS7_SHIFT) |
| 1325 | |
| 1326 | /* Transaction Resume: CB_RESUME */ |
| 1327 | #define CB_RESUME_TNR (CB_RESUME_TNR_MASK << CB_RESUME_TNR_SHIFT) |
| 1328 | |
| 1329 | /* System Control Register: CB_SCTLR */ |
| 1330 | #define CB_SCTLR_M (CB_SCTLR_M_MASK << CB_SCTLR_M_SHIFT) |
| 1331 | #define CB_SCTLR_TRE (CB_SCTLR_TRE_MASK << CB_SCTLR_TRE_SHIFT) |
| 1332 | #define CB_SCTLR_AFE (CB_SCTLR_AFE_MASK << CB_SCTLR_AFE_SHIFT) |
| 1333 | #define CB_SCTLR_AFFD (CB_SCTLR_AFFD_MASK << CB_SCTLR_AFFD_SHIFT) |
| 1334 | #define CB_SCTLR_E (CB_SCTLR_E_MASK << CB_SCTLR_E_SHIFT) |
| 1335 | #define CB_SCTLR_CFRE (CB_SCTLR_CFRE_MASK << CB_SCTLR_CFRE_SHIFT) |
| 1336 | #define CB_SCTLR_CFIE (CB_SCTLR_CFIE_MASK << CB_SCTLR_CFIE_SHIFT) |
| 1337 | #define CB_SCTLR_CFCFG (CB_SCTLR_CFCFG_MASK << CB_SCTLR_CFCFG_SHIFT) |
| 1338 | #define CB_SCTLR_HUPCF (CB_SCTLR_HUPCF_MASK << CB_SCTLR_HUPCF_SHIFT) |
| 1339 | #define CB_SCTLR_WXN (CB_SCTLR_WXN_MASK << CB_SCTLR_WXN_SHIFT) |
| 1340 | #define CB_SCTLR_UWXN (CB_SCTLR_UWXN_MASK << CB_SCTLR_UWXN_SHIFT) |
| 1341 | #define CB_SCTLR_ASIDPNE (CB_SCTLR_ASIDPNE_MASK << CB_SCTLR_ASIDPNE_SHIFT) |
| 1342 | #define CB_SCTLR_TRANSIENTCFG (CB_SCTLR_TRANSIENTCFG_MASK << \ |
| 1343 | CB_SCTLR_TRANSIENTCFG_SHIFT) |
| 1344 | #define CB_SCTLR_MEMATTR (CB_SCTLR_MEMATTR_MASK << CB_SCTLR_MEMATTR_SHIFT) |
| 1345 | #define CB_SCTLR_MTCFG (CB_SCTLR_MTCFG_MASK << CB_SCTLR_MTCFG_SHIFT) |
| 1346 | #define CB_SCTLR_SHCFG (CB_SCTLR_SHCFG_MASK << CB_SCTLR_SHCFG_SHIFT) |
| 1347 | #define CB_SCTLR_RACFG (CB_SCTLR_RACFG_MASK << CB_SCTLR_RACFG_SHIFT) |
| 1348 | #define CB_SCTLR_WACFG (CB_SCTLR_WACFG_MASK << CB_SCTLR_WACFG_SHIFT) |
| 1349 | #define CB_SCTLR_NSCFG (CB_SCTLR_NSCFG_MASK << CB_SCTLR_NSCFG_SHIFT) |
| 1350 | |
| 1351 | /* Invalidate TLB by ASID: CB_TLBIASID */ |
| 1352 | #define CB_TLBIASID_ASID (CB_TLBIASID_ASID_MASK << CB_TLBIASID_ASID_SHIFT) |
| 1353 | |
| 1354 | /* Invalidate TLB by VA: CB_TLBIVA */ |
| 1355 | #define CB_TLBIVA_ASID (CB_TLBIVA_ASID_MASK << CB_TLBIVA_ASID_SHIFT) |
| 1356 | #define CB_TLBIVA_VA (CB_TLBIVA_VA_MASK << CB_TLBIVA_VA_SHIFT) |
| 1357 | |
| 1358 | /* Invalidate TLB by VA, All ASID: CB_TLBIVAA */ |
| 1359 | #define CB_TLBIVAA_VA (CB_TLBIVAA_VA_MASK << CB_TLBIVAA_VA_SHIFT) |
| 1360 | |
| 1361 | /* Invalidate TLB by VA, All ASID, Last Level: CB_TLBIVAAL */ |
| 1362 | #define CB_TLBIVAAL_VA (CB_TLBIVAAL_VA_MASK << CB_TLBIVAAL_VA_SHIFT) |
| 1363 | |
| 1364 | /* Invalidate TLB by VA, Last Level: CB_TLBIVAL */ |
| 1365 | #define CB_TLBIVAL_ASID (CB_TLBIVAL_ASID_MASK << CB_TLBIVAL_ASID_SHIFT) |
| 1366 | #define CB_TLBIVAL_VA (CB_TLBIVAL_VA_MASK << CB_TLBIVAL_VA_SHIFT) |
| 1367 | |
| 1368 | /* TLB Status: CB_TLBSTATUS */ |
| 1369 | #define CB_TLBSTATUS_SACTIVE (CB_TLBSTATUS_SACTIVE_MASK << \ |
| 1370 | CB_TLBSTATUS_SACTIVE_SHIFT) |
| 1371 | |
| 1372 | /* Translation Table Base Control Register: CB_TTBCR */ |
| 1373 | #define CB_TTBCR_T0SZ (CB_TTBCR_T0SZ_MASK << CB_TTBCR_T0SZ_SHIFT) |
| 1374 | #define CB_TTBCR_PD0 (CB_TTBCR_PD0_MASK << CB_TTBCR_PD0_SHIFT) |
| 1375 | #define CB_TTBCR_PD1 (CB_TTBCR_PD1_MASK << CB_TTBCR_PD1_SHIFT) |
| 1376 | #define CB_TTBCR_NSCFG0 (CB_TTBCR_NSCFG0_MASK << CB_TTBCR_NSCFG0_SHIFT) |
| 1377 | #define CB_TTBCR_NSCFG1 (CB_TTBCR_NSCFG1_MASK << CB_TTBCR_NSCFG1_SHIFT) |
| 1378 | #define CB_TTBCR_EAE (CB_TTBCR_EAE_MASK << CB_TTBCR_EAE_SHIFT) |
| 1379 | |
| 1380 | /* Translation Table Base Register 0: CB_TTBR0 */ |
| 1381 | #define CB_TTBR0_IRGN1 (CB_TTBR0_IRGN1_MASK << CB_TTBR0_IRGN1_SHIFT) |
| 1382 | #define CB_TTBR0_S (CB_TTBR0_S_MASK << CB_TTBR0_S_SHIFT) |
| 1383 | #define CB_TTBR0_RGN (CB_TTBR0_RGN_MASK << CB_TTBR0_RGN_SHIFT) |
| 1384 | #define CB_TTBR0_NOS (CB_TTBR0_NOS_MASK << CB_TTBR0_NOS_SHIFT) |
| 1385 | #define CB_TTBR0_IRGN0 (CB_TTBR0_IRGN0_MASK << CB_TTBR0_IRGN0_SHIFT) |
| 1386 | #define CB_TTBR0_ADDR (CB_TTBR0_ADDR_MASK << CB_TTBR0_ADDR_SHIFT) |
| 1387 | |
| 1388 | /* Translation Table Base Register 1: CB_TTBR1 */ |
| 1389 | #define CB_TTBR1_IRGN1 (CB_TTBR1_IRGN1_MASK << CB_TTBR1_IRGN1_SHIFT) |
| 1390 | #define CB_TTBR1_S (CB_TTBR1_S_MASK << CB_TTBR1_S_SHIFT) |
| 1391 | #define CB_TTBR1_RGN (CB_TTBR1_RGN_MASK << CB_TTBR1_RGN_SHIFT) |
| 1392 | #define CB_TTBR1_NOS (CB_TTBR1_NOS_MASK << CB_TTBR1_NOS_SHIFT) |
| 1393 | #define CB_TTBR1_IRGN0 (CB_TTBR1_IRGN0_MASK << CB_TTBR1_IRGN0_SHIFT) |
| 1394 | #define CB_TTBR1_ADDR (CB_TTBR1_ADDR_MASK << CB_TTBR1_ADDR_SHIFT) |
| 1395 | |
| 1396 | /* Global Register Masks */ |
| 1397 | /* Configuration Register 0 */ |
| 1398 | #define CR0_NSCFG_MASK 0x03 |
| 1399 | #define CR0_WACFG_MASK 0x03 |
| 1400 | #define CR0_RACFG_MASK 0x03 |
| 1401 | #define CR0_SHCFG_MASK 0x03 |
| 1402 | #define CR0_SMCFCFG_MASK 0x01 |
| 1403 | #define CR0_MTCFG_MASK 0x01 |
| 1404 | #define CR0_MEMATTR_MASK 0x0F |
| 1405 | #define CR0_BSU_MASK 0x03 |
| 1406 | #define CR0_FB_MASK 0x01 |
| 1407 | #define CR0_PTM_MASK 0x01 |
| 1408 | #define CR0_VMIDPNE_MASK 0x01 |
| 1409 | #define CR0_USFCFG_MASK 0x01 |
| 1410 | #define CR0_GSE_MASK 0x01 |
| 1411 | #define CR0_STALLD_MASK 0x01 |
| 1412 | #define CR0_TRANSIENTCFG_MASK 0x03 |
| 1413 | #define CR0_GCFGFIE_MASK 0x01 |
| 1414 | #define CR0_GCFGFRE_MASK 0x01 |
| 1415 | #define CR0_GFIE_MASK 0x01 |
| 1416 | #define CR0_GFRE_MASK 0x01 |
| 1417 | #define CR0_CLIENTPD_MASK 0x01 |
| 1418 | |
| 1419 | /* Configuration Register 2 */ |
| 1420 | #define CR2_BPVMID_MASK 0xFF |
| 1421 | |
| 1422 | /* Global Address Translation, Stage 1, Privileged Read: GATS1PR */ |
| 1423 | #define GATS1PR_ADDR_MASK 0xFFFFF |
| 1424 | #define GATS1PR_NDX_MASK 0xFF |
| 1425 | |
| 1426 | /* Global Address Translation, Stage 1, Privileged Write: GATS1PW */ |
| 1427 | #define GATS1PW_ADDR_MASK 0xFFFFF |
| 1428 | #define GATS1PW_NDX_MASK 0xFF |
| 1429 | |
| 1430 | /* Global Address Translation, Stage 1, User Read: GATS1UR */ |
| 1431 | #define GATS1UR_ADDR_MASK 0xFFFFF |
| 1432 | #define GATS1UR_NDX_MASK 0xFF |
| 1433 | |
| 1434 | /* Global Address Translation, Stage 1, User Write: GATS1UW */ |
| 1435 | #define GATS1UW_ADDR_MASK 0xFFFFF |
| 1436 | #define GATS1UW_NDX_MASK 0xFF |
| 1437 | |
| 1438 | /* Global Address Translation, Stage 1 and 2, Privileged Read: GATS1PR */ |
| 1439 | #define GATS12PR_ADDR_MASK 0xFFFFF |
| 1440 | #define GATS12PR_NDX_MASK 0xFF |
| 1441 | |
| 1442 | /* Global Address Translation, Stage 1 and 2, Privileged Write: GATS1PW */ |
| 1443 | #define GATS12PW_ADDR_MASK 0xFFFFF |
| 1444 | #define GATS12PW_NDX_MASK 0xFF |
| 1445 | |
| 1446 | /* Global Address Translation, Stage 1 and 2, User Read: GATS1UR */ |
| 1447 | #define GATS12UR_ADDR_MASK 0xFFFFF |
| 1448 | #define GATS12UR_NDX_MASK 0xFF |
| 1449 | |
| 1450 | /* Global Address Translation, Stage 1 and 2, User Write: GATS1UW */ |
| 1451 | #define GATS12UW_ADDR_MASK 0xFFFFF |
| 1452 | #define GATS12UW_NDX_MASK 0xFF |
| 1453 | |
| 1454 | /* Global Address Translation Status Register: GATSR */ |
| 1455 | #define GATSR_ACTIVE_MASK 0x01 |
| 1456 | |
| 1457 | /* Global Fault Address Register: GFAR */ |
| 1458 | #define GFAR_FADDR_MASK 0xFFFFFFFF |
| 1459 | |
| 1460 | /* Global Fault Status Register: GFSR */ |
| 1461 | #define GFSR_ICF_MASK 0x01 |
| 1462 | #define GFSR_USF_MASK 0x01 |
| 1463 | #define GFSR_SMCF_MASK 0x01 |
| 1464 | #define GFSR_UCBF_MASK 0x01 |
| 1465 | #define GFSR_UCIF_MASK 0x01 |
| 1466 | #define GFSR_CAF_MASK 0x01 |
| 1467 | #define GFSR_EF_MASK 0x01 |
| 1468 | #define GFSR_PF_MASK 0x01 |
| 1469 | #define GFSR_MULTI_MASK 0x01 |
| 1470 | |
| 1471 | /* Global Fault Syndrome Register 0: GFSYNR0 */ |
| 1472 | #define GFSYNR0_NESTED_MASK 0x01 |
| 1473 | #define GFSYNR0_WNR_MASK 0x01 |
| 1474 | #define GFSYNR0_PNU_MASK 0x01 |
| 1475 | #define GFSYNR0_IND_MASK 0x01 |
| 1476 | #define GFSYNR0_NSSTATE_MASK 0x01 |
| 1477 | #define GFSYNR0_NSATTR_MASK 0x01 |
| 1478 | |
| 1479 | /* Global Fault Syndrome Register 1: GFSYNR1 */ |
| 1480 | #define GFSYNR1_SID_MASK 0x7FFF |
| 1481 | #define GFSYNr1_SSD_IDX_MASK 0x7FFF |
| 1482 | |
| 1483 | /* Global Physical Address Register: GPAR */ |
| 1484 | #define GPAR_F_MASK 0x01 |
| 1485 | #define GPAR_SS_MASK 0x01 |
| 1486 | #define GPAR_OUTER_MASK 0x03 |
| 1487 | #define GPAR_INNER_MASK 0x03 |
| 1488 | #define GPAR_SH_MASK 0x01 |
| 1489 | #define GPAR_NS_MASK 0x01 |
| 1490 | #define GPAR_NOS_MASK 0x01 |
| 1491 | #define GPAR_PA_MASK 0xFFFFF |
| 1492 | #define GPAR_TF_MASK 0x01 |
| 1493 | #define GPAR_AFF_MASK 0x01 |
| 1494 | #define GPAR_PF_MASK 0x01 |
| 1495 | #define GPAR_EF_MASK 0x01 |
| 1496 | #define GPAR_TLBMCF_MASK 0x01 |
| 1497 | #define GPAR_TLBLKF_MASK 0x01 |
| 1498 | #define GPAR_UCBF_MASK 0x01 |
| 1499 | |
| 1500 | /* Identification Register: IDR0 */ |
| 1501 | #define IDR0_NUMSMRG_MASK 0xFF |
| 1502 | #define IDR0_NUMSIDB_MASK 0x0F |
| 1503 | #define IDR0_BTM_MASK 0x01 |
| 1504 | #define IDR0_CTTW_MASK 0x01 |
| 1505 | #define IDR0_NUMIPRT_MASK 0xFF |
| 1506 | #define IDR0_PTFS_MASK 0x01 |
| 1507 | #define IDR0_SMS_MASK 0x01 |
| 1508 | #define IDR0_NTS_MASK 0x01 |
| 1509 | #define IDR0_S2TS_MASK 0x01 |
| 1510 | #define IDR0_S1TS_MASK 0x01 |
| 1511 | #define IDR0_SES_MASK 0x01 |
| 1512 | |
| 1513 | /* Identification Register: IDR1 */ |
| 1514 | #define IDR1_NUMCB_MASK 0xFF |
| 1515 | #define IDR1_NUMSSDNDXB_MASK 0x0F |
| 1516 | #define IDR1_SSDTP_MASK 0x01 |
| 1517 | #define IDR1_SMCD_MASK 0x01 |
| 1518 | #define IDR1_NUMS2CB_MASK 0xFF |
| 1519 | #define IDR1_NUMPAGENDXB_MASK 0x07 |
| 1520 | #define IDR1_PAGESIZE_MASK 0x01 |
| 1521 | |
| 1522 | /* Identification Register: IDR2 */ |
| 1523 | #define IDR2_IAS_MASK 0x0F |
| 1524 | #define IDR2_OAS_MASK 0x0F |
| 1525 | |
| 1526 | /* Identification Register: IDR7 */ |
| 1527 | #define IDR7_MINOR_MASK 0x0F |
| 1528 | #define IDR7_MAJOR_MASK 0x0F |
| 1529 | |
| 1530 | /* Stream to Context Register: S2CR */ |
| 1531 | #define S2CR_CBNDX_MASK 0xFF |
| 1532 | #define S2CR_SHCFG_MASK 0x03 |
| 1533 | #define S2CR_MTCFG_MASK 0x01 |
| 1534 | #define S2CR_MEMATTR_MASK 0x0F |
| 1535 | #define S2CR_TYPE_MASK 0x03 |
| 1536 | #define S2CR_NSCFG_MASK 0x03 |
| 1537 | #define S2CR_RACFG_MASK 0x03 |
| 1538 | #define S2CR_WACFG_MASK 0x03 |
| 1539 | #define S2CR_PRIVCFG_MASK 0x03 |
| 1540 | #define S2CR_INSTCFG_MASK 0x03 |
| 1541 | #define S2CR_TRANSIENTCFG_MASK 0x03 |
| 1542 | #define S2CR_VMID_MASK 0xFF |
| 1543 | #define S2CR_BSU_MASK 0x03 |
| 1544 | #define S2CR_FB_MASK 0x01 |
| 1545 | |
| 1546 | /* Stream Match Register: SMR */ |
| 1547 | #define SMR_ID_MASK 0x7FFF |
| 1548 | #define SMR_MASK_MASK 0x7FFF |
| 1549 | #define SMR_VALID_MASK 0x01 |
| 1550 | |
| 1551 | /* Global TLB Status: TLBGSTATUS */ |
| 1552 | #define TLBGSTATUS_GSACTIVE_MASK 0x01 |
| 1553 | |
| 1554 | /* Invalidate Hyp TLB by VA: TLBIVAH */ |
| 1555 | #define TLBIVAH_ADDR_MASK 0xFFFFF |
| 1556 | |
| 1557 | /* Invalidate TLB by VMID: TLBIVMID */ |
| 1558 | #define TLBIVMID_VMID_MASK 0xFF |
| 1559 | |
| 1560 | /* Global Register Space 1 Mask */ |
| 1561 | /* Context Bank Attribute Register: CBAR */ |
| 1562 | #define CBAR_VMID_MASK 0xFF |
| 1563 | #define CBAR_CBNDX_MASK 0x03 |
| 1564 | #define CBAR_BPSHCFG_MASK 0x03 |
| 1565 | #define CBAR_HYPC_MASK 0x01 |
| 1566 | #define CBAR_FB_MASK 0x01 |
| 1567 | #define CBAR_MEMATTR_MASK 0x0F |
| 1568 | #define CBAR_TYPE_MASK 0x03 |
| 1569 | #define CBAR_BSU_MASK 0x03 |
| 1570 | #define CBAR_RACFG_MASK 0x03 |
| 1571 | #define CBAR_WACFG_MASK 0x03 |
| 1572 | #define CBAR_IRPTNDX_MASK 0xFF |
| 1573 | |
| 1574 | /* Context Bank Fault Restricted Syndrome Register A: CBFRSYNRA */ |
| 1575 | #define CBFRSYNRA_SID_MASK 0x7FFF |
| 1576 | |
| Olav Haugan | cd93219 | 2013-01-31 18:30:15 -0800 | [diff] [blame] | 1577 | /* Implementation defined register space masks */ |
| 1578 | #define MICRO_MMU_CTRL_HALT_REQ_MASK 0x01 |
| 1579 | #define MICRO_MMU_CTRL_IDLE_MASK 0x01 |
| 1580 | |
| Sathish Ambley | d1b89ed | 2012-02-07 21:47:47 -0800 | [diff] [blame] | 1581 | /* Stage 1 Context Bank Format Masks */ |
| 1582 | /* Auxiliary Control Register: CB_ACTLR */ |
| 1583 | #define CB_ACTLR_REQPRIORITY_MASK 0x3 |
| 1584 | #define CB_ACTLR_REQPRIORITYCFG_MASK 0x1 |
| 1585 | #define CB_ACTLR_PRIVCFG_MASK 0x3 |
| 1586 | #define CB_ACTLR_BPRCOSH_MASK 0x1 |
| 1587 | #define CB_ACTLR_BPRCISH_MASK 0x1 |
| 1588 | #define CB_ACTLR_BPRCNSH_MASK 0x1 |
| 1589 | |
| 1590 | /* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */ |
| 1591 | #define CB_ATS1PR_ADDR_MASK 0xFFFFF |
| 1592 | |
| 1593 | /* Address Translation, Stage 1, Privileged Write: CB_ATS1PW */ |
| 1594 | #define CB_ATS1PW_ADDR_MASK 0xFFFFF |
| 1595 | |
| 1596 | /* Address Translation, Stage 1, User Read: CB_ATS1UR */ |
| 1597 | #define CB_ATS1UR_ADDR_MASK 0xFFFFF |
| 1598 | |
| 1599 | /* Address Translation, Stage 1, User Write: CB_ATS1UW */ |
| 1600 | #define CB_ATS1UW_ADDR_MASK 0xFFFFF |
| 1601 | |
| 1602 | /* Address Translation Status Register: CB_ATSR */ |
| 1603 | #define CB_ATSR_ACTIVE_MASK 0x01 |
| 1604 | |
| 1605 | /* Context ID Register: CB_CONTEXTIDR */ |
| 1606 | #define CB_CONTEXTIDR_ASID_MASK 0xFF |
| 1607 | #define CB_CONTEXTIDR_PROCID_MASK 0xFFFFFF |
| 1608 | |
| 1609 | /* Fault Address Register: CB_FAR */ |
| 1610 | #define CB_FAR_FADDR_MASK 0xFFFFFFFF |
| 1611 | |
| 1612 | /* Fault Status Register: CB_FSR */ |
| 1613 | #define CB_FSR_TF_MASK 0x01 |
| 1614 | #define CB_FSR_AFF_MASK 0x01 |
| 1615 | #define CB_FSR_PF_MASK 0x01 |
| 1616 | #define CB_FSR_EF_MASK 0x01 |
| 1617 | #define CB_FSR_TLBMCF_MASK 0x01 |
| 1618 | #define CB_FSR_TLBLKF_MASK 0x01 |
| 1619 | #define CB_FSR_SS_MASK 0x01 |
| 1620 | #define CB_FSR_MULTI_MASK 0x01 |
| 1621 | |
| 1622 | /* Fault Syndrome Register 0: CB_FSYNR0 */ |
| 1623 | #define CB_FSYNR0_PLVL_MASK 0x03 |
| 1624 | #define CB_FSYNR0_S1PTWF_MASK 0x01 |
| 1625 | #define CB_FSYNR0_WNR_MASK 0x01 |
| 1626 | #define CB_FSYNR0_PNU_MASK 0x01 |
| 1627 | #define CB_FSYNR0_IND_MASK 0x01 |
| 1628 | #define CB_FSYNR0_NSSTATE_MASK 0x01 |
| 1629 | #define CB_FSYNR0_NSATTR_MASK 0x01 |
| 1630 | #define CB_FSYNR0_ATOF_MASK 0x01 |
| 1631 | #define CB_FSYNR0_PTWF_MASK 0x01 |
| 1632 | #define CB_FSYNR0_AFR_MASK 0x01 |
| 1633 | #define CB_FSYNR0_S1CBNDX_MASK 0xFF |
| 1634 | |
| 1635 | /* Normal Memory Remap Register: CB_NMRR */ |
| 1636 | #define CB_NMRR_IR0_MASK 0x03 |
| 1637 | #define CB_NMRR_IR1_MASK 0x03 |
| 1638 | #define CB_NMRR_IR2_MASK 0x03 |
| 1639 | #define CB_NMRR_IR3_MASK 0x03 |
| 1640 | #define CB_NMRR_IR4_MASK 0x03 |
| 1641 | #define CB_NMRR_IR5_MASK 0x03 |
| 1642 | #define CB_NMRR_IR6_MASK 0x03 |
| 1643 | #define CB_NMRR_IR7_MASK 0x03 |
| 1644 | #define CB_NMRR_OR0_MASK 0x03 |
| 1645 | #define CB_NMRR_OR1_MASK 0x03 |
| 1646 | #define CB_NMRR_OR2_MASK 0x03 |
| 1647 | #define CB_NMRR_OR3_MASK 0x03 |
| 1648 | #define CB_NMRR_OR4_MASK 0x03 |
| 1649 | #define CB_NMRR_OR5_MASK 0x03 |
| 1650 | #define CB_NMRR_OR6_MASK 0x03 |
| 1651 | #define CB_NMRR_OR7_MASK 0x03 |
| 1652 | |
| 1653 | /* Physical Address Register: CB_PAR */ |
| 1654 | #define CB_PAR_F_MASK 0x01 |
| 1655 | #define CB_PAR_SS_MASK 0x01 |
| 1656 | #define CB_PAR_OUTER_MASK 0x03 |
| 1657 | #define CB_PAR_INNER_MASK 0x07 |
| 1658 | #define CB_PAR_SH_MASK 0x01 |
| 1659 | #define CB_PAR_NS_MASK 0x01 |
| 1660 | #define CB_PAR_NOS_MASK 0x01 |
| 1661 | #define CB_PAR_PA_MASK 0xFFFFF |
| 1662 | #define CB_PAR_TF_MASK 0x01 |
| 1663 | #define CB_PAR_AFF_MASK 0x01 |
| 1664 | #define CB_PAR_PF_MASK 0x01 |
| 1665 | #define CB_PAR_TLBMCF_MASK 0x01 |
| 1666 | #define CB_PAR_TLBLKF_MASK 0x01 |
| 1667 | #define CB_PAR_ATOT_MASK 0x01 |
| 1668 | #define CB_PAR_PLVL_MASK 0x03 |
| 1669 | #define CB_PAR_STAGE_MASK 0x01 |
| 1670 | |
| 1671 | /* Primary Region Remap Register: CB_PRRR */ |
| 1672 | #define CB_PRRR_TR0_MASK 0x03 |
| 1673 | #define CB_PRRR_TR1_MASK 0x03 |
| 1674 | #define CB_PRRR_TR2_MASK 0x03 |
| 1675 | #define CB_PRRR_TR3_MASK 0x03 |
| 1676 | #define CB_PRRR_TR4_MASK 0x03 |
| 1677 | #define CB_PRRR_TR5_MASK 0x03 |
| 1678 | #define CB_PRRR_TR6_MASK 0x03 |
| 1679 | #define CB_PRRR_TR7_MASK 0x03 |
| 1680 | #define CB_PRRR_DS0_MASK 0x01 |
| 1681 | #define CB_PRRR_DS1_MASK 0x01 |
| 1682 | #define CB_PRRR_NS0_MASK 0x01 |
| 1683 | #define CB_PRRR_NS1_MASK 0x01 |
| 1684 | #define CB_PRRR_NOS0_MASK 0x01 |
| 1685 | #define CB_PRRR_NOS1_MASK 0x01 |
| 1686 | #define CB_PRRR_NOS2_MASK 0x01 |
| 1687 | #define CB_PRRR_NOS3_MASK 0x01 |
| 1688 | #define CB_PRRR_NOS4_MASK 0x01 |
| 1689 | #define CB_PRRR_NOS5_MASK 0x01 |
| 1690 | #define CB_PRRR_NOS6_MASK 0x01 |
| 1691 | #define CB_PRRR_NOS7_MASK 0x01 |
| 1692 | |
| 1693 | /* Transaction Resume: CB_RESUME */ |
| 1694 | #define CB_RESUME_TNR_MASK 0x01 |
| 1695 | |
| 1696 | /* System Control Register: CB_SCTLR */ |
| 1697 | #define CB_SCTLR_M_MASK 0x01 |
| 1698 | #define CB_SCTLR_TRE_MASK 0x01 |
| 1699 | #define CB_SCTLR_AFE_MASK 0x01 |
| 1700 | #define CB_SCTLR_AFFD_MASK 0x01 |
| 1701 | #define CB_SCTLR_E_MASK 0x01 |
| 1702 | #define CB_SCTLR_CFRE_MASK 0x01 |
| 1703 | #define CB_SCTLR_CFIE_MASK 0x01 |
| 1704 | #define CB_SCTLR_CFCFG_MASK 0x01 |
| 1705 | #define CB_SCTLR_HUPCF_MASK 0x01 |
| 1706 | #define CB_SCTLR_WXN_MASK 0x01 |
| 1707 | #define CB_SCTLR_UWXN_MASK 0x01 |
| 1708 | #define CB_SCTLR_ASIDPNE_MASK 0x01 |
| 1709 | #define CB_SCTLR_TRANSIENTCFG_MASK 0x03 |
| 1710 | #define CB_SCTLR_MEMATTR_MASK 0x0F |
| 1711 | #define CB_SCTLR_MTCFG_MASK 0x01 |
| 1712 | #define CB_SCTLR_SHCFG_MASK 0x03 |
| 1713 | #define CB_SCTLR_RACFG_MASK 0x03 |
| 1714 | #define CB_SCTLR_WACFG_MASK 0x03 |
| 1715 | #define CB_SCTLR_NSCFG_MASK 0x03 |
| 1716 | |
| 1717 | /* Invalidate TLB by ASID: CB_TLBIASID */ |
| 1718 | #define CB_TLBIASID_ASID_MASK 0xFF |
| 1719 | |
| 1720 | /* Invalidate TLB by VA: CB_TLBIVA */ |
| 1721 | #define CB_TLBIVA_ASID_MASK 0xFF |
| 1722 | #define CB_TLBIVA_VA_MASK 0xFFFFF |
| 1723 | |
| 1724 | /* Invalidate TLB by VA, All ASID: CB_TLBIVAA */ |
| 1725 | #define CB_TLBIVAA_VA_MASK 0xFFFFF |
| 1726 | |
| 1727 | /* Invalidate TLB by VA, All ASID, Last Level: CB_TLBIVAAL */ |
| 1728 | #define CB_TLBIVAAL_VA_MASK 0xFFFFF |
| 1729 | |
| 1730 | /* Invalidate TLB by VA, Last Level: CB_TLBIVAL */ |
| 1731 | #define CB_TLBIVAL_ASID_MASK 0xFF |
| 1732 | #define CB_TLBIVAL_VA_MASK 0xFFFFF |
| 1733 | |
| 1734 | /* TLB Status: CB_TLBSTATUS */ |
| 1735 | #define CB_TLBSTATUS_SACTIVE_MASK 0x01 |
| 1736 | |
| 1737 | /* Translation Table Base Control Register: CB_TTBCR */ |
| 1738 | #define CB_TTBCR_T0SZ_MASK 0x07 |
| 1739 | #define CB_TTBCR_PD0_MASK 0x01 |
| 1740 | #define CB_TTBCR_PD1_MASK 0x01 |
| 1741 | #define CB_TTBCR_NSCFG0_MASK 0x01 |
| 1742 | #define CB_TTBCR_NSCFG1_MASK 0x01 |
| 1743 | #define CB_TTBCR_EAE_MASK 0x01 |
| 1744 | |
| 1745 | /* Translation Table Base Register 0/1: CB_TTBR */ |
| 1746 | #define CB_TTBR0_IRGN1_MASK 0x01 |
| 1747 | #define CB_TTBR0_S_MASK 0x01 |
| 1748 | #define CB_TTBR0_RGN_MASK 0x01 |
| 1749 | #define CB_TTBR0_NOS_MASK 0x01 |
| 1750 | #define CB_TTBR0_IRGN0_MASK 0x01 |
| 1751 | #define CB_TTBR0_ADDR_MASK 0xFFFFFF |
| 1752 | |
| 1753 | #define CB_TTBR1_IRGN1_MASK 0x1 |
| 1754 | #define CB_TTBR1_S_MASK 0x1 |
| 1755 | #define CB_TTBR1_RGN_MASK 0x1 |
| 1756 | #define CB_TTBR1_NOS_MASK 0X1 |
| 1757 | #define CB_TTBR1_IRGN0_MASK 0X1 |
| 1758 | #define CB_TTBR1_ADDR_MASK 0xFFFFFF |
| 1759 | |
| 1760 | /* Global Register Shifts */ |
| 1761 | /* Configuration Register: CR0 */ |
| 1762 | #define CR0_NSCFG_SHIFT 28 |
| 1763 | #define CR0_WACFG_SHIFT 26 |
| 1764 | #define CR0_RACFG_SHIFT 24 |
| 1765 | #define CR0_SHCFG_SHIFT 22 |
| 1766 | #define CR0_SMCFCFG_SHIFT 21 |
| 1767 | #define CR0_MTCFG_SHIFT 20 |
| 1768 | #define CR0_MEMATTR_SHIFT 16 |
| 1769 | #define CR0_BSU_SHIFT 14 |
| 1770 | #define CR0_FB_SHIFT 13 |
| 1771 | #define CR0_PTM_SHIFT 12 |
| 1772 | #define CR0_VMIDPNE_SHIFT 11 |
| 1773 | #define CR0_USFCFG_SHIFT 10 |
| 1774 | #define CR0_GSE_SHIFT 9 |
| 1775 | #define CR0_STALLD_SHIFT 8 |
| 1776 | #define CR0_TRANSIENTCFG_SHIFT 6 |
| 1777 | #define CR0_GCFGFIE_SHIFT 5 |
| 1778 | #define CR0_GCFGFRE_SHIFT 4 |
| 1779 | #define CR0_GFIE_SHIFT 2 |
| 1780 | #define CR0_GFRE_SHIFT 1 |
| 1781 | #define CR0_CLIENTPD_SHIFT 0 |
| 1782 | |
| 1783 | /* Configuration Register: CR2 */ |
| 1784 | #define CR2_BPVMID_SHIFT 0 |
| 1785 | |
| 1786 | /* Global Address Translation, Stage 1, Privileged Read: GATS1PR */ |
| 1787 | #define GATS1PR_ADDR_SHIFT 12 |
| 1788 | #define GATS1PR_NDX_SHIFT 0 |
| 1789 | |
| 1790 | /* Global Address Translation, Stage 1, Privileged Write: GATS1PW */ |
| 1791 | #define GATS1PW_ADDR_SHIFT 12 |
| 1792 | #define GATS1PW_NDX_SHIFT 0 |
| 1793 | |
| 1794 | /* Global Address Translation, Stage 1, User Read: GATS1UR */ |
| 1795 | #define GATS1UR_ADDR_SHIFT 12 |
| 1796 | #define GATS1UR_NDX_SHIFT 0 |
| 1797 | |
| 1798 | /* Global Address Translation, Stage 1, User Write: GATS1UW */ |
| 1799 | #define GATS1UW_ADDR_SHIFT 12 |
| 1800 | #define GATS1UW_NDX_SHIFT 0 |
| 1801 | |
| 1802 | /* Global Address Translation, Stage 1 and 2, Privileged Read: GATS12PR */ |
| 1803 | #define GATS12PR_ADDR_SHIFT 12 |
| 1804 | #define GATS12PR_NDX_SHIFT 0 |
| 1805 | |
| 1806 | /* Global Address Translation, Stage 1 and 2, Privileged Write: GATS12PW */ |
| 1807 | #define GATS12PW_ADDR_SHIFT 12 |
| 1808 | #define GATS12PW_NDX_SHIFT 0 |
| 1809 | |
| 1810 | /* Global Address Translation, Stage 1 and 2, User Read: GATS12UR */ |
| 1811 | #define GATS12UR_ADDR_SHIFT 12 |
| 1812 | #define GATS12UR_NDX_SHIFT 0 |
| 1813 | |
| 1814 | /* Global Address Translation, Stage 1 and 2, User Write: GATS12UW */ |
| 1815 | #define GATS12UW_ADDR_SHIFT 12 |
| 1816 | #define GATS12UW_NDX_SHIFT 0 |
| 1817 | |
| 1818 | /* Global Address Translation Status Register: GATSR */ |
| 1819 | #define GATSR_ACTIVE_SHIFT 0 |
| 1820 | |
| 1821 | /* Global Fault Address Register: GFAR */ |
| 1822 | #define GFAR_FADDR_SHIFT 0 |
| 1823 | |
| 1824 | /* Global Fault Status Register: GFSR */ |
| 1825 | #define GFSR_ICF_SHIFT 0 |
| 1826 | #define GFSR_USF_SHIFT 1 |
| 1827 | #define GFSR_SMCF_SHIFT 2 |
| 1828 | #define GFSR_UCBF_SHIFT 3 |
| 1829 | #define GFSR_UCIF_SHIFT 4 |
| 1830 | #define GFSR_CAF_SHIFT 5 |
| 1831 | #define GFSR_EF_SHIFT 6 |
| 1832 | #define GFSR_PF_SHIFT 7 |
| 1833 | #define GFSR_MULTI_SHIFT 31 |
| 1834 | |
| 1835 | /* Global Fault Syndrome Register 0: GFSYNR0 */ |
| 1836 | #define GFSYNR0_NESTED_SHIFT 0 |
| 1837 | #define GFSYNR0_WNR_SHIFT 1 |
| 1838 | #define GFSYNR0_PNU_SHIFT 2 |
| 1839 | #define GFSYNR0_IND_SHIFT 3 |
| 1840 | #define GFSYNR0_NSSTATE_SHIFT 4 |
| 1841 | #define GFSYNR0_NSATTR_SHIFT 5 |
| 1842 | |
| 1843 | /* Global Fault Syndrome Register 1: GFSYNR1 */ |
| 1844 | #define GFSYNR1_SID_SHIFT 0 |
| 1845 | |
| 1846 | /* Global Physical Address Register: GPAR */ |
| 1847 | #define GPAR_F_SHIFT 0 |
| 1848 | #define GPAR_SS_SHIFT 1 |
| 1849 | #define GPAR_OUTER_SHIFT 2 |
| 1850 | #define GPAR_INNER_SHIFT 4 |
| 1851 | #define GPAR_SH_SHIFT 7 |
| 1852 | #define GPAR_NS_SHIFT 9 |
| 1853 | #define GPAR_NOS_SHIFT 10 |
| 1854 | #define GPAR_PA_SHIFT 12 |
| 1855 | #define GPAR_TF_SHIFT 1 |
| 1856 | #define GPAR_AFF_SHIFT 2 |
| 1857 | #define GPAR_PF_SHIFT 3 |
| 1858 | #define GPAR_EF_SHIFT 4 |
| 1859 | #define GPAR_TLCMCF_SHIFT 5 |
| 1860 | #define GPAR_TLBLKF_SHIFT 6 |
| 1861 | #define GFAR_UCBF_SHIFT 30 |
| 1862 | |
| 1863 | /* Identification Register: IDR0 */ |
| 1864 | #define IDR0_NUMSMRG_SHIFT 0 |
| 1865 | #define IDR0_NUMSIDB_SHIFT 9 |
| 1866 | #define IDR0_BTM_SHIFT 13 |
| 1867 | #define IDR0_CTTW_SHIFT 14 |
| 1868 | #define IDR0_NUMIRPT_SHIFT 16 |
| 1869 | #define IDR0_PTFS_SHIFT 24 |
| 1870 | #define IDR0_SMS_SHIFT 27 |
| 1871 | #define IDR0_NTS_SHIFT 28 |
| 1872 | #define IDR0_S2TS_SHIFT 29 |
| 1873 | #define IDR0_S1TS_SHIFT 30 |
| 1874 | #define IDR0_SES_SHIFT 31 |
| 1875 | |
| 1876 | /* Identification Register: IDR1 */ |
| 1877 | #define IDR1_NUMCB_SHIFT 0 |
| 1878 | #define IDR1_NUMSSDNDXB_SHIFT 8 |
| 1879 | #define IDR1_SSDTP_SHIFT 12 |
| 1880 | #define IDR1_SMCD_SHIFT 15 |
| 1881 | #define IDR1_NUMS2CB_SHIFT 16 |
| 1882 | #define IDR1_NUMPAGENDXB_SHIFT 28 |
| 1883 | #define IDR1_PAGESIZE_SHIFT 31 |
| 1884 | |
| 1885 | /* Identification Register: IDR2 */ |
| 1886 | #define IDR2_IAS_SHIFT 0 |
| 1887 | #define IDR2_OAS_SHIFT 4 |
| 1888 | |
| 1889 | /* Identification Register: IDR7 */ |
| 1890 | #define IDR7_MINOR_SHIFT 0 |
| 1891 | #define IDR7_MAJOR_SHIFT 4 |
| 1892 | |
| 1893 | /* Stream to Context Register: S2CR */ |
| 1894 | #define S2CR_CBNDX_SHIFT 0 |
| 1895 | #define s2CR_SHCFG_SHIFT 8 |
| 1896 | #define S2CR_MTCFG_SHIFT 11 |
| 1897 | #define S2CR_MEMATTR_SHIFT 12 |
| 1898 | #define S2CR_TYPE_SHIFT 16 |
| 1899 | #define S2CR_NSCFG_SHIFT 18 |
| 1900 | #define S2CR_RACFG_SHIFT 20 |
| 1901 | #define S2CR_WACFG_SHIFT 22 |
| 1902 | #define S2CR_PRIVCFG_SHIFT 24 |
| 1903 | #define S2CR_INSTCFG_SHIFT 26 |
| 1904 | #define S2CR_TRANSIENTCFG_SHIFT 28 |
| 1905 | #define S2CR_VMID_SHIFT 0 |
| 1906 | #define S2CR_BSU_SHIFT 24 |
| 1907 | #define S2CR_FB_SHIFT 26 |
| 1908 | |
| 1909 | /* Stream Match Register: SMR */ |
| 1910 | #define SMR_ID_SHIFT 0 |
| 1911 | #define SMR_MASK_SHIFT 16 |
| 1912 | #define SMR_VALID_SHIFT 31 |
| 1913 | |
| 1914 | /* Global TLB Status: TLBGSTATUS */ |
| 1915 | #define TLBGSTATUS_GSACTIVE_SHIFT 0 |
| 1916 | |
| 1917 | /* Invalidate Hyp TLB by VA: TLBIVAH */ |
| 1918 | #define TLBIVAH_ADDR_SHIFT 12 |
| 1919 | |
| 1920 | /* Invalidate TLB by VMID: TLBIVMID */ |
| 1921 | #define TLBIVMID_VMID_SHIFT 0 |
| 1922 | |
| 1923 | /* Context Bank Attribute Register: CBAR */ |
| 1924 | #define CBAR_VMID_SHIFT 0 |
| 1925 | #define CBAR_CBNDX_SHIFT 8 |
| 1926 | #define CBAR_BPSHCFG_SHIFT 8 |
| 1927 | #define CBAR_HYPC_SHIFT 10 |
| 1928 | #define CBAR_FB_SHIFT 11 |
| 1929 | #define CBAR_MEMATTR_SHIFT 12 |
| 1930 | #define CBAR_TYPE_SHIFT 16 |
| 1931 | #define CBAR_BSU_SHIFT 18 |
| 1932 | #define CBAR_RACFG_SHIFT 20 |
| 1933 | #define CBAR_WACFG_SHIFT 22 |
| 1934 | #define CBAR_IRPTNDX_SHIFT 24 |
| 1935 | |
| 1936 | /* Context Bank Fault Restricted Syndrome Register A: CBFRSYNRA */ |
| 1937 | #define CBFRSYNRA_SID_SHIFT 0 |
| 1938 | |
| Olav Haugan | cd93219 | 2013-01-31 18:30:15 -0800 | [diff] [blame] | 1939 | /* Implementation defined register space shift */ |
| 1940 | #define MICRO_MMU_CTRL_HALT_REQ_SHIFT 0x02 |
| 1941 | #define MICRO_MMU_CTRL_IDLE_SHIFT 0x03 |
| 1942 | |
| Sathish Ambley | d1b89ed | 2012-02-07 21:47:47 -0800 | [diff] [blame] | 1943 | /* Stage 1 Context Bank Format Shifts */ |
| 1944 | /* Auxiliary Control Register: CB_ACTLR */ |
| 1945 | #define CB_ACTLR_REQPRIORITY_SHIFT 0 |
| 1946 | #define CB_ACTLR_REQPRIORITYCFG_SHIFT 4 |
| 1947 | #define CB_ACTLR_PRIVCFG_SHIFT 8 |
| 1948 | #define CB_ACTLR_BPRCOSH_SHIFT 28 |
| 1949 | #define CB_ACTLR_BPRCISH_SHIFT 29 |
| 1950 | #define CB_ACTLR_BPRCNSH_SHIFT 30 |
| 1951 | |
| 1952 | /* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */ |
| 1953 | #define CB_ATS1PR_ADDR_SHIFT 12 |
| 1954 | |
| 1955 | /* Address Translation, Stage 1, Privileged Write: CB_ATS1PW */ |
| 1956 | #define CB_ATS1PW_ADDR_SHIFT 12 |
| 1957 | |
| 1958 | /* Address Translation, Stage 1, User Read: CB_ATS1UR */ |
| 1959 | #define CB_ATS1UR_ADDR_SHIFT 12 |
| 1960 | |
| 1961 | /* Address Translation, Stage 1, User Write: CB_ATS1UW */ |
| 1962 | #define CB_ATS1UW_ADDR_SHIFT 12 |
| 1963 | |
| 1964 | /* Address Translation Status Register: CB_ATSR */ |
| 1965 | #define CB_ATSR_ACTIVE_SHIFT 0 |
| 1966 | |
| 1967 | /* Context ID Register: CB_CONTEXTIDR */ |
| 1968 | #define CB_CONTEXTIDR_ASID_SHIFT 0 |
| 1969 | #define CB_CONTEXTIDR_PROCID_SHIFT 8 |
| 1970 | |
| 1971 | /* Fault Address Register: CB_FAR */ |
| 1972 | #define CB_FAR_FADDR_SHIFT 0 |
| 1973 | |
| 1974 | /* Fault Status Register: CB_FSR */ |
| 1975 | #define CB_FSR_TF_SHIFT 1 |
| 1976 | #define CB_FSR_AFF_SHIFT 2 |
| 1977 | #define CB_FSR_PF_SHIFT 3 |
| 1978 | #define CB_FSR_EF_SHIFT 4 |
| 1979 | #define CB_FSR_TLBMCF_SHIFT 5 |
| 1980 | #define CB_FSR_TLBLKF_SHIFT 6 |
| 1981 | #define CB_FSR_SS_SHIFT 30 |
| 1982 | #define CB_FSR_MULTI_SHIFT 31 |
| 1983 | |
| 1984 | /* Fault Syndrome Register 0: CB_FSYNR0 */ |
| 1985 | #define CB_FSYNR0_PLVL_SHIFT 0 |
| 1986 | #define CB_FSYNR0_S1PTWF_SHIFT 3 |
| 1987 | #define CB_FSYNR0_WNR_SHIFT 4 |
| 1988 | #define CB_FSYNR0_PNU_SHIFT 5 |
| 1989 | #define CB_FSYNR0_IND_SHIFT 6 |
| 1990 | #define CB_FSYNR0_NSSTATE_SHIFT 7 |
| 1991 | #define CB_FSYNR0_NSATTR_SHIFT 8 |
| 1992 | #define CB_FSYNR0_ATOF_SHIFT 9 |
| 1993 | #define CB_FSYNR0_PTWF_SHIFT 10 |
| 1994 | #define CB_FSYNR0_AFR_SHIFT 11 |
| 1995 | #define CB_FSYNR0_S1CBNDX_SHIFT 16 |
| 1996 | |
| 1997 | /* Normal Memory Remap Register: CB_NMRR */ |
| 1998 | #define CB_NMRR_IR0_SHIFT 0 |
| 1999 | #define CB_NMRR_IR1_SHIFT 2 |
| 2000 | #define CB_NMRR_IR2_SHIFT 4 |
| 2001 | #define CB_NMRR_IR3_SHIFT 6 |
| 2002 | #define CB_NMRR_IR4_SHIFT 8 |
| 2003 | #define CB_NMRR_IR5_SHIFT 10 |
| 2004 | #define CB_NMRR_IR6_SHIFT 12 |
| 2005 | #define CB_NMRR_IR7_SHIFT 14 |
| 2006 | #define CB_NMRR_OR0_SHIFT 16 |
| 2007 | #define CB_NMRR_OR1_SHIFT 18 |
| 2008 | #define CB_NMRR_OR2_SHIFT 20 |
| 2009 | #define CB_NMRR_OR3_SHIFT 22 |
| 2010 | #define CB_NMRR_OR4_SHIFT 24 |
| 2011 | #define CB_NMRR_OR5_SHIFT 26 |
| 2012 | #define CB_NMRR_OR6_SHIFT 28 |
| 2013 | #define CB_NMRR_OR7_SHIFT 30 |
| 2014 | |
| 2015 | /* Physical Address Register: CB_PAR */ |
| 2016 | #define CB_PAR_F_SHIFT 0 |
| 2017 | #define CB_PAR_SS_SHIFT 1 |
| 2018 | #define CB_PAR_OUTER_SHIFT 2 |
| 2019 | #define CB_PAR_INNER_SHIFT 4 |
| 2020 | #define CB_PAR_SH_SHIFT 7 |
| 2021 | #define CB_PAR_NS_SHIFT 9 |
| 2022 | #define CB_PAR_NOS_SHIFT 10 |
| 2023 | #define CB_PAR_PA_SHIFT 12 |
| 2024 | #define CB_PAR_TF_SHIFT 1 |
| 2025 | #define CB_PAR_AFF_SHIFT 2 |
| 2026 | #define CB_PAR_PF_SHIFT 3 |
| 2027 | #define CB_PAR_TLBMCF_SHIFT 5 |
| 2028 | #define CB_PAR_TLBLKF_SHIFT 6 |
| 2029 | #define CB_PAR_ATOT_SHIFT 31 |
| 2030 | #define CB_PAR_PLVL_SHIFT 0 |
| 2031 | #define CB_PAR_STAGE_SHIFT 3 |
| 2032 | |
| 2033 | /* Primary Region Remap Register: CB_PRRR */ |
| 2034 | #define CB_PRRR_TR0_SHIFT 0 |
| 2035 | #define CB_PRRR_TR1_SHIFT 2 |
| 2036 | #define CB_PRRR_TR2_SHIFT 4 |
| 2037 | #define CB_PRRR_TR3_SHIFT 6 |
| 2038 | #define CB_PRRR_TR4_SHIFT 8 |
| 2039 | #define CB_PRRR_TR5_SHIFT 10 |
| 2040 | #define CB_PRRR_TR6_SHIFT 12 |
| 2041 | #define CB_PRRR_TR7_SHIFT 14 |
| 2042 | #define CB_PRRR_DS0_SHIFT 16 |
| 2043 | #define CB_PRRR_DS1_SHIFT 17 |
| 2044 | #define CB_PRRR_NS0_SHIFT 18 |
| 2045 | #define CB_PRRR_NS1_SHIFT 19 |
| 2046 | #define CB_PRRR_NOS0_SHIFT 24 |
| 2047 | #define CB_PRRR_NOS1_SHIFT 25 |
| 2048 | #define CB_PRRR_NOS2_SHIFT 26 |
| 2049 | #define CB_PRRR_NOS3_SHIFT 27 |
| 2050 | #define CB_PRRR_NOS4_SHIFT 28 |
| 2051 | #define CB_PRRR_NOS5_SHIFT 29 |
| 2052 | #define CB_PRRR_NOS6_SHIFT 30 |
| 2053 | #define CB_PRRR_NOS7_SHIFT 31 |
| 2054 | |
| 2055 | /* Transaction Resume: CB_RESUME */ |
| 2056 | #define CB_RESUME_TNR_SHIFT 0 |
| 2057 | |
| 2058 | /* System Control Register: CB_SCTLR */ |
| 2059 | #define CB_SCTLR_M_SHIFT 0 |
| 2060 | #define CB_SCTLR_TRE_SHIFT 1 |
| 2061 | #define CB_SCTLR_AFE_SHIFT 2 |
| 2062 | #define CB_SCTLR_AFFD_SHIFT 3 |
| 2063 | #define CB_SCTLR_E_SHIFT 4 |
| 2064 | #define CB_SCTLR_CFRE_SHIFT 5 |
| 2065 | #define CB_SCTLR_CFIE_SHIFT 6 |
| 2066 | #define CB_SCTLR_CFCFG_SHIFT 7 |
| 2067 | #define CB_SCTLR_HUPCF_SHIFT 8 |
| 2068 | #define CB_SCTLR_WXN_SHIFT 9 |
| 2069 | #define CB_SCTLR_UWXN_SHIFT 10 |
| 2070 | #define CB_SCTLR_ASIDPNE_SHIFT 12 |
| 2071 | #define CB_SCTLR_TRANSIENTCFG_SHIFT 14 |
| 2072 | #define CB_SCTLR_MEMATTR_SHIFT 16 |
| 2073 | #define CB_SCTLR_MTCFG_SHIFT 20 |
| 2074 | #define CB_SCTLR_SHCFG_SHIFT 22 |
| 2075 | #define CB_SCTLR_RACFG_SHIFT 24 |
| 2076 | #define CB_SCTLR_WACFG_SHIFT 26 |
| 2077 | #define CB_SCTLR_NSCFG_SHIFT 28 |
| 2078 | |
| 2079 | /* Invalidate TLB by ASID: CB_TLBIASID */ |
| 2080 | #define CB_TLBIASID_ASID_SHIFT 0 |
| 2081 | |
| 2082 | /* Invalidate TLB by VA: CB_TLBIVA */ |
| 2083 | #define CB_TLBIVA_ASID_SHIFT 0 |
| 2084 | #define CB_TLBIVA_VA_SHIFT 12 |
| 2085 | |
| 2086 | /* Invalidate TLB by VA, All ASID: CB_TLBIVAA */ |
| 2087 | #define CB_TLBIVAA_VA_SHIFT 12 |
| 2088 | |
| 2089 | /* Invalidate TLB by VA, All ASID, Last Level: CB_TLBIVAAL */ |
| 2090 | #define CB_TLBIVAAL_VA_SHIFT 12 |
| 2091 | |
| 2092 | /* Invalidate TLB by VA, Last Level: CB_TLBIVAL */ |
| 2093 | #define CB_TLBIVAL_ASID_SHIFT 0 |
| 2094 | #define CB_TLBIVAL_VA_SHIFT 12 |
| 2095 | |
| 2096 | /* TLB Status: CB_TLBSTATUS */ |
| 2097 | #define CB_TLBSTATUS_SACTIVE_SHIFT 0 |
| 2098 | |
| 2099 | /* Translation Table Base Control Register: CB_TTBCR */ |
| 2100 | #define CB_TTBCR_T0SZ_SHIFT 0 |
| 2101 | #define CB_TTBCR_PD0_SHIFT 4 |
| 2102 | #define CB_TTBCR_PD1_SHIFT 5 |
| 2103 | #define CB_TTBCR_NSCFG0_SHIFT 14 |
| 2104 | #define CB_TTBCR_NSCFG1_SHIFT 30 |
| 2105 | #define CB_TTBCR_EAE_SHIFT 31 |
| 2106 | |
| 2107 | /* Translation Table Base Register 0/1: CB_TTBR */ |
| 2108 | #define CB_TTBR0_IRGN1_SHIFT 0 |
| 2109 | #define CB_TTBR0_S_SHIFT 1 |
| 2110 | #define CB_TTBR0_RGN_SHIFT 3 |
| 2111 | #define CB_TTBR0_NOS_SHIFT 5 |
| 2112 | #define CB_TTBR0_IRGN0_SHIFT 6 |
| 2113 | #define CB_TTBR0_ADDR_SHIFT 14 |
| 2114 | |
| 2115 | #define CB_TTBR1_IRGN1_SHIFT 0 |
| 2116 | #define CB_TTBR1_S_SHIFT 1 |
| 2117 | #define CB_TTBR1_RGN_SHIFT 3 |
| 2118 | #define CB_TTBR1_NOS_SHIFT 5 |
| 2119 | #define CB_TTBR1_IRGN0_SHIFT 6 |
| 2120 | #define CB_TTBR1_ADDR_SHIFT 14 |
| 2121 | |
| 2122 | #endif |