blob: 6f89007fe31b6941a0cd77da8308a854387a655b [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (C) 2008 Google, Inc.
Manu Gautam5143b252012-01-05 19:25:23 -08003 * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <linux/dma-mapping.h>
20#include <asm/clkdev.h>
21#include <mach/irqs.h>
22#include <mach/msm_iomap.h>
23#include <mach/dma.h>
24#include <mach/board.h>
25
26#include "devices.h"
27#include "smd_private.h"
28
29#include <asm/mach/flash.h>
30
31#include <asm/mach/mmc.h>
32#include <mach/msm_hsusb.h>
33#include <mach/usbdiag.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#include <mach/rpc_hsusb.h>
35
36#include "clock-pcom.h"
37
38static struct resource resources_uart1[] = {
39 {
40 .start = INT_UART1,
41 .end = INT_UART1,
42 .flags = IORESOURCE_IRQ,
43 },
44 {
45 .start = MSM_UART1_PHYS,
46 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
47 .flags = IORESOURCE_MEM,
48 },
49};
50
51static struct resource resources_uart2[] = {
52 {
53 .start = INT_UART2,
54 .end = INT_UART2,
55 .flags = IORESOURCE_IRQ,
56 },
57 {
58 .start = MSM_UART2_PHYS,
59 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
60 .flags = IORESOURCE_MEM,
61 },
62};
63
64static struct resource resources_uart3[] = {
65 {
66 .start = INT_UART3,
67 .end = INT_UART3,
68 .flags = IORESOURCE_IRQ,
69 },
70 {
71 .start = MSM_UART3_PHYS,
72 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
73 .flags = IORESOURCE_MEM,
74 },
75};
76
77struct platform_device msm_device_uart1 = {
78 .name = "msm_serial",
79 .id = 0,
80 .num_resources = ARRAY_SIZE(resources_uart1),
81 .resource = resources_uart1,
82};
83
84struct platform_device msm_device_uart2 = {
85 .name = "msm_serial",
86 .id = 1,
87 .num_resources = ARRAY_SIZE(resources_uart2),
88 .resource = resources_uart2,
89};
90
91struct platform_device msm_device_uart3 = {
92 .name = "msm_serial",
93 .id = 2,
94 .num_resources = ARRAY_SIZE(resources_uart3),
95 .resource = resources_uart3,
96};
97
98#define MSM_UART1DM_PHYS 0xA0200000
99#define MSM_UART2DM_PHYS 0xA0300000
100static struct resource msm_uart1_dm_resources[] = {
101 {
102 .start = MSM_UART1DM_PHYS,
103 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
104 .flags = IORESOURCE_MEM,
105 },
106 {
107 .start = INT_UART1DM_IRQ,
108 .end = INT_UART1DM_IRQ,
109 .flags = IORESOURCE_IRQ,
110 },
111 {
112 .start = INT_UART1DM_RX,
113 .end = INT_UART1DM_RX,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
117 .start = DMOV_HSUART1_TX_CHAN,
118 .end = DMOV_HSUART1_RX_CHAN,
119 .name = "uartdm_channels",
120 .flags = IORESOURCE_DMA,
121 },
122 {
123 .start = DMOV_HSUART1_TX_CRCI,
124 .end = DMOV_HSUART1_RX_CRCI,
125 .name = "uartdm_crci",
126 .flags = IORESOURCE_DMA,
127 },
128};
129
130static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
131
132struct platform_device msm_device_uart_dm1 = {
133 .name = "msm_serial_hs",
134 .id = 0,
135 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
136 .resource = msm_uart1_dm_resources,
137 .dev = {
138 .dma_mask = &msm_uart_dm1_dma_mask,
139 .coherent_dma_mask = DMA_BIT_MASK(32),
140 },
141};
142
143static struct resource msm_uart2_dm_resources[] = {
144 {
145 .start = MSM_UART2DM_PHYS,
146 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
147 .flags = IORESOURCE_MEM,
148 },
149 {
150 .start = INT_UART2DM_IRQ,
151 .end = INT_UART2DM_IRQ,
152 .flags = IORESOURCE_IRQ,
153 },
154 {
155 .start = INT_UART2DM_RX,
156 .end = INT_UART2DM_RX,
157 .flags = IORESOURCE_IRQ,
158 },
159 {
160 .start = DMOV_HSUART2_TX_CHAN,
161 .end = DMOV_HSUART2_RX_CHAN,
162 .name = "uartdm_channels",
163 .flags = IORESOURCE_DMA,
164 },
165 {
166 .start = DMOV_HSUART2_TX_CRCI,
167 .end = DMOV_HSUART2_RX_CRCI,
168 .name = "uartdm_crci",
169 .flags = IORESOURCE_DMA,
170 },
171};
172
173static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
174
175struct platform_device msm_device_uart_dm2 = {
176 .name = "msm_serial_hs",
177 .id = 1,
178 .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
179 .resource = msm_uart2_dm_resources,
180 .dev = {
181 .dma_mask = &msm_uart_dm2_dma_mask,
182 .coherent_dma_mask = DMA_BIT_MASK(32),
183 },
184};
185
186#define MSM_I2C_SIZE SZ_4K
187#define MSM_I2C_PHYS 0xA9900000
188static struct resource resources_i2c[] = {
189 {
190 .start = MSM_I2C_PHYS,
191 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
192 .flags = IORESOURCE_MEM,
193 },
194 {
195 .start = INT_PWB_I2C,
196 .end = INT_PWB_I2C,
197 .flags = IORESOURCE_IRQ,
198 },
199};
200
201struct platform_device msm_device_i2c = {
202 .name = "msm_i2c",
203 .id = 0,
204 .num_resources = ARRAY_SIZE(resources_i2c),
205 .resource = resources_i2c,
206};
207
208#define MSM_HSUSB_PHYS 0xA0800000
209static struct resource resources_hsusb_otg[] = {
210 {
211 .start = MSM_HSUSB_PHYS,
212 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
213 .flags = IORESOURCE_MEM,
214 },
215 {
216 .start = INT_USB_HS,
217 .end = INT_USB_HS,
218 .flags = IORESOURCE_IRQ,
219 },
220};
221
222static u64 dma_mask = 0xffffffffULL;
223struct platform_device msm_device_hsusb_otg = {
224 .name = "msm_hsusb_otg",
225 .id = -1,
226 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
227 .resource = resources_hsusb_otg,
228 .dev = {
229 .dma_mask = &dma_mask,
230 .coherent_dma_mask = 0xffffffffULL,
231 },
232};
233
234static struct resource resources_hsusb_peripheral[] = {
235 {
236 .start = MSM_HSUSB_PHYS,
237 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
238 .flags = IORESOURCE_MEM,
239 },
240 {
241 .start = INT_USB_HS,
242 .end = INT_USB_HS,
243 .flags = IORESOURCE_IRQ,
244 },
245};
246
247static struct resource resources_gadget_peripheral[] = {
248 {
249 .start = MSM_HSUSB_PHYS,
250 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
251 .flags = IORESOURCE_MEM,
252 },
253 {
254 .start = INT_USB_HS,
255 .end = INT_USB_HS,
256 .flags = IORESOURCE_IRQ,
257 },
258};
259
260struct platform_device msm_device_hsusb_peripheral = {
261 .name = "msm_hsusb_peripheral",
262 .id = -1,
263 .num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
264 .resource = resources_hsusb_peripheral,
265 .dev = {
266 .dma_mask = &dma_mask,
267 .coherent_dma_mask = 0xffffffffULL,
268 },
269};
270
271struct platform_device msm_device_gadget_peripheral = {
272 .name = "msm_hsusb",
273 .id = -1,
274 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
275 .resource = resources_gadget_peripheral,
276 .dev = {
277 .dma_mask = &dma_mask,
278 .coherent_dma_mask = 0xffffffffULL,
279 },
280};
281
282static struct resource resources_hsusb_host[] = {
283 {
284 .start = MSM_HSUSB_PHYS,
285 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
286 .flags = IORESOURCE_MEM,
287 },
288 {
289 .start = INT_USB_HS,
290 .end = INT_USB_HS,
291 .flags = IORESOURCE_IRQ,
292 },
293};
294
295struct platform_device msm_device_hsusb_host = {
296 .name = "msm_hsusb_host",
297 .id = 0,
298 .num_resources = ARRAY_SIZE(resources_hsusb_host),
299 .resource = resources_hsusb_host,
300 .dev = {
301 .dma_mask = &dma_mask,
302 .coherent_dma_mask = 0xffffffffULL,
303 },
304};
305
306static struct platform_device *msm_host_devices[] = {
307 &msm_device_hsusb_host,
308};
309
310int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
311{
312 struct platform_device *pdev;
313
314 pdev = msm_host_devices[host];
315 if (!pdev)
316 return -ENODEV;
317 pdev->dev.platform_data = plat;
318 return platform_device_register(pdev);
319}
320
321#ifdef CONFIG_USB_ANDROID_DIAG
322struct usb_diag_platform_data usb_diag_pdata = {
323 .ch_name = DIAG_LEGACY,
324 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
325};
326
327struct platform_device usb_diag_device = {
328 .name = "usb_diag",
329 .id = -1,
330 .dev = {
331 .platform_data = &usb_diag_pdata,
332 },
333};
334#endif
335
336#ifdef CONFIG_USB_F_SERIAL
337static struct usb_gadget_fserial_platform_data fserial_pdata = {
338 .no_ports = 2,
339};
340
341struct platform_device usb_gadget_fserial_device = {
342 .name = "usb_fserial",
343 .id = -1,
344 .dev = {
345 .platform_data = &fserial_pdata,
346 },
347};
348#endif
349
350#define MSM_NAND_PHYS 0xA0A00000
351static struct resource resources_nand[] = {
352 [0] = {
353 .name = "msm_nand_dmac",
354 .start = DMOV_NAND_CHAN,
355 .end = DMOV_NAND_CHAN,
356 .flags = IORESOURCE_DMA,
357 },
358 [1] = {
359 .name = "msm_nand_phys",
360 .start = MSM_NAND_PHYS,
361 .end = MSM_NAND_PHYS + 0x7FF,
362 .flags = IORESOURCE_MEM,
363 },
364};
365
366static struct resource resources_otg[] = {
367 {
368 .start = MSM_HSUSB_PHYS,
369 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
370 .flags = IORESOURCE_MEM,
371 },
372 {
373 .start = INT_USB_HS,
374 .end = INT_USB_HS,
375 .flags = IORESOURCE_IRQ,
376 },
377};
378
379struct platform_device msm_device_otg = {
380 .name = "msm_otg",
381 .id = -1,
382 .num_resources = ARRAY_SIZE(resources_otg),
383 .resource = resources_otg,
384 .dev = {
385 .coherent_dma_mask = 0xffffffffULL,
386 },
387};
388
389struct flash_platform_data msm_nand_data = {
390 .parts = NULL,
391 .nr_parts = 0,
392};
393
394struct platform_device msm_device_nand = {
395 .name = "msm_nand",
396 .id = -1,
397 .num_resources = ARRAY_SIZE(resources_nand),
398 .resource = resources_nand,
399 .dev = {
400 .platform_data = &msm_nand_data,
401 },
402};
403
404struct platform_device msm_device_smd = {
405 .name = "msm_smd",
406 .id = -1,
407};
408
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700409static struct resource msm_dmov_resource[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700410 {
411 .start = INT_ADM_AARM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700412 .flags = IORESOURCE_IRQ,
413 },
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700414 {
415 .start = 0xA9700000,
416 .end = 0xA9700000 + SZ_4K - 1,
417 .flags = IORESOURCE_MEM,
418 },
419};
420
421static struct msm_dmov_pdata msm_dmov_pdata = {
422 .sd = 3,
423 .sd_size = 0x400,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700424};
425
426struct platform_device msm_device_dmov = {
427 .name = "msm_dmov",
428 .id = -1,
429 .resource = msm_dmov_resource,
430 .num_resources = ARRAY_SIZE(msm_dmov_resource),
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700431 .dev = {
432 .platform_data = &msm_dmov_pdata,
433 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700434};
435
436#define MSM_SDC1_BASE 0xA0400000
437#define MSM_SDC2_BASE 0xA0500000
438#define MSM_SDC3_BASE 0xA0600000
439#define MSM_SDC4_BASE 0xA0700000
440static struct resource resources_sdc1[] = {
441 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530442 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700443 .start = MSM_SDC1_BASE,
444 .end = MSM_SDC1_BASE + SZ_4K - 1,
445 .flags = IORESOURCE_MEM,
446 },
447 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530448 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700449 .start = INT_SDC1_0,
450 .end = INT_SDC1_1,
451 .flags = IORESOURCE_IRQ,
452 },
453 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530454 .name = "dma_chnl",
Krishna Konda25786ec2011-07-25 16:21:36 -0700455 .start = DMOV_SDC1_CHAN,
456 .end = DMOV_SDC1_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700457 .flags = IORESOURCE_DMA,
458 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700459 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530460 .name = "dma_crci",
Krishna Konda25786ec2011-07-25 16:21:36 -0700461 .start = DMOV_SDC1_CRCI,
462 .end = DMOV_SDC1_CRCI,
463 .flags = IORESOURCE_DMA,
464 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700465};
466
467static struct resource resources_sdc2[] = {
468 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530469 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700470 .start = MSM_SDC2_BASE,
471 .end = MSM_SDC2_BASE + SZ_4K - 1,
472 .flags = IORESOURCE_MEM,
473 },
474 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530475 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700476 .start = INT_SDC2_0,
477 .end = INT_SDC2_1,
478 .flags = IORESOURCE_IRQ,
479 },
480 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530481 .name = "dma_chnl",
Krishna Konda25786ec2011-07-25 16:21:36 -0700482 .start = DMOV_SDC2_CHAN,
483 .end = DMOV_SDC2_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700484 .flags = IORESOURCE_DMA,
485 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700486 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530487 .name = "dma_crci",
Krishna Konda25786ec2011-07-25 16:21:36 -0700488 .start = DMOV_SDC2_CRCI,
489 .end = DMOV_SDC2_CRCI,
490 .flags = IORESOURCE_DMA,
491 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700492};
493
494static struct resource resources_sdc3[] = {
495 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530496 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700497 .start = MSM_SDC3_BASE,
498 .end = MSM_SDC3_BASE + SZ_4K - 1,
499 .flags = IORESOURCE_MEM,
500 },
501 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530502 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700503 .start = INT_SDC3_0,
504 .end = INT_SDC3_1,
505 .flags = IORESOURCE_IRQ,
506 },
507 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530508 .name = "dma_chnl",
Krishna Konda25786ec2011-07-25 16:21:36 -0700509 .start = DMOV_SDC3_CHAN,
510 .end = DMOV_SDC3_CHAN,
511 .flags = IORESOURCE_DMA,
512 },
513 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530514 .name = "dma_crci",
Krishna Konda25786ec2011-07-25 16:21:36 -0700515 .start = DMOV_SDC3_CRCI,
516 .end = DMOV_SDC3_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700517 .flags = IORESOURCE_DMA,
518 },
519};
520
521static struct resource resources_sdc4[] = {
522 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530523 .name = "core_mem",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700524 .start = MSM_SDC4_BASE,
525 .end = MSM_SDC4_BASE + SZ_4K - 1,
526 .flags = IORESOURCE_MEM,
527 },
528 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530529 .name = "core_irq",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700530 .start = INT_SDC4_0,
531 .end = INT_SDC4_1,
532 .flags = IORESOURCE_IRQ,
533 },
534 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530535 .name = "dma_chnl",
Krishna Konda25786ec2011-07-25 16:21:36 -0700536 .start = DMOV_SDC4_CHAN,
537 .end = DMOV_SDC4_CHAN,
538 .flags = IORESOURCE_DMA,
539 },
540 {
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530541 .name = "dma_crci",
Krishna Konda25786ec2011-07-25 16:21:36 -0700542 .start = DMOV_SDC4_CRCI,
543 .end = DMOV_SDC4_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700544 .flags = IORESOURCE_DMA,
545 },
546};
547
548struct platform_device msm_device_sdc1 = {
549 .name = "msm_sdcc",
550 .id = 1,
551 .num_resources = ARRAY_SIZE(resources_sdc1),
552 .resource = resources_sdc1,
553 .dev = {
554 .coherent_dma_mask = 0xffffffff,
555 },
556};
557
558struct platform_device msm_device_sdc2 = {
559 .name = "msm_sdcc",
560 .id = 2,
561 .num_resources = ARRAY_SIZE(resources_sdc2),
562 .resource = resources_sdc2,
563 .dev = {
564 .coherent_dma_mask = 0xffffffff,
565 },
566};
567
568struct platform_device msm_device_sdc3 = {
569 .name = "msm_sdcc",
570 .id = 3,
571 .num_resources = ARRAY_SIZE(resources_sdc3),
572 .resource = resources_sdc3,
573 .dev = {
574 .coherent_dma_mask = 0xffffffff,
575 },
576};
577
578struct platform_device msm_device_sdc4 = {
579 .name = "msm_sdcc",
580 .id = 4,
581 .num_resources = ARRAY_SIZE(resources_sdc4),
582 .resource = resources_sdc4,
583 .dev = {
584 .coherent_dma_mask = 0xffffffff,
585 },
586};
587
588static struct platform_device *msm_sdcc_devices[] __initdata = {
589 &msm_device_sdc1,
590 &msm_device_sdc2,
591 &msm_device_sdc3,
592 &msm_device_sdc4,
593};
594
595int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
596{
597 struct platform_device *pdev;
598
599 if (controller < 1 || controller > 4)
600 return -EINVAL;
601
602 pdev = msm_sdcc_devices[controller-1];
603 pdev->dev.platform_data = plat;
604 return platform_device_register(pdev);
605}
606
607#define RAMFS_INFO_MAGICNUMBER 0x654D4D43
608#define RAMFS_INFO_VERSION 0x00000001
609#define RAMFS_MODEMSTORAGE_ID 0x4D454653
610
611static struct resource rmt_storage_resources[] = {
612 {
613 .flags = IORESOURCE_MEM,
614 },
615};
616
617static struct platform_device rmt_storage_device = {
618 .name = "rmt_storage",
619 .id = -1,
620 .num_resources = ARRAY_SIZE(rmt_storage_resources),
621 .resource = rmt_storage_resources,
622};
623
624struct shared_ramfs_entry {
625 uint32_t client_id; /* Client id to uniquely identify a client */
626 uint32_t base_addr; /* Base address of shared RAMFS memory */
627 uint32_t size; /* Size of the shared RAMFS memory */
628 uint32_t reserved; /* Reserved attribute for future use */
629};
630struct shared_ramfs_table {
631 uint32_t magic_id; /* Identify RAMFS details in SMEM */
632 uint32_t version; /* Version of shared_ramfs_table */
633 uint32_t entries; /* Total number of valid entries */
634 struct shared_ramfs_entry ramfs_entry[3]; /* List all entries */
635};
636
637int __init rmt_storage_add_ramfs(void)
638{
639 struct shared_ramfs_table *ramfs_table;
640 struct shared_ramfs_entry *ramfs_entry;
641 int index;
642
643 ramfs_table = smem_alloc(SMEM_SEFS_INFO,
644 sizeof(struct shared_ramfs_table));
645
646 if (!ramfs_table) {
647 printk(KERN_WARNING "%s: No RAMFS table in SMEM\n", __func__);
648 return -ENOENT;
649 }
650
651 if ((ramfs_table->magic_id != (u32) RAMFS_INFO_MAGICNUMBER) ||
652 (ramfs_table->version != (u32) RAMFS_INFO_VERSION)) {
653 printk(KERN_WARNING "%s: Magic / Version mismatch:, "
654 "magic_id=%#x, format_version=%#x\n", __func__,
655 ramfs_table->magic_id, ramfs_table->version);
656 return -ENOENT;
657 }
658
659 for (index = 0; index < ramfs_table->entries; index++) {
660 ramfs_entry = &ramfs_table->ramfs_entry[index];
661
662 /* Find a match for the Modem Storage RAMFS area */
663 if (ramfs_entry->client_id == (u32) RAMFS_MODEMSTORAGE_ID) {
664 printk(KERN_INFO "%s: RAMFS Info (from SMEM): "
665 "Baseaddr = 0x%08x, Size = 0x%08x\n", __func__,
666 ramfs_entry->base_addr, ramfs_entry->size);
667
668 rmt_storage_resources[0].start = ramfs_entry->base_addr;
669 rmt_storage_resources[0].end = ramfs_entry->base_addr +
670 ramfs_entry->size - 1;
671 platform_device_register(&rmt_storage_device);
672 return 0;
673 }
674 }
675 return -ENOENT;
676}
677
678#if defined(CONFIG_FB_MSM_MDP40)
679#define MDP_BASE 0xA3F00000
680#define PMDH_BASE 0xAD600000
681#define EMDH_BASE 0xAD700000
682#define TVENC_BASE 0xAD400000
683#else
684#define MDP_BASE 0xAA200000
685#define PMDH_BASE 0xAA600000
686#define EMDH_BASE 0xAA700000
687#define TVENC_BASE 0xAA400000
688#endif
689
690static struct resource msm_mdp_resources[] = {
691 {
692 .name = "mdp",
693 .start = MDP_BASE,
694 .end = MDP_BASE + 0x000F0000 - 1,
695 .flags = IORESOURCE_MEM,
696 },
697 {
698 .start = INT_MDP,
699 .end = INT_MDP,
700 .flags = IORESOURCE_IRQ,
701 },
702};
703
704static struct resource msm_mddi_resources[] = {
705 {
706 .name = "pmdh",
707 .start = PMDH_BASE,
708 .end = PMDH_BASE + PAGE_SIZE - 1,
709 .flags = IORESOURCE_MEM,
710 }
711};
712
713static struct resource msm_mddi_ext_resources[] = {
714 {
715 .name = "emdh",
716 .start = EMDH_BASE,
717 .end = EMDH_BASE + PAGE_SIZE - 1,
718 .flags = IORESOURCE_MEM,
719 }
720};
721
722static struct resource msm_ebi2_lcd_resources[] = {
723 {
724 .name = "base",
725 .start = 0xa0d00000,
726 .end = 0xa0d00000 + PAGE_SIZE - 1,
727 .flags = IORESOURCE_MEM,
728 },
729 {
730 .name = "lcd01",
731 .start = 0x98000000,
732 .end = 0x98000000 + 0x80000 - 1,
733 .flags = IORESOURCE_MEM,
734 },
735 {
736 .name = "lcd02",
737 .start = 0x9c000000,
738 .end = 0x9c000000 + 0x80000 - 1,
739 .flags = IORESOURCE_MEM,
740 },
741};
742
743static struct resource msm_tvenc_resources[] = {
744 {
745 .name = "tvenc",
746 .start = TVENC_BASE,
747 .end = TVENC_BASE + PAGE_SIZE - 1,
748 .flags = IORESOURCE_MEM,
749 }
750};
751
752static struct platform_device msm_mdp_device = {
753 .name = "mdp",
754 .id = 0,
755 .num_resources = ARRAY_SIZE(msm_mdp_resources),
756 .resource = msm_mdp_resources,
757};
758
759static struct platform_device msm_mddi_device = {
760 .name = "mddi",
761 .id = 0,
762 .num_resources = ARRAY_SIZE(msm_mddi_resources),
763 .resource = msm_mddi_resources,
764};
765
766static struct platform_device msm_mddi_ext_device = {
767 .name = "mddi_ext",
768 .id = 0,
769 .num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
770 .resource = msm_mddi_ext_resources,
771};
772
773static struct platform_device msm_ebi2_lcd_device = {
774 .name = "ebi2_lcd",
775 .id = 0,
776 .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
777 .resource = msm_ebi2_lcd_resources,
778};
779
Padmanabhan Komandurue77bcf52012-07-26 12:43:39 +0530780struct platform_device msm_lcdc_device = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700781 .name = "lcdc",
782 .id = 0,
783};
784
785static struct platform_device msm_tvenc_device = {
786 .name = "tvenc",
787 .id = 0,
788 .num_resources = ARRAY_SIZE(msm_tvenc_resources),
789 .resource = msm_tvenc_resources,
790};
791
792/* TSIF begin */
793#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
794
795#define MSM_TSIF_PHYS (0xa0100000)
796#define MSM_TSIF_SIZE (0x200)
797
798static struct resource tsif_resources[] = {
799 [0] = {
800 .flags = IORESOURCE_IRQ,
801 .start = INT_TSIF_IRQ,
802 .end = INT_TSIF_IRQ,
803 },
804 [1] = {
805 .flags = IORESOURCE_MEM,
806 .start = MSM_TSIF_PHYS,
807 .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
808 },
809 [2] = {
810 .flags = IORESOURCE_DMA,
811 .start = DMOV_TSIF_CHAN,
812 .end = DMOV_TSIF_CRCI,
813 },
814};
815
816static void tsif_release(struct device *dev)
817{
818 dev_info(dev, "release\n");
819}
820
821struct platform_device msm_device_tsif = {
822 .name = "msm_tsif",
823 .id = 0,
824 .num_resources = ARRAY_SIZE(tsif_resources),
825 .resource = tsif_resources,
826 .dev = {
827 .release = tsif_release,
828 },
829};
830#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
831/* TSIF end */
832
833#define MSM_TSSC_PHYS 0xAA300000
834static struct resource resources_tssc[] = {
835 {
836 .start = MSM_TSSC_PHYS,
837 .end = MSM_TSSC_PHYS + SZ_4K - 1,
838 .name = "tssc",
839 .flags = IORESOURCE_MEM,
840 },
841 {
842 .start = INT_TCHSCRN1,
843 .end = INT_TCHSCRN1,
844 .name = "tssc1",
845 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
846 },
847 {
848 .start = INT_TCHSCRN2,
849 .end = INT_TCHSCRN2,
850 .name = "tssc2",
851 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
852 },
853};
854
855struct platform_device msm_device_tssc = {
856 .name = "msm_touchscreen",
857 .id = 0,
858 .num_resources = ARRAY_SIZE(resources_tssc),
859 .resource = resources_tssc,
860};
861
862static void __init msm_register_device(struct platform_device *pdev, void *data)
863{
864 int ret;
865
866 pdev->dev.platform_data = data;
867
868 ret = platform_device_register(pdev);
869 if (ret)
870 dev_err(&pdev->dev,
871 "%s: platform_device_register() failed = %d\n",
872 __func__, ret);
873}
874
875void __init msm_fb_register_device(char *name, void *data)
876{
877 if (!strncmp(name, "mdp", 3))
878 msm_register_device(&msm_mdp_device, data);
879 else if (!strncmp(name, "pmdh", 4))
880 msm_register_device(&msm_mddi_device, data);
881 else if (!strncmp(name, "emdh", 4))
882 msm_register_device(&msm_mddi_ext_device, data);
883 else if (!strncmp(name, "ebi2", 4))
884 msm_register_device(&msm_ebi2_lcd_device, data);
885 else if (!strncmp(name, "tvenc", 5))
886 msm_register_device(&msm_tvenc_device, data);
887 else if (!strncmp(name, "lcdc", 4))
888 msm_register_device(&msm_lcdc_device, data);
889 else
890 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
891}
892
893static struct platform_device msm_camera_device = {
894 .name = "msm_camera",
895 .id = 0,
896};
897
898void __init msm_camera_register_device(void *res, uint32_t num,
899 void *data)
900{
901 msm_camera_device.num_resources = num;
902 msm_camera_device.resource = res;
903
904 msm_register_device(&msm_camera_device, data);
905}
906
907static DEFINE_CLK_PCOM(adm_clk, ADM_CLK, 0);
908static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, 0);
909static DEFINE_CLK_PCOM(ebi1_clk, EBI1_CLK, CLK_MIN);
910static DEFINE_CLK_PCOM(ebi2_clk, EBI2_CLK, 0);
911static DEFINE_CLK_PCOM(ecodec_clk, ECODEC_CLK, 0);
912static DEFINE_CLK_PCOM(gp_clk, GP_CLK, 0);
913static DEFINE_CLK_PCOM(i2c_clk, I2C_CLK, 0);
914static DEFINE_CLK_PCOM(icodec_rx_clk, ICODEC_RX_CLK, 0);
915static DEFINE_CLK_PCOM(icodec_tx_clk, ICODEC_TX_CLK, 0);
916static DEFINE_CLK_PCOM(imem_clk, IMEM_CLK, OFF);
917static DEFINE_CLK_PCOM(mdc_clk, MDC_CLK, 0);
918static DEFINE_CLK_PCOM(pmdh_clk, PMDH_CLK, OFF | CLK_MINMAX);
919static DEFINE_CLK_PCOM(mdp_clk, MDP_CLK, OFF);
920static DEFINE_CLK_PCOM(mdp_lcdc_pclk_clk, MDP_LCDC_PCLK_CLK, 0);
921static DEFINE_CLK_PCOM(mdp_lcdc_pad_pclk_clk, MDP_LCDC_PAD_PCLK_CLK, 0);
922static DEFINE_CLK_PCOM(mdp_vsync_clk, MDP_VSYNC_CLK, OFF);
923static DEFINE_CLK_PCOM(pbus_clk, PBUS_CLK, CLK_MIN);
924static DEFINE_CLK_PCOM(pcm_clk, PCM_CLK, 0);
925static DEFINE_CLK_PCOM(sdac_clk, SDAC_CLK, OFF);
926static DEFINE_CLK_PCOM(sdc1_clk, SDC1_CLK, OFF);
927static DEFINE_CLK_PCOM(sdc1_p_clk, SDC1_P_CLK, OFF);
928static DEFINE_CLK_PCOM(sdc2_clk, SDC2_CLK, OFF);
929static DEFINE_CLK_PCOM(sdc2_p_clk, SDC2_P_CLK, OFF);
930static DEFINE_CLK_PCOM(sdc3_clk, SDC3_CLK, OFF);
931static DEFINE_CLK_PCOM(sdc3_p_clk, SDC3_P_CLK, OFF);
932static DEFINE_CLK_PCOM(sdc4_clk, SDC4_CLK, OFF);
933static DEFINE_CLK_PCOM(sdc4_p_clk, SDC4_P_CLK, OFF);
934static DEFINE_CLK_PCOM(uart1_clk, UART1_CLK, OFF);
935static DEFINE_CLK_PCOM(uart2_clk, UART2_CLK, 0);
936static DEFINE_CLK_PCOM(uart3_clk, UART3_CLK, OFF);
937static DEFINE_CLK_PCOM(uart1dm_clk, UART1DM_CLK, OFF);
938static DEFINE_CLK_PCOM(uart2dm_clk, UART2DM_CLK, 0);
939static DEFINE_CLK_PCOM(usb_hs_clk, USB_HS_CLK, OFF);
940static DEFINE_CLK_PCOM(usb_hs_p_clk, USB_HS_P_CLK, OFF);
941static DEFINE_CLK_PCOM(usb_otg_clk, USB_OTG_CLK, 0);
942static DEFINE_CLK_PCOM(vdc_clk, VDC_CLK, OFF | CLK_MIN);
943static DEFINE_CLK_PCOM(vfe_clk, VFE_CLK, OFF);
944static DEFINE_CLK_PCOM(vfe_mdc_clk, VFE_MDC_CLK, OFF);
945
946struct clk_lookup msm_clocks_7x25[] = {
Matt Wagantalle1a86062011-08-18 17:46:10 -0700947 CLK_LOOKUP("core_clk", adm_clk.c, "msm_dmov"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700948 CLK_LOOKUP("adsp_clk", adsp_clk.c, NULL),
949 CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
950 CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL),
951 CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL),
Matt Wagantallb86ad262011-10-24 19:50:29 -0700952 CLK_LOOKUP("core_clk", gp_clk.c, NULL),
Matt Wagantallac294852011-08-17 15:44:58 -0700953 CLK_LOOKUP("core_clk", i2c_clk.c, "msm_i2c.0"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700954 CLK_LOOKUP("icodec_rx_clk", icodec_rx_clk.c, NULL),
955 CLK_LOOKUP("icodec_tx_clk", icodec_tx_clk.c, NULL),
Matt Wagantall9dc01632011-08-17 18:55:04 -0700956 CLK_LOOKUP("mem_clk", imem_clk.c, NULL),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700957 CLK_LOOKUP("mdc_clk", mdc_clk.c, NULL),
958 CLK_LOOKUP("mddi_clk", pmdh_clk.c, NULL),
959 CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL),
960 CLK_LOOKUP("mdp_lcdc_pclk_clk", mdp_lcdc_pclk_clk.c, NULL),
961 CLK_LOOKUP("mdp_lcdc_pad_pclk_clk", mdp_lcdc_pad_pclk_clk.c, NULL),
962 CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
963 CLK_LOOKUP("pbus_clk", pbus_clk.c, NULL),
964 CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL),
965 CLK_LOOKUP("sdac_clk", sdac_clk.c, NULL),
Matt Wagantall37ce3842011-08-17 16:00:36 -0700966 CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"),
967 CLK_LOOKUP("iface_clk", sdc1_p_clk.c, "msm_sdcc.1"),
968 CLK_LOOKUP("core_clk", sdc2_clk.c, "msm_sdcc.2"),
969 CLK_LOOKUP("iface_clk", sdc2_p_clk.c, "msm_sdcc.2"),
970 CLK_LOOKUP("core_clk", sdc3_clk.c, "msm_sdcc.3"),
971 CLK_LOOKUP("iface_clk", sdc3_p_clk.c, "msm_sdcc.3"),
972 CLK_LOOKUP("core_clk", sdc4_clk.c, "msm_sdcc.4"),
973 CLK_LOOKUP("iface_clk", sdc4_p_clk.c, "msm_sdcc.4"),
Matt Wagantalle2522372011-08-17 14:52:21 -0700974 CLK_LOOKUP("core_clk", uart1_clk.c, "msm_serial.0"),
975 CLK_LOOKUP("core_clk", uart2_clk.c, "msm_serial.1"),
976 CLK_LOOKUP("core_clk", uart3_clk.c, "msm_serial.2"),
977 CLK_LOOKUP("core_clk", uart1dm_clk.c, "msm_serial_hs.0"),
978 CLK_LOOKUP("core_clk", uart2dm_clk.c, "msm_serial_hs.1"),
Manu Gautam5143b252012-01-05 19:25:23 -0800979 CLK_LOOKUP("alt_core_clk", usb_hs_clk.c, "msm_otg"),
980 CLK_LOOKUP("iface_clk", usb_hs_p_clk.c, "msm_otg"),
981 CLK_LOOKUP("alt_core_clk", usb_hs_clk.c, "msm_hsusb_peripheral"),
982 CLK_LOOKUP("iface_clk", usb_hs_p_clk.c, "msm_hsusb_peripheral"),
983 CLK_LOOKUP("alt_core_clk", usb_otg_clk.c, NULL),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700984 CLK_LOOKUP("vdc_clk", vdc_clk.c, NULL),
985 CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
986 CLK_LOOKUP("vfe_mdc_clk", vfe_mdc_clk.c, NULL),
987};
988
989unsigned msm_num_clocks_7x25 = ARRAY_SIZE(msm_clocks_7x25);
990