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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025#include <linux/regulator/pmic8901-regulator.h>
26#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <linux/msm_adc.h>
28#include <linux/m_adcproc.h>
29#include <linux/mfd/marimba.h>
30#include <linux/msm-charger.h>
31#include <linux/i2c.h>
32#include <linux/i2c/sx150x.h>
33#include <linux/smsc911x.h>
34#include <linux/spi/spi.h>
35#include <linux/input/tdisc_shinetsu.h>
36#include <linux/input/cy8c_ts.h>
37#include <linux/cyttsp.h>
38#include <linux/i2c/isa1200.h>
39#include <linux/dma-mapping.h>
40#include <linux/i2c/bq27520.h>
41
42#ifdef CONFIG_ANDROID_PMEM
43#include <linux/android_pmem.h>
44#endif
45
46#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
47#include <linux/i2c/smb137b.h>
48#endif
Lei Zhou338cab82011-08-19 13:38:17 -040049#ifdef CONFIG_SND_SOC_WM8903
50#include <sound/wm8903.h>
51#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080052#include <asm/mach-types.h>
53#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070054#include <asm/setup.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080055
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070056#include <mach/dma.h>
57#include <mach/mpp.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080058#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/irqs.h>
60#include <mach/msm_spi.h>
61#include <mach/msm_serial_hs.h>
62#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080063#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include <mach/msm_memtypes.h>
65#include <asm/mach/mmc.h>
66#include <mach/msm_battery.h>
67#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070068#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#ifdef CONFIG_MSM_DSPS
70#include <mach/msm_dsps.h>
71#endif
72#include <mach/msm_xo.h>
73#include <mach/msm_bus_board.h>
74#include <mach/socinfo.h>
75#include <linux/i2c/isl9519.h>
76#ifdef CONFIG_USB_G_ANDROID
77#include <linux/usb/android.h>
78#include <mach/usbdiag.h>
79#endif
80#include <linux/regulator/consumer.h>
81#include <linux/regulator/machine.h>
82#include <mach/sdio_al.h>
83#include <mach/rpm.h>
84#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070085#include <mach/restart.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080086
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070087#include "devices.h"
88#include "devices-msm8x60.h"
89#include "cpuidle.h"
90#include "pm.h"
91#include "mpm.h"
92#include "spm.h"
93#include "rpm_log.h"
94#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070095#include "gpiomux-8x60.h"
96#include "rpm_stats.h"
97#include "peripheral-loader.h"
98#include <linux/platform_data/qcom_crypto_device.h>
99#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700100#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600101#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700102
103#include <linux/ion.h>
104#include <mach/ion.h>
105
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700106#define MSM_SHARED_RAM_PHYS 0x40000000
107
108/* Macros assume PMIC GPIOs start at 0 */
109#define PM8058_GPIO_BASE NR_MSM_GPIOS
110#define PM8058_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio + PM8058_GPIO_BASE)
111#define PM8058_GPIO_SYS_TO_PM(sys_gpio) (sys_gpio - PM8058_GPIO_BASE)
112#define PM8058_MPP_BASE (PM8058_GPIO_BASE + PM8058_GPIOS)
113#define PM8058_MPP_PM_TO_SYS(pm_gpio) (pm_gpio + PM8058_MPP_BASE)
114#define PM8058_MPP_SYS_TO_PM(sys_gpio) (sys_gpio - PM8058_MPP_BASE)
115#define PM8058_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS)
116
117#define PM8901_GPIO_BASE (PM8058_GPIO_BASE + \
118 PM8058_GPIOS + PM8058_MPPS)
119#define PM8901_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio + PM8901_GPIO_BASE)
120#define PM8901_GPIO_SYS_TO_PM(sys_gpio) (sys_gpio - PM901_GPIO_BASE)
121#define PM8901_IRQ_BASE (PM8058_IRQ_BASE + \
122 NR_PMIC8058_IRQS)
123
124#define MDM2AP_SYNC 129
125
Terence Hampson1c73fef2011-07-19 17:10:49 -0400126#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700127#define LCDC_SPI_GPIO_CLK 73
128#define LCDC_SPI_GPIO_CS 72
129#define LCDC_SPI_GPIO_MOSI 70
130#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
131#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
132#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
133#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
134#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400135#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700137#define PANEL_NAME_MAX_LEN 30
138#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
139#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
140#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
141#define HDMI_PANEL_NAME "hdmi_msm"
142#define TVOUT_PANEL_NAME "tvout_msm"
143
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700144#define DSPS_PIL_GENERIC_NAME "dsps"
145#define DSPS_PIL_FLUID_NAME "dsps_fluid"
146
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800147#ifdef CONFIG_ION_MSM
148static struct platform_device ion_dev;
149#endif
150
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700151enum {
152 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
153 GPIO_EXPANDER_GPIO_BASE = PM8901_GPIO_BASE + PM8901_MPPS,
154 /* CORE expander */
155 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
156 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
157 GPIO_WLAN_DEEP_SLEEP_N,
158 GPIO_LVDS_SHUTDOWN_N,
159 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
160 GPIO_MS_SYS_RESET_N,
161 GPIO_CAP_TS_RESOUT_N,
162 GPIO_CAP_GAUGE_BI_TOUT,
163 GPIO_ETHERNET_PME,
164 GPIO_EXT_GPS_LNA_EN,
165 GPIO_MSM_WAKES_BT,
166 GPIO_ETHERNET_RESET_N,
167 GPIO_HEADSET_DET_N,
168 GPIO_USB_UICC_EN,
169 GPIO_BACKLIGHT_EN,
170 GPIO_EXT_CAMIF_PWR_EN,
171 GPIO_BATT_GAUGE_INT_N,
172 GPIO_BATT_GAUGE_EN,
173 /* DOCKING expander */
174 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
175 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
176 GPIO_AUX_JTAG_DET_N,
177 GPIO_DONGLE_DET_N,
178 GPIO_SVIDEO_LOAD_DET,
179 GPIO_SVID_AMP_SHUTDOWN1_N,
180 GPIO_SVID_AMP_SHUTDOWN0_N,
181 GPIO_SDC_WP,
182 GPIO_IRDA_PWDN,
183 GPIO_IRDA_RESET_N,
184 GPIO_DONGLE_GPIO0,
185 GPIO_DONGLE_GPIO1,
186 GPIO_DONGLE_GPIO2,
187 GPIO_DONGLE_GPIO3,
188 GPIO_DONGLE_PWR_EN,
189 GPIO_EMMC_RESET_N,
190 GPIO_TP_EXP2_IO15,
191 /* SURF expander */
192 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
193 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
194 GPIO_SD_CARD_DET_2,
195 GPIO_SD_CARD_DET_4,
196 GPIO_SD_CARD_DET_5,
197 GPIO_UIM3_RST,
198 GPIO_SURF_EXPANDER_IO5,
199 GPIO_SURF_EXPANDER_IO6,
200 GPIO_ADC_I2C_EN,
201 GPIO_SURF_EXPANDER_IO8,
202 GPIO_SURF_EXPANDER_IO9,
203 GPIO_SURF_EXPANDER_IO10,
204 GPIO_SURF_EXPANDER_IO11,
205 GPIO_SURF_EXPANDER_IO12,
206 GPIO_SURF_EXPANDER_IO13,
207 GPIO_SURF_EXPANDER_IO14,
208 GPIO_SURF_EXPANDER_IO15,
209 /* LEFT KB IO expander */
210 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
211 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
212 GPIO_LEFT_LED_2,
213 GPIO_LEFT_LED_3,
214 GPIO_LEFT_LED_WLAN,
215 GPIO_JOYSTICK_EN,
216 GPIO_CAP_TS_SLEEP,
217 GPIO_LEFT_KB_IO6,
218 GPIO_LEFT_LED_5,
219 /* RIGHT KB IO expander */
220 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
221 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
222 GPIO_RIGHT_LED_2,
223 GPIO_RIGHT_LED_3,
224 GPIO_RIGHT_LED_BT,
225 GPIO_WEB_CAMIF_STANDBY,
226 GPIO_COMPASS_RST_N,
227 GPIO_WEB_CAMIF_RESET_N,
228 GPIO_RIGHT_LED_5,
229 GPIO_R_ALTIMETER_RESET_N,
230 /* FLUID S IO expander */
231 GPIO_SOUTH_EXPANDER_BASE,
232 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
233 GPIO_MIC1_ANCL_SEL,
234 GPIO_HS_MIC4_SEL,
235 GPIO_FML_MIC3_SEL,
236 GPIO_FMR_MIC5_SEL,
237 GPIO_TS_SLEEP,
238 GPIO_HAP_SHIFT_LVL_OE,
239 GPIO_HS_SW_DIR,
240 /* FLUID N IO expander */
241 GPIO_NORTH_EXPANDER_BASE,
242 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
243 GPIO_EPM_5V_BOOST_EN,
244 GPIO_AUX_CAM_2P7_EN,
245 GPIO_LED_FLASH_EN,
246 GPIO_LED1_GREEN_N,
247 GPIO_LED2_RED_N,
248 GPIO_FRONT_CAM_RESET_N,
249 GPIO_EPM_LVLSFT_EN,
250 GPIO_N_ALTIMETER_RESET_N,
251 /* EPM expander */
252 GPIO_EPM_EXPANDER_BASE,
253 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
254 GPIO_PWR_MON_RESET_N,
255 GPIO_ADC1_PWDN_N,
256 GPIO_ADC2_PWDN_N,
257 GPIO_EPM_EXPANDER_IO4,
258 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
259 GPIO_ADC2_MUX_SPI_INT_N,
260 GPIO_EPM_EXPANDER_IO7,
261 GPIO_PWR_MON_ENABLE,
262 GPIO_EPM_SPI_ADC1_CS_N,
263 GPIO_EPM_SPI_ADC2_CS_N,
264 GPIO_EPM_EXPANDER_IO11,
265 GPIO_EPM_EXPANDER_IO12,
266 GPIO_EPM_EXPANDER_IO13,
267 GPIO_EPM_EXPANDER_IO14,
268 GPIO_EPM_EXPANDER_IO15,
269};
270
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530271struct pm8xxx_mpp_init_info {
272 unsigned mpp;
273 struct pm8xxx_mpp_config_data config;
274};
275
276#define PM8XXX_MPP_INIT(_mpp, _type, _level, _control) \
277{ \
278 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
279 .config = { \
280 .type = PM8XXX_MPP_TYPE_##_type, \
281 .level = _level, \
282 .control = PM8XXX_MPP_##_control, \
283 } \
284}
285
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700286/*
287 * The UI_INTx_N lines are pmic gpio lines which connect i2c
288 * gpio expanders to the pm8058.
289 */
290#define UI_INT1_N 25
291#define UI_INT2_N 34
292#define UI_INT3_N 14
293/*
294FM GPIO is GPIO 18 on PMIC 8058.
295As the index starts from 0 in the PMIC driver, and hence 17
296corresponds to GPIO 18 on PMIC 8058.
297*/
298#define FM_GPIO 17
299
300#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
301static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
302static void *sdc2_status_notify_cb_devid;
303#endif
304
305#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
306static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
307static void *sdc5_status_notify_cb_devid;
308#endif
309
310static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
311 [0] = {
312 .reg_base_addr = MSM_SAW0_BASE,
313
314#ifdef CONFIG_MSM_AVS_HW
315 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
316#endif
317 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
318 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
319 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
320 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
321
322 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
323 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
324 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
325
326 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
327 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
328 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
329
330 .awake_vlevel = 0x94,
331 .retention_vlevel = 0x81,
332 .collapse_vlevel = 0x20,
333 .retention_mid_vlevel = 0x94,
334 .collapse_mid_vlevel = 0x8C,
335
336 .vctl_timeout_us = 50,
337 },
338
339 [1] = {
340 .reg_base_addr = MSM_SAW1_BASE,
341
342#ifdef CONFIG_MSM_AVS_HW
343 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
344#endif
345 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
346 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
347 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
348 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
349
350 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
351 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
352 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
353
354 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
355 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
356 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
357
358 .awake_vlevel = 0x94,
359 .retention_vlevel = 0x81,
360 .collapse_vlevel = 0x20,
361 .retention_mid_vlevel = 0x94,
362 .collapse_mid_vlevel = 0x8C,
363
364 .vctl_timeout_us = 50,
365 },
366};
367
368static struct msm_spm_platform_data msm_spm_data[] __initdata = {
369 [0] = {
370 .reg_base_addr = MSM_SAW0_BASE,
371
372#ifdef CONFIG_MSM_AVS_HW
373 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
374#endif
375 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
376 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
377 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
378 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
379
380 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
381 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
382 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
383
384 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
385 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
386 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
387
388 .awake_vlevel = 0xA0,
389 .retention_vlevel = 0x89,
390 .collapse_vlevel = 0x20,
391 .retention_mid_vlevel = 0x89,
392 .collapse_mid_vlevel = 0x89,
393
394 .vctl_timeout_us = 50,
395 },
396
397 [1] = {
398 .reg_base_addr = MSM_SAW1_BASE,
399
400#ifdef CONFIG_MSM_AVS_HW
401 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
402#endif
403 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
404 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
405 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
406 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
407
408 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
409 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
410 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
411
412 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
413 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
414 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
415
416 .awake_vlevel = 0xA0,
417 .retention_vlevel = 0x89,
418 .collapse_vlevel = 0x20,
419 .retention_mid_vlevel = 0x89,
420 .collapse_mid_vlevel = 0x89,
421
422 .vctl_timeout_us = 50,
423 },
424};
425
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700426/*
427 * Consumer specific regulator names:
428 * regulator name consumer dev_name
429 */
430static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
431 REGULATOR_SUPPLY("8901_s0", NULL),
432};
433static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
434 REGULATOR_SUPPLY("8901_s1", NULL),
435};
436
437static struct regulator_init_data saw_s0_init_data = {
438 .constraints = {
439 .name = "8901_s0",
440 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700441 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700442 .max_uV = 1250000,
443 },
444 .consumer_supplies = vreg_consumers_8901_S0,
445 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
446};
447
448static struct regulator_init_data saw_s1_init_data = {
449 .constraints = {
450 .name = "8901_s1",
451 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700452 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700453 .max_uV = 1250000,
454 },
455 .consumer_supplies = vreg_consumers_8901_S1,
456 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
457};
458
459static struct platform_device msm_device_saw_s0 = {
460 .name = "saw-regulator",
461 .id = 0,
462 .dev = {
463 .platform_data = &saw_s0_init_data,
464 },
465};
466
467static struct platform_device msm_device_saw_s1 = {
468 .name = "saw-regulator",
469 .id = 1,
470 .dev = {
471 .platform_data = &saw_s1_init_data,
472 },
473};
474
475/*
476 * The smc91x configuration varies depending on platform.
477 * The resources data structure is filled in at runtime.
478 */
479static struct resource smc91x_resources[] = {
480 [0] = {
481 .flags = IORESOURCE_MEM,
482 },
483 [1] = {
484 .flags = IORESOURCE_IRQ,
485 },
486};
487
488static struct platform_device smc91x_device = {
489 .name = "smc91x",
490 .id = 0,
491 .num_resources = ARRAY_SIZE(smc91x_resources),
492 .resource = smc91x_resources,
493};
494
495static struct resource smsc911x_resources[] = {
496 [0] = {
497 .flags = IORESOURCE_MEM,
498 .start = 0x1b800000,
499 .end = 0x1b8000ff
500 },
501 [1] = {
502 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
503 },
504};
505
506static struct smsc911x_platform_config smsc911x_config = {
507 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
508 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
509 .flags = SMSC911X_USE_16BIT,
510 .has_reset_gpio = 1,
511 .reset_gpio = GPIO_ETHERNET_RESET_N
512};
513
514static struct platform_device smsc911x_device = {
515 .name = "smsc911x",
516 .id = 0,
517 .num_resources = ARRAY_SIZE(smsc911x_resources),
518 .resource = smsc911x_resources,
519 .dev = {
520 .platform_data = &smsc911x_config
521 }
522};
523
524#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
525 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
526 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
527 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
528
529#define QCE_SIZE 0x10000
530#define QCE_0_BASE 0x18500000
531
532#define QCE_HW_KEY_SUPPORT 0
533#define QCE_SHA_HMAC_SUPPORT 0
534#define QCE_SHARE_CE_RESOURCE 2
535#define QCE_CE_SHARED 1
536
537static struct resource qcrypto_resources[] = {
538 [0] = {
539 .start = QCE_0_BASE,
540 .end = QCE_0_BASE + QCE_SIZE - 1,
541 .flags = IORESOURCE_MEM,
542 },
543 [1] = {
544 .name = "crypto_channels",
545 .start = DMOV_CE_IN_CHAN,
546 .end = DMOV_CE_OUT_CHAN,
547 .flags = IORESOURCE_DMA,
548 },
549 [2] = {
550 .name = "crypto_crci_in",
551 .start = DMOV_CE_IN_CRCI,
552 .end = DMOV_CE_IN_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [3] = {
556 .name = "crypto_crci_out",
557 .start = DMOV_CE_OUT_CRCI,
558 .end = DMOV_CE_OUT_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561 [4] = {
562 .name = "crypto_crci_hash",
563 .start = DMOV_CE_HASH_CRCI,
564 .end = DMOV_CE_HASH_CRCI,
565 .flags = IORESOURCE_DMA,
566 },
567};
568
569static struct resource qcedev_resources[] = {
570 [0] = {
571 .start = QCE_0_BASE,
572 .end = QCE_0_BASE + QCE_SIZE - 1,
573 .flags = IORESOURCE_MEM,
574 },
575 [1] = {
576 .name = "crypto_channels",
577 .start = DMOV_CE_IN_CHAN,
578 .end = DMOV_CE_OUT_CHAN,
579 .flags = IORESOURCE_DMA,
580 },
581 [2] = {
582 .name = "crypto_crci_in",
583 .start = DMOV_CE_IN_CRCI,
584 .end = DMOV_CE_IN_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [3] = {
588 .name = "crypto_crci_out",
589 .start = DMOV_CE_OUT_CRCI,
590 .end = DMOV_CE_OUT_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593 [4] = {
594 .name = "crypto_crci_hash",
595 .start = DMOV_CE_HASH_CRCI,
596 .end = DMOV_CE_HASH_CRCI,
597 .flags = IORESOURCE_DMA,
598 },
599};
600
601#endif
602
603#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
604 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
605
606static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
607 .ce_shared = QCE_CE_SHARED,
608 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
609 .hw_key_support = QCE_HW_KEY_SUPPORT,
610 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
611};
612
613static struct platform_device qcrypto_device = {
614 .name = "qcrypto",
615 .id = 0,
616 .num_resources = ARRAY_SIZE(qcrypto_resources),
617 .resource = qcrypto_resources,
618 .dev = {
619 .coherent_dma_mask = DMA_BIT_MASK(32),
620 .platform_data = &qcrypto_ce_hw_suppport,
621 },
622};
623#endif
624
625#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
626 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
627
628static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
629 .ce_shared = QCE_CE_SHARED,
630 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
631 .hw_key_support = QCE_HW_KEY_SUPPORT,
632 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
633};
634
635static struct platform_device qcedev_device = {
636 .name = "qce",
637 .id = 0,
638 .num_resources = ARRAY_SIZE(qcedev_resources),
639 .resource = qcedev_resources,
640 .dev = {
641 .coherent_dma_mask = DMA_BIT_MASK(32),
642 .platform_data = &qcedev_ce_hw_suppport,
643 },
644};
645#endif
646
647#if defined(CONFIG_HAPTIC_ISA1200) || \
648 defined(CONFIG_HAPTIC_ISA1200_MODULE)
649
650static const char *vregs_isa1200_name[] = {
651 "8058_s3",
652 "8901_l4",
653};
654
655static const int vregs_isa1200_val[] = {
656 1800000,/* uV */
657 2600000,
658};
659static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
660static struct msm_xo_voter *xo_handle_a1;
661
662static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800663{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700664 int i, rc = 0;
665
666 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
667 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
668 regulator_disable(vregs_isa1200[i]);
669 if (rc < 0) {
670 pr_err("%s: vreg %s %s failed (%d)\n",
671 __func__, vregs_isa1200_name[i],
672 vreg_on ? "enable" : "disable", rc);
673 goto vreg_fail;
674 }
675 }
676
677 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
678 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
679 if (rc < 0) {
680 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
681 __func__, vreg_on ? "" : "de-", rc);
682 goto vreg_fail;
683 }
684 return 0;
685
686vreg_fail:
687 while (i--)
688 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
689 regulator_disable(vregs_isa1200[i]);
690 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800691}
692
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800694{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700695 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800696
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700697 if (enable == true) {
698 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
699 vregs_isa1200[i] = regulator_get(NULL,
700 vregs_isa1200_name[i]);
701 if (IS_ERR(vregs_isa1200[i])) {
702 pr_err("%s: regulator get of %s failed (%ld)\n",
703 __func__, vregs_isa1200_name[i],
704 PTR_ERR(vregs_isa1200[i]));
705 rc = PTR_ERR(vregs_isa1200[i]);
706 goto vreg_get_fail;
707 }
708 rc = regulator_set_voltage(vregs_isa1200[i],
709 vregs_isa1200_val[i], vregs_isa1200_val[i]);
710 if (rc) {
711 pr_err("%s: regulator_set_voltage(%s) failed\n",
712 __func__, vregs_isa1200_name[i]);
713 goto vreg_get_fail;
714 }
715 }
Steve Muckle9161d302010-02-11 11:50:40 -0800716
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700717 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
718 if (rc) {
719 pr_err("%s: unable to request gpio %d (%d)\n",
720 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
721 goto vreg_get_fail;
722 }
Steve Muckle9161d302010-02-11 11:50:40 -0800723
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700724 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
725 if (rc) {
726 pr_err("%s: Unable to set direction\n", __func__);;
727 goto free_gpio;
728 }
729
730 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
731 if (IS_ERR(xo_handle_a1)) {
732 rc = PTR_ERR(xo_handle_a1);
733 pr_err("%s: failed to get the handle for A1(%d)\n",
734 __func__, rc);
735 goto gpio_set_dir;
736 }
737 } else {
738 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
739 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
740
741 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
742 regulator_put(vregs_isa1200[i]);
743
744 msm_xo_put(xo_handle_a1);
745 }
746
747 return 0;
748gpio_set_dir:
749 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
750free_gpio:
751 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
752vreg_get_fail:
753 while (i)
754 regulator_put(vregs_isa1200[--i]);
755 return rc;
756}
757
758#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530759#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700760static struct isa1200_platform_data isa1200_1_pdata = {
761 .name = "vibrator",
762 .power_on = isa1200_power,
763 .dev_setup = isa1200_dev_setup,
764 /*gpio to enable haptic*/
765 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530766 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700767 .max_timeout = 15000,
768 .mode_ctrl = PWM_GEN_MODE,
769 .pwm_fd = {
770 .pwm_div = 256,
771 },
772 .is_erm = false,
773 .smart_en = true,
774 .ext_clk_en = true,
775 .chip_en = 1,
776};
777
778static struct i2c_board_info msm_isa1200_board_info[] = {
779 {
780 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
781 .platform_data = &isa1200_1_pdata,
782 },
783};
784#endif
785
786#if defined(CONFIG_BATTERY_BQ27520) || \
787 defined(CONFIG_BATTERY_BQ27520_MODULE)
788static struct bq27520_platform_data bq27520_pdata = {
789 .name = "fuel-gauge",
790 .vreg_name = "8058_s3",
791 .vreg_value = 1800000,
792 .soc_int = GPIO_BATT_GAUGE_INT_N,
793 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
794 .chip_en = GPIO_BATT_GAUGE_EN,
795 .enable_dlog = 0, /* if enable coulomb counter logger */
796};
797
798static struct i2c_board_info msm_bq27520_board_info[] = {
799 {
800 I2C_BOARD_INFO("bq27520", 0xaa>>1),
801 .platform_data = &bq27520_pdata,
802 },
803};
804#endif
805
806static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
807 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
808 .idle_supported = 1,
809 .suspend_supported = 1,
810 .idle_enabled = 0,
811 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700812 },
813
814 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
815 .idle_supported = 1,
816 .suspend_supported = 1,
817 .idle_enabled = 0,
818 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700819 },
820
821 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
822 .idle_supported = 1,
823 .suspend_supported = 1,
824 .idle_enabled = 1,
825 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700826 },
827
828 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
829 .idle_supported = 1,
830 .suspend_supported = 1,
831 .idle_enabled = 0,
832 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700833 },
834
835 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
836 .idle_supported = 1,
837 .suspend_supported = 1,
838 .idle_enabled = 0,
839 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700840 },
841
842 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
843 .idle_supported = 1,
844 .suspend_supported = 1,
845 .idle_enabled = 1,
846 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700847 },
848};
849
850static struct msm_cpuidle_state msm_cstates[] __initdata = {
851 {0, 0, "C0", "WFI",
852 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
853
854 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
855 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
856
857 {0, 2, "C2", "POWER_COLLAPSE",
858 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
859
860 {1, 0, "C0", "WFI",
861 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
862
863 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
864 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
865};
866
867static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
868 {
869 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
870 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
871 true,
872 1, 8000, 100000, 1,
873 },
874
875 {
876 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
877 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
878 true,
879 1500, 5000, 60100000, 3000,
880 },
881
882 {
883 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
884 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
885 false,
886 1800, 5000, 60350000, 3500,
887 },
888 {
889 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
890 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
891 false,
892 3800, 4500, 65350000, 5500,
893 },
894
895 {
896 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
897 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
898 false,
899 2800, 2500, 66850000, 4800,
900 },
901
902 {
903 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
904 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
905 false,
906 4800, 2000, 71850000, 6800,
907 },
908
909 {
910 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
911 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
912 false,
913 6800, 500, 75850000, 8800,
914 },
915
916 {
917 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
918 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
919 false,
920 7800, 0, 76350000, 9800,
921 },
922};
923
924#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
925
926#define ISP1763_INT_GPIO 117
927#define ISP1763_RST_GPIO 152
928static struct resource isp1763_resources[] = {
929 [0] = {
930 .flags = IORESOURCE_MEM,
931 .start = 0x1D000000,
932 .end = 0x1D005FFF, /* 24KB */
933 },
934 [1] = {
935 .flags = IORESOURCE_IRQ,
936 },
937};
938static void __init msm8x60_cfg_isp1763(void)
939{
940 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
941 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
942}
943
944static int isp1763_setup_gpio(int enable)
945{
946 int status = 0;
947
948 if (enable) {
949 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
950 if (status) {
951 pr_err("%s:Failed to request GPIO %d\n",
952 __func__, ISP1763_INT_GPIO);
953 return status;
954 }
955 status = gpio_direction_input(ISP1763_INT_GPIO);
956 if (status) {
957 pr_err("%s:Failed to configure GPIO %d\n",
958 __func__, ISP1763_INT_GPIO);
959 goto gpio_free_int;
960 }
961 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
962 if (status) {
963 pr_err("%s:Failed to request GPIO %d\n",
964 __func__, ISP1763_RST_GPIO);
965 goto gpio_free_int;
966 }
967 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
968 if (status) {
969 pr_err("%s:Failed to configure GPIO %d\n",
970 __func__, ISP1763_RST_GPIO);
971 goto gpio_free_rst;
972 }
973 pr_debug("\nISP GPIO configuration done\n");
974 return status;
975 }
976
977gpio_free_rst:
978 gpio_free(ISP1763_RST_GPIO);
979gpio_free_int:
980 gpio_free(ISP1763_INT_GPIO);
981
982 return status;
983}
984static struct isp1763_platform_data isp1763_pdata = {
985 .reset_gpio = ISP1763_RST_GPIO,
986 .setup_gpio = isp1763_setup_gpio
987};
988
989static struct platform_device isp1763_device = {
990 .name = "isp1763_usb",
991 .num_resources = ARRAY_SIZE(isp1763_resources),
992 .resource = isp1763_resources,
993 .dev = {
994 .platform_data = &isp1763_pdata
995 }
996};
997#endif
998
999#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301000static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001001static struct regulator *ldo6_3p3;
1002static struct regulator *ldo7_1p8;
1003static struct regulator *vdd_cx;
1004#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301005#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001006notify_vbus_state notify_vbus_state_func_ptr;
1007static int usb_phy_susp_dig_vol = 750000;
1008static int pmic_id_notif_supported;
1009
1010#ifdef CONFIG_USB_EHCI_MSM_72K
1011#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1012struct delayed_work pmic_id_det;
1013
1014static int __init usb_id_pin_rework_setup(char *support)
1015{
1016 if (strncmp(support, "true", 4) == 0)
1017 pmic_id_notif_supported = 1;
1018
1019 return 1;
1020}
1021__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1022
1023static void pmic_id_detect(struct work_struct *w)
1024{
1025 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1026 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1027
1028 if (notify_vbus_state_func_ptr)
1029 (*notify_vbus_state_func_ptr) (val);
1030}
1031
1032static irqreturn_t pmic_id_on_irq(int irq, void *data)
1033{
1034 /*
1035 * Spurious interrupts are observed on pmic gpio line
1036 * even though there is no state change on USB ID. Schedule the
1037 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001038 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001039 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001040
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001041 return IRQ_HANDLED;
1042}
1043
Anji jonnalaae745e92011-11-14 18:34:31 +05301044static int msm_hsusb_phy_id_setup_init(int init)
1045{
1046 unsigned ret;
1047
1048 if (init) {
1049 ret = pm8901_mpp_config_digital_out(1,
1050 PM8901_MPP_DIG_LEVEL_L5, 1);
1051 if (ret < 0)
1052 pr_err("%s:MPP2 configuration failed\n", __func__);
1053 } else {
1054 ret = pm8901_mpp_config_digital_out(1,
1055 PM8901_MPP_DIG_LEVEL_L5, 0);
1056 if (ret < 0)
1057 pr_err("%s:MPP2 un config failed\n", __func__);
1058 }
1059 return ret;
1060}
1061
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001062static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1063{
1064 unsigned ret = -ENODEV;
1065
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301066 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301067 .direction = PM_GPIO_DIR_IN,
1068 .pull = PM_GPIO_PULL_UP_1P5,
1069 .function = PM_GPIO_FUNC_NORMAL,
1070 .vin_sel = 2,
1071 .inv_int_pol = 0,
1072 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301073 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301074 .direction = PM_GPIO_DIR_IN,
1075 .pull = PM_GPIO_PULL_NO,
1076 .function = PM_GPIO_FUNC_NORMAL,
1077 .vin_sel = 2,
1078 .inv_int_pol = 0,
1079 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001080 if (!callback)
1081 return -EINVAL;
1082
1083 if (machine_is_msm8x60_fluid())
1084 return -ENOTSUPP;
1085
1086 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1087 pr_debug("%s: USB_ID pin is not routed to PMIC"
1088 "on V1 surf/ffa\n", __func__);
1089 return -ENOTSUPP;
1090 }
1091
Manu Gautam62158eb2011-11-24 16:20:46 +05301092 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1093 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001094 pr_debug("%s: USB_ID is not routed to PMIC"
1095 "on V2 ffa\n", __func__);
1096 return -ENOTSUPP;
1097 }
1098
1099 usb_phy_susp_dig_vol = 500000;
1100
1101 if (init) {
1102 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301103 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301104 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1105 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301106 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301107 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301108 __func__, ret);
1109 return ret;
1110 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001111 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1112 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1113 "msm_otg_id", NULL);
1114 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001115 pr_err("%s:pmic_usb_id interrupt registration failed",
1116 __func__);
1117 return ret;
1118 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301119 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001120 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301121 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001122 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301123 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1124 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301125 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301126 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301127 __func__, ret);
1128 return ret;
1129 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301130 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001131 cancel_delayed_work_sync(&pmic_id_det);
1132 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001133 }
1134 return 0;
1135}
1136#endif
1137
1138#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1139#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1140static int msm_hsusb_init_vddcx(int init)
1141{
1142 int ret = 0;
1143
1144 if (init) {
1145 vdd_cx = regulator_get(NULL, "8058_s1");
1146 if (IS_ERR(vdd_cx)) {
1147 return PTR_ERR(vdd_cx);
1148 }
1149
1150 ret = regulator_set_voltage(vdd_cx,
1151 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1152 USB_PHY_MAX_VDD_DIG_VOL);
1153 if (ret) {
1154 pr_err("%s: unable to set the voltage for regulator"
1155 "vdd_cx\n", __func__);
1156 regulator_put(vdd_cx);
1157 return ret;
1158 }
1159
1160 ret = regulator_enable(vdd_cx);
1161 if (ret) {
1162 pr_err("%s: unable to enable regulator"
1163 "vdd_cx\n", __func__);
1164 regulator_put(vdd_cx);
1165 }
1166 } else {
1167 ret = regulator_disable(vdd_cx);
1168 if (ret) {
1169 pr_err("%s: Unable to disable the regulator:"
1170 "vdd_cx\n", __func__);
1171 return ret;
1172 }
1173
1174 regulator_put(vdd_cx);
1175 }
1176
1177 return ret;
1178}
1179
1180static int msm_hsusb_config_vddcx(int high)
1181{
1182 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1183 int min_vol;
1184 int ret;
1185
1186 if (high)
1187 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1188 else
1189 min_vol = usb_phy_susp_dig_vol;
1190
1191 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1192 if (ret) {
1193 pr_err("%s: unable to set the voltage for regulator"
1194 "vdd_cx\n", __func__);
1195 return ret;
1196 }
1197
1198 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1199
1200 return ret;
1201}
1202
1203#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1204#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1205#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1206#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1207
1208#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1209#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1210#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1211#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1212static int msm_hsusb_ldo_init(int init)
1213{
1214 int rc = 0;
1215
1216 if (init) {
1217 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1218 if (IS_ERR(ldo6_3p3))
1219 return PTR_ERR(ldo6_3p3);
1220
1221 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1222 if (IS_ERR(ldo7_1p8)) {
1223 rc = PTR_ERR(ldo7_1p8);
1224 goto put_3p3;
1225 }
1226
1227 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1228 USB_PHY_3P3_VOL_MAX);
1229 if (rc) {
1230 pr_err("%s: Unable to set voltage level for"
1231 "ldo6_3p3 regulator\n", __func__);
1232 goto put_1p8;
1233 }
1234 rc = regulator_enable(ldo6_3p3);
1235 if (rc) {
1236 pr_err("%s: Unable to enable the regulator:"
1237 "ldo6_3p3\n", __func__);
1238 goto put_1p8;
1239 }
1240 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1241 USB_PHY_1P8_VOL_MAX);
1242 if (rc) {
1243 pr_err("%s: Unable to set voltage level for"
1244 "ldo7_1p8 regulator\n", __func__);
1245 goto disable_3p3;
1246 }
1247 rc = regulator_enable(ldo7_1p8);
1248 if (rc) {
1249 pr_err("%s: Unable to enable the regulator:"
1250 "ldo7_1p8\n", __func__);
1251 goto disable_3p3;
1252 }
1253
1254 return 0;
1255 }
1256
1257 regulator_disable(ldo7_1p8);
1258disable_3p3:
1259 regulator_disable(ldo6_3p3);
1260put_1p8:
1261 regulator_put(ldo7_1p8);
1262put_3p3:
1263 regulator_put(ldo6_3p3);
1264 return rc;
1265}
1266
1267static int msm_hsusb_ldo_enable(int on)
1268{
1269 int ret = 0;
1270
1271 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1272 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1273 return -ENODEV;
1274 }
1275
1276 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1277 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1278 return -ENODEV;
1279 }
1280
1281 if (on) {
1282 ret = regulator_set_optimum_mode(ldo7_1p8,
1283 USB_PHY_1P8_HPM_LOAD);
1284 if (ret < 0) {
1285 pr_err("%s: Unable to set HPM of the regulator:"
1286 "ldo7_1p8\n", __func__);
1287 return ret;
1288 }
1289 ret = regulator_set_optimum_mode(ldo6_3p3,
1290 USB_PHY_3P3_HPM_LOAD);
1291 if (ret < 0) {
1292 pr_err("%s: Unable to set HPM of the regulator:"
1293 "ldo6_3p3\n", __func__);
1294 regulator_set_optimum_mode(ldo7_1p8,
1295 USB_PHY_1P8_LPM_LOAD);
1296 return ret;
1297 }
1298 } else {
1299 ret = regulator_set_optimum_mode(ldo7_1p8,
1300 USB_PHY_1P8_LPM_LOAD);
1301 if (ret < 0)
1302 pr_err("%s: Unable to set LPM of the regulator:"
1303 "ldo7_1p8\n", __func__);
1304 ret = regulator_set_optimum_mode(ldo6_3p3,
1305 USB_PHY_3P3_LPM_LOAD);
1306 if (ret < 0)
1307 pr_err("%s: Unable to set LPM of the regulator:"
1308 "ldo6_3p3\n", __func__);
1309 }
1310
1311 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1312 return ret < 0 ? ret : 0;
1313 }
1314#endif
1315#ifdef CONFIG_USB_EHCI_MSM_72K
1316#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1317static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1318{
1319 static int vbus_is_on;
1320
1321 /* If VBUS is already on (or off), do nothing. */
1322 if (on == vbus_is_on)
1323 return;
1324 smb137b_otg_power(on);
1325 vbus_is_on = on;
1326}
1327#endif
1328static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1329{
1330 static struct regulator *votg_5v_switch;
1331 static struct regulator *ext_5v_reg;
1332 static int vbus_is_on;
1333
1334 /* If VBUS is already on (or off), do nothing. */
1335 if (on == vbus_is_on)
1336 return;
1337
1338 if (!votg_5v_switch) {
1339 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1340 if (IS_ERR(votg_5v_switch)) {
1341 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1342 return;
1343 }
1344 }
1345 if (!ext_5v_reg) {
1346 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1347 if (IS_ERR(ext_5v_reg)) {
1348 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1349 return;
1350 }
1351 }
1352 if (on) {
1353 if (regulator_enable(ext_5v_reg)) {
1354 pr_err("%s: Unable to enable the regulator:"
1355 " ext_5v_reg\n", __func__);
1356 return;
1357 }
1358 if (regulator_enable(votg_5v_switch)) {
1359 pr_err("%s: Unable to enable the regulator:"
1360 " votg_5v_switch\n", __func__);
1361 return;
1362 }
1363 } else {
1364 if (regulator_disable(votg_5v_switch))
1365 pr_err("%s: Unable to enable the regulator:"
1366 " votg_5v_switch\n", __func__);
1367 if (regulator_disable(ext_5v_reg))
1368 pr_err("%s: Unable to enable the regulator:"
1369 " ext_5v_reg\n", __func__);
1370 }
1371
1372 vbus_is_on = on;
1373}
1374
1375static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1376 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1377 .power_budget = 390,
1378};
1379#endif
1380
1381#ifdef CONFIG_BATTERY_MSM8X60
1382static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1383 int init)
1384{
1385 int ret = -ENOTSUPP;
1386
1387#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1388 if (machine_is_msm8x60_fluid()) {
1389 if (init)
1390 msm_charger_register_vbus_sn(callback);
1391 else
1392 msm_charger_unregister_vbus_sn(callback);
1393 return 0;
1394 }
1395#endif
1396 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1397 * hence, irrespective of either peripheral only mode or
1398 * OTG (host and peripheral) modes, can depend on pmic for
1399 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001400 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001401 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1402 && (machine_is_msm8x60_surf() ||
1403 pmic_id_notif_supported)) {
1404 if (init)
1405 ret = msm_charger_register_vbus_sn(callback);
1406 else {
1407 msm_charger_unregister_vbus_sn(callback);
1408 ret = 0;
1409 }
1410 } else {
1411#if !defined(CONFIG_USB_EHCI_MSM_72K)
1412 if (init)
1413 ret = msm_charger_register_vbus_sn(callback);
1414 else {
1415 msm_charger_unregister_vbus_sn(callback);
1416 ret = 0;
1417 }
1418#endif
1419 }
1420 return ret;
1421}
1422#endif
1423
1424#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1425static struct msm_otg_platform_data msm_otg_pdata = {
1426 /* if usb link is in sps there is no need for
1427 * usb pclk as dayatona fabric clock will be
1428 * used instead
1429 */
1430 .pclk_src_name = "dfab_usb_hs_clk",
1431 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1432 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1433 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301434 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001435#ifdef CONFIG_USB_EHCI_MSM_72K
1436 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301437 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001438#endif
1439#ifdef CONFIG_USB_EHCI_MSM_72K
1440 .vbus_power = msm_hsusb_vbus_power,
1441#endif
1442#ifdef CONFIG_BATTERY_MSM8X60
1443 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1444#endif
1445 .ldo_init = msm_hsusb_ldo_init,
1446 .ldo_enable = msm_hsusb_ldo_enable,
1447 .config_vddcx = msm_hsusb_config_vddcx,
1448 .init_vddcx = msm_hsusb_init_vddcx,
1449#ifdef CONFIG_BATTERY_MSM8X60
1450 .chg_vbus_draw = msm_charger_vbus_draw,
1451#endif
1452};
1453#endif
1454
1455#ifdef CONFIG_USB_GADGET_MSM_72K
1456static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1457 .is_phy_status_timer_on = 1,
1458};
1459#endif
1460
1461#ifdef CONFIG_USB_G_ANDROID
1462
1463#define PID_MAGIC_ID 0x71432909
1464#define SERIAL_NUM_MAGIC_ID 0x61945374
1465#define SERIAL_NUMBER_LENGTH 127
1466#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1467
1468struct magic_num_struct {
1469 uint32_t pid;
1470 uint32_t serial_num;
1471};
1472
1473struct dload_struct {
1474 uint32_t reserved1;
1475 uint32_t reserved2;
1476 uint32_t reserved3;
1477 uint16_t reserved4;
1478 uint16_t pid;
1479 char serial_number[SERIAL_NUMBER_LENGTH];
1480 uint16_t reserved5;
1481 struct magic_num_struct
1482 magic_struct;
1483};
1484
1485static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1486{
1487 struct dload_struct __iomem *dload = 0;
1488
1489 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1490 if (!dload) {
1491 pr_err("%s: cannot remap I/O memory region: %08x\n",
1492 __func__, DLOAD_USB_BASE_ADD);
1493 return -ENXIO;
1494 }
1495
1496 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1497 __func__, dload, pid, snum);
1498 /* update pid */
1499 dload->magic_struct.pid = PID_MAGIC_ID;
1500 dload->pid = pid;
1501
1502 /* update serial number */
1503 dload->magic_struct.serial_num = 0;
1504 if (!snum)
1505 return 0;
1506
1507 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1508 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1509 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1510
1511 iounmap(dload);
1512
1513 return 0;
1514}
1515
1516static struct android_usb_platform_data android_usb_pdata = {
1517 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1518};
1519
1520static struct platform_device android_usb_device = {
1521 .name = "android_usb",
1522 .id = -1,
1523 .dev = {
1524 .platform_data = &android_usb_pdata,
1525 },
1526};
1527
1528
1529#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001530
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001531#ifdef CONFIG_MSM_VPE
1532static struct resource msm_vpe_resources[] = {
1533 {
1534 .start = 0x05300000,
1535 .end = 0x05300000 + SZ_1M - 1,
1536 .flags = IORESOURCE_MEM,
1537 },
1538 {
1539 .start = INT_VPE,
1540 .end = INT_VPE,
1541 .flags = IORESOURCE_IRQ,
1542 },
1543};
1544
1545static struct platform_device msm_vpe_device = {
1546 .name = "msm_vpe",
1547 .id = 0,
1548 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1549 .resource = msm_vpe_resources,
1550};
1551#endif
1552
1553#ifdef CONFIG_MSM_CAMERA
1554#ifdef CONFIG_MSM_CAMERA_FLASH
1555#define VFE_CAMIF_TIMER1_GPIO 29
1556#define VFE_CAMIF_TIMER2_GPIO 30
1557#define VFE_CAMIF_TIMER3_GPIO_INT 31
1558#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1559static struct msm_camera_sensor_flash_src msm_flash_src = {
1560 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1561 ._fsrc.pmic_src.num_of_src = 2,
1562 ._fsrc.pmic_src.low_current = 100,
1563 ._fsrc.pmic_src.high_current = 300,
1564 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1565 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1566 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1567};
1568#ifdef CONFIG_IMX074
1569static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1570 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1571 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1572 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1573 .flash_recharge_duration = 50000,
1574 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1575};
1576#endif
1577#endif
1578
1579int msm_cam_gpio_tbl[] = {
1580 32,/*CAMIF_MCLK*/
1581 47,/*CAMIF_I2C_DATA*/
1582 48,/*CAMIF_I2C_CLK*/
1583 105,/*STANDBY*/
1584};
1585
1586enum msm_cam_stat{
1587 MSM_CAM_OFF,
1588 MSM_CAM_ON,
1589};
1590
1591static int config_gpio_table(enum msm_cam_stat stat)
1592{
1593 int rc = 0, i = 0;
1594 if (stat == MSM_CAM_ON) {
1595 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1596 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1597 if (unlikely(rc < 0)) {
1598 pr_err("%s not able to get gpio\n", __func__);
1599 for (i--; i >= 0; i--)
1600 gpio_free(msm_cam_gpio_tbl[i]);
1601 break;
1602 }
1603 }
1604 } else {
1605 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1606 gpio_free(msm_cam_gpio_tbl[i]);
1607 }
1608 return rc;
1609}
1610
1611static struct msm_camera_sensor_platform_info sensor_board_info = {
1612 .mount_angle = 0
1613};
1614
1615/*external regulator VREG_5V*/
1616static struct regulator *reg_flash_5V;
1617
1618static int config_camera_on_gpios_fluid(void)
1619{
1620 int rc = 0;
1621
1622 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1623 if (IS_ERR(reg_flash_5V)) {
1624 pr_err("'%s' regulator not found, rc=%ld\n",
1625 "8901_mpp0", IS_ERR(reg_flash_5V));
1626 return -ENODEV;
1627 }
1628
1629 rc = regulator_enable(reg_flash_5V);
1630 if (rc) {
1631 pr_err("'%s' regulator enable failed, rc=%d\n",
1632 "8901_mpp0", rc);
1633 regulator_put(reg_flash_5V);
1634 return rc;
1635 }
1636
1637#ifdef CONFIG_IMX074
1638 sensor_board_info.mount_angle = 90;
1639#endif
1640 rc = config_gpio_table(MSM_CAM_ON);
1641 if (rc < 0) {
1642 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1643 "failed\n", __func__);
1644 return rc;
1645 }
1646
1647 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1648 if (rc < 0) {
1649 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1650 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1651 regulator_disable(reg_flash_5V);
1652 regulator_put(reg_flash_5V);
1653 return rc;
1654 }
1655 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1656 msleep(20);
1657 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1658
1659
1660 /*Enable LED_FLASH_EN*/
1661 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1662 if (rc < 0) {
1663 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1664 "failed\n", __func__, GPIO_LED_FLASH_EN);
1665
1666 regulator_disable(reg_flash_5V);
1667 regulator_put(reg_flash_5V);
1668 config_gpio_table(MSM_CAM_OFF);
1669 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1670 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1671 return rc;
1672 }
1673 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1674 msleep(20);
1675 return rc;
1676}
1677
1678
1679static void config_camera_off_gpios_fluid(void)
1680{
1681 regulator_disable(reg_flash_5V);
1682 regulator_put(reg_flash_5V);
1683
1684 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1685 gpio_free(GPIO_LED_FLASH_EN);
1686
1687 config_gpio_table(MSM_CAM_OFF);
1688
1689 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1690 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1691}
1692static int config_camera_on_gpios(void)
1693{
1694 int rc = 0;
1695
1696 if (machine_is_msm8x60_fluid())
1697 return config_camera_on_gpios_fluid();
1698
1699 rc = config_gpio_table(MSM_CAM_ON);
1700 if (rc < 0) {
1701 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1702 "failed\n", __func__);
1703 return rc;
1704 }
1705
Jilai Wang971f97f2011-07-13 14:25:25 -04001706 if (!machine_is_msm8x60_dragon()) {
1707 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1708 if (rc < 0) {
1709 config_gpio_table(MSM_CAM_OFF);
1710 pr_err("%s: CAMSENSOR gpio %d request"
1711 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1712 return rc;
1713 }
1714 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1715 msleep(20);
1716 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001717 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001718
1719#ifdef CONFIG_MSM_CAMERA_FLASH
1720#ifdef CONFIG_IMX074
1721 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1722 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1723#endif
1724#endif
1725 return rc;
1726}
1727
1728static void config_camera_off_gpios(void)
1729{
1730 if (machine_is_msm8x60_fluid())
1731 return config_camera_off_gpios_fluid();
1732
1733
1734 config_gpio_table(MSM_CAM_OFF);
1735
Jilai Wang971f97f2011-07-13 14:25:25 -04001736 if (!machine_is_msm8x60_dragon()) {
1737 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1738 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1739 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001740}
1741
1742#ifdef CONFIG_QS_S5K4E1
1743
1744#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1745
1746static int config_camera_on_gpios_qs_cam_fluid(void)
1747{
1748 int rc = 0;
1749
1750 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1751 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1752 if (rc < 0) {
1753 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1754 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1755 return rc;
1756 }
1757 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1758 msleep(20);
1759 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1760 msleep(20);
1761
1762 /*
1763 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1764 * to enable 2.7V power to Camera
1765 */
1766 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1767 if (rc < 0) {
1768 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1769 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1770 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1771 gpio_free(QS_CAM_HC37_CAM_PD);
1772 return rc;
1773 }
1774 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1775 msleep(20);
1776 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1777 msleep(20);
1778
1779 rc = config_camera_on_gpios_fluid();
1780 if (rc < 0) {
1781 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1782 " failed\n", __func__);
1783 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1784 gpio_free(QS_CAM_HC37_CAM_PD);
1785 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1786 gpio_free(GPIO_AUX_CAM_2P7_EN);
1787 return rc;
1788 }
1789 return rc;
1790}
1791
1792static void config_camera_off_gpios_qs_cam_fluid(void)
1793{
1794 /*
1795 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1796 * to disable 2.7V power to Camera
1797 */
1798 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1799 gpio_free(GPIO_AUX_CAM_2P7_EN);
1800
1801 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1802 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1803 gpio_free(QS_CAM_HC37_CAM_PD);
1804
1805 config_camera_off_gpios_fluid();
1806 return;
1807}
1808
1809static int config_camera_on_gpios_qs_cam(void)
1810{
1811 int rc = 0;
1812
1813 if (machine_is_msm8x60_fluid())
1814 return config_camera_on_gpios_qs_cam_fluid();
1815
1816 rc = config_camera_on_gpios();
1817 return rc;
1818}
1819
1820static void config_camera_off_gpios_qs_cam(void)
1821{
1822 if (machine_is_msm8x60_fluid())
1823 return config_camera_off_gpios_qs_cam_fluid();
1824
1825 config_camera_off_gpios();
1826 return;
1827}
1828#endif
1829
1830static int config_camera_on_gpios_web_cam(void)
1831{
1832 int rc = 0;
1833 rc = config_gpio_table(MSM_CAM_ON);
1834 if (rc < 0) {
1835 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1836 "failed\n", __func__);
1837 return rc;
1838 }
1839
Jilai Wang53d27a82011-07-13 14:32:58 -04001840 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001841 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1842 if (rc < 0) {
1843 config_gpio_table(MSM_CAM_OFF);
1844 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1845 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1846 return rc;
1847 }
1848 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1849 }
1850 return rc;
1851}
1852
1853static void config_camera_off_gpios_web_cam(void)
1854{
1855 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001856 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001857 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1858 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1859 }
1860 return;
1861}
1862
1863#ifdef CONFIG_MSM_BUS_SCALING
1864static struct msm_bus_vectors cam_init_vectors[] = {
1865 {
1866 .src = MSM_BUS_MASTER_VFE,
1867 .dst = MSM_BUS_SLAVE_SMI,
1868 .ab = 0,
1869 .ib = 0,
1870 },
1871 {
1872 .src = MSM_BUS_MASTER_VFE,
1873 .dst = MSM_BUS_SLAVE_EBI_CH0,
1874 .ab = 0,
1875 .ib = 0,
1876 },
1877 {
1878 .src = MSM_BUS_MASTER_VPE,
1879 .dst = MSM_BUS_SLAVE_SMI,
1880 .ab = 0,
1881 .ib = 0,
1882 },
1883 {
1884 .src = MSM_BUS_MASTER_VPE,
1885 .dst = MSM_BUS_SLAVE_EBI_CH0,
1886 .ab = 0,
1887 .ib = 0,
1888 },
1889 {
1890 .src = MSM_BUS_MASTER_JPEG_ENC,
1891 .dst = MSM_BUS_SLAVE_SMI,
1892 .ab = 0,
1893 .ib = 0,
1894 },
1895 {
1896 .src = MSM_BUS_MASTER_JPEG_ENC,
1897 .dst = MSM_BUS_SLAVE_EBI_CH0,
1898 .ab = 0,
1899 .ib = 0,
1900 },
1901};
1902
1903static struct msm_bus_vectors cam_preview_vectors[] = {
1904 {
1905 .src = MSM_BUS_MASTER_VFE,
1906 .dst = MSM_BUS_SLAVE_SMI,
1907 .ab = 0,
1908 .ib = 0,
1909 },
1910 {
1911 .src = MSM_BUS_MASTER_VFE,
1912 .dst = MSM_BUS_SLAVE_EBI_CH0,
1913 .ab = 283115520,
1914 .ib = 452984832,
1915 },
1916 {
1917 .src = MSM_BUS_MASTER_VPE,
1918 .dst = MSM_BUS_SLAVE_SMI,
1919 .ab = 0,
1920 .ib = 0,
1921 },
1922 {
1923 .src = MSM_BUS_MASTER_VPE,
1924 .dst = MSM_BUS_SLAVE_EBI_CH0,
1925 .ab = 0,
1926 .ib = 0,
1927 },
1928 {
1929 .src = MSM_BUS_MASTER_JPEG_ENC,
1930 .dst = MSM_BUS_SLAVE_SMI,
1931 .ab = 0,
1932 .ib = 0,
1933 },
1934 {
1935 .src = MSM_BUS_MASTER_JPEG_ENC,
1936 .dst = MSM_BUS_SLAVE_EBI_CH0,
1937 .ab = 0,
1938 .ib = 0,
1939 },
1940};
1941
1942static struct msm_bus_vectors cam_video_vectors[] = {
1943 {
1944 .src = MSM_BUS_MASTER_VFE,
1945 .dst = MSM_BUS_SLAVE_SMI,
1946 .ab = 283115520,
1947 .ib = 452984832,
1948 },
1949 {
1950 .src = MSM_BUS_MASTER_VFE,
1951 .dst = MSM_BUS_SLAVE_EBI_CH0,
1952 .ab = 283115520,
1953 .ib = 452984832,
1954 },
1955 {
1956 .src = MSM_BUS_MASTER_VPE,
1957 .dst = MSM_BUS_SLAVE_SMI,
1958 .ab = 319610880,
1959 .ib = 511377408,
1960 },
1961 {
1962 .src = MSM_BUS_MASTER_VPE,
1963 .dst = MSM_BUS_SLAVE_EBI_CH0,
1964 .ab = 0,
1965 .ib = 0,
1966 },
1967 {
1968 .src = MSM_BUS_MASTER_JPEG_ENC,
1969 .dst = MSM_BUS_SLAVE_SMI,
1970 .ab = 0,
1971 .ib = 0,
1972 },
1973 {
1974 .src = MSM_BUS_MASTER_JPEG_ENC,
1975 .dst = MSM_BUS_SLAVE_EBI_CH0,
1976 .ab = 0,
1977 .ib = 0,
1978 },
1979};
1980
1981static struct msm_bus_vectors cam_snapshot_vectors[] = {
1982 {
1983 .src = MSM_BUS_MASTER_VFE,
1984 .dst = MSM_BUS_SLAVE_SMI,
1985 .ab = 566231040,
1986 .ib = 905969664,
1987 },
1988 {
1989 .src = MSM_BUS_MASTER_VFE,
1990 .dst = MSM_BUS_SLAVE_EBI_CH0,
1991 .ab = 69984000,
1992 .ib = 111974400,
1993 },
1994 {
1995 .src = MSM_BUS_MASTER_VPE,
1996 .dst = MSM_BUS_SLAVE_SMI,
1997 .ab = 0,
1998 .ib = 0,
1999 },
2000 {
2001 .src = MSM_BUS_MASTER_VPE,
2002 .dst = MSM_BUS_SLAVE_EBI_CH0,
2003 .ab = 0,
2004 .ib = 0,
2005 },
2006 {
2007 .src = MSM_BUS_MASTER_JPEG_ENC,
2008 .dst = MSM_BUS_SLAVE_SMI,
2009 .ab = 320864256,
2010 .ib = 513382810,
2011 },
2012 {
2013 .src = MSM_BUS_MASTER_JPEG_ENC,
2014 .dst = MSM_BUS_SLAVE_EBI_CH0,
2015 .ab = 320864256,
2016 .ib = 513382810,
2017 },
2018};
2019
2020static struct msm_bus_vectors cam_zsl_vectors[] = {
2021 {
2022 .src = MSM_BUS_MASTER_VFE,
2023 .dst = MSM_BUS_SLAVE_SMI,
2024 .ab = 566231040,
2025 .ib = 905969664,
2026 },
2027 {
2028 .src = MSM_BUS_MASTER_VFE,
2029 .dst = MSM_BUS_SLAVE_EBI_CH0,
2030 .ab = 706199040,
2031 .ib = 1129918464,
2032 },
2033 {
2034 .src = MSM_BUS_MASTER_VPE,
2035 .dst = MSM_BUS_SLAVE_SMI,
2036 .ab = 0,
2037 .ib = 0,
2038 },
2039 {
2040 .src = MSM_BUS_MASTER_VPE,
2041 .dst = MSM_BUS_SLAVE_EBI_CH0,
2042 .ab = 0,
2043 .ib = 0,
2044 },
2045 {
2046 .src = MSM_BUS_MASTER_JPEG_ENC,
2047 .dst = MSM_BUS_SLAVE_SMI,
2048 .ab = 320864256,
2049 .ib = 513382810,
2050 },
2051 {
2052 .src = MSM_BUS_MASTER_JPEG_ENC,
2053 .dst = MSM_BUS_SLAVE_EBI_CH0,
2054 .ab = 320864256,
2055 .ib = 513382810,
2056 },
2057};
2058
2059static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2060 {
2061 .src = MSM_BUS_MASTER_VFE,
2062 .dst = MSM_BUS_SLAVE_SMI,
2063 .ab = 212336640,
2064 .ib = 339738624,
2065 },
2066 {
2067 .src = MSM_BUS_MASTER_VFE,
2068 .dst = MSM_BUS_SLAVE_EBI_CH0,
2069 .ab = 25090560,
2070 .ib = 40144896,
2071 },
2072 {
2073 .src = MSM_BUS_MASTER_VPE,
2074 .dst = MSM_BUS_SLAVE_SMI,
2075 .ab = 239708160,
2076 .ib = 383533056,
2077 },
2078 {
2079 .src = MSM_BUS_MASTER_VPE,
2080 .dst = MSM_BUS_SLAVE_EBI_CH0,
2081 .ab = 79902720,
2082 .ib = 127844352,
2083 },
2084 {
2085 .src = MSM_BUS_MASTER_JPEG_ENC,
2086 .dst = MSM_BUS_SLAVE_SMI,
2087 .ab = 0,
2088 .ib = 0,
2089 },
2090 {
2091 .src = MSM_BUS_MASTER_JPEG_ENC,
2092 .dst = MSM_BUS_SLAVE_EBI_CH0,
2093 .ab = 0,
2094 .ib = 0,
2095 },
2096};
2097
2098static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2099 {
2100 .src = MSM_BUS_MASTER_VFE,
2101 .dst = MSM_BUS_SLAVE_SMI,
2102 .ab = 0,
2103 .ib = 0,
2104 },
2105 {
2106 .src = MSM_BUS_MASTER_VFE,
2107 .dst = MSM_BUS_SLAVE_EBI_CH0,
2108 .ab = 300902400,
2109 .ib = 481443840,
2110 },
2111 {
2112 .src = MSM_BUS_MASTER_VPE,
2113 .dst = MSM_BUS_SLAVE_SMI,
2114 .ab = 230307840,
2115 .ib = 368492544,
2116 },
2117 {
2118 .src = MSM_BUS_MASTER_VPE,
2119 .dst = MSM_BUS_SLAVE_EBI_CH0,
2120 .ab = 245113344,
2121 .ib = 392181351,
2122 },
2123 {
2124 .src = MSM_BUS_MASTER_JPEG_ENC,
2125 .dst = MSM_BUS_SLAVE_SMI,
2126 .ab = 106536960,
2127 .ib = 170459136,
2128 },
2129 {
2130 .src = MSM_BUS_MASTER_JPEG_ENC,
2131 .dst = MSM_BUS_SLAVE_EBI_CH0,
2132 .ab = 106536960,
2133 .ib = 170459136,
2134 },
2135};
2136
2137static struct msm_bus_paths cam_bus_client_config[] = {
2138 {
2139 ARRAY_SIZE(cam_init_vectors),
2140 cam_init_vectors,
2141 },
2142 {
2143 ARRAY_SIZE(cam_preview_vectors),
2144 cam_preview_vectors,
2145 },
2146 {
2147 ARRAY_SIZE(cam_video_vectors),
2148 cam_video_vectors,
2149 },
2150 {
2151 ARRAY_SIZE(cam_snapshot_vectors),
2152 cam_snapshot_vectors,
2153 },
2154 {
2155 ARRAY_SIZE(cam_zsl_vectors),
2156 cam_zsl_vectors,
2157 },
2158 {
2159 ARRAY_SIZE(cam_stereo_video_vectors),
2160 cam_stereo_video_vectors,
2161 },
2162 {
2163 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2164 cam_stereo_snapshot_vectors,
2165 },
2166};
2167
2168static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2169 cam_bus_client_config,
2170 ARRAY_SIZE(cam_bus_client_config),
2171 .name = "msm_camera",
2172};
2173#endif
2174
2175struct msm_camera_device_platform_data msm_camera_device_data = {
2176 .camera_gpio_on = config_camera_on_gpios,
2177 .camera_gpio_off = config_camera_off_gpios,
2178 .ioext.csiphy = 0x04800000,
2179 .ioext.csisz = 0x00000400,
2180 .ioext.csiirq = CSI_0_IRQ,
2181 .ioclk.mclk_clk_rate = 24000000,
2182 .ioclk.vfe_clk_rate = 228570000,
2183#ifdef CONFIG_MSM_BUS_SCALING
2184 .cam_bus_scale_table = &cam_bus_client_pdata,
2185#endif
2186};
2187
2188#ifdef CONFIG_QS_S5K4E1
2189struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2190 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2191 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2192 .ioext.csiphy = 0x04800000,
2193 .ioext.csisz = 0x00000400,
2194 .ioext.csiirq = CSI_0_IRQ,
2195 .ioclk.mclk_clk_rate = 24000000,
2196 .ioclk.vfe_clk_rate = 228570000,
2197#ifdef CONFIG_MSM_BUS_SCALING
2198 .cam_bus_scale_table = &cam_bus_client_pdata,
2199#endif
2200};
2201#endif
2202
2203struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2204 .camera_gpio_on = config_camera_on_gpios_web_cam,
2205 .camera_gpio_off = config_camera_off_gpios_web_cam,
2206 .ioext.csiphy = 0x04900000,
2207 .ioext.csisz = 0x00000400,
2208 .ioext.csiirq = CSI_1_IRQ,
2209 .ioclk.mclk_clk_rate = 24000000,
2210 .ioclk.vfe_clk_rate = 228570000,
2211#ifdef CONFIG_MSM_BUS_SCALING
2212 .cam_bus_scale_table = &cam_bus_client_pdata,
2213#endif
2214};
2215
2216struct resource msm_camera_resources[] = {
2217 {
2218 .start = 0x04500000,
2219 .end = 0x04500000 + SZ_1M - 1,
2220 .flags = IORESOURCE_MEM,
2221 },
2222 {
2223 .start = VFE_IRQ,
2224 .end = VFE_IRQ,
2225 .flags = IORESOURCE_IRQ,
2226 },
2227};
2228#ifdef CONFIG_MT9E013
2229static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2230 .mount_angle = 0
2231};
2232
2233static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2234 .flash_type = MSM_CAMERA_FLASH_LED,
2235 .flash_src = &msm_flash_src
2236};
2237
2238static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2239 .sensor_name = "mt9e013",
2240 .sensor_reset = 106,
2241 .sensor_pwd = 85,
2242 .vcm_pwd = 1,
2243 .vcm_enable = 0,
2244 .pdata = &msm_camera_device_data,
2245 .resource = msm_camera_resources,
2246 .num_resources = ARRAY_SIZE(msm_camera_resources),
2247 .flash_data = &flash_mt9e013,
2248 .strobe_flash_data = &strobe_flash_xenon,
2249 .sensor_platform_info = &mt9e013_sensor_8660_info,
2250 .csi_if = 1
2251};
2252struct platform_device msm_camera_sensor_mt9e013 = {
2253 .name = "msm_camera_mt9e013",
2254 .dev = {
2255 .platform_data = &msm_camera_sensor_mt9e013_data,
2256 },
2257};
2258#endif
2259
2260#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302261static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2262 .mount_angle = 180
2263};
2264
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002265static struct msm_camera_sensor_flash_data flash_imx074 = {
2266 .flash_type = MSM_CAMERA_FLASH_LED,
2267 .flash_src = &msm_flash_src
2268};
2269
2270static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2271 .sensor_name = "imx074",
2272 .sensor_reset = 106,
2273 .sensor_pwd = 85,
2274 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2275 .vcm_enable = 1,
2276 .pdata = &msm_camera_device_data,
2277 .resource = msm_camera_resources,
2278 .num_resources = ARRAY_SIZE(msm_camera_resources),
2279 .flash_data = &flash_imx074,
2280 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302281 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002282 .csi_if = 1
2283};
2284struct platform_device msm_camera_sensor_imx074 = {
2285 .name = "msm_camera_imx074",
2286 .dev = {
2287 .platform_data = &msm_camera_sensor_imx074_data,
2288 },
2289};
2290#endif
2291#ifdef CONFIG_WEBCAM_OV9726
2292
2293static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2294 .mount_angle = 0
2295};
2296
2297static struct msm_camera_sensor_flash_data flash_ov9726 = {
2298 .flash_type = MSM_CAMERA_FLASH_LED,
2299 .flash_src = &msm_flash_src
2300};
2301static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2302 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002303 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002304 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2305 .sensor_pwd = 85,
2306 .vcm_pwd = 1,
2307 .vcm_enable = 0,
2308 .pdata = &msm_camera_device_data_web_cam,
2309 .resource = msm_camera_resources,
2310 .num_resources = ARRAY_SIZE(msm_camera_resources),
2311 .flash_data = &flash_ov9726,
2312 .sensor_platform_info = &ov9726_sensor_8660_info,
2313 .csi_if = 1
2314};
2315struct platform_device msm_camera_sensor_webcam_ov9726 = {
2316 .name = "msm_camera_ov9726",
2317 .dev = {
2318 .platform_data = &msm_camera_sensor_ov9726_data,
2319 },
2320};
2321#endif
2322#ifdef CONFIG_WEBCAM_OV7692
2323static struct msm_camera_sensor_flash_data flash_ov7692 = {
2324 .flash_type = MSM_CAMERA_FLASH_LED,
2325 .flash_src = &msm_flash_src
2326};
2327static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2328 .sensor_name = "ov7692",
2329 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2330 .sensor_pwd = 85,
2331 .vcm_pwd = 1,
2332 .vcm_enable = 0,
2333 .pdata = &msm_camera_device_data_web_cam,
2334 .resource = msm_camera_resources,
2335 .num_resources = ARRAY_SIZE(msm_camera_resources),
2336 .flash_data = &flash_ov7692,
2337 .csi_if = 1
2338};
2339
2340static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2341 .name = "msm_camera_ov7692",
2342 .dev = {
2343 .platform_data = &msm_camera_sensor_ov7692_data,
2344 },
2345};
2346#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002347#ifdef CONFIG_VX6953
2348static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2349 .mount_angle = 270
2350};
2351
2352static struct msm_camera_sensor_flash_data flash_vx6953 = {
2353 .flash_type = MSM_CAMERA_FLASH_NONE,
2354 .flash_src = &msm_flash_src
2355};
2356
2357static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2358 .sensor_name = "vx6953",
2359 .sensor_reset = 63,
2360 .sensor_pwd = 63,
2361 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2362 .vcm_enable = 1,
2363 .pdata = &msm_camera_device_data,
2364 .resource = msm_camera_resources,
2365 .num_resources = ARRAY_SIZE(msm_camera_resources),
2366 .flash_data = &flash_vx6953,
2367 .sensor_platform_info = &vx6953_sensor_8660_info,
2368 .csi_if = 1
2369};
2370struct platform_device msm_camera_sensor_vx6953 = {
2371 .name = "msm_camera_vx6953",
2372 .dev = {
2373 .platform_data = &msm_camera_sensor_vx6953_data,
2374 },
2375};
2376#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002377#ifdef CONFIG_QS_S5K4E1
2378
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302379static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2380#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2381 .mount_angle = 90
2382#else
2383 .mount_angle = 0
2384#endif
2385};
2386
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002387static char eeprom_data[864];
2388static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2389 .flash_type = MSM_CAMERA_FLASH_LED,
2390 .flash_src = &msm_flash_src
2391};
2392
2393static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2394 .sensor_name = "qs_s5k4e1",
2395 .sensor_reset = 106,
2396 .sensor_pwd = 85,
2397 .vcm_pwd = 1,
2398 .vcm_enable = 0,
2399 .pdata = &msm_camera_device_data_qs_cam,
2400 .resource = msm_camera_resources,
2401 .num_resources = ARRAY_SIZE(msm_camera_resources),
2402 .flash_data = &flash_qs_s5k4e1,
2403 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302404 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002405 .csi_if = 1,
2406 .eeprom_data = eeprom_data,
2407};
2408struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2409 .name = "msm_camera_qs_s5k4e1",
2410 .dev = {
2411 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2412 },
2413};
2414#endif
2415static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2416 #ifdef CONFIG_MT9E013
2417 {
2418 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2419 },
2420 #endif
2421 #ifdef CONFIG_IMX074
2422 {
2423 I2C_BOARD_INFO("imx074", 0x1A),
2424 },
2425 #endif
2426 #ifdef CONFIG_WEBCAM_OV7692
2427 {
2428 I2C_BOARD_INFO("ov7692", 0x78),
2429 },
2430 #endif
2431 #ifdef CONFIG_WEBCAM_OV9726
2432 {
2433 I2C_BOARD_INFO("ov9726", 0x10),
2434 },
2435 #endif
2436 #ifdef CONFIG_QS_S5K4E1
2437 {
2438 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2439 },
2440 #endif
2441};
Jilai Wang971f97f2011-07-13 14:25:25 -04002442
2443static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002444 #ifdef CONFIG_WEBCAM_OV9726
2445 {
2446 I2C_BOARD_INFO("ov9726", 0x10),
2447 },
2448 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002449 #ifdef CONFIG_VX6953
2450 {
2451 I2C_BOARD_INFO("vx6953", 0x20),
2452 },
2453 #endif
2454};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002455#endif
2456
2457#ifdef CONFIG_MSM_GEMINI
2458static struct resource msm_gemini_resources[] = {
2459 {
2460 .start = 0x04600000,
2461 .end = 0x04600000 + SZ_1M - 1,
2462 .flags = IORESOURCE_MEM,
2463 },
2464 {
2465 .start = INT_JPEG,
2466 .end = INT_JPEG,
2467 .flags = IORESOURCE_IRQ,
2468 },
2469};
2470
2471static struct platform_device msm_gemini_device = {
2472 .name = "msm_gemini",
2473 .resource = msm_gemini_resources,
2474 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2475};
2476#endif
2477
2478#ifdef CONFIG_I2C_QUP
2479static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2480{
2481}
2482
2483static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2484 .clk_freq = 384000,
2485 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002486 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2487};
2488
2489static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2490 .clk_freq = 100000,
2491 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002492 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2493};
2494
2495static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2496 .clk_freq = 100000,
2497 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002498 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2499};
2500
2501static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2502 .clk_freq = 100000,
2503 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002504 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2505};
2506
2507static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2508 .clk_freq = 100000,
2509 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002510 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2511};
2512
2513static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2514 .clk_freq = 100000,
2515 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002516 .use_gsbi_shared_mode = 1,
2517 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2518};
2519#endif
2520
2521#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2522static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2523 .max_clock_speed = 24000000,
2524};
2525
2526static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2527 .max_clock_speed = 24000000,
2528};
2529#endif
2530
2531#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002532/* CODEC/TSSC SSBI */
2533static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2534 .controller_type = MSM_SBI_CTRL_SSBI,
2535};
2536#endif
2537
2538#ifdef CONFIG_BATTERY_MSM
2539/* Use basic value for fake MSM battery */
2540static struct msm_psy_batt_pdata msm_psy_batt_data = {
2541 .avail_chg_sources = AC_CHG,
2542};
2543
2544static struct platform_device msm_batt_device = {
2545 .name = "msm-battery",
2546 .id = -1,
2547 .dev.platform_data = &msm_psy_batt_data,
2548};
2549#endif
2550
2551#ifdef CONFIG_FB_MSM_LCDC_DSUB
2552/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2553 prim = 1024 x 600 x 4(bpp) x 2(pages)
2554 This is the difference. */
2555#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2556#else
2557#define MSM_FB_DSUB_PMEM_ADDER (0)
2558#endif
2559
2560/* Sensors DSPS platform data */
2561#ifdef CONFIG_MSM_DSPS
2562
2563static struct dsps_gpio_info dsps_surf_gpios[] = {
2564 {
2565 .name = "compass_rst_n",
2566 .num = GPIO_COMPASS_RST_N,
2567 .on_val = 1, /* device not in reset */
2568 .off_val = 0, /* device in reset */
2569 },
2570 {
2571 .name = "gpio_r_altimeter_reset_n",
2572 .num = GPIO_R_ALTIMETER_RESET_N,
2573 .on_val = 1, /* device not in reset */
2574 .off_val = 0, /* device in reset */
2575 }
2576};
2577
2578static struct dsps_gpio_info dsps_fluid_gpios[] = {
2579 {
2580 .name = "gpio_n_altimeter_reset_n",
2581 .num = GPIO_N_ALTIMETER_RESET_N,
2582 .on_val = 1, /* device not in reset */
2583 .off_val = 0, /* device in reset */
2584 }
2585};
2586
2587static void __init msm8x60_init_dsps(void)
2588{
2589 struct msm_dsps_platform_data *pdata =
2590 msm_dsps_device.dev.platform_data;
2591 /*
2592 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2593 * to the power supply and not controled via GPIOs. Fluid uses a
2594 * different IO-Expender (north) than used on surf/ffa.
2595 */
2596 if (machine_is_msm8x60_fluid()) {
2597 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002598 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2599 pdata->gpios = dsps_fluid_gpios;
2600 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2601 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002602 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2603 pdata->gpios = dsps_surf_gpios;
2604 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2605 }
2606
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002607 platform_device_register(&msm_dsps_device);
2608}
2609#endif /* CONFIG_MSM_DSPS */
2610
2611#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002612#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002613#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002614#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002615#endif
2616
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002617#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2618#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2619#elif defined(CONFIG_FB_MSM_TVOUT)
2620#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2621#else
2622#define MSM_FB_EXT_BUFT_SIZE 0
2623#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002624
2625#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
kuogee hsieha39040b2011-08-11 15:40:45 -07002626/* width x height x 3 bpp x 2 frame buffer */
2627#define MSM_FB_WRITEBACK_SIZE (1024 * 600 * 3 * 2)
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002628#define MSM_FB_WRITEBACK_OFFSET \
2629 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002630#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002631#define MSM_FB_WRITEBACK_SIZE 0
2632#define MSM_FB_WRITEBACK_OFFSET 0
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002633#endif
2634
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002635#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2636/* 4 bpp x 2 page HDMI case */
2637#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2638#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002639/* Note: must be multiple of 4096 */
2640#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
2641 MSM_FB_WRITEBACK_SIZE + \
2642 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002643#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002645#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2646#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2647#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002648#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002649#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002650
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002651static int writeback_offset(void)
2652{
2653 return MSM_FB_WRITEBACK_OFFSET;
2654}
2655
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002656#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2657#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002658#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002659
2660#define MSM_SMI_BASE 0x38000000
2661#define MSM_SMI_SIZE 0x4000000
2662
2663#define KERNEL_SMI_BASE (MSM_SMI_BASE)
2664#define KERNEL_SMI_SIZE 0x300000
2665
2666#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2667#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2668#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2669
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002670#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2671#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002672#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002673
2674#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2675#define MSM_ION_HEAP_NUM 5
2676#else
2677#define MSM_ION_HEAP_NUM 2
2678#endif
2679
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002680static unsigned fb_size;
2681static int __init fb_size_setup(char *p)
2682{
2683 fb_size = memparse(p, NULL);
2684 return 0;
2685}
2686early_param("fb_size", fb_size_setup);
2687
2688static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2689static int __init pmem_kernel_ebi1_size_setup(char *p)
2690{
2691 pmem_kernel_ebi1_size = memparse(p, NULL);
2692 return 0;
2693}
2694early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2695
2696#ifdef CONFIG_ANDROID_PMEM
2697static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2698static int __init pmem_sf_size_setup(char *p)
2699{
2700 pmem_sf_size = memparse(p, NULL);
2701 return 0;
2702}
2703early_param("pmem_sf_size", pmem_sf_size_setup);
2704
2705static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2706
2707static int __init pmem_adsp_size_setup(char *p)
2708{
2709 pmem_adsp_size = memparse(p, NULL);
2710 return 0;
2711}
2712early_param("pmem_adsp_size", pmem_adsp_size_setup);
2713
2714static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2715
2716static int __init pmem_audio_size_setup(char *p)
2717{
2718 pmem_audio_size = memparse(p, NULL);
2719 return 0;
2720}
2721early_param("pmem_audio_size", pmem_audio_size_setup);
2722#endif
2723
2724static struct resource msm_fb_resources[] = {
2725 {
2726 .flags = IORESOURCE_DMA,
2727 }
2728};
2729
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002730static int msm_fb_detect_panel(const char *name)
2731{
2732 if (machine_is_msm8x60_fluid()) {
2733 uint32_t soc_platform_version = socinfo_get_platform_version();
2734 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2735#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2736 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002737 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2738 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002739 return 0;
2740#endif
2741 } else { /*P3 and up use AUO panel */
2742#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2743 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002744 strnlen(LCDC_AUO_PANEL_NAME,
2745 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002746 return 0;
2747#endif
2748 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002749#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2750 } else if machine_is_msm8x60_dragon() {
2751 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002752 strnlen(LCDC_NT35582_PANEL_NAME,
2753 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002754 return 0;
2755#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002756 } else {
2757 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002758 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2759 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002760 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002761
2762#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2763 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2764 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2765 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2766 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2767 PANEL_NAME_MAX_LEN)))
2768 return 0;
2769
2770 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2771 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2772 PANEL_NAME_MAX_LEN)))
2773 return 0;
2774
2775 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2776 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2777 PANEL_NAME_MAX_LEN)))
2778 return 0;
2779#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002780 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002781
2782 if (!strncmp(name, HDMI_PANEL_NAME,
2783 strnlen(HDMI_PANEL_NAME,
2784 PANEL_NAME_MAX_LEN)))
2785 return 0;
2786
2787 if (!strncmp(name, TVOUT_PANEL_NAME,
2788 strnlen(TVOUT_PANEL_NAME,
2789 PANEL_NAME_MAX_LEN)))
2790 return 0;
2791
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002792 pr_warning("%s: not supported '%s'", __func__, name);
2793 return -ENODEV;
2794}
2795
2796static struct msm_fb_platform_data msm_fb_pdata = {
2797 .detect_client = msm_fb_detect_panel,
2798};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002799
2800static struct platform_device msm_fb_device = {
2801 .name = "msm_fb",
2802 .id = 0,
2803 .num_resources = ARRAY_SIZE(msm_fb_resources),
2804 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002805 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002806};
2807
2808#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002809#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810static struct android_pmem_platform_data android_pmem_pdata = {
2811 .name = "pmem",
2812 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2813 .cached = 1,
2814 .memory_type = MEMTYPE_EBI1,
2815};
2816
2817static struct platform_device android_pmem_device = {
2818 .name = "android_pmem",
2819 .id = 0,
2820 .dev = {.platform_data = &android_pmem_pdata},
2821};
2822
2823static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2824 .name = "pmem_adsp",
2825 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2826 .cached = 0,
2827 .memory_type = MEMTYPE_EBI1,
2828};
2829
2830static struct platform_device android_pmem_adsp_device = {
2831 .name = "android_pmem",
2832 .id = 2,
2833 .dev = { .platform_data = &android_pmem_adsp_pdata },
2834};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002835#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002836static struct android_pmem_platform_data android_pmem_audio_pdata = {
2837 .name = "pmem_audio",
2838 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2839 .cached = 0,
2840 .memory_type = MEMTYPE_EBI1,
2841};
2842
2843static struct platform_device android_pmem_audio_device = {
2844 .name = "android_pmem",
2845 .id = 4,
2846 .dev = { .platform_data = &android_pmem_audio_pdata },
2847};
2848
Laura Abbott1e36a022011-06-22 17:08:13 -07002849#define PMEM_BUS_WIDTH(_bw) \
2850 { \
2851 .vectors = &(struct msm_bus_vectors){ \
2852 .src = MSM_BUS_MASTER_AMPSS_M0, \
2853 .dst = MSM_BUS_SLAVE_SMI, \
2854 .ib = (_bw), \
2855 .ab = 0, \
2856 }, \
2857 .num_paths = 1, \
2858 }
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002859#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Laura Abbott1e36a022011-06-22 17:08:13 -07002860static struct msm_bus_paths pmem_smi_table[] = {
2861 [0] = PMEM_BUS_WIDTH(0), /* Off */
2862 [1] = PMEM_BUS_WIDTH(1), /* On */
2863};
2864
2865static struct msm_bus_scale_pdata smi_client_pdata = {
2866 .usecase = pmem_smi_table,
2867 .num_usecases = ARRAY_SIZE(pmem_smi_table),
2868 .name = "pmem_smi",
2869};
2870
Alex Bird199980e2011-10-21 11:29:27 -07002871void request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002872{
2873 int bus_id = (int) data;
2874
2875 msm_bus_scale_client_update_request(bus_id, 1);
2876}
2877
Alex Bird199980e2011-10-21 11:29:27 -07002878void release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002879{
2880 int bus_id = (int) data;
2881
2882 msm_bus_scale_client_update_request(bus_id, 0);
2883}
2884
Alex Bird199980e2011-10-21 11:29:27 -07002885void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002886{
2887 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2888}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002889static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2890 .name = "pmem_smipool",
2891 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2892 .cached = 0,
2893 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002894 .request_region = request_smi_region,
2895 .release_region = release_smi_region,
2896 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002897 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002898};
2899static struct platform_device android_pmem_smipool_device = {
2900 .name = "android_pmem",
2901 .id = 7,
2902 .dev = { .platform_data = &android_pmem_smipool_pdata },
2903};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002904#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002905#endif
2906
2907#define GPIO_DONGLE_PWR_EN 258
2908static void setup_display_power(void);
2909static int lcdc_vga_enabled;
2910static int vga_enable_request(int enable)
2911{
2912 if (enable)
2913 lcdc_vga_enabled = 1;
2914 else
2915 lcdc_vga_enabled = 0;
2916 setup_display_power();
2917
2918 return 0;
2919}
2920
2921#define GPIO_BACKLIGHT_PWM0 0
2922#define GPIO_BACKLIGHT_PWM1 1
2923
2924static int pmic_backlight_gpio[2]
2925 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2926static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2927 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2928 .vga_switch = vga_enable_request,
2929};
2930
2931static struct platform_device lcdc_samsung_panel_device = {
2932 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2933 .id = 0,
2934 .dev = {
2935 .platform_data = &lcdc_samsung_panel_data,
2936 }
2937};
2938#if (!defined(CONFIG_SPI_QUP)) && \
2939 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2940 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2941
2942static int lcdc_spi_gpio_array_num[] = {
2943 LCDC_SPI_GPIO_CLK,
2944 LCDC_SPI_GPIO_CS,
2945 LCDC_SPI_GPIO_MOSI,
2946};
2947
2948static uint32_t lcdc_spi_gpio_config_data[] = {
2949 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2950 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2951 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2952 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2953 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2954 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2955};
2956
2957static void lcdc_config_spi_gpios(int enable)
2958{
2959 int n;
2960 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2961 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2962}
2963#endif
2964
2965#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2966#ifdef CONFIG_SPI_QUP
2967static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2968 {
2969 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2970 .mode = SPI_MODE_3,
2971 .bus_num = 1,
2972 .chip_select = 0,
2973 .max_speed_hz = 10800000,
2974 }
2975};
2976#endif /* CONFIG_SPI_QUP */
2977
2978static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2979#ifndef CONFIG_SPI_QUP
2980 .panel_config_gpio = lcdc_config_spi_gpios,
2981 .gpio_num = lcdc_spi_gpio_array_num,
2982#endif
2983};
2984
2985static struct platform_device lcdc_samsung_oled_panel_device = {
2986 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2987 .id = 0,
2988 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2989};
2990#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2991
2992#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2993#ifdef CONFIG_SPI_QUP
2994static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
2995 {
2996 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
2997 .mode = SPI_MODE_3,
2998 .bus_num = 1,
2999 .chip_select = 0,
3000 .max_speed_hz = 10800000,
3001 }
3002};
3003#endif
3004
3005static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3006#ifndef CONFIG_SPI_QUP
3007 .panel_config_gpio = lcdc_config_spi_gpios,
3008 .gpio_num = lcdc_spi_gpio_array_num,
3009#endif
3010};
3011
3012static struct platform_device lcdc_auo_wvga_panel_device = {
3013 .name = LCDC_AUO_PANEL_NAME,
3014 .id = 0,
3015 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3016};
3017#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3018
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003019#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3020
3021#define GPIO_NT35582_RESET 94
3022#define GPIO_NT35582_BL_EN_HW_PIN 24
3023#define GPIO_NT35582_BL_EN \
3024 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3025
3026static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3027
3028static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3029 .gpio_num = lcdc_nt35582_pmic_gpio,
3030};
3031
3032static struct platform_device lcdc_nt35582_panel_device = {
3033 .name = LCDC_NT35582_PANEL_NAME,
3034 .id = 0,
3035 .dev = {
3036 .platform_data = &lcdc_nt35582_panel_data,
3037 }
3038};
3039
3040static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3041 {
3042 .modalias = "lcdc_nt35582_spi",
3043 .mode = SPI_MODE_0,
3044 .bus_num = 0,
3045 .chip_select = 0,
3046 .max_speed_hz = 1100000,
3047 }
3048};
3049#endif
3050
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003051#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3052static struct resource hdmi_msm_resources[] = {
3053 {
3054 .name = "hdmi_msm_qfprom_addr",
3055 .start = 0x00700000,
3056 .end = 0x007060FF,
3057 .flags = IORESOURCE_MEM,
3058 },
3059 {
3060 .name = "hdmi_msm_hdmi_addr",
3061 .start = 0x04A00000,
3062 .end = 0x04A00FFF,
3063 .flags = IORESOURCE_MEM,
3064 },
3065 {
3066 .name = "hdmi_msm_irq",
3067 .start = HDMI_IRQ,
3068 .end = HDMI_IRQ,
3069 .flags = IORESOURCE_IRQ,
3070 },
3071};
3072
3073static int hdmi_enable_5v(int on);
3074static int hdmi_core_power(int on, int show);
3075static int hdmi_cec_power(int on);
3076
3077static struct msm_hdmi_platform_data hdmi_msm_data = {
3078 .irq = HDMI_IRQ,
3079 .enable_5v = hdmi_enable_5v,
3080 .core_power = hdmi_core_power,
3081 .cec_power = hdmi_cec_power,
3082};
3083
3084static struct platform_device hdmi_msm_device = {
3085 .name = "hdmi_msm",
3086 .id = 0,
3087 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3088 .resource = hdmi_msm_resources,
3089 .dev.platform_data = &hdmi_msm_data,
3090};
3091#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3092
3093#ifdef CONFIG_FB_MSM_MIPI_DSI
3094static struct platform_device mipi_dsi_toshiba_panel_device = {
3095 .name = "mipi_toshiba",
3096 .id = 0,
3097};
3098
3099#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3100
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003101static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003102 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003103 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003104};
3105
3106static struct platform_device mipi_dsi_novatek_panel_device = {
3107 .name = "mipi_novatek",
3108 .id = 0,
3109 .dev = {
3110 .platform_data = &novatek_pdata,
3111 }
3112};
3113#endif
3114
3115static void __init msm8x60_allocate_memory_regions(void)
3116{
3117 void *addr;
3118 unsigned long size;
3119
3120 size = MSM_FB_SIZE;
3121 addr = alloc_bootmem_align(size, 0x1000);
3122 msm_fb_resources[0].start = __pa(addr);
3123 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3124 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3125 size, addr, __pa(addr));
3126
3127}
3128
3129#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3130 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3131/*virtual key support */
3132static ssize_t tma300_vkeys_show(struct kobject *kobj,
3133 struct kobj_attribute *attr, char *buf)
3134{
3135 return sprintf(buf,
3136 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3137 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3138 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3139 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3140 "\n");
3141}
3142
3143static struct kobj_attribute tma300_vkeys_attr = {
3144 .attr = {
3145 .mode = S_IRUGO,
3146 },
3147 .show = &tma300_vkeys_show,
3148};
3149
3150static struct attribute *tma300_properties_attrs[] = {
3151 &tma300_vkeys_attr.attr,
3152 NULL
3153};
3154
3155static struct attribute_group tma300_properties_attr_group = {
3156 .attrs = tma300_properties_attrs,
3157};
3158
3159static struct kobject *properties_kobj;
3160
3161
3162
3163#define CYTTSP_TS_GPIO_IRQ 61
3164static int cyttsp_platform_init(struct i2c_client *client)
3165{
3166 int rc = -EINVAL;
3167 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3168
3169 if (machine_is_msm8x60_fluid()) {
3170 pm8058_l5 = regulator_get(NULL, "8058_l5");
3171 if (IS_ERR(pm8058_l5)) {
3172 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3173 __func__, PTR_ERR(pm8058_l5));
3174 rc = PTR_ERR(pm8058_l5);
3175 return rc;
3176 }
3177 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3178 if (rc) {
3179 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3180 __func__, rc);
3181 goto reg_l5_put;
3182 }
3183
3184 rc = regulator_enable(pm8058_l5);
3185 if (rc) {
3186 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3187 __func__, rc);
3188 goto reg_l5_put;
3189 }
3190 }
3191 /* vote for s3 to enable i2c communication lines */
3192 pm8058_s3 = regulator_get(NULL, "8058_s3");
3193 if (IS_ERR(pm8058_s3)) {
3194 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3195 __func__, PTR_ERR(pm8058_s3));
3196 rc = PTR_ERR(pm8058_s3);
3197 goto reg_l5_disable;
3198 }
3199
3200 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3201 if (rc) {
3202 pr_err("%s: regulator_set_voltage() = %d\n",
3203 __func__, rc);
3204 goto reg_s3_put;
3205 }
3206
3207 rc = regulator_enable(pm8058_s3);
3208 if (rc) {
3209 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3210 __func__, rc);
3211 goto reg_s3_put;
3212 }
3213
3214 /* wait for vregs to stabilize */
3215 usleep_range(10000, 10000);
3216
3217 /* check this device active by reading first byte/register */
3218 rc = i2c_smbus_read_byte_data(client, 0x01);
3219 if (rc < 0) {
3220 pr_err("%s: i2c sanity check failed\n", __func__);
3221 goto reg_s3_disable;
3222 }
3223
3224 /* virtual keys */
3225 if (machine_is_msm8x60_fluid()) {
3226 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3227 properties_kobj = kobject_create_and_add("board_properties",
3228 NULL);
3229 if (properties_kobj)
3230 rc = sysfs_create_group(properties_kobj,
3231 &tma300_properties_attr_group);
3232 if (!properties_kobj || rc)
3233 pr_err("%s: failed to create board_properties\n",
3234 __func__);
3235 }
3236 return CY_OK;
3237
3238reg_s3_disable:
3239 regulator_disable(pm8058_s3);
3240reg_s3_put:
3241 regulator_put(pm8058_s3);
3242reg_l5_disable:
3243 if (machine_is_msm8x60_fluid())
3244 regulator_disable(pm8058_l5);
3245reg_l5_put:
3246 if (machine_is_msm8x60_fluid())
3247 regulator_put(pm8058_l5);
3248 return rc;
3249}
3250
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303251/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3252static int cyttsp_platform_suspend(struct i2c_client *client)
3253{
3254 msleep(20);
3255
3256 return CY_OK;
3257}
3258
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003259static int cyttsp_platform_resume(struct i2c_client *client)
3260{
3261 /* add any special code to strobe a wakeup pin or chip reset */
3262 msleep(10);
3263
3264 return CY_OK;
3265}
3266
3267static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3268 .flags = 0x04,
3269 .gen = CY_GEN3, /* or */
3270 .use_st = CY_USE_ST,
3271 .use_mt = CY_USE_MT,
3272 .use_hndshk = CY_SEND_HNDSHK,
3273 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303274 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003275 .use_gestures = CY_USE_GESTURES,
3276 /* activate up to 4 groups
3277 * and set active distance
3278 */
3279 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3280 CY_GEST_GRP3 | CY_GEST_GRP4 |
3281 CY_ACT_DIST,
3282 /* change act_intrvl to customize the Active power state
3283 * scanning/processing refresh interval for Operating mode
3284 */
3285 .act_intrvl = CY_ACT_INTRVL_DFLT,
3286 /* change tch_tmout to customize the touch timeout for the
3287 * Active power state for Operating mode
3288 */
3289 .tch_tmout = CY_TCH_TMOUT_DFLT,
3290 /* change lp_intrvl to customize the Low Power power state
3291 * scanning/processing refresh interval for Operating mode
3292 */
3293 .lp_intrvl = CY_LP_INTRVL_DFLT,
3294 .sleep_gpio = -1,
3295 .resout_gpio = -1,
3296 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3297 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303298 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003299 .init = cyttsp_platform_init,
3300};
3301
3302static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3303 .panel_maxx = 1083,
3304 .panel_maxy = 659,
3305 .disp_minx = 30,
3306 .disp_maxx = 1053,
3307 .disp_miny = 30,
3308 .disp_maxy = 629,
3309 .correct_fw_ver = 8,
3310 .fw_fname = "cyttsp_8660_ffa.hex",
3311 .flags = 0x00,
3312 .gen = CY_GEN2, /* or */
3313 .use_st = CY_USE_ST,
3314 .use_mt = CY_USE_MT,
3315 .use_hndshk = CY_SEND_HNDSHK,
3316 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303317 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003318 .use_gestures = CY_USE_GESTURES,
3319 /* activate up to 4 groups
3320 * and set active distance
3321 */
3322 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3323 CY_GEST_GRP3 | CY_GEST_GRP4 |
3324 CY_ACT_DIST,
3325 /* change act_intrvl to customize the Active power state
3326 * scanning/processing refresh interval for Operating mode
3327 */
3328 .act_intrvl = CY_ACT_INTRVL_DFLT,
3329 /* change tch_tmout to customize the touch timeout for the
3330 * Active power state for Operating mode
3331 */
3332 .tch_tmout = CY_TCH_TMOUT_DFLT,
3333 /* change lp_intrvl to customize the Low Power power state
3334 * scanning/processing refresh interval for Operating mode
3335 */
3336 .lp_intrvl = CY_LP_INTRVL_DFLT,
3337 .sleep_gpio = -1,
3338 .resout_gpio = -1,
3339 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3340 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303341 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003342 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303343 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003344};
3345static void cyttsp_set_params(void)
3346{
3347 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3348 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3349 cyttsp_fluid_pdata.panel_maxx = 539;
3350 cyttsp_fluid_pdata.panel_maxy = 994;
3351 cyttsp_fluid_pdata.disp_minx = 30;
3352 cyttsp_fluid_pdata.disp_maxx = 509;
3353 cyttsp_fluid_pdata.disp_miny = 60;
3354 cyttsp_fluid_pdata.disp_maxy = 859;
3355 cyttsp_fluid_pdata.correct_fw_ver = 4;
3356 } else {
3357 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3358 cyttsp_fluid_pdata.panel_maxx = 550;
3359 cyttsp_fluid_pdata.panel_maxy = 1013;
3360 cyttsp_fluid_pdata.disp_minx = 35;
3361 cyttsp_fluid_pdata.disp_maxx = 515;
3362 cyttsp_fluid_pdata.disp_miny = 69;
3363 cyttsp_fluid_pdata.disp_maxy = 869;
3364 cyttsp_fluid_pdata.correct_fw_ver = 5;
3365 }
3366
3367}
3368
3369static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3370 {
3371 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3372 .platform_data = &cyttsp_fluid_pdata,
3373#ifndef CY_USE_TIMER
3374 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3375#endif /* CY_USE_TIMER */
3376 },
3377};
3378
3379static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3380 {
3381 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3382 .platform_data = &cyttsp_tmg240_pdata,
3383#ifndef CY_USE_TIMER
3384 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3385#endif /* CY_USE_TIMER */
3386 },
3387};
3388#endif
3389
3390static struct regulator *vreg_tmg200;
3391
3392#define TS_PEN_IRQ_GPIO 61
3393static int tmg200_power(int vreg_on)
3394{
3395 int rc = -EINVAL;
3396
3397 if (!vreg_tmg200) {
3398 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3399 __func__, rc);
3400 return rc;
3401 }
3402
3403 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3404 regulator_disable(vreg_tmg200);
3405 if (rc < 0)
3406 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3407 __func__, vreg_on ? "enable" : "disable", rc);
3408
3409 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003410 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003411
3412 return rc;
3413}
3414
3415static int tmg200_dev_setup(bool enable)
3416{
3417 int rc;
3418
3419 if (enable) {
3420 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3421 if (IS_ERR(vreg_tmg200)) {
3422 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3423 __func__, PTR_ERR(vreg_tmg200));
3424 rc = PTR_ERR(vreg_tmg200);
3425 return rc;
3426 }
3427
3428 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3429 if (rc) {
3430 pr_err("%s: regulator_set_voltage() = %d\n",
3431 __func__, rc);
3432 goto reg_put;
3433 }
3434 } else {
3435 /* put voltage sources */
3436 regulator_put(vreg_tmg200);
3437 }
3438 return 0;
3439reg_put:
3440 regulator_put(vreg_tmg200);
3441 return rc;
3442}
3443
3444static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3445 .ts_name = "msm_tmg200_ts",
3446 .dis_min_x = 0,
3447 .dis_max_x = 1023,
3448 .dis_min_y = 0,
3449 .dis_max_y = 599,
3450 .min_tid = 0,
3451 .max_tid = 255,
3452 .min_touch = 0,
3453 .max_touch = 255,
3454 .min_width = 0,
3455 .max_width = 255,
3456 .power_on = tmg200_power,
3457 .dev_setup = tmg200_dev_setup,
3458 .nfingers = 2,
3459 .irq_gpio = TS_PEN_IRQ_GPIO,
3460 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3461};
3462
3463static struct i2c_board_info cy8ctmg200_board_info[] = {
3464 {
3465 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3466 .platform_data = &cy8ctmg200_pdata,
3467 }
3468};
3469
Zhang Chang Ken211df572011-07-05 19:16:39 -04003470static struct regulator *vreg_tma340;
3471
3472static int tma340_power(int vreg_on)
3473{
3474 int rc = -EINVAL;
3475
3476 if (!vreg_tma340) {
3477 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3478 __func__, rc);
3479 return rc;
3480 }
3481
3482 rc = vreg_on ? regulator_enable(vreg_tma340) :
3483 regulator_disable(vreg_tma340);
3484 if (rc < 0)
3485 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3486 __func__, vreg_on ? "enable" : "disable", rc);
3487
3488 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003489 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003490
3491 return rc;
3492}
3493
3494static struct kobject *tma340_prop_kobj;
3495
3496static int tma340_dragon_dev_setup(bool enable)
3497{
3498 int rc;
3499
3500 if (enable) {
3501 vreg_tma340 = regulator_get(NULL, "8901_l2");
3502 if (IS_ERR(vreg_tma340)) {
3503 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3504 __func__, PTR_ERR(vreg_tma340));
3505 rc = PTR_ERR(vreg_tma340);
3506 return rc;
3507 }
3508
3509 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3510 if (rc) {
3511 pr_err("%s: regulator_set_voltage() = %d\n",
3512 __func__, rc);
3513 goto reg_put;
3514 }
3515 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3516 tma340_prop_kobj = kobject_create_and_add("board_properties",
3517 NULL);
3518 if (tma340_prop_kobj) {
3519 rc = sysfs_create_group(tma340_prop_kobj,
3520 &tma300_properties_attr_group);
3521 if (rc) {
3522 kobject_put(tma340_prop_kobj);
3523 pr_err("%s: failed to create board_properties\n",
3524 __func__);
3525 goto reg_put;
3526 }
3527 }
3528
3529 } else {
3530 /* put voltage sources */
3531 regulator_put(vreg_tma340);
3532 /* destroy virtual keys */
3533 if (tma340_prop_kobj) {
3534 sysfs_remove_group(tma340_prop_kobj,
3535 &tma300_properties_attr_group);
3536 kobject_put(tma340_prop_kobj);
3537 }
3538 }
3539 return 0;
3540reg_put:
3541 regulator_put(vreg_tma340);
3542 return rc;
3543}
3544
3545
3546static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3547 .ts_name = "cy8ctma340",
3548 .dis_min_x = 0,
3549 .dis_max_x = 479,
3550 .dis_min_y = 0,
3551 .dis_max_y = 799,
3552 .min_tid = 0,
3553 .max_tid = 255,
3554 .min_touch = 0,
3555 .max_touch = 255,
3556 .min_width = 0,
3557 .max_width = 255,
3558 .power_on = tma340_power,
3559 .dev_setup = tma340_dragon_dev_setup,
3560 .nfingers = 2,
3561 .irq_gpio = TS_PEN_IRQ_GPIO,
3562 .resout_gpio = -1,
3563};
3564
3565static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3566 {
3567 I2C_BOARD_INFO("cy8ctma340", 0x24),
3568 .platform_data = &cy8ctma340_dragon_pdata,
3569 }
3570};
3571
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003572#ifdef CONFIG_SERIAL_MSM_HS
3573static int configure_uart_gpios(int on)
3574{
3575 int ret = 0, i;
3576 int uart_gpios[] = {53, 54, 55, 56};
3577 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3578 if (on) {
3579 ret = msm_gpiomux_get(uart_gpios[i]);
3580 if (unlikely(ret))
3581 break;
3582 } else {
3583 ret = msm_gpiomux_put(uart_gpios[i]);
3584 if (unlikely(ret))
3585 return ret;
3586 }
3587 }
3588 if (ret)
3589 for (; i >= 0; i--)
3590 msm_gpiomux_put(uart_gpios[i]);
3591 return ret;
3592}
3593static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3594 .inject_rx_on_wakeup = 1,
3595 .rx_to_inject = 0xFD,
3596 .gpio_config = configure_uart_gpios,
3597};
3598#endif
3599
3600
3601#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3602
3603static struct gpio_led gpio_exp_leds_config[] = {
3604 {
3605 .name = "left_led1:green",
3606 .gpio = GPIO_LEFT_LED_1,
3607 .active_low = 1,
3608 .retain_state_suspended = 0,
3609 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3610 },
3611 {
3612 .name = "left_led2:red",
3613 .gpio = GPIO_LEFT_LED_2,
3614 .active_low = 1,
3615 .retain_state_suspended = 0,
3616 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3617 },
3618 {
3619 .name = "left_led3:green",
3620 .gpio = GPIO_LEFT_LED_3,
3621 .active_low = 1,
3622 .retain_state_suspended = 0,
3623 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3624 },
3625 {
3626 .name = "wlan_led:orange",
3627 .gpio = GPIO_LEFT_LED_WLAN,
3628 .active_low = 1,
3629 .retain_state_suspended = 0,
3630 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3631 },
3632 {
3633 .name = "left_led5:green",
3634 .gpio = GPIO_LEFT_LED_5,
3635 .active_low = 1,
3636 .retain_state_suspended = 0,
3637 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3638 },
3639 {
3640 .name = "right_led1:green",
3641 .gpio = GPIO_RIGHT_LED_1,
3642 .active_low = 1,
3643 .retain_state_suspended = 0,
3644 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3645 },
3646 {
3647 .name = "right_led2:red",
3648 .gpio = GPIO_RIGHT_LED_2,
3649 .active_low = 1,
3650 .retain_state_suspended = 0,
3651 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3652 },
3653 {
3654 .name = "right_led3:green",
3655 .gpio = GPIO_RIGHT_LED_3,
3656 .active_low = 1,
3657 .retain_state_suspended = 0,
3658 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3659 },
3660 {
3661 .name = "bt_led:blue",
3662 .gpio = GPIO_RIGHT_LED_BT,
3663 .active_low = 1,
3664 .retain_state_suspended = 0,
3665 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3666 },
3667 {
3668 .name = "right_led5:green",
3669 .gpio = GPIO_RIGHT_LED_5,
3670 .active_low = 1,
3671 .retain_state_suspended = 0,
3672 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3673 },
3674};
3675
3676static struct gpio_led_platform_data gpio_leds_pdata = {
3677 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3678 .leds = gpio_exp_leds_config,
3679};
3680
3681static struct platform_device gpio_leds = {
3682 .name = "leds-gpio",
3683 .id = -1,
3684 .dev = {
3685 .platform_data = &gpio_leds_pdata,
3686 },
3687};
3688
3689static struct gpio_led fluid_gpio_leds[] = {
3690 {
3691 .name = "dual_led:green",
3692 .gpio = GPIO_LED1_GREEN_N,
3693 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3694 .active_low = 1,
3695 .retain_state_suspended = 0,
3696 },
3697 {
3698 .name = "dual_led:red",
3699 .gpio = GPIO_LED2_RED_N,
3700 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3701 .active_low = 1,
3702 .retain_state_suspended = 0,
3703 },
3704};
3705
3706static struct gpio_led_platform_data gpio_led_pdata = {
3707 .leds = fluid_gpio_leds,
3708 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3709};
3710
3711static struct platform_device fluid_leds_gpio = {
3712 .name = "leds-gpio",
3713 .id = -1,
3714 .dev = {
3715 .platform_data = &gpio_led_pdata,
3716 },
3717};
3718
3719#endif
3720
3721#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3722
3723static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3724 .phys_addr_base = 0x00106000,
3725 .reg_offsets = {
3726 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3727 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3728 },
3729 .phys_size = SZ_8K,
3730 .log_len = 4096, /* log's buffer length in bytes */
3731 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3732};
3733
3734static struct platform_device msm_rpm_log_device = {
3735 .name = "msm_rpm_log",
3736 .id = -1,
3737 .dev = {
3738 .platform_data = &msm_rpm_log_pdata,
3739 },
3740};
3741#endif
3742
3743#ifdef CONFIG_BATTERY_MSM8X60
3744static struct msm_charger_platform_data msm_charger_data = {
3745 .safety_time = 180,
3746 .update_time = 1,
3747 .max_voltage = 4200,
3748 .min_voltage = 3200,
3749};
3750
3751static struct platform_device msm_charger_device = {
3752 .name = "msm-charger",
3753 .id = -1,
3754 .dev = {
3755 .platform_data = &msm_charger_data,
3756 }
3757};
3758#endif
3759
3760/*
3761 * Consumer specific regulator names:
3762 * regulator name consumer dev_name
3763 */
3764static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3765 REGULATOR_SUPPLY("8058_l0", NULL),
3766};
3767static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3768 REGULATOR_SUPPLY("8058_l1", NULL),
3769};
3770static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3771 REGULATOR_SUPPLY("8058_l2", NULL),
3772};
3773static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3774 REGULATOR_SUPPLY("8058_l3", NULL),
3775};
3776static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3777 REGULATOR_SUPPLY("8058_l4", NULL),
3778};
3779static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3780 REGULATOR_SUPPLY("8058_l5", NULL),
3781};
3782static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3783 REGULATOR_SUPPLY("8058_l6", NULL),
3784};
3785static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3786 REGULATOR_SUPPLY("8058_l7", NULL),
3787};
3788static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3789 REGULATOR_SUPPLY("8058_l8", NULL),
3790};
3791static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3792 REGULATOR_SUPPLY("8058_l9", NULL),
3793};
3794static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3795 REGULATOR_SUPPLY("8058_l10", NULL),
3796};
3797static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3798 REGULATOR_SUPPLY("8058_l11", NULL),
3799};
3800static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3801 REGULATOR_SUPPLY("8058_l12", NULL),
3802};
3803static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3804 REGULATOR_SUPPLY("8058_l13", NULL),
3805};
3806static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3807 REGULATOR_SUPPLY("8058_l14", NULL),
3808};
3809static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3810 REGULATOR_SUPPLY("8058_l15", NULL),
3811};
3812static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3813 REGULATOR_SUPPLY("8058_l16", NULL),
3814};
3815static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3816 REGULATOR_SUPPLY("8058_l17", NULL),
3817};
3818static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3819 REGULATOR_SUPPLY("8058_l18", NULL),
3820};
3821static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3822 REGULATOR_SUPPLY("8058_l19", NULL),
3823};
3824static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3825 REGULATOR_SUPPLY("8058_l20", NULL),
3826};
3827static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3828 REGULATOR_SUPPLY("8058_l21", NULL),
3829};
3830static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3831 REGULATOR_SUPPLY("8058_l22", NULL),
3832};
3833static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3834 REGULATOR_SUPPLY("8058_l23", NULL),
3835};
3836static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3837 REGULATOR_SUPPLY("8058_l24", NULL),
3838};
3839static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3840 REGULATOR_SUPPLY("8058_l25", NULL),
3841};
3842static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3843 REGULATOR_SUPPLY("8058_s0", NULL),
3844};
3845static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3846 REGULATOR_SUPPLY("8058_s1", NULL),
3847};
3848static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3849 REGULATOR_SUPPLY("8058_s2", NULL),
3850};
3851static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3852 REGULATOR_SUPPLY("8058_s3", NULL),
3853};
3854static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3855 REGULATOR_SUPPLY("8058_s4", NULL),
3856};
3857static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3858 REGULATOR_SUPPLY("8058_lvs0", NULL),
3859};
3860static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3861 REGULATOR_SUPPLY("8058_lvs1", NULL),
3862};
3863static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3864 REGULATOR_SUPPLY("8058_ncp", NULL),
3865};
3866
3867static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3868 REGULATOR_SUPPLY("8901_l0", NULL),
3869};
3870static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3871 REGULATOR_SUPPLY("8901_l1", NULL),
3872};
3873static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3874 REGULATOR_SUPPLY("8901_l2", NULL),
3875};
3876static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3877 REGULATOR_SUPPLY("8901_l3", NULL),
3878};
3879static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3880 REGULATOR_SUPPLY("8901_l4", NULL),
3881};
3882static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3883 REGULATOR_SUPPLY("8901_l5", NULL),
3884};
3885static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3886 REGULATOR_SUPPLY("8901_l6", NULL),
3887};
3888static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3889 REGULATOR_SUPPLY("8901_s2", NULL),
3890};
3891static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3892 REGULATOR_SUPPLY("8901_s3", NULL),
3893};
3894static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3895 REGULATOR_SUPPLY("8901_s4", NULL),
3896};
3897static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3898 REGULATOR_SUPPLY("8901_lvs0", NULL),
3899};
3900static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3901 REGULATOR_SUPPLY("8901_lvs1", NULL),
3902};
3903static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3904 REGULATOR_SUPPLY("8901_lvs2", NULL),
3905};
3906static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3907 REGULATOR_SUPPLY("8901_lvs3", NULL),
3908};
3909static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3910 REGULATOR_SUPPLY("8901_mvs0", NULL),
3911};
3912
David Collins6f032ba2011-08-31 14:08:15 -07003913/* Pin control regulators */
3914static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3915 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3916};
3917static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3918 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3919};
3920static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3921 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3922};
3923static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3924 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3925};
3926static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3927 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3928};
3929static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3930 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3931};
3932
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003933#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3934 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003935 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003936 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003937 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003938 .init_data = { \
3939 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003940 .valid_modes_mask = _modes, \
3941 .valid_ops_mask = _ops, \
3942 .min_uV = _min_uV, \
3943 .max_uV = _max_uV, \
3944 .input_uV = _min_uV, \
3945 .apply_uV = _apply_uV, \
3946 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003947 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003948 .consumer_supplies = vreg_consumers_##_id, \
3949 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003950 ARRAY_SIZE(vreg_consumers_##_id), \
3951 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003952 .id = RPM_VREG_ID_##_id, \
3953 .default_uV = _default_uV, \
3954 .peak_uA = _peak_uA, \
3955 .avg_uA = _avg_uA, \
3956 .pull_down_enable = _pull_down, \
3957 .pin_ctrl = _pin_ctrl, \
3958 .freq = RPM_VREG_FREQ_##_freq, \
3959 .pin_fn = _pin_fn, \
3960 .force_mode = _force_mode, \
3961 .state = _state, \
3962 .sleep_selectable = _sleep_selectable, \
3963 }
3964
3965/* Pin control initialization */
3966#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3967 { \
3968 .init_data = { \
3969 .constraints = { \
3970 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3971 .always_on = _always_on, \
3972 }, \
3973 .num_consumer_supplies = \
3974 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3975 .consumer_supplies = vreg_consumers_##_id##_PC, \
3976 }, \
3977 .id = RPM_VREG_ID_##_id##_PC, \
3978 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003979 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003980 }
3981
3982/*
3983 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3984 * via the peak_uA value specified in the table below. If the value is less
3985 * than the high power min threshold for the regulator, then the regulator will
3986 * be set to LPM. Otherwise, it will be set to HPM.
3987 *
3988 * This value can be further overridden by specifying an initial mode via
3989 * .init_data.constraints.initial_mode.
3990 */
3991
David Collins6f032ba2011-08-31 14:08:15 -07003992#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
3993 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003994 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
3995 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
3996 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
3997 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
3998 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07003999 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4000 RPM_VREG_PIN_FN_8660_ENABLE, \
4001 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004002 _sleep_selectable, _always_on)
4003
David Collins6f032ba2011-08-31 14:08:15 -07004004#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4005 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004006 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4007 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4008 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4009 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4010 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004011 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4012 RPM_VREG_PIN_FN_8660_ENABLE, \
4013 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4014 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004015
David Collins6f032ba2011-08-31 14:08:15 -07004016#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004017 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4018 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004019 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4020 RPM_VREG_PIN_FN_8660_ENABLE, \
4021 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4022 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004023
David Collins6f032ba2011-08-31 14:08:15 -07004024#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004025 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4026 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004027 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4028 RPM_VREG_PIN_FN_8660_ENABLE, \
4029 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4030 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031
David Collins6f032ba2011-08-31 14:08:15 -07004032#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4033#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4034#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4035#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4036#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004037
David Collins6f032ba2011-08-31 14:08:15 -07004038/* RPM early regulator constraints */
4039static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4040 /* ID a_on pd ss min_uV max_uV init_ip freq */
4041 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4042 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004043};
4044
David Collins6f032ba2011-08-31 14:08:15 -07004045/* RPM regulator constraints */
4046static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4047 /* ID a_on pd ss min_uV max_uV init_ip */
4048 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4049 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4050 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4051 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4052 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4053 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4054 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4055 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4056 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4057 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4058 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4059 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4060 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4061 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4062 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4063 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4064 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4065 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4066 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4067 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4068 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4069 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4070 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4071 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4072 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4073 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004074
David Collins6f032ba2011-08-31 14:08:15 -07004075 /* ID a_on pd ss min_uV max_uV init_ip freq */
4076 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4077 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4078 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4079
4080 /* ID a_on pd ss */
4081 RPM_VS(PM8058_LVS0, 0, 1, 0),
4082 RPM_VS(PM8058_LVS1, 0, 1, 0),
4083
4084 /* ID a_on pd ss min_uV max_uV */
4085 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4086
4087 /* ID a_on pd ss min_uV max_uV init_ip */
4088 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4089 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4090 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4091 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4092 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4093 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4094 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4095
4096 /* ID a_on pd ss min_uV max_uV init_ip freq */
4097 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4098 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4099 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4100
4101 /* ID a_on pd ss */
4102 RPM_VS(PM8901_LVS0, 1, 1, 0),
4103 RPM_VS(PM8901_LVS1, 0, 1, 0),
4104 RPM_VS(PM8901_LVS2, 0, 1, 0),
4105 RPM_VS(PM8901_LVS3, 0, 1, 0),
4106 RPM_VS(PM8901_MVS0, 0, 1, 0),
4107
4108 /* ID a_on pin_func pin_ctrl */
4109 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4110 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4111 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4112 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4113 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4114 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4115};
4116
4117static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4118 .init_data = rpm_regulator_early_init_data,
4119 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4120 .version = RPM_VREG_VERSION_8660,
4121 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4122 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4123};
4124
4125static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4126 .init_data = rpm_regulator_init_data,
4127 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4128 .version = RPM_VREG_VERSION_8660,
4129};
4130
4131static struct platform_device rpm_regulator_early_device = {
4132 .name = "rpm-regulator",
4133 .id = 0,
4134 .dev = {
4135 .platform_data = &rpm_regulator_early_pdata,
4136 },
4137};
4138
4139static struct platform_device rpm_regulator_device = {
4140 .name = "rpm-regulator",
4141 .id = 1,
4142 .dev = {
4143 .platform_data = &rpm_regulator_pdata,
4144 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004145};
4146
4147static struct platform_device *early_regulators[] __initdata = {
4148 &msm_device_saw_s0,
4149 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004150 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004151};
4152
4153static struct platform_device *early_devices[] __initdata = {
4154#ifdef CONFIG_MSM_BUS_SCALING
4155 &msm_bus_apps_fabric,
4156 &msm_bus_sys_fabric,
4157 &msm_bus_mm_fabric,
4158 &msm_bus_sys_fpb,
4159 &msm_bus_cpss_fpb,
4160#endif
4161 &msm_device_dmov_adm0,
4162 &msm_device_dmov_adm1,
4163};
4164
4165#if (defined(CONFIG_MARIMBA_CORE)) && \
4166 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4167
4168static int bluetooth_power(int);
4169static struct platform_device msm_bt_power_device = {
4170 .name = "bt_power",
4171 .id = -1,
4172 .dev = {
4173 .platform_data = &bluetooth_power,
4174 },
4175};
4176#endif
4177
4178static struct platform_device msm_tsens_device = {
4179 .name = "tsens-tm",
4180 .id = -1,
4181};
4182
4183static struct platform_device *rumi_sim_devices[] __initdata = {
4184 &smc91x_device,
4185 &msm_device_uart_dm12,
4186#ifdef CONFIG_I2C_QUP
4187 &msm_gsbi3_qup_i2c_device,
4188 &msm_gsbi4_qup_i2c_device,
4189 &msm_gsbi7_qup_i2c_device,
4190 &msm_gsbi8_qup_i2c_device,
4191 &msm_gsbi9_qup_i2c_device,
4192 &msm_gsbi12_qup_i2c_device,
4193#endif
4194#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004195 &msm_device_ssbi3,
4196#endif
4197#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004198#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004199 &android_pmem_device,
4200 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004201 &android_pmem_smipool_device,
4202#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004203 &android_pmem_audio_device,
4204#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004205#ifdef CONFIG_MSM_ROTATOR
4206 &msm_rotator_device,
4207#endif
4208 &msm_fb_device,
4209 &msm_kgsl_3d0,
4210 &msm_kgsl_2d0,
4211 &msm_kgsl_2d1,
4212 &lcdc_samsung_panel_device,
4213#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4214 &hdmi_msm_device,
4215#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4216#ifdef CONFIG_MSM_CAMERA
4217#ifdef CONFIG_MT9E013
4218 &msm_camera_sensor_mt9e013,
4219#endif
4220#ifdef CONFIG_IMX074
4221 &msm_camera_sensor_imx074,
4222#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004223#ifdef CONFIG_VX6953
4224 &msm_camera_sensor_vx6953,
4225#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004226#ifdef CONFIG_WEBCAM_OV7692
4227 &msm_camera_sensor_webcam_ov7692,
4228#endif
4229#ifdef CONFIG_WEBCAM_OV9726
4230 &msm_camera_sensor_webcam_ov9726,
4231#endif
4232#ifdef CONFIG_QS_S5K4E1
4233 &msm_camera_sensor_qs_s5k4e1,
4234#endif
4235#endif
4236#ifdef CONFIG_MSM_GEMINI
4237 &msm_gemini_device,
4238#endif
4239#ifdef CONFIG_MSM_VPE
4240 &msm_vpe_device,
4241#endif
4242 &msm_device_vidc,
4243};
4244
4245#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4246enum {
4247 SX150X_CORE,
4248 SX150X_DOCKING,
4249 SX150X_SURF,
4250 SX150X_LEFT_FHA,
4251 SX150X_RIGHT_FHA,
4252 SX150X_SOUTH,
4253 SX150X_NORTH,
4254 SX150X_CORE_FLUID,
4255};
4256
4257static struct sx150x_platform_data sx150x_data[] __initdata = {
4258 [SX150X_CORE] = {
4259 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4260 .oscio_is_gpo = false,
4261 .io_pullup_ena = 0x0c08,
4262 .io_pulldn_ena = 0x4060,
4263 .io_open_drain_ena = 0x000c,
4264 .io_polarity = 0,
4265 .irq_summary = -1, /* see fixup_i2c_configs() */
4266 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4267 },
4268 [SX150X_DOCKING] = {
4269 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4270 .oscio_is_gpo = false,
4271 .io_pullup_ena = 0x5e06,
4272 .io_pulldn_ena = 0x81b8,
4273 .io_open_drain_ena = 0,
4274 .io_polarity = 0,
4275 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4276 UI_INT2_N),
4277 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4278 GPIO_DOCKING_EXPANDER_BASE -
4279 GPIO_EXPANDER_GPIO_BASE,
4280 },
4281 [SX150X_SURF] = {
4282 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4283 .oscio_is_gpo = false,
4284 .io_pullup_ena = 0,
4285 .io_pulldn_ena = 0,
4286 .io_open_drain_ena = 0,
4287 .io_polarity = 0,
4288 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4289 UI_INT1_N),
4290 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4291 GPIO_SURF_EXPANDER_BASE -
4292 GPIO_EXPANDER_GPIO_BASE,
4293 },
4294 [SX150X_LEFT_FHA] = {
4295 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4296 .oscio_is_gpo = false,
4297 .io_pullup_ena = 0,
4298 .io_pulldn_ena = 0x40,
4299 .io_open_drain_ena = 0,
4300 .io_polarity = 0,
4301 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4302 UI_INT3_N),
4303 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4304 GPIO_LEFT_KB_EXPANDER_BASE -
4305 GPIO_EXPANDER_GPIO_BASE,
4306 },
4307 [SX150X_RIGHT_FHA] = {
4308 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4309 .oscio_is_gpo = true,
4310 .io_pullup_ena = 0,
4311 .io_pulldn_ena = 0,
4312 .io_open_drain_ena = 0,
4313 .io_polarity = 0,
4314 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4315 UI_INT3_N),
4316 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4317 GPIO_RIGHT_KB_EXPANDER_BASE -
4318 GPIO_EXPANDER_GPIO_BASE,
4319 },
4320 [SX150X_SOUTH] = {
4321 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4322 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4323 GPIO_SOUTH_EXPANDER_BASE -
4324 GPIO_EXPANDER_GPIO_BASE,
4325 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4326 },
4327 [SX150X_NORTH] = {
4328 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4329 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4330 GPIO_NORTH_EXPANDER_BASE -
4331 GPIO_EXPANDER_GPIO_BASE,
4332 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4333 .oscio_is_gpo = true,
4334 .io_open_drain_ena = 0x30,
4335 },
4336 [SX150X_CORE_FLUID] = {
4337 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4338 .oscio_is_gpo = false,
4339 .io_pullup_ena = 0x0408,
4340 .io_pulldn_ena = 0x4060,
4341 .io_open_drain_ena = 0x0008,
4342 .io_polarity = 0,
4343 .irq_summary = -1, /* see fixup_i2c_configs() */
4344 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4345 },
4346};
4347
4348#ifdef CONFIG_SENSORS_MSM_ADC
4349/* Configuration of EPM expander is done when client
4350 * request an adc read
4351 */
4352static struct sx150x_platform_data sx150x_epmdata = {
4353 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4354 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4355 GPIO_EPM_EXPANDER_BASE -
4356 GPIO_EXPANDER_GPIO_BASE,
4357 .irq_summary = -1,
4358};
4359#endif
4360
4361/* sx150x_low_power_cfg
4362 *
4363 * This data and init function are used to put unused gpio-expander output
4364 * lines into their low-power states at boot. The init
4365 * function must be deferred until a later init stage because the i2c
4366 * gpio expander drivers do not probe until after they are registered
4367 * (see register_i2c_devices) and the work-queues for those registrations
4368 * are processed. Because these lines are unused, there is no risk of
4369 * competing with a device driver for the gpio.
4370 *
4371 * gpio lines whose low-power states are input are naturally in their low-
4372 * power configurations once probed, see the platform data structures above.
4373 */
4374struct sx150x_low_power_cfg {
4375 unsigned gpio;
4376 unsigned val;
4377};
4378
4379static struct sx150x_low_power_cfg
4380common_sx150x_lp_cfgs[] __initdata = {
4381 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4382 {GPIO_EXT_GPS_LNA_EN, 0},
4383 {GPIO_MSM_WAKES_BT, 0},
4384 {GPIO_USB_UICC_EN, 0},
4385 {GPIO_BATT_GAUGE_EN, 0},
4386};
4387
4388static struct sx150x_low_power_cfg
4389surf_ffa_sx150x_lp_cfgs[] __initdata = {
4390 {GPIO_MIPI_DSI_RST_N, 0},
4391 {GPIO_DONGLE_PWR_EN, 0},
4392 {GPIO_CAP_TS_SLEEP, 1},
4393 {GPIO_WEB_CAMIF_RESET_N, 0},
4394};
4395
4396static void __init
4397cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4398{
4399 unsigned n;
4400 int rc;
4401
4402 for (n = 0; n < nelems; ++n) {
4403 rc = gpio_request(cfgs[n].gpio, NULL);
4404 if (!rc) {
4405 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4406 gpio_free(cfgs[n].gpio);
4407 }
4408
4409 if (rc) {
4410 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4411 __func__, cfgs[n].gpio, rc);
4412 }
Steve Muckle9161d302010-02-11 11:50:40 -08004413 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004414}
4415
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004416static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004417{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004418 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4419 ARRAY_SIZE(common_sx150x_lp_cfgs));
4420 if (!machine_is_msm8x60_fluid())
4421 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4422 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4423 return 0;
4424}
4425module_init(cfg_sx150xs_low_power);
4426
4427#ifdef CONFIG_I2C
4428static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4429 {
4430 I2C_BOARD_INFO("sx1509q", 0x3e),
4431 .platform_data = &sx150x_data[SX150X_CORE]
4432 },
4433};
4434
4435static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4436 {
4437 I2C_BOARD_INFO("sx1509q", 0x3f),
4438 .platform_data = &sx150x_data[SX150X_DOCKING]
4439 },
4440};
4441
4442static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4443 {
4444 I2C_BOARD_INFO("sx1509q", 0x70),
4445 .platform_data = &sx150x_data[SX150X_SURF]
4446 }
4447};
4448
4449static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4450 {
4451 I2C_BOARD_INFO("sx1508q", 0x21),
4452 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4453 },
4454 {
4455 I2C_BOARD_INFO("sx1508q", 0x22),
4456 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4457 }
4458};
4459
4460static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4461 {
4462 I2C_BOARD_INFO("sx1508q", 0x23),
4463 .platform_data = &sx150x_data[SX150X_SOUTH]
4464 },
4465 {
4466 I2C_BOARD_INFO("sx1508q", 0x20),
4467 .platform_data = &sx150x_data[SX150X_NORTH]
4468 }
4469};
4470
4471static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4472 {
4473 I2C_BOARD_INFO("sx1509q", 0x3e),
4474 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4475 },
4476};
4477
4478#ifdef CONFIG_SENSORS_MSM_ADC
4479static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4480 {
4481 I2C_BOARD_INFO("sx1509q", 0x3e),
4482 .platform_data = &sx150x_epmdata
4483 },
4484};
4485#endif
4486#endif
4487#endif
4488
4489#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004490
4491static struct adc_access_fn xoadc_fn = {
4492 pm8058_xoadc_select_chan_and_start_conv,
4493 pm8058_xoadc_read_adc_code,
4494 pm8058_xoadc_get_properties,
4495 pm8058_xoadc_slot_request,
4496 pm8058_xoadc_restore_slot,
4497 pm8058_xoadc_calibrate,
4498};
4499
4500#if defined(CONFIG_I2C) && \
4501 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4502static struct regulator *vreg_adc_epm1;
4503
4504static struct i2c_client *epm_expander_i2c_register_board(void)
4505
4506{
4507 struct i2c_adapter *i2c_adap;
4508 struct i2c_client *client = NULL;
4509 i2c_adap = i2c_get_adapter(0x0);
4510
4511 if (i2c_adap == NULL)
4512 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4513
4514 if (i2c_adap != NULL)
4515 client = i2c_new_device(i2c_adap,
4516 &fluid_expanders_i2c_epm_info[0]);
4517 return client;
4518
4519}
4520
4521static unsigned int msm_adc_gpio_configure_expander_enable(void)
4522{
4523 int rc = 0;
4524 static struct i2c_client *epm_i2c_client;
4525
4526 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4527
4528 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4529
4530 if (IS_ERR(vreg_adc_epm1)) {
4531 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4532 return 0;
4533 }
4534
4535 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4536 if (rc)
4537 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4538 "regulator set voltage failed\n");
4539
4540 rc = regulator_enable(vreg_adc_epm1);
4541 if (rc) {
4542 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4543 "Error while enabling regulator for epm s3 %d\n", rc);
4544 return rc;
4545 }
4546
4547 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4548 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4549
4550 msleep(1000);
4551
4552 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4553 if (!rc) {
4554 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4555 "Configure 5v boost\n");
4556 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4557 } else {
4558 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4559 "Error for epm 5v boost en\n");
4560 goto exit_vreg_epm;
4561 }
4562
4563 msleep(500);
4564
4565 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4566 if (!rc) {
4567 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4568 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4569 "Configure epm 3.3v\n");
4570 } else {
4571 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4572 "Error for gpio 3.3ven\n");
4573 goto exit_vreg_epm;
4574 }
4575 msleep(500);
4576
4577 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4578 "Trying to request EPM LVLSFT_EN\n");
4579 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4580 if (!rc) {
4581 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4582 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4583 "Configure the lvlsft\n");
4584 } else {
4585 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4586 "Error for epm lvlsft_en\n");
4587 goto exit_vreg_epm;
4588 }
4589
4590 msleep(500);
4591
4592 if (!epm_i2c_client)
4593 epm_i2c_client = epm_expander_i2c_register_board();
4594
4595 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4596 if (!rc)
4597 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4598 if (rc) {
4599 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4600 ": GPIO PWR MON Enable issue\n");
4601 goto exit_vreg_epm;
4602 }
4603
4604 msleep(1000);
4605
4606 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4607 if (!rc) {
4608 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4609 if (rc) {
4610 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4611 ": ADC1_PWDN error direction out\n");
4612 goto exit_vreg_epm;
4613 }
4614 }
4615
4616 msleep(100);
4617
4618 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4619 if (!rc) {
4620 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4621 if (rc) {
4622 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4623 ": ADC2_PWD error direction out\n");
4624 goto exit_vreg_epm;
4625 }
4626 }
4627
4628 msleep(1000);
4629
4630 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4631 if (!rc) {
4632 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4633 if (rc) {
4634 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4635 "Gpio request problem %d\n", rc);
4636 goto exit_vreg_epm;
4637 }
4638 }
4639
4640 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4641 if (!rc) {
4642 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4643 if (rc) {
4644 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4645 ": EPM_SPI_ADC1_CS_N error\n");
4646 goto exit_vreg_epm;
4647 }
4648 }
4649
4650 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4651 if (!rc) {
4652 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4653 if (rc) {
4654 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4655 ": EPM_SPI_ADC2_Cs_N error\n");
4656 goto exit_vreg_epm;
4657 }
4658 }
4659
4660 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4661 "the power monitor reset for epm\n");
4662
4663 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4664 if (!rc) {
4665 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4666 if (rc) {
4667 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4668 ": Error in the power mon reset\n");
4669 goto exit_vreg_epm;
4670 }
4671 }
4672
4673 msleep(1000);
4674
4675 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4676
4677 msleep(500);
4678
4679 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4680
4681 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4682
4683 return rc;
4684
4685exit_vreg_epm:
4686 regulator_disable(vreg_adc_epm1);
4687
4688 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4689 " rc = %d.\n", rc);
4690 return rc;
4691};
4692
4693static unsigned int msm_adc_gpio_configure_expander_disable(void)
4694{
4695 int rc = 0;
4696
4697 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4698 gpio_free(GPIO_PWR_MON_RESET_N);
4699
4700 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4701 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4702
4703 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4704 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4705
4706 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4707 gpio_free(GPIO_PWR_MON_START);
4708
4709 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4710 gpio_free(GPIO_ADC1_PWDN_N);
4711
4712 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4713 gpio_free(GPIO_ADC2_PWDN_N);
4714
4715 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4716 gpio_free(GPIO_PWR_MON_ENABLE);
4717
4718 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4719 gpio_free(GPIO_EPM_LVLSFT_EN);
4720
4721 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4722 gpio_free(GPIO_EPM_5V_BOOST_EN);
4723
4724 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4725 gpio_free(GPIO_EPM_3_3V_EN);
4726
4727 rc = regulator_disable(vreg_adc_epm1);
4728 if (rc)
4729 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4730 "Error while enabling regulator for epm s3 %d\n", rc);
4731 regulator_put(vreg_adc_epm1);
4732
4733 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4734 return rc;
4735};
4736
4737unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4738{
4739 int rc = 0;
4740
4741 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4742 cs_enable);
4743
4744 if (cs_enable < 16) {
4745 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4746 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4747 } else {
4748 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4749 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4750 }
4751 return rc;
4752};
4753
4754unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4755{
4756 int rc = 0;
4757
4758 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4759
4760 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4761
4762 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4763
4764 return rc;
4765};
4766#endif
4767
4768static struct msm_adc_channels msm_adc_channels_data[] = {
4769 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4770 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4771 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4772 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4773 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4774 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4775 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4776 CHAN_PATH_TYPE4,
4777 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4778 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4779 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4780 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4781 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4782 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4783 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4784 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4785 CHAN_PATH_TYPE12,
4786 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4787 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4789 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4790 CHAN_PATH_TYPE_NONE,
4791 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4792 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4793 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4794 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4795 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4796 scale_xtern_chgr_cur},
4797 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4798 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4799 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4800 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4801 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4802 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4803 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4804 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4805 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4806 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4807 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4808 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4809};
4810
4811static char *msm_adc_fluid_device_names[] = {
4812 "ADS_ADC1",
4813 "ADS_ADC2",
4814};
4815
4816static struct msm_adc_platform_data msm_adc_pdata = {
4817 .channel = msm_adc_channels_data,
4818 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4819#if defined(CONFIG_I2C) && \
4820 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4821 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4822 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4823 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4824 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4825#endif
4826};
4827
4828static struct platform_device msm_adc_device = {
4829 .name = "msm_adc",
4830 .id = -1,
4831 .dev = {
4832 .platform_data = &msm_adc_pdata,
4833 },
4834};
4835
4836static void pmic8058_xoadc_mpp_config(void)
4837{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304838 int rc, i;
4839 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
4840 PM8XXX_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
4841 AOUT_CTRL_DISABLE),
4842 PM8XXX_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
4843 AOUT_CTRL_DISABLE),
4844 PM8XXX_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
4845 AOUT_CTRL_DISABLE),
4846 PM8XXX_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
4847 AOUT_CTRL_DISABLE),
4848 PM8XXX_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
4849 AOUT_CTRL_DISABLE),
4850 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004851
4852 rc = pm8901_mpp_config_digital_out(XOADC_MPP_4,
4853 PM8901_MPP_DIG_LEVEL_S4, PM_MPP_DOUT_CTL_LOW);
4854 if (rc)
4855 pr_err("%s: Config mpp4 on pmic 8901 failed\n", __func__);
4856
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304857 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4858 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4859 &xoadc_mpps[i].config);
4860 if (rc) {
4861 pr_err("%s: Config MPP %d of PM8058 failed\n",
4862 __func__, xoadc_mpps[i].mpp);
4863 }
4864 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004865}
4866
4867static struct regulator *vreg_ldo18_adc;
4868
4869static int pmic8058_xoadc_vreg_config(int on)
4870{
4871 int rc;
4872
4873 if (on) {
4874 rc = regulator_enable(vreg_ldo18_adc);
4875 if (rc)
4876 pr_err("%s: Enable of regulator ldo18_adc "
4877 "failed\n", __func__);
4878 } else {
4879 rc = regulator_disable(vreg_ldo18_adc);
4880 if (rc)
4881 pr_err("%s: Disable of regulator ldo18_adc "
4882 "failed\n", __func__);
4883 }
4884
4885 return rc;
4886}
4887
4888static int pmic8058_xoadc_vreg_setup(void)
4889{
4890 int rc;
4891
4892 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4893 if (IS_ERR(vreg_ldo18_adc)) {
4894 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4895 __func__, PTR_ERR(vreg_ldo18_adc));
4896 rc = PTR_ERR(vreg_ldo18_adc);
4897 goto fail;
4898 }
4899
4900 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4901 if (rc) {
4902 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4903 goto fail;
4904 }
4905
4906 return rc;
4907fail:
4908 regulator_put(vreg_ldo18_adc);
4909 return rc;
4910}
4911
4912static void pmic8058_xoadc_vreg_shutdown(void)
4913{
4914 regulator_put(vreg_ldo18_adc);
4915}
4916
4917/* usec. For this ADC,
4918 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4919 * Each channel has different configuration, thus at the time of starting
4920 * the conversion, xoadc will return actual conversion time
4921 * */
4922static struct adc_properties pm8058_xoadc_data = {
4923 .adc_reference = 2200, /* milli-voltage for this adc */
4924 .bitresolution = 15,
4925 .bipolar = 0,
4926 .conversiontime = 54,
4927};
4928
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304929static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004930 .xoadc_prop = &pm8058_xoadc_data,
4931 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4932 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4933 .xoadc_num = XOADC_PMIC_0,
4934 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4935 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4936};
4937#endif
4938
4939#ifdef CONFIG_MSM_SDIO_AL
4940
4941static unsigned mdm2ap_status = 140;
4942
4943static int configure_mdm2ap_status(int on)
4944{
4945 int ret = 0;
4946 if (on)
4947 ret = msm_gpiomux_get(mdm2ap_status);
4948 else
4949 ret = msm_gpiomux_put(mdm2ap_status);
4950
4951 if (ret)
4952 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4953 on);
4954
4955 return ret;
4956}
4957
4958
4959static int get_mdm2ap_status(void)
4960{
4961 return gpio_get_value(mdm2ap_status);
4962}
4963
4964static struct sdio_al_platform_data sdio_al_pdata = {
4965 .config_mdm2ap_status = configure_mdm2ap_status,
4966 .get_mdm2ap_status = get_mdm2ap_status,
4967 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004968 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004969 .peer_sdioc_version_major = 0x0004,
4970 .peer_sdioc_boot_version_minor = 0x0001,
4971 .peer_sdioc_boot_version_major = 0x0003
4972};
4973
4974struct platform_device msm_device_sdio_al = {
4975 .name = "msm_sdio_al",
4976 .id = -1,
4977 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004978 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004979 .platform_data = &sdio_al_pdata,
4980 },
4981};
4982
4983#endif /* CONFIG_MSM_SDIO_AL */
4984
4985static struct platform_device *charm_devices[] __initdata = {
4986 &msm_charm_modem,
4987#ifdef CONFIG_MSM_SDIO_AL
4988 &msm_device_sdio_al,
4989#endif
4990};
4991
Lei Zhou338cab82011-08-19 13:38:17 -04004992#ifdef CONFIG_SND_SOC_MSM8660_APQ
4993static struct platform_device *dragon_alsa_devices[] __initdata = {
4994 &msm_pcm,
4995 &msm_pcm_routing,
4996 &msm_cpudai0,
4997 &msm_cpudai1,
4998 &msm_cpudai_hdmi_rx,
4999 &msm_cpudai_bt_rx,
5000 &msm_cpudai_bt_tx,
5001 &msm_cpudai_fm_rx,
5002 &msm_cpudai_fm_tx,
5003 &msm_cpu_fe,
5004 &msm_stub_codec,
5005 &msm_lpa_pcm,
5006};
5007#endif
5008
5009static struct platform_device *asoc_devices[] __initdata = {
5010 &asoc_msm_pcm,
5011 &asoc_msm_dai0,
5012 &asoc_msm_dai1,
5013};
5014
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005015static struct platform_device *surf_devices[] __initdata = {
5016 &msm_device_smd,
5017 &msm_device_uart_dm12,
5018#ifdef CONFIG_I2C_QUP
5019 &msm_gsbi3_qup_i2c_device,
5020 &msm_gsbi4_qup_i2c_device,
5021 &msm_gsbi7_qup_i2c_device,
5022 &msm_gsbi8_qup_i2c_device,
5023 &msm_gsbi9_qup_i2c_device,
5024 &msm_gsbi12_qup_i2c_device,
5025#endif
5026#ifdef CONFIG_SERIAL_MSM_HS
5027 &msm_device_uart_dm1,
5028#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305029#ifdef CONFIG_MSM_SSBI
5030 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305031 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305032#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005033#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005034 &msm_device_ssbi3,
5035#endif
5036#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5037 &isp1763_device,
5038#endif
5039
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005040#if defined (CONFIG_MSM_8x60_VOIP)
5041 &asoc_msm_mvs,
5042 &asoc_mvs_dai0,
5043 &asoc_mvs_dai1,
5044#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005045
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005046#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5047 &msm_device_otg,
5048#endif
5049#ifdef CONFIG_USB_GADGET_MSM_72K
5050 &msm_device_gadget_peripheral,
5051#endif
5052#ifdef CONFIG_USB_G_ANDROID
5053 &android_usb_device,
5054#endif
5055#ifdef CONFIG_BATTERY_MSM
5056 &msm_batt_device,
5057#endif
5058#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005059#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005060 &android_pmem_device,
5061 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005062 &android_pmem_smipool_device,
5063#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005064 &android_pmem_audio_device,
5065#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005066#ifdef CONFIG_MSM_ROTATOR
5067 &msm_rotator_device,
5068#endif
5069 &msm_fb_device,
5070 &msm_kgsl_3d0,
5071 &msm_kgsl_2d0,
5072 &msm_kgsl_2d1,
5073 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005074#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5075 &lcdc_nt35582_panel_device,
5076#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005077#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5078 &lcdc_samsung_oled_panel_device,
5079#endif
5080#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5081 &lcdc_auo_wvga_panel_device,
5082#endif
5083#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5084 &hdmi_msm_device,
5085#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5086#ifdef CONFIG_FB_MSM_MIPI_DSI
5087 &mipi_dsi_toshiba_panel_device,
5088 &mipi_dsi_novatek_panel_device,
5089#endif
5090#ifdef CONFIG_MSM_CAMERA
5091#ifdef CONFIG_MT9E013
5092 &msm_camera_sensor_mt9e013,
5093#endif
5094#ifdef CONFIG_IMX074
5095 &msm_camera_sensor_imx074,
5096#endif
5097#ifdef CONFIG_WEBCAM_OV7692
5098 &msm_camera_sensor_webcam_ov7692,
5099#endif
5100#ifdef CONFIG_WEBCAM_OV9726
5101 &msm_camera_sensor_webcam_ov9726,
5102#endif
5103#ifdef CONFIG_QS_S5K4E1
5104 &msm_camera_sensor_qs_s5k4e1,
5105#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005106#ifdef CONFIG_VX6953
5107 &msm_camera_sensor_vx6953,
5108#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005109#endif
5110#ifdef CONFIG_MSM_GEMINI
5111 &msm_gemini_device,
5112#endif
5113#ifdef CONFIG_MSM_VPE
5114 &msm_vpe_device,
5115#endif
5116
5117#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5118 &msm_rpm_log_device,
5119#endif
5120#if defined(CONFIG_MSM_RPM_STATS_LOG)
5121 &msm_rpm_stat_device,
5122#endif
5123 &msm_device_vidc,
5124#if (defined(CONFIG_MARIMBA_CORE)) && \
5125 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5126 &msm_bt_power_device,
5127#endif
5128#ifdef CONFIG_SENSORS_MSM_ADC
5129 &msm_adc_device,
5130#endif
David Collins6f032ba2011-08-31 14:08:15 -07005131 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005132
5133#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5134 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5135 &qcrypto_device,
5136#endif
5137
5138#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5139 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5140 &qcedev_device,
5141#endif
5142
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005143
5144#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5145#ifdef CONFIG_MSM_USE_TSIF1
5146 &msm_device_tsif[1],
5147#else
5148 &msm_device_tsif[0],
5149#endif /* CONFIG_MSM_USE_TSIF1 */
5150#endif /* CONFIG_TSIF */
5151
5152#ifdef CONFIG_HW_RANDOM_MSM
5153 &msm_device_rng,
5154#endif
5155
5156 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005157 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005158#ifdef CONFIG_ION_MSM
5159 &ion_dev,
5160#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005161 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005162};
5163
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005164#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005165static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005166 .nr = MSM_ION_HEAP_NUM,
5167 .heaps = {
5168 {
5169 .id = ION_HEAP_SYSTEM_ID,
5170 .type = ION_HEAP_TYPE_SYSTEM,
5171 .name = ION_VMALLOC_HEAP_NAME,
5172 },
5173 {
5174 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5175 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5176 .name = ION_KMALLOC_HEAP_NAME,
5177 },
5178#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5179 {
5180 .id = ION_HEAP_EBI_ID,
5181 .type = ION_HEAP_TYPE_CARVEOUT,
5182 .name = ION_EBI1_HEAP_NAME,
5183 .size = MSM_ION_EBI_SIZE,
5184 .memory_type = ION_EBI_TYPE,
5185 },
5186 {
5187 .id = ION_HEAP_ADSP_ID,
5188 .type = ION_HEAP_TYPE_CARVEOUT,
5189 .name = ION_ADSP_HEAP_NAME,
5190 .size = MSM_ION_ADSP_SIZE,
5191 .memory_type = ION_EBI_TYPE,
5192 },
5193 {
5194 .id = ION_HEAP_SMI_ID,
5195 .type = ION_HEAP_TYPE_CARVEOUT,
5196 .name = ION_SMI_HEAP_NAME,
5197 .size = MSM_ION_SMI_SIZE,
5198 .memory_type = ION_SMI_TYPE,
5199 },
5200#endif
5201 }
5202};
5203
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005204static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005205 .name = "ion-msm",
5206 .id = 1,
5207 .dev = { .platform_data = &ion_pdata },
5208};
5209#endif
5210
5211
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005212static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5213 /* Kernel SMI memory pool for video core, used for firmware */
5214 /* and encoder, decoder scratch buffers */
5215 /* Kernel SMI memory pool should always precede the user space */
5216 /* SMI memory pool, as the video core will use offset address */
5217 /* from the Firmware base */
5218 [MEMTYPE_SMI_KERNEL] = {
5219 .start = KERNEL_SMI_BASE,
5220 .limit = KERNEL_SMI_SIZE,
5221 .size = KERNEL_SMI_SIZE,
5222 .flags = MEMTYPE_FLAGS_FIXED,
5223 },
5224 /* User space SMI memory pool for video core */
5225 /* used for encoder, decoder input & output buffers */
5226 [MEMTYPE_SMI] = {
5227 .start = USER_SMI_BASE,
5228 .limit = USER_SMI_SIZE,
5229 .flags = MEMTYPE_FLAGS_FIXED,
5230 },
5231 [MEMTYPE_EBI0] = {
5232 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5233 },
5234 [MEMTYPE_EBI1] = {
5235 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5236 },
5237};
5238
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005239static void reserve_ion_memory(void)
5240{
5241#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5242 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5243 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5244 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5245#endif
5246}
5247
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005248static void __init size_pmem_devices(void)
5249{
5250#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005251#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005252 android_pmem_adsp_pdata.size = pmem_adsp_size;
5253 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005254 android_pmem_pdata.size = pmem_sf_size;
5255#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005256 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5257#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005258}
5259
5260static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5261{
5262 msm8x60_reserve_table[p->memory_type].size += p->size;
5263}
5264
5265static void __init reserve_pmem_memory(void)
5266{
5267#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005268#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005269 reserve_memory_for(&android_pmem_adsp_pdata);
5270 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005271 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005272#endif
5273 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005274 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5275#endif
5276}
5277
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005278
5279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005280static void __init msm8x60_calculate_reserve_sizes(void)
5281{
5282 size_pmem_devices();
5283 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005284 reserve_ion_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005285}
5286
5287static int msm8x60_paddr_to_memtype(unsigned int paddr)
5288{
5289 if (paddr >= 0x40000000 && paddr < 0x60000000)
5290 return MEMTYPE_EBI1;
5291 if (paddr >= 0x38000000 && paddr < 0x40000000)
5292 return MEMTYPE_SMI;
5293 return MEMTYPE_NONE;
5294}
5295
5296static struct reserve_info msm8x60_reserve_info __initdata = {
5297 .memtype_reserve_table = msm8x60_reserve_table,
5298 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5299 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5300};
5301
5302static void __init msm8x60_reserve(void)
5303{
5304 reserve_info = &msm8x60_reserve_info;
5305 msm_reserve();
5306}
5307
5308#define EXT_CHG_VALID_MPP 10
5309#define EXT_CHG_VALID_MPP_2 11
5310
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305311static struct pm8xxx_mpp_init_info isl_mpp[] = {
5312 PM8XXX_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
5313 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
5314 PM8XXX_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
5315 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5316};
5317
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005318#ifdef CONFIG_ISL9519_CHARGER
5319static int isl_detection_setup(void)
5320{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305321 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005322
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305323 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5324 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5325 &isl_mpp[i].config);
5326 if (ret) {
5327 pr_err("%s: Config MPP %d of PM8058 failed\n",
5328 __func__, isl_mpp[i].mpp);
5329 return ret;
5330 }
5331 }
5332
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005333 return ret;
5334}
5335
5336static struct isl_platform_data isl_data __initdata = {
5337 .chgcurrent = 700,
5338 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5339 .chg_detection_config = isl_detection_setup,
5340 .max_system_voltage = 4200,
5341 .min_system_voltage = 3200,
5342 .term_current = 120,
5343 .input_current = 2048,
5344};
5345
5346static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5347 {
5348 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305349 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005350 .platform_data = &isl_data,
5351 },
5352};
5353#endif
5354
5355#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5356static int smb137b_detection_setup(void)
5357{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305358 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005359
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305360 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5361 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5362 &isl_mpp[i].config);
5363 if (ret) {
5364 pr_err("%s: Config MPP %d of PM8058 failed\n",
5365 __func__, isl_mpp[i].mpp);
5366 return ret;
5367 }
5368 }
5369
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005370 return ret;
5371}
5372
5373static struct smb137b_platform_data smb137b_data __initdata = {
5374 .chg_detection_config = smb137b_detection_setup,
5375 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5376 .batt_mah_rating = 950,
5377};
5378
5379static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5380 {
5381 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305382 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005383 .platform_data = &smb137b_data,
5384 },
5385};
5386#endif
5387
5388#ifdef CONFIG_PMIC8058
5389#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305390#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005391
5392static int pm8058_gpios_init(void)
5393{
5394 int i;
5395 int rc;
5396 struct pm8058_gpio_cfg {
5397 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305398 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005399 };
5400
5401 struct pm8058_gpio_cfg gpio_cfgs[] = {
5402 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305403 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005404 {
5405 .direction = PM_GPIO_DIR_IN,
5406 .pull = PM_GPIO_PULL_DN,
5407 .vin_sel = 2,
5408 .function = PM_GPIO_FUNC_NORMAL,
5409 .inv_int_pol = 0,
5410 },
5411 },
5412#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5413 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305414 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005415 {
5416 .direction = PM_GPIO_DIR_IN,
5417 .pull = PM_GPIO_PULL_UP_30,
5418 .vin_sel = 2,
5419 .function = PM_GPIO_FUNC_NORMAL,
5420 .inv_int_pol = 0,
5421 },
5422 },
5423#endif
5424 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305425 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005426 {
5427 .direction = PM_GPIO_DIR_IN,
5428 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305429 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005430 .function = PM_GPIO_FUNC_NORMAL,
5431 .inv_int_pol = 0,
5432 },
5433 },
5434 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305435 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005436 {
5437 .direction = PM_GPIO_DIR_IN,
5438 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305439 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005440 .function = PM_GPIO_FUNC_NORMAL,
5441 .inv_int_pol = 0,
5442 },
5443 },
5444 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305445 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005446 {
5447 .direction = PM_GPIO_DIR_IN,
5448 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305449 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005450 .function = PM_GPIO_FUNC_NORMAL,
5451 .inv_int_pol = 0,
5452 },
5453 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005454 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305455 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005456 {
5457 .direction = PM_GPIO_DIR_OUT,
5458 .output_value = 1,
5459 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5460 .pull = PM_GPIO_PULL_DN,
5461 .out_strength = PM_GPIO_STRENGTH_HIGH,
5462 .function = PM_GPIO_FUNC_NORMAL,
5463 .vin_sel = 2,
5464 .inv_int_pol = 0,
5465 }
5466 },
5467 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305468 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005469 {
5470 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305471 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005472 .function = PM_GPIO_FUNC_NORMAL,
5473 .vin_sel = 2,
5474 .inv_int_pol = 0,
5475 }
5476 },
5477 };
5478
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305479#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5480 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305481 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305482 .direction = PM_GPIO_DIR_IN,
5483 .pull = PM_GPIO_PULL_UP_1P5,
5484 .vin_sel = 2,
5485 .function = PM_GPIO_FUNC_NORMAL,
5486 };
5487#endif
5488
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005489#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305490 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305491 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305492 .direction = PM_GPIO_DIR_OUT,
5493 .pull = PM_GPIO_PULL_NO,
5494 .out_strength = PM_GPIO_STRENGTH_HIGH,
5495 .function = PM_GPIO_FUNC_NORMAL,
5496 .inv_int_pol = 0,
5497 .vin_sel = 2,
5498 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5499 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005500 };
5501#endif
5502
5503#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5504 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305505 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005506 {
5507 .direction = PM_GPIO_DIR_IN,
5508 .pull = PM_GPIO_PULL_UP_1P5,
5509 .vin_sel = 2,
5510 .function = PM_GPIO_FUNC_NORMAL,
5511 .inv_int_pol = 0,
5512 }
5513 };
5514#endif
5515
5516#if defined(CONFIG_QS_S5K4E1)
5517 {
5518 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305519 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005520 {
5521 .direction = PM_GPIO_DIR_OUT,
5522 .output_value = 0,
5523 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5524 .pull = PM_GPIO_PULL_DN,
5525 .out_strength = PM_GPIO_STRENGTH_HIGH,
5526 .function = PM_GPIO_FUNC_NORMAL,
5527 .vin_sel = 2,
5528 .inv_int_pol = 0,
5529 }
5530 };
5531#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005532#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5533 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305534 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005535 {
5536 .direction = PM_GPIO_DIR_OUT,
5537 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5538 .output_value = 1,
5539 .pull = PM_GPIO_PULL_UP_30,
5540 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305541 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005542 .out_strength = PM_GPIO_STRENGTH_HIGH,
5543 .function = PM_GPIO_FUNC_NORMAL,
5544 .inv_int_pol = 0,
5545 }
5546 };
5547#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005548#if defined(CONFIG_HAPTIC_ISA1200) || \
5549 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5550 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305551 rc = pm8xxx_gpio_config(
5552 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5553 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005554 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305555 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005556 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305557 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305558 rc = pm8xxx_gpio_config(
5559 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5560 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305561 if (rc < 0) {
5562 pr_err("%s: pmic haptics ldo gpio config failed\n",
5563 __func__);
5564 }
5565
5566 }
5567#endif
5568
5569#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5570 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5571 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5572 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305573 rc = pm8xxx_gpio_config(
5574 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5575 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305576 if (rc < 0) {
5577 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5578 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005579 }
5580 }
5581#endif
5582
5583#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5584 /* Line_in only for 8660 ffa & surf */
5585 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005586 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005587 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305588 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005589 &line_in_gpio_cfg.cfg);
5590 if (rc < 0) {
5591 pr_err("%s pmic line_in gpio config failed\n",
5592 __func__);
5593 return rc;
5594 }
5595 }
5596#endif
5597
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005598#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5599 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305600 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005601 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5602 if (rc < 0) {
5603 pr_err("%s pmic gpio config failed\n", __func__);
5604 return rc;
5605 }
5606 }
5607#endif
5608
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005609#if defined(CONFIG_QS_S5K4E1)
5610 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5611 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305612 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005613 &qs_hc37_cam_pd_gpio_cfg.cfg);
5614 if (rc < 0) {
5615 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5616 __func__);
5617 return rc;
5618 }
5619 }
5620 }
5621#endif
5622
5623 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305624 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005625 &gpio_cfgs[i].cfg);
5626 if (rc < 0) {
5627 pr_err("%s pmic gpio config failed\n",
5628 __func__);
5629 return rc;
5630 }
5631 }
5632
5633 return 0;
5634}
5635
5636static const unsigned int ffa_keymap[] = {
5637 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5638 KEY(0, 1, KEY_UP), /* NAV - UP */
5639 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5640 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5641
5642 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5643 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5644 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5645 KEY(1, 3, KEY_VOLUMEDOWN),
5646
5647 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5648
5649 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5650 KEY(4, 1, KEY_UP), /* USER_UP */
5651 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5652 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5653 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5654
5655 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5656 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5657 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5658 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5659 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5660};
5661
Zhang Chang Ken683be172011-08-10 17:45:34 -04005662static const unsigned int dragon_keymap[] = {
5663 KEY(0, 0, KEY_MENU),
5664 KEY(0, 2, KEY_1),
5665 KEY(0, 3, KEY_4),
5666 KEY(0, 4, KEY_7),
5667
5668 KEY(1, 0, KEY_UP),
5669 KEY(1, 1, KEY_LEFT),
5670 KEY(1, 2, KEY_DOWN),
5671 KEY(1, 3, KEY_5),
5672 KEY(1, 4, KEY_8),
5673
5674 KEY(2, 0, KEY_HOME),
5675 KEY(2, 1, KEY_REPLY),
5676 KEY(2, 2, KEY_2),
5677 KEY(2, 3, KEY_6),
5678 KEY(2, 4, KEY_0),
5679
5680 KEY(3, 0, KEY_VOLUMEUP),
5681 KEY(3, 1, KEY_RIGHT),
5682 KEY(3, 2, KEY_3),
5683 KEY(3, 3, KEY_9),
5684 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5685
5686 KEY(4, 0, KEY_VOLUMEDOWN),
5687 KEY(4, 1, KEY_BACK),
5688 KEY(4, 2, KEY_CAMERA),
5689 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5690};
5691
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005692static struct matrix_keymap_data ffa_keymap_data = {
5693 .keymap_size = ARRAY_SIZE(ffa_keymap),
5694 .keymap = ffa_keymap,
5695};
5696
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305697static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005698 .input_name = "ffa-keypad",
5699 .input_phys_device = "ffa-keypad/input0",
5700 .num_rows = 6,
5701 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305702 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5703 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5704 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005705 .scan_delay_ms = 32,
5706 .row_hold_ns = 91500,
5707 .wakeup = 1,
5708 .keymap_data = &ffa_keymap_data,
5709};
5710
Zhang Chang Ken683be172011-08-10 17:45:34 -04005711static struct matrix_keymap_data dragon_keymap_data = {
5712 .keymap_size = ARRAY_SIZE(dragon_keymap),
5713 .keymap = dragon_keymap,
5714};
5715
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305716static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005717 .input_name = "dragon-keypad",
5718 .input_phys_device = "dragon-keypad/input0",
5719 .num_rows = 6,
5720 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305721 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5722 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5723 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005724 .scan_delay_ms = 32,
5725 .row_hold_ns = 91500,
5726 .wakeup = 1,
5727 .keymap_data = &dragon_keymap_data,
5728};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305729
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005730static const unsigned int fluid_keymap[] = {
5731 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5732 KEY(0, 1, KEY_UP), /* NAV - UP */
5733 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5734 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5735
5736 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5737 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5738 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5739 KEY(1, 3, KEY_VOLUMEUP),
5740
5741 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5742
5743 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5744 KEY(4, 1, KEY_UP), /* USER_UP */
5745 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5746 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5747 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5748
Jilai Wang9a895102011-07-12 14:00:35 -04005749 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005750 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5751 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5752 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5753 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5754};
5755
5756static struct matrix_keymap_data fluid_keymap_data = {
5757 .keymap_size = ARRAY_SIZE(fluid_keymap),
5758 .keymap = fluid_keymap,
5759};
5760
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305761static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005762 .input_name = "fluid-keypad",
5763 .input_phys_device = "fluid-keypad/input0",
5764 .num_rows = 6,
5765 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305766 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5767 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5768 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005769 .scan_delay_ms = 32,
5770 .row_hold_ns = 91500,
5771 .wakeup = 1,
5772 .keymap_data = &fluid_keymap_data,
5773};
5774
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305775static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005776 .initial_vibrate_ms = 500,
5777 .level_mV = 3000,
5778 .max_timeout_ms = 15000,
5779};
5780
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305781static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5782 .rtc_write_enable = false,
5783 .rtc_alarm_powerup = false,
5784};
5785
5786static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5787 .pull_up = 1,
5788 .kpd_trigger_delay_us = 970,
5789 .wakeup = 1,
5790};
5791
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005792#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5793
5794static struct othc_accessory_info othc_accessories[] = {
5795 {
5796 .accessory = OTHC_SVIDEO_OUT,
5797 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5798 | OTHC_ADC_DETECT,
5799 .key_code = SW_VIDEOOUT_INSERT,
5800 .enabled = false,
5801 .adc_thres = {
5802 .min_threshold = 20,
5803 .max_threshold = 40,
5804 },
5805 },
5806 {
5807 .accessory = OTHC_ANC_HEADPHONE,
5808 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5809 OTHC_SWITCH_DETECT,
5810 .gpio = PM8058_LINE_IN_DET_GPIO,
5811 .active_low = 1,
5812 .key_code = SW_HEADPHONE_INSERT,
5813 .enabled = true,
5814 },
5815 {
5816 .accessory = OTHC_ANC_HEADSET,
5817 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5818 .gpio = PM8058_LINE_IN_DET_GPIO,
5819 .active_low = 1,
5820 .key_code = SW_HEADPHONE_INSERT,
5821 .enabled = true,
5822 },
5823 {
5824 .accessory = OTHC_HEADPHONE,
5825 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5826 .key_code = SW_HEADPHONE_INSERT,
5827 .enabled = true,
5828 },
5829 {
5830 .accessory = OTHC_MICROPHONE,
5831 .detect_flags = OTHC_GPIO_DETECT,
5832 .gpio = PM8058_LINE_IN_DET_GPIO,
5833 .active_low = 1,
5834 .key_code = SW_MICROPHONE_INSERT,
5835 .enabled = true,
5836 },
5837 {
5838 .accessory = OTHC_HEADSET,
5839 .detect_flags = OTHC_MICBIAS_DETECT,
5840 .key_code = SW_HEADPHONE_INSERT,
5841 .enabled = true,
5842 },
5843};
5844
5845static struct othc_switch_info switch_info[] = {
5846 {
5847 .min_adc_threshold = 0,
5848 .max_adc_threshold = 100,
5849 .key_code = KEY_PLAYPAUSE,
5850 },
5851 {
5852 .min_adc_threshold = 100,
5853 .max_adc_threshold = 200,
5854 .key_code = KEY_REWIND,
5855 },
5856 {
5857 .min_adc_threshold = 200,
5858 .max_adc_threshold = 500,
5859 .key_code = KEY_FASTFORWARD,
5860 },
5861};
5862
5863static struct othc_n_switch_config switch_config = {
5864 .voltage_settling_time_ms = 0,
5865 .num_adc_samples = 3,
5866 .adc_channel = CHANNEL_ADC_HDSET,
5867 .switch_info = switch_info,
5868 .num_keys = ARRAY_SIZE(switch_info),
5869 .default_sw_en = true,
5870 .default_sw_idx = 0,
5871};
5872
5873static struct hsed_bias_config hsed_bias_config = {
5874 /* HSED mic bias config info */
5875 .othc_headset = OTHC_HEADSET_NO,
5876 .othc_lowcurr_thresh_uA = 100,
5877 .othc_highcurr_thresh_uA = 600,
5878 .othc_hyst_prediv_us = 7800,
5879 .othc_period_clkdiv_us = 62500,
5880 .othc_hyst_clk_us = 121000,
5881 .othc_period_clk_us = 312500,
5882 .othc_wakeup = 1,
5883};
5884
5885static struct othc_hsed_config hsed_config_1 = {
5886 .hsed_bias_config = &hsed_bias_config,
5887 /*
5888 * The detection delay and switch reporting delay are
5889 * required to encounter a hardware bug (spurious switch
5890 * interrupts on slow insertion/removal of the headset).
5891 * This will introduce a delay in reporting the accessory
5892 * insertion and removal to the userspace.
5893 */
5894 .detection_delay_ms = 1500,
5895 /* Switch info */
5896 .switch_debounce_ms = 1500,
5897 .othc_support_n_switch = false,
5898 .switch_config = &switch_config,
5899 .ir_gpio = -1,
5900 /* Accessory info */
5901 .accessories_support = true,
5902 .accessories = othc_accessories,
5903 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5904};
5905
5906static struct othc_regulator_config othc_reg = {
5907 .regulator = "8058_l5",
5908 .max_uV = 2850000,
5909 .min_uV = 2850000,
5910};
5911
5912/* MIC_BIAS0 is configured as normal MIC BIAS */
5913static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5914 .micbias_select = OTHC_MICBIAS_0,
5915 .micbias_capability = OTHC_MICBIAS,
5916 .micbias_enable = OTHC_SIGNAL_OFF,
5917 .micbias_regulator = &othc_reg,
5918};
5919
5920/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
5921static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
5922 .micbias_select = OTHC_MICBIAS_1,
5923 .micbias_capability = OTHC_MICBIAS_HSED,
5924 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
5925 .micbias_regulator = &othc_reg,
5926 .hsed_config = &hsed_config_1,
5927 .hsed_name = "8660_handset",
5928};
5929
5930/* MIC_BIAS2 is configured as normal MIC BIAS */
5931static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
5932 .micbias_select = OTHC_MICBIAS_2,
5933 .micbias_capability = OTHC_MICBIAS,
5934 .micbias_enable = OTHC_SIGNAL_OFF,
5935 .micbias_regulator = &othc_reg,
5936};
5937
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005938
5939static void __init msm8x60_init_pm8058_othc(void)
5940{
5941 int i;
5942
5943 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
5944 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
5945 machine_is_msm8x60_fusn_ffa()) {
5946 /* 3-switch headset supported only by V2 FFA and FLUID */
5947 hsed_config_1.accessories_adc_support = true,
5948 /* ADC based accessory detection works only on V2 and FLUID */
5949 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
5950 hsed_config_1.othc_support_n_switch = true;
5951 }
5952
5953 /* IR GPIO is absent on FLUID */
5954 if (machine_is_msm8x60_fluid())
5955 hsed_config_1.ir_gpio = -1;
5956
5957 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
5958 if (machine_is_msm8x60_fluid()) {
5959 switch (othc_accessories[i].accessory) {
5960 case OTHC_ANC_HEADPHONE:
5961 case OTHC_ANC_HEADSET:
5962 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
5963 break;
5964 case OTHC_MICROPHONE:
5965 othc_accessories[i].enabled = false;
5966 break;
5967 case OTHC_SVIDEO_OUT:
5968 othc_accessories[i].enabled = true;
5969 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
5970 break;
5971 }
5972 }
5973 }
5974}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005975
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005976
5977static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
5978{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305979 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005980 .direction = PM_GPIO_DIR_OUT,
5981 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5982 .output_value = 0,
5983 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305984 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005985 .out_strength = PM_GPIO_STRENGTH_HIGH,
5986 .function = PM_GPIO_FUNC_2,
5987 };
5988
5989 int rc = -EINVAL;
5990 int id, mode, max_mA;
5991
5992 id = mode = max_mA = 0;
5993 switch (ch) {
5994 case 0:
5995 case 1:
5996 case 2:
5997 if (on) {
5998 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305999 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6000 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006001 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306002 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006003 __func__, id, rc);
6004 }
6005 break;
6006
6007 case 6:
6008 id = PM_PWM_LED_FLASH;
6009 mode = PM_PWM_CONF_PWM1;
6010 max_mA = 300;
6011 break;
6012
6013 case 7:
6014 id = PM_PWM_LED_FLASH1;
6015 mode = PM_PWM_CONF_PWM1;
6016 max_mA = 300;
6017 break;
6018
6019 default:
6020 break;
6021 }
6022
6023 if (ch >= 6 && ch <= 7) {
6024 if (!on) {
6025 mode = PM_PWM_CONF_NONE;
6026 max_mA = 0;
6027 }
6028 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6029 if (rc)
6030 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6031 __func__, ch, rc);
6032 }
6033 return rc;
6034
6035}
6036
6037static struct pm8058_pwm_pdata pm8058_pwm_data = {
6038 .config = pm8058_pwm_config,
6039};
6040
6041#define PM8058_GPIO_INT 88
6042
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006043static struct pmic8058_led pmic8058_flash_leds[] = {
6044 [0] = {
6045 .name = "camera:flash0",
6046 .max_brightness = 15,
6047 .id = PMIC8058_ID_FLASH_LED_0,
6048 },
6049 [1] = {
6050 .name = "camera:flash1",
6051 .max_brightness = 15,
6052 .id = PMIC8058_ID_FLASH_LED_1,
6053 },
6054};
6055
6056static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6057 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6058 .leds = pmic8058_flash_leds,
6059};
6060
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006061static struct pmic8058_led pmic8058_dragon_leds[] = {
6062 [0] = {
6063 /* RED */
6064 .name = "led_drv0",
6065 .max_brightness = 15,
6066 .id = PMIC8058_ID_LED_0,
6067 },/* 300 mA flash led0 drv sink */
6068 [1] = {
6069 /* Yellow */
6070 .name = "led_drv1",
6071 .max_brightness = 15,
6072 .id = PMIC8058_ID_LED_1,
6073 },/* 300 mA flash led0 drv sink */
6074 [2] = {
6075 /* Green */
6076 .name = "led_drv2",
6077 .max_brightness = 15,
6078 .id = PMIC8058_ID_LED_2,
6079 },/* 300 mA flash led0 drv sink */
6080 [3] = {
6081 .name = "led_psensor",
6082 .max_brightness = 15,
6083 .id = PMIC8058_ID_LED_KB_LIGHT,
6084 },/* 300 mA flash led0 drv sink */
6085};
6086
6087static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6088 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6089 .leds = pmic8058_dragon_leds,
6090};
6091
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006092static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6093 [0] = {
6094 .name = "led:drv0",
6095 .max_brightness = 15,
6096 .id = PMIC8058_ID_FLASH_LED_0,
6097 },/* 300 mA flash led0 drv sink */
6098 [1] = {
6099 .name = "led:drv1",
6100 .max_brightness = 15,
6101 .id = PMIC8058_ID_FLASH_LED_1,
6102 },/* 300 mA flash led1 sink */
6103 [2] = {
6104 .name = "led:drv2",
6105 .max_brightness = 20,
6106 .id = PMIC8058_ID_LED_0,
6107 },/* 40 mA led0 sink */
6108 [3] = {
6109 .name = "keypad:drv",
6110 .max_brightness = 15,
6111 .id = PMIC8058_ID_LED_KB_LIGHT,
6112 },/* 300 mA keypad drv sink */
6113};
6114
6115static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6116 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6117 .leds = pmic8058_fluid_flash_leds,
6118};
6119
Terence Hampson90508a92011-08-09 10:40:08 -04006120static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306121 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006122 .max_source_current = 1800,
6123 .charger_type = CHG_TYPE_AC,
6124};
6125
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306126static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6127 .charger_data_valid = false,
6128};
6129
6130static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6131 .priority = 0,
6132};
6133
6134static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6135 .irq_base = PM8058_IRQ_BASE,
6136 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6137 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6138};
6139
6140static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6141 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6142};
6143
6144static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6145 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006146};
6147
6148static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306149 .irq_pdata = &pm8058_irq_pdata,
6150 .gpio_pdata = &pm8058_gpio_pdata,
6151 .mpp_pdata = &pm8058_mpp_pdata,
6152 .rtc_pdata = &pm8058_rtc_pdata,
6153 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6154 .othc0_pdata = &othc_config_pdata_0,
6155 .othc1_pdata = &othc_config_pdata_1,
6156 .othc2_pdata = &othc_config_pdata_2,
6157 .pwm_pdata = &pm8058_pwm_data,
6158 .misc_pdata = &pm8058_misc_pdata,
6159#ifdef CONFIG_SENSORS_MSM_ADC
6160 .xoadc_pdata = &pm8058_xoadc_pdata,
6161#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006162};
6163
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306164#ifdef CONFIG_MSM_SSBI
6165static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6166 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6167 .slave = {
6168 .name = "pm8058-core",
6169 .platform_data = &pm8058_platform_data,
6170 },
6171};
6172#endif
6173#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006174
6175#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6176 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6177#define TDISC_I2C_SLAVE_ADDR 0x67
6178#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6179#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6180
6181static const char *vregs_tdisc_name[] = {
6182 "8058_l5",
6183 "8058_s3",
6184};
6185
6186static const int vregs_tdisc_val[] = {
6187 2850000,/* uV */
6188 1800000,
6189};
6190static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6191
6192static int tdisc_shinetsu_setup(void)
6193{
6194 int rc, i;
6195
6196 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6197 if (rc) {
6198 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6199 __func__);
6200 return rc;
6201 }
6202
6203 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6204 if (rc) {
6205 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6206 __func__);
6207 goto fail_gpio_oe;
6208 }
6209
6210 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6211 if (rc) {
6212 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6213 __func__);
6214 gpio_free(GPIO_JOYSTICK_EN);
6215 goto fail_gpio_oe;
6216 }
6217
6218 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6219 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6220 if (IS_ERR(vregs_tdisc[i])) {
6221 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6222 __func__, vregs_tdisc_name[i],
6223 PTR_ERR(vregs_tdisc[i]));
6224 rc = PTR_ERR(vregs_tdisc[i]);
6225 goto vreg_get_fail;
6226 }
6227
6228 rc = regulator_set_voltage(vregs_tdisc[i],
6229 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6230 if (rc) {
6231 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6232 __func__, rc);
6233 goto vreg_set_voltage_fail;
6234 }
6235 }
6236
6237 return rc;
6238vreg_set_voltage_fail:
6239 i++;
6240vreg_get_fail:
6241 while (i)
6242 regulator_put(vregs_tdisc[--i]);
6243fail_gpio_oe:
6244 gpio_free(PMIC_GPIO_TDISC);
6245 return rc;
6246}
6247
6248static void tdisc_shinetsu_release(void)
6249{
6250 int i;
6251
6252 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6253 regulator_put(vregs_tdisc[i]);
6254
6255 gpio_free(PMIC_GPIO_TDISC);
6256 gpio_free(GPIO_JOYSTICK_EN);
6257}
6258
6259static int tdisc_shinetsu_enable(void)
6260{
6261 int i, rc = -EINVAL;
6262
6263 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6264 rc = regulator_enable(vregs_tdisc[i]);
6265 if (rc < 0) {
6266 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6267 __func__, vregs_tdisc_name[i], rc);
6268 goto vreg_fail;
6269 }
6270 }
6271
6272 /* Enable the OE (output enable) gpio */
6273 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6274 /* voltage and gpio stabilization delay */
6275 msleep(50);
6276
6277 return 0;
6278vreg_fail:
6279 while (i)
6280 regulator_disable(vregs_tdisc[--i]);
6281 return rc;
6282}
6283
6284static int tdisc_shinetsu_disable(void)
6285{
6286 int i, rc;
6287
6288 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6289 rc = regulator_disable(vregs_tdisc[i]);
6290 if (rc < 0) {
6291 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6292 __func__, vregs_tdisc_name[i], rc);
6293 goto tdisc_reg_fail;
6294 }
6295 }
6296
6297 /* Disable the OE (output enable) gpio */
6298 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6299
6300 return 0;
6301
6302tdisc_reg_fail:
6303 while (i)
6304 regulator_enable(vregs_tdisc[--i]);
6305 return rc;
6306}
6307
6308static struct tdisc_abs_values tdisc_abs = {
6309 .x_max = 32,
6310 .y_max = 32,
6311 .x_min = -32,
6312 .y_min = -32,
6313 .pressure_max = 32,
6314 .pressure_min = 0,
6315};
6316
6317static struct tdisc_platform_data tdisc_data = {
6318 .tdisc_setup = tdisc_shinetsu_setup,
6319 .tdisc_release = tdisc_shinetsu_release,
6320 .tdisc_enable = tdisc_shinetsu_enable,
6321 .tdisc_disable = tdisc_shinetsu_disable,
6322 .tdisc_wakeup = 0,
6323 .tdisc_gpio = PMIC_GPIO_TDISC,
6324 .tdisc_report_keys = true,
6325 .tdisc_report_relative = true,
6326 .tdisc_report_absolute = false,
6327 .tdisc_report_wheel = false,
6328 .tdisc_reverse_x = false,
6329 .tdisc_reverse_y = true,
6330 .tdisc_abs = &tdisc_abs,
6331};
6332
6333static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6334 {
6335 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6336 .irq = TDISC_INT,
6337 .platform_data = &tdisc_data,
6338 },
6339};
6340#endif
6341
6342#define PM_GPIO_CDC_RST_N 20
6343#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6344
6345static struct regulator *vreg_timpani_1;
6346static struct regulator *vreg_timpani_2;
6347
6348static unsigned int msm_timpani_setup_power(void)
6349{
6350 int rc;
6351
6352 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6353 if (IS_ERR(vreg_timpani_1)) {
6354 pr_err("%s: Unable to get 8058_l0\n", __func__);
6355 return -ENODEV;
6356 }
6357
6358 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6359 if (IS_ERR(vreg_timpani_2)) {
6360 pr_err("%s: Unable to get 8058_s3\n", __func__);
6361 regulator_put(vreg_timpani_1);
6362 return -ENODEV;
6363 }
6364
6365 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6366 if (rc) {
6367 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6368 goto fail;
6369 }
6370
6371 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6372 if (rc) {
6373 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6374 goto fail;
6375 }
6376
6377 rc = regulator_enable(vreg_timpani_1);
6378 if (rc) {
6379 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6380 goto fail;
6381 }
6382
6383 /* The settings for LDO0 should be set such that
6384 * it doesn't require to reset the timpani. */
6385 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6386 if (rc < 0) {
6387 pr_err("Timpani regulator optimum mode setting failed\n");
6388 goto fail;
6389 }
6390
6391 rc = regulator_enable(vreg_timpani_2);
6392 if (rc) {
6393 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6394 regulator_disable(vreg_timpani_1);
6395 goto fail;
6396 }
6397
6398 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6399 if (rc) {
6400 pr_err("%s: GPIO Request %d failed\n", __func__,
6401 GPIO_CDC_RST_N);
6402 regulator_disable(vreg_timpani_1);
6403 regulator_disable(vreg_timpani_2);
6404 goto fail;
6405 } else {
6406 gpio_direction_output(GPIO_CDC_RST_N, 1);
6407 usleep_range(1000, 1050);
6408 gpio_direction_output(GPIO_CDC_RST_N, 0);
6409 usleep_range(1000, 1050);
6410 gpio_direction_output(GPIO_CDC_RST_N, 1);
6411 gpio_free(GPIO_CDC_RST_N);
6412 }
6413 return rc;
6414
6415fail:
6416 regulator_put(vreg_timpani_1);
6417 regulator_put(vreg_timpani_2);
6418 return rc;
6419}
6420
6421static void msm_timpani_shutdown_power(void)
6422{
6423 int rc;
6424
6425 rc = regulator_disable(vreg_timpani_1);
6426 if (rc)
6427 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6428
6429 regulator_put(vreg_timpani_1);
6430
6431 rc = regulator_disable(vreg_timpani_2);
6432 if (rc)
6433 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6434
6435 regulator_put(vreg_timpani_2);
6436}
6437
6438/* Power analog function of codec */
6439static struct regulator *vreg_timpani_cdc_apwr;
6440static int msm_timpani_codec_power(int vreg_on)
6441{
6442 int rc = 0;
6443
6444 if (!vreg_timpani_cdc_apwr) {
6445
6446 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6447
6448 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6449 pr_err("%s: vreg_get failed (%ld)\n",
6450 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6451 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6452 return rc;
6453 }
6454 }
6455
6456 if (vreg_on) {
6457
6458 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6459 2200000, 2200000);
6460 if (rc) {
6461 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6462 __func__);
6463 goto vreg_fail;
6464 }
6465
6466 rc = regulator_enable(vreg_timpani_cdc_apwr);
6467 if (rc) {
6468 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6469 goto vreg_fail;
6470 }
6471 } else {
6472 rc = regulator_disable(vreg_timpani_cdc_apwr);
6473 if (rc) {
6474 pr_err("%s: vreg_disable failed %d\n",
6475 __func__, rc);
6476 goto vreg_fail;
6477 }
6478 }
6479
6480 return 0;
6481
6482vreg_fail:
6483 regulator_put(vreg_timpani_cdc_apwr);
6484 vreg_timpani_cdc_apwr = NULL;
6485 return rc;
6486}
6487
6488static struct marimba_codec_platform_data timpani_codec_pdata = {
6489 .marimba_codec_power = msm_timpani_codec_power,
6490};
6491
6492#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6493#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6494
6495static struct marimba_platform_data timpani_pdata = {
6496 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6497 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6498 .marimba_setup = msm_timpani_setup_power,
6499 .marimba_shutdown = msm_timpani_shutdown_power,
6500 .codec = &timpani_codec_pdata,
6501 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6502};
6503
6504#define TIMPANI_I2C_SLAVE_ADDR 0xD
6505
6506static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6507 {
6508 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6509 .platform_data = &timpani_pdata,
6510 },
6511};
6512
Lei Zhou338cab82011-08-19 13:38:17 -04006513#ifdef CONFIG_SND_SOC_WM8903
6514static struct wm8903_platform_data wm8903_pdata = {
6515 .gpio_cfg[2] = 0x3A8,
6516};
6517
6518#define WM8903_I2C_SLAVE_ADDR 0x34
6519static struct i2c_board_info wm8903_codec_i2c_info[] = {
6520 {
6521 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6522 .platform_data = &wm8903_pdata,
6523 },
6524};
6525#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006526#ifdef CONFIG_PMIC8901
6527
6528#define PM8901_GPIO_INT 91
6529
6530static struct pm8901_gpio_platform_data pm8901_mpp_data = {
6531 .gpio_base = PM8901_GPIO_PM_TO_SYS(0),
6532 .irq_base = PM8901_MPP_IRQ(PM8901_IRQ_BASE, 0),
6533};
6534
6535static struct resource pm8901_temp_alarm[] = {
6536 {
6537 .start = PM8901_TEMP_ALARM_IRQ(PM8901_IRQ_BASE),
6538 .end = PM8901_TEMP_ALARM_IRQ(PM8901_IRQ_BASE),
6539 .flags = IORESOURCE_IRQ,
6540 },
6541 {
6542 .start = PM8901_TEMP_HI_ALARM_IRQ(PM8901_IRQ_BASE),
6543 .end = PM8901_TEMP_HI_ALARM_IRQ(PM8901_IRQ_BASE),
6544 .flags = IORESOURCE_IRQ,
6545 },
6546};
6547
6548/*
6549 * Consumer specific regulator names:
6550 * regulator name consumer dev_name
6551 */
6552static struct regulator_consumer_supply vreg_consumers_8901_MPP0[] = {
6553 REGULATOR_SUPPLY("8901_mpp0", NULL),
6554};
6555static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6556 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6557};
6558static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6559 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6560};
6561
6562#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
6563 _always_on, _active_high) \
6564 [PM8901_VREG_ID_##_id] = { \
6565 .init_data = { \
6566 .constraints = { \
6567 .valid_modes_mask = _modes, \
6568 .valid_ops_mask = _ops, \
6569 .min_uV = _min_uV, \
6570 .max_uV = _max_uV, \
6571 .input_uV = _min_uV, \
6572 .apply_uV = _apply_uV, \
6573 .always_on = _always_on, \
6574 }, \
6575 .consumer_supplies = vreg_consumers_8901_##_id, \
6576 .num_consumer_supplies = \
6577 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6578 }, \
6579 .active_high = _active_high, \
6580 }
6581
6582#define PM8901_VREG_INIT_MPP(_id, _active_high) \
6583 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
6584 REGULATOR_CHANGE_STATUS, 0, 0, _active_high)
6585
6586#define PM8901_VREG_INIT_VS(_id) \
6587 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
6588 REGULATOR_CHANGE_STATUS, 0, 0, 0)
6589
6590static struct pm8901_vreg_pdata pm8901_vreg_init_pdata[PM8901_VREG_MAX] = {
6591 PM8901_VREG_INIT_MPP(MPP0, 1),
6592
6593 PM8901_VREG_INIT_VS(USB_OTG),
6594 PM8901_VREG_INIT_VS(HDMI_MVS),
6595};
6596
6597#define PM8901_VREG(_id) { \
6598 .name = "pm8901-regulator", \
6599 .id = _id, \
6600 .platform_data = &pm8901_vreg_init_pdata[_id], \
6601 .pdata_size = sizeof(pm8901_vreg_init_pdata[_id]), \
6602}
6603
6604static struct mfd_cell pm8901_subdevs[] = {
6605 { .name = "pm8901-mpp",
6606 .id = -1,
6607 .platform_data = &pm8901_mpp_data,
6608 .pdata_size = sizeof(pm8901_mpp_data),
6609 },
6610 { .name = "pm8901-tm",
6611 .id = -1,
6612 .num_resources = ARRAY_SIZE(pm8901_temp_alarm),
6613 .resources = pm8901_temp_alarm,
6614 },
6615 PM8901_VREG(PM8901_VREG_ID_MPP0),
6616 PM8901_VREG(PM8901_VREG_ID_USB_OTG),
6617 PM8901_VREG(PM8901_VREG_ID_HDMI_MVS),
6618};
6619
6620static struct pm8901_platform_data pm8901_platform_data = {
6621 .irq_base = PM8901_IRQ_BASE,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306622 .irq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006623 .num_subdevs = ARRAY_SIZE(pm8901_subdevs),
6624 .sub_devices = pm8901_subdevs,
6625 .irq_trigger_flags = IRQF_TRIGGER_LOW,
6626};
6627
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306628static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6629 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6630 .slave = {
6631 .name = "pm8901-core",
6632 .platform_data = &pm8901_platform_data,
6633 },
6634};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006635#endif /* CONFIG_PMIC8901 */
6636
6637#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6638 || defined(CONFIG_GPIO_SX150X_MODULE))
6639
6640static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006641static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006642
6643struct bahama_config_register{
6644 u8 reg;
6645 u8 value;
6646 u8 mask;
6647};
6648
6649enum version{
6650 VER_1_0,
6651 VER_2_0,
6652 VER_UNSUPPORTED = 0xFF
6653};
6654
6655static u8 read_bahama_ver(void)
6656{
6657 int rc;
6658 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6659 u8 bahama_version;
6660
6661 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6662 if (rc < 0) {
6663 printk(KERN_ERR
6664 "%s: version read failed: %d\n",
6665 __func__, rc);
6666 return VER_UNSUPPORTED;
6667 } else {
6668 printk(KERN_INFO
6669 "%s: version read got: 0x%x\n",
6670 __func__, bahama_version);
6671 }
6672
6673 switch (bahama_version) {
6674 case 0x08: /* varient of bahama v1 */
6675 case 0x10:
6676 case 0x00:
6677 return VER_1_0;
6678 case 0x09: /* variant of bahama v2 */
6679 return VER_2_0;
6680 default:
6681 return VER_UNSUPPORTED;
6682 }
6683}
6684
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006685static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006686static unsigned int msm_bahama_setup_power(void)
6687{
6688 int rc = 0;
6689 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006690
6691 if (machine_is_msm8x60_dragon())
6692 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006694 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6695
6696 if (IS_ERR(vreg_bahama)) {
6697 rc = PTR_ERR(vreg_bahama);
6698 pr_err("%s: regulator_get %s = %d\n", __func__,
6699 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006700 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006701 }
6702
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006703 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6704 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006705 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6706 msm_bahama_regulator, rc);
6707 goto unget;
6708 }
6709
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006710 rc = regulator_enable(vreg_bahama);
6711 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006712 pr_err("%s: regulator_enable %s = %d\n", __func__,
6713 msm_bahama_regulator, rc);
6714 goto unget;
6715 }
6716
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006717 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6718 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006719 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006720 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006721 goto unenable;
6722 }
6723
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006724 gpio_direction_output(msm_bahama_sys_rst, 0);
6725 usleep_range(1000, 1050);
6726 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6727 usleep_range(1000, 1050);
6728 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006729 return rc;
6730
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006731unenable:
6732 regulator_disable(vreg_bahama);
6733unget:
6734 regulator_put(vreg_bahama);
6735 return rc;
6736};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006737
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006738static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006739{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006740 if (msm_bahama_setup_power_enable) {
6741 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6742 gpio_free(msm_bahama_sys_rst);
6743 regulator_disable(vreg_bahama);
6744 regulator_put(vreg_bahama);
6745 msm_bahama_setup_power_enable = 0;
6746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006747
6748 return 0;
6749};
6750
6751static unsigned int msm_bahama_core_config(int type)
6752{
6753 int rc = 0;
6754
6755 if (type == BAHAMA_ID) {
6756
6757 int i;
6758 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6759
6760 const struct bahama_config_register v20_init[] = {
6761 /* reg, value, mask */
6762 { 0xF4, 0x84, 0xFF }, /* AREG */
6763 { 0xF0, 0x04, 0xFF } /* DREG */
6764 };
6765
6766 if (read_bahama_ver() == VER_2_0) {
6767 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6768 u8 value = v20_init[i].value;
6769 rc = marimba_write_bit_mask(&config,
6770 v20_init[i].reg,
6771 &value,
6772 sizeof(v20_init[i].value),
6773 v20_init[i].mask);
6774 if (rc < 0) {
6775 printk(KERN_ERR
6776 "%s: reg %d write failed: %d\n",
6777 __func__, v20_init[i].reg, rc);
6778 return rc;
6779 }
6780 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6781 " mask 0x%02x\n",
6782 __func__, v20_init[i].reg,
6783 v20_init[i].value, v20_init[i].mask);
6784 }
6785 }
6786 }
6787 printk(KERN_INFO "core type: %d\n", type);
6788
6789 return rc;
6790}
6791
6792static struct regulator *fm_regulator_s3;
6793static struct msm_xo_voter *fm_clock;
6794
6795static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6796{
6797 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306798 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006799 .direction = PM_GPIO_DIR_IN,
6800 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306801 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006802 .function = PM_GPIO_FUNC_NORMAL,
6803 .inv_int_pol = 0,
6804 };
6805
6806 if (!fm_regulator_s3) {
6807 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6808 if (IS_ERR(fm_regulator_s3)) {
6809 rc = PTR_ERR(fm_regulator_s3);
6810 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6811 __func__, rc);
6812 goto out;
6813 }
6814 }
6815
6816
6817 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6818 if (rc < 0) {
6819 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6820 __func__, rc);
6821 goto fm_fail_put;
6822 }
6823
6824 rc = regulator_enable(fm_regulator_s3);
6825 if (rc < 0) {
6826 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6827 __func__, rc);
6828 goto fm_fail_put;
6829 }
6830
6831 /*Vote for XO clock*/
6832 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6833
6834 if (IS_ERR(fm_clock)) {
6835 rc = PTR_ERR(fm_clock);
6836 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6837 __func__, rc);
6838 goto fm_fail_switch;
6839 }
6840
6841 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6842 if (rc < 0) {
6843 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6844 __func__, rc);
6845 goto fm_fail_vote;
6846 }
6847
6848 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306849 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006850 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306851 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006852 __func__, rc);
6853 goto fm_fail_clock;
6854 }
6855 goto out;
6856
6857fm_fail_clock:
6858 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6859fm_fail_vote:
6860 msm_xo_put(fm_clock);
6861fm_fail_switch:
6862 regulator_disable(fm_regulator_s3);
6863fm_fail_put:
6864 regulator_put(fm_regulator_s3);
6865out:
6866 return rc;
6867};
6868
6869static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6870{
6871 int rc = 0;
6872 if (fm_regulator_s3 != NULL) {
6873 rc = regulator_disable(fm_regulator_s3);
6874 if (rc < 0) {
6875 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6876 __func__, rc);
6877 }
6878 regulator_put(fm_regulator_s3);
6879 fm_regulator_s3 = NULL;
6880 }
6881 printk(KERN_ERR "%s: Voting off for XO", __func__);
6882
6883 if (fm_clock != NULL) {
6884 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6885 if (rc < 0) {
6886 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6887 __func__, rc);
6888 }
6889 msm_xo_put(fm_clock);
6890 }
6891 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6892}
6893
6894/* Slave id address for FM/CDC/QMEMBIST
6895 * Values can be programmed using Marimba slave id 0
6896 * should there be a conflict with other I2C devices
6897 * */
6898#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6899#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6900
6901static struct marimba_fm_platform_data marimba_fm_pdata = {
6902 .fm_setup = fm_radio_setup,
6903 .fm_shutdown = fm_radio_shutdown,
6904 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6905 .is_fm_soc_i2s_master = false,
6906 .config_i2s_gpio = NULL,
6907};
6908
6909/*
6910Just initializing the BAHAMA related slave
6911*/
6912static struct marimba_platform_data marimba_pdata = {
6913 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6914 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6915 .bahama_setup = msm_bahama_setup_power,
6916 .bahama_shutdown = msm_bahama_shutdown_power,
6917 .bahama_core_config = msm_bahama_core_config,
6918 .fm = &marimba_fm_pdata,
6919 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6920};
6921
6922
6923static struct i2c_board_info msm_marimba_board_info[] = {
6924 {
6925 I2C_BOARD_INFO("marimba", 0xc),
6926 .platform_data = &marimba_pdata,
6927 }
6928};
6929#endif /* CONFIG_MAIMBA_CORE */
6930
6931#ifdef CONFIG_I2C
6932#define I2C_SURF 1
6933#define I2C_FFA (1 << 1)
6934#define I2C_RUMI (1 << 2)
6935#define I2C_SIM (1 << 3)
6936#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006937#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006938
6939struct i2c_registry {
6940 u8 machs;
6941 int bus;
6942 struct i2c_board_info *info;
6943 int len;
6944};
6945
6946static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006947#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6948 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006949 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006950 MSM_GSBI8_QUP_I2C_BUS_ID,
6951 core_expander_i2c_info,
6952 ARRAY_SIZE(core_expander_i2c_info),
6953 },
6954 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006955 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006956 MSM_GSBI8_QUP_I2C_BUS_ID,
6957 docking_expander_i2c_info,
6958 ARRAY_SIZE(docking_expander_i2c_info),
6959 },
6960 {
6961 I2C_SURF,
6962 MSM_GSBI8_QUP_I2C_BUS_ID,
6963 surf_expanders_i2c_info,
6964 ARRAY_SIZE(surf_expanders_i2c_info),
6965 },
6966 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006967 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006968 MSM_GSBI3_QUP_I2C_BUS_ID,
6969 fha_expanders_i2c_info,
6970 ARRAY_SIZE(fha_expanders_i2c_info),
6971 },
6972 {
6973 I2C_FLUID,
6974 MSM_GSBI3_QUP_I2C_BUS_ID,
6975 fluid_expanders_i2c_info,
6976 ARRAY_SIZE(fluid_expanders_i2c_info),
6977 },
6978 {
6979 I2C_FLUID,
6980 MSM_GSBI8_QUP_I2C_BUS_ID,
6981 fluid_core_expander_i2c_info,
6982 ARRAY_SIZE(fluid_core_expander_i2c_info),
6983 },
6984#endif
6985#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6986 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6987 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006988 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006989 MSM_GSBI3_QUP_I2C_BUS_ID,
6990 msm_i2c_gsbi3_tdisc_info,
6991 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
6992 },
6993#endif
6994 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04006995 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006996 MSM_GSBI3_QUP_I2C_BUS_ID,
6997 cy8ctmg200_board_info,
6998 ARRAY_SIZE(cy8ctmg200_board_info),
6999 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007000 {
7001 I2C_DRAGON,
7002 MSM_GSBI3_QUP_I2C_BUS_ID,
7003 cy8ctma340_dragon_board_info,
7004 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7005 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007006#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7007 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7008 {
7009 I2C_FLUID,
7010 MSM_GSBI3_QUP_I2C_BUS_ID,
7011 cyttsp_fluid_info,
7012 ARRAY_SIZE(cyttsp_fluid_info),
7013 },
7014 {
7015 I2C_FFA | I2C_SURF,
7016 MSM_GSBI3_QUP_I2C_BUS_ID,
7017 cyttsp_ffa_info,
7018 ARRAY_SIZE(cyttsp_ffa_info),
7019 },
7020#endif
7021#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007022 {
7023 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007024 MSM_GSBI4_QUP_I2C_BUS_ID,
7025 msm_camera_boardinfo,
7026 ARRAY_SIZE(msm_camera_boardinfo),
7027 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007028 {
7029 I2C_DRAGON,
7030 MSM_GSBI4_QUP_I2C_BUS_ID,
7031 msm_camera_dragon_boardinfo,
7032 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7033 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007034#endif
7035 {
7036 I2C_SURF | I2C_FFA | I2C_FLUID,
7037 MSM_GSBI7_QUP_I2C_BUS_ID,
7038 msm_i2c_gsbi7_timpani_info,
7039 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7040 },
7041#if defined(CONFIG_MARIMBA_CORE)
7042 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007043 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007044 MSM_GSBI7_QUP_I2C_BUS_ID,
7045 msm_marimba_board_info,
7046 ARRAY_SIZE(msm_marimba_board_info),
7047 },
7048#endif /* CONFIG_MARIMBA_CORE */
7049#ifdef CONFIG_ISL9519_CHARGER
7050 {
7051 I2C_SURF | I2C_FFA,
7052 MSM_GSBI8_QUP_I2C_BUS_ID,
7053 isl_charger_i2c_info,
7054 ARRAY_SIZE(isl_charger_i2c_info),
7055 },
7056#endif
7057#if defined(CONFIG_HAPTIC_ISA1200) || \
7058 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7059 {
7060 I2C_FLUID,
7061 MSM_GSBI8_QUP_I2C_BUS_ID,
7062 msm_isa1200_board_info,
7063 ARRAY_SIZE(msm_isa1200_board_info),
7064 },
7065#endif
7066#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7067 {
7068 I2C_FLUID,
7069 MSM_GSBI8_QUP_I2C_BUS_ID,
7070 smb137b_charger_i2c_info,
7071 ARRAY_SIZE(smb137b_charger_i2c_info),
7072 },
7073#endif
7074#if defined(CONFIG_BATTERY_BQ27520) || \
7075 defined(CONFIG_BATTERY_BQ27520_MODULE)
7076 {
7077 I2C_FLUID,
7078 MSM_GSBI8_QUP_I2C_BUS_ID,
7079 msm_bq27520_board_info,
7080 ARRAY_SIZE(msm_bq27520_board_info),
7081 },
7082#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007083#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7084 {
7085 I2C_DRAGON,
7086 MSM_GSBI8_QUP_I2C_BUS_ID,
7087 wm8903_codec_i2c_info,
7088 ARRAY_SIZE(wm8903_codec_i2c_info),
7089 },
7090#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007091};
7092#endif /* CONFIG_I2C */
7093
7094static void fixup_i2c_configs(void)
7095{
7096#ifdef CONFIG_I2C
7097#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7098 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7099 sx150x_data[SX150X_CORE].irq_summary =
7100 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007101 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7102 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007103 sx150x_data[SX150X_CORE].irq_summary =
7104 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7105 else if (machine_is_msm8x60_fluid())
7106 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7107 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7108#endif
7109 /*
7110 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
7111 * implies that the regulator connected to MPP0 is enabled when
7112 * MPP0 is low.
7113 */
7114 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7115 pm8901_vreg_init_pdata[PM8901_VREG_ID_MPP0].active_high = 0;
7116 else
7117 pm8901_vreg_init_pdata[PM8901_VREG_ID_MPP0].active_high = 1;
7118#endif
7119}
7120
7121static void register_i2c_devices(void)
7122{
7123#ifdef CONFIG_I2C
7124 u8 mach_mask = 0;
7125 int i;
7126
7127 /* Build the matching 'supported_machs' bitmask */
7128 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7129 mach_mask = I2C_SURF;
7130 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7131 mach_mask = I2C_FFA;
7132 else if (machine_is_msm8x60_rumi3())
7133 mach_mask = I2C_RUMI;
7134 else if (machine_is_msm8x60_sim())
7135 mach_mask = I2C_SIM;
7136 else if (machine_is_msm8x60_fluid())
7137 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007138 else if (machine_is_msm8x60_dragon())
7139 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007140 else
7141 pr_err("unmatched machine ID in register_i2c_devices\n");
7142
7143 /* Run the array and install devices as appropriate */
7144 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7145 if (msm8x60_i2c_devices[i].machs & mach_mask)
7146 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7147 msm8x60_i2c_devices[i].info,
7148 msm8x60_i2c_devices[i].len);
7149 }
7150#endif
7151}
7152
7153static void __init msm8x60_init_uart12dm(void)
7154{
7155#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7156 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7157 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7158
7159 if (!fpga_mem)
7160 pr_err("%s(): Error getting memory\n", __func__);
7161
7162 /* Advanced mode */
7163 writew(0xFFFF, fpga_mem + 0x15C);
7164 /* FPGA_UART_SEL */
7165 writew(0, fpga_mem + 0x172);
7166 /* FPGA_GPIO_CONFIG_117 */
7167 writew(1, fpga_mem + 0xEA);
7168 /* FPGA_GPIO_CONFIG_118 */
7169 writew(1, fpga_mem + 0xEC);
7170 mb();
7171 iounmap(fpga_mem);
7172#endif
7173}
7174
7175#define MSM_GSBI9_PHYS 0x19900000
7176#define GSBI_DUAL_MODE_CODE 0x60
7177
7178static void __init msm8x60_init_buses(void)
7179{
7180#ifdef CONFIG_I2C_QUP
7181 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7182 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7183 writel_relaxed(0x6 << 4, gsbi_mem);
7184 /* Ensure protocol code is written before proceeding further */
7185 mb();
7186 iounmap(gsbi_mem);
7187
7188 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7189 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7190 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7191 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7192
7193#ifdef CONFIG_MSM_GSBI9_UART
7194 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7195 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7196 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7197 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7198 iounmap(gsbi_mem);
7199 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7200 }
7201#endif
7202 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7203 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7204#endif
7205#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7206 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7207#endif
7208#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007209 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7210#endif
7211
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307212#ifdef CONFIG_MSM_SSBI
7213 msm_device_ssbi_pmic1.dev.platform_data =
7214 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307215 msm_device_ssbi_pmic2.dev.platform_data =
7216 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307217#endif
7218
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007219 if (machine_is_msm8x60_fluid()) {
7220#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7221 (defined(CONFIG_SMB137B_CHARGER) || \
7222 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7223 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7224#endif
7225#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7226 msm_gsbi10_qup_spi_device.dev.platform_data =
7227 &msm_gsbi10_qup_spi_pdata;
7228#endif
7229 }
7230
7231#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7232 /*
7233 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7234 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7235 * and ID notifications are available only on V2 surf and FFA
7236 * with a hardware workaround.
7237 */
7238 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7239 (machine_is_msm8x60_surf() ||
7240 (machine_is_msm8x60_ffa() &&
7241 pmic_id_notif_supported)))
7242 msm_otg_pdata.phy_can_powercollapse = 1;
7243 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7244#endif
7245
7246#ifdef CONFIG_USB_GADGET_MSM_72K
7247 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7248#endif
7249
7250#ifdef CONFIG_SERIAL_MSM_HS
7251 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7252 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7253#endif
7254#ifdef CONFIG_MSM_GSBI9_UART
7255 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7256 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7257 if (IS_ERR(msm_device_uart_gsbi9))
7258 pr_err("%s(): Failed to create uart gsbi9 device\n",
7259 __func__);
7260 }
7261#endif
7262
7263#ifdef CONFIG_MSM_BUS_SCALING
7264
7265 /* RPM calls are only enabled on V2 */
7266 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7267 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7268 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7269 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7270 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7271 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7272 }
7273
7274 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7275 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7276 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7277 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7278 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7279#endif
7280}
7281
7282static void __init msm8x60_map_io(void)
7283{
7284 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7285 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007286
7287 if (socinfo_init() < 0)
7288 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007289}
7290
7291/*
7292 * Most segments of the EBI2 bus are disabled by default.
7293 */
7294static void __init msm8x60_init_ebi2(void)
7295{
7296 uint32_t ebi2_cfg;
7297 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007298 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7299
7300 if (IS_ERR(mem_clk)) {
7301 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7302 "msm_ebi2", "mem_clk");
7303 return;
7304 }
7305 clk_enable(mem_clk);
7306 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007307
7308 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7309 if (ebi2_cfg_ptr != 0) {
7310 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7311
7312 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007313 machine_is_msm8x60_fluid() ||
7314 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007315 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7316 else if (machine_is_msm8x60_sim())
7317 ebi2_cfg |= (1 << 4); /* CS2 */
7318 else if (machine_is_msm8x60_rumi3())
7319 ebi2_cfg |= (1 << 5); /* CS3 */
7320
7321 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7322 iounmap(ebi2_cfg_ptr);
7323 }
7324
7325 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007326 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007327 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7328 if (ebi2_cfg_ptr != 0) {
7329 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7330 writel_relaxed(0UL, ebi2_cfg_ptr);
7331
7332 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7333 * LAN9221 Ethernet controller reads and writes.
7334 * The lowest 4 bits are the read delay, the next
7335 * 4 are the write delay. */
7336 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7337#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7338 /*
7339 * RECOVERY=5, HOLD_WR=1
7340 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7341 * WAIT_WR=1, WAIT_RD=2
7342 */
7343 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7344 /*
7345 * HOLD_RD=1
7346 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7347 */
7348 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7349#else
7350 /* EBI2 CS3 muxed address/data,
7351 * two cyc addr enable */
7352 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7353
7354#endif
7355 iounmap(ebi2_cfg_ptr);
7356 }
7357 }
7358}
7359
7360static void __init msm8x60_configure_smc91x(void)
7361{
7362 if (machine_is_msm8x60_sim()) {
7363
7364 smc91x_resources[0].start = 0x1b800300;
7365 smc91x_resources[0].end = 0x1b8003ff;
7366
7367 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7368 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7369
7370 } else if (machine_is_msm8x60_rumi3()) {
7371
7372 smc91x_resources[0].start = 0x1d000300;
7373 smc91x_resources[0].end = 0x1d0003ff;
7374
7375 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7376 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7377 }
7378}
7379
7380static void __init msm8x60_init_tlmm(void)
7381{
7382 if (machine_is_msm8x60_rumi3())
7383 msm_gpio_install_direct_irq(0, 0, 1);
7384}
7385
7386#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7387 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7388 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7389 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7390 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7391
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007392/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007393#define MAX_SDCC_CONTROLLER 5
7394
7395struct msm_sdcc_gpio {
7396 /* maximum 10 GPIOs per SDCC controller */
7397 s16 no;
7398 /* name of this GPIO */
7399 const char *name;
7400 bool always_on;
7401 bool is_enabled;
7402};
7403
7404#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7405static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7406 {159, "sdc1_dat_0"},
7407 {160, "sdc1_dat_1"},
7408 {161, "sdc1_dat_2"},
7409 {162, "sdc1_dat_3"},
7410#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7411 {163, "sdc1_dat_4"},
7412 {164, "sdc1_dat_5"},
7413 {165, "sdc1_dat_6"},
7414 {166, "sdc1_dat_7"},
7415#endif
7416 {167, "sdc1_clk"},
7417 {168, "sdc1_cmd"}
7418};
7419#endif
7420
7421#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7422static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7423 {143, "sdc2_dat_0"},
7424 {144, "sdc2_dat_1", 1},
7425 {145, "sdc2_dat_2"},
7426 {146, "sdc2_dat_3"},
7427#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7428 {147, "sdc2_dat_4"},
7429 {148, "sdc2_dat_5"},
7430 {149, "sdc2_dat_6"},
7431 {150, "sdc2_dat_7"},
7432#endif
7433 {151, "sdc2_cmd"},
7434 {152, "sdc2_clk", 1}
7435};
7436#endif
7437
7438#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7439static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7440 {95, "sdc5_cmd"},
7441 {96, "sdc5_dat_3"},
7442 {97, "sdc5_clk", 1},
7443 {98, "sdc5_dat_2"},
7444 {99, "sdc5_dat_1", 1},
7445 {100, "sdc5_dat_0"}
7446};
7447#endif
7448
7449struct msm_sdcc_pad_pull_cfg {
7450 enum msm_tlmm_pull_tgt pull;
7451 u32 pull_val;
7452};
7453
7454struct msm_sdcc_pad_drv_cfg {
7455 enum msm_tlmm_hdrive_tgt drv;
7456 u32 drv_val;
7457};
7458
7459#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7460static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7461 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7462 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7463 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7464};
7465
7466static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7467 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7468 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7469};
7470
7471static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7472 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7473 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7474 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7475};
7476
7477static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7478 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7479 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7480};
7481#endif
7482
7483#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7484static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7485 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7486 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7487 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7488};
7489
7490static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7491 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7492 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7493};
7494
7495static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7496 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7497 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7498 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7499};
7500
7501static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7502 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7503 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7504};
7505#endif
7506
7507struct msm_sdcc_pin_cfg {
7508 /*
7509 * = 1 if controller pins are using gpios
7510 * = 0 if controller has dedicated MSM pins
7511 */
7512 u8 is_gpio;
7513 u8 cfg_sts;
7514 u8 gpio_data_size;
7515 struct msm_sdcc_gpio *gpio_data;
7516 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7517 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7518 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7519 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7520 u8 pad_drv_data_size;
7521 u8 pad_pull_data_size;
7522 u8 sdio_lpm_gpio_cfg;
7523};
7524
7525
7526static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7527#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7528 [0] = {
7529 .is_gpio = 1,
7530 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7531 .gpio_data = sdc1_gpio_cfg
7532 },
7533#endif
7534#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7535 [1] = {
7536 .is_gpio = 1,
7537 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7538 .gpio_data = sdc2_gpio_cfg
7539 },
7540#endif
7541#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7542 [2] = {
7543 .is_gpio = 0,
7544 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7545 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7546 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7547 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7548 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7549 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7550 },
7551#endif
7552#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7553 [3] = {
7554 .is_gpio = 0,
7555 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7556 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7557 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7558 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7559 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7560 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7561 },
7562#endif
7563#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7564 [4] = {
7565 .is_gpio = 1,
7566 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7567 .gpio_data = sdc5_gpio_cfg
7568 }
7569#endif
7570};
7571
7572static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7573{
7574 int rc = 0;
7575 struct msm_sdcc_pin_cfg *curr;
7576 int n;
7577
7578 curr = &sdcc_pin_cfg_data[dev_id - 1];
7579 if (!curr->gpio_data)
7580 goto out;
7581
7582 for (n = 0; n < curr->gpio_data_size; n++) {
7583 if (enable) {
7584
7585 if (curr->gpio_data[n].always_on &&
7586 curr->gpio_data[n].is_enabled)
7587 continue;
7588 pr_debug("%s: enable: %s\n", __func__,
7589 curr->gpio_data[n].name);
7590 rc = gpio_request(curr->gpio_data[n].no,
7591 curr->gpio_data[n].name);
7592 if (rc) {
7593 pr_err("%s: gpio_request(%d, %s)"
7594 "failed", __func__,
7595 curr->gpio_data[n].no,
7596 curr->gpio_data[n].name);
7597 goto free_gpios;
7598 }
7599 /* set direction as output for all GPIOs */
7600 rc = gpio_direction_output(
7601 curr->gpio_data[n].no, 1);
7602 if (rc) {
7603 pr_err("%s: gpio_direction_output"
7604 "(%d, 1) failed\n", __func__,
7605 curr->gpio_data[n].no);
7606 goto free_gpios;
7607 }
7608 curr->gpio_data[n].is_enabled = 1;
7609 } else {
7610 /*
7611 * now free this GPIO which will put GPIO
7612 * in low power mode and will also put GPIO
7613 * in input mode
7614 */
7615 if (curr->gpio_data[n].always_on)
7616 continue;
7617 pr_debug("%s: disable: %s\n", __func__,
7618 curr->gpio_data[n].name);
7619 gpio_free(curr->gpio_data[n].no);
7620 curr->gpio_data[n].is_enabled = 0;
7621 }
7622 }
7623 curr->cfg_sts = enable;
7624 goto out;
7625
7626free_gpios:
7627 for (; n >= 0; n--)
7628 gpio_free(curr->gpio_data[n].no);
7629out:
7630 return rc;
7631}
7632
7633static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7634{
7635 int rc = 0;
7636 struct msm_sdcc_pin_cfg *curr;
7637 int n;
7638
7639 curr = &sdcc_pin_cfg_data[dev_id - 1];
7640 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7641 goto out;
7642
7643 if (enable) {
7644 /*
7645 * set up the normal driver strength and
7646 * pull config for pads
7647 */
7648 for (n = 0; n < curr->pad_drv_data_size; n++) {
7649 if (curr->sdio_lpm_gpio_cfg) {
7650 if (curr->pad_drv_on_data[n].drv ==
7651 TLMM_HDRV_SDC4_DATA)
7652 continue;
7653 }
7654 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7655 curr->pad_drv_on_data[n].drv_val);
7656 }
7657 for (n = 0; n < curr->pad_pull_data_size; n++) {
7658 if (curr->sdio_lpm_gpio_cfg) {
7659 if (curr->pad_pull_on_data[n].pull ==
7660 TLMM_PULL_SDC4_DATA)
7661 continue;
7662 }
7663 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7664 curr->pad_pull_on_data[n].pull_val);
7665 }
7666 } else {
7667 /* set the low power config for pads */
7668 for (n = 0; n < curr->pad_drv_data_size; n++) {
7669 if (curr->sdio_lpm_gpio_cfg) {
7670 if (curr->pad_drv_off_data[n].drv ==
7671 TLMM_HDRV_SDC4_DATA)
7672 continue;
7673 }
7674 msm_tlmm_set_hdrive(
7675 curr->pad_drv_off_data[n].drv,
7676 curr->pad_drv_off_data[n].drv_val);
7677 }
7678 for (n = 0; n < curr->pad_pull_data_size; n++) {
7679 if (curr->sdio_lpm_gpio_cfg) {
7680 if (curr->pad_pull_off_data[n].pull ==
7681 TLMM_PULL_SDC4_DATA)
7682 continue;
7683 }
7684 msm_tlmm_set_pull(
7685 curr->pad_pull_off_data[n].pull,
7686 curr->pad_pull_off_data[n].pull_val);
7687 }
7688 }
7689 curr->cfg_sts = enable;
7690out:
7691 return rc;
7692}
7693
7694struct sdcc_reg {
7695 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7696 const char *reg_name;
7697 /*
7698 * is set voltage supported for this regulator?
7699 * 0 = not supported, 1 = supported
7700 */
7701 unsigned char set_voltage_sup;
7702 /* voltage level to be set */
7703 unsigned int level;
7704 /* VDD/VCC/VCCQ voltage regulator handle */
7705 struct regulator *reg;
7706 /* is this regulator enabled? */
7707 bool enabled;
7708 /* is this regulator needs to be always on? */
7709 bool always_on;
7710 /* is operating power mode setting required for this regulator? */
7711 bool op_pwr_mode_sup;
7712 /* Load values for low power and high power mode */
7713 unsigned int lpm_uA;
7714 unsigned int hpm_uA;
7715};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007716/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007717static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7718/* only SDCC1 requires VCCQ voltage */
7719static struct sdcc_reg sdcc_vccq_reg_data[1];
7720/* all SDCC controllers may require voting for VDD PAD voltage */
7721static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7722
7723struct sdcc_reg_data {
7724 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7725 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7726 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7727 unsigned char sts; /* regulator enable/disable status */
7728};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007729/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007730static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7731
7732static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7733{
7734 int rc = 0;
7735
7736 /* Get the regulator handle */
7737 vreg->reg = regulator_get(NULL, vreg->reg_name);
7738 if (IS_ERR(vreg->reg)) {
7739 rc = PTR_ERR(vreg->reg);
7740 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7741 __func__, vreg->reg_name, rc);
7742 goto out;
7743 }
7744
7745 /* Set the voltage level if required */
7746 if (vreg->set_voltage_sup) {
7747 rc = regulator_set_voltage(vreg->reg, vreg->level,
7748 vreg->level);
7749 if (rc) {
7750 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7751 __func__, vreg->reg_name, rc);
7752 goto vreg_put;
7753 }
7754 }
7755 goto out;
7756
7757vreg_put:
7758 regulator_put(vreg->reg);
7759out:
7760 return rc;
7761}
7762
7763static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7764{
7765 regulator_put(vreg->reg);
7766}
7767
7768/* this init function should be called only once for each SDCC */
7769static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7770{
7771 int rc = 0;
7772 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7773 struct sdcc_reg_data *curr;
7774
7775 curr = &sdcc_vreg_data[dev_id - 1];
7776 curr_vdd_reg = curr->vdd_data;
7777 curr_vccq_reg = curr->vccq_data;
7778 curr_vddp_reg = curr->vddp_data;
7779
7780 if (init) {
7781 /*
7782 * get the regulator handle from voltage regulator framework
7783 * and then try to set the voltage level for the regulator
7784 */
7785 if (curr_vdd_reg) {
7786 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7787 if (rc)
7788 goto out;
7789 }
7790 if (curr_vccq_reg) {
7791 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7792 if (rc)
7793 goto vdd_reg_deinit;
7794 }
7795 if (curr_vddp_reg) {
7796 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7797 if (rc)
7798 goto vccq_reg_deinit;
7799 }
7800 goto out;
7801 } else
7802 /* deregister with all regulators from regulator framework */
7803 goto vddp_reg_deinit;
7804
7805vddp_reg_deinit:
7806 if (curr_vddp_reg)
7807 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7808vccq_reg_deinit:
7809 if (curr_vccq_reg)
7810 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7811vdd_reg_deinit:
7812 if (curr_vdd_reg)
7813 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7814out:
7815 return rc;
7816}
7817
7818static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7819{
7820 int rc;
7821
7822 if (!vreg->enabled) {
7823 rc = regulator_enable(vreg->reg);
7824 if (rc) {
7825 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7826 __func__, vreg->reg_name, rc);
7827 goto out;
7828 }
7829 vreg->enabled = 1;
7830 }
7831
7832 /* Put always_on regulator in HPM (high power mode) */
7833 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7834 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7835 if (rc < 0) {
7836 pr_err("%s: reg=%s: HPM setting failed"
7837 " hpm_uA=%d, rc=%d\n",
7838 __func__, vreg->reg_name,
7839 vreg->hpm_uA, rc);
7840 goto vreg_disable;
7841 }
7842 rc = 0;
7843 }
7844 goto out;
7845
7846vreg_disable:
7847 regulator_disable(vreg->reg);
7848 vreg->enabled = 0;
7849out:
7850 return rc;
7851}
7852
7853static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7854{
7855 int rc;
7856
7857 /* Never disable always_on regulator */
7858 if (!vreg->always_on) {
7859 rc = regulator_disable(vreg->reg);
7860 if (rc) {
7861 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7862 __func__, vreg->reg_name, rc);
7863 goto out;
7864 }
7865 vreg->enabled = 0;
7866 }
7867
7868 /* Put always_on regulator in LPM (low power mode) */
7869 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7870 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7871 if (rc < 0) {
7872 pr_err("%s: reg=%s: LPM setting failed"
7873 " lpm_uA=%d, rc=%d\n",
7874 __func__,
7875 vreg->reg_name,
7876 vreg->lpm_uA, rc);
7877 goto out;
7878 }
7879 rc = 0;
7880 }
7881
7882out:
7883 return rc;
7884}
7885
7886static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7887{
7888 int rc = 0;
7889 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7890 struct sdcc_reg_data *curr;
7891
7892 curr = &sdcc_vreg_data[dev_id - 1];
7893 curr_vdd_reg = curr->vdd_data;
7894 curr_vccq_reg = curr->vccq_data;
7895 curr_vddp_reg = curr->vddp_data;
7896
7897 /* check if regulators are initialized or not? */
7898 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7899 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7900 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7901 /* initialize voltage regulators required for this SDCC */
7902 rc = msm_sdcc_vreg_init(dev_id, 1);
7903 if (rc) {
7904 pr_err("%s: regulator init failed = %d\n",
7905 __func__, rc);
7906 goto out;
7907 }
7908 }
7909
7910 if (curr->sts == enable)
7911 goto out;
7912
7913 if (curr_vdd_reg) {
7914 if (enable)
7915 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7916 else
7917 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7918 if (rc)
7919 goto out;
7920 }
7921
7922 if (curr_vccq_reg) {
7923 if (enable)
7924 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7925 else
7926 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7927 if (rc)
7928 goto out;
7929 }
7930
7931 if (curr_vddp_reg) {
7932 if (enable)
7933 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7934 else
7935 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7936 if (rc)
7937 goto out;
7938 }
7939 curr->sts = enable;
7940
7941out:
7942 return rc;
7943}
7944
7945static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7946{
7947 u32 rc_pin_cfg = 0;
7948 u32 rc_vreg_cfg = 0;
7949 u32 rc = 0;
7950 struct platform_device *pdev;
7951 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7952
7953 pdev = container_of(dv, struct platform_device, dev);
7954
7955 /* setup gpio/pad */
7956 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7957 if (curr_pin_cfg->cfg_sts == !!vdd)
7958 goto setup_vreg;
7959
7960 if (curr_pin_cfg->is_gpio)
7961 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7962 else
7963 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7964
7965setup_vreg:
7966 /* setup voltage regulators */
7967 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
7968
7969 if (rc_pin_cfg || rc_vreg_cfg)
7970 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
7971
7972 return rc;
7973}
7974
7975static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
7976{
7977 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7978 struct platform_device *pdev;
7979
7980 pdev = container_of(dv, struct platform_device, dev);
7981 /* setup gpio/pad */
7982 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7983
7984 if (curr_pin_cfg->cfg_sts == active)
7985 return;
7986
7987 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
7988 if (curr_pin_cfg->is_gpio)
7989 msm_sdcc_setup_gpio(pdev->id, active);
7990 else
7991 msm_sdcc_setup_pad(pdev->id, active);
7992 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
7993}
7994
7995static int msm_sdc3_get_wpswitch(struct device *dev)
7996{
7997 struct platform_device *pdev;
7998 int status;
7999 pdev = container_of(dev, struct platform_device, dev);
8000
8001 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8002 if (status) {
8003 pr_err("%s:Failed to request GPIO %d\n",
8004 __func__, GPIO_SDC_WP);
8005 } else {
8006 status = gpio_direction_input(GPIO_SDC_WP);
8007 if (!status) {
8008 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8009 pr_info("%s: WP Status for Slot %d = %d\n",
8010 __func__, pdev->id, status);
8011 }
8012 gpio_free(GPIO_SDC_WP);
8013 }
8014 return status;
8015}
8016
8017#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8018int sdc5_register_status_notify(void (*callback)(int, void *),
8019 void *dev_id)
8020{
8021 sdc5_status_notify_cb = callback;
8022 sdc5_status_notify_cb_devid = dev_id;
8023 return 0;
8024}
8025#endif
8026
8027#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8028int sdc2_register_status_notify(void (*callback)(int, void *),
8029 void *dev_id)
8030{
8031 sdc2_status_notify_cb = callback;
8032 sdc2_status_notify_cb_devid = dev_id;
8033 return 0;
8034}
8035#endif
8036
8037/* Interrupt handler for SDC2 and SDC5 detection
8038 * This function uses dual-edge interrputs settings in order
8039 * to get SDIO detection when the GPIO is rising and SDIO removal
8040 * when the GPIO is falling */
8041static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8042{
8043 int status;
8044
8045 if (!machine_is_msm8x60_fusion() &&
8046 !machine_is_msm8x60_fusn_ffa())
8047 return IRQ_NONE;
8048
8049 status = gpio_get_value(MDM2AP_SYNC);
8050 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8051 __func__, status);
8052
8053#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8054 if (sdc2_status_notify_cb) {
8055 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8056 sdc2_status_notify_cb(status,
8057 sdc2_status_notify_cb_devid);
8058 }
8059#endif
8060
8061#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8062 if (sdc5_status_notify_cb) {
8063 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8064 sdc5_status_notify_cb(status,
8065 sdc5_status_notify_cb_devid);
8066 }
8067#endif
8068 return IRQ_HANDLED;
8069}
8070
8071static int msm8x60_multi_sdio_init(void)
8072{
8073 int ret, irq_num;
8074
8075 if (!machine_is_msm8x60_fusion() &&
8076 !machine_is_msm8x60_fusn_ffa())
8077 return 0;
8078
8079 ret = msm_gpiomux_get(MDM2AP_SYNC);
8080 if (ret) {
8081 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8082 __func__, MDM2AP_SYNC, ret);
8083 return ret;
8084 }
8085
8086 irq_num = gpio_to_irq(MDM2AP_SYNC);
8087
8088 ret = request_irq(irq_num,
8089 msm8x60_multi_sdio_slot_status_irq,
8090 IRQ_TYPE_EDGE_BOTH,
8091 "sdio_multidetection", NULL);
8092
8093 if (ret) {
8094 pr_err("%s:Failed to request irq, ret=%d\n",
8095 __func__, ret);
8096 return ret;
8097 }
8098
8099 return ret;
8100}
8101
8102#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8103#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8104static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8105{
8106 int status;
8107
8108 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8109 , "SD_HW_Detect");
8110 if (status) {
8111 pr_err("%s:Failed to request GPIO %d\n", __func__,
8112 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8113 } else {
8114 status = gpio_direction_input(
8115 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8116 if (!status)
8117 status = !(gpio_get_value_cansleep(
8118 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8119 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8120 }
8121 return (unsigned int) status;
8122}
8123#endif
8124#endif
8125
8126#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8127static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8128{
8129 struct platform_device *pdev;
8130 enum msm_mpm_pin pin;
8131 int ret = 0;
8132
8133 pdev = container_of(dev, struct platform_device, dev);
8134
8135 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8136 if (pdev->id == 4)
8137 pin = MSM_MPM_PIN_SDC4_DAT1;
8138 else
8139 return -EINVAL;
8140
8141 switch (mode) {
8142 case SDC_DAT1_DISABLE:
8143 ret = msm_mpm_enable_pin(pin, 0);
8144 break;
8145 case SDC_DAT1_ENABLE:
8146 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8147 ret = msm_mpm_enable_pin(pin, 1);
8148 break;
8149 case SDC_DAT1_ENWAKE:
8150 ret = msm_mpm_set_pin_wake(pin, 1);
8151 break;
8152 case SDC_DAT1_DISWAKE:
8153 ret = msm_mpm_set_pin_wake(pin, 0);
8154 break;
8155 default:
8156 ret = -EINVAL;
8157 break;
8158 }
8159 return ret;
8160}
8161#endif
8162#endif
8163
8164#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8165static struct mmc_platform_data msm8x60_sdc1_data = {
8166 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8167 .translate_vdd = msm_sdcc_setup_power,
8168#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8169 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8170#else
8171 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8172#endif
8173 .msmsdcc_fmin = 400000,
8174 .msmsdcc_fmid = 24000000,
8175 .msmsdcc_fmax = 48000000,
8176 .nonremovable = 1,
8177 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008178};
8179#endif
8180
8181#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8182static struct mmc_platform_data msm8x60_sdc2_data = {
8183 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8184 .translate_vdd = msm_sdcc_setup_power,
8185 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8186 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8187 .msmsdcc_fmin = 400000,
8188 .msmsdcc_fmid = 24000000,
8189 .msmsdcc_fmax = 48000000,
8190 .nonremovable = 0,
8191 .pclk_src_dfab = 1,
8192 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008193#ifdef CONFIG_MSM_SDIO_AL
8194 .is_sdio_al_client = 1,
8195#endif
8196};
8197#endif
8198
8199#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8200static struct mmc_platform_data msm8x60_sdc3_data = {
8201 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8202 .translate_vdd = msm_sdcc_setup_power,
8203 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8204 .wpswitch = msm_sdc3_get_wpswitch,
8205#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8206 .status = msm8x60_sdcc_slot_status,
8207 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8208 PMIC_GPIO_SDC3_DET - 1),
8209 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8210#endif
8211 .msmsdcc_fmin = 400000,
8212 .msmsdcc_fmid = 24000000,
8213 .msmsdcc_fmax = 48000000,
8214 .nonremovable = 0,
8215 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008216};
8217#endif
8218
8219#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8220static struct mmc_platform_data msm8x60_sdc4_data = {
8221 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8222 .translate_vdd = msm_sdcc_setup_power,
8223 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8224 .msmsdcc_fmin = 400000,
8225 .msmsdcc_fmid = 24000000,
8226 .msmsdcc_fmax = 48000000,
8227 .nonremovable = 0,
8228 .pclk_src_dfab = 1,
8229 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008230};
8231#endif
8232
8233#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8234static struct mmc_platform_data msm8x60_sdc5_data = {
8235 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8236 .translate_vdd = msm_sdcc_setup_power,
8237 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8238 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8239 .msmsdcc_fmin = 400000,
8240 .msmsdcc_fmid = 24000000,
8241 .msmsdcc_fmax = 48000000,
8242 .nonremovable = 0,
8243 .pclk_src_dfab = 1,
8244 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008245#ifdef CONFIG_MSM_SDIO_AL
8246 .is_sdio_al_client = 1,
8247#endif
8248};
8249#endif
8250
8251static void __init msm8x60_init_mmc(void)
8252{
8253#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8254 /* SDCC1 : eMMC card connected */
8255 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8256 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8257 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8258 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308259 sdcc_vreg_data[0].vdd_data->always_on = 1;
8260 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8261 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8262 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008263
8264 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8265 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8266 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8267 sdcc_vreg_data[0].vccq_data->always_on = 1;
8268
8269 msm_add_sdcc(1, &msm8x60_sdc1_data);
8270#endif
8271#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8272 /*
8273 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8274 * and no card is connected on 8660 SURF/FFA/FLUID.
8275 */
8276 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8277 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8278 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8279 sdcc_vreg_data[1].vdd_data->level = 1800000;
8280
8281 sdcc_vreg_data[1].vccq_data = NULL;
8282
8283 if (machine_is_msm8x60_fusion())
8284 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8285 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8286#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8287 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8288 msm_sdcc_setup_gpio(2, 1);
8289#endif
8290 msm_add_sdcc(2, &msm8x60_sdc2_data);
8291 }
8292#endif
8293#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8294 /* SDCC3 : External card slot connected */
8295 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8296 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8297 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8298 sdcc_vreg_data[2].vdd_data->level = 2850000;
8299 sdcc_vreg_data[2].vdd_data->always_on = 1;
8300 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8301 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8302 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8303
8304 sdcc_vreg_data[2].vccq_data = NULL;
8305
8306 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8307 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8308 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8309 sdcc_vreg_data[2].vddp_data->level = 2850000;
8310 sdcc_vreg_data[2].vddp_data->always_on = 1;
8311 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8312 /* Sleep current required is ~300 uA. But min. RPM
8313 * vote can be in terms of mA (min. 1 mA).
8314 * So let's vote for 2 mA during sleep.
8315 */
8316 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8317 /* Max. Active current required is 16 mA */
8318 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8319
8320 if (machine_is_msm8x60_fluid())
8321 msm8x60_sdc3_data.wpswitch = NULL;
8322 msm_add_sdcc(3, &msm8x60_sdc3_data);
8323#endif
8324#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8325 /* SDCC4 : WLAN WCN1314 chip is connected */
8326 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8327 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8328 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8329 sdcc_vreg_data[3].vdd_data->level = 1800000;
8330
8331 sdcc_vreg_data[3].vccq_data = NULL;
8332
8333 msm_add_sdcc(4, &msm8x60_sdc4_data);
8334#endif
8335#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8336 /*
8337 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8338 * and no card is connected on 8660 SURF/FFA/FLUID.
8339 */
8340 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8341 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8342 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8343 sdcc_vreg_data[4].vdd_data->level = 1800000;
8344
8345 sdcc_vreg_data[4].vccq_data = NULL;
8346
8347 if (machine_is_msm8x60_fusion())
8348 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8349 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8350#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8351 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8352 msm_sdcc_setup_gpio(5, 1);
8353#endif
8354 msm_add_sdcc(5, &msm8x60_sdc5_data);
8355 }
8356#endif
8357}
8358
8359#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8360static inline void display_common_power(int on) {}
8361#else
8362
8363#define _GET_REGULATOR(var, name) do { \
8364 if (var == NULL) { \
8365 var = regulator_get(NULL, name); \
8366 if (IS_ERR(var)) { \
8367 pr_err("'%s' regulator not found, rc=%ld\n", \
8368 name, PTR_ERR(var)); \
8369 var = NULL; \
8370 } \
8371 } \
8372} while (0)
8373
8374static int dsub_regulator(int on)
8375{
8376 static struct regulator *dsub_reg;
8377 static struct regulator *mpp0_reg;
8378 static int dsub_reg_enabled;
8379 int rc = 0;
8380
8381 _GET_REGULATOR(dsub_reg, "8901_l3");
8382 if (IS_ERR(dsub_reg)) {
8383 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8384 __func__, PTR_ERR(dsub_reg));
8385 return PTR_ERR(dsub_reg);
8386 }
8387
8388 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8389 if (IS_ERR(mpp0_reg)) {
8390 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8391 __func__, PTR_ERR(mpp0_reg));
8392 return PTR_ERR(mpp0_reg);
8393 }
8394
8395 if (on && !dsub_reg_enabled) {
8396 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8397 if (rc) {
8398 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8399 " err=%d", __func__, rc);
8400 goto dsub_regulator_err;
8401 }
8402 rc = regulator_enable(dsub_reg);
8403 if (rc) {
8404 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8405 " err=%d", __func__, rc);
8406 goto dsub_regulator_err;
8407 }
8408 rc = regulator_enable(mpp0_reg);
8409 if (rc) {
8410 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8411 " err=%d", __func__, rc);
8412 goto dsub_regulator_err;
8413 }
8414 dsub_reg_enabled = 1;
8415 } else if (!on && dsub_reg_enabled) {
8416 rc = regulator_disable(dsub_reg);
8417 if (rc)
8418 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8419 " err=%d", __func__, rc);
8420 rc = regulator_disable(mpp0_reg);
8421 if (rc)
8422 printk(KERN_WARNING "%s: failed to disable reg "
8423 "8901_mpp0 err=%d", __func__, rc);
8424 dsub_reg_enabled = 0;
8425 }
8426
8427 return rc;
8428
8429dsub_regulator_err:
8430 regulator_put(mpp0_reg);
8431 regulator_put(dsub_reg);
8432 return rc;
8433}
8434
8435static int display_power_on;
8436static void setup_display_power(void)
8437{
8438 if (display_power_on)
8439 if (lcdc_vga_enabled) {
8440 dsub_regulator(1);
8441 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8442 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8443 if (machine_is_msm8x60_ffa() ||
8444 machine_is_msm8x60_fusn_ffa())
8445 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8446 } else {
8447 dsub_regulator(0);
8448 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8449 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8450 if (machine_is_msm8x60_ffa() ||
8451 machine_is_msm8x60_fusn_ffa())
8452 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8453 }
8454 else {
8455 dsub_regulator(0);
8456 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8457 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8458 /* BACKLIGHT */
8459 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8460 /* LVDS */
8461 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8462 }
8463}
8464
8465#define _GET_REGULATOR(var, name) do { \
8466 if (var == NULL) { \
8467 var = regulator_get(NULL, name); \
8468 if (IS_ERR(var)) { \
8469 pr_err("'%s' regulator not found, rc=%ld\n", \
8470 name, PTR_ERR(var)); \
8471 var = NULL; \
8472 } \
8473 } \
8474} while (0)
8475
8476#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8477
8478static void display_common_power(int on)
8479{
8480 int rc;
8481 static struct regulator *display_reg;
8482
8483 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8484 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8485 if (on) {
8486 /* LVDS */
8487 _GET_REGULATOR(display_reg, "8901_l2");
8488 if (!display_reg)
8489 return;
8490 rc = regulator_set_voltage(display_reg,
8491 3300000, 3300000);
8492 if (rc)
8493 goto out;
8494 rc = regulator_enable(display_reg);
8495 if (rc)
8496 goto out;
8497 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8498 "LVDS_STDN_OUT_N");
8499 if (rc) {
8500 printk(KERN_ERR "%s: LVDS gpio %d request"
8501 "failed\n", __func__,
8502 GPIO_LVDS_SHUTDOWN_N);
8503 goto out2;
8504 }
8505
8506 /* BACKLIGHT */
8507 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8508 if (rc) {
8509 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8510 "failed\n", __func__,
8511 GPIO_BACKLIGHT_EN);
8512 goto out3;
8513 }
8514
8515 if (machine_is_msm8x60_ffa() ||
8516 machine_is_msm8x60_fusn_ffa()) {
8517 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8518 "DONGLE_PWR_EN");
8519 if (rc) {
8520 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8521 " %d request failed\n", __func__,
8522 GPIO_DONGLE_PWR_EN);
8523 goto out4;
8524 }
8525 }
8526
8527 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8528 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8529 if (machine_is_msm8x60_ffa() ||
8530 machine_is_msm8x60_fusn_ffa())
8531 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8532 mdelay(20);
8533 display_power_on = 1;
8534 setup_display_power();
8535 } else {
8536 if (display_power_on) {
8537 display_power_on = 0;
8538 setup_display_power();
8539 mdelay(20);
8540 if (machine_is_msm8x60_ffa() ||
8541 machine_is_msm8x60_fusn_ffa())
8542 gpio_free(GPIO_DONGLE_PWR_EN);
8543 goto out4;
8544 }
8545 }
8546 }
8547#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8548 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8549 else if (machine_is_msm8x60_fluid()) {
8550 static struct regulator *fluid_reg;
8551 static struct regulator *fluid_reg2;
8552
8553 if (on) {
8554 _GET_REGULATOR(fluid_reg, "8901_l2");
8555 if (!fluid_reg)
8556 return;
8557 _GET_REGULATOR(fluid_reg2, "8058_s3");
8558 if (!fluid_reg2) {
8559 regulator_put(fluid_reg);
8560 return;
8561 }
8562 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8563 if (rc) {
8564 regulator_put(fluid_reg2);
8565 regulator_put(fluid_reg);
8566 return;
8567 }
8568 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8569 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8570 regulator_enable(fluid_reg);
8571 regulator_enable(fluid_reg2);
8572 msleep(20);
8573 gpio_direction_output(GPIO_RESX_N, 0);
8574 udelay(10);
8575 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8576 display_power_on = 1;
8577 setup_display_power();
8578 } else {
8579 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8580 gpio_free(GPIO_RESX_N);
8581 msleep(20);
8582 regulator_disable(fluid_reg2);
8583 regulator_disable(fluid_reg);
8584 regulator_put(fluid_reg2);
8585 regulator_put(fluid_reg);
8586 display_power_on = 0;
8587 setup_display_power();
8588 fluid_reg = NULL;
8589 fluid_reg2 = NULL;
8590 }
8591 }
8592#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008593#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8594 else if (machine_is_msm8x60_dragon()) {
8595 static struct regulator *dragon_reg;
8596 static struct regulator *dragon_reg2;
8597
8598 if (on) {
8599 _GET_REGULATOR(dragon_reg, "8901_l2");
8600 if (!dragon_reg)
8601 return;
8602 _GET_REGULATOR(dragon_reg2, "8058_l16");
8603 if (!dragon_reg2) {
8604 regulator_put(dragon_reg);
8605 dragon_reg = NULL;
8606 return;
8607 }
8608
8609 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8610 if (rc) {
8611 pr_err("%s: gpio %d request failed with rc=%d\n",
8612 __func__, GPIO_NT35582_BL_EN, rc);
8613 regulator_put(dragon_reg);
8614 regulator_put(dragon_reg2);
8615 dragon_reg = NULL;
8616 dragon_reg2 = NULL;
8617 return;
8618 }
8619
8620 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8621 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8622 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8623 pr_err("%s: config gpio '%d' failed!\n",
8624 __func__, GPIO_NT35582_RESET);
8625 gpio_free(GPIO_NT35582_BL_EN);
8626 regulator_put(dragon_reg);
8627 regulator_put(dragon_reg2);
8628 dragon_reg = NULL;
8629 dragon_reg2 = NULL;
8630 return;
8631 }
8632
8633 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8634 if (rc) {
8635 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8636 __func__, GPIO_NT35582_RESET, rc);
8637 gpio_free(GPIO_NT35582_BL_EN);
8638 regulator_put(dragon_reg);
8639 regulator_put(dragon_reg2);
8640 dragon_reg = NULL;
8641 dragon_reg2 = NULL;
8642 return;
8643 }
8644
8645 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8646 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8647 regulator_enable(dragon_reg);
8648 regulator_enable(dragon_reg2);
8649 msleep(20);
8650
8651 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8652 msleep(20);
8653 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8654 msleep(20);
8655 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8656 msleep(50);
8657
8658 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8659
8660 display_power_on = 1;
8661 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8662 gpio_free(GPIO_NT35582_RESET);
8663 gpio_free(GPIO_NT35582_BL_EN);
8664 regulator_disable(dragon_reg2);
8665 regulator_disable(dragon_reg);
8666 regulator_put(dragon_reg2);
8667 regulator_put(dragon_reg);
8668 display_power_on = 0;
8669 dragon_reg = NULL;
8670 dragon_reg2 = NULL;
8671 }
8672 }
8673#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008674 return;
8675
8676out4:
8677 gpio_free(GPIO_BACKLIGHT_EN);
8678out3:
8679 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8680out2:
8681 regulator_disable(display_reg);
8682out:
8683 regulator_put(display_reg);
8684 display_reg = NULL;
8685}
8686#undef _GET_REGULATOR
8687#endif
8688
8689static int mipi_dsi_panel_power(int on);
8690
8691#define LCDC_NUM_GPIO 28
8692#define LCDC_GPIO_START 0
8693
8694static void lcdc_samsung_panel_power(int on)
8695{
8696 int n, ret = 0;
8697
8698 display_common_power(on);
8699
8700 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8701 if (on) {
8702 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8703 if (unlikely(ret)) {
8704 pr_err("%s not able to get gpio\n", __func__);
8705 break;
8706 }
8707 } else
8708 gpio_free(LCDC_GPIO_START + n);
8709 }
8710
8711 if (ret) {
8712 for (n--; n >= 0; n--)
8713 gpio_free(LCDC_GPIO_START + n);
8714 }
8715
8716 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8717}
8718
8719#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8720#define _GET_REGULATOR(var, name) do { \
8721 var = regulator_get(NULL, name); \
8722 if (IS_ERR(var)) { \
8723 pr_err("'%s' regulator not found, rc=%ld\n", \
8724 name, IS_ERR(var)); \
8725 var = NULL; \
8726 return -ENODEV; \
8727 } \
8728} while (0)
8729
8730static int hdmi_enable_5v(int on)
8731{
8732 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8733 static struct regulator *reg_8901_mpp0; /* External 5V */
8734 static int prev_on;
8735 int rc;
8736
8737 if (on == prev_on)
8738 return 0;
8739
8740 if (!reg_8901_hdmi_mvs)
8741 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8742 if (!reg_8901_mpp0)
8743 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8744
8745 if (on) {
8746 rc = regulator_enable(reg_8901_mpp0);
8747 if (rc) {
8748 pr_err("'%s' regulator enable failed, rc=%d\n",
8749 "reg_8901_mpp0", rc);
8750 return rc;
8751 }
8752 rc = regulator_enable(reg_8901_hdmi_mvs);
8753 if (rc) {
8754 pr_err("'%s' regulator enable failed, rc=%d\n",
8755 "8901_hdmi_mvs", rc);
8756 return rc;
8757 }
8758 pr_info("%s(on): success\n", __func__);
8759 } else {
8760 rc = regulator_disable(reg_8901_hdmi_mvs);
8761 if (rc)
8762 pr_warning("'%s' regulator disable failed, rc=%d\n",
8763 "8901_hdmi_mvs", rc);
8764 rc = regulator_disable(reg_8901_mpp0);
8765 if (rc)
8766 pr_warning("'%s' regulator disable failed, rc=%d\n",
8767 "reg_8901_mpp0", rc);
8768 pr_info("%s(off): success\n", __func__);
8769 }
8770
8771 prev_on = on;
8772
8773 return 0;
8774}
8775
8776static int hdmi_core_power(int on, int show)
8777{
8778 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8779 static int prev_on;
8780 int rc;
8781
8782 if (on == prev_on)
8783 return 0;
8784
8785 if (!reg_8058_l16)
8786 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8787
8788 if (on) {
8789 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8790 if (!rc)
8791 rc = regulator_enable(reg_8058_l16);
8792 if (rc) {
8793 pr_err("'%s' regulator enable failed, rc=%d\n",
8794 "8058_l16", rc);
8795 return rc;
8796 }
8797 rc = gpio_request(170, "HDMI_DDC_CLK");
8798 if (rc) {
8799 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8800 "HDMI_DDC_CLK", 170, rc);
8801 goto error1;
8802 }
8803 rc = gpio_request(171, "HDMI_DDC_DATA");
8804 if (rc) {
8805 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8806 "HDMI_DDC_DATA", 171, rc);
8807 goto error2;
8808 }
8809 rc = gpio_request(172, "HDMI_HPD");
8810 if (rc) {
8811 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8812 "HDMI_HPD", 172, rc);
8813 goto error3;
8814 }
8815 pr_info("%s(on): success\n", __func__);
8816 } else {
8817 gpio_free(170);
8818 gpio_free(171);
8819 gpio_free(172);
8820 rc = regulator_disable(reg_8058_l16);
8821 if (rc)
8822 pr_warning("'%s' regulator disable failed, rc=%d\n",
8823 "8058_l16", rc);
8824 pr_info("%s(off): success\n", __func__);
8825 }
8826
8827 prev_on = on;
8828
8829 return 0;
8830
8831error3:
8832 gpio_free(171);
8833error2:
8834 gpio_free(170);
8835error1:
8836 regulator_disable(reg_8058_l16);
8837 return rc;
8838}
8839
8840static int hdmi_cec_power(int on)
8841{
8842 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8843 static int prev_on;
8844 int rc;
8845
8846 if (on == prev_on)
8847 return 0;
8848
8849 if (!reg_8901_l3)
8850 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8851
8852 if (on) {
8853 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8854 if (!rc)
8855 rc = regulator_enable(reg_8901_l3);
8856 if (rc) {
8857 pr_err("'%s' regulator enable failed, rc=%d\n",
8858 "8901_l3", rc);
8859 return rc;
8860 }
8861 rc = gpio_request(169, "HDMI_CEC_VAR");
8862 if (rc) {
8863 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8864 "HDMI_CEC_VAR", 169, rc);
8865 goto error;
8866 }
8867 pr_info("%s(on): success\n", __func__);
8868 } else {
8869 gpio_free(169);
8870 rc = regulator_disable(reg_8901_l3);
8871 if (rc)
8872 pr_warning("'%s' regulator disable failed, rc=%d\n",
8873 "8901_l3", rc);
8874 pr_info("%s(off): success\n", __func__);
8875 }
8876
8877 prev_on = on;
8878
8879 return 0;
8880error:
8881 regulator_disable(reg_8901_l3);
8882 return rc;
8883}
8884
8885#undef _GET_REGULATOR
8886
8887#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8888
8889static int lcdc_panel_power(int on)
8890{
8891 int flag_on = !!on;
8892 static int lcdc_power_save_on;
8893
8894 if (lcdc_power_save_on == flag_on)
8895 return 0;
8896
8897 lcdc_power_save_on = flag_on;
8898
8899 lcdc_samsung_panel_power(on);
8900
8901 return 0;
8902}
8903
8904#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008905static struct msm_bus_vectors mdp_init_vectors[] = {
8906 /* For now, 0th array entry is reserved.
8907 * Please leave 0 as is and don't use it
8908 */
8909 {
8910 .src = MSM_BUS_MASTER_MDP_PORT0,
8911 .dst = MSM_BUS_SLAVE_SMI,
8912 .ab = 0,
8913 .ib = 0,
8914 },
8915 /* Master and slaves can be from different fabrics */
8916 {
8917 .src = MSM_BUS_MASTER_MDP_PORT0,
8918 .dst = MSM_BUS_SLAVE_EBI_CH0,
8919 .ab = 0,
8920 .ib = 0,
8921 },
8922};
8923
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008924#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8925static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8926 /* If HDMI is used as primary */
8927 {
8928 .src = MSM_BUS_MASTER_MDP_PORT0,
8929 .dst = MSM_BUS_SLAVE_SMI,
8930 .ab = 2000000000,
8931 .ib = 2000000000,
8932 },
8933 /* Master and slaves can be from different fabrics */
8934 {
8935 .src = MSM_BUS_MASTER_MDP_PORT0,
8936 .dst = MSM_BUS_SLAVE_EBI_CH0,
8937 .ab = 2000000000,
8938 .ib = 2000000000,
8939 },
8940};
8941
8942static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8943 {
8944 ARRAY_SIZE(mdp_init_vectors),
8945 mdp_init_vectors,
8946 },
8947 {
8948 ARRAY_SIZE(hdmi_as_primary_vectors),
8949 hdmi_as_primary_vectors,
8950 },
8951 {
8952 ARRAY_SIZE(hdmi_as_primary_vectors),
8953 hdmi_as_primary_vectors,
8954 },
8955 {
8956 ARRAY_SIZE(hdmi_as_primary_vectors),
8957 hdmi_as_primary_vectors,
8958 },
8959 {
8960 ARRAY_SIZE(hdmi_as_primary_vectors),
8961 hdmi_as_primary_vectors,
8962 },
8963 {
8964 ARRAY_SIZE(hdmi_as_primary_vectors),
8965 hdmi_as_primary_vectors,
8966 },
8967};
8968#else
8969#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008970static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
8971 /* Default case static display/UI/2d/3d if FB SMI */
8972 {
8973 .src = MSM_BUS_MASTER_MDP_PORT0,
8974 .dst = MSM_BUS_SLAVE_SMI,
8975 .ab = 388800000,
8976 .ib = 486000000,
8977 },
8978 /* Master and slaves can be from different fabrics */
8979 {
8980 .src = MSM_BUS_MASTER_MDP_PORT0,
8981 .dst = MSM_BUS_SLAVE_EBI_CH0,
8982 .ab = 0,
8983 .ib = 0,
8984 },
8985};
8986
8987static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
8988 /* Default case static display/UI/2d/3d if FB SMI */
8989 {
8990 .src = MSM_BUS_MASTER_MDP_PORT0,
8991 .dst = MSM_BUS_SLAVE_SMI,
8992 .ab = 0,
8993 .ib = 0,
8994 },
8995 /* Master and slaves can be from different fabrics */
8996 {
8997 .src = MSM_BUS_MASTER_MDP_PORT0,
8998 .dst = MSM_BUS_SLAVE_EBI_CH0,
8999 .ab = 388800000,
9000 .ib = 486000000 * 2,
9001 },
9002};
9003static struct msm_bus_vectors mdp_vga_vectors[] = {
9004 /* VGA and less video */
9005 {
9006 .src = MSM_BUS_MASTER_MDP_PORT0,
9007 .dst = MSM_BUS_SLAVE_SMI,
9008 .ab = 458092800,
9009 .ib = 572616000,
9010 },
9011 {
9012 .src = MSM_BUS_MASTER_MDP_PORT0,
9013 .dst = MSM_BUS_SLAVE_EBI_CH0,
9014 .ab = 458092800,
9015 .ib = 572616000 * 2,
9016 },
9017};
9018static struct msm_bus_vectors mdp_720p_vectors[] = {
9019 /* 720p and less video */
9020 {
9021 .src = MSM_BUS_MASTER_MDP_PORT0,
9022 .dst = MSM_BUS_SLAVE_SMI,
9023 .ab = 471744000,
9024 .ib = 589680000,
9025 },
9026 /* Master and slaves can be from different fabrics */
9027 {
9028 .src = MSM_BUS_MASTER_MDP_PORT0,
9029 .dst = MSM_BUS_SLAVE_EBI_CH0,
9030 .ab = 471744000,
9031 .ib = 589680000 * 2,
9032 },
9033};
9034
9035static struct msm_bus_vectors mdp_1080p_vectors[] = {
9036 /* 1080p and less video */
9037 {
9038 .src = MSM_BUS_MASTER_MDP_PORT0,
9039 .dst = MSM_BUS_SLAVE_SMI,
9040 .ab = 575424000,
9041 .ib = 719280000,
9042 },
9043 /* Master and slaves can be from different fabrics */
9044 {
9045 .src = MSM_BUS_MASTER_MDP_PORT0,
9046 .dst = MSM_BUS_SLAVE_EBI_CH0,
9047 .ab = 575424000,
9048 .ib = 719280000 * 2,
9049 },
9050};
9051
9052#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009053static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9054 /* Default case static display/UI/2d/3d if FB SMI */
9055 {
9056 .src = MSM_BUS_MASTER_MDP_PORT0,
9057 .dst = MSM_BUS_SLAVE_SMI,
9058 .ab = 175110000,
9059 .ib = 218887500,
9060 },
9061 /* Master and slaves can be from different fabrics */
9062 {
9063 .src = MSM_BUS_MASTER_MDP_PORT0,
9064 .dst = MSM_BUS_SLAVE_EBI_CH0,
9065 .ab = 0,
9066 .ib = 0,
9067 },
9068};
9069
9070static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9071 /* Default case static display/UI/2d/3d if FB SMI */
9072 {
9073 .src = MSM_BUS_MASTER_MDP_PORT0,
9074 .dst = MSM_BUS_SLAVE_SMI,
9075 .ab = 0,
9076 .ib = 0,
9077 },
9078 /* Master and slaves can be from different fabrics */
9079 {
9080 .src = MSM_BUS_MASTER_MDP_PORT0,
9081 .dst = MSM_BUS_SLAVE_EBI_CH0,
9082 .ab = 216000000,
9083 .ib = 270000000 * 2,
9084 },
9085};
9086static struct msm_bus_vectors mdp_vga_vectors[] = {
9087 /* VGA and less video */
9088 {
9089 .src = MSM_BUS_MASTER_MDP_PORT0,
9090 .dst = MSM_BUS_SLAVE_SMI,
9091 .ab = 216000000,
9092 .ib = 270000000,
9093 },
9094 {
9095 .src = MSM_BUS_MASTER_MDP_PORT0,
9096 .dst = MSM_BUS_SLAVE_EBI_CH0,
9097 .ab = 216000000,
9098 .ib = 270000000 * 2,
9099 },
9100};
9101
9102static struct msm_bus_vectors mdp_720p_vectors[] = {
9103 /* 720p and less video */
9104 {
9105 .src = MSM_BUS_MASTER_MDP_PORT0,
9106 .dst = MSM_BUS_SLAVE_SMI,
9107 .ab = 230400000,
9108 .ib = 288000000,
9109 },
9110 /* Master and slaves can be from different fabrics */
9111 {
9112 .src = MSM_BUS_MASTER_MDP_PORT0,
9113 .dst = MSM_BUS_SLAVE_EBI_CH0,
9114 .ab = 230400000,
9115 .ib = 288000000 * 2,
9116 },
9117};
9118
9119static struct msm_bus_vectors mdp_1080p_vectors[] = {
9120 /* 1080p and less video */
9121 {
9122 .src = MSM_BUS_MASTER_MDP_PORT0,
9123 .dst = MSM_BUS_SLAVE_SMI,
9124 .ab = 334080000,
9125 .ib = 417600000,
9126 },
9127 /* Master and slaves can be from different fabrics */
9128 {
9129 .src = MSM_BUS_MASTER_MDP_PORT0,
9130 .dst = MSM_BUS_SLAVE_EBI_CH0,
9131 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009132 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009133 },
9134};
9135
9136#endif
9137static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9138 {
9139 ARRAY_SIZE(mdp_init_vectors),
9140 mdp_init_vectors,
9141 },
9142 {
9143 ARRAY_SIZE(mdp_sd_smi_vectors),
9144 mdp_sd_smi_vectors,
9145 },
9146 {
9147 ARRAY_SIZE(mdp_sd_ebi_vectors),
9148 mdp_sd_ebi_vectors,
9149 },
9150 {
9151 ARRAY_SIZE(mdp_vga_vectors),
9152 mdp_vga_vectors,
9153 },
9154 {
9155 ARRAY_SIZE(mdp_720p_vectors),
9156 mdp_720p_vectors,
9157 },
9158 {
9159 ARRAY_SIZE(mdp_1080p_vectors),
9160 mdp_1080p_vectors,
9161 },
9162};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009163#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009164static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9165 mdp_bus_scale_usecases,
9166 ARRAY_SIZE(mdp_bus_scale_usecases),
9167 .name = "mdp",
9168};
9169
9170#endif
9171#ifdef CONFIG_MSM_BUS_SCALING
9172static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9173 /* For now, 0th array entry is reserved.
9174 * Please leave 0 as is and don't use it
9175 */
9176 {
9177 .src = MSM_BUS_MASTER_MDP_PORT0,
9178 .dst = MSM_BUS_SLAVE_SMI,
9179 .ab = 0,
9180 .ib = 0,
9181 },
9182 /* Master and slaves can be from different fabrics */
9183 {
9184 .src = MSM_BUS_MASTER_MDP_PORT0,
9185 .dst = MSM_BUS_SLAVE_EBI_CH0,
9186 .ab = 0,
9187 .ib = 0,
9188 },
9189};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009190#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9191static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9192 /* For now, 0th array entry is reserved.
9193 * Please leave 0 as is and don't use it
9194 */
9195 {
9196 .src = MSM_BUS_MASTER_MDP_PORT0,
9197 .dst = MSM_BUS_SLAVE_SMI,
9198 .ab = 2000000000,
9199 .ib = 2000000000,
9200 },
9201 /* Master and slaves can be from different fabrics */
9202 {
9203 .src = MSM_BUS_MASTER_MDP_PORT0,
9204 .dst = MSM_BUS_SLAVE_EBI_CH0,
9205 .ab = 2000000000,
9206 .ib = 2000000000,
9207 },
9208};
9209#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009210static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9211 /* For now, 0th array entry is reserved.
9212 * Please leave 0 as is and don't use it
9213 */
9214 {
9215 .src = MSM_BUS_MASTER_MDP_PORT0,
9216 .dst = MSM_BUS_SLAVE_SMI,
9217 .ab = 566092800,
9218 .ib = 707616000,
9219 },
9220 /* Master and slaves can be from different fabrics */
9221 {
9222 .src = MSM_BUS_MASTER_MDP_PORT0,
9223 .dst = MSM_BUS_SLAVE_EBI_CH0,
9224 .ab = 566092800,
9225 .ib = 707616000,
9226 },
9227};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009228#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009229static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9230 {
9231 ARRAY_SIZE(dtv_bus_init_vectors),
9232 dtv_bus_init_vectors,
9233 },
9234 {
9235 ARRAY_SIZE(dtv_bus_def_vectors),
9236 dtv_bus_def_vectors,
9237 },
9238};
9239static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9240 dtv_bus_scale_usecases,
9241 ARRAY_SIZE(dtv_bus_scale_usecases),
9242 .name = "dtv",
9243};
9244
9245static struct lcdc_platform_data dtv_pdata = {
9246 .bus_scale_table = &dtv_bus_scale_pdata,
9247};
9248#endif
9249
9250
9251static struct lcdc_platform_data lcdc_pdata = {
9252 .lcdc_power_save = lcdc_panel_power,
9253};
9254
9255
9256#define MDP_VSYNC_GPIO 28
9257
9258/*
9259 * MIPI_DSI only use 8058_LDO0 which need always on
9260 * therefore it need to be put at low power mode if
9261 * it was not used instead of turn it off.
9262 */
9263static int mipi_dsi_panel_power(int on)
9264{
9265 int flag_on = !!on;
9266 static int mipi_dsi_power_save_on;
9267 static struct regulator *ldo0;
9268 int rc = 0;
9269
9270 if (mipi_dsi_power_save_on == flag_on)
9271 return 0;
9272
9273 mipi_dsi_power_save_on = flag_on;
9274
9275 if (ldo0 == NULL) { /* init */
9276 ldo0 = regulator_get(NULL, "8058_l0");
9277 if (IS_ERR(ldo0)) {
9278 pr_debug("%s: LDO0 failed\n", __func__);
9279 rc = PTR_ERR(ldo0);
9280 return rc;
9281 }
9282
9283 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9284 if (rc)
9285 goto out;
9286
9287 rc = regulator_enable(ldo0);
9288 if (rc)
9289 goto out;
9290 }
9291
9292 if (on) {
9293 /* set ldo0 to HPM */
9294 rc = regulator_set_optimum_mode(ldo0, 100000);
9295 if (rc < 0)
9296 goto out;
9297 } else {
9298 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309299 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009300 if (rc < 0)
9301 goto out;
9302 }
9303
9304 return 0;
9305out:
9306 regulator_disable(ldo0);
9307 regulator_put(ldo0);
9308 ldo0 = NULL;
9309 return rc;
9310}
9311
9312static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9313 .vsync_gpio = MDP_VSYNC_GPIO,
9314 .dsi_power_save = mipi_dsi_panel_power,
9315};
9316
9317#ifdef CONFIG_FB_MSM_TVOUT
9318static struct regulator *reg_8058_l13;
9319
9320static int atv_dac_power(int on)
9321{
9322 int rc = 0;
9323 #define _GET_REGULATOR(var, name) do { \
9324 var = regulator_get(NULL, name); \
9325 if (IS_ERR(var)) { \
9326 pr_info("'%s' regulator not found, rc=%ld\n", \
9327 name, IS_ERR(var)); \
9328 var = NULL; \
9329 return -ENODEV; \
9330 } \
9331 } while (0)
9332
9333 if (!reg_8058_l13)
9334 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9335 #undef _GET_REGULATOR
9336
9337 if (on) {
9338 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9339 if (rc) {
9340 pr_info("%s: '%s' regulator set voltage failed,\
9341 rc=%d\n", __func__, "8058_l13", rc);
9342 return rc;
9343 }
9344
9345 rc = regulator_enable(reg_8058_l13);
9346 if (rc) {
9347 pr_err("%s: '%s' regulator enable failed,\
9348 rc=%d\n", __func__, "8058_l13", rc);
9349 return rc;
9350 }
9351 } else {
9352 rc = regulator_force_disable(reg_8058_l13);
9353 if (rc)
9354 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9355 __func__, "8058_l13", rc);
9356 }
9357 return rc;
9358
9359}
9360#endif
9361
9362#ifdef CONFIG_FB_MSM_MIPI_DSI
9363int mdp_core_clk_rate_table[] = {
9364 85330000,
9365 85330000,
9366 160000000,
9367 200000000,
9368};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009369#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9370int mdp_core_clk_rate_table[] = {
9371 200000000,
9372 200000000,
9373 200000000,
9374 200000000,
9375};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009376#else
9377int mdp_core_clk_rate_table[] = {
9378 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009379 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009380 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009381 200000000,
9382};
9383#endif
9384
9385static struct msm_panel_common_pdata mdp_pdata = {
9386 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009387#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9388 .mdp_core_clk_rate = 200000000,
9389#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009390 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009391#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009392 .mdp_core_clk_table = mdp_core_clk_rate_table,
9393 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9394#ifdef CONFIG_MSM_BUS_SCALING
9395 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9396#endif
9397 .mdp_rev = MDP_REV_41,
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07009398 .writeback_offset = writeback_offset,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009399};
9400
9401#ifdef CONFIG_FB_MSM_TVOUT
9402
9403#ifdef CONFIG_MSM_BUS_SCALING
9404static struct msm_bus_vectors atv_bus_init_vectors[] = {
9405 /* For now, 0th array entry is reserved.
9406 * Please leave 0 as is and don't use it
9407 */
9408 {
9409 .src = MSM_BUS_MASTER_MDP_PORT0,
9410 .dst = MSM_BUS_SLAVE_SMI,
9411 .ab = 0,
9412 .ib = 0,
9413 },
9414 /* Master and slaves can be from different fabrics */
9415 {
9416 .src = MSM_BUS_MASTER_MDP_PORT0,
9417 .dst = MSM_BUS_SLAVE_EBI_CH0,
9418 .ab = 0,
9419 .ib = 0,
9420 },
9421};
9422static struct msm_bus_vectors atv_bus_def_vectors[] = {
9423 /* For now, 0th array entry is reserved.
9424 * Please leave 0 as is and don't use it
9425 */
9426 {
9427 .src = MSM_BUS_MASTER_MDP_PORT0,
9428 .dst = MSM_BUS_SLAVE_SMI,
9429 .ab = 236390400,
9430 .ib = 265939200,
9431 },
9432 /* Master and slaves can be from different fabrics */
9433 {
9434 .src = MSM_BUS_MASTER_MDP_PORT0,
9435 .dst = MSM_BUS_SLAVE_EBI_CH0,
9436 .ab = 236390400,
9437 .ib = 265939200,
9438 },
9439};
9440static struct msm_bus_paths atv_bus_scale_usecases[] = {
9441 {
9442 ARRAY_SIZE(atv_bus_init_vectors),
9443 atv_bus_init_vectors,
9444 },
9445 {
9446 ARRAY_SIZE(atv_bus_def_vectors),
9447 atv_bus_def_vectors,
9448 },
9449};
9450static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9451 atv_bus_scale_usecases,
9452 ARRAY_SIZE(atv_bus_scale_usecases),
9453 .name = "atv",
9454};
9455#endif
9456
9457static struct tvenc_platform_data atv_pdata = {
9458 .poll = 0,
9459 .pm_vid_en = atv_dac_power,
9460#ifdef CONFIG_MSM_BUS_SCALING
9461 .bus_scale_table = &atv_bus_scale_pdata,
9462#endif
9463};
9464#endif
9465
9466static void __init msm_fb_add_devices(void)
9467{
9468#ifdef CONFIG_FB_MSM_LCDC_DSUB
9469 mdp_pdata.mdp_core_clk_table = NULL;
9470 mdp_pdata.num_mdp_clk = 0;
9471 mdp_pdata.mdp_core_clk_rate = 200000000;
9472#endif
9473 if (machine_is_msm8x60_rumi3())
9474 msm_fb_register_device("mdp", NULL);
9475 else
9476 msm_fb_register_device("mdp", &mdp_pdata);
9477
9478 msm_fb_register_device("lcdc", &lcdc_pdata);
9479 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9480#ifdef CONFIG_MSM_BUS_SCALING
9481 msm_fb_register_device("dtv", &dtv_pdata);
9482#endif
9483#ifdef CONFIG_FB_MSM_TVOUT
9484 msm_fb_register_device("tvenc", &atv_pdata);
9485 msm_fb_register_device("tvout_device", NULL);
9486#endif
9487}
9488
9489#if (defined(CONFIG_MARIMBA_CORE)) && \
9490 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9491
9492static const struct {
9493 char *name;
9494 int vmin;
9495 int vmax;
9496} bt_regs_info[] = {
9497 { "8058_s3", 1800000, 1800000 },
9498 { "8058_s2", 1300000, 1300000 },
9499 { "8058_l8", 2900000, 3050000 },
9500};
9501
9502static struct {
9503 bool enabled;
9504} bt_regs_status[] = {
9505 { false },
9506 { false },
9507 { false },
9508};
9509static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9510
9511static int bahama_bt(int on)
9512{
9513 int rc;
9514 int i;
9515 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9516
9517 struct bahama_variant_register {
9518 const size_t size;
9519 const struct bahama_config_register *set;
9520 };
9521
9522 const struct bahama_config_register *p;
9523
9524 u8 version;
9525
9526 const struct bahama_config_register v10_bt_on[] = {
9527 { 0xE9, 0x00, 0xFF },
9528 { 0xF4, 0x80, 0xFF },
9529 { 0xE4, 0x00, 0xFF },
9530 { 0xE5, 0x00, 0x0F },
9531#ifdef CONFIG_WLAN
9532 { 0xE6, 0x38, 0x7F },
9533 { 0xE7, 0x06, 0xFF },
9534#endif
9535 { 0xE9, 0x21, 0xFF },
9536 { 0x01, 0x0C, 0x1F },
9537 { 0x01, 0x08, 0x1F },
9538 };
9539
9540 const struct bahama_config_register v20_bt_on_fm_off[] = {
9541 { 0x11, 0x0C, 0xFF },
9542 { 0x13, 0x01, 0xFF },
9543 { 0xF4, 0x80, 0xFF },
9544 { 0xF0, 0x00, 0xFF },
9545 { 0xE9, 0x00, 0xFF },
9546#ifdef CONFIG_WLAN
9547 { 0x81, 0x00, 0x7F },
9548 { 0x82, 0x00, 0xFF },
9549 { 0xE6, 0x38, 0x7F },
9550 { 0xE7, 0x06, 0xFF },
9551#endif
9552 { 0xE9, 0x21, 0xFF },
9553 };
9554
9555 const struct bahama_config_register v20_bt_on_fm_on[] = {
9556 { 0x11, 0x0C, 0xFF },
9557 { 0x13, 0x01, 0xFF },
9558 { 0xF4, 0x86, 0xFF },
9559 { 0xF0, 0x06, 0xFF },
9560 { 0xE9, 0x00, 0xFF },
9561#ifdef CONFIG_WLAN
9562 { 0x81, 0x00, 0x7F },
9563 { 0x82, 0x00, 0xFF },
9564 { 0xE6, 0x38, 0x7F },
9565 { 0xE7, 0x06, 0xFF },
9566#endif
9567 { 0xE9, 0x21, 0xFF },
9568 };
9569
9570 const struct bahama_config_register v10_bt_off[] = {
9571 { 0xE9, 0x00, 0xFF },
9572 };
9573
9574 const struct bahama_config_register v20_bt_off_fm_off[] = {
9575 { 0xF4, 0x84, 0xFF },
9576 { 0xF0, 0x04, 0xFF },
9577 { 0xE9, 0x00, 0xFF }
9578 };
9579
9580 const struct bahama_config_register v20_bt_off_fm_on[] = {
9581 { 0xF4, 0x86, 0xFF },
9582 { 0xF0, 0x06, 0xFF },
9583 { 0xE9, 0x00, 0xFF }
9584 };
9585 const struct bahama_variant_register bt_bahama[2][3] = {
9586 {
9587 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9588 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9589 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9590 },
9591 {
9592 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9593 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9594 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9595 }
9596 };
9597
9598 u8 offset = 0; /* index into bahama configs */
9599
9600 on = on ? 1 : 0;
9601 version = read_bahama_ver();
9602
9603 if (version == VER_UNSUPPORTED) {
9604 dev_err(&msm_bt_power_device.dev,
9605 "%s: unsupported version\n",
9606 __func__);
9607 return -EIO;
9608 }
9609
9610 if (version == VER_2_0) {
9611 if (marimba_get_fm_status(&config))
9612 offset = 0x01;
9613 }
9614
9615 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9616 if (on && (version == VER_2_0)) {
9617 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9618 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9619 && (bt_regs_status[i].enabled == true)) {
9620 if (regulator_disable(bt_regs[i])) {
9621 dev_err(&msm_bt_power_device.dev,
9622 "%s: regulator disable failed",
9623 __func__);
9624 }
9625 bt_regs_status[i].enabled = false;
9626 break;
9627 }
9628 }
9629 }
9630
9631 p = bt_bahama[on][version + offset].set;
9632
9633 dev_info(&msm_bt_power_device.dev,
9634 "%s: found version %d\n", __func__, version);
9635
9636 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9637 u8 value = (p+i)->value;
9638 rc = marimba_write_bit_mask(&config,
9639 (p+i)->reg,
9640 &value,
9641 sizeof((p+i)->value),
9642 (p+i)->mask);
9643 if (rc < 0) {
9644 dev_err(&msm_bt_power_device.dev,
9645 "%s: reg %d write failed: %d\n",
9646 __func__, (p+i)->reg, rc);
9647 return rc;
9648 }
9649 dev_dbg(&msm_bt_power_device.dev,
9650 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9651 __func__, (p+i)->reg,
9652 value, (p+i)->mask);
9653 }
9654 /* Update BT Status */
9655 if (on)
9656 marimba_set_bt_status(&config, true);
9657 else
9658 marimba_set_bt_status(&config, false);
9659
9660 return 0;
9661}
9662
9663static int bluetooth_use_regulators(int on)
9664{
9665 int i, recover = -1, rc = 0;
9666
9667 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9668 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9669 bt_regs_info[i].name) :
9670 (regulator_put(bt_regs[i]), NULL);
9671 if (IS_ERR(bt_regs[i])) {
9672 rc = PTR_ERR(bt_regs[i]);
9673 dev_err(&msm_bt_power_device.dev,
9674 "regulator %s get failed (%d)\n",
9675 bt_regs_info[i].name, rc);
9676 recover = i - 1;
9677 bt_regs[i] = NULL;
9678 break;
9679 }
9680
9681 if (!on)
9682 continue;
9683
9684 rc = regulator_set_voltage(bt_regs[i],
9685 bt_regs_info[i].vmin,
9686 bt_regs_info[i].vmax);
9687 if (rc < 0) {
9688 dev_err(&msm_bt_power_device.dev,
9689 "regulator %s voltage set (%d)\n",
9690 bt_regs_info[i].name, rc);
9691 recover = i;
9692 break;
9693 }
9694 }
9695
9696 if (on && (recover > -1))
9697 for (i = recover; i >= 0; i--) {
9698 regulator_put(bt_regs[i]);
9699 bt_regs[i] = NULL;
9700 }
9701
9702 return rc;
9703}
9704
9705static int bluetooth_switch_regulators(int on)
9706{
9707 int i, rc = 0;
9708
9709 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9710 if (on && (bt_regs_status[i].enabled == false)) {
9711 rc = regulator_enable(bt_regs[i]);
9712 if (rc < 0) {
9713 dev_err(&msm_bt_power_device.dev,
9714 "regulator %s %s failed (%d)\n",
9715 bt_regs_info[i].name,
9716 "enable", rc);
9717 if (i > 0) {
9718 while (--i) {
9719 regulator_disable(bt_regs[i]);
9720 bt_regs_status[i].enabled
9721 = false;
9722 }
9723 break;
9724 }
9725 }
9726 bt_regs_status[i].enabled = true;
9727 } else if (!on && (bt_regs_status[i].enabled == true)) {
9728 rc = regulator_disable(bt_regs[i]);
9729 if (rc < 0) {
9730 dev_err(&msm_bt_power_device.dev,
9731 "regulator %s %s failed (%d)\n",
9732 bt_regs_info[i].name,
9733 "disable", rc);
9734 break;
9735 }
9736 bt_regs_status[i].enabled = false;
9737 }
9738 }
9739 return rc;
9740}
9741
9742static struct msm_xo_voter *bt_clock;
9743
9744static int bluetooth_power(int on)
9745{
9746 int rc = 0;
9747 int id;
9748
9749 /* In case probe function fails, cur_connv_type would be -1 */
9750 id = adie_get_detected_connectivity_type();
9751 if (id != BAHAMA_ID) {
9752 pr_err("%s: unexpected adie connectivity type: %d\n",
9753 __func__, id);
9754 return -ENODEV;
9755 }
9756
9757 if (on) {
9758
9759 rc = bluetooth_use_regulators(1);
9760 if (rc < 0)
9761 goto out;
9762
9763 rc = bluetooth_switch_regulators(1);
9764
9765 if (rc < 0)
9766 goto fail_put;
9767
9768 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9769
9770 if (IS_ERR(bt_clock)) {
9771 pr_err("Couldn't get TCXO_D0 voter\n");
9772 goto fail_switch;
9773 }
9774
9775 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9776
9777 if (rc < 0) {
9778 pr_err("Failed to vote for TCXO_DO ON\n");
9779 goto fail_vote;
9780 }
9781
9782 rc = bahama_bt(1);
9783
9784 if (rc < 0)
9785 goto fail_clock;
9786
9787 msleep(10);
9788
9789 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9790
9791 if (rc < 0) {
9792 pr_err("Failed to vote for TCXO_DO pin control\n");
9793 goto fail_vote;
9794 }
9795 } else {
9796 /* check for initial RFKILL block (power off) */
9797 /* some RFKILL versions/configurations rfkill_register */
9798 /* calls here for an initial set_block */
9799 /* avoid calling i2c and regulator before unblock (on) */
9800 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9801 dev_info(&msm_bt_power_device.dev,
9802 "%s: initialized OFF/blocked\n", __func__);
9803 goto out;
9804 }
9805
9806 bahama_bt(0);
9807
9808fail_clock:
9809 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9810fail_vote:
9811 msm_xo_put(bt_clock);
9812fail_switch:
9813 bluetooth_switch_regulators(0);
9814fail_put:
9815 bluetooth_use_regulators(0);
9816 }
9817
9818out:
9819 if (rc < 0)
9820 on = 0;
9821 dev_info(&msm_bt_power_device.dev,
9822 "Bluetooth power switch: state %d result %d\n", on, rc);
9823
9824 return rc;
9825}
9826
9827#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9828
9829static void __init msm8x60_cfg_smsc911x(void)
9830{
9831 smsc911x_resources[1].start =
9832 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9833 smsc911x_resources[1].end =
9834 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9835}
9836
9837#ifdef CONFIG_MSM_RPM
9838static struct msm_rpm_platform_data msm_rpm_data = {
9839 .reg_base_addrs = {
9840 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9841 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9842 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9843 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9844 },
9845
9846 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9847 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9848 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9849 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9850 .msm_apps_ipc_rpm_val = 4,
9851};
9852#endif
9853
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009854void msm_fusion_setup_pinctrl(void)
9855{
9856 struct msm_xo_voter *a1;
9857
9858 if (socinfo_get_platform_subtype() == 0x3) {
9859 /*
9860 * Vote for the A1 clock to be in pin control mode before
9861 * the external images are loaded.
9862 */
9863 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9864 BUG_ON(!a1);
9865 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9866 }
9867}
9868
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009869struct msm_board_data {
9870 struct msm_gpiomux_configs *gpiomux_cfgs;
9871};
9872
9873static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9874 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9875};
9876
9877static struct msm_board_data msm8x60_sim_board_data __initdata = {
9878 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9879};
9880
9881static struct msm_board_data msm8x60_surf_board_data __initdata = {
9882 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9883};
9884
9885static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9886 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9887};
9888
9889static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9890 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9891};
9892
9893static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9894 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9895};
9896
9897static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9898 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9899};
9900
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009901static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9902 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9903};
9904
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009905static void __init msm8x60_init(struct msm_board_data *board_data)
9906{
9907 uint32_t soc_platform_version;
9908
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309909 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009910
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009911 /*
9912 * Initialize RPM first as other drivers and devices may need
9913 * it for their initialization.
9914 */
9915#ifdef CONFIG_MSM_RPM
9916 BUG_ON(msm_rpm_init(&msm_rpm_data));
9917#endif
9918 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9919 ARRAY_SIZE(msm_rpmrs_levels)));
9920 if (msm_xo_init())
9921 pr_err("Failed to initialize XO votes\n");
9922
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009923 msm8x60_check_2d_hardware();
9924
9925 /* Change SPM handling of core 1 if PMM 8160 is present. */
9926 soc_platform_version = socinfo_get_platform_version();
9927 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9928 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9929 struct msm_spm_platform_data *spm_data;
9930
9931 spm_data = &msm_spm_data_v1[1];
9932 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9933 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9934
9935 spm_data = &msm_spm_data[1];
9936 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9937 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9938 }
9939
9940 /*
9941 * Initialize SPM before acpuclock as the latter calls into SPM
9942 * driver to set ACPU voltages.
9943 */
9944 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9945 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9946 else
9947 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
9948
9949 /*
9950 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
9951 * devices so that the RPM doesn't drop into a low power mode that an
9952 * un-reworked SURF cannot resume from.
9953 */
9954 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -07009955 int i;
9956
9957 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
9958 if (rpm_regulator_init_data[i].id
9959 == RPM_VREG_ID_PM8901_L4
9960 || rpm_regulator_init_data[i].id
9961 == RPM_VREG_ID_PM8901_L6)
9962 rpm_regulator_init_data[i]
9963 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009964 }
9965
9966 /*
9967 * Disable regulator info printing so that regulator registration
9968 * messages do not enter the kmsg log.
9969 */
9970 regulator_suppress_info_printing();
9971
9972 /* Initialize regulators needed for clock_init. */
9973 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
9974
Stephen Boydbb600ae2011-08-02 20:11:40 -07009975 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009976
9977 /* Buses need to be initialized before early-device registration
9978 * to get the platform data for fabrics.
9979 */
9980 msm8x60_init_buses();
9981 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
9982 /* CPU frequency control is not supported on simulated targets. */
9983 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -07009984 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009985
Terence Hampsonb36a38c2011-09-19 19:10:40 -04009986 /*
9987 * Enable EBI2 only for boards which make use of it. Leave
9988 * it disabled for all others for additional power savings.
9989 */
9990 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
9991 machine_is_msm8x60_rumi3() ||
9992 machine_is_msm8x60_sim() ||
9993 machine_is_msm8x60_fluid() ||
9994 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009995 msm8x60_init_ebi2();
9996 msm8x60_init_tlmm();
9997 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
9998 msm8x60_init_uart12dm();
9999 msm8x60_init_mmc();
10000
10001#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10002 msm8x60_init_pm8058_othc();
10003#endif
10004
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010005 if (machine_is_msm8x60_fluid())
10006 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10007 else if (machine_is_msm8x60_dragon())
10008 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10009 else
10010 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010011
Jilai Wang53d27a82011-07-13 14:32:58 -040010012 /* Specify reset pin for OV9726 */
10013 if (machine_is_msm8x60_dragon()) {
10014 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10015 ov9726_sensor_8660_info.mount_angle = 270;
10016 }
10017
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010018#ifdef CONFIG_BATTERY_MSM8X60
10019 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10020 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10021 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10022 platform_device_register(&msm_charger_device);
10023#endif
10024
10025 if (machine_is_msm8x60_dragon())
10026 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10027 if (!machine_is_msm8x60_fluid())
10028 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10029
10030 /* configure pmic leds */
10031 if (machine_is_msm8x60_fluid())
10032 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10033 else if (machine_is_msm8x60_dragon())
10034 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10035 else
10036 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10037
10038 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10039 machine_is_msm8x60_dragon()) {
10040 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10041 }
10042
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010043 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10044 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010045 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010046 msm8x60_cfg_smsc911x();
10047 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10048 platform_add_devices(msm_footswitch_devices,
10049 msm_num_footswitch_devices);
10050 platform_add_devices(surf_devices,
10051 ARRAY_SIZE(surf_devices));
10052
10053#ifdef CONFIG_MSM_DSPS
10054 if (machine_is_msm8x60_fluid()) {
10055 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10056 msm8x60_init_dsps();
10057 }
10058#endif
10059
10060#ifdef CONFIG_USB_EHCI_MSM_72K
10061 /*
10062 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10063 * fluid
10064 */
10065 if (machine_is_msm8x60_fluid()) {
10066 pm8901_mpp_config_digital_out(1,
10067 PM8901_MPP_DIG_LEVEL_L5, 1);
10068 }
10069 msm_add_host(0, &msm_usb_host_pdata);
10070#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010071
10072#ifdef CONFIG_SND_SOC_MSM8660_APQ
10073 if (machine_is_msm8x60_dragon())
10074 platform_add_devices(dragon_alsa_devices,
10075 ARRAY_SIZE(dragon_alsa_devices));
10076 else
10077#endif
10078 platform_add_devices(asoc_devices,
10079 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010080 } else {
10081 msm8x60_configure_smc91x();
10082 platform_add_devices(rumi_sim_devices,
10083 ARRAY_SIZE(rumi_sim_devices));
10084 }
10085#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010086 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10087 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010088 msm8x60_cfg_isp1763();
10089#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010090
10091 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10092 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10093
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010094
10095#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10096 if (machine_is_msm8x60_fluid())
10097 platform_device_register(&msm_gsbi10_qup_spi_device);
10098 else
10099 platform_device_register(&msm_gsbi1_qup_spi_device);
10100#endif
10101
10102#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10103 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10104 if (machine_is_msm8x60_fluid())
10105 cyttsp_set_params();
10106#endif
10107 if (!machine_is_msm8x60_sim())
10108 msm_fb_add_devices();
10109 fixup_i2c_configs();
10110 register_i2c_devices();
10111
Terence Hampson1c73fef2011-07-19 17:10:49 -040010112 if (machine_is_msm8x60_dragon())
10113 smsc911x_config.reset_gpio
10114 = GPIO_ETHERNET_RESET_N_DRAGON;
10115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010116 platform_device_register(&smsc911x_device);
10117
10118#if (defined(CONFIG_SPI_QUP)) && \
10119 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010120 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10121 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010122
10123 if (machine_is_msm8x60_fluid()) {
10124#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10125 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10126 spi_register_board_info(lcdc_samsung_spi_board_info,
10127 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10128 } else
10129#endif
10130 {
10131#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10132 spi_register_board_info(lcdc_auo_spi_board_info,
10133 ARRAY_SIZE(lcdc_auo_spi_board_info));
10134#endif
10135 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010136#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10137 } else if (machine_is_msm8x60_dragon()) {
10138 spi_register_board_info(lcdc_nt35582_spi_board_info,
10139 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10140#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010141 }
10142#endif
10143
10144 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10145 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10146 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10147 msm_pm_data);
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -060010148 BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010149
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010150 pm8058_gpios_init();
10151
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010152#ifdef CONFIG_SENSORS_MSM_ADC
10153 if (machine_is_msm8x60_fluid()) {
10154 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10155 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10156 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10157 msm_adc_pdata.gpio_config = APROC_CONFIG;
10158 else
10159 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10160 }
10161 msm_adc_pdata.target_hw = MSM_8x60;
10162#endif
10163#ifdef CONFIG_MSM8X60_AUDIO
10164 msm_snddev_init();
10165#endif
10166#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10167 if (machine_is_msm8x60_fluid())
10168 platform_device_register(&fluid_leds_gpio);
10169 else
10170 platform_device_register(&gpio_leds);
10171#endif
10172
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010173 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010174
10175 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10176 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010177}
10178
10179static void __init msm8x60_rumi3_init(void)
10180{
10181 msm8x60_init(&msm8x60_rumi3_board_data);
10182}
10183
10184static void __init msm8x60_sim_init(void)
10185{
10186 msm8x60_init(&msm8x60_sim_board_data);
10187}
10188
10189static void __init msm8x60_surf_init(void)
10190{
10191 msm8x60_init(&msm8x60_surf_board_data);
10192}
10193
10194static void __init msm8x60_ffa_init(void)
10195{
10196 msm8x60_init(&msm8x60_ffa_board_data);
10197}
10198
10199static void __init msm8x60_fluid_init(void)
10200{
10201 msm8x60_init(&msm8x60_fluid_board_data);
10202}
10203
10204static void __init msm8x60_charm_surf_init(void)
10205{
10206 msm8x60_init(&msm8x60_charm_surf_board_data);
10207}
10208
10209static void __init msm8x60_charm_ffa_init(void)
10210{
10211 msm8x60_init(&msm8x60_charm_ffa_board_data);
10212}
10213
10214static void __init msm8x60_charm_init_early(void)
10215{
10216 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010217}
10218
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010219static void __init msm8x60_dragon_init(void)
10220{
10221 msm8x60_init(&msm8x60_dragon_board_data);
10222}
10223
Steve Mucklea55df6e2010-01-07 12:43:24 -080010224MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10225 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010226 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010227 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010228 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010229 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010230 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010231MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010232
10233MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10234 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010235 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010236 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010237 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010238 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010239 .init_early = msm8x60_charm_init_early,
10240MACHINE_END
10241
10242MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10243 .map_io = msm8x60_map_io,
10244 .reserve = msm8x60_reserve,
10245 .init_irq = msm8x60_init_irq,
10246 .init_machine = msm8x60_surf_init,
10247 .timer = &msm_timer,
10248 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010249MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010250
10251MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10252 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010253 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010254 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010255 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010256 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010257 .init_early = msm8x60_charm_init_early,
10258MACHINE_END
10259
10260MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10261 .map_io = msm8x60_map_io,
10262 .reserve = msm8x60_reserve,
10263 .init_irq = msm8x60_init_irq,
10264 .init_machine = msm8x60_fluid_init,
10265 .timer = &msm_timer,
10266 .init_early = msm8x60_charm_init_early,
10267MACHINE_END
10268
10269MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10270 .map_io = msm8x60_map_io,
10271 .reserve = msm8x60_reserve,
10272 .init_irq = msm8x60_init_irq,
10273 .init_machine = msm8x60_charm_surf_init,
10274 .timer = &msm_timer,
10275 .init_early = msm8x60_charm_init_early,
10276MACHINE_END
10277
10278MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10279 .map_io = msm8x60_map_io,
10280 .reserve = msm8x60_reserve,
10281 .init_irq = msm8x60_init_irq,
10282 .init_machine = msm8x60_charm_ffa_init,
10283 .timer = &msm_timer,
10284 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010285MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010286
10287MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10288 .map_io = msm8x60_map_io,
10289 .reserve = msm8x60_reserve,
10290 .init_irq = msm8x60_init_irq,
10291 .init_machine = msm8x60_dragon_init,
10292 .timer = &msm_timer,
10293 .init_early = msm8x60_charm_init_early,
10294MACHINE_END