Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #include "dex/compiler_ir.h" |
Vladimir Marko | 5c96e6b | 2013-11-14 15:34:17 +0000 | [diff] [blame] | 18 | #include "dex/frontend.h" |
| 19 | #include "dex/quick/dex_file_method_inliner.h" |
| 20 | #include "dex/quick/dex_file_to_method_inliner_map.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 21 | #include "dex_file-inl.h" |
Ian Rogers | 166db04 | 2013-07-26 12:05:57 -0700 | [diff] [blame] | 22 | #include "entrypoints/quick/quick_entrypoints.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 23 | #include "invoke_type.h" |
| 24 | #include "mirror/array.h" |
| 25 | #include "mirror/string.h" |
| 26 | #include "mir_to_lir-inl.h" |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 27 | #include "x86/codegen_x86.h" |
| 28 | |
| 29 | namespace art { |
| 30 | |
| 31 | /* |
| 32 | * This source files contains "gen" codegen routines that should |
| 33 | * be applicable to most targets. Only mid-level support utilities |
| 34 | * and "op" calls may be used here. |
| 35 | */ |
| 36 | |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 37 | void Mir2Lir::AddIntrinsicLaunchpad(CallInfo* info, LIR* branch, LIR* resume) { |
| 38 | class IntrinsicLaunchpadPath : public Mir2Lir::LIRSlowPath { |
| 39 | public: |
| 40 | IntrinsicLaunchpadPath(Mir2Lir* m2l, CallInfo* info, LIR* branch, LIR* resume = nullptr) |
| 41 | : LIRSlowPath(m2l, info->offset, branch, resume), info_(info) { |
| 42 | } |
| 43 | |
| 44 | void Compile() { |
| 45 | m2l_->ResetRegPool(); |
| 46 | m2l_->ResetDefTracking(); |
| 47 | LIR* label = GenerateTargetLabel(); |
| 48 | label->opcode = kPseudoIntrinsicRetry; |
| 49 | // NOTE: GenInvokeNoInline() handles MarkSafepointPC. |
| 50 | m2l_->GenInvokeNoInline(info_); |
| 51 | if (cont_ != nullptr) { |
| 52 | m2l_->OpUnconditionalBranch(cont_); |
| 53 | } |
| 54 | } |
| 55 | |
| 56 | private: |
| 57 | CallInfo* const info_; |
| 58 | }; |
| 59 | |
| 60 | AddSlowPath(new (arena_) IntrinsicLaunchpadPath(this, info, branch, resume)); |
| 61 | } |
| 62 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 63 | /* |
| 64 | * To save scheduling time, helper calls are broken into two parts: generation of |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 65 | * the helper target address, and the actual call to the helper. Because x86 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 66 | * has a memory call operation, part 1 is a NOP for x86. For other targets, |
| 67 | * load arguments between the two parts. |
| 68 | */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 69 | RegStorage Mir2Lir::CallHelperSetup(ThreadOffset helper_offset) { |
| 70 | return (cu_->instruction_set == kX86) ? RegStorage::InvalidReg() : LoadHelper(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | /* NOTE: if r_tgt is a temp, it will be freed following use */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 74 | LIR* Mir2Lir::CallHelper(RegStorage r_tgt, ThreadOffset helper_offset, bool safepoint_pc, |
| 75 | bool use_link) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 76 | LIR* call_inst; |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 77 | OpKind op = use_link ? kOpBlx : kOpBx; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 78 | if (cu_->instruction_set == kX86) { |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 79 | call_inst = OpThreadMem(op, helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 80 | } else { |
Brian Carlstrom | 60d7a65 | 2014-03-13 18:10:08 -0700 | [diff] [blame] | 81 | call_inst = OpReg(op, r_tgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 82 | FreeTemp(r_tgt); |
| 83 | } |
| 84 | if (safepoint_pc) { |
| 85 | MarkSafepointPC(call_inst); |
| 86 | } |
| 87 | return call_inst; |
| 88 | } |
| 89 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 90 | void Mir2Lir::CallRuntimeHelperImm(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 91 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 92 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 93 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 94 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 95 | } |
| 96 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 97 | void Mir2Lir::CallRuntimeHelperReg(ThreadOffset helper_offset, RegStorage arg0, bool safepoint_pc) { |
| 98 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 99 | OpRegCopy(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 100 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 101 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 102 | } |
| 103 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 104 | void Mir2Lir::CallRuntimeHelperRegLocation(ThreadOffset helper_offset, RegLocation arg0, |
| 105 | bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 106 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
| 107 | if (arg0.wide == 0) { |
| 108 | LoadValueDirectFixed(arg0, TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 109 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 110 | RegStorage r_tmp = RegStorage::MakeRegPair(TargetReg(kArg0), TargetReg(kArg1)); |
| 111 | LoadValueDirectWideFixed(arg0, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 112 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 113 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 114 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 115 | } |
| 116 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 117 | void Mir2Lir::CallRuntimeHelperImmImm(ThreadOffset helper_offset, int arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 118 | bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 119 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 120 | LoadConstant(TargetReg(kArg0), arg0); |
| 121 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 122 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 123 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 124 | } |
| 125 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 126 | void Mir2Lir::CallRuntimeHelperImmRegLocation(ThreadOffset helper_offset, int arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 127 | RegLocation arg1, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 128 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 129 | if (arg1.wide == 0) { |
| 130 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 131 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 132 | RegStorage r_tmp = RegStorage::MakeRegPair(TargetReg(kArg1), TargetReg(kArg2)); |
| 133 | LoadValueDirectWideFixed(arg1, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 134 | } |
| 135 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 136 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 137 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 138 | } |
| 139 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 140 | void Mir2Lir::CallRuntimeHelperRegLocationImm(ThreadOffset helper_offset, RegLocation arg0, int arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 141 | bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 142 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 143 | LoadValueDirectFixed(arg0, TargetReg(kArg0)); |
| 144 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 145 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 146 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 147 | } |
| 148 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 149 | void Mir2Lir::CallRuntimeHelperImmReg(ThreadOffset helper_offset, int arg0, RegStorage arg1, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 150 | bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 151 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 152 | OpRegCopy(TargetReg(kArg1), arg1); |
| 153 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 154 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 155 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 156 | } |
| 157 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 158 | void Mir2Lir::CallRuntimeHelperRegImm(ThreadOffset helper_offset, RegStorage arg0, int arg1, |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 159 | bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 160 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 161 | OpRegCopy(TargetReg(kArg0), arg0); |
| 162 | LoadConstant(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 163 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 164 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 165 | } |
| 166 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 167 | void Mir2Lir::CallRuntimeHelperImmMethod(ThreadOffset helper_offset, int arg0, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 168 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 169 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 170 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 171 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 172 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 173 | } |
| 174 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 175 | void Mir2Lir::CallRuntimeHelperRegMethod(ThreadOffset helper_offset, RegStorage arg0, |
| 176 | bool safepoint_pc) { |
| 177 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
| 178 | DCHECK_NE(TargetReg(kArg1).GetReg(), arg0.GetReg()); |
Hiroshi Yamauchi | be1ca55 | 2014-01-15 11:46:48 -0800 | [diff] [blame] | 179 | if (TargetReg(kArg0) != arg0) { |
| 180 | OpRegCopy(TargetReg(kArg0), arg0); |
| 181 | } |
| 182 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 183 | ClobberCallerSave(); |
| 184 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 185 | } |
| 186 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 187 | void Mir2Lir::CallRuntimeHelperRegMethodRegLocation(ThreadOffset helper_offset, RegStorage arg0, |
Hiroshi Yamauchi | bb8f0ab | 2014-01-27 16:50:29 -0800 | [diff] [blame] | 188 | RegLocation arg2, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 189 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
| 190 | DCHECK_NE(TargetReg(kArg1).GetReg(), arg0.GetReg()); |
Hiroshi Yamauchi | bb8f0ab | 2014-01-27 16:50:29 -0800 | [diff] [blame] | 191 | if (TargetReg(kArg0) != arg0) { |
| 192 | OpRegCopy(TargetReg(kArg0), arg0); |
| 193 | } |
| 194 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 195 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 196 | ClobberCallerSave(); |
| 197 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 198 | } |
| 199 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 200 | void Mir2Lir::CallRuntimeHelperRegLocationRegLocation(ThreadOffset helper_offset, RegLocation arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 201 | RegLocation arg1, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 202 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 203 | if (arg0.wide == 0) { |
| 204 | LoadValueDirectFixed(arg0, arg0.fp ? TargetReg(kFArg0) : TargetReg(kArg0)); |
| 205 | if (arg1.wide == 0) { |
| 206 | if (cu_->instruction_set == kMips) { |
| 207 | LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg1)); |
| 208 | } else { |
| 209 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 210 | } |
| 211 | } else { |
| 212 | if (cu_->instruction_set == kMips) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 213 | RegStorage r_tmp; |
| 214 | if (arg1.fp) { |
| 215 | r_tmp = RegStorage::MakeRegPair(TargetReg(kFArg2), TargetReg(kFArg3)); |
| 216 | } else { |
| 217 | r_tmp = RegStorage::MakeRegPair(TargetReg(kArg1), TargetReg(kArg2)); |
| 218 | } |
| 219 | LoadValueDirectWideFixed(arg1, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 220 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 221 | RegStorage r_tmp = RegStorage::MakeRegPair(TargetReg(kArg1), TargetReg(kArg2)); |
| 222 | LoadValueDirectWideFixed(arg1, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 223 | } |
| 224 | } |
| 225 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 226 | RegStorage r_tmp; |
| 227 | if (arg0.fp) { |
| 228 | r_tmp = RegStorage::MakeRegPair(TargetReg(kFArg0), TargetReg(kFArg1)); |
| 229 | } else { |
| 230 | r_tmp = RegStorage::MakeRegPair(TargetReg(kArg0), TargetReg(kArg1)); |
| 231 | } |
| 232 | LoadValueDirectWideFixed(arg0, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 233 | if (arg1.wide == 0) { |
| 234 | LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg2)); |
| 235 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 236 | RegStorage r_tmp; |
| 237 | if (arg1.fp) { |
| 238 | r_tmp = RegStorage::MakeRegPair(TargetReg(kFArg2), TargetReg(kFArg3)); |
| 239 | } else { |
| 240 | r_tmp = RegStorage::MakeRegPair(TargetReg(kArg2), TargetReg(kArg3)); |
| 241 | } |
| 242 | LoadValueDirectWideFixed(arg1, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 243 | } |
| 244 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 245 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 246 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 247 | } |
| 248 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 249 | void Mir2Lir::CallRuntimeHelperRegReg(ThreadOffset helper_offset, RegStorage arg0, |
| 250 | RegStorage arg1, bool safepoint_pc) { |
| 251 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
| 252 | DCHECK_NE(TargetReg(kArg0).GetReg(), arg1.GetReg()); // check copy into arg0 won't clobber arg1 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 253 | OpRegCopy(TargetReg(kArg0), arg0); |
| 254 | OpRegCopy(TargetReg(kArg1), arg1); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 255 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 256 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 257 | } |
| 258 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 259 | void Mir2Lir::CallRuntimeHelperRegRegImm(ThreadOffset helper_offset, RegStorage arg0, |
| 260 | RegStorage arg1, int arg2, bool safepoint_pc) { |
| 261 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
| 262 | DCHECK_NE(TargetReg(kArg0).GetReg(), arg1.GetReg()); // check copy into arg0 won't clobber arg1 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 263 | OpRegCopy(TargetReg(kArg0), arg0); |
| 264 | OpRegCopy(TargetReg(kArg1), arg1); |
| 265 | LoadConstant(TargetReg(kArg2), arg2); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 266 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 267 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 268 | } |
| 269 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 270 | void Mir2Lir::CallRuntimeHelperImmMethodRegLocation(ThreadOffset helper_offset, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 271 | int arg0, RegLocation arg2, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 272 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 273 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 274 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 275 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 276 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 277 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 278 | } |
| 279 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 280 | void Mir2Lir::CallRuntimeHelperImmMethodImm(ThreadOffset helper_offset, int arg0, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 281 | int arg2, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 282 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 283 | LoadCurrMethodDirect(TargetReg(kArg1)); |
| 284 | LoadConstant(TargetReg(kArg2), arg2); |
| 285 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 286 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 287 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 288 | } |
| 289 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 290 | void Mir2Lir::CallRuntimeHelperImmRegLocationRegLocation(ThreadOffset helper_offset, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 291 | int arg0, RegLocation arg1, |
| 292 | RegLocation arg2, bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 293 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 294 | DCHECK_EQ(arg1.wide, 0U); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 295 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 296 | if (arg2.wide == 0) { |
| 297 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
| 298 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 299 | RegStorage r_tmp = RegStorage::MakeRegPair(TargetReg(kArg2), TargetReg(kArg3)); |
| 300 | LoadValueDirectWideFixed(arg2, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 301 | } |
| 302 | LoadConstant(TargetReg(kArg0), arg0); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 303 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 304 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 305 | } |
| 306 | |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 307 | void Mir2Lir::CallRuntimeHelperRegLocationRegLocationRegLocation(ThreadOffset helper_offset, |
| 308 | RegLocation arg0, RegLocation arg1, |
| 309 | RegLocation arg2, |
| 310 | bool safepoint_pc) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 311 | RegStorage r_tgt = CallHelperSetup(helper_offset); |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 312 | DCHECK_EQ(arg0.wide, 0U); |
| 313 | LoadValueDirectFixed(arg0, TargetReg(kArg0)); |
| 314 | DCHECK_EQ(arg1.wide, 0U); |
| 315 | LoadValueDirectFixed(arg1, TargetReg(kArg1)); |
| 316 | DCHECK_EQ(arg1.wide, 0U); |
| 317 | LoadValueDirectFixed(arg2, TargetReg(kArg2)); |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 318 | ClobberCallerSave(); |
Ian Rogers | a9a8254 | 2013-10-04 11:17:26 -0700 | [diff] [blame] | 319 | CallHelper(r_tgt, helper_offset, safepoint_pc); |
| 320 | } |
| 321 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 322 | /* |
| 323 | * If there are any ins passed in registers that have not been promoted |
| 324 | * to a callee-save register, flush them to the frame. Perform intial |
| 325 | * assignment of promoted arguments. |
| 326 | * |
| 327 | * ArgLocs is an array of location records describing the incoming arguments |
| 328 | * with one location record per word of argument. |
| 329 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 330 | void Mir2Lir::FlushIns(RegLocation* ArgLocs, RegLocation rl_method) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 331 | /* |
| 332 | * Dummy up a RegLocation for the incoming Method* |
| 333 | * It will attempt to keep kArg0 live (or copy it to home location |
| 334 | * if promoted). |
| 335 | */ |
| 336 | RegLocation rl_src = rl_method; |
| 337 | rl_src.location = kLocPhysReg; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 338 | rl_src.reg = TargetReg(kArg0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 339 | rl_src.home = false; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 340 | MarkLive(rl_src.reg, rl_src.s_reg_low); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 341 | StoreValue(rl_method, rl_src); |
| 342 | // If Method* has been promoted, explicitly flush |
| 343 | if (rl_method.location == kLocPhysReg) { |
| 344 | StoreWordDisp(TargetReg(kSp), 0, TargetReg(kArg0)); |
| 345 | } |
| 346 | |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 347 | if (cu_->num_ins == 0) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 348 | return; |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 349 | } |
| 350 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 351 | int start_vreg = cu_->num_dalvik_registers - cu_->num_ins; |
| 352 | /* |
| 353 | * Copy incoming arguments to their proper home locations. |
| 354 | * NOTE: an older version of dx had an issue in which |
| 355 | * it would reuse static method argument registers. |
| 356 | * This could result in the same Dalvik virtual register |
| 357 | * being promoted to both core and fp regs. To account for this, |
| 358 | * we only copy to the corresponding promoted physical register |
| 359 | * if it matches the type of the SSA name for the incoming |
| 360 | * argument. It is also possible that long and double arguments |
| 361 | * end up half-promoted. In those cases, we must flush the promoted |
| 362 | * half to memory as well. |
| 363 | */ |
| 364 | for (int i = 0; i < cu_->num_ins; i++) { |
| 365 | PromotionMap* v_map = &promotion_map_[start_vreg + i]; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 366 | RegStorage reg = GetArgMappingToPhysicalReg(i); |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 367 | |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 368 | if (reg.Valid()) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 369 | // If arriving in register |
| 370 | bool need_flush = true; |
| 371 | RegLocation* t_loc = &ArgLocs[i]; |
| 372 | if ((v_map->core_location == kLocPhysReg) && !t_loc->fp) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 373 | OpRegCopy(RegStorage::Solo32(v_map->core_reg), reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 374 | need_flush = false; |
| 375 | } else if ((v_map->fp_location == kLocPhysReg) && t_loc->fp) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 376 | OpRegCopy(RegStorage::Solo32(v_map->FpReg), reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 377 | need_flush = false; |
| 378 | } else { |
| 379 | need_flush = true; |
| 380 | } |
| 381 | |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 382 | // For wide args, force flush if not fully promoted |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 383 | if (t_loc->wide) { |
| 384 | PromotionMap* p_map = v_map + (t_loc->high_word ? -1 : +1); |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 385 | // Is only half promoted? |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 386 | need_flush |= (p_map->core_location != v_map->core_location) || |
| 387 | (p_map->fp_location != v_map->fp_location); |
buzbee | d0a03b8 | 2013-09-14 08:21:05 -0700 | [diff] [blame] | 388 | if ((cu_->instruction_set == kThumb2) && t_loc->fp && !need_flush) { |
| 389 | /* |
| 390 | * In Arm, a double is represented as a pair of consecutive single float |
| 391 | * registers starting at an even number. It's possible that both Dalvik vRegs |
| 392 | * representing the incoming double were independently promoted as singles - but |
| 393 | * not in a form usable as a double. If so, we need to flush - even though the |
| 394 | * incoming arg appears fully in register. At this point in the code, both |
| 395 | * halves of the double are promoted. Make sure they are in a usable form. |
| 396 | */ |
| 397 | int lowreg_index = start_vreg + i + (t_loc->high_word ? -1 : 0); |
| 398 | int low_reg = promotion_map_[lowreg_index].FpReg; |
| 399 | int high_reg = promotion_map_[lowreg_index + 1].FpReg; |
| 400 | if (((low_reg & 0x1) != 0) || (high_reg != (low_reg + 1))) { |
| 401 | need_flush = true; |
| 402 | } |
| 403 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 404 | } |
| 405 | if (need_flush) { |
Razvan A Lupusoru | 3bc0174 | 2014-02-06 13:18:43 -0800 | [diff] [blame] | 406 | StoreBaseDisp(TargetReg(kSp), SRegOffset(start_vreg + i), reg, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 407 | } |
| 408 | } else { |
| 409 | // If arriving in frame & promoted |
| 410 | if (v_map->core_location == kLocPhysReg) { |
| 411 | LoadWordDisp(TargetReg(kSp), SRegOffset(start_vreg + i), |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 412 | RegStorage::Solo32(v_map->core_reg)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 413 | } |
| 414 | if (v_map->fp_location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 415 | LoadWordDisp(TargetReg(kSp), SRegOffset(start_vreg + i), RegStorage::Solo32(v_map->FpReg)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 416 | } |
| 417 | } |
| 418 | } |
| 419 | } |
| 420 | |
| 421 | /* |
| 422 | * Bit of a hack here - in the absence of a real scheduling pass, |
| 423 | * emit the next instruction in static & direct invoke sequences. |
| 424 | */ |
| 425 | static int NextSDCallInsn(CompilationUnit* cu, CallInfo* info, |
| 426 | int state, const MethodReference& target_method, |
| 427 | uint32_t unused, |
| 428 | uintptr_t direct_code, uintptr_t direct_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 429 | InvokeType type) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 430 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 431 | if (direct_code != 0 && direct_method != 0) { |
| 432 | switch (state) { |
| 433 | case 0: // Get the current Method* [sets kArg0] |
| 434 | if (direct_code != static_cast<unsigned int>(-1)) { |
Ian Rogers | 83883d7 | 2013-10-21 21:07:24 -0700 | [diff] [blame] | 435 | if (cu->instruction_set != kX86) { |
| 436 | cg->LoadConstant(cg->TargetReg(kInvokeTgt), direct_code); |
| 437 | } |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 438 | } else if (cu->instruction_set != kX86) { |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 439 | cg->LoadCodeAddress(target_method, type, kInvokeTgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 440 | } |
| 441 | if (direct_method != static_cast<unsigned int>(-1)) { |
| 442 | cg->LoadConstant(cg->TargetReg(kArg0), direct_method); |
| 443 | } else { |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 444 | cg->LoadMethodAddress(target_method, type, kArg0); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 445 | } |
| 446 | break; |
| 447 | default: |
| 448 | return -1; |
| 449 | } |
| 450 | } else { |
| 451 | switch (state) { |
| 452 | case 0: // Get the current Method* [sets kArg0] |
| 453 | // TUNING: we can save a reg copy if Method* has been promoted. |
| 454 | cg->LoadCurrMethodDirect(cg->TargetReg(kArg0)); |
| 455 | break; |
| 456 | case 1: // Get method->dex_cache_resolved_methods_ |
| 457 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 458 | mirror::ArtMethod::DexCacheResolvedMethodsOffset().Int32Value(), |
| 459 | cg->TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 460 | // Set up direct code if known. |
| 461 | if (direct_code != 0) { |
| 462 | if (direct_code != static_cast<unsigned int>(-1)) { |
| 463 | cg->LoadConstant(cg->TargetReg(kInvokeTgt), direct_code); |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 464 | } else if (cu->instruction_set != kX86) { |
Ian Rogers | 83883d7 | 2013-10-21 21:07:24 -0700 | [diff] [blame] | 465 | CHECK_LT(target_method.dex_method_index, target_method.dex_file->NumMethodIds()); |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 466 | cg->LoadCodeAddress(target_method, type, kInvokeTgt); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 467 | } |
| 468 | } |
| 469 | break; |
| 470 | case 2: // Grab target method* |
| 471 | CHECK_EQ(cu->dex_file, target_method.dex_file); |
| 472 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
| 473 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value() + |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 474 | (target_method.dex_method_index * 4), cg->TargetReg(kArg0)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 475 | break; |
| 476 | case 3: // Grab the code from the method* |
| 477 | if (cu->instruction_set != kX86) { |
| 478 | if (direct_code == 0) { |
| 479 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 480 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 481 | cg->TargetReg(kInvokeTgt)); |
| 482 | } |
| 483 | break; |
| 484 | } |
| 485 | // Intentional fallthrough for x86 |
| 486 | default: |
| 487 | return -1; |
| 488 | } |
| 489 | } |
| 490 | return state + 1; |
| 491 | } |
| 492 | |
| 493 | /* |
| 494 | * Bit of a hack here - in the absence of a real scheduling pass, |
| 495 | * emit the next instruction in a virtual invoke sequence. |
| 496 | * We can use kLr as a temp prior to target address loading |
| 497 | * Note also that we'll load the first argument ("this") into |
| 498 | * kArg1 here rather than the standard LoadArgRegs. |
| 499 | */ |
| 500 | static int NextVCallInsn(CompilationUnit* cu, CallInfo* info, |
| 501 | int state, const MethodReference& target_method, |
| 502 | uint32_t method_idx, uintptr_t unused, uintptr_t unused2, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 503 | InvokeType unused3) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 504 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
| 505 | /* |
| 506 | * This is the fast path in which the target virtual method is |
| 507 | * fully resolved at compile time. |
| 508 | */ |
| 509 | switch (state) { |
| 510 | case 0: { // Get "this" [set kArg1] |
| 511 | RegLocation rl_arg = info->args[0]; |
| 512 | cg->LoadValueDirectFixed(rl_arg, cg->TargetReg(kArg1)); |
| 513 | break; |
| 514 | } |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 515 | case 1: // Is "this" null? [use kArg1] |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 516 | cg->GenNullCheck(cg->TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 517 | // get this->klass_ [use kArg1, set kInvokeTgt] |
| 518 | cg->LoadWordDisp(cg->TargetReg(kArg1), mirror::Object::ClassOffset().Int32Value(), |
| 519 | cg->TargetReg(kInvokeTgt)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 520 | cg->MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 521 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 522 | case 2: // Get this->klass_->vtable [usr kInvokeTgt, set kInvokeTgt] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 523 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), mirror::Class::VTableOffset().Int32Value(), |
| 524 | cg->TargetReg(kInvokeTgt)); |
| 525 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 526 | case 3: // Get target method [use kInvokeTgt, set kArg0] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 527 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), (method_idx * 4) + |
| 528 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value(), |
| 529 | cg->TargetReg(kArg0)); |
| 530 | break; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 531 | case 4: // Get the compiled code address [uses kArg0, sets kInvokeTgt] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 532 | if (cu->instruction_set != kX86) { |
| 533 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 534 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 535 | cg->TargetReg(kInvokeTgt)); |
| 536 | break; |
| 537 | } |
| 538 | // Intentional fallthrough for X86 |
| 539 | default: |
| 540 | return -1; |
| 541 | } |
| 542 | return state + 1; |
| 543 | } |
| 544 | |
| 545 | /* |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 546 | * Emit the next instruction in an invoke interface sequence. This will do a lookup in the |
| 547 | * class's IMT, calling either the actual method or art_quick_imt_conflict_trampoline if |
| 548 | * more than one interface method map to the same index. Note also that we'll load the first |
| 549 | * argument ("this") into kArg1 here rather than the standard LoadArgRegs. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 550 | */ |
| 551 | static int NextInterfaceCallInsn(CompilationUnit* cu, CallInfo* info, int state, |
| 552 | const MethodReference& target_method, |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 553 | uint32_t method_idx, uintptr_t unused, |
| 554 | uintptr_t direct_method, InvokeType unused2) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 555 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 556 | |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 557 | switch (state) { |
| 558 | case 0: // Set target method index in case of conflict [set kHiddenArg, kHiddenFpArg (x86)] |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 559 | CHECK_LT(target_method.dex_method_index, target_method.dex_file->NumMethodIds()); |
| 560 | cg->LoadConstant(cg->TargetReg(kHiddenArg), target_method.dex_method_index); |
| 561 | if (cu->instruction_set == kX86) { |
| 562 | cg->OpRegCopy(cg->TargetReg(kHiddenFpArg), cg->TargetReg(kHiddenArg)); |
| 563 | } |
| 564 | break; |
| 565 | case 1: { // Get "this" [set kArg1] |
| 566 | RegLocation rl_arg = info->args[0]; |
| 567 | cg->LoadValueDirectFixed(rl_arg, cg->TargetReg(kArg1)); |
| 568 | break; |
| 569 | } |
| 570 | case 2: // Is "this" null? [use kArg1] |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 571 | cg->GenNullCheck(cg->TargetReg(kArg1), info->opt_flags); |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 572 | // Get this->klass_ [use kArg1, set kInvokeTgt] |
| 573 | cg->LoadWordDisp(cg->TargetReg(kArg1), mirror::Object::ClassOffset().Int32Value(), |
| 574 | cg->TargetReg(kInvokeTgt)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 575 | cg->MarkPossibleNullPointerException(info->opt_flags); |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 576 | break; |
| 577 | case 3: // Get this->klass_->imtable [use kInvokeTgt, set kInvokeTgt] |
| 578 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), mirror::Class::ImTableOffset().Int32Value(), |
| 579 | cg->TargetReg(kInvokeTgt)); |
| 580 | break; |
| 581 | case 4: // Get target method [use kInvokeTgt, set kArg0] |
| 582 | cg->LoadWordDisp(cg->TargetReg(kInvokeTgt), ((method_idx % ClassLinker::kImtSize) * 4) + |
| 583 | mirror::Array::DataOffset(sizeof(mirror::Object*)).Int32Value(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 584 | cg->TargetReg(kArg0)); |
| 585 | break; |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 586 | case 5: // Get the compiled code address [use kArg0, set kInvokeTgt] |
| 587 | if (cu->instruction_set != kX86) { |
| 588 | cg->LoadWordDisp(cg->TargetReg(kArg0), |
Ian Rogers | ef7d42f | 2014-01-06 12:55:46 -0800 | [diff] [blame] | 589 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value(), |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 590 | cg->TargetReg(kInvokeTgt)); |
| 591 | break; |
| 592 | } |
| 593 | // Intentional fallthrough for X86 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 594 | default: |
| 595 | return -1; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 596 | } |
| 597 | return state + 1; |
| 598 | } |
| 599 | |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 600 | static int NextInvokeInsnSP(CompilationUnit* cu, CallInfo* info, ThreadOffset trampoline, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 601 | int state, const MethodReference& target_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 602 | uint32_t method_idx) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 603 | Mir2Lir* cg = static_cast<Mir2Lir*>(cu->cg.get()); |
| 604 | /* |
| 605 | * This handles the case in which the base method is not fully |
| 606 | * resolved at compile time, we bail to a runtime helper. |
| 607 | */ |
| 608 | if (state == 0) { |
| 609 | if (cu->instruction_set != kX86) { |
| 610 | // Load trampoline target |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 611 | cg->LoadWordDisp(cg->TargetReg(kSelf), trampoline.Int32Value(), cg->TargetReg(kInvokeTgt)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 612 | } |
| 613 | // Load kArg0 with method index |
| 614 | CHECK_EQ(cu->dex_file, target_method.dex_file); |
| 615 | cg->LoadConstant(cg->TargetReg(kArg0), target_method.dex_method_index); |
| 616 | return 1; |
| 617 | } |
| 618 | return -1; |
| 619 | } |
| 620 | |
| 621 | static int NextStaticCallInsnSP(CompilationUnit* cu, CallInfo* info, |
| 622 | int state, |
| 623 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 624 | uint32_t unused, uintptr_t unused2, |
| 625 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 626 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeStaticTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 627 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 628 | } |
| 629 | |
| 630 | static int NextDirectCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 631 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 632 | uint32_t unused, uintptr_t unused2, |
| 633 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 634 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeDirectTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 635 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 636 | } |
| 637 | |
| 638 | static int NextSuperCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 639 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 640 | uint32_t unused, uintptr_t unused2, |
| 641 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 642 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeSuperTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 643 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 644 | } |
| 645 | |
| 646 | static int NextVCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, |
| 647 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 648 | uint32_t unused, uintptr_t unused2, |
| 649 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 650 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeVirtualTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 651 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 652 | } |
| 653 | |
| 654 | static int NextInterfaceCallInsnWithAccessCheck(CompilationUnit* cu, |
| 655 | CallInfo* info, int state, |
| 656 | const MethodReference& target_method, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 657 | uint32_t unused, uintptr_t unused2, |
| 658 | uintptr_t unused3, InvokeType unused4) { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 659 | ThreadOffset trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeInterfaceTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 660 | return NextInvokeInsnSP(cu, info, trampoline, state, target_method, 0); |
| 661 | } |
| 662 | |
| 663 | int Mir2Lir::LoadArgRegs(CallInfo* info, int call_state, |
| 664 | NextCallInsn next_call_insn, |
| 665 | const MethodReference& target_method, |
| 666 | uint32_t vtable_idx, uintptr_t direct_code, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 667 | uintptr_t direct_method, InvokeType type, bool skip_this) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 668 | int last_arg_reg = TargetReg(kArg3).GetReg(); |
| 669 | int next_reg = TargetReg(kArg1).GetReg(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 670 | int next_arg = 0; |
| 671 | if (skip_this) { |
| 672 | next_reg++; |
| 673 | next_arg++; |
| 674 | } |
| 675 | for (; (next_reg <= last_arg_reg) && (next_arg < info->num_arg_words); next_reg++) { |
| 676 | RegLocation rl_arg = info->args[next_arg++]; |
| 677 | rl_arg = UpdateRawLoc(rl_arg); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 678 | if (rl_arg.wide && (next_reg <= TargetReg(kArg2).GetReg())) { |
| 679 | RegStorage r_tmp(RegStorage::k64BitPair, next_reg, next_reg + 1); |
| 680 | LoadValueDirectWideFixed(rl_arg, r_tmp); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 681 | next_reg++; |
| 682 | next_arg++; |
| 683 | } else { |
| 684 | if (rl_arg.wide) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 685 | rl_arg = NarrowRegLoc(rl_arg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 686 | rl_arg.is_const = false; |
| 687 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 688 | LoadValueDirectFixed(rl_arg, RegStorage::Solo32(next_reg)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 689 | } |
| 690 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 691 | direct_code, direct_method, type); |
| 692 | } |
| 693 | return call_state; |
| 694 | } |
| 695 | |
| 696 | /* |
| 697 | * Load up to 5 arguments, the first three of which will be in |
| 698 | * kArg1 .. kArg3. On entry kArg0 contains the current method pointer, |
| 699 | * and as part of the load sequence, it must be replaced with |
| 700 | * the target method pointer. Note, this may also be called |
| 701 | * for "range" variants if the number of arguments is 5 or fewer. |
| 702 | */ |
| 703 | int Mir2Lir::GenDalvikArgsNoRange(CallInfo* info, |
| 704 | int call_state, LIR** pcrLabel, NextCallInsn next_call_insn, |
| 705 | const MethodReference& target_method, |
| 706 | uint32_t vtable_idx, uintptr_t direct_code, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 707 | uintptr_t direct_method, InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 708 | RegLocation rl_arg; |
| 709 | |
| 710 | /* If no arguments, just return */ |
| 711 | if (info->num_arg_words == 0) |
| 712 | return call_state; |
| 713 | |
| 714 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 715 | direct_code, direct_method, type); |
| 716 | |
| 717 | DCHECK_LE(info->num_arg_words, 5); |
| 718 | if (info->num_arg_words > 3) { |
| 719 | int32_t next_use = 3; |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 720 | // Detect special case of wide arg spanning arg3/arg4 |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 721 | RegLocation rl_use0 = info->args[0]; |
| 722 | RegLocation rl_use1 = info->args[1]; |
| 723 | RegLocation rl_use2 = info->args[2]; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 724 | if (((!rl_use0.wide && !rl_use1.wide) || rl_use0.wide) && rl_use2.wide) { |
| 725 | RegStorage reg; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 726 | // Wide spans, we need the 2nd half of uses[2]. |
| 727 | rl_arg = UpdateLocWide(rl_use2); |
| 728 | if (rl_arg.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 729 | reg = rl_arg.reg.GetHigh(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 730 | } else { |
| 731 | // kArg2 & rArg3 can safely be used here |
| 732 | reg = TargetReg(kArg3); |
| 733 | LoadWordDisp(TargetReg(kSp), SRegOffset(rl_arg.s_reg_low) + 4, reg); |
| 734 | call_state = next_call_insn(cu_, info, call_state, target_method, |
| 735 | vtable_idx, direct_code, direct_method, type); |
| 736 | } |
| 737 | StoreBaseDisp(TargetReg(kSp), (next_use + 1) * 4, reg, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 738 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 739 | direct_code, direct_method, type); |
| 740 | next_use++; |
| 741 | } |
| 742 | // Loop through the rest |
| 743 | while (next_use < info->num_arg_words) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 744 | RegStorage low_reg; |
| 745 | RegStorage high_reg; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 746 | rl_arg = info->args[next_use]; |
| 747 | rl_arg = UpdateRawLoc(rl_arg); |
| 748 | if (rl_arg.location == kLocPhysReg) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 749 | if (rl_arg.wide) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 750 | low_reg = rl_arg.reg.GetLow(); |
| 751 | high_reg = rl_arg.reg.GetHigh(); |
| 752 | } else { |
| 753 | low_reg = rl_arg.reg; |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 754 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 755 | } else { |
| 756 | low_reg = TargetReg(kArg2); |
| 757 | if (rl_arg.wide) { |
| 758 | high_reg = TargetReg(kArg3); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 759 | LoadValueDirectWideFixed(rl_arg, RegStorage::MakeRegPair(low_reg, high_reg)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 760 | } else { |
| 761 | LoadValueDirectFixed(rl_arg, low_reg); |
| 762 | } |
| 763 | call_state = next_call_insn(cu_, info, call_state, target_method, |
| 764 | vtable_idx, direct_code, direct_method, type); |
| 765 | } |
| 766 | int outs_offset = (next_use + 1) * 4; |
| 767 | if (rl_arg.wide) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 768 | StoreBaseDispWide(TargetReg(kSp), outs_offset, RegStorage::MakeRegPair(low_reg, high_reg)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 769 | next_use += 2; |
| 770 | } else { |
| 771 | StoreWordDisp(TargetReg(kSp), outs_offset, low_reg); |
| 772 | next_use++; |
| 773 | } |
| 774 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 775 | direct_code, direct_method, type); |
| 776 | } |
| 777 | } |
| 778 | |
| 779 | call_state = LoadArgRegs(info, call_state, next_call_insn, |
| 780 | target_method, vtable_idx, direct_code, direct_method, |
| 781 | type, skip_this); |
| 782 | |
| 783 | if (pcrLabel) { |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 784 | *pcrLabel = GenNullCheck(TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 785 | } |
| 786 | return call_state; |
| 787 | } |
| 788 | |
| 789 | /* |
| 790 | * May have 0+ arguments (also used for jumbo). Note that |
| 791 | * source virtual registers may be in physical registers, so may |
| 792 | * need to be flushed to home location before copying. This |
| 793 | * applies to arg3 and above (see below). |
| 794 | * |
| 795 | * Two general strategies: |
| 796 | * If < 20 arguments |
| 797 | * Pass args 3-18 using vldm/vstm block copy |
| 798 | * Pass arg0, arg1 & arg2 in kArg1-kArg3 |
| 799 | * If 20+ arguments |
| 800 | * Pass args arg19+ using memcpy block copy |
| 801 | * Pass arg0, arg1 & arg2 in kArg1-kArg3 |
| 802 | * |
| 803 | */ |
| 804 | int Mir2Lir::GenDalvikArgsRange(CallInfo* info, int call_state, |
| 805 | LIR** pcrLabel, NextCallInsn next_call_insn, |
| 806 | const MethodReference& target_method, |
| 807 | uint32_t vtable_idx, uintptr_t direct_code, uintptr_t direct_method, |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 808 | InvokeType type, bool skip_this) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 809 | // If we can treat it as non-range (Jumbo ops will use range form) |
| 810 | if (info->num_arg_words <= 5) |
| 811 | return GenDalvikArgsNoRange(info, call_state, pcrLabel, |
| 812 | next_call_insn, target_method, vtable_idx, |
| 813 | direct_code, direct_method, type, skip_this); |
| 814 | /* |
| 815 | * First load the non-register arguments. Both forms expect all |
| 816 | * of the source arguments to be in their home frame location, so |
| 817 | * scan the s_reg names and flush any that have been promoted to |
| 818 | * frame backing storage. |
| 819 | */ |
| 820 | // Scan the rest of the args - if in phys_reg flush to memory |
| 821 | for (int next_arg = 0; next_arg < info->num_arg_words;) { |
| 822 | RegLocation loc = info->args[next_arg]; |
| 823 | if (loc.wide) { |
| 824 | loc = UpdateLocWide(loc); |
| 825 | if ((next_arg >= 2) && (loc.location == kLocPhysReg)) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 826 | StoreBaseDispWide(TargetReg(kSp), SRegOffset(loc.s_reg_low), loc.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 827 | } |
| 828 | next_arg += 2; |
| 829 | } else { |
| 830 | loc = UpdateLoc(loc); |
| 831 | if ((next_arg >= 3) && (loc.location == kLocPhysReg)) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 832 | StoreBaseDisp(TargetReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 833 | } |
| 834 | next_arg++; |
| 835 | } |
| 836 | } |
| 837 | |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 838 | // Logic below assumes that Method pointer is at offset zero from SP. |
| 839 | DCHECK_EQ(VRegOffset(static_cast<int>(kVRegMethodPtrBaseReg)), 0); |
| 840 | |
| 841 | // The first 3 arguments are passed via registers. |
| 842 | // TODO: For 64-bit, instead of hardcoding 4 for Method* size, we should either |
| 843 | // get size of uintptr_t or size of object reference according to model being used. |
| 844 | int outs_offset = 4 /* Method* */ + (3 * sizeof(uint32_t)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 845 | int start_offset = SRegOffset(info->args[3].s_reg_low); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 846 | int regs_left_to_pass_via_stack = info->num_arg_words - 3; |
| 847 | DCHECK_GT(regs_left_to_pass_via_stack, 0); |
| 848 | |
| 849 | if (cu_->instruction_set == kThumb2 && regs_left_to_pass_via_stack <= 16) { |
| 850 | // Use vldm/vstm pair using kArg3 as a temp |
| 851 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 852 | direct_code, direct_method, type); |
| 853 | OpRegRegImm(kOpAdd, TargetReg(kArg3), TargetReg(kSp), start_offset); |
| 854 | LIR* ld = OpVldm(TargetReg(kArg3), regs_left_to_pass_via_stack); |
| 855 | // TUNING: loosen barrier |
| 856 | ld->u.m.def_mask = ENCODE_ALL; |
| 857 | SetMemRefType(ld, true /* is_load */, kDalvikReg); |
| 858 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 859 | direct_code, direct_method, type); |
| 860 | OpRegRegImm(kOpAdd, TargetReg(kArg3), TargetReg(kSp), 4 /* Method* */ + (3 * 4)); |
| 861 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 862 | direct_code, direct_method, type); |
| 863 | LIR* st = OpVstm(TargetReg(kArg3), regs_left_to_pass_via_stack); |
| 864 | SetMemRefType(st, false /* is_load */, kDalvikReg); |
| 865 | st->u.m.def_mask = ENCODE_ALL; |
| 866 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 867 | direct_code, direct_method, type); |
| 868 | } else if (cu_->instruction_set == kX86) { |
| 869 | int current_src_offset = start_offset; |
| 870 | int current_dest_offset = outs_offset; |
| 871 | |
| 872 | while (regs_left_to_pass_via_stack > 0) { |
| 873 | // This is based on the knowledge that the stack itself is 16-byte aligned. |
| 874 | bool src_is_16b_aligned = (current_src_offset & 0xF) == 0; |
| 875 | bool dest_is_16b_aligned = (current_dest_offset & 0xF) == 0; |
| 876 | size_t bytes_to_move; |
| 877 | |
| 878 | /* |
| 879 | * The amount to move defaults to 32-bit. If there are 4 registers left to move, then do a |
| 880 | * a 128-bit move because we won't get the chance to try to aligned. If there are more than |
| 881 | * 4 registers left to move, consider doing a 128-bit only if either src or dest are aligned. |
| 882 | * We do this because we could potentially do a smaller move to align. |
| 883 | */ |
| 884 | if (regs_left_to_pass_via_stack == 4 || |
| 885 | (regs_left_to_pass_via_stack > 4 && (src_is_16b_aligned || dest_is_16b_aligned))) { |
| 886 | // Moving 128-bits via xmm register. |
| 887 | bytes_to_move = sizeof(uint32_t) * 4; |
| 888 | |
| 889 | // Allocate a free xmm temp. Since we are working through the calling sequence, |
| 890 | // we expect to have an xmm temporary available. |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 891 | RegStorage temp = AllocTempDouble(); |
| 892 | CHECK_GT(temp.GetLowReg(), 0); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 893 | |
| 894 | LIR* ld1 = nullptr; |
| 895 | LIR* ld2 = nullptr; |
| 896 | LIR* st1 = nullptr; |
| 897 | LIR* st2 = nullptr; |
| 898 | |
| 899 | /* |
| 900 | * The logic is similar for both loads and stores. If we have 16-byte alignment, |
| 901 | * do an aligned move. If we have 8-byte alignment, then do the move in two |
| 902 | * parts. This approach prevents possible cache line splits. Finally, fall back |
| 903 | * to doing an unaligned move. In most cases we likely won't split the cache |
| 904 | * line but we cannot prove it and thus take a conservative approach. |
| 905 | */ |
| 906 | bool src_is_8b_aligned = (current_src_offset & 0x7) == 0; |
| 907 | bool dest_is_8b_aligned = (current_dest_offset & 0x7) == 0; |
| 908 | |
| 909 | if (src_is_16b_aligned) { |
| 910 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovA128FP); |
| 911 | } else if (src_is_8b_aligned) { |
| 912 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovLo128FP); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 913 | ld2 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset + (bytes_to_move >> 1), |
| 914 | kMovHi128FP); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 915 | } else { |
| 916 | ld1 = OpMovRegMem(temp, TargetReg(kSp), current_src_offset, kMovU128FP); |
| 917 | } |
| 918 | |
| 919 | if (dest_is_16b_aligned) { |
| 920 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovA128FP); |
| 921 | } else if (dest_is_8b_aligned) { |
| 922 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovLo128FP); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 923 | st2 = OpMovMemReg(TargetReg(kSp), current_dest_offset + (bytes_to_move >> 1), |
| 924 | temp, kMovHi128FP); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 925 | } else { |
| 926 | st1 = OpMovMemReg(TargetReg(kSp), current_dest_offset, temp, kMovU128FP); |
| 927 | } |
| 928 | |
| 929 | // TODO If we could keep track of aliasing information for memory accesses that are wider |
| 930 | // than 64-bit, we wouldn't need to set up a barrier. |
| 931 | if (ld1 != nullptr) { |
| 932 | if (ld2 != nullptr) { |
| 933 | // For 64-bit load we can actually set up the aliasing information. |
| 934 | AnnotateDalvikRegAccess(ld1, current_src_offset >> 2, true, true); |
| 935 | AnnotateDalvikRegAccess(ld2, (current_src_offset + (bytes_to_move >> 1)) >> 2, true, true); |
| 936 | } else { |
| 937 | // Set barrier for 128-bit load. |
| 938 | SetMemRefType(ld1, true /* is_load */, kDalvikReg); |
| 939 | ld1->u.m.def_mask = ENCODE_ALL; |
| 940 | } |
| 941 | } |
| 942 | if (st1 != nullptr) { |
| 943 | if (st2 != nullptr) { |
| 944 | // For 64-bit store we can actually set up the aliasing information. |
| 945 | AnnotateDalvikRegAccess(st1, current_dest_offset >> 2, false, true); |
| 946 | AnnotateDalvikRegAccess(st2, (current_dest_offset + (bytes_to_move >> 1)) >> 2, false, true); |
| 947 | } else { |
| 948 | // Set barrier for 128-bit store. |
| 949 | SetMemRefType(st1, false /* is_load */, kDalvikReg); |
| 950 | st1->u.m.def_mask = ENCODE_ALL; |
| 951 | } |
| 952 | } |
| 953 | |
| 954 | // Free the temporary used for the data movement. |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 955 | // CLEANUP: temp is currently a bogus pair, elmiminate extra free when updated. |
| 956 | FreeTemp(temp.GetLow()); |
| 957 | FreeTemp(temp.GetHigh()); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 958 | } else { |
| 959 | // Moving 32-bits via general purpose register. |
| 960 | bytes_to_move = sizeof(uint32_t); |
| 961 | |
| 962 | // Instead of allocating a new temp, simply reuse one of the registers being used |
| 963 | // for argument passing. |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 964 | RegStorage temp = TargetReg(kArg3); |
Razvan A Lupusoru | 2c498d1 | 2014-01-29 16:02:57 -0800 | [diff] [blame] | 965 | |
| 966 | // Now load the argument VR and store to the outs. |
| 967 | LoadWordDisp(TargetReg(kSp), current_src_offset, temp); |
| 968 | StoreWordDisp(TargetReg(kSp), current_dest_offset, temp); |
| 969 | } |
| 970 | |
| 971 | current_src_offset += bytes_to_move; |
| 972 | current_dest_offset += bytes_to_move; |
| 973 | regs_left_to_pass_via_stack -= (bytes_to_move >> 2); |
| 974 | } |
| 975 | } else { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 976 | // Generate memcpy |
| 977 | OpRegRegImm(kOpAdd, TargetReg(kArg0), TargetReg(kSp), outs_offset); |
| 978 | OpRegRegImm(kOpAdd, TargetReg(kArg1), TargetReg(kSp), start_offset); |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 979 | CallRuntimeHelperRegRegImm(QUICK_ENTRYPOINT_OFFSET(pMemcpy), TargetReg(kArg0), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 980 | TargetReg(kArg1), (info->num_arg_words - 3) * 4, false); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 981 | } |
| 982 | |
| 983 | call_state = LoadArgRegs(info, call_state, next_call_insn, |
| 984 | target_method, vtable_idx, direct_code, direct_method, |
| 985 | type, skip_this); |
| 986 | |
| 987 | call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, |
| 988 | direct_code, direct_method, type); |
| 989 | if (pcrLabel) { |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 990 | *pcrLabel = GenNullCheck(TargetReg(kArg1), info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 991 | } |
| 992 | return call_state; |
| 993 | } |
| 994 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 995 | RegLocation Mir2Lir::InlineTarget(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 996 | RegLocation res; |
| 997 | if (info->result.location == kLocInvalid) { |
| 998 | res = GetReturn(false); |
| 999 | } else { |
| 1000 | res = info->result; |
| 1001 | } |
| 1002 | return res; |
| 1003 | } |
| 1004 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1005 | RegLocation Mir2Lir::InlineTargetWide(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1006 | RegLocation res; |
| 1007 | if (info->result.location == kLocInvalid) { |
| 1008 | res = GetReturnWide(false); |
| 1009 | } else { |
| 1010 | res = info->result; |
| 1011 | } |
| 1012 | return res; |
| 1013 | } |
| 1014 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1015 | bool Mir2Lir::GenInlinedCharAt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1016 | if (cu_->instruction_set == kMips) { |
| 1017 | // TODO - add Mips implementation |
| 1018 | return false; |
| 1019 | } |
| 1020 | // Location of reference to data array |
| 1021 | int value_offset = mirror::String::ValueOffset().Int32Value(); |
| 1022 | // Location of count |
| 1023 | int count_offset = mirror::String::CountOffset().Int32Value(); |
| 1024 | // Starting offset within data array |
| 1025 | int offset_offset = mirror::String::OffsetOffset().Int32Value(); |
| 1026 | // Start of char data with array_ |
| 1027 | int data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Int32Value(); |
| 1028 | |
| 1029 | RegLocation rl_obj = info->args[0]; |
| 1030 | RegLocation rl_idx = info->args[1]; |
| 1031 | rl_obj = LoadValue(rl_obj, kCoreReg); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1032 | // X86 wants to avoid putting a constant index into a register. |
| 1033 | if (!(cu_->instruction_set == kX86 && rl_idx.is_const)) { |
| 1034 | rl_idx = LoadValue(rl_idx, kCoreReg); |
| 1035 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1036 | RegStorage reg_max; |
| 1037 | GenNullCheck(rl_obj.reg, info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1038 | bool range_check = (!(info->opt_flags & MIR_IGNORE_RANGE_CHECK)); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1039 | LIR* range_check_branch = nullptr; |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1040 | RegStorage reg_off; |
| 1041 | RegStorage reg_ptr; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1042 | if (cu_->instruction_set != kX86) { |
| 1043 | reg_off = AllocTemp(); |
| 1044 | reg_ptr = AllocTemp(); |
| 1045 | if (range_check) { |
| 1046 | reg_max = AllocTemp(); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1047 | LoadWordDisp(rl_obj.reg, count_offset, reg_max); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1048 | MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1049 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1050 | LoadWordDisp(rl_obj.reg, offset_offset, reg_off); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1051 | MarkPossibleNullPointerException(info->opt_flags); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1052 | LoadWordDisp(rl_obj.reg, value_offset, reg_ptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1053 | if (range_check) { |
| 1054 | // Set up a launch pad to allow retry in case of bounds violation */ |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1055 | OpRegReg(kOpCmp, rl_idx.reg, reg_max); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1056 | FreeTemp(reg_max); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1057 | range_check_branch = OpCondBranch(kCondUge, nullptr); |
Brian Carlstrom | 6f485c6 | 2013-07-18 15:35:35 -0700 | [diff] [blame] | 1058 | } |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1059 | OpRegImm(kOpAdd, reg_ptr, data_offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1060 | } else { |
| 1061 | if (range_check) { |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1062 | // On x86, we can compare to memory directly |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1063 | // Set up a launch pad to allow retry in case of bounds violation */ |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1064 | if (rl_idx.is_const) { |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1065 | range_check_branch = OpCmpMemImmBranch( |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1066 | kCondUlt, RegStorage::InvalidReg(), rl_obj.reg, count_offset, |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1067 | mir_graph_->ConstantValue(rl_idx.orig_sreg), nullptr); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1068 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1069 | OpRegMem(kOpCmp, rl_idx.reg, rl_obj.reg, count_offset); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1070 | range_check_branch = OpCondBranch(kCondUge, nullptr); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1071 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1072 | } |
| 1073 | reg_off = AllocTemp(); |
| 1074 | reg_ptr = AllocTemp(); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1075 | LoadWordDisp(rl_obj.reg, offset_offset, reg_off); |
| 1076 | LoadWordDisp(rl_obj.reg, value_offset, reg_ptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1077 | } |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1078 | if (rl_idx.is_const) { |
| 1079 | OpRegImm(kOpAdd, reg_off, mir_graph_->ConstantValue(rl_idx.orig_sreg)); |
| 1080 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1081 | OpRegReg(kOpAdd, reg_off, rl_idx.reg); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1082 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1083 | FreeTemp(rl_obj.reg); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1084 | if (rl_idx.location == kLocPhysReg) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1085 | FreeTemp(rl_idx.reg); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1086 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1087 | RegLocation rl_dest = InlineTarget(info); |
| 1088 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1089 | if (cu_->instruction_set != kX86) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1090 | LoadBaseIndexed(reg_ptr, reg_off, rl_result.reg, 1, kUnsignedHalf); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1091 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1092 | LoadBaseIndexedDisp(reg_ptr, reg_off, 1, data_offset, rl_result.reg, |
| 1093 | RegStorage::InvalidReg(), kUnsignedHalf, INVALID_SREG); |
Mark Mendell | 2b724cb | 2014-02-06 05:24:20 -0800 | [diff] [blame] | 1094 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1095 | FreeTemp(reg_off); |
| 1096 | FreeTemp(reg_ptr); |
| 1097 | StoreValue(rl_dest, rl_result); |
| 1098 | if (range_check) { |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1099 | DCHECK(range_check_branch != nullptr); |
| 1100 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've already null checked. |
| 1101 | AddIntrinsicLaunchpad(info, range_check_branch); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1102 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1103 | return true; |
| 1104 | } |
| 1105 | |
| 1106 | // Generates an inlined String.is_empty or String.length. |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1107 | bool Mir2Lir::GenInlinedStringIsEmptyOrLength(CallInfo* info, bool is_empty) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1108 | if (cu_->instruction_set == kMips) { |
| 1109 | // TODO - add Mips implementation |
| 1110 | return false; |
| 1111 | } |
| 1112 | // dst = src.length(); |
| 1113 | RegLocation rl_obj = info->args[0]; |
| 1114 | rl_obj = LoadValue(rl_obj, kCoreReg); |
| 1115 | RegLocation rl_dest = InlineTarget(info); |
| 1116 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1117 | GenNullCheck(rl_obj.reg, info->opt_flags); |
| 1118 | LoadWordDisp(rl_obj.reg, mirror::String::CountOffset().Int32Value(), rl_result.reg); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1119 | MarkPossibleNullPointerException(info->opt_flags); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1120 | if (is_empty) { |
| 1121 | // dst = (dst == 0); |
| 1122 | if (cu_->instruction_set == kThumb2) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1123 | RegStorage t_reg = AllocTemp(); |
| 1124 | OpRegReg(kOpNeg, t_reg, rl_result.reg); |
| 1125 | OpRegRegReg(kOpAdc, rl_result.reg, rl_result.reg, t_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1126 | } else { |
| 1127 | DCHECK_EQ(cu_->instruction_set, kX86); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1128 | OpRegImm(kOpSub, rl_result.reg, 1); |
| 1129 | OpRegImm(kOpLsr, rl_result.reg, 31); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1130 | } |
| 1131 | } |
| 1132 | StoreValue(rl_dest, rl_result); |
| 1133 | return true; |
| 1134 | } |
| 1135 | |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1136 | bool Mir2Lir::GenInlinedReverseBytes(CallInfo* info, OpSize size) { |
| 1137 | if (cu_->instruction_set == kMips) { |
| 1138 | // TODO - add Mips implementation |
| 1139 | return false; |
| 1140 | } |
| 1141 | RegLocation rl_src_i = info->args[0]; |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1142 | RegLocation rl_dest = (size == kLong) ? InlineTargetWide(info) : InlineTarget(info); // result reg |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1143 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1144 | if (size == kLong) { |
| 1145 | RegLocation rl_i = LoadValueWide(rl_src_i, kCoreReg); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1146 | RegStorage r_i_low = rl_i.reg.GetLow(); |
| 1147 | if (rl_i.reg.GetLowReg() == rl_result.reg.GetLowReg()) { |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1148 | // First REV shall clobber rl_result.reg.GetReg(), save the value in a temp for the second REV. |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1149 | r_i_low = AllocTemp(); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1150 | OpRegCopy(r_i_low, rl_i.reg); |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1151 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1152 | OpRegReg(kOpRev, rl_result.reg.GetLow(), rl_i.reg.GetHigh()); |
| 1153 | OpRegReg(kOpRev, rl_result.reg.GetHigh(), r_i_low); |
| 1154 | if (rl_i.reg.GetLowReg() == rl_result.reg.GetLowReg()) { |
Vladimir Marko | f246af2 | 2013-11-27 12:30:15 +0000 | [diff] [blame] | 1155 | FreeTemp(r_i_low); |
| 1156 | } |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1157 | StoreValueWide(rl_dest, rl_result); |
| 1158 | } else { |
| 1159 | DCHECK(size == kWord || size == kSignedHalf); |
| 1160 | OpKind op = (size == kWord) ? kOpRev : kOpRevsh; |
| 1161 | RegLocation rl_i = LoadValue(rl_src_i, kCoreReg); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1162 | OpRegReg(op, rl_result.reg, rl_i.reg); |
Vladimir Marko | 6bdf1ff | 2013-10-29 17:40:46 +0000 | [diff] [blame] | 1163 | StoreValue(rl_dest, rl_result); |
| 1164 | } |
| 1165 | return true; |
| 1166 | } |
| 1167 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1168 | bool Mir2Lir::GenInlinedAbsInt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1169 | if (cu_->instruction_set == kMips) { |
| 1170 | // TODO - add Mips implementation |
| 1171 | return false; |
| 1172 | } |
| 1173 | RegLocation rl_src = info->args[0]; |
| 1174 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1175 | RegLocation rl_dest = InlineTarget(info); |
| 1176 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1177 | RegStorage sign_reg = AllocTemp(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1178 | // abs(x) = y<=x>>31, (x+y)^y. |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1179 | OpRegRegImm(kOpAsr, sign_reg, rl_src.reg, 31); |
| 1180 | OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, sign_reg); |
| 1181 | OpRegReg(kOpXor, rl_result.reg, sign_reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1182 | StoreValue(rl_dest, rl_result); |
| 1183 | return true; |
| 1184 | } |
| 1185 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1186 | bool Mir2Lir::GenInlinedAbsLong(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1187 | if (cu_->instruction_set == kMips) { |
| 1188 | // TODO - add Mips implementation |
| 1189 | return false; |
| 1190 | } |
Vladimir Marko | b982331 | 2014-03-20 17:38:43 +0000 | [diff] [blame] | 1191 | RegLocation rl_src = info->args[0]; |
| 1192 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 1193 | RegLocation rl_dest = InlineTargetWide(info); |
| 1194 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1195 | |
| 1196 | // If on x86 or if we would clobber a register needed later, just copy the source first. |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1197 | if (cu_->instruction_set == kX86 || rl_result.reg.GetLowReg() == rl_src.reg.GetHighReg()) { |
| 1198 | OpRegCopyWide(rl_result.reg, rl_src.reg); |
| 1199 | if (rl_result.reg.GetLowReg() != rl_src.reg.GetLowReg() && |
| 1200 | rl_result.reg.GetLowReg() != rl_src.reg.GetHighReg() && |
| 1201 | rl_result.reg.GetHighReg() != rl_src.reg.GetLowReg() && |
Vladimir Marko | b982331 | 2014-03-20 17:38:43 +0000 | [diff] [blame] | 1202 | rl_result.reg.GetHighReg() != rl_src.reg.GetHighReg()) { |
| 1203 | // Reuse source registers to avoid running out of temps. |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1204 | FreeTemp(rl_src.reg); |
Vladimir Marko | b982331 | 2014-03-20 17:38:43 +0000 | [diff] [blame] | 1205 | } |
| 1206 | rl_src = rl_result; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1207 | } |
Vladimir Marko | b982331 | 2014-03-20 17:38:43 +0000 | [diff] [blame] | 1208 | |
| 1209 | // abs(x) = y<=x>>31, (x+y)^y. |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1210 | RegStorage sign_reg = AllocTemp(); |
| 1211 | OpRegRegImm(kOpAsr, sign_reg, rl_src.reg.GetHigh(), 31); |
| 1212 | OpRegRegReg(kOpAdd, rl_result.reg.GetLow(), rl_src.reg.GetLow(), sign_reg); |
| 1213 | OpRegRegReg(kOpAdc, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), sign_reg); |
| 1214 | OpRegReg(kOpXor, rl_result.reg.GetLow(), sign_reg); |
| 1215 | OpRegReg(kOpXor, rl_result.reg.GetHigh(), sign_reg); |
Vladimir Marko | b982331 | 2014-03-20 17:38:43 +0000 | [diff] [blame] | 1216 | StoreValueWide(rl_dest, rl_result); |
| 1217 | return true; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1218 | } |
| 1219 | |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1220 | bool Mir2Lir::GenInlinedAbsFloat(CallInfo* info) { |
| 1221 | if (cu_->instruction_set == kMips) { |
| 1222 | // TODO - add Mips implementation |
| 1223 | return false; |
| 1224 | } |
| 1225 | RegLocation rl_src = info->args[0]; |
| 1226 | rl_src = LoadValue(rl_src, kCoreReg); |
| 1227 | RegLocation rl_dest = InlineTarget(info); |
| 1228 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1229 | OpRegRegImm(kOpAnd, rl_result.reg, rl_src.reg, 0x7fffffff); |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1230 | StoreValue(rl_dest, rl_result); |
| 1231 | return true; |
| 1232 | } |
| 1233 | |
| 1234 | bool Mir2Lir::GenInlinedAbsDouble(CallInfo* info) { |
| 1235 | if (cu_->instruction_set == kMips) { |
| 1236 | // TODO - add Mips implementation |
| 1237 | return false; |
| 1238 | } |
| 1239 | RegLocation rl_src = info->args[0]; |
| 1240 | rl_src = LoadValueWide(rl_src, kCoreReg); |
| 1241 | RegLocation rl_dest = InlineTargetWide(info); |
| 1242 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1243 | OpRegCopyWide(rl_result.reg, rl_src.reg); |
| 1244 | OpRegImm(kOpAnd, rl_result.reg.GetHigh(), 0x7fffffff); |
Yixin Shou | dbb17e3 | 2014-02-07 05:09:30 -0800 | [diff] [blame] | 1245 | StoreValueWide(rl_dest, rl_result); |
| 1246 | return true; |
| 1247 | } |
| 1248 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1249 | bool Mir2Lir::GenInlinedFloatCvt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1250 | if (cu_->instruction_set == kMips) { |
| 1251 | // TODO - add Mips implementation |
| 1252 | return false; |
| 1253 | } |
| 1254 | RegLocation rl_src = info->args[0]; |
| 1255 | RegLocation rl_dest = InlineTarget(info); |
| 1256 | StoreValue(rl_dest, rl_src); |
| 1257 | return true; |
| 1258 | } |
| 1259 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1260 | bool Mir2Lir::GenInlinedDoubleCvt(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1261 | if (cu_->instruction_set == kMips) { |
| 1262 | // TODO - add Mips implementation |
| 1263 | return false; |
| 1264 | } |
| 1265 | RegLocation rl_src = info->args[0]; |
| 1266 | RegLocation rl_dest = InlineTargetWide(info); |
| 1267 | StoreValueWide(rl_dest, rl_src); |
| 1268 | return true; |
| 1269 | } |
| 1270 | |
| 1271 | /* |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1272 | * Fast String.indexOf(I) & (II). Tests for simple case of char <= 0xFFFF, |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1273 | * otherwise bails to standard library code. |
| 1274 | */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1275 | bool Mir2Lir::GenInlinedIndexOf(CallInfo* info, bool zero_based) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1276 | if (cu_->instruction_set == kMips) { |
| 1277 | // TODO - add Mips implementation |
| 1278 | return false; |
| 1279 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1280 | RegLocation rl_obj = info->args[0]; |
| 1281 | RegLocation rl_char = info->args[1]; |
| 1282 | if (rl_char.is_const && (mir_graph_->ConstantValue(rl_char) & ~0xFFFF) != 0) { |
| 1283 | // Code point beyond 0xFFFF. Punt to the real String.indexOf(). |
| 1284 | return false; |
| 1285 | } |
| 1286 | |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1287 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1288 | LockCallTemps(); // Using fixed registers |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1289 | RegStorage reg_ptr = TargetReg(kArg0); |
| 1290 | RegStorage reg_char = TargetReg(kArg1); |
| 1291 | RegStorage reg_start = TargetReg(kArg2); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1292 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1293 | LoadValueDirectFixed(rl_obj, reg_ptr); |
| 1294 | LoadValueDirectFixed(rl_char, reg_char); |
| 1295 | if (zero_based) { |
| 1296 | LoadConstant(reg_start, 0); |
| 1297 | } else { |
buzbee | a44d4f5 | 2014-03-05 11:26:39 -0800 | [diff] [blame] | 1298 | RegLocation rl_start = info->args[2]; // 3rd arg only present in III flavor of IndexOf. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1299 | LoadValueDirectFixed(rl_start, reg_start); |
| 1300 | } |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1301 | RegStorage r_tgt = LoadHelper(QUICK_ENTRYPOINT_OFFSET(pIndexOf)); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1302 | GenNullCheck(reg_ptr, info->opt_flags); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1303 | LIR* high_code_point_branch = |
| 1304 | rl_char.is_const ? nullptr : OpCmpImmBranch(kCondGt, reg_char, 0xFFFF, nullptr); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1305 | // NOTE: not a safepoint |
Mark Mendell | 4028a6c | 2014-02-19 20:06:20 -0800 | [diff] [blame] | 1306 | OpReg(kOpBlx, r_tgt); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1307 | if (!rl_char.is_const) { |
| 1308 | // Add the slow path for code points beyond 0xFFFF. |
| 1309 | DCHECK(high_code_point_branch != nullptr); |
| 1310 | LIR* resume_tgt = NewLIR0(kPseudoTargetLabel); |
| 1311 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. |
| 1312 | AddIntrinsicLaunchpad(info, high_code_point_branch, resume_tgt); |
| 1313 | } else { |
| 1314 | DCHECK_EQ(mir_graph_->ConstantValue(rl_char) & ~0xFFFF, 0); |
| 1315 | DCHECK(high_code_point_branch == nullptr); |
| 1316 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1317 | RegLocation rl_return = GetReturn(false); |
| 1318 | RegLocation rl_dest = InlineTarget(info); |
| 1319 | StoreValue(rl_dest, rl_return); |
| 1320 | return true; |
| 1321 | } |
| 1322 | |
| 1323 | /* Fast string.compareTo(Ljava/lang/string;)I. */ |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1324 | bool Mir2Lir::GenInlinedStringCompareTo(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1325 | if (cu_->instruction_set == kMips) { |
| 1326 | // TODO - add Mips implementation |
| 1327 | return false; |
| 1328 | } |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1329 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1330 | LockCallTemps(); // Using fixed registers |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1331 | RegStorage reg_this = TargetReg(kArg0); |
| 1332 | RegStorage reg_cmp = TargetReg(kArg1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1333 | |
| 1334 | RegLocation rl_this = info->args[0]; |
| 1335 | RegLocation rl_cmp = info->args[1]; |
| 1336 | LoadValueDirectFixed(rl_this, reg_this); |
| 1337 | LoadValueDirectFixed(rl_cmp, reg_cmp); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1338 | RegStorage r_tgt = (cu_->instruction_set != kX86) ? |
| 1339 | LoadHelper(QUICK_ENTRYPOINT_OFFSET(pStringCompareTo)) : RegStorage::InvalidReg(); |
Dave Allison | b373e09 | 2014-02-20 16:06:36 -0800 | [diff] [blame] | 1340 | GenNullCheck(reg_this, info->opt_flags); |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1341 | info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. |
Brian Carlstrom | 7934ac2 | 2013-07-26 10:54:15 -0700 | [diff] [blame] | 1342 | // TUNING: check if rl_cmp.s_reg_low is already null checked |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1343 | LIR* cmp_null_check_branch = OpCmpImmBranch(kCondEq, reg_cmp, 0, nullptr); |
| 1344 | AddIntrinsicLaunchpad(info, cmp_null_check_branch); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1345 | // NOTE: not a safepoint |
| 1346 | if (cu_->instruction_set != kX86) { |
| 1347 | OpReg(kOpBlx, r_tgt); |
| 1348 | } else { |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1349 | OpThreadMem(kOpBlx, QUICK_ENTRYPOINT_OFFSET(pStringCompareTo)); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1350 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1351 | RegLocation rl_return = GetReturn(false); |
| 1352 | RegLocation rl_dest = InlineTarget(info); |
| 1353 | StoreValue(rl_dest, rl_return); |
| 1354 | return true; |
| 1355 | } |
| 1356 | |
| 1357 | bool Mir2Lir::GenInlinedCurrentThread(CallInfo* info) { |
| 1358 | RegLocation rl_dest = InlineTarget(info); |
| 1359 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1360 | ThreadOffset offset = Thread::PeerOffset(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1361 | if (cu_->instruction_set == kThumb2 || cu_->instruction_set == kMips) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1362 | LoadWordDisp(TargetReg(kSelf), offset.Int32Value(), rl_result.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1363 | } else { |
| 1364 | CHECK(cu_->instruction_set == kX86); |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1365 | reinterpret_cast<X86Mir2Lir*>(this)->OpRegThreadMem(kOpMov, rl_result.reg.GetReg(), offset); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1366 | } |
| 1367 | StoreValue(rl_dest, rl_result); |
| 1368 | return true; |
| 1369 | } |
| 1370 | |
| 1371 | bool Mir2Lir::GenInlinedUnsafeGet(CallInfo* info, |
| 1372 | bool is_long, bool is_volatile) { |
| 1373 | if (cu_->instruction_set == kMips) { |
| 1374 | // TODO - add Mips implementation |
| 1375 | return false; |
| 1376 | } |
| 1377 | // Unused - RegLocation rl_src_unsafe = info->args[0]; |
| 1378 | RegLocation rl_src_obj = info->args[1]; // Object |
| 1379 | RegLocation rl_src_offset = info->args[2]; // long low |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1380 | rl_src_offset = NarrowRegLoc(rl_src_offset); // ignore high half in info->args[3] |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1381 | RegLocation rl_dest = is_long ? InlineTargetWide(info) : InlineTarget(info); // result reg |
Razvan A Lupusoru | 99ad723 | 2014-02-25 17:41:08 -0800 | [diff] [blame] | 1382 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1383 | RegLocation rl_object = LoadValue(rl_src_obj, kCoreReg); |
| 1384 | RegLocation rl_offset = LoadValue(rl_src_offset, kCoreReg); |
| 1385 | RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); |
| 1386 | if (is_long) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1387 | OpRegReg(kOpAdd, rl_object.reg, rl_offset.reg); |
| 1388 | LoadBaseDispWide(rl_object.reg, 0, rl_result.reg, INVALID_SREG); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1389 | } else { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1390 | LoadBaseIndexed(rl_object.reg, rl_offset.reg, rl_result.reg, 0, kWord); |
Razvan A Lupusoru | 99ad723 | 2014-02-25 17:41:08 -0800 | [diff] [blame] | 1391 | } |
| 1392 | |
| 1393 | if (is_volatile) { |
| 1394 | // Without context sensitive analysis, we must issue the most conservative barriers. |
| 1395 | // In this case, either a load or store may follow so we issue both barriers. |
| 1396 | GenMemBarrier(kLoadLoad); |
| 1397 | GenMemBarrier(kLoadStore); |
| 1398 | } |
| 1399 | |
| 1400 | if (is_long) { |
| 1401 | StoreValueWide(rl_dest, rl_result); |
| 1402 | } else { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1403 | StoreValue(rl_dest, rl_result); |
| 1404 | } |
| 1405 | return true; |
| 1406 | } |
| 1407 | |
| 1408 | bool Mir2Lir::GenInlinedUnsafePut(CallInfo* info, bool is_long, |
| 1409 | bool is_object, bool is_volatile, bool is_ordered) { |
| 1410 | if (cu_->instruction_set == kMips) { |
| 1411 | // TODO - add Mips implementation |
| 1412 | return false; |
| 1413 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1414 | // Unused - RegLocation rl_src_unsafe = info->args[0]; |
| 1415 | RegLocation rl_src_obj = info->args[1]; // Object |
| 1416 | RegLocation rl_src_offset = info->args[2]; // long low |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1417 | rl_src_offset = NarrowRegLoc(rl_src_offset); // ignore high half in info->args[3] |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1418 | RegLocation rl_src_value = info->args[4]; // value to store |
| 1419 | if (is_volatile || is_ordered) { |
Razvan A Lupusoru | 99ad723 | 2014-02-25 17:41:08 -0800 | [diff] [blame] | 1420 | // There might have been a store before this volatile one so insert StoreStore barrier. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1421 | GenMemBarrier(kStoreStore); |
| 1422 | } |
| 1423 | RegLocation rl_object = LoadValue(rl_src_obj, kCoreReg); |
| 1424 | RegLocation rl_offset = LoadValue(rl_src_offset, kCoreReg); |
| 1425 | RegLocation rl_value; |
| 1426 | if (is_long) { |
| 1427 | rl_value = LoadValueWide(rl_src_value, kCoreReg); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1428 | OpRegReg(kOpAdd, rl_object.reg, rl_offset.reg); |
| 1429 | StoreBaseDispWide(rl_object.reg, 0, rl_value.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1430 | } else { |
| 1431 | rl_value = LoadValue(rl_src_value, kCoreReg); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1432 | StoreBaseIndexed(rl_object.reg, rl_offset.reg, rl_value.reg, 0, kWord); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1433 | } |
Mark Mendell | df8ee2e | 2014-01-27 16:37:47 -0800 | [diff] [blame] | 1434 | |
| 1435 | // Free up the temp early, to ensure x86 doesn't run out of temporaries in MarkGCCard. |
Bill Buzbee | 00e1ec6 | 2014-02-27 23:44:13 +0000 | [diff] [blame] | 1436 | FreeTemp(rl_offset.reg.GetReg()); |
Razvan A Lupusoru | 99ad723 | 2014-02-25 17:41:08 -0800 | [diff] [blame] | 1437 | |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1438 | if (is_volatile) { |
Razvan A Lupusoru | 99ad723 | 2014-02-25 17:41:08 -0800 | [diff] [blame] | 1439 | // A load might follow the volatile store so insert a StoreLoad barrier. |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1440 | GenMemBarrier(kStoreLoad); |
| 1441 | } |
| 1442 | if (is_object) { |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1443 | MarkGCCard(rl_value.reg, rl_object.reg); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1444 | } |
| 1445 | return true; |
| 1446 | } |
| 1447 | |
Brian Carlstrom | 2ce745c | 2013-07-17 17:44:30 -0700 | [diff] [blame] | 1448 | void Mir2Lir::GenInvoke(CallInfo* info) { |
Vladimir Marko | 9820b7c | 2014-01-02 16:40:37 +0000 | [diff] [blame] | 1449 | if ((info->opt_flags & MIR_INLINED) != 0) { |
| 1450 | // Already inlined but we may still need the null check. |
| 1451 | if (info->type != kStatic && |
| 1452 | ((cu_->disable_opt & (1 << kNullCheckElimination)) != 0 || |
| 1453 | (info->opt_flags & MIR_IGNORE_NULL_CHECK) == 0)) { |
| 1454 | RegLocation rl_obj = LoadValue(info->args[0], kCoreReg); |
buzbee | 2700f7e | 2014-03-07 09:46:20 -0800 | [diff] [blame^] | 1455 | GenImmedCheck(kCondEq, rl_obj.reg, 0, kThrowNullPointer); |
Vladimir Marko | 9820b7c | 2014-01-02 16:40:37 +0000 | [diff] [blame] | 1456 | } |
| 1457 | return; |
| 1458 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1459 | DCHECK(cu_->compiler_driver->GetMethodInlinerMap() != nullptr); |
| 1460 | if (cu_->compiler_driver->GetMethodInlinerMap()->GetMethodInliner(cu_->dex_file) |
| 1461 | ->GenIntrinsic(this, info)) { |
| 1462 | return; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1463 | } |
Vladimir Marko | 3bc8615 | 2014-03-13 14:11:28 +0000 | [diff] [blame] | 1464 | GenInvokeNoInline(info); |
| 1465 | } |
| 1466 | |
| 1467 | void Mir2Lir::GenInvokeNoInline(CallInfo* info) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1468 | int call_state = 0; |
| 1469 | LIR* null_ck; |
| 1470 | LIR** p_null_ck = NULL; |
| 1471 | NextCallInsn next_call_insn; |
| 1472 | FlushAllRegs(); /* Everything to home location */ |
| 1473 | // Explicit register usage |
| 1474 | LockCallTemps(); |
| 1475 | |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1476 | const MirMethodLoweringInfo& method_info = mir_graph_->GetMethodLoweringInfo(info->mir); |
| 1477 | cu_->compiler_driver->ProcessedInvoke(method_info.GetInvokeType(), method_info.StatsFlags()); |
| 1478 | InvokeType original_type = static_cast<InvokeType>(method_info.GetInvokeType()); |
| 1479 | info->type = static_cast<InvokeType>(method_info.GetSharpType()); |
| 1480 | bool fast_path = method_info.FastPath(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1481 | bool skip_this; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1482 | if (info->type == kInterface) { |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1483 | next_call_insn = fast_path ? NextInterfaceCallInsn : NextInterfaceCallInsnWithAccessCheck; |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1484 | skip_this = fast_path; |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1485 | } else if (info->type == kDirect) { |
| 1486 | if (fast_path) { |
| 1487 | p_null_ck = &null_ck; |
| 1488 | } |
| 1489 | next_call_insn = fast_path ? NextSDCallInsn : NextDirectCallInsnSP; |
| 1490 | skip_this = false; |
| 1491 | } else if (info->type == kStatic) { |
| 1492 | next_call_insn = fast_path ? NextSDCallInsn : NextStaticCallInsnSP; |
| 1493 | skip_this = false; |
| 1494 | } else if (info->type == kSuper) { |
| 1495 | DCHECK(!fast_path); // Fast path is a direct call. |
| 1496 | next_call_insn = NextSuperCallInsnSP; |
| 1497 | skip_this = false; |
| 1498 | } else { |
| 1499 | DCHECK_EQ(info->type, kVirtual); |
| 1500 | next_call_insn = fast_path ? NextVCallInsn : NextVCallInsnSP; |
| 1501 | skip_this = fast_path; |
| 1502 | } |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1503 | MethodReference target_method = method_info.GetTargetMethod(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1504 | if (!info->is_range) { |
| 1505 | call_state = GenDalvikArgsNoRange(info, call_state, p_null_ck, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1506 | next_call_insn, target_method, method_info.VTableIndex(), |
| 1507 | method_info.DirectCode(), method_info.DirectMethod(), |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1508 | original_type, skip_this); |
| 1509 | } else { |
| 1510 | call_state = GenDalvikArgsRange(info, call_state, p_null_ck, |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1511 | next_call_insn, target_method, method_info.VTableIndex(), |
| 1512 | method_info.DirectCode(), method_info.DirectMethod(), |
| 1513 | original_type, skip_this); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1514 | } |
| 1515 | // Finish up any of the call sequence not interleaved in arg loading |
| 1516 | while (call_state >= 0) { |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1517 | call_state = next_call_insn(cu_, info, call_state, target_method, method_info.VTableIndex(), |
| 1518 | method_info.DirectCode(), method_info.DirectMethod(), original_type); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1519 | } |
| 1520 | LIR* call_inst; |
| 1521 | if (cu_->instruction_set != kX86) { |
| 1522 | call_inst = OpReg(kOpBlx, TargetReg(kInvokeTgt)); |
| 1523 | } else { |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1524 | if (fast_path) { |
Vladimir Marko | f096aad | 2014-01-23 15:51:58 +0000 | [diff] [blame] | 1525 | if (method_info.DirectCode() == static_cast<uintptr_t>(-1)) { |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1526 | // We can have the linker fixup a call relative. |
| 1527 | call_inst = |
Jeff Hao | 49161ce | 2014-03-12 11:05:25 -0700 | [diff] [blame] | 1528 | reinterpret_cast<X86Mir2Lir*>(this)->CallWithLinkerFixup(target_method, info->type); |
Mark Mendell | 55d0eac | 2014-02-06 11:02:52 -0800 | [diff] [blame] | 1529 | } else { |
| 1530 | call_inst = OpMem(kOpBlx, TargetReg(kArg0), |
| 1531 | mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset().Int32Value()); |
| 1532 | } |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1533 | } else { |
Ian Rogers | 848871b | 2013-08-05 10:56:33 -0700 | [diff] [blame] | 1534 | ThreadOffset trampoline(-1); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1535 | switch (info->type) { |
| 1536 | case kInterface: |
Jeff Hao | 88474b4 | 2013-10-23 16:24:40 -0700 | [diff] [blame] | 1537 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeInterfaceTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1538 | break; |
| 1539 | case kDirect: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1540 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeDirectTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1541 | break; |
| 1542 | case kStatic: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1543 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeStaticTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1544 | break; |
| 1545 | case kSuper: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1546 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeSuperTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1547 | break; |
| 1548 | case kVirtual: |
Ian Rogers | 7655f29 | 2013-07-29 11:07:13 -0700 | [diff] [blame] | 1549 | trampoline = QUICK_ENTRYPOINT_OFFSET(pInvokeVirtualTrampolineWithAccessCheck); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1550 | break; |
| 1551 | default: |
| 1552 | LOG(FATAL) << "Unexpected invoke type"; |
| 1553 | } |
| 1554 | call_inst = OpThreadMem(kOpBlx, trampoline); |
| 1555 | } |
| 1556 | } |
| 1557 | MarkSafepointPC(call_inst); |
| 1558 | |
Vladimir Marko | 31c2aac | 2013-12-09 16:31:19 +0000 | [diff] [blame] | 1559 | ClobberCallerSave(); |
Brian Carlstrom | 7940e44 | 2013-07-12 13:46:57 -0700 | [diff] [blame] | 1560 | if (info->result.location != kLocInvalid) { |
| 1561 | // We have a following MOVE_RESULT - do it now. |
| 1562 | if (info->result.wide) { |
| 1563 | RegLocation ret_loc = GetReturnWide(info->result.fp); |
| 1564 | StoreValueWide(info->result, ret_loc); |
| 1565 | } else { |
| 1566 | RegLocation ret_loc = GetReturn(info->result.fp); |
| 1567 | StoreValue(info->result, ret_loc); |
| 1568 | } |
| 1569 | } |
| 1570 | } |
| 1571 | |
| 1572 | } // namespace art |