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Serban Constantinescued8dd492014-02-11 14:15:10 +00001/*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Roland Levillain4d027112015-07-01 15:41:14 +010013 * See the License for the specific language governing permissions and
Serban Constantinescued8dd492014-02-11 14:15:10 +000014 * limitations under the License.
15 */
16
17#ifndef ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
18#define ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
19
Stuart Monteithb95a5342014-03-12 13:32:32 +000020#include <stdint.h>
Ian Rogers700a4022014-05-19 16:49:03 -070021#include <memory>
22#include <vector>
Serban Constantinescued8dd492014-02-11 14:15:10 +000023
Vladimir Marko93205e32016-04-13 11:59:46 +010024#include "base/arena_containers.h"
Andreas Gampe3b165bc2016-08-01 22:07:04 -070025#include "base/enums.h"
Serban Constantinescued8dd492014-02-11 14:15:10 +000026#include "base/logging.h"
Serban Constantinescued8dd492014-02-11 14:15:10 +000027#include "utils/arm64/managed_register_arm64.h"
28#include "utils/assembler.h"
Andreas Gampe3b165bc2016-08-01 22:07:04 -070029#include "utils/jni_macro_assembler.h"
Serban Constantinescued8dd492014-02-11 14:15:10 +000030#include "offsets.h"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080031
Scott Wakeling97c72b72016-06-24 16:19:36 +010032// TODO: make vixl clean wrt -Wshadow, -Wunknown-pragmas, -Wmissing-noreturn
Andreas Gampe277ccbd2014-11-03 21:36:10 -080033#pragma GCC diagnostic push
Andreas Gampe65b798e2015-04-06 09:35:22 -070034#pragma GCC diagnostic ignored "-Wunknown-pragmas"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080035#pragma GCC diagnostic ignored "-Wshadow"
Andreas Gampe65b798e2015-04-06 09:35:22 -070036#pragma GCC diagnostic ignored "-Wmissing-noreturn"
Scott Wakeling97c72b72016-06-24 16:19:36 +010037#include "a64/disasm-a64.h"
38#include "a64/macro-assembler-a64.h"
Andreas Gampe277ccbd2014-11-03 21:36:10 -080039#pragma GCC diagnostic pop
Serban Constantinescued8dd492014-02-11 14:15:10 +000040
41namespace art {
42namespace arm64 {
43
Scott Wakeling97c72b72016-06-24 16:19:36 +010044#define MEM_OP(...) vixl::aarch64::MemOperand(__VA_ARGS__)
Serban Constantinescued8dd492014-02-11 14:15:10 +000045
46enum LoadOperandType {
47 kLoadSignedByte,
48 kLoadUnsignedByte,
49 kLoadSignedHalfword,
50 kLoadUnsignedHalfword,
51 kLoadWord,
52 kLoadCoreWord,
53 kLoadSWord,
54 kLoadDWord
55};
56
57enum StoreOperandType {
58 kStoreByte,
59 kStoreHalfword,
60 kStoreWord,
61 kStoreCoreWord,
62 kStoreSWord,
63 kStoreDWord
64};
65
Alexandre Ramesc01a6642016-04-15 11:54:06 +010066class Arm64Exception {
67 private:
68 Arm64Exception(Arm64ManagedRegister scratch, size_t stack_adjust)
69 : scratch_(scratch), stack_adjust_(stack_adjust) {
70 }
71
Scott Wakeling97c72b72016-06-24 16:19:36 +010072 vixl::aarch64::Label* Entry() { return &exception_entry_; }
Alexandre Ramesc01a6642016-04-15 11:54:06 +010073
74 // Register used for passing Thread::Current()->exception_ .
75 const Arm64ManagedRegister scratch_;
76
77 // Stack adjust for ExceptionPool.
78 const size_t stack_adjust_;
79
Scott Wakeling97c72b72016-06-24 16:19:36 +010080 vixl::aarch64::Label exception_entry_;
Alexandre Ramesc01a6642016-04-15 11:54:06 +010081
82 friend class Arm64Assembler;
83 DISALLOW_COPY_AND_ASSIGN(Arm64Exception);
84};
Serban Constantinescued8dd492014-02-11 14:15:10 +000085
Andreas Gampe3b165bc2016-08-01 22:07:04 -070086class Arm64Assembler FINAL : public Assembler, public JNIMacroAssembler<PointerSize::k64> {
Serban Constantinescued8dd492014-02-11 14:15:10 +000087 public:
Vladimir Marko93205e32016-04-13 11:59:46 +010088 explicit Arm64Assembler(ArenaAllocator* arena)
89 : Assembler(arena),
Alexandre Rames087930f2016-08-02 13:45:28 +010090 exception_blocks_(arena->Adapter(kArenaAllocAssembler)) {}
Serban Constantinescued8dd492014-02-11 14:15:10 +000091
Alexandre Rames087930f2016-08-02 13:45:28 +010092 virtual ~Arm64Assembler() {}
93
94 vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return &vixl_masm_; }
Serban Constantinescued8dd492014-02-11 14:15:10 +000095
Andreas Gampe3b165bc2016-08-01 22:07:04 -070096 DebugFrameOpCodeWriterForAssembler& cfi() { return Assembler::cfi(); }
97
Vladimir Markocf93a5c2015-06-16 11:33:24 +000098 // Finalize the code.
99 void FinalizeCode() OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000100
101 // Size of generated code.
Alexandre Rameseb7b7392015-06-19 14:47:01 +0100102 size_t CodeSize() const OVERRIDE;
103 const uint8_t* CodeBufferBaseAddress() const OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000104
105 // Copy instructions out of assembly buffer into the given region of memory.
106 void FinalizeInstructions(const MemoryRegion& region);
107
Scott Wakeling97c72b72016-06-24 16:19:36 +0100108 void SpillRegisters(vixl::aarch64::CPURegList registers, int offset);
109 void UnspillRegisters(vixl::aarch64::CPURegList registers, int offset);
Zheng Xu69a50302015-04-14 20:04:41 +0800110
Serban Constantinescued8dd492014-02-11 14:15:10 +0000111 // Emit code that will create an activation on the stack.
Vladimir Marko32248382016-05-19 10:37:24 +0100112 void BuildFrame(size_t frame_size,
113 ManagedRegister method_reg,
114 ArrayRef<const ManagedRegister> callee_save_regs,
Ian Rogersdd7624d2014-03-14 17:43:00 -0700115 const ManagedRegisterEntrySpills& entry_spills) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000116
117 // Emit code that will remove an activation from the stack.
Vladimir Marko32248382016-05-19 10:37:24 +0100118 void RemoveFrame(size_t frame_size, ArrayRef<const ManagedRegister> callee_save_regs)
Ian Rogersdd7624d2014-03-14 17:43:00 -0700119 OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000120
Ian Rogersdd7624d2014-03-14 17:43:00 -0700121 void IncreaseFrameSize(size_t adjust) OVERRIDE;
122 void DecreaseFrameSize(size_t adjust) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000123
124 // Store routines.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700125 void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE;
126 void StoreRef(FrameOffset dest, ManagedRegister src) OVERRIDE;
127 void StoreRawPtr(FrameOffset dest, ManagedRegister src) OVERRIDE;
128 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE;
Andreas Gampe3b165bc2016-08-01 22:07:04 -0700129 void StoreStackOffsetToThread(ThreadOffset64 thr_offs,
130 FrameOffset fr_offs,
131 ManagedRegister scratch) OVERRIDE;
132 void StoreStackPointerToThread(ThreadOffset64 thr_offs) OVERRIDE;
Ian Rogersdd7624d2014-03-14 17:43:00 -0700133 void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off,
134 ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000135
136 // Load routines.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700137 void Load(ManagedRegister dest, FrameOffset src, size_t size) OVERRIDE;
Andreas Gampe3b165bc2016-08-01 22:07:04 -0700138 void LoadFromThread(ManagedRegister dest, ThreadOffset64 src, size_t size) OVERRIDE;
Mathieu Chartiere401d142015-04-22 13:56:20 -0700139 void LoadRef(ManagedRegister dest, FrameOffset src) OVERRIDE;
140 void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs,
Roland Levillain4d027112015-07-01 15:41:14 +0100141 bool unpoison_reference) OVERRIDE;
Ian Rogersdd7624d2014-03-14 17:43:00 -0700142 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
Andreas Gampe3b165bc2016-08-01 22:07:04 -0700143 void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset64 offs) OVERRIDE;
Ian Rogersdd7624d2014-03-14 17:43:00 -0700144
Serban Constantinescued8dd492014-02-11 14:15:10 +0000145 // Copying routines.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700146 void Move(ManagedRegister dest, ManagedRegister src, size_t size) OVERRIDE;
Andreas Gampe3b165bc2016-08-01 22:07:04 -0700147 void CopyRawPtrFromThread(FrameOffset fr_offs,
148 ThreadOffset64 thr_offs,
149 ManagedRegister scratch) OVERRIDE;
150 void CopyRawPtrToThread(ThreadOffset64 thr_offs, FrameOffset fr_offs, ManagedRegister scratch)
Ian Rogersdd7624d2014-03-14 17:43:00 -0700151 OVERRIDE;
152 void CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister scratch) OVERRIDE;
153 void Copy(FrameOffset dest, FrameOffset src, ManagedRegister scratch, size_t size) OVERRIDE;
154 void Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister scratch,
155 size_t size) OVERRIDE;
156 void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, ManagedRegister scratch,
157 size_t size) OVERRIDE;
158 void Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister scratch,
159 size_t size) OVERRIDE;
160 void Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset,
161 ManagedRegister scratch, size_t size) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000162 void Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset,
Ian Rogersdd7624d2014-03-14 17:43:00 -0700163 ManagedRegister scratch, size_t size) OVERRIDE;
164 void MemoryBarrier(ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000165
166 // Sign extension.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700167 void SignExtend(ManagedRegister mreg, size_t size) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000168
169 // Zero extension.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700170 void ZeroExtend(ManagedRegister mreg, size_t size) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000171
172 // Exploit fast access in managed code to Thread::Current().
Ian Rogersdd7624d2014-03-14 17:43:00 -0700173 void GetCurrentThread(ManagedRegister tr) OVERRIDE;
174 void GetCurrentThread(FrameOffset dest_offset, ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000175
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700176 // Set up out_reg to hold a Object** into the handle scope, or to be null if the
Serban Constantinescued8dd492014-02-11 14:15:10 +0000177 // value is null and null_allowed. in_reg holds a possibly stale reference
Mathieu Chartiereb8167a2014-05-07 15:43:14 -0700178 // that can be used to avoid loading the handle scope entry to see if the value is
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700179 // null.
Scott Wakeling97c72b72016-06-24 16:19:36 +0100180 void CreateHandleScopeEntry(ManagedRegister out_reg,
181 FrameOffset handlescope_offset,
182 ManagedRegister in_reg,
183 bool null_allowed) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000184
Mathieu Chartier2cebb242015-04-21 16:50:40 -0700185 // Set up out_off to hold a Object** into the handle scope, or to be null if the
Serban Constantinescued8dd492014-02-11 14:15:10 +0000186 // value is null and null_allowed.
Scott Wakeling97c72b72016-06-24 16:19:36 +0100187 void CreateHandleScopeEntry(FrameOffset out_off,
188 FrameOffset handlescope_offset,
189 ManagedRegister scratch,
190 bool null_allowed) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000191
Mathieu Chartiereb8167a2014-05-07 15:43:14 -0700192 // src holds a handle scope entry (Object**) load this into dst.
193 void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000194
195 // Heap::VerifyObject on src. In some cases (such as a reference to this) we
196 // know that src may not be null.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700197 void VerifyObject(ManagedRegister src, bool could_be_null) OVERRIDE;
198 void VerifyObject(FrameOffset src, bool could_be_null) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000199
200 // Call to address held at [base+offset].
Ian Rogersdd7624d2014-03-14 17:43:00 -0700201 void Call(ManagedRegister base, Offset offset, ManagedRegister scratch) OVERRIDE;
202 void Call(FrameOffset base, Offset offset, ManagedRegister scratch) OVERRIDE;
Andreas Gampe3b165bc2016-08-01 22:07:04 -0700203 void CallFromThread(ThreadOffset64 offset, ManagedRegister scratch) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000204
Andreas Gampec6ee54e2014-03-24 16:45:44 -0700205 // Jump to address (not setting link register)
206 void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch);
207
Serban Constantinescued8dd492014-02-11 14:15:10 +0000208 // Generate code to check if Thread::Current()->exception_ is non-null
209 // and branch to a ExceptionSlowPath if it is.
Ian Rogersdd7624d2014-03-14 17:43:00 -0700210 void ExceptionPoll(ManagedRegister scratch, size_t stack_adjust) OVERRIDE;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000211
Roland Levillain4d027112015-07-01 15:41:14 +0100212 //
213 // Heap poisoning.
214 //
215
216 // Poison a heap reference contained in `reg`.
Scott Wakeling97c72b72016-06-24 16:19:36 +0100217 void PoisonHeapReference(vixl::aarch64::Register reg);
Roland Levillain4d027112015-07-01 15:41:14 +0100218 // Unpoison a heap reference contained in `reg`.
Scott Wakeling97c72b72016-06-24 16:19:36 +0100219 void UnpoisonHeapReference(vixl::aarch64::Register reg);
Roland Levillain4d027112015-07-01 15:41:14 +0100220 // Unpoison a heap reference contained in `reg` if heap poisoning is enabled.
Scott Wakeling97c72b72016-06-24 16:19:36 +0100221 void MaybeUnpoisonHeapReference(vixl::aarch64::Register reg);
Roland Levillain4d027112015-07-01 15:41:14 +0100222
Andreas Gampe85b62f22015-09-09 13:15:38 -0700223 void Bind(Label* label ATTRIBUTE_UNUSED) OVERRIDE {
224 UNIMPLEMENTED(FATAL) << "Do not use Bind for ARM64";
225 }
226 void Jump(Label* label ATTRIBUTE_UNUSED) OVERRIDE {
227 UNIMPLEMENTED(FATAL) << "Do not use Jump for ARM64";
228 }
229
Serban Constantinescued8dd492014-02-11 14:15:10 +0000230 private:
Scott Wakeling97c72b72016-06-24 16:19:36 +0100231 static vixl::aarch64::Register reg_x(int code) {
Alexandre Rames37c92df2014-10-17 14:35:27 +0100232 CHECK(code < kNumberOfXRegisters) << code;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000233 if (code == SP) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100234 return vixl::aarch64::sp;
Serban Constantinescu15523732014-04-02 13:18:05 +0100235 } else if (code == XZR) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100236 return vixl::aarch64::xzr;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000237 }
Scott Wakeling97c72b72016-06-24 16:19:36 +0100238 return vixl::aarch64::Register::GetXRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000239 }
240
Scott Wakeling97c72b72016-06-24 16:19:36 +0100241 static vixl::aarch64::Register reg_w(int code) {
Alexandre Rames37c92df2014-10-17 14:35:27 +0100242 CHECK(code < kNumberOfWRegisters) << code;
Alexandre Ramesa304f972014-10-17 14:35:27 +0100243 if (code == WSP) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100244 return vixl::aarch64::wsp;
Alexandre Ramesa304f972014-10-17 14:35:27 +0100245 } else if (code == WZR) {
Scott Wakeling97c72b72016-06-24 16:19:36 +0100246 return vixl::aarch64::wzr;
Alexandre Ramesa304f972014-10-17 14:35:27 +0100247 }
Scott Wakeling97c72b72016-06-24 16:19:36 +0100248 return vixl::aarch64::Register::GetWRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000249 }
250
Scott Wakeling97c72b72016-06-24 16:19:36 +0100251 static vixl::aarch64::FPRegister reg_d(int code) {
252 return vixl::aarch64::FPRegister::GetDRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000253 }
254
Scott Wakeling97c72b72016-06-24 16:19:36 +0100255 static vixl::aarch64::FPRegister reg_s(int code) {
256 return vixl::aarch64::FPRegister::GetSRegFromCode(code);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000257 }
258
259 // Emits Exception block.
260 void EmitExceptionPoll(Arm64Exception *exception);
261
262 void StoreWToOffset(StoreOperandType type, WRegister source,
Alexandre Rames37c92df2014-10-17 14:35:27 +0100263 XRegister base, int32_t offset);
264 void StoreToOffset(XRegister source, XRegister base, int32_t offset);
265 void StoreSToOffset(SRegister source, XRegister base, int32_t offset);
266 void StoreDToOffset(DRegister source, XRegister base, int32_t offset);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000267
Scott Wakeling97c72b72016-06-24 16:19:36 +0100268 void LoadImmediate(XRegister dest,
269 int32_t value,
270 vixl::aarch64::Condition cond = vixl::aarch64::al);
Alexandre Rames37c92df2014-10-17 14:35:27 +0100271 void Load(Arm64ManagedRegister dst, XRegister src, int32_t src_offset, size_t size);
Scott Wakeling97c72b72016-06-24 16:19:36 +0100272 void LoadWFromOffset(LoadOperandType type,
273 WRegister dest,
274 XRegister base,
275 int32_t offset);
Alexandre Rames37c92df2014-10-17 14:35:27 +0100276 void LoadFromOffset(XRegister dest, XRegister base, int32_t offset);
277 void LoadSFromOffset(SRegister dest, XRegister base, int32_t offset);
278 void LoadDFromOffset(DRegister dest, XRegister base, int32_t offset);
Scott Wakeling97c72b72016-06-24 16:19:36 +0100279 void AddConstant(XRegister rd,
280 int32_t value,
281 vixl::aarch64::Condition cond = vixl::aarch64::al);
282 void AddConstant(XRegister rd,
283 XRegister rn,
284 int32_t value,
285 vixl::aarch64::Condition cond = vixl::aarch64::al);
Serban Constantinescued8dd492014-02-11 14:15:10 +0000286
Serban Constantinescued8dd492014-02-11 14:15:10 +0000287 // List of exception blocks to generate at the end of the code cache.
Alexandre Ramesc01a6642016-04-15 11:54:06 +0100288 ArenaVector<std::unique_ptr<Arm64Exception>> exception_blocks_;
Serban Constantinescu15523732014-04-02 13:18:05 +0100289
Alexandre Rames087930f2016-08-02 13:45:28 +0100290 // VIXL assembler.
291 vixl::aarch64::MacroAssembler vixl_masm_;
Alexandre Rames5319def2014-10-23 10:03:10 +0100292
Serban Constantinescu15523732014-04-02 13:18:05 +0100293 // Used for testing.
294 friend class Arm64ManagedRegister_VixlRegisters_Test;
Serban Constantinescued8dd492014-02-11 14:15:10 +0000295};
296
Serban Constantinescued8dd492014-02-11 14:15:10 +0000297} // namespace arm64
298} // namespace art
299
300#endif // ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_