Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 13 | * See the License for the specific language governing permissions and |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_ |
| 18 | #define ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_ |
| 19 | |
Stuart Monteith | b95a534 | 2014-03-12 13:32:32 +0000 | [diff] [blame] | 20 | #include <stdint.h> |
Ian Rogers | 700a402 | 2014-05-19 16:49:03 -0700 | [diff] [blame] | 21 | #include <memory> |
| 22 | #include <vector> |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 23 | |
Vladimir Marko | 93205e3 | 2016-04-13 11:59:46 +0100 | [diff] [blame] | 24 | #include "base/arena_containers.h" |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 25 | #include "base/enums.h" |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 26 | #include "base/logging.h" |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 27 | #include "utils/arm64/managed_register_arm64.h" |
| 28 | #include "utils/assembler.h" |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 29 | #include "utils/jni_macro_assembler.h" |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 30 | #include "offsets.h" |
Andreas Gampe | 277ccbd | 2014-11-03 21:36:10 -0800 | [diff] [blame] | 31 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 32 | // TODO: make vixl clean wrt -Wshadow, -Wunknown-pragmas, -Wmissing-noreturn |
Andreas Gampe | 277ccbd | 2014-11-03 21:36:10 -0800 | [diff] [blame] | 33 | #pragma GCC diagnostic push |
Andreas Gampe | 65b798e | 2015-04-06 09:35:22 -0700 | [diff] [blame] | 34 | #pragma GCC diagnostic ignored "-Wunknown-pragmas" |
Andreas Gampe | 277ccbd | 2014-11-03 21:36:10 -0800 | [diff] [blame] | 35 | #pragma GCC diagnostic ignored "-Wshadow" |
Andreas Gampe | 65b798e | 2015-04-06 09:35:22 -0700 | [diff] [blame] | 36 | #pragma GCC diagnostic ignored "-Wmissing-noreturn" |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 37 | #include "a64/disasm-a64.h" |
| 38 | #include "a64/macro-assembler-a64.h" |
Andreas Gampe | 277ccbd | 2014-11-03 21:36:10 -0800 | [diff] [blame] | 39 | #pragma GCC diagnostic pop |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 40 | |
| 41 | namespace art { |
| 42 | namespace arm64 { |
| 43 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 44 | #define MEM_OP(...) vixl::aarch64::MemOperand(__VA_ARGS__) |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 45 | |
| 46 | enum LoadOperandType { |
| 47 | kLoadSignedByte, |
| 48 | kLoadUnsignedByte, |
| 49 | kLoadSignedHalfword, |
| 50 | kLoadUnsignedHalfword, |
| 51 | kLoadWord, |
| 52 | kLoadCoreWord, |
| 53 | kLoadSWord, |
| 54 | kLoadDWord |
| 55 | }; |
| 56 | |
| 57 | enum StoreOperandType { |
| 58 | kStoreByte, |
| 59 | kStoreHalfword, |
| 60 | kStoreWord, |
| 61 | kStoreCoreWord, |
| 62 | kStoreSWord, |
| 63 | kStoreDWord |
| 64 | }; |
| 65 | |
Alexandre Rames | c01a664 | 2016-04-15 11:54:06 +0100 | [diff] [blame] | 66 | class Arm64Exception { |
| 67 | private: |
| 68 | Arm64Exception(Arm64ManagedRegister scratch, size_t stack_adjust) |
| 69 | : scratch_(scratch), stack_adjust_(stack_adjust) { |
| 70 | } |
| 71 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 72 | vixl::aarch64::Label* Entry() { return &exception_entry_; } |
Alexandre Rames | c01a664 | 2016-04-15 11:54:06 +0100 | [diff] [blame] | 73 | |
| 74 | // Register used for passing Thread::Current()->exception_ . |
| 75 | const Arm64ManagedRegister scratch_; |
| 76 | |
| 77 | // Stack adjust for ExceptionPool. |
| 78 | const size_t stack_adjust_; |
| 79 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 80 | vixl::aarch64::Label exception_entry_; |
Alexandre Rames | c01a664 | 2016-04-15 11:54:06 +0100 | [diff] [blame] | 81 | |
| 82 | friend class Arm64Assembler; |
| 83 | DISALLOW_COPY_AND_ASSIGN(Arm64Exception); |
| 84 | }; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 85 | |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 86 | class Arm64Assembler FINAL : public Assembler, public JNIMacroAssembler<PointerSize::k64> { |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 87 | public: |
Vladimir Marko | 93205e3 | 2016-04-13 11:59:46 +0100 | [diff] [blame] | 88 | explicit Arm64Assembler(ArenaAllocator* arena) |
| 89 | : Assembler(arena), |
Alexandre Rames | 087930f | 2016-08-02 13:45:28 +0100 | [diff] [blame] | 90 | exception_blocks_(arena->Adapter(kArenaAllocAssembler)) {} |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 91 | |
Alexandre Rames | 087930f | 2016-08-02 13:45:28 +0100 | [diff] [blame] | 92 | virtual ~Arm64Assembler() {} |
| 93 | |
| 94 | vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return &vixl_masm_; } |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 95 | |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 96 | DebugFrameOpCodeWriterForAssembler& cfi() { return Assembler::cfi(); } |
| 97 | |
Vladimir Marko | cf93a5c | 2015-06-16 11:33:24 +0000 | [diff] [blame] | 98 | // Finalize the code. |
| 99 | void FinalizeCode() OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 100 | |
| 101 | // Size of generated code. |
Alexandre Rames | eb7b739 | 2015-06-19 14:47:01 +0100 | [diff] [blame] | 102 | size_t CodeSize() const OVERRIDE; |
| 103 | const uint8_t* CodeBufferBaseAddress() const OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 104 | |
| 105 | // Copy instructions out of assembly buffer into the given region of memory. |
| 106 | void FinalizeInstructions(const MemoryRegion& region); |
| 107 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 108 | void SpillRegisters(vixl::aarch64::CPURegList registers, int offset); |
| 109 | void UnspillRegisters(vixl::aarch64::CPURegList registers, int offset); |
Zheng Xu | 69a5030 | 2015-04-14 20:04:41 +0800 | [diff] [blame] | 110 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 111 | // Emit code that will create an activation on the stack. |
Vladimir Marko | 3224838 | 2016-05-19 10:37:24 +0100 | [diff] [blame] | 112 | void BuildFrame(size_t frame_size, |
| 113 | ManagedRegister method_reg, |
| 114 | ArrayRef<const ManagedRegister> callee_save_regs, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 115 | const ManagedRegisterEntrySpills& entry_spills) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 116 | |
| 117 | // Emit code that will remove an activation from the stack. |
Vladimir Marko | 3224838 | 2016-05-19 10:37:24 +0100 | [diff] [blame] | 118 | void RemoveFrame(size_t frame_size, ArrayRef<const ManagedRegister> callee_save_regs) |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 119 | OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 120 | |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 121 | void IncreaseFrameSize(size_t adjust) OVERRIDE; |
| 122 | void DecreaseFrameSize(size_t adjust) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 123 | |
| 124 | // Store routines. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 125 | void Store(FrameOffset offs, ManagedRegister src, size_t size) OVERRIDE; |
| 126 | void StoreRef(FrameOffset dest, ManagedRegister src) OVERRIDE; |
| 127 | void StoreRawPtr(FrameOffset dest, ManagedRegister src) OVERRIDE; |
| 128 | void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE; |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 129 | void StoreStackOffsetToThread(ThreadOffset64 thr_offs, |
| 130 | FrameOffset fr_offs, |
| 131 | ManagedRegister scratch) OVERRIDE; |
| 132 | void StoreStackPointerToThread(ThreadOffset64 thr_offs) OVERRIDE; |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 133 | void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off, |
| 134 | ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 135 | |
| 136 | // Load routines. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 137 | void Load(ManagedRegister dest, FrameOffset src, size_t size) OVERRIDE; |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 138 | void LoadFromThread(ManagedRegister dest, ThreadOffset64 src, size_t size) OVERRIDE; |
Mathieu Chartier | e401d14 | 2015-04-22 13:56:20 -0700 | [diff] [blame] | 139 | void LoadRef(ManagedRegister dest, FrameOffset src) OVERRIDE; |
| 140 | void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs, |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 141 | bool unpoison_reference) OVERRIDE; |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 142 | void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE; |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 143 | void LoadRawPtrFromThread(ManagedRegister dest, ThreadOffset64 offs) OVERRIDE; |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 144 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 145 | // Copying routines. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 146 | void Move(ManagedRegister dest, ManagedRegister src, size_t size) OVERRIDE; |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 147 | void CopyRawPtrFromThread(FrameOffset fr_offs, |
| 148 | ThreadOffset64 thr_offs, |
| 149 | ManagedRegister scratch) OVERRIDE; |
| 150 | void CopyRawPtrToThread(ThreadOffset64 thr_offs, FrameOffset fr_offs, ManagedRegister scratch) |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 151 | OVERRIDE; |
| 152 | void CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister scratch) OVERRIDE; |
| 153 | void Copy(FrameOffset dest, FrameOffset src, ManagedRegister scratch, size_t size) OVERRIDE; |
| 154 | void Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister scratch, |
| 155 | size_t size) OVERRIDE; |
| 156 | void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, ManagedRegister scratch, |
| 157 | size_t size) OVERRIDE; |
| 158 | void Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister scratch, |
| 159 | size_t size) OVERRIDE; |
| 160 | void Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, |
| 161 | ManagedRegister scratch, size_t size) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 162 | void Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset, |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 163 | ManagedRegister scratch, size_t size) OVERRIDE; |
| 164 | void MemoryBarrier(ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 165 | |
| 166 | // Sign extension. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 167 | void SignExtend(ManagedRegister mreg, size_t size) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 168 | |
| 169 | // Zero extension. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 170 | void ZeroExtend(ManagedRegister mreg, size_t size) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 171 | |
| 172 | // Exploit fast access in managed code to Thread::Current(). |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 173 | void GetCurrentThread(ManagedRegister tr) OVERRIDE; |
| 174 | void GetCurrentThread(FrameOffset dest_offset, ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 175 | |
Mathieu Chartier | 2cebb24 | 2015-04-21 16:50:40 -0700 | [diff] [blame] | 176 | // Set up out_reg to hold a Object** into the handle scope, or to be null if the |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 177 | // value is null and null_allowed. in_reg holds a possibly stale reference |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 178 | // that can be used to avoid loading the handle scope entry to see if the value is |
Mathieu Chartier | 2cebb24 | 2015-04-21 16:50:40 -0700 | [diff] [blame] | 179 | // null. |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 180 | void CreateHandleScopeEntry(ManagedRegister out_reg, |
| 181 | FrameOffset handlescope_offset, |
| 182 | ManagedRegister in_reg, |
| 183 | bool null_allowed) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 184 | |
Mathieu Chartier | 2cebb24 | 2015-04-21 16:50:40 -0700 | [diff] [blame] | 185 | // Set up out_off to hold a Object** into the handle scope, or to be null if the |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 186 | // value is null and null_allowed. |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 187 | void CreateHandleScopeEntry(FrameOffset out_off, |
| 188 | FrameOffset handlescope_offset, |
| 189 | ManagedRegister scratch, |
| 190 | bool null_allowed) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 191 | |
Mathieu Chartier | eb8167a | 2014-05-07 15:43:14 -0700 | [diff] [blame] | 192 | // src holds a handle scope entry (Object**) load this into dst. |
| 193 | void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 194 | |
| 195 | // Heap::VerifyObject on src. In some cases (such as a reference to this) we |
| 196 | // know that src may not be null. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 197 | void VerifyObject(ManagedRegister src, bool could_be_null) OVERRIDE; |
| 198 | void VerifyObject(FrameOffset src, bool could_be_null) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 199 | |
| 200 | // Call to address held at [base+offset]. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 201 | void Call(ManagedRegister base, Offset offset, ManagedRegister scratch) OVERRIDE; |
| 202 | void Call(FrameOffset base, Offset offset, ManagedRegister scratch) OVERRIDE; |
Andreas Gampe | 3b165bc | 2016-08-01 22:07:04 -0700 | [diff] [blame] | 203 | void CallFromThread(ThreadOffset64 offset, ManagedRegister scratch) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 204 | |
Andreas Gampe | c6ee54e | 2014-03-24 16:45:44 -0700 | [diff] [blame] | 205 | // Jump to address (not setting link register) |
| 206 | void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch); |
| 207 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 208 | // Generate code to check if Thread::Current()->exception_ is non-null |
| 209 | // and branch to a ExceptionSlowPath if it is. |
Ian Rogers | dd7624d | 2014-03-14 17:43:00 -0700 | [diff] [blame] | 210 | void ExceptionPoll(ManagedRegister scratch, size_t stack_adjust) OVERRIDE; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 211 | |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 212 | // |
| 213 | // Heap poisoning. |
| 214 | // |
| 215 | |
| 216 | // Poison a heap reference contained in `reg`. |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 217 | void PoisonHeapReference(vixl::aarch64::Register reg); |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 218 | // Unpoison a heap reference contained in `reg`. |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 219 | void UnpoisonHeapReference(vixl::aarch64::Register reg); |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 220 | // Unpoison a heap reference contained in `reg` if heap poisoning is enabled. |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 221 | void MaybeUnpoisonHeapReference(vixl::aarch64::Register reg); |
Roland Levillain | 4d02711 | 2015-07-01 15:41:14 +0100 | [diff] [blame] | 222 | |
Andreas Gampe | 85b62f2 | 2015-09-09 13:15:38 -0700 | [diff] [blame] | 223 | void Bind(Label* label ATTRIBUTE_UNUSED) OVERRIDE { |
| 224 | UNIMPLEMENTED(FATAL) << "Do not use Bind for ARM64"; |
| 225 | } |
| 226 | void Jump(Label* label ATTRIBUTE_UNUSED) OVERRIDE { |
| 227 | UNIMPLEMENTED(FATAL) << "Do not use Jump for ARM64"; |
| 228 | } |
| 229 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 230 | private: |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 231 | static vixl::aarch64::Register reg_x(int code) { |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 232 | CHECK(code < kNumberOfXRegisters) << code; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 233 | if (code == SP) { |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 234 | return vixl::aarch64::sp; |
Serban Constantinescu | 1552373 | 2014-04-02 13:18:05 +0100 | [diff] [blame] | 235 | } else if (code == XZR) { |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 236 | return vixl::aarch64::xzr; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 237 | } |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 238 | return vixl::aarch64::Register::GetXRegFromCode(code); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 239 | } |
| 240 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 241 | static vixl::aarch64::Register reg_w(int code) { |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 242 | CHECK(code < kNumberOfWRegisters) << code; |
Alexandre Rames | a304f97 | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 243 | if (code == WSP) { |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 244 | return vixl::aarch64::wsp; |
Alexandre Rames | a304f97 | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 245 | } else if (code == WZR) { |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 246 | return vixl::aarch64::wzr; |
Alexandre Rames | a304f97 | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 247 | } |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 248 | return vixl::aarch64::Register::GetWRegFromCode(code); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 249 | } |
| 250 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 251 | static vixl::aarch64::FPRegister reg_d(int code) { |
| 252 | return vixl::aarch64::FPRegister::GetDRegFromCode(code); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 253 | } |
| 254 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 255 | static vixl::aarch64::FPRegister reg_s(int code) { |
| 256 | return vixl::aarch64::FPRegister::GetSRegFromCode(code); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 257 | } |
| 258 | |
| 259 | // Emits Exception block. |
| 260 | void EmitExceptionPoll(Arm64Exception *exception); |
| 261 | |
| 262 | void StoreWToOffset(StoreOperandType type, WRegister source, |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 263 | XRegister base, int32_t offset); |
| 264 | void StoreToOffset(XRegister source, XRegister base, int32_t offset); |
| 265 | void StoreSToOffset(SRegister source, XRegister base, int32_t offset); |
| 266 | void StoreDToOffset(DRegister source, XRegister base, int32_t offset); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 267 | |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 268 | void LoadImmediate(XRegister dest, |
| 269 | int32_t value, |
| 270 | vixl::aarch64::Condition cond = vixl::aarch64::al); |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 271 | void Load(Arm64ManagedRegister dst, XRegister src, int32_t src_offset, size_t size); |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 272 | void LoadWFromOffset(LoadOperandType type, |
| 273 | WRegister dest, |
| 274 | XRegister base, |
| 275 | int32_t offset); |
Alexandre Rames | 37c92df | 2014-10-17 14:35:27 +0100 | [diff] [blame] | 276 | void LoadFromOffset(XRegister dest, XRegister base, int32_t offset); |
| 277 | void LoadSFromOffset(SRegister dest, XRegister base, int32_t offset); |
| 278 | void LoadDFromOffset(DRegister dest, XRegister base, int32_t offset); |
Scott Wakeling | 97c72b7 | 2016-06-24 16:19:36 +0100 | [diff] [blame] | 279 | void AddConstant(XRegister rd, |
| 280 | int32_t value, |
| 281 | vixl::aarch64::Condition cond = vixl::aarch64::al); |
| 282 | void AddConstant(XRegister rd, |
| 283 | XRegister rn, |
| 284 | int32_t value, |
| 285 | vixl::aarch64::Condition cond = vixl::aarch64::al); |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 286 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 287 | // List of exception blocks to generate at the end of the code cache. |
Alexandre Rames | c01a664 | 2016-04-15 11:54:06 +0100 | [diff] [blame] | 288 | ArenaVector<std::unique_ptr<Arm64Exception>> exception_blocks_; |
Serban Constantinescu | 1552373 | 2014-04-02 13:18:05 +0100 | [diff] [blame] | 289 | |
Alexandre Rames | 087930f | 2016-08-02 13:45:28 +0100 | [diff] [blame] | 290 | // VIXL assembler. |
| 291 | vixl::aarch64::MacroAssembler vixl_masm_; |
Alexandre Rames | 5319def | 2014-10-23 10:03:10 +0100 | [diff] [blame] | 292 | |
Serban Constantinescu | 1552373 | 2014-04-02 13:18:05 +0100 | [diff] [blame] | 293 | // Used for testing. |
| 294 | friend class Arm64ManagedRegister_VixlRegisters_Test; |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 295 | }; |
| 296 | |
Serban Constantinescu | ed8dd49 | 2014-02-11 14:15:10 +0000 | [diff] [blame] | 297 | } // namespace arm64 |
| 298 | } // namespace art |
| 299 | |
| 300 | #endif // ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_ |