blob: 19a3eb963461500f277da2baf5c1d69b94af9ad7 [file] [log] [blame]
Anton Kirilov5ec62182016-10-13 20:16:02 +01001/*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include "intrinsics_arm_vixl.h"
18
19#include "arch/arm/instruction_set_features_arm.h"
Andreas Gampec6ea7d02017-02-01 16:46:28 -080020#include "art_method.h"
Anton Kirilov5ec62182016-10-13 20:16:02 +010021#include "code_generator_arm_vixl.h"
22#include "common_arm.h"
23#include "lock_word.h"
24#include "mirror/array-inl.h"
Andreas Gampec15a2f42017-04-21 12:09:39 -070025#include "mirror/object_array-inl.h"
Andreas Gampec6ea7d02017-02-01 16:46:28 -080026#include "mirror/reference.h"
27#include "mirror/string.h"
28#include "scoped_thread_state_change-inl.h"
Andreas Gampeb486a982017-06-01 13:45:54 -070029#include "thread-current-inl.h"
Anton Kirilov5ec62182016-10-13 20:16:02 +010030
31#include "aarch32/constants-aarch32.h"
32
33namespace art {
34namespace arm {
35
36#define __ assembler->GetVIXLAssembler()->
37
38using helpers::DRegisterFrom;
39using helpers::HighRegisterFrom;
40using helpers::InputDRegisterAt;
41using helpers::InputRegisterAt;
42using helpers::InputSRegisterAt;
43using helpers::InputVRegisterAt;
44using helpers::Int32ConstantFrom;
45using helpers::LocationFrom;
46using helpers::LowRegisterFrom;
47using helpers::LowSRegisterFrom;
xueliang.zhong53463ba2017-02-16 15:18:03 +000048using helpers::HighSRegisterFrom;
Anton Kirilov5ec62182016-10-13 20:16:02 +010049using helpers::OutputDRegister;
xueliang.zhongc032e742016-03-28 16:44:32 +010050using helpers::OutputSRegister;
Anton Kirilov5ec62182016-10-13 20:16:02 +010051using helpers::OutputRegister;
52using helpers::OutputVRegister;
53using helpers::RegisterFrom;
54using helpers::SRegisterFrom;
xueliang.zhongc032e742016-03-28 16:44:32 +010055using helpers::DRegisterFromS;
Anton Kirilov5ec62182016-10-13 20:16:02 +010056
57using namespace vixl::aarch32; // NOLINT(build/namespaces)
58
Artem Serov0fb37192016-12-06 18:13:40 +000059using vixl::ExactAssemblyScope;
60using vixl::CodeBufferCheckScope;
61
Anton Kirilov5ec62182016-10-13 20:16:02 +010062ArmVIXLAssembler* IntrinsicCodeGeneratorARMVIXL::GetAssembler() {
63 return codegen_->GetAssembler();
64}
65
66ArenaAllocator* IntrinsicCodeGeneratorARMVIXL::GetAllocator() {
67 return codegen_->GetGraph()->GetArena();
68}
69
70// Default slow-path for fallback (calling the managed code to handle the intrinsic) in an
71// intrinsified call. This will copy the arguments into the positions for a regular call.
72//
73// Note: The actual parameters are required to be in the locations given by the invoke's location
74// summary. If an intrinsic modifies those locations before a slowpath call, they must be
75// restored!
76//
77// Note: If an invoke wasn't sharpened, we will put down an invoke-virtual here. That's potentially
78// sub-optimal (compared to a direct pointer call), but this is a slow-path.
79
80class IntrinsicSlowPathARMVIXL : public SlowPathCodeARMVIXL {
81 public:
82 explicit IntrinsicSlowPathARMVIXL(HInvoke* invoke)
83 : SlowPathCodeARMVIXL(invoke), invoke_(invoke) {}
84
85 Location MoveArguments(CodeGenerator* codegen) {
Artem Serovd4cc5b22016-11-04 11:19:09 +000086 InvokeDexCallingConventionVisitorARMVIXL calling_convention_visitor;
Anton Kirilov5ec62182016-10-13 20:16:02 +010087 IntrinsicVisitor::MoveArguments(invoke_, codegen, &calling_convention_visitor);
88 return calling_convention_visitor.GetMethodLocation();
89 }
90
91 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
92 ArmVIXLAssembler* assembler = down_cast<ArmVIXLAssembler*>(codegen->GetAssembler());
93 __ Bind(GetEntryLabel());
94
95 SaveLiveRegisters(codegen, invoke_->GetLocations());
96
97 Location method_loc = MoveArguments(codegen);
98
99 if (invoke_->IsInvokeStaticOrDirect()) {
100 codegen->GenerateStaticOrDirectCall(invoke_->AsInvokeStaticOrDirect(), method_loc);
101 } else {
102 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), method_loc);
103 }
104 codegen->RecordPcInfo(invoke_, invoke_->GetDexPc(), this);
105
106 // Copy the result back to the expected output.
107 Location out = invoke_->GetLocations()->Out();
108 if (out.IsValid()) {
109 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory.
110 DCHECK(!invoke_->GetLocations()->GetLiveRegisters()->ContainsCoreRegister(out.reg()));
111 codegen->MoveFromReturnRegister(out, invoke_->GetType());
112 }
113
114 RestoreLiveRegisters(codegen, invoke_->GetLocations());
115 __ B(GetExitLabel());
116 }
117
118 const char* GetDescription() const OVERRIDE { return "IntrinsicSlowPath"; }
119
120 private:
121 // The instruction where this slow path is happening.
122 HInvoke* const invoke_;
123
124 DISALLOW_COPY_AND_ASSIGN(IntrinsicSlowPathARMVIXL);
125};
126
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000127// Compute base address for the System.arraycopy intrinsic in `base`.
128static void GenSystemArrayCopyBaseAddress(ArmVIXLAssembler* assembler,
129 Primitive::Type type,
130 const vixl32::Register& array,
131 const Location& pos,
132 const vixl32::Register& base) {
133 // This routine is only used by the SystemArrayCopy intrinsic at the
134 // moment. We can allow Primitive::kPrimNot as `type` to implement
135 // the SystemArrayCopyChar intrinsic.
136 DCHECK_EQ(type, Primitive::kPrimNot);
137 const int32_t element_size = Primitive::ComponentSize(type);
138 const uint32_t element_size_shift = Primitive::ComponentSizeShift(type);
139 const uint32_t data_offset = mirror::Array::DataOffset(element_size).Uint32Value();
140
141 if (pos.IsConstant()) {
142 int32_t constant = Int32ConstantFrom(pos);
143 __ Add(base, array, element_size * constant + data_offset);
144 } else {
145 __ Add(base, array, Operand(RegisterFrom(pos), vixl32::LSL, element_size_shift));
146 __ Add(base, base, data_offset);
147 }
148}
149
150// Compute end address for the System.arraycopy intrinsic in `end`.
151static void GenSystemArrayCopyEndAddress(ArmVIXLAssembler* assembler,
152 Primitive::Type type,
153 const Location& copy_length,
154 const vixl32::Register& base,
155 const vixl32::Register& end) {
156 // This routine is only used by the SystemArrayCopy intrinsic at the
157 // moment. We can allow Primitive::kPrimNot as `type` to implement
158 // the SystemArrayCopyChar intrinsic.
159 DCHECK_EQ(type, Primitive::kPrimNot);
160 const int32_t element_size = Primitive::ComponentSize(type);
161 const uint32_t element_size_shift = Primitive::ComponentSizeShift(type);
162
163 if (copy_length.IsConstant()) {
164 int32_t constant = Int32ConstantFrom(copy_length);
165 __ Add(end, base, element_size * constant);
166 } else {
167 __ Add(end, base, Operand(RegisterFrom(copy_length), vixl32::LSL, element_size_shift));
168 }
169}
170
Anton Kirilov5ec62182016-10-13 20:16:02 +0100171// Slow path implementing the SystemArrayCopy intrinsic copy loop with read barriers.
172class ReadBarrierSystemArrayCopySlowPathARMVIXL : public SlowPathCodeARMVIXL {
173 public:
174 explicit ReadBarrierSystemArrayCopySlowPathARMVIXL(HInstruction* instruction)
175 : SlowPathCodeARMVIXL(instruction) {
176 DCHECK(kEmitCompilerReadBarrier);
177 DCHECK(kUseBakerReadBarrier);
178 }
179
180 void EmitNativeCode(CodeGenerator* codegen) OVERRIDE {
181 CodeGeneratorARMVIXL* arm_codegen = down_cast<CodeGeneratorARMVIXL*>(codegen);
182 ArmVIXLAssembler* assembler = arm_codegen->GetAssembler();
183 LocationSummary* locations = instruction_->GetLocations();
184 DCHECK(locations->CanCall());
185 DCHECK(instruction_->IsInvokeStaticOrDirect())
186 << "Unexpected instruction in read barrier arraycopy slow path: "
187 << instruction_->DebugName();
188 DCHECK(instruction_->GetLocations()->Intrinsified());
189 DCHECK_EQ(instruction_->AsInvoke()->GetIntrinsic(), Intrinsics::kSystemArrayCopy);
190
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000191 Primitive::Type type = Primitive::kPrimNot;
192 const int32_t element_size = Primitive::ComponentSize(type);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100193
194 vixl32::Register dest = InputRegisterAt(instruction_, 2);
195 Location dest_pos = locations->InAt(3);
196 vixl32::Register src_curr_addr = RegisterFrom(locations->GetTemp(0));
197 vixl32::Register dst_curr_addr = RegisterFrom(locations->GetTemp(1));
198 vixl32::Register src_stop_addr = RegisterFrom(locations->GetTemp(2));
199 vixl32::Register tmp = RegisterFrom(locations->GetTemp(3));
200
201 __ Bind(GetEntryLabel());
202 // Compute the base destination address in `dst_curr_addr`.
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000203 GenSystemArrayCopyBaseAddress(assembler, type, dest, dest_pos, dst_curr_addr);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100204
205 vixl32::Label loop;
206 __ Bind(&loop);
207 __ Ldr(tmp, MemOperand(src_curr_addr, element_size, PostIndex));
208 assembler->MaybeUnpoisonHeapReference(tmp);
209 // TODO: Inline the mark bit check before calling the runtime?
210 // tmp = ReadBarrier::Mark(tmp);
211 // No need to save live registers; it's taken care of by the
212 // entrypoint. Also, there is no need to update the stack mask,
213 // as this runtime call will not trigger a garbage collection.
214 // (See ReadBarrierMarkSlowPathARM::EmitNativeCode for more
215 // explanations.)
216 DCHECK(!tmp.IsSP());
217 DCHECK(!tmp.IsLR());
218 DCHECK(!tmp.IsPC());
219 // IP is used internally by the ReadBarrierMarkRegX entry point
220 // as a temporary (and not preserved). It thus cannot be used by
221 // any live register in this slow path.
222 DCHECK(!src_curr_addr.Is(ip));
223 DCHECK(!dst_curr_addr.Is(ip));
224 DCHECK(!src_stop_addr.Is(ip));
225 DCHECK(!tmp.Is(ip));
226 DCHECK(tmp.IsRegister()) << tmp;
Roland Levillain9cc0ea82017-03-16 11:25:59 +0000227 // TODO: Load the entrypoint once before the loop, instead of
228 // loading it at every iteration.
Anton Kirilov5ec62182016-10-13 20:16:02 +0100229 int32_t entry_point_offset =
230 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(tmp.GetCode());
231 // This runtime call does not require a stack map.
232 arm_codegen->InvokeRuntimeWithoutRecordingPcInfo(entry_point_offset, instruction_, this);
233 assembler->MaybePoisonHeapReference(tmp);
234 __ Str(tmp, MemOperand(dst_curr_addr, element_size, PostIndex));
235 __ Cmp(src_curr_addr, src_stop_addr);
Artem Serov517d9f62016-12-12 15:51:15 +0000236 __ B(ne, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100237 __ B(GetExitLabel());
238 }
239
240 const char* GetDescription() const OVERRIDE {
241 return "ReadBarrierSystemArrayCopySlowPathARMVIXL";
242 }
243
244 private:
245 DISALLOW_COPY_AND_ASSIGN(ReadBarrierSystemArrayCopySlowPathARMVIXL);
246};
247
248IntrinsicLocationsBuilderARMVIXL::IntrinsicLocationsBuilderARMVIXL(CodeGeneratorARMVIXL* codegen)
249 : arena_(codegen->GetGraph()->GetArena()),
Nicolas Geoffray331605a2017-03-01 11:01:41 +0000250 codegen_(codegen),
Anton Kirilov5ec62182016-10-13 20:16:02 +0100251 assembler_(codegen->GetAssembler()),
252 features_(codegen->GetInstructionSetFeatures()) {}
253
254bool IntrinsicLocationsBuilderARMVIXL::TryDispatch(HInvoke* invoke) {
255 Dispatch(invoke);
256 LocationSummary* res = invoke->GetLocations();
257 if (res == nullptr) {
258 return false;
259 }
260 return res->Intrinsified();
261}
262
263static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
264 LocationSummary* locations = new (arena) LocationSummary(invoke,
265 LocationSummary::kNoCall,
266 kIntrinsified);
267 locations->SetInAt(0, Location::RequiresFpuRegister());
268 locations->SetOut(Location::RequiresRegister());
269}
270
271static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
272 LocationSummary* locations = new (arena) LocationSummary(invoke,
273 LocationSummary::kNoCall,
274 kIntrinsified);
275 locations->SetInAt(0, Location::RequiresRegister());
276 locations->SetOut(Location::RequiresFpuRegister());
277}
278
279static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
280 Location input = locations->InAt(0);
281 Location output = locations->Out();
282 if (is64bit) {
283 __ Vmov(LowRegisterFrom(output), HighRegisterFrom(output), DRegisterFrom(input));
284 } else {
285 __ Vmov(RegisterFrom(output), SRegisterFrom(input));
286 }
287}
288
289static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) {
290 Location input = locations->InAt(0);
291 Location output = locations->Out();
292 if (is64bit) {
293 __ Vmov(DRegisterFrom(output), LowRegisterFrom(input), HighRegisterFrom(input));
294 } else {
295 __ Vmov(SRegisterFrom(output), RegisterFrom(input));
296 }
297}
298
299void IntrinsicLocationsBuilderARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
300 CreateFPToIntLocations(arena_, invoke);
301}
302void IntrinsicLocationsBuilderARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
303 CreateIntToFPLocations(arena_, invoke);
304}
305
306void IntrinsicCodeGeneratorARMVIXL::VisitDoubleDoubleToRawLongBits(HInvoke* invoke) {
307 MoveFPToInt(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
308}
309void IntrinsicCodeGeneratorARMVIXL::VisitDoubleLongBitsToDouble(HInvoke* invoke) {
310 MoveIntToFP(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
311}
312
313void IntrinsicLocationsBuilderARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
314 CreateFPToIntLocations(arena_, invoke);
315}
316void IntrinsicLocationsBuilderARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
317 CreateIntToFPLocations(arena_, invoke);
318}
319
320void IntrinsicCodeGeneratorARMVIXL::VisitFloatFloatToRawIntBits(HInvoke* invoke) {
321 MoveFPToInt(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
322}
323void IntrinsicCodeGeneratorARMVIXL::VisitFloatIntBitsToFloat(HInvoke* invoke) {
324 MoveIntToFP(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
325}
326
327static void CreateIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
328 LocationSummary* locations = new (arena) LocationSummary(invoke,
329 LocationSummary::kNoCall,
330 kIntrinsified);
331 locations->SetInAt(0, Location::RequiresRegister());
332 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
333}
334
335static void CreateFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
336 LocationSummary* locations = new (arena) LocationSummary(invoke,
337 LocationSummary::kNoCall,
338 kIntrinsified);
339 locations->SetInAt(0, Location::RequiresFpuRegister());
340 locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
341}
342
Anton Kirilov6f644202017-02-27 18:29:45 +0000343static void GenNumberOfLeadingZeros(HInvoke* invoke,
Anton Kirilov5ec62182016-10-13 20:16:02 +0100344 Primitive::Type type,
Anton Kirilov6f644202017-02-27 18:29:45 +0000345 CodeGeneratorARMVIXL* codegen) {
346 ArmVIXLAssembler* assembler = codegen->GetAssembler();
347 LocationSummary* locations = invoke->GetLocations();
Anton Kirilov5ec62182016-10-13 20:16:02 +0100348 Location in = locations->InAt(0);
349 vixl32::Register out = RegisterFrom(locations->Out());
350
351 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
352
353 if (type == Primitive::kPrimLong) {
354 vixl32::Register in_reg_lo = LowRegisterFrom(in);
355 vixl32::Register in_reg_hi = HighRegisterFrom(in);
356 vixl32::Label end;
Anton Kirilov6f644202017-02-27 18:29:45 +0000357 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &end);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100358 __ Clz(out, in_reg_hi);
Anton Kirilov6f644202017-02-27 18:29:45 +0000359 __ CompareAndBranchIfNonZero(in_reg_hi, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100360 __ Clz(out, in_reg_lo);
361 __ Add(out, out, 32);
Anton Kirilov6f644202017-02-27 18:29:45 +0000362 if (end.IsReferenced()) {
363 __ Bind(&end);
364 }
Anton Kirilov5ec62182016-10-13 20:16:02 +0100365 } else {
366 __ Clz(out, RegisterFrom(in));
367 }
368}
369
370void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
371 CreateIntToIntLocations(arena_, invoke);
372}
373
374void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfLeadingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000375 GenNumberOfLeadingZeros(invoke, Primitive::kPrimInt, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100376}
377
378void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
379 LocationSummary* locations = new (arena_) LocationSummary(invoke,
380 LocationSummary::kNoCall,
381 kIntrinsified);
382 locations->SetInAt(0, Location::RequiresRegister());
383 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
384}
385
386void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfLeadingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000387 GenNumberOfLeadingZeros(invoke, Primitive::kPrimLong, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100388}
389
Anton Kirilov6f644202017-02-27 18:29:45 +0000390static void GenNumberOfTrailingZeros(HInvoke* invoke,
Anton Kirilov5ec62182016-10-13 20:16:02 +0100391 Primitive::Type type,
Anton Kirilov6f644202017-02-27 18:29:45 +0000392 CodeGeneratorARMVIXL* codegen) {
Anton Kirilov5ec62182016-10-13 20:16:02 +0100393 DCHECK((type == Primitive::kPrimInt) || (type == Primitive::kPrimLong));
394
Anton Kirilov6f644202017-02-27 18:29:45 +0000395 ArmVIXLAssembler* assembler = codegen->GetAssembler();
396 LocationSummary* locations = invoke->GetLocations();
Anton Kirilov5ec62182016-10-13 20:16:02 +0100397 vixl32::Register out = RegisterFrom(locations->Out());
398
399 if (type == Primitive::kPrimLong) {
400 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
401 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
402 vixl32::Label end;
Anton Kirilov6f644202017-02-27 18:29:45 +0000403 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &end);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100404 __ Rbit(out, in_reg_lo);
405 __ Clz(out, out);
Anton Kirilov6f644202017-02-27 18:29:45 +0000406 __ CompareAndBranchIfNonZero(in_reg_lo, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100407 __ Rbit(out, in_reg_hi);
408 __ Clz(out, out);
409 __ Add(out, out, 32);
Anton Kirilov6f644202017-02-27 18:29:45 +0000410 if (end.IsReferenced()) {
411 __ Bind(&end);
412 }
Anton Kirilov5ec62182016-10-13 20:16:02 +0100413 } else {
414 vixl32::Register in = RegisterFrom(locations->InAt(0));
415 __ Rbit(out, in);
416 __ Clz(out, out);
417 }
418}
419
420void IntrinsicLocationsBuilderARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
421 LocationSummary* locations = new (arena_) LocationSummary(invoke,
422 LocationSummary::kNoCall,
423 kIntrinsified);
424 locations->SetInAt(0, Location::RequiresRegister());
425 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
426}
427
428void IntrinsicCodeGeneratorARMVIXL::VisitIntegerNumberOfTrailingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000429 GenNumberOfTrailingZeros(invoke, Primitive::kPrimInt, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100430}
431
432void IntrinsicLocationsBuilderARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
433 LocationSummary* locations = new (arena_) LocationSummary(invoke,
434 LocationSummary::kNoCall,
435 kIntrinsified);
436 locations->SetInAt(0, Location::RequiresRegister());
437 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
438}
439
440void IntrinsicCodeGeneratorARMVIXL::VisitLongNumberOfTrailingZeros(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000441 GenNumberOfTrailingZeros(invoke, Primitive::kPrimLong, codegen_);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100442}
443
444static void MathAbsFP(HInvoke* invoke, ArmVIXLAssembler* assembler) {
445 __ Vabs(OutputVRegister(invoke), InputVRegisterAt(invoke, 0));
446}
447
448void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
449 CreateFPToFPLocations(arena_, invoke);
450}
451
452void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsDouble(HInvoke* invoke) {
453 MathAbsFP(invoke, GetAssembler());
454}
455
456void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
457 CreateFPToFPLocations(arena_, invoke);
458}
459
460void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsFloat(HInvoke* invoke) {
461 MathAbsFP(invoke, GetAssembler());
462}
463
464static void CreateIntToIntPlusTemp(ArenaAllocator* arena, HInvoke* invoke) {
465 LocationSummary* locations = new (arena) LocationSummary(invoke,
466 LocationSummary::kNoCall,
467 kIntrinsified);
468 locations->SetInAt(0, Location::RequiresRegister());
469 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
470
471 locations->AddTemp(Location::RequiresRegister());
472}
473
474static void GenAbsInteger(LocationSummary* locations,
475 bool is64bit,
476 ArmVIXLAssembler* assembler) {
477 Location in = locations->InAt(0);
478 Location output = locations->Out();
479
480 vixl32::Register mask = RegisterFrom(locations->GetTemp(0));
481
482 if (is64bit) {
483 vixl32::Register in_reg_lo = LowRegisterFrom(in);
484 vixl32::Register in_reg_hi = HighRegisterFrom(in);
485 vixl32::Register out_reg_lo = LowRegisterFrom(output);
486 vixl32::Register out_reg_hi = HighRegisterFrom(output);
487
488 DCHECK(!out_reg_lo.Is(in_reg_hi)) << "Diagonal overlap unexpected.";
489
490 __ Asr(mask, in_reg_hi, 31);
491 __ Adds(out_reg_lo, in_reg_lo, mask);
492 __ Adc(out_reg_hi, in_reg_hi, mask);
493 __ Eor(out_reg_lo, mask, out_reg_lo);
494 __ Eor(out_reg_hi, mask, out_reg_hi);
495 } else {
496 vixl32::Register in_reg = RegisterFrom(in);
497 vixl32::Register out_reg = RegisterFrom(output);
498
499 __ Asr(mask, in_reg, 31);
500 __ Add(out_reg, in_reg, mask);
501 __ Eor(out_reg, mask, out_reg);
502 }
503}
504
505void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
506 CreateIntToIntPlusTemp(arena_, invoke);
507}
508
509void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsInt(HInvoke* invoke) {
510 GenAbsInteger(invoke->GetLocations(), /* is64bit */ false, GetAssembler());
511}
512
513
514void IntrinsicLocationsBuilderARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
515 CreateIntToIntPlusTemp(arena_, invoke);
516}
517
518void IntrinsicCodeGeneratorARMVIXL::VisitMathAbsLong(HInvoke* invoke) {
519 GenAbsInteger(invoke->GetLocations(), /* is64bit */ true, GetAssembler());
520}
521
Anton Kirilov6f644202017-02-27 18:29:45 +0000522static void GenMinMaxFloat(HInvoke* invoke, bool is_min, CodeGeneratorARMVIXL* codegen) {
523 ArmVIXLAssembler* assembler = codegen->GetAssembler();
xueliang.zhongc032e742016-03-28 16:44:32 +0100524 Location op1_loc = invoke->GetLocations()->InAt(0);
525 Location op2_loc = invoke->GetLocations()->InAt(1);
526 Location out_loc = invoke->GetLocations()->Out();
527
528 // Optimization: don't generate any code if inputs are the same.
529 if (op1_loc.Equals(op2_loc)) {
530 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
531 return;
532 }
533
534 vixl32::SRegister op1 = SRegisterFrom(op1_loc);
535 vixl32::SRegister op2 = SRegisterFrom(op2_loc);
536 vixl32::SRegister out = OutputSRegister(invoke);
537 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
538 const vixl32::Register temp1 = temps.Acquire();
539 vixl32::Register temp2 = RegisterFrom(invoke->GetLocations()->GetTemp(0));
540 vixl32::Label nan, done;
Anton Kirilov6f644202017-02-27 18:29:45 +0000541 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &done);
xueliang.zhongc032e742016-03-28 16:44:32 +0100542
543 DCHECK(op1.Is(out));
544
545 __ Vcmp(op1, op2);
546 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
547 __ B(vs, &nan, /* far_target */ false); // if un-ordered, go to NaN handling.
548
549 // op1 <> op2
550 vixl32::ConditionType cond = is_min ? gt : lt;
551 {
552 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
553 2 * kMaxInstructionSizeInBytes,
554 CodeBufferCheckScope::kMaximumSize);
555 __ it(cond);
556 __ vmov(cond, F32, out, op2);
557 }
Anton Kirilov6f644202017-02-27 18:29:45 +0000558 // for <>(not equal), we've done min/max calculation.
559 __ B(ne, final_label, /* far_target */ false);
xueliang.zhongc032e742016-03-28 16:44:32 +0100560
561 // handle op1 == op2, max(+0.0,-0.0), min(+0.0,-0.0).
562 __ Vmov(temp1, op1);
563 __ Vmov(temp2, op2);
564 if (is_min) {
565 __ Orr(temp1, temp1, temp2);
566 } else {
567 __ And(temp1, temp1, temp2);
568 }
569 __ Vmov(out, temp1);
Anton Kirilov6f644202017-02-27 18:29:45 +0000570 __ B(final_label);
xueliang.zhongc032e742016-03-28 16:44:32 +0100571
572 // handle NaN input.
573 __ Bind(&nan);
574 __ Movt(temp1, High16Bits(kNanFloat)); // 0x7FC0xxxx is a NaN.
575 __ Vmov(out, temp1);
576
Anton Kirilov6f644202017-02-27 18:29:45 +0000577 if (done.IsReferenced()) {
578 __ Bind(&done);
579 }
xueliang.zhongc032e742016-03-28 16:44:32 +0100580}
581
582static void CreateFPFPToFPLocations(ArenaAllocator* arena, HInvoke* invoke) {
583 LocationSummary* locations = new (arena) LocationSummary(invoke,
584 LocationSummary::kNoCall,
585 kIntrinsified);
586 locations->SetInAt(0, Location::RequiresFpuRegister());
587 locations->SetInAt(1, Location::RequiresFpuRegister());
588 locations->SetOut(Location::SameAsFirstInput());
589}
590
591void IntrinsicLocationsBuilderARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
592 CreateFPFPToFPLocations(arena_, invoke);
593 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
594}
595
596void IntrinsicCodeGeneratorARMVIXL::VisitMathMinFloatFloat(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000597 GenMinMaxFloat(invoke, /* is_min */ true, codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100598}
599
600void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
601 CreateFPFPToFPLocations(arena_, invoke);
602 invoke->GetLocations()->AddTemp(Location::RequiresRegister());
603}
604
605void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxFloatFloat(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000606 GenMinMaxFloat(invoke, /* is_min */ false, codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100607}
608
Anton Kirilov6f644202017-02-27 18:29:45 +0000609static void GenMinMaxDouble(HInvoke* invoke, bool is_min, CodeGeneratorARMVIXL* codegen) {
610 ArmVIXLAssembler* assembler = codegen->GetAssembler();
xueliang.zhongc032e742016-03-28 16:44:32 +0100611 Location op1_loc = invoke->GetLocations()->InAt(0);
612 Location op2_loc = invoke->GetLocations()->InAt(1);
613 Location out_loc = invoke->GetLocations()->Out();
614
615 // Optimization: don't generate any code if inputs are the same.
616 if (op1_loc.Equals(op2_loc)) {
617 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in.
618 return;
619 }
620
621 vixl32::DRegister op1 = DRegisterFrom(op1_loc);
622 vixl32::DRegister op2 = DRegisterFrom(op2_loc);
623 vixl32::DRegister out = OutputDRegister(invoke);
624 vixl32::Label handle_nan_eq, done;
Anton Kirilov6f644202017-02-27 18:29:45 +0000625 vixl32::Label* final_label = codegen->GetFinalLabel(invoke, &done);
xueliang.zhongc032e742016-03-28 16:44:32 +0100626
627 DCHECK(op1.Is(out));
628
629 __ Vcmp(op1, op2);
630 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
631 __ B(vs, &handle_nan_eq, /* far_target */ false); // if un-ordered, go to NaN handling.
632
633 // op1 <> op2
634 vixl32::ConditionType cond = is_min ? gt : lt;
635 {
636 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
637 2 * kMaxInstructionSizeInBytes,
638 CodeBufferCheckScope::kMaximumSize);
639 __ it(cond);
640 __ vmov(cond, F64, out, op2);
641 }
Anton Kirilov6f644202017-02-27 18:29:45 +0000642 // for <>(not equal), we've done min/max calculation.
643 __ B(ne, final_label, /* far_target */ false);
xueliang.zhongc032e742016-03-28 16:44:32 +0100644
645 // handle op1 == op2, max(+0.0,-0.0).
646 if (!is_min) {
647 __ Vand(F64, out, op1, op2);
Anton Kirilov6f644202017-02-27 18:29:45 +0000648 __ B(final_label);
xueliang.zhongc032e742016-03-28 16:44:32 +0100649 }
650
651 // handle op1 == op2, min(+0.0,-0.0), NaN input.
652 __ Bind(&handle_nan_eq);
653 __ Vorr(F64, out, op1, op2); // assemble op1/-0.0/NaN.
654
Anton Kirilov6f644202017-02-27 18:29:45 +0000655 if (done.IsReferenced()) {
656 __ Bind(&done);
657 }
xueliang.zhongc032e742016-03-28 16:44:32 +0100658}
659
660void IntrinsicLocationsBuilderARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
661 CreateFPFPToFPLocations(arena_, invoke);
662}
663
664void IntrinsicCodeGeneratorARMVIXL::VisitMathMinDoubleDouble(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000665 GenMinMaxDouble(invoke, /* is_min */ true , codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100666}
667
668void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
669 CreateFPFPToFPLocations(arena_, invoke);
670}
671
672void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxDoubleDouble(HInvoke* invoke) {
Anton Kirilov6f644202017-02-27 18:29:45 +0000673 GenMinMaxDouble(invoke, /* is_min */ false, codegen_);
xueliang.zhongc032e742016-03-28 16:44:32 +0100674}
675
676static void GenMinMaxLong(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
677 Location op1_loc = invoke->GetLocations()->InAt(0);
678 Location op2_loc = invoke->GetLocations()->InAt(1);
679 Location out_loc = invoke->GetLocations()->Out();
680
681 // Optimization: don't generate any code if inputs are the same.
682 if (op1_loc.Equals(op2_loc)) {
683 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder.
684 return;
685 }
686
687 vixl32::Register op1_lo = LowRegisterFrom(op1_loc);
688 vixl32::Register op1_hi = HighRegisterFrom(op1_loc);
689 vixl32::Register op2_lo = LowRegisterFrom(op2_loc);
690 vixl32::Register op2_hi = HighRegisterFrom(op2_loc);
691 vixl32::Register out_lo = LowRegisterFrom(out_loc);
692 vixl32::Register out_hi = HighRegisterFrom(out_loc);
693 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
694 const vixl32::Register temp = temps.Acquire();
695
696 DCHECK(op1_lo.Is(out_lo));
697 DCHECK(op1_hi.Is(out_hi));
698
699 // Compare op1 >= op2, or op1 < op2.
700 __ Cmp(out_lo, op2_lo);
701 __ Sbcs(temp, out_hi, op2_hi);
702
703 // Now GE/LT condition code is correct for the long comparison.
704 {
705 vixl32::ConditionType cond = is_min ? ge : lt;
706 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
707 3 * kMaxInstructionSizeInBytes,
708 CodeBufferCheckScope::kMaximumSize);
709 __ itt(cond);
710 __ mov(cond, out_lo, op2_lo);
711 __ mov(cond, out_hi, op2_hi);
712 }
713}
714
715static void CreateLongLongToLongLocations(ArenaAllocator* arena, HInvoke* invoke) {
716 LocationSummary* locations = new (arena) LocationSummary(invoke,
717 LocationSummary::kNoCall,
718 kIntrinsified);
719 locations->SetInAt(0, Location::RequiresRegister());
720 locations->SetInAt(1, Location::RequiresRegister());
721 locations->SetOut(Location::SameAsFirstInput());
722}
723
724void IntrinsicLocationsBuilderARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
725 CreateLongLongToLongLocations(arena_, invoke);
726}
727
728void IntrinsicCodeGeneratorARMVIXL::VisitMathMinLongLong(HInvoke* invoke) {
729 GenMinMaxLong(invoke, /* is_min */ true, GetAssembler());
730}
731
732void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
733 CreateLongLongToLongLocations(arena_, invoke);
734}
735
736void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxLongLong(HInvoke* invoke) {
737 GenMinMaxLong(invoke, /* is_min */ false, GetAssembler());
738}
739
Anton Kirilov5ec62182016-10-13 20:16:02 +0100740static void GenMinMax(HInvoke* invoke, bool is_min, ArmVIXLAssembler* assembler) {
741 vixl32::Register op1 = InputRegisterAt(invoke, 0);
742 vixl32::Register op2 = InputRegisterAt(invoke, 1);
743 vixl32::Register out = OutputRegister(invoke);
744
745 __ Cmp(op1, op2);
746
747 {
Artem Serov0fb37192016-12-06 18:13:40 +0000748 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
749 3 * kMaxInstructionSizeInBytes,
750 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +0100751
752 __ ite(is_min ? lt : gt);
753 __ mov(is_min ? lt : gt, out, op1);
754 __ mov(is_min ? ge : le, out, op2);
755 }
756}
757
758static void CreateIntIntToIntLocations(ArenaAllocator* arena, HInvoke* invoke) {
759 LocationSummary* locations = new (arena) LocationSummary(invoke,
760 LocationSummary::kNoCall,
761 kIntrinsified);
762 locations->SetInAt(0, Location::RequiresRegister());
763 locations->SetInAt(1, Location::RequiresRegister());
764 locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap);
765}
766
767void IntrinsicLocationsBuilderARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
768 CreateIntIntToIntLocations(arena_, invoke);
769}
770
771void IntrinsicCodeGeneratorARMVIXL::VisitMathMinIntInt(HInvoke* invoke) {
772 GenMinMax(invoke, /* is_min */ true, GetAssembler());
773}
774
775void IntrinsicLocationsBuilderARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
776 CreateIntIntToIntLocations(arena_, invoke);
777}
778
779void IntrinsicCodeGeneratorARMVIXL::VisitMathMaxIntInt(HInvoke* invoke) {
780 GenMinMax(invoke, /* is_min */ false, GetAssembler());
781}
782
783void IntrinsicLocationsBuilderARMVIXL::VisitMathSqrt(HInvoke* invoke) {
784 CreateFPToFPLocations(arena_, invoke);
785}
786
787void IntrinsicCodeGeneratorARMVIXL::VisitMathSqrt(HInvoke* invoke) {
788 ArmVIXLAssembler* assembler = GetAssembler();
789 __ Vsqrt(OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
790}
791
xueliang.zhong6099d5e2016-04-20 18:44:56 +0100792void IntrinsicLocationsBuilderARMVIXL::VisitMathRint(HInvoke* invoke) {
793 if (features_.HasARMv8AInstructions()) {
794 CreateFPToFPLocations(arena_, invoke);
795 }
796}
797
798void IntrinsicCodeGeneratorARMVIXL::VisitMathRint(HInvoke* invoke) {
799 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
800 ArmVIXLAssembler* assembler = GetAssembler();
801 __ Vrintn(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
802}
803
xueliang.zhong53463ba2017-02-16 15:18:03 +0000804void IntrinsicLocationsBuilderARMVIXL::VisitMathRoundFloat(HInvoke* invoke) {
805 if (features_.HasARMv8AInstructions()) {
806 LocationSummary* locations = new (arena_) LocationSummary(invoke,
807 LocationSummary::kNoCall,
808 kIntrinsified);
809 locations->SetInAt(0, Location::RequiresFpuRegister());
810 locations->SetOut(Location::RequiresRegister());
811 locations->AddTemp(Location::RequiresFpuRegister());
812 }
813}
814
815void IntrinsicCodeGeneratorARMVIXL::VisitMathRoundFloat(HInvoke* invoke) {
816 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
817
818 ArmVIXLAssembler* assembler = GetAssembler();
819 vixl32::SRegister in_reg = InputSRegisterAt(invoke, 0);
820 vixl32::Register out_reg = OutputRegister(invoke);
821 vixl32::SRegister temp1 = LowSRegisterFrom(invoke->GetLocations()->GetTemp(0));
822 vixl32::SRegister temp2 = HighSRegisterFrom(invoke->GetLocations()->GetTemp(0));
823 vixl32::Label done;
824 vixl32::Label* final_label = codegen_->GetFinalLabel(invoke, &done);
825
826 // Round to nearest integer, ties away from zero.
827 __ Vcvta(S32, F32, temp1, in_reg);
828 __ Vmov(out_reg, temp1);
829
830 // For positive, zero or NaN inputs, rounding is done.
831 __ Cmp(out_reg, 0);
832 __ B(ge, final_label, /* far_target */ false);
833
834 // Handle input < 0 cases.
835 // If input is negative but not a tie, previous result (round to nearest) is valid.
836 // If input is a negative tie, change rounding direction to positive infinity, out_reg += 1.
837 __ Vrinta(F32, F32, temp1, in_reg);
838 __ Vmov(temp2, 0.5);
839 __ Vsub(F32, temp1, in_reg, temp1);
840 __ Vcmp(F32, temp1, temp2);
841 __ Vmrs(RegisterOrAPSR_nzcv(kPcCode), FPSCR);
842 {
843 // Use ExactAsemblyScope here because we are using IT.
844 ExactAssemblyScope it_scope(assembler->GetVIXLAssembler(),
845 2 * kMaxInstructionSizeInBytes,
846 CodeBufferCheckScope::kMaximumSize);
847 __ it(eq);
848 __ add(eq, out_reg, out_reg, 1);
849 }
850
851 if (done.IsReferenced()) {
852 __ Bind(&done);
853 }
854}
855
Anton Kirilov5ec62182016-10-13 20:16:02 +0100856void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
857 CreateIntToIntLocations(arena_, invoke);
858}
859
860void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekByte(HInvoke* invoke) {
861 ArmVIXLAssembler* assembler = GetAssembler();
862 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000863 __ Ldrsb(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100864}
865
866void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
867 CreateIntToIntLocations(arena_, invoke);
868}
869
870void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekIntNative(HInvoke* invoke) {
871 ArmVIXLAssembler* assembler = GetAssembler();
872 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000873 __ Ldr(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100874}
875
876void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
877 CreateIntToIntLocations(arena_, invoke);
878}
879
880void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekLongNative(HInvoke* invoke) {
881 ArmVIXLAssembler* assembler = GetAssembler();
882 // Ignore upper 4B of long address.
883 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
884 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
885 // exception. So we can't use ldrd as addr may be unaligned.
886 vixl32::Register lo = LowRegisterFrom(invoke->GetLocations()->Out());
887 vixl32::Register hi = HighRegisterFrom(invoke->GetLocations()->Out());
888 if (addr.Is(lo)) {
889 __ Ldr(hi, MemOperand(addr, 4));
Scott Wakelingb77051e2016-11-21 19:46:00 +0000890 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100891 } else {
Scott Wakelingb77051e2016-11-21 19:46:00 +0000892 __ Ldr(lo, MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100893 __ Ldr(hi, MemOperand(addr, 4));
894 }
895}
896
897void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
898 CreateIntToIntLocations(arena_, invoke);
899}
900
901void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPeekShortNative(HInvoke* invoke) {
902 ArmVIXLAssembler* assembler = GetAssembler();
903 // Ignore upper 4B of long address.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000904 __ Ldrsh(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100905}
906
907static void CreateIntIntToVoidLocations(ArenaAllocator* arena, HInvoke* invoke) {
908 LocationSummary* locations = new (arena) LocationSummary(invoke,
909 LocationSummary::kNoCall,
910 kIntrinsified);
911 locations->SetInAt(0, Location::RequiresRegister());
912 locations->SetInAt(1, Location::RequiresRegister());
913}
914
915void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
916 CreateIntIntToVoidLocations(arena_, invoke);
917}
918
919void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeByte(HInvoke* invoke) {
920 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000921 __ Strb(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100922}
923
924void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
925 CreateIntIntToVoidLocations(arena_, invoke);
926}
927
928void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeIntNative(HInvoke* invoke) {
929 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000930 __ Str(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100931}
932
933void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
934 CreateIntIntToVoidLocations(arena_, invoke);
935}
936
937void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeLongNative(HInvoke* invoke) {
938 ArmVIXLAssembler* assembler = GetAssembler();
939 // Ignore upper 4B of long address.
940 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0));
941 // Worst case: Control register bit SCTLR.A = 0. Then unaligned accesses throw a processor
942 // exception. So we can't use ldrd as addr may be unaligned.
Scott Wakelingb77051e2016-11-21 19:46:00 +0000943 __ Str(LowRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100944 __ Str(HighRegisterFrom(invoke->GetLocations()->InAt(1)), MemOperand(addr, 4));
945}
946
947void IntrinsicLocationsBuilderARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
948 CreateIntIntToVoidLocations(arena_, invoke);
949}
950
951void IntrinsicCodeGeneratorARMVIXL::VisitMemoryPokeShortNative(HInvoke* invoke) {
952 ArmVIXLAssembler* assembler = GetAssembler();
Scott Wakelingb77051e2016-11-21 19:46:00 +0000953 __ Strh(InputRegisterAt(invoke, 1), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0))));
Anton Kirilov5ec62182016-10-13 20:16:02 +0100954}
955
956void IntrinsicLocationsBuilderARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
957 LocationSummary* locations = new (arena_) LocationSummary(invoke,
958 LocationSummary::kNoCall,
959 kIntrinsified);
960 locations->SetOut(Location::RequiresRegister());
961}
962
963void IntrinsicCodeGeneratorARMVIXL::VisitThreadCurrentThread(HInvoke* invoke) {
964 ArmVIXLAssembler* assembler = GetAssembler();
965 __ Ldr(OutputRegister(invoke),
966 MemOperand(tr, Thread::PeerOffset<kArmPointerSize>().Int32Value()));
967}
968
969static void GenUnsafeGet(HInvoke* invoke,
970 Primitive::Type type,
971 bool is_volatile,
972 CodeGeneratorARMVIXL* codegen) {
973 LocationSummary* locations = invoke->GetLocations();
974 ArmVIXLAssembler* assembler = codegen->GetAssembler();
975 Location base_loc = locations->InAt(1);
976 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
977 Location offset_loc = locations->InAt(2);
978 vixl32::Register offset = LowRegisterFrom(offset_loc); // Long offset, lo part only.
979 Location trg_loc = locations->Out();
980
981 switch (type) {
982 case Primitive::kPrimInt: {
983 vixl32::Register trg = RegisterFrom(trg_loc);
984 __ Ldr(trg, MemOperand(base, offset));
985 if (is_volatile) {
986 __ Dmb(vixl32::ISH);
987 }
988 break;
989 }
990
991 case Primitive::kPrimNot: {
992 vixl32::Register trg = RegisterFrom(trg_loc);
993 if (kEmitCompilerReadBarrier) {
994 if (kUseBakerReadBarrier) {
995 Location temp = locations->GetTemp(0);
996 codegen->GenerateReferenceLoadWithBakerReadBarrier(
997 invoke, trg_loc, base, 0U, offset_loc, TIMES_1, temp, /* needs_null_check */ false);
998 if (is_volatile) {
999 __ Dmb(vixl32::ISH);
1000 }
1001 } else {
1002 __ Ldr(trg, MemOperand(base, offset));
1003 if (is_volatile) {
1004 __ Dmb(vixl32::ISH);
1005 }
1006 codegen->GenerateReadBarrierSlow(invoke, trg_loc, trg_loc, base_loc, 0U, offset_loc);
1007 }
1008 } else {
1009 __ Ldr(trg, MemOperand(base, offset));
1010 if (is_volatile) {
1011 __ Dmb(vixl32::ISH);
1012 }
1013 assembler->MaybeUnpoisonHeapReference(trg);
1014 }
1015 break;
1016 }
1017
1018 case Primitive::kPrimLong: {
1019 vixl32::Register trg_lo = LowRegisterFrom(trg_loc);
1020 vixl32::Register trg_hi = HighRegisterFrom(trg_loc);
1021 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
Artem Serov657022c2016-11-23 14:19:38 +00001022 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1023 const vixl32::Register temp_reg = temps.Acquire();
1024 __ Add(temp_reg, base, offset);
1025 __ Ldrexd(trg_lo, trg_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001026 } else {
1027 __ Ldrd(trg_lo, trg_hi, MemOperand(base, offset));
1028 }
1029 if (is_volatile) {
1030 __ Dmb(vixl32::ISH);
1031 }
1032 break;
1033 }
1034
1035 default:
1036 LOG(FATAL) << "Unexpected type " << type;
1037 UNREACHABLE();
1038 }
1039}
1040
1041static void CreateIntIntIntToIntLocations(ArenaAllocator* arena,
1042 HInvoke* invoke,
1043 Primitive::Type type) {
1044 bool can_call = kEmitCompilerReadBarrier &&
1045 (invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObject ||
1046 invoke->GetIntrinsic() == Intrinsics::kUnsafeGetObjectVolatile);
1047 LocationSummary* locations = new (arena) LocationSummary(invoke,
1048 (can_call
1049 ? LocationSummary::kCallOnSlowPath
1050 : LocationSummary::kNoCall),
1051 kIntrinsified);
1052 if (can_call && kUseBakerReadBarrier) {
1053 locations->SetCustomSlowPathCallerSaves(RegisterSet::Empty()); // No caller-save registers.
1054 }
1055 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1056 locations->SetInAt(1, Location::RequiresRegister());
1057 locations->SetInAt(2, Location::RequiresRegister());
1058 locations->SetOut(Location::RequiresRegister(),
1059 (can_call ? Location::kOutputOverlap : Location::kNoOutputOverlap));
1060 if (type == Primitive::kPrimNot && kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1061 // We need a temporary register for the read barrier marking slow
1062 // path in InstructionCodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier.
1063 locations->AddTemp(Location::RequiresRegister());
1064 }
1065}
1066
1067void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
1068 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
1069}
1070void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
1071 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimInt);
1072}
1073void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
1074 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
1075}
1076void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
1077 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimLong);
1078}
1079void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
1080 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
1081}
1082void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
1083 CreateIntIntIntToIntLocations(arena_, invoke, Primitive::kPrimNot);
1084}
1085
1086void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGet(HInvoke* invoke) {
1087 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ false, codegen_);
1088}
1089void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetVolatile(HInvoke* invoke) {
1090 GenUnsafeGet(invoke, Primitive::kPrimInt, /* is_volatile */ true, codegen_);
1091}
1092void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLong(HInvoke* invoke) {
1093 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ false, codegen_);
1094}
1095void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetLongVolatile(HInvoke* invoke) {
1096 GenUnsafeGet(invoke, Primitive::kPrimLong, /* is_volatile */ true, codegen_);
1097}
1098void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObject(HInvoke* invoke) {
1099 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ false, codegen_);
1100}
1101void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeGetObjectVolatile(HInvoke* invoke) {
1102 GenUnsafeGet(invoke, Primitive::kPrimNot, /* is_volatile */ true, codegen_);
1103}
1104
1105static void CreateIntIntIntIntToVoid(ArenaAllocator* arena,
1106 const ArmInstructionSetFeatures& features,
1107 Primitive::Type type,
1108 bool is_volatile,
1109 HInvoke* invoke) {
1110 LocationSummary* locations = new (arena) LocationSummary(invoke,
1111 LocationSummary::kNoCall,
1112 kIntrinsified);
1113 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1114 locations->SetInAt(1, Location::RequiresRegister());
1115 locations->SetInAt(2, Location::RequiresRegister());
1116 locations->SetInAt(3, Location::RequiresRegister());
1117
1118 if (type == Primitive::kPrimLong) {
1119 // Potentially need temps for ldrexd-strexd loop.
1120 if (is_volatile && !features.HasAtomicLdrdAndStrd()) {
1121 locations->AddTemp(Location::RequiresRegister()); // Temp_lo.
1122 locations->AddTemp(Location::RequiresRegister()); // Temp_hi.
1123 }
1124 } else if (type == Primitive::kPrimNot) {
1125 // Temps for card-marking.
1126 locations->AddTemp(Location::RequiresRegister()); // Temp.
1127 locations->AddTemp(Location::RequiresRegister()); // Card.
1128 }
1129}
1130
1131void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1132 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1133}
1134void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1135 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ false, invoke);
1136}
1137void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1138 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimInt, /* is_volatile */ true, invoke);
1139}
1140void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1141 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1142}
1143void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1144 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ false, invoke);
1145}
1146void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1147 CreateIntIntIntIntToVoid(arena_, features_, Primitive::kPrimNot, /* is_volatile */ true, invoke);
1148}
1149void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1150 CreateIntIntIntIntToVoid(
1151 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1152}
1153void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1154 CreateIntIntIntIntToVoid(
1155 arena_, features_, Primitive::kPrimLong, /* is_volatile */ false, invoke);
1156}
1157void IntrinsicLocationsBuilderARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1158 CreateIntIntIntIntToVoid(
1159 arena_, features_, Primitive::kPrimLong, /* is_volatile */ true, invoke);
1160}
1161
1162static void GenUnsafePut(LocationSummary* locations,
1163 Primitive::Type type,
1164 bool is_volatile,
1165 bool is_ordered,
1166 CodeGeneratorARMVIXL* codegen) {
1167 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1168
1169 vixl32::Register base = RegisterFrom(locations->InAt(1)); // Object pointer.
1170 vixl32::Register offset = LowRegisterFrom(locations->InAt(2)); // Long offset, lo part only.
1171 vixl32::Register value;
1172
1173 if (is_volatile || is_ordered) {
1174 __ Dmb(vixl32::ISH);
1175 }
1176
1177 if (type == Primitive::kPrimLong) {
1178 vixl32::Register value_lo = LowRegisterFrom(locations->InAt(3));
1179 vixl32::Register value_hi = HighRegisterFrom(locations->InAt(3));
1180 value = value_lo;
1181 if (is_volatile && !codegen->GetInstructionSetFeatures().HasAtomicLdrdAndStrd()) {
1182 vixl32::Register temp_lo = RegisterFrom(locations->GetTemp(0));
1183 vixl32::Register temp_hi = RegisterFrom(locations->GetTemp(1));
1184 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1185 const vixl32::Register temp_reg = temps.Acquire();
1186
1187 __ Add(temp_reg, base, offset);
1188 vixl32::Label loop_head;
1189 __ Bind(&loop_head);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001190 __ Ldrexd(temp_lo, temp_hi, MemOperand(temp_reg));
1191 __ Strexd(temp_lo, value_lo, value_hi, MemOperand(temp_reg));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001192 __ Cmp(temp_lo, 0);
Artem Serov517d9f62016-12-12 15:51:15 +00001193 __ B(ne, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001194 } else {
1195 __ Strd(value_lo, value_hi, MemOperand(base, offset));
1196 }
1197 } else {
1198 value = RegisterFrom(locations->InAt(3));
1199 vixl32::Register source = value;
1200 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1201 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1202 __ Mov(temp, value);
1203 assembler->PoisonHeapReference(temp);
1204 source = temp;
1205 }
1206 __ Str(source, MemOperand(base, offset));
1207 }
1208
1209 if (is_volatile) {
1210 __ Dmb(vixl32::ISH);
1211 }
1212
1213 if (type == Primitive::kPrimNot) {
1214 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1215 vixl32::Register card = RegisterFrom(locations->GetTemp(1));
1216 bool value_can_be_null = true; // TODO: Worth finding out this information?
1217 codegen->MarkGCCard(temp, card, base, value, value_can_be_null);
1218 }
1219}
1220
1221void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePut(HInvoke* invoke) {
1222 GenUnsafePut(invoke->GetLocations(),
1223 Primitive::kPrimInt,
1224 /* is_volatile */ false,
1225 /* is_ordered */ false,
1226 codegen_);
1227}
1228void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutOrdered(HInvoke* invoke) {
1229 GenUnsafePut(invoke->GetLocations(),
1230 Primitive::kPrimInt,
1231 /* is_volatile */ false,
1232 /* is_ordered */ true,
1233 codegen_);
1234}
1235void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutVolatile(HInvoke* invoke) {
1236 GenUnsafePut(invoke->GetLocations(),
1237 Primitive::kPrimInt,
1238 /* is_volatile */ true,
1239 /* is_ordered */ false,
1240 codegen_);
1241}
1242void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObject(HInvoke* invoke) {
1243 GenUnsafePut(invoke->GetLocations(),
1244 Primitive::kPrimNot,
1245 /* is_volatile */ false,
1246 /* is_ordered */ false,
1247 codegen_);
1248}
1249void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectOrdered(HInvoke* invoke) {
1250 GenUnsafePut(invoke->GetLocations(),
1251 Primitive::kPrimNot,
1252 /* is_volatile */ false,
1253 /* is_ordered */ true,
1254 codegen_);
1255}
1256void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutObjectVolatile(HInvoke* invoke) {
1257 GenUnsafePut(invoke->GetLocations(),
1258 Primitive::kPrimNot,
1259 /* is_volatile */ true,
1260 /* is_ordered */ false,
1261 codegen_);
1262}
1263void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLong(HInvoke* invoke) {
1264 GenUnsafePut(invoke->GetLocations(),
1265 Primitive::kPrimLong,
1266 /* is_volatile */ false,
1267 /* is_ordered */ false,
1268 codegen_);
1269}
1270void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongOrdered(HInvoke* invoke) {
1271 GenUnsafePut(invoke->GetLocations(),
1272 Primitive::kPrimLong,
1273 /* is_volatile */ false,
1274 /* is_ordered */ true,
1275 codegen_);
1276}
1277void IntrinsicCodeGeneratorARMVIXL::VisitUnsafePutLongVolatile(HInvoke* invoke) {
1278 GenUnsafePut(invoke->GetLocations(),
1279 Primitive::kPrimLong,
1280 /* is_volatile */ true,
1281 /* is_ordered */ false,
1282 codegen_);
1283}
1284
1285static void CreateIntIntIntIntIntToIntPlusTemps(ArenaAllocator* arena,
1286 HInvoke* invoke,
1287 Primitive::Type type) {
1288 bool can_call = kEmitCompilerReadBarrier &&
1289 kUseBakerReadBarrier &&
1290 (invoke->GetIntrinsic() == Intrinsics::kUnsafeCASObject);
1291 LocationSummary* locations = new (arena) LocationSummary(invoke,
1292 (can_call
1293 ? LocationSummary::kCallOnSlowPath
1294 : LocationSummary::kNoCall),
1295 kIntrinsified);
1296 locations->SetInAt(0, Location::NoLocation()); // Unused receiver.
1297 locations->SetInAt(1, Location::RequiresRegister());
1298 locations->SetInAt(2, Location::RequiresRegister());
1299 locations->SetInAt(3, Location::RequiresRegister());
1300 locations->SetInAt(4, Location::RequiresRegister());
1301
1302 // If heap poisoning is enabled, we don't want the unpoisoning
1303 // operations to potentially clobber the output. Likewise when
1304 // emitting a (Baker) read barrier, which may call.
1305 Location::OutputOverlap overlaps =
1306 ((kPoisonHeapReferences && type == Primitive::kPrimNot) || can_call)
1307 ? Location::kOutputOverlap
1308 : Location::kNoOutputOverlap;
1309 locations->SetOut(Location::RequiresRegister(), overlaps);
1310
1311 // Temporary registers used in CAS. In the object case
1312 // (UnsafeCASObject intrinsic), these are also used for
1313 // card-marking, and possibly for (Baker) read barrier.
1314 locations->AddTemp(Location::RequiresRegister()); // Pointer.
1315 locations->AddTemp(Location::RequiresRegister()); // Temp 1.
1316}
1317
1318static void GenCas(HInvoke* invoke, Primitive::Type type, CodeGeneratorARMVIXL* codegen) {
1319 DCHECK_NE(type, Primitive::kPrimLong);
1320
1321 ArmVIXLAssembler* assembler = codegen->GetAssembler();
1322 LocationSummary* locations = invoke->GetLocations();
1323
1324 Location out_loc = locations->Out();
1325 vixl32::Register out = OutputRegister(invoke); // Boolean result.
1326
1327 vixl32::Register base = InputRegisterAt(invoke, 1); // Object pointer.
1328 Location offset_loc = locations->InAt(2);
1329 vixl32::Register offset = LowRegisterFrom(offset_loc); // Offset (discard high 4B).
1330 vixl32::Register expected = InputRegisterAt(invoke, 3); // Expected.
1331 vixl32::Register value = InputRegisterAt(invoke, 4); // Value.
1332
1333 Location tmp_ptr_loc = locations->GetTemp(0);
1334 vixl32::Register tmp_ptr = RegisterFrom(tmp_ptr_loc); // Pointer to actual memory.
1335 vixl32::Register tmp = RegisterFrom(locations->GetTemp(1)); // Value in memory.
1336
1337 if (type == Primitive::kPrimNot) {
1338 // The only read barrier implementation supporting the
1339 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1340 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1341
1342 // Mark card for object assuming new value is stored. Worst case we will mark an unchanged
1343 // object and scan the receiver at the next GC for nothing.
1344 bool value_can_be_null = true; // TODO: Worth finding out this information?
1345 codegen->MarkGCCard(tmp_ptr, tmp, base, value, value_can_be_null);
1346
1347 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
1348 // Need to make sure the reference stored in the field is a to-space
1349 // one before attempting the CAS or the CAS could fail incorrectly.
Roland Levillainff487002017-03-07 16:50:01 +00001350 codegen->UpdateReferenceFieldWithBakerReadBarrier(
Anton Kirilov5ec62182016-10-13 20:16:02 +01001351 invoke,
1352 out_loc, // Unused, used only as a "temporary" within the read barrier.
1353 base,
Roland Levillainff487002017-03-07 16:50:01 +00001354 /* field_offset */ offset_loc,
Anton Kirilov5ec62182016-10-13 20:16:02 +01001355 tmp_ptr_loc,
1356 /* needs_null_check */ false,
Roland Levillainff487002017-03-07 16:50:01 +00001357 tmp);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001358 }
1359 }
1360
1361 // Prevent reordering with prior memory operations.
1362 // Emit a DMB ISH instruction instead of an DMB ISHST one, as the
1363 // latter allows a preceding load to be delayed past the STXR
1364 // instruction below.
1365 __ Dmb(vixl32::ISH);
1366
1367 __ Add(tmp_ptr, base, offset);
1368
1369 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1370 codegen->GetAssembler()->PoisonHeapReference(expected);
1371 if (value.Is(expected)) {
1372 // Do not poison `value`, as it is the same register as
1373 // `expected`, which has just been poisoned.
1374 } else {
1375 codegen->GetAssembler()->PoisonHeapReference(value);
1376 }
1377 }
1378
1379 // do {
1380 // tmp = [r_ptr] - expected;
1381 // } while (tmp == 0 && failure([r_ptr] <- r_new_value));
1382 // result = tmp != 0;
1383
1384 vixl32::Label loop_head;
1385 __ Bind(&loop_head);
1386
Scott Wakelingb77051e2016-11-21 19:46:00 +00001387 __ Ldrex(tmp, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001388
1389 __ Subs(tmp, tmp, expected);
1390
1391 {
Artem Serov0fb37192016-12-06 18:13:40 +00001392 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1393 3 * kMaxInstructionSizeInBytes,
1394 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001395
1396 __ itt(eq);
Scott Wakelingb77051e2016-11-21 19:46:00 +00001397 __ strex(eq, tmp, value, MemOperand(tmp_ptr));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001398 __ cmp(eq, tmp, 1);
1399 }
1400
Artem Serov517d9f62016-12-12 15:51:15 +00001401 __ B(eq, &loop_head, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001402
1403 __ Dmb(vixl32::ISH);
1404
1405 __ Rsbs(out, tmp, 1);
1406
1407 {
Artem Serov0fb37192016-12-06 18:13:40 +00001408 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1409 2 * kMaxInstructionSizeInBytes,
1410 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001411
1412 __ it(cc);
1413 __ mov(cc, out, 0);
1414 }
1415
1416 if (kPoisonHeapReferences && type == Primitive::kPrimNot) {
1417 codegen->GetAssembler()->UnpoisonHeapReference(expected);
1418 if (value.Is(expected)) {
1419 // Do not unpoison `value`, as it is the same register as
1420 // `expected`, which has just been unpoisoned.
1421 } else {
1422 codegen->GetAssembler()->UnpoisonHeapReference(value);
1423 }
1424 }
1425}
1426
1427void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1428 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimInt);
1429}
1430void IntrinsicLocationsBuilderARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1431 // The only read barrier implementation supporting the
1432 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1433 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1434 return;
1435 }
1436
1437 CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke, Primitive::kPrimNot);
1438}
1439void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASInt(HInvoke* invoke) {
1440 GenCas(invoke, Primitive::kPrimInt, codegen_);
1441}
1442void IntrinsicCodeGeneratorARMVIXL::VisitUnsafeCASObject(HInvoke* invoke) {
1443 // The only read barrier implementation supporting the
1444 // UnsafeCASObject intrinsic is the Baker-style read barriers.
1445 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
1446
1447 GenCas(invoke, Primitive::kPrimNot, codegen_);
1448}
1449
1450void IntrinsicLocationsBuilderARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1451 // The inputs plus one temp.
1452 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1453 invoke->InputAt(1)->CanBeNull()
1454 ? LocationSummary::kCallOnSlowPath
1455 : LocationSummary::kNoCall,
1456 kIntrinsified);
1457 locations->SetInAt(0, Location::RequiresRegister());
1458 locations->SetInAt(1, Location::RequiresRegister());
1459 locations->AddTemp(Location::RequiresRegister());
1460 locations->AddTemp(Location::RequiresRegister());
1461 locations->AddTemp(Location::RequiresRegister());
1462 // Need temporary registers for String compression's feature.
1463 if (mirror::kUseStringCompression) {
1464 locations->AddTemp(Location::RequiresRegister());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001465 }
1466 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
1467}
1468
1469void IntrinsicCodeGeneratorARMVIXL::VisitStringCompareTo(HInvoke* invoke) {
1470 ArmVIXLAssembler* assembler = GetAssembler();
1471 LocationSummary* locations = invoke->GetLocations();
1472
1473 vixl32::Register str = InputRegisterAt(invoke, 0);
1474 vixl32::Register arg = InputRegisterAt(invoke, 1);
1475 vixl32::Register out = OutputRegister(invoke);
1476
1477 vixl32::Register temp0 = RegisterFrom(locations->GetTemp(0));
1478 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1479 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001480 vixl32::Register temp3;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001481 if (mirror::kUseStringCompression) {
1482 temp3 = RegisterFrom(locations->GetTemp(3));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001483 }
1484
1485 vixl32::Label loop;
1486 vixl32::Label find_char_diff;
1487 vixl32::Label end;
1488 vixl32::Label different_compression;
1489
1490 // Get offsets of count and value fields within a string object.
1491 const int32_t count_offset = mirror::String::CountOffset().Int32Value();
1492 const int32_t value_offset = mirror::String::ValueOffset().Int32Value();
1493
1494 // Note that the null check must have been done earlier.
1495 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1496
1497 // Take slow path and throw if input can be and is null.
1498 SlowPathCodeARMVIXL* slow_path = nullptr;
1499 const bool can_slow_path = invoke->InputAt(1)->CanBeNull();
1500 if (can_slow_path) {
1501 slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1502 codegen_->AddSlowPath(slow_path);
xueliang.zhongf51bc622016-11-04 09:23:32 +00001503 __ CompareAndBranchIfZero(arg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01001504 }
1505
1506 // Reference equality check, return 0 if same reference.
1507 __ Subs(out, str, arg);
1508 __ B(eq, &end);
1509
Anton Kirilov5ec62182016-10-13 20:16:02 +01001510 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001511 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001512 __ Ldr(temp3, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001513 __ Ldr(temp2, MemOperand(arg, count_offset));
1514 // Extract lengths from the `count` fields.
1515 __ Lsr(temp0, temp3, 1u);
1516 __ Lsr(temp1, temp2, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001517 } else {
1518 // Load lengths of this and argument strings.
1519 __ Ldr(temp0, MemOperand(str, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001520 __ Ldr(temp1, MemOperand(arg, count_offset));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001521 }
1522 // out = length diff.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001523 __ Subs(out, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001524 // temp0 = min(len(str), len(arg)).
1525
1526 {
Artem Serov0fb37192016-12-06 18:13:40 +00001527 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1528 2 * kMaxInstructionSizeInBytes,
1529 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001530
1531 __ it(gt);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001532 __ mov(gt, temp0, temp1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001533 }
1534
Anton Kirilov5ec62182016-10-13 20:16:02 +01001535 // Shorter string is empty?
xueliang.zhongf51bc622016-11-04 09:23:32 +00001536 // Note that mirror::kUseStringCompression==true introduces lots of instructions,
1537 // which makes &end label far away from this branch and makes it not 'CBZ-encodable'.
1538 __ CompareAndBranchIfZero(temp0, &end, mirror::kUseStringCompression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001539
1540 if (mirror::kUseStringCompression) {
1541 // Check if both strings using same compression style to use this comparison loop.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001542 __ Eors(temp2, temp2, temp3);
1543 __ Lsrs(temp2, temp2, 1u);
1544 __ B(cs, &different_compression);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001545 // For string compression, calculate the number of bytes to compare (not chars).
1546 // This could in theory exceed INT32_MAX, so treat temp0 as unsigned.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001547 __ Lsls(temp3, temp3, 31u); // Extract purely the compression flag.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001548
Artem Serov0fb37192016-12-06 18:13:40 +00001549 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1550 2 * kMaxInstructionSizeInBytes,
1551 CodeBufferCheckScope::kMaximumSize);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001552
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001553 __ it(ne);
1554 __ add(ne, temp0, temp0, temp0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001555 }
1556
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001557 // Store offset of string value in preparation for comparison loop.
1558 __ Mov(temp1, value_offset);
1559
Anton Kirilov5ec62182016-10-13 20:16:02 +01001560 // Assertions that must hold in order to compare multiple characters at a time.
1561 CHECK_ALIGNED(value_offset, 8);
1562 static_assert(IsAligned<8>(kObjectAlignment),
1563 "String data must be 8-byte aligned for unrolled CompareTo loop.");
1564
Scott Wakelingb77051e2016-11-21 19:46:00 +00001565 const unsigned char_size = Primitive::ComponentSize(Primitive::kPrimChar);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001566 DCHECK_EQ(char_size, 2u);
1567
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001568 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
1569
Anton Kirilov5ec62182016-10-13 20:16:02 +01001570 vixl32::Label find_char_diff_2nd_cmp;
1571 // Unrolled loop comparing 4x16-bit chars per iteration (ok because of string data alignment).
1572 __ Bind(&loop);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001573 vixl32::Register temp_reg = temps.Acquire();
Anton Kirilov5ec62182016-10-13 20:16:02 +01001574 __ Ldr(temp_reg, MemOperand(str, temp1));
1575 __ Ldr(temp2, MemOperand(arg, temp1));
1576 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001577 __ B(ne, &find_char_diff, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001578 __ Add(temp1, temp1, char_size * 2);
1579
1580 __ Ldr(temp_reg, MemOperand(str, temp1));
1581 __ Ldr(temp2, MemOperand(arg, temp1));
1582 __ Cmp(temp_reg, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001583 __ B(ne, &find_char_diff_2nd_cmp, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001584 __ Add(temp1, temp1, char_size * 2);
1585 // With string compression, we have compared 8 bytes, otherwise 4 chars.
1586 __ Subs(temp0, temp0, (mirror::kUseStringCompression ? 8 : 4));
Artem Serov517d9f62016-12-12 15:51:15 +00001587 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001588 __ B(&end);
1589
1590 __ Bind(&find_char_diff_2nd_cmp);
1591 if (mirror::kUseStringCompression) {
1592 __ Subs(temp0, temp0, 4); // 4 bytes previously compared.
Artem Serov517d9f62016-12-12 15:51:15 +00001593 __ B(ls, &end, /* far_target */ false); // Was the second comparison fully beyond the end?
Anton Kirilov5ec62182016-10-13 20:16:02 +01001594 } else {
1595 // Without string compression, we can start treating temp0 as signed
1596 // and rely on the signed comparison below.
1597 __ Sub(temp0, temp0, 2);
1598 }
1599
1600 // Find the single character difference.
1601 __ Bind(&find_char_diff);
1602 // Get the bit position of the first character that differs.
1603 __ Eor(temp1, temp2, temp_reg);
1604 __ Rbit(temp1, temp1);
1605 __ Clz(temp1, temp1);
1606
1607 // temp0 = number of characters remaining to compare.
1608 // (Without string compression, it could be < 1 if a difference is found by the second CMP
1609 // in the comparison loop, and after the end of the shorter string data).
1610
1611 // Without string compression (temp1 >> 4) = character where difference occurs between the last
1612 // two words compared, in the interval [0,1].
1613 // (0 for low half-word different, 1 for high half-word different).
1614 // With string compression, (temp1 << 3) = byte where the difference occurs,
1615 // in the interval [0,3].
1616
1617 // If temp0 <= (temp1 >> (kUseStringCompression ? 3 : 4)), the difference occurs outside
1618 // the remaining string data, so just return length diff (out).
1619 // The comparison is unsigned for string compression, otherwise signed.
1620 __ Cmp(temp0, Operand(temp1, vixl32::LSR, (mirror::kUseStringCompression ? 3 : 4)));
Artem Serov517d9f62016-12-12 15:51:15 +00001621 __ B((mirror::kUseStringCompression ? ls : le), &end, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001622
Anton Kirilov5ec62182016-10-13 20:16:02 +01001623 // Extract the characters and calculate the difference.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001624 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001625 // For compressed strings we need to clear 0x7 from temp1, for uncompressed we need to clear
1626 // 0xf. We also need to prepare the character extraction mask `uncompressed ? 0xffffu : 0xffu`.
1627 // The compression flag is now in the highest bit of temp3, so let's play some tricks.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001628 __ Orr(temp3, temp3, 0xffu << 23); // uncompressed ? 0xff800000u : 0x7ff80000u
1629 __ Bic(temp1, temp1, Operand(temp3, vixl32::LSR, 31 - 3)); // &= ~(uncompressed ? 0xfu : 0x7u)
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001630 __ Asr(temp3, temp3, 7u); // uncompressed ? 0xffff0000u : 0xff0000u.
1631 __ Lsr(temp2, temp2, temp1); // Extract second character.
1632 __ Lsr(temp3, temp3, 16u); // uncompressed ? 0xffffu : 0xffu
1633 __ Lsr(out, temp_reg, temp1); // Extract first character.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001634 __ And(temp2, temp2, temp3);
1635 __ And(out, out, temp3);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001636 } else {
Anton Kirilovb88c4842016-11-14 14:37:00 +00001637 __ Bic(temp1, temp1, 0xf);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001638 __ Lsr(temp2, temp2, temp1);
1639 __ Lsr(out, temp_reg, temp1);
Anton Kirilovb88c4842016-11-14 14:37:00 +00001640 __ Movt(temp2, 0);
1641 __ Movt(out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001642 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01001643
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001644 __ Sub(out, out, temp2);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001645 temps.Release(temp_reg);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001646
1647 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001648 __ B(&end);
1649 __ Bind(&different_compression);
1650
1651 // Comparison for different compression style.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001652 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
1653 DCHECK_EQ(c_char_size, 1u);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001654
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001655 // We want to free up the temp3, currently holding `str.count`, for comparison.
1656 // So, we move it to the bottom bit of the iteration count `temp0` which we tnen
1657 // need to treat as unsigned. Start by freeing the bit with an ADD and continue
1658 // further down by a LSRS+SBC which will flip the meaning of the flag but allow
1659 // `subs temp0, #2; bhi different_compression_loop` to serve as the loop condition.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001660 __ Add(temp0, temp0, temp0); // Unlike LSL, this ADD is always 16-bit.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001661 // `temp1` will hold the compressed data pointer, `temp2` the uncompressed data pointer.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001662 __ Mov(temp1, str);
1663 __ Mov(temp2, arg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001664 __ Lsrs(temp3, temp3, 1u); // Continue the move of the compression flag.
1665 {
Artem Serov0fb37192016-12-06 18:13:40 +00001666 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1667 3 * kMaxInstructionSizeInBytes,
1668 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001669 __ itt(cs); // Interleave with selection of temp1 and temp2.
1670 __ mov(cs, temp1, arg); // Preserves flags.
1671 __ mov(cs, temp2, str); // Preserves flags.
1672 }
Anton Kirilovb88c4842016-11-14 14:37:00 +00001673 __ Sbc(temp0, temp0, 0); // Complete the move of the compression flag.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001674
1675 // Adjust temp1 and temp2 from string pointers to data pointers.
Anton Kirilovb88c4842016-11-14 14:37:00 +00001676 __ Add(temp1, temp1, value_offset);
1677 __ Add(temp2, temp2, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001678
1679 vixl32::Label different_compression_loop;
1680 vixl32::Label different_compression_diff;
1681
1682 // Main loop for different compression.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001683 temp_reg = temps.Acquire();
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001684 __ Bind(&different_compression_loop);
1685 __ Ldrb(temp_reg, MemOperand(temp1, c_char_size, PostIndex));
1686 __ Ldrh(temp3, MemOperand(temp2, char_size, PostIndex));
Anton Kirilovb88c4842016-11-14 14:37:00 +00001687 __ Cmp(temp_reg, temp3);
Artem Serov517d9f62016-12-12 15:51:15 +00001688 __ B(ne, &different_compression_diff, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001689 __ Subs(temp0, temp0, 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001690 __ B(hi, &different_compression_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001691 __ B(&end);
1692
1693 // Calculate the difference.
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001694 __ Bind(&different_compression_diff);
1695 __ Sub(out, temp_reg, temp3);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001696 temps.Release(temp_reg);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001697 // Flip the difference if the `arg` is compressed.
1698 // `temp0` contains inverted `str` compression flag, i.e the same as `arg` compression flag.
1699 __ Lsrs(temp0, temp0, 1u);
1700 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1701 "Expecting 0=compressed, 1=uncompressed");
1702
Artem Serov0fb37192016-12-06 18:13:40 +00001703 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1704 2 * kMaxInstructionSizeInBytes,
1705 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001706 __ it(cc);
1707 __ rsb(cc, out, out, 0);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001708 }
1709
1710 __ Bind(&end);
1711
1712 if (can_slow_path) {
1713 __ Bind(slow_path->GetExitLabel());
1714 }
1715}
1716
1717void IntrinsicLocationsBuilderARMVIXL::VisitStringEquals(HInvoke* invoke) {
1718 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1719 LocationSummary::kNoCall,
1720 kIntrinsified);
1721 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1722 locations->SetInAt(0, Location::RequiresRegister());
1723 locations->SetInAt(1, Location::RequiresRegister());
1724 // Temporary registers to store lengths of strings and for calculations.
1725 // Using instruction cbz requires a low register, so explicitly set a temp to be R0.
1726 locations->AddTemp(LocationFrom(r0));
1727 locations->AddTemp(Location::RequiresRegister());
1728 locations->AddTemp(Location::RequiresRegister());
1729
1730 locations->SetOut(Location::RequiresRegister());
1731}
1732
1733void IntrinsicCodeGeneratorARMVIXL::VisitStringEquals(HInvoke* invoke) {
1734 ArmVIXLAssembler* assembler = GetAssembler();
1735 LocationSummary* locations = invoke->GetLocations();
1736
1737 vixl32::Register str = InputRegisterAt(invoke, 0);
1738 vixl32::Register arg = InputRegisterAt(invoke, 1);
1739 vixl32::Register out = OutputRegister(invoke);
1740
1741 vixl32::Register temp = RegisterFrom(locations->GetTemp(0));
1742 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1));
1743 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2));
1744
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001745 vixl32::Label loop;
Anton Kirilov5ec62182016-10-13 20:16:02 +01001746 vixl32::Label end;
1747 vixl32::Label return_true;
1748 vixl32::Label return_false;
Anton Kirilov6f644202017-02-27 18:29:45 +00001749 vixl32::Label* final_label = codegen_->GetFinalLabel(invoke, &end);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001750
1751 // Get offsets of count, value, and class fields within a string object.
1752 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
1753 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
1754 const uint32_t class_offset = mirror::Object::ClassOffset().Uint32Value();
1755
1756 // Note that the null check must have been done earlier.
1757 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1758
1759 StringEqualsOptimizations optimizations(invoke);
1760 if (!optimizations.GetArgumentNotNull()) {
1761 // Check if input is null, return false if it is.
xueliang.zhongf51bc622016-11-04 09:23:32 +00001762 __ CompareAndBranchIfZero(arg, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001763 }
1764
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001765 // Reference equality check, return true if same reference.
1766 __ Cmp(str, arg);
Artem Serov517d9f62016-12-12 15:51:15 +00001767 __ B(eq, &return_true, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001768
Anton Kirilov5ec62182016-10-13 20:16:02 +01001769 if (!optimizations.GetArgumentIsString()) {
1770 // Instanceof check for the argument by comparing class fields.
1771 // All string objects must have the same type since String cannot be subclassed.
1772 // Receiver must be a string object, so its class field is equal to all strings' class fields.
1773 // If the argument is a string object, its class field must be equal to receiver's class field.
1774 __ Ldr(temp, MemOperand(str, class_offset));
1775 __ Ldr(temp1, MemOperand(arg, class_offset));
1776 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001777 __ B(ne, &return_false, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001778 }
1779
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001780 // Load `count` fields of this and argument strings.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001781 __ Ldr(temp, MemOperand(str, count_offset));
1782 __ Ldr(temp1, MemOperand(arg, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001783 // Check if `count` fields are equal, return false if they're not.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001784 // Also compares the compression style, if differs return false.
1785 __ Cmp(temp, temp1);
Artem Serov517d9f62016-12-12 15:51:15 +00001786 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001787 // Return true if both strings are empty. Even with string compression `count == 0` means empty.
1788 static_assert(static_cast<uint32_t>(mirror::StringCompressionFlag::kCompressed) == 0u,
1789 "Expecting 0=compressed, 1=uncompressed");
xueliang.zhongf51bc622016-11-04 09:23:32 +00001790 __ CompareAndBranchIfZero(temp, &return_true, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001791
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001792 // Assertions that must hold in order to compare strings 4 bytes at a time.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001793 DCHECK_ALIGNED(value_offset, 4);
1794 static_assert(IsAligned<4>(kObjectAlignment), "String data must be aligned for fast compare.");
1795
1796 if (mirror::kUseStringCompression) {
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001797 // For string compression, calculate the number of bytes to compare (not chars).
1798 // This could in theory exceed INT32_MAX, so treat temp as unsigned.
1799 __ Lsrs(temp, temp, 1u); // Extract length and check compression flag.
Artem Serov0fb37192016-12-06 18:13:40 +00001800 ExactAssemblyScope aas(assembler->GetVIXLAssembler(),
1801 2 * kMaxInstructionSizeInBytes,
1802 CodeBufferCheckScope::kMaximumSize);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001803 __ it(cs); // If uncompressed,
1804 __ add(cs, temp, temp, temp); // double the byte count.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001805 }
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001806
1807 // Store offset of string value in preparation for comparison loop.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001808 __ Mov(temp1, value_offset);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001809
1810 // Loop to compare strings 4 bytes at a time starting at the front of the string.
1811 // Ok to do this because strings are zero-padded to kObjectAlignment.
Anton Kirilov5ec62182016-10-13 20:16:02 +01001812 __ Bind(&loop);
1813 __ Ldr(out, MemOperand(str, temp1));
1814 __ Ldr(temp2, MemOperand(arg, temp1));
Scott Wakelingb77051e2016-11-21 19:46:00 +00001815 __ Add(temp1, temp1, Operand::From(sizeof(uint32_t)));
Anton Kirilov5ec62182016-10-13 20:16:02 +01001816 __ Cmp(out, temp2);
Artem Serov517d9f62016-12-12 15:51:15 +00001817 __ B(ne, &return_false, /* far_target */ false);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01001818 // With string compression, we have compared 4 bytes, otherwise 2 chars.
1819 __ Subs(temp, temp, mirror::kUseStringCompression ? 4 : 2);
Artem Serov517d9f62016-12-12 15:51:15 +00001820 __ B(hi, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001821
1822 // Return true and exit the function.
1823 // If loop does not result in returning false, we return true.
1824 __ Bind(&return_true);
1825 __ Mov(out, 1);
Anton Kirilov6f644202017-02-27 18:29:45 +00001826 __ B(final_label);
Anton Kirilov5ec62182016-10-13 20:16:02 +01001827
1828 // Return false and exit the function.
1829 __ Bind(&return_false);
1830 __ Mov(out, 0);
Anton Kirilov6f644202017-02-27 18:29:45 +00001831
1832 if (end.IsReferenced()) {
1833 __ Bind(&end);
1834 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01001835}
1836
1837static void GenerateVisitStringIndexOf(HInvoke* invoke,
1838 ArmVIXLAssembler* assembler,
1839 CodeGeneratorARMVIXL* codegen,
1840 ArenaAllocator* allocator,
1841 bool start_at_zero) {
1842 LocationSummary* locations = invoke->GetLocations();
1843
1844 // Note that the null check must have been done earlier.
1845 DCHECK(!invoke->CanDoImplicitNullCheckOn(invoke->InputAt(0)));
1846
1847 // Check for code points > 0xFFFF. Either a slow-path check when we don't know statically,
1848 // or directly dispatch for a large constant, or omit slow-path for a small constant or a char.
1849 SlowPathCodeARMVIXL* slow_path = nullptr;
1850 HInstruction* code_point = invoke->InputAt(1);
1851 if (code_point->IsIntConstant()) {
Anton Kirilov644032c2016-12-06 17:51:43 +00001852 if (static_cast<uint32_t>(Int32ConstantFrom(code_point)) >
Anton Kirilov5ec62182016-10-13 20:16:02 +01001853 std::numeric_limits<uint16_t>::max()) {
1854 // Always needs the slow-path. We could directly dispatch to it, but this case should be
1855 // rare, so for simplicity just put the full slow-path down and branch unconditionally.
1856 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1857 codegen->AddSlowPath(slow_path);
1858 __ B(slow_path->GetEntryLabel());
1859 __ Bind(slow_path->GetExitLabel());
1860 return;
1861 }
1862 } else if (code_point->GetType() != Primitive::kPrimChar) {
1863 vixl32::Register char_reg = InputRegisterAt(invoke, 1);
1864 // 0xffff is not modified immediate but 0x10000 is, so use `>= 0x10000` instead of `> 0xffff`.
1865 __ Cmp(char_reg, static_cast<uint32_t>(std::numeric_limits<uint16_t>::max()) + 1);
1866 slow_path = new (allocator) IntrinsicSlowPathARMVIXL(invoke);
1867 codegen->AddSlowPath(slow_path);
1868 __ B(hs, slow_path->GetEntryLabel());
1869 }
1870
1871 if (start_at_zero) {
1872 vixl32::Register tmp_reg = RegisterFrom(locations->GetTemp(0));
1873 DCHECK(tmp_reg.Is(r2));
1874 // Start-index = 0.
1875 __ Mov(tmp_reg, 0);
1876 }
1877
1878 codegen->InvokeRuntime(kQuickIndexOf, invoke, invoke->GetDexPc(), slow_path);
1879 CheckEntrypointTypes<kQuickIndexOf, int32_t, void*, uint32_t, uint32_t>();
1880
1881 if (slow_path != nullptr) {
1882 __ Bind(slow_path->GetExitLabel());
1883 }
1884}
1885
1886void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1887 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1888 LocationSummary::kCallOnMainAndSlowPath,
1889 kIntrinsified);
1890 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1891 // best to align the inputs accordingly.
1892 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1893 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1894 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1895 locations->SetOut(LocationFrom(r0));
1896
1897 // Need to send start-index=0.
1898 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
1899}
1900
1901void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOf(HInvoke* invoke) {
1902 GenerateVisitStringIndexOf(
1903 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ true);
1904}
1905
1906void IntrinsicLocationsBuilderARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1907 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1908 LocationSummary::kCallOnMainAndSlowPath,
1909 kIntrinsified);
1910 // We have a hand-crafted assembly stub that follows the runtime calling convention. So it's
1911 // best to align the inputs accordingly.
1912 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1913 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1914 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1915 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1916 locations->SetOut(LocationFrom(r0));
1917}
1918
1919void IntrinsicCodeGeneratorARMVIXL::VisitStringIndexOfAfter(HInvoke* invoke) {
1920 GenerateVisitStringIndexOf(
1921 invoke, GetAssembler(), codegen_, GetAllocator(), /* start_at_zero */ false);
1922}
1923
1924void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1925 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1926 LocationSummary::kCallOnMainAndSlowPath,
1927 kIntrinsified);
1928 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1929 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1930 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1931 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1932 locations->SetInAt(3, LocationFrom(calling_convention.GetRegisterAt(3)));
1933 locations->SetOut(LocationFrom(r0));
1934}
1935
1936void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromBytes(HInvoke* invoke) {
1937 ArmVIXLAssembler* assembler = GetAssembler();
1938 vixl32::Register byte_array = InputRegisterAt(invoke, 0);
1939 __ Cmp(byte_array, 0);
1940 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1941 codegen_->AddSlowPath(slow_path);
1942 __ B(eq, slow_path->GetEntryLabel());
1943
1944 codegen_->InvokeRuntime(kQuickAllocStringFromBytes, invoke, invoke->GetDexPc(), slow_path);
1945 CheckEntrypointTypes<kQuickAllocStringFromBytes, void*, void*, int32_t, int32_t, int32_t>();
1946 __ Bind(slow_path->GetExitLabel());
1947}
1948
1949void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1950 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1951 LocationSummary::kCallOnMainOnly,
1952 kIntrinsified);
1953 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1954 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1955 locations->SetInAt(1, LocationFrom(calling_convention.GetRegisterAt(1)));
1956 locations->SetInAt(2, LocationFrom(calling_convention.GetRegisterAt(2)));
1957 locations->SetOut(LocationFrom(r0));
1958}
1959
1960void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromChars(HInvoke* invoke) {
1961 // No need to emit code checking whether `locations->InAt(2)` is a null
1962 // pointer, as callers of the native method
1963 //
1964 // java.lang.StringFactory.newStringFromChars(int offset, int charCount, char[] data)
1965 //
1966 // all include a null check on `data` before calling that method.
1967 codegen_->InvokeRuntime(kQuickAllocStringFromChars, invoke, invoke->GetDexPc());
1968 CheckEntrypointTypes<kQuickAllocStringFromChars, void*, int32_t, int32_t, void*>();
1969}
1970
1971void IntrinsicLocationsBuilderARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1972 LocationSummary* locations = new (arena_) LocationSummary(invoke,
1973 LocationSummary::kCallOnMainAndSlowPath,
1974 kIntrinsified);
1975 InvokeRuntimeCallingConventionARMVIXL calling_convention;
1976 locations->SetInAt(0, LocationFrom(calling_convention.GetRegisterAt(0)));
1977 locations->SetOut(LocationFrom(r0));
1978}
1979
1980void IntrinsicCodeGeneratorARMVIXL::VisitStringNewStringFromString(HInvoke* invoke) {
1981 ArmVIXLAssembler* assembler = GetAssembler();
1982 vixl32::Register string_to_copy = InputRegisterAt(invoke, 0);
1983 __ Cmp(string_to_copy, 0);
1984 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
1985 codegen_->AddSlowPath(slow_path);
1986 __ B(eq, slow_path->GetEntryLabel());
1987
1988 codegen_->InvokeRuntime(kQuickAllocStringFromString, invoke, invoke->GetDexPc(), slow_path);
1989 CheckEntrypointTypes<kQuickAllocStringFromString, void*, void*>();
1990
1991 __ Bind(slow_path->GetExitLabel());
1992}
1993
1994void IntrinsicLocationsBuilderARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
1995 // The only read barrier implementation supporting the
1996 // SystemArrayCopy intrinsic is the Baker-style read barriers.
1997 if (kEmitCompilerReadBarrier && !kUseBakerReadBarrier) {
1998 return;
1999 }
2000
2001 CodeGenerator::CreateSystemArrayCopyLocationSummary(invoke);
2002 LocationSummary* locations = invoke->GetLocations();
2003 if (locations == nullptr) {
2004 return;
2005 }
2006
2007 HIntConstant* src_pos = invoke->InputAt(1)->AsIntConstant();
2008 HIntConstant* dest_pos = invoke->InputAt(3)->AsIntConstant();
2009 HIntConstant* length = invoke->InputAt(4)->AsIntConstant();
2010
2011 if (src_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(src_pos->GetValue())) {
2012 locations->SetInAt(1, Location::RequiresRegister());
2013 }
2014 if (dest_pos != nullptr && !assembler_->ShifterOperandCanAlwaysHold(dest_pos->GetValue())) {
2015 locations->SetInAt(3, Location::RequiresRegister());
2016 }
2017 if (length != nullptr && !assembler_->ShifterOperandCanAlwaysHold(length->GetValue())) {
2018 locations->SetInAt(4, Location::RequiresRegister());
2019 }
2020 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2021 // Temporary register IP cannot be used in
2022 // ReadBarrierSystemArrayCopySlowPathARM (because that register
2023 // is clobbered by ReadBarrierMarkRegX entry points). Get an extra
2024 // temporary register from the register allocator.
2025 locations->AddTemp(Location::RequiresRegister());
Vladimir Markoeee1c0e2017-04-21 17:58:41 +01002026 CodeGeneratorARMVIXL* arm_codegen = down_cast<CodeGeneratorARMVIXL*>(codegen_);
2027 arm_codegen->MaybeAddBakerCcEntrypointTempForFields(locations);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002028 }
2029}
2030
2031static void CheckPosition(ArmVIXLAssembler* assembler,
2032 Location pos,
2033 vixl32::Register input,
2034 Location length,
2035 SlowPathCodeARMVIXL* slow_path,
2036 vixl32::Register temp,
2037 bool length_is_input_length = false) {
2038 // Where is the length in the Array?
2039 const uint32_t length_offset = mirror::Array::LengthOffset().Uint32Value();
2040
2041 if (pos.IsConstant()) {
2042 int32_t pos_const = Int32ConstantFrom(pos);
2043 if (pos_const == 0) {
2044 if (!length_is_input_length) {
2045 // Check that length(input) >= length.
2046 __ Ldr(temp, MemOperand(input, length_offset));
2047 if (length.IsConstant()) {
2048 __ Cmp(temp, Int32ConstantFrom(length));
2049 } else {
2050 __ Cmp(temp, RegisterFrom(length));
2051 }
2052 __ B(lt, slow_path->GetEntryLabel());
2053 }
2054 } else {
2055 // Check that length(input) >= pos.
2056 __ Ldr(temp, MemOperand(input, length_offset));
2057 __ Subs(temp, temp, pos_const);
2058 __ B(lt, slow_path->GetEntryLabel());
2059
2060 // Check that (length(input) - pos) >= length.
2061 if (length.IsConstant()) {
2062 __ Cmp(temp, Int32ConstantFrom(length));
2063 } else {
2064 __ Cmp(temp, RegisterFrom(length));
2065 }
2066 __ B(lt, slow_path->GetEntryLabel());
2067 }
2068 } else if (length_is_input_length) {
2069 // The only way the copy can succeed is if pos is zero.
2070 vixl32::Register pos_reg = RegisterFrom(pos);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002071 __ CompareAndBranchIfNonZero(pos_reg, slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002072 } else {
2073 // Check that pos >= 0.
2074 vixl32::Register pos_reg = RegisterFrom(pos);
2075 __ Cmp(pos_reg, 0);
2076 __ B(lt, slow_path->GetEntryLabel());
2077
2078 // Check that pos <= length(input).
2079 __ Ldr(temp, MemOperand(input, length_offset));
2080 __ Subs(temp, temp, pos_reg);
2081 __ B(lt, slow_path->GetEntryLabel());
2082
2083 // Check that (length(input) - pos) >= length.
2084 if (length.IsConstant()) {
2085 __ Cmp(temp, Int32ConstantFrom(length));
2086 } else {
2087 __ Cmp(temp, RegisterFrom(length));
2088 }
2089 __ B(lt, slow_path->GetEntryLabel());
2090 }
2091}
2092
2093void IntrinsicCodeGeneratorARMVIXL::VisitSystemArrayCopy(HInvoke* invoke) {
2094 // The only read barrier implementation supporting the
2095 // SystemArrayCopy intrinsic is the Baker-style read barriers.
2096 DCHECK(!kEmitCompilerReadBarrier || kUseBakerReadBarrier);
2097
2098 ArmVIXLAssembler* assembler = GetAssembler();
2099 LocationSummary* locations = invoke->GetLocations();
2100
2101 uint32_t class_offset = mirror::Object::ClassOffset().Int32Value();
2102 uint32_t super_offset = mirror::Class::SuperClassOffset().Int32Value();
2103 uint32_t component_offset = mirror::Class::ComponentTypeOffset().Int32Value();
2104 uint32_t primitive_offset = mirror::Class::PrimitiveTypeOffset().Int32Value();
2105 uint32_t monitor_offset = mirror::Object::MonitorOffset().Int32Value();
2106
2107 vixl32::Register src = InputRegisterAt(invoke, 0);
2108 Location src_pos = locations->InAt(1);
2109 vixl32::Register dest = InputRegisterAt(invoke, 2);
2110 Location dest_pos = locations->InAt(3);
2111 Location length = locations->InAt(4);
2112 Location temp1_loc = locations->GetTemp(0);
2113 vixl32::Register temp1 = RegisterFrom(temp1_loc);
2114 Location temp2_loc = locations->GetTemp(1);
2115 vixl32::Register temp2 = RegisterFrom(temp2_loc);
2116 Location temp3_loc = locations->GetTemp(2);
2117 vixl32::Register temp3 = RegisterFrom(temp3_loc);
2118
2119 SlowPathCodeARMVIXL* intrinsic_slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
2120 codegen_->AddSlowPath(intrinsic_slow_path);
2121
2122 vixl32::Label conditions_on_positions_validated;
2123 SystemArrayCopyOptimizations optimizations(invoke);
2124
2125 // If source and destination are the same, we go to slow path if we need to do
2126 // forward copying.
2127 if (src_pos.IsConstant()) {
2128 int32_t src_pos_constant = Int32ConstantFrom(src_pos);
2129 if (dest_pos.IsConstant()) {
2130 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2131 if (optimizations.GetDestinationIsSource()) {
2132 // Checked when building locations.
2133 DCHECK_GE(src_pos_constant, dest_pos_constant);
2134 } else if (src_pos_constant < dest_pos_constant) {
2135 __ Cmp(src, dest);
2136 __ B(eq, intrinsic_slow_path->GetEntryLabel());
2137 }
2138
2139 // Checked when building locations.
2140 DCHECK(!optimizations.GetDestinationIsSource()
2141 || (src_pos_constant >= Int32ConstantFrom(dest_pos)));
2142 } else {
2143 if (!optimizations.GetDestinationIsSource()) {
2144 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002145 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002146 }
2147 __ Cmp(RegisterFrom(dest_pos), src_pos_constant);
2148 __ B(gt, intrinsic_slow_path->GetEntryLabel());
2149 }
2150 } else {
2151 if (!optimizations.GetDestinationIsSource()) {
2152 __ Cmp(src, dest);
Artem Serov517d9f62016-12-12 15:51:15 +00002153 __ B(ne, &conditions_on_positions_validated, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002154 }
2155 if (dest_pos.IsConstant()) {
2156 int32_t dest_pos_constant = Int32ConstantFrom(dest_pos);
2157 __ Cmp(RegisterFrom(src_pos), dest_pos_constant);
2158 } else {
2159 __ Cmp(RegisterFrom(src_pos), RegisterFrom(dest_pos));
2160 }
2161 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2162 }
2163
2164 __ Bind(&conditions_on_positions_validated);
2165
2166 if (!optimizations.GetSourceIsNotNull()) {
2167 // Bail out if the source is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002168 __ CompareAndBranchIfZero(src, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002169 }
2170
2171 if (!optimizations.GetDestinationIsNotNull() && !optimizations.GetDestinationIsSource()) {
2172 // Bail out if the destination is null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002173 __ CompareAndBranchIfZero(dest, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002174 }
2175
2176 // If the length is negative, bail out.
2177 // We have already checked in the LocationsBuilder for the constant case.
2178 if (!length.IsConstant() &&
2179 !optimizations.GetCountIsSourceLength() &&
2180 !optimizations.GetCountIsDestinationLength()) {
2181 __ Cmp(RegisterFrom(length), 0);
2182 __ B(lt, intrinsic_slow_path->GetEntryLabel());
2183 }
2184
2185 // Validity checks: source.
2186 CheckPosition(assembler,
2187 src_pos,
2188 src,
2189 length,
2190 intrinsic_slow_path,
2191 temp1,
2192 optimizations.GetCountIsSourceLength());
2193
2194 // Validity checks: dest.
2195 CheckPosition(assembler,
2196 dest_pos,
2197 dest,
2198 length,
2199 intrinsic_slow_path,
2200 temp1,
2201 optimizations.GetCountIsDestinationLength());
2202
2203 if (!optimizations.GetDoesNotNeedTypeCheck()) {
2204 // Check whether all elements of the source array are assignable to the component
2205 // type of the destination array. We do two checks: the classes are the same,
2206 // or the destination is Object[]. If none of these checks succeed, we go to the
2207 // slow path.
2208
2209 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2210 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2211 // /* HeapReference<Class> */ temp1 = src->klass_
2212 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2213 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2214 // Bail out if the source is not a non primitive array.
2215 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2216 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2217 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002218 __ CompareAndBranchIfZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002219 // If heap poisoning is enabled, `temp1` has been unpoisoned
2220 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2221 // /* uint16_t */ temp1 = static_cast<uint16>(temp1->primitive_type_);
2222 __ Ldrh(temp1, MemOperand(temp1, primitive_offset));
2223 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002224 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002225 }
2226
2227 // /* HeapReference<Class> */ temp1 = dest->klass_
2228 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2229 invoke, temp1_loc, dest, class_offset, temp2_loc, /* needs_null_check */ false);
2230
2231 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2232 // Bail out if the destination is not a non primitive array.
2233 //
2234 // Register `temp1` is not trashed by the read barrier emitted
2235 // by GenerateFieldLoadWithBakerReadBarrier below, as that
2236 // method produces a call to a ReadBarrierMarkRegX entry point,
2237 // which saves all potentially live registers, including
2238 // temporaries such a `temp1`.
2239 // /* HeapReference<Class> */ temp2 = temp1->component_type_
2240 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2241 invoke, temp2_loc, temp1, component_offset, temp3_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002242 __ CompareAndBranchIfZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002243 // If heap poisoning is enabled, `temp2` has been unpoisoned
2244 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2245 // /* uint16_t */ temp2 = static_cast<uint16>(temp2->primitive_type_);
2246 __ Ldrh(temp2, MemOperand(temp2, primitive_offset));
2247 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002248 __ CompareAndBranchIfNonZero(temp2, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002249 }
2250
2251 // For the same reason given earlier, `temp1` is not trashed by the
2252 // read barrier emitted by GenerateFieldLoadWithBakerReadBarrier below.
2253 // /* HeapReference<Class> */ temp2 = src->klass_
2254 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2255 invoke, temp2_loc, src, class_offset, temp3_loc, /* needs_null_check */ false);
2256 // Note: if heap poisoning is on, we are comparing two unpoisoned references here.
2257 __ Cmp(temp1, temp2);
2258
2259 if (optimizations.GetDestinationIsTypedObjectArray()) {
2260 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002261 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002262 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2263 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2264 invoke, temp1_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
2265 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2266 // We do not need to emit a read barrier for the following
2267 // heap reference load, as `temp1` is only used in a
2268 // comparison with null below, and this reference is not
2269 // kept afterwards.
2270 __ Ldr(temp1, MemOperand(temp1, super_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002271 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002272 __ Bind(&do_copy);
2273 } else {
2274 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2275 }
2276 } else {
2277 // Non read barrier code.
2278
2279 // /* HeapReference<Class> */ temp1 = dest->klass_
2280 __ Ldr(temp1, MemOperand(dest, class_offset));
2281 // /* HeapReference<Class> */ temp2 = src->klass_
2282 __ Ldr(temp2, MemOperand(src, class_offset));
2283 bool did_unpoison = false;
2284 if (!optimizations.GetDestinationIsNonPrimitiveArray() ||
2285 !optimizations.GetSourceIsNonPrimitiveArray()) {
2286 // One or two of the references need to be unpoisoned. Unpoison them
2287 // both to make the identity check valid.
2288 assembler->MaybeUnpoisonHeapReference(temp1);
2289 assembler->MaybeUnpoisonHeapReference(temp2);
2290 did_unpoison = true;
2291 }
2292
2293 if (!optimizations.GetDestinationIsNonPrimitiveArray()) {
2294 // Bail out if the destination is not a non primitive array.
2295 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2296 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002297 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002298 assembler->MaybeUnpoisonHeapReference(temp3);
2299 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2300 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2301 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002302 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002303 }
2304
2305 if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2306 // Bail out if the source is not a non primitive array.
2307 // /* HeapReference<Class> */ temp3 = temp2->component_type_
2308 __ Ldr(temp3, MemOperand(temp2, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002309 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002310 assembler->MaybeUnpoisonHeapReference(temp3);
2311 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2312 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2313 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002314 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002315 }
2316
2317 __ Cmp(temp1, temp2);
2318
2319 if (optimizations.GetDestinationIsTypedObjectArray()) {
2320 vixl32::Label do_copy;
Artem Serov517d9f62016-12-12 15:51:15 +00002321 __ B(eq, &do_copy, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002322 if (!did_unpoison) {
2323 assembler->MaybeUnpoisonHeapReference(temp1);
2324 }
2325 // /* HeapReference<Class> */ temp1 = temp1->component_type_
2326 __ Ldr(temp1, MemOperand(temp1, component_offset));
2327 assembler->MaybeUnpoisonHeapReference(temp1);
2328 // /* HeapReference<Class> */ temp1 = temp1->super_class_
2329 __ Ldr(temp1, MemOperand(temp1, super_offset));
2330 // No need to unpoison the result, we're comparing against null.
xueliang.zhongf51bc622016-11-04 09:23:32 +00002331 __ CompareAndBranchIfNonZero(temp1, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002332 __ Bind(&do_copy);
2333 } else {
2334 __ B(ne, intrinsic_slow_path->GetEntryLabel());
2335 }
2336 }
2337 } else if (!optimizations.GetSourceIsNonPrimitiveArray()) {
2338 DCHECK(optimizations.GetDestinationIsNonPrimitiveArray());
2339 // Bail out if the source is not a non primitive array.
2340 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2341 // /* HeapReference<Class> */ temp1 = src->klass_
2342 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2343 invoke, temp1_loc, src, class_offset, temp2_loc, /* needs_null_check */ false);
2344 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2345 codegen_->GenerateFieldLoadWithBakerReadBarrier(
2346 invoke, temp3_loc, temp1, component_offset, temp2_loc, /* needs_null_check */ false);
xueliang.zhongf51bc622016-11-04 09:23:32 +00002347 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002348 // If heap poisoning is enabled, `temp3` has been unpoisoned
2349 // by the the previous call to GenerateFieldLoadWithBakerReadBarrier.
2350 } else {
2351 // /* HeapReference<Class> */ temp1 = src->klass_
2352 __ Ldr(temp1, MemOperand(src, class_offset));
2353 assembler->MaybeUnpoisonHeapReference(temp1);
2354 // /* HeapReference<Class> */ temp3 = temp1->component_type_
2355 __ Ldr(temp3, MemOperand(temp1, component_offset));
xueliang.zhongf51bc622016-11-04 09:23:32 +00002356 __ CompareAndBranchIfZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002357 assembler->MaybeUnpoisonHeapReference(temp3);
2358 }
2359 // /* uint16_t */ temp3 = static_cast<uint16>(temp3->primitive_type_);
2360 __ Ldrh(temp3, MemOperand(temp3, primitive_offset));
2361 static_assert(Primitive::kPrimNot == 0, "Expected 0 for kPrimNot");
xueliang.zhongf51bc622016-11-04 09:23:32 +00002362 __ CompareAndBranchIfNonZero(temp3, intrinsic_slow_path->GetEntryLabel());
Anton Kirilov5ec62182016-10-13 20:16:02 +01002363 }
2364
Roland Levillain1663d162017-03-17 15:15:21 +00002365 if (length.IsConstant() && Int32ConstantFrom(length) == 0) {
2366 // Null constant length: not need to emit the loop code at all.
Anton Kirilov5ec62182016-10-13 20:16:02 +01002367 } else {
Roland Levillain1663d162017-03-17 15:15:21 +00002368 vixl32::Label done;
2369 const Primitive::Type type = Primitive::kPrimNot;
2370 const int32_t element_size = Primitive::ComponentSize(type);
2371
2372 if (length.IsRegister()) {
2373 // Don't enter the copy loop if the length is null.
2374 __ CompareAndBranchIfZero(RegisterFrom(length), &done, /* is_far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002375 }
Roland Levillain1663d162017-03-17 15:15:21 +00002376
2377 if (kEmitCompilerReadBarrier && kUseBakerReadBarrier) {
2378 // TODO: Also convert this intrinsic to the IsGcMarking strategy?
2379
2380 // SystemArrayCopy implementation for Baker read barriers (see
2381 // also CodeGeneratorARM::GenerateReferenceLoadWithBakerReadBarrier):
2382 //
2383 // uint32_t rb_state = Lockword(src->monitor_).ReadBarrierState();
2384 // lfence; // Load fence or artificial data dependency to prevent load-load reordering
2385 // bool is_gray = (rb_state == ReadBarrier::GrayState());
2386 // if (is_gray) {
2387 // // Slow-path copy.
2388 // do {
2389 // *dest_ptr++ = MaybePoison(ReadBarrier::Mark(MaybeUnpoison(*src_ptr++)));
2390 // } while (src_ptr != end_ptr)
2391 // } else {
2392 // // Fast-path copy.
2393 // do {
2394 // *dest_ptr++ = *src_ptr++;
2395 // } while (src_ptr != end_ptr)
2396 // }
2397
2398 // /* int32_t */ monitor = src->monitor_
2399 __ Ldr(temp2, MemOperand(src, monitor_offset));
2400 // /* LockWord */ lock_word = LockWord(monitor)
2401 static_assert(sizeof(LockWord) == sizeof(int32_t),
2402 "art::LockWord and int32_t have different sizes.");
2403
2404 // Introduce a dependency on the lock_word including the rb_state,
2405 // which shall prevent load-load reordering without using
2406 // a memory barrier (which would be more expensive).
2407 // `src` is unchanged by this operation, but its value now depends
2408 // on `temp2`.
2409 __ Add(src, src, Operand(temp2, vixl32::LSR, 32));
2410
2411 // Compute the base source address in `temp1`.
2412 // Note that `temp1` (the base source address) is computed from
2413 // `src` (and `src_pos`) here, and thus honors the artificial
2414 // dependency of `src` on `temp2`.
2415 GenSystemArrayCopyBaseAddress(GetAssembler(), type, src, src_pos, temp1);
2416 // Compute the end source address in `temp3`.
2417 GenSystemArrayCopyEndAddress(GetAssembler(), type, length, temp1, temp3);
2418 // The base destination address is computed later, as `temp2` is
2419 // used for intermediate computations.
2420
2421 // Slow path used to copy array when `src` is gray.
2422 // Note that the base destination address is computed in `temp2`
2423 // by the slow path code.
2424 SlowPathCodeARMVIXL* read_barrier_slow_path =
2425 new (GetAllocator()) ReadBarrierSystemArrayCopySlowPathARMVIXL(invoke);
2426 codegen_->AddSlowPath(read_barrier_slow_path);
2427
2428 // Given the numeric representation, it's enough to check the low bit of the
2429 // rb_state. We do that by shifting the bit out of the lock word with LSRS
2430 // which can be a 16-bit instruction unlike the TST immediate.
2431 static_assert(ReadBarrier::WhiteState() == 0, "Expecting white to have value 0");
2432 static_assert(ReadBarrier::GrayState() == 1, "Expecting gray to have value 1");
2433 __ Lsrs(temp2, temp2, LockWord::kReadBarrierStateShift + 1);
2434 // Carry flag is the last bit shifted out by LSRS.
2435 __ B(cs, read_barrier_slow_path->GetEntryLabel());
2436
2437 // Fast-path copy.
2438 // Compute the base destination address in `temp2`.
2439 GenSystemArrayCopyBaseAddress(GetAssembler(), type, dest, dest_pos, temp2);
2440 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2441 // poison/unpoison.
2442 vixl32::Label loop;
2443 __ Bind(&loop);
2444 {
2445 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2446 const vixl32::Register temp_reg = temps.Acquire();
2447 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2448 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2449 }
2450 __ Cmp(temp1, temp3);
2451 __ B(ne, &loop, /* far_target */ false);
2452
2453 __ Bind(read_barrier_slow_path->GetExitLabel());
2454 } else {
2455 // Non read barrier code.
2456 // Compute the base source address in `temp1`.
2457 GenSystemArrayCopyBaseAddress(GetAssembler(), type, src, src_pos, temp1);
2458 // Compute the base destination address in `temp2`.
2459 GenSystemArrayCopyBaseAddress(GetAssembler(), type, dest, dest_pos, temp2);
2460 // Compute the end source address in `temp3`.
2461 GenSystemArrayCopyEndAddress(GetAssembler(), type, length, temp1, temp3);
2462 // Iterate over the arrays and do a raw copy of the objects. We don't need to
2463 // poison/unpoison.
2464 vixl32::Label loop;
2465 __ Bind(&loop);
2466 {
2467 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2468 const vixl32::Register temp_reg = temps.Acquire();
2469 __ Ldr(temp_reg, MemOperand(temp1, element_size, PostIndex));
2470 __ Str(temp_reg, MemOperand(temp2, element_size, PostIndex));
2471 }
2472 __ Cmp(temp1, temp3);
2473 __ B(ne, &loop, /* far_target */ false);
2474 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01002475 __ Bind(&done);
2476 }
2477
2478 // We only need one card marking on the destination array.
2479 codegen_->MarkGCCard(temp1, temp2, dest, NoReg, /* value_can_be_null */ false);
2480
2481 __ Bind(intrinsic_slow_path->GetExitLabel());
2482}
2483
2484static void CreateFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2485 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2486 // the code generator. Furthermore, the register allocator creates fixed live intervals
2487 // for all caller-saved registers because we are doing a function call. As a result, if
2488 // the input and output locations are unallocated, the register allocator runs out of
2489 // registers and fails; however, a debuggable graph is not the common case.
2490 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2491 return;
2492 }
2493
2494 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2495 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2496 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2497
2498 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2499 LocationSummary::kCallOnMainOnly,
2500 kIntrinsified);
2501 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2502
2503 locations->SetInAt(0, Location::RequiresFpuRegister());
2504 locations->SetOut(Location::RequiresFpuRegister());
2505 // Native code uses the soft float ABI.
2506 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2507 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2508}
2509
2510static void CreateFPFPToFPCallLocations(ArenaAllocator* arena, HInvoke* invoke) {
2511 // If the graph is debuggable, all callee-saved floating-point registers are blocked by
2512 // the code generator. Furthermore, the register allocator creates fixed live intervals
2513 // for all caller-saved registers because we are doing a function call. As a result, if
2514 // the input and output locations are unallocated, the register allocator runs out of
2515 // registers and fails; however, a debuggable graph is not the common case.
2516 if (invoke->GetBlock()->GetGraph()->IsDebuggable()) {
2517 return;
2518 }
2519
2520 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2521 DCHECK_EQ(invoke->InputAt(0)->GetType(), Primitive::kPrimDouble);
2522 DCHECK_EQ(invoke->InputAt(1)->GetType(), Primitive::kPrimDouble);
2523 DCHECK_EQ(invoke->GetType(), Primitive::kPrimDouble);
2524
2525 LocationSummary* const locations = new (arena) LocationSummary(invoke,
2526 LocationSummary::kCallOnMainOnly,
2527 kIntrinsified);
2528 const InvokeRuntimeCallingConventionARMVIXL calling_convention;
2529
2530 locations->SetInAt(0, Location::RequiresFpuRegister());
2531 locations->SetInAt(1, Location::RequiresFpuRegister());
2532 locations->SetOut(Location::RequiresFpuRegister());
2533 // Native code uses the soft float ABI.
2534 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(0)));
2535 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(1)));
2536 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(2)));
2537 locations->AddTemp(LocationFrom(calling_convention.GetRegisterAt(3)));
2538}
2539
2540static void GenFPToFPCall(HInvoke* invoke,
2541 ArmVIXLAssembler* assembler,
2542 CodeGeneratorARMVIXL* codegen,
2543 QuickEntrypointEnum entry) {
2544 LocationSummary* const locations = invoke->GetLocations();
2545
2546 DCHECK_EQ(invoke->GetNumberOfArguments(), 1U);
2547 DCHECK(locations->WillCall() && locations->Intrinsified());
2548
2549 // Native code uses the soft float ABI.
2550 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2551 RegisterFrom(locations->GetTemp(1)),
2552 InputDRegisterAt(invoke, 0));
2553 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2554 __ Vmov(OutputDRegister(invoke),
2555 RegisterFrom(locations->GetTemp(0)),
2556 RegisterFrom(locations->GetTemp(1)));
2557}
2558
2559static void GenFPFPToFPCall(HInvoke* invoke,
2560 ArmVIXLAssembler* assembler,
2561 CodeGeneratorARMVIXL* codegen,
2562 QuickEntrypointEnum entry) {
2563 LocationSummary* const locations = invoke->GetLocations();
2564
2565 DCHECK_EQ(invoke->GetNumberOfArguments(), 2U);
2566 DCHECK(locations->WillCall() && locations->Intrinsified());
2567
2568 // Native code uses the soft float ABI.
2569 __ Vmov(RegisterFrom(locations->GetTemp(0)),
2570 RegisterFrom(locations->GetTemp(1)),
2571 InputDRegisterAt(invoke, 0));
2572 __ Vmov(RegisterFrom(locations->GetTemp(2)),
2573 RegisterFrom(locations->GetTemp(3)),
2574 InputDRegisterAt(invoke, 1));
2575 codegen->InvokeRuntime(entry, invoke, invoke->GetDexPc());
2576 __ Vmov(OutputDRegister(invoke),
2577 RegisterFrom(locations->GetTemp(0)),
2578 RegisterFrom(locations->GetTemp(1)));
2579}
2580
2581void IntrinsicLocationsBuilderARMVIXL::VisitMathCos(HInvoke* invoke) {
2582 CreateFPToFPCallLocations(arena_, invoke);
2583}
2584
2585void IntrinsicCodeGeneratorARMVIXL::VisitMathCos(HInvoke* invoke) {
2586 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCos);
2587}
2588
2589void IntrinsicLocationsBuilderARMVIXL::VisitMathSin(HInvoke* invoke) {
2590 CreateFPToFPCallLocations(arena_, invoke);
2591}
2592
2593void IntrinsicCodeGeneratorARMVIXL::VisitMathSin(HInvoke* invoke) {
2594 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSin);
2595}
2596
2597void IntrinsicLocationsBuilderARMVIXL::VisitMathAcos(HInvoke* invoke) {
2598 CreateFPToFPCallLocations(arena_, invoke);
2599}
2600
2601void IntrinsicCodeGeneratorARMVIXL::VisitMathAcos(HInvoke* invoke) {
2602 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAcos);
2603}
2604
2605void IntrinsicLocationsBuilderARMVIXL::VisitMathAsin(HInvoke* invoke) {
2606 CreateFPToFPCallLocations(arena_, invoke);
2607}
2608
2609void IntrinsicCodeGeneratorARMVIXL::VisitMathAsin(HInvoke* invoke) {
2610 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAsin);
2611}
2612
2613void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan(HInvoke* invoke) {
2614 CreateFPToFPCallLocations(arena_, invoke);
2615}
2616
2617void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan(HInvoke* invoke) {
2618 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan);
2619}
2620
2621void IntrinsicLocationsBuilderARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2622 CreateFPToFPCallLocations(arena_, invoke);
2623}
2624
2625void IntrinsicCodeGeneratorARMVIXL::VisitMathCbrt(HInvoke* invoke) {
2626 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCbrt);
2627}
2628
2629void IntrinsicLocationsBuilderARMVIXL::VisitMathCosh(HInvoke* invoke) {
2630 CreateFPToFPCallLocations(arena_, invoke);
2631}
2632
2633void IntrinsicCodeGeneratorARMVIXL::VisitMathCosh(HInvoke* invoke) {
2634 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickCosh);
2635}
2636
2637void IntrinsicLocationsBuilderARMVIXL::VisitMathExp(HInvoke* invoke) {
2638 CreateFPToFPCallLocations(arena_, invoke);
2639}
2640
2641void IntrinsicCodeGeneratorARMVIXL::VisitMathExp(HInvoke* invoke) {
2642 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExp);
2643}
2644
2645void IntrinsicLocationsBuilderARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2646 CreateFPToFPCallLocations(arena_, invoke);
2647}
2648
2649void IntrinsicCodeGeneratorARMVIXL::VisitMathExpm1(HInvoke* invoke) {
2650 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickExpm1);
2651}
2652
2653void IntrinsicLocationsBuilderARMVIXL::VisitMathLog(HInvoke* invoke) {
2654 CreateFPToFPCallLocations(arena_, invoke);
2655}
2656
2657void IntrinsicCodeGeneratorARMVIXL::VisitMathLog(HInvoke* invoke) {
2658 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog);
2659}
2660
2661void IntrinsicLocationsBuilderARMVIXL::VisitMathLog10(HInvoke* invoke) {
2662 CreateFPToFPCallLocations(arena_, invoke);
2663}
2664
2665void IntrinsicCodeGeneratorARMVIXL::VisitMathLog10(HInvoke* invoke) {
2666 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickLog10);
2667}
2668
2669void IntrinsicLocationsBuilderARMVIXL::VisitMathSinh(HInvoke* invoke) {
2670 CreateFPToFPCallLocations(arena_, invoke);
2671}
2672
2673void IntrinsicCodeGeneratorARMVIXL::VisitMathSinh(HInvoke* invoke) {
2674 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickSinh);
2675}
2676
2677void IntrinsicLocationsBuilderARMVIXL::VisitMathTan(HInvoke* invoke) {
2678 CreateFPToFPCallLocations(arena_, invoke);
2679}
2680
2681void IntrinsicCodeGeneratorARMVIXL::VisitMathTan(HInvoke* invoke) {
2682 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTan);
2683}
2684
2685void IntrinsicLocationsBuilderARMVIXL::VisitMathTanh(HInvoke* invoke) {
2686 CreateFPToFPCallLocations(arena_, invoke);
2687}
2688
2689void IntrinsicCodeGeneratorARMVIXL::VisitMathTanh(HInvoke* invoke) {
2690 GenFPToFPCall(invoke, GetAssembler(), codegen_, kQuickTanh);
2691}
2692
2693void IntrinsicLocationsBuilderARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2694 CreateFPFPToFPCallLocations(arena_, invoke);
2695}
2696
2697void IntrinsicCodeGeneratorARMVIXL::VisitMathAtan2(HInvoke* invoke) {
2698 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickAtan2);
2699}
2700
2701void IntrinsicLocationsBuilderARMVIXL::VisitMathHypot(HInvoke* invoke) {
2702 CreateFPFPToFPCallLocations(arena_, invoke);
2703}
2704
2705void IntrinsicCodeGeneratorARMVIXL::VisitMathHypot(HInvoke* invoke) {
2706 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickHypot);
2707}
2708
2709void IntrinsicLocationsBuilderARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2710 CreateFPFPToFPCallLocations(arena_, invoke);
2711}
2712
2713void IntrinsicCodeGeneratorARMVIXL::VisitMathNextAfter(HInvoke* invoke) {
2714 GenFPFPToFPCall(invoke, GetAssembler(), codegen_, kQuickNextAfter);
2715}
2716
2717void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2718 CreateIntToIntLocations(arena_, invoke);
2719}
2720
2721void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverse(HInvoke* invoke) {
2722 ArmVIXLAssembler* assembler = GetAssembler();
2723 __ Rbit(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2724}
2725
2726void IntrinsicLocationsBuilderARMVIXL::VisitLongReverse(HInvoke* invoke) {
2727 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2728 LocationSummary::kNoCall,
2729 kIntrinsified);
2730 locations->SetInAt(0, Location::RequiresRegister());
2731 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2732}
2733
2734void IntrinsicCodeGeneratorARMVIXL::VisitLongReverse(HInvoke* invoke) {
2735 ArmVIXLAssembler* assembler = GetAssembler();
2736 LocationSummary* locations = invoke->GetLocations();
2737
2738 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2739 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2740 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2741 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2742
2743 __ Rbit(out_reg_lo, in_reg_hi);
2744 __ Rbit(out_reg_hi, in_reg_lo);
2745}
2746
2747void IntrinsicLocationsBuilderARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2748 CreateIntToIntLocations(arena_, invoke);
2749}
2750
2751void IntrinsicCodeGeneratorARMVIXL::VisitIntegerReverseBytes(HInvoke* invoke) {
2752 ArmVIXLAssembler* assembler = GetAssembler();
2753 __ Rev(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2754}
2755
2756void IntrinsicLocationsBuilderARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2757 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2758 LocationSummary::kNoCall,
2759 kIntrinsified);
2760 locations->SetInAt(0, Location::RequiresRegister());
2761 locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap);
2762}
2763
2764void IntrinsicCodeGeneratorARMVIXL::VisitLongReverseBytes(HInvoke* invoke) {
2765 ArmVIXLAssembler* assembler = GetAssembler();
2766 LocationSummary* locations = invoke->GetLocations();
2767
2768 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0));
2769 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0));
2770 vixl32::Register out_reg_lo = LowRegisterFrom(locations->Out());
2771 vixl32::Register out_reg_hi = HighRegisterFrom(locations->Out());
2772
2773 __ Rev(out_reg_lo, in_reg_hi);
2774 __ Rev(out_reg_hi, in_reg_lo);
2775}
2776
2777void IntrinsicLocationsBuilderARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2778 CreateIntToIntLocations(arena_, invoke);
2779}
2780
2781void IntrinsicCodeGeneratorARMVIXL::VisitShortReverseBytes(HInvoke* invoke) {
2782 ArmVIXLAssembler* assembler = GetAssembler();
2783 __ Revsh(OutputRegister(invoke), InputRegisterAt(invoke, 0));
2784}
2785
2786static void GenBitCount(HInvoke* instr, Primitive::Type type, ArmVIXLAssembler* assembler) {
2787 DCHECK(Primitive::IsIntOrLongType(type)) << type;
2788 DCHECK_EQ(instr->GetType(), Primitive::kPrimInt);
2789 DCHECK_EQ(Primitive::PrimitiveKind(instr->InputAt(0)->GetType()), type);
2790
2791 bool is_long = type == Primitive::kPrimLong;
2792 LocationSummary* locations = instr->GetLocations();
2793 Location in = locations->InAt(0);
2794 vixl32::Register src_0 = is_long ? LowRegisterFrom(in) : RegisterFrom(in);
2795 vixl32::Register src_1 = is_long ? HighRegisterFrom(in) : src_0;
2796 vixl32::SRegister tmp_s = LowSRegisterFrom(locations->GetTemp(0));
2797 vixl32::DRegister tmp_d = DRegisterFrom(locations->GetTemp(0));
2798 vixl32::Register out_r = OutputRegister(instr);
2799
2800 // Move data from core register(s) to temp D-reg for bit count calculation, then move back.
2801 // According to Cortex A57 and A72 optimization guides, compared to transferring to full D-reg,
2802 // transferring data from core reg to upper or lower half of vfp D-reg requires extra latency,
2803 // That's why for integer bit count, we use 'vmov d0, r0, r0' instead of 'vmov d0[0], r0'.
2804 __ Vmov(tmp_d, src_1, src_0); // Temp DReg |--src_1|--src_0|
2805 __ Vcnt(Untyped8, tmp_d, tmp_d); // Temp DReg |c|c|c|c|c|c|c|c|
2806 __ Vpaddl(U8, tmp_d, tmp_d); // Temp DReg |--c|--c|--c|--c|
2807 __ Vpaddl(U16, tmp_d, tmp_d); // Temp DReg |------c|------c|
2808 if (is_long) {
2809 __ Vpaddl(U32, tmp_d, tmp_d); // Temp DReg |--------------c|
2810 }
2811 __ Vmov(out_r, tmp_s);
2812}
2813
2814void IntrinsicLocationsBuilderARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2815 CreateIntToIntLocations(arena_, invoke);
2816 invoke->GetLocations()->AddTemp(Location::RequiresFpuRegister());
2817}
2818
2819void IntrinsicCodeGeneratorARMVIXL::VisitIntegerBitCount(HInvoke* invoke) {
2820 GenBitCount(invoke, Primitive::kPrimInt, GetAssembler());
2821}
2822
2823void IntrinsicLocationsBuilderARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2824 VisitIntegerBitCount(invoke);
2825}
2826
2827void IntrinsicCodeGeneratorARMVIXL::VisitLongBitCount(HInvoke* invoke) {
2828 GenBitCount(invoke, Primitive::kPrimLong, GetAssembler());
2829}
2830
2831void IntrinsicLocationsBuilderARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2832 LocationSummary* locations = new (arena_) LocationSummary(invoke,
2833 LocationSummary::kNoCall,
2834 kIntrinsified);
2835 locations->SetInAt(0, Location::RequiresRegister());
2836 locations->SetInAt(1, Location::RequiresRegister());
2837 locations->SetInAt(2, Location::RequiresRegister());
2838 locations->SetInAt(3, Location::RequiresRegister());
2839 locations->SetInAt(4, Location::RequiresRegister());
2840
2841 // Temporary registers to store lengths of strings and for calculations.
2842 locations->AddTemp(Location::RequiresRegister());
2843 locations->AddTemp(Location::RequiresRegister());
2844 locations->AddTemp(Location::RequiresRegister());
2845}
2846
2847void IntrinsicCodeGeneratorARMVIXL::VisitStringGetCharsNoCheck(HInvoke* invoke) {
2848 ArmVIXLAssembler* assembler = GetAssembler();
2849 LocationSummary* locations = invoke->GetLocations();
2850
2851 // Check assumption that sizeof(Char) is 2 (used in scaling below).
2852 const size_t char_size = Primitive::ComponentSize(Primitive::kPrimChar);
2853 DCHECK_EQ(char_size, 2u);
2854
2855 // Location of data in char array buffer.
2856 const uint32_t data_offset = mirror::Array::DataOffset(char_size).Uint32Value();
2857
2858 // Location of char array data in string.
2859 const uint32_t value_offset = mirror::String::ValueOffset().Uint32Value();
2860
2861 // void getCharsNoCheck(int srcBegin, int srcEnd, char[] dst, int dstBegin);
2862 // Since getChars() calls getCharsNoCheck() - we use registers rather than constants.
2863 vixl32::Register srcObj = InputRegisterAt(invoke, 0);
2864 vixl32::Register srcBegin = InputRegisterAt(invoke, 1);
2865 vixl32::Register srcEnd = InputRegisterAt(invoke, 2);
2866 vixl32::Register dstObj = InputRegisterAt(invoke, 3);
2867 vixl32::Register dstBegin = InputRegisterAt(invoke, 4);
2868
2869 vixl32::Register num_chr = RegisterFrom(locations->GetTemp(0));
2870 vixl32::Register src_ptr = RegisterFrom(locations->GetTemp(1));
2871 vixl32::Register dst_ptr = RegisterFrom(locations->GetTemp(2));
2872
2873 vixl32::Label done, compressed_string_loop;
Anton Kirilov6f644202017-02-27 18:29:45 +00002874 vixl32::Label* final_label = codegen_->GetFinalLabel(invoke, &done);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002875 // dst to be copied.
2876 __ Add(dst_ptr, dstObj, data_offset);
2877 __ Add(dst_ptr, dst_ptr, Operand(dstBegin, vixl32::LSL, 1));
2878
2879 __ Subs(num_chr, srcEnd, srcBegin);
2880 // Early out for valid zero-length retrievals.
Anton Kirilov6f644202017-02-27 18:29:45 +00002881 __ B(eq, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002882
2883 // src range to copy.
2884 __ Add(src_ptr, srcObj, value_offset);
2885
2886 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2887 vixl32::Register temp;
2888 vixl32::Label compressed_string_preloop;
2889 if (mirror::kUseStringCompression) {
2890 // Location of count in string.
2891 const uint32_t count_offset = mirror::String::CountOffset().Uint32Value();
2892 temp = temps.Acquire();
2893 // String's length.
2894 __ Ldr(temp, MemOperand(srcObj, count_offset));
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002895 __ Tst(temp, 1);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002896 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002897 __ B(eq, &compressed_string_preloop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002898 }
2899 __ Add(src_ptr, src_ptr, Operand(srcBegin, vixl32::LSL, 1));
2900
2901 // Do the copy.
2902 vixl32::Label loop, remainder;
2903
2904 temp = temps.Acquire();
2905 // Save repairing the value of num_chr on the < 4 character path.
2906 __ Subs(temp, num_chr, 4);
Artem Serov517d9f62016-12-12 15:51:15 +00002907 __ B(lt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002908
2909 // Keep the result of the earlier subs, we are going to fetch at least 4 characters.
2910 __ Mov(num_chr, temp);
2911
2912 // Main loop used for longer fetches loads and stores 4x16-bit characters at a time.
2913 // (LDRD/STRD fault on unaligned addresses and it's not worth inlining extra code
2914 // to rectify these everywhere this intrinsic applies.)
2915 __ Bind(&loop);
2916 __ Ldr(temp, MemOperand(src_ptr, char_size * 2));
2917 __ Subs(num_chr, num_chr, 4);
2918 __ Str(temp, MemOperand(dst_ptr, char_size * 2));
2919 __ Ldr(temp, MemOperand(src_ptr, char_size * 4, PostIndex));
2920 __ Str(temp, MemOperand(dst_ptr, char_size * 4, PostIndex));
2921 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002922 __ B(ge, &loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002923
2924 __ Adds(num_chr, num_chr, 4);
Anton Kirilov6f644202017-02-27 18:29:45 +00002925 __ B(eq, final_label, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002926
2927 // Main loop for < 4 character case and remainder handling. Loads and stores one
2928 // 16-bit Java character at a time.
2929 __ Bind(&remainder);
2930 temp = temps.Acquire();
2931 __ Ldrh(temp, MemOperand(src_ptr, char_size, PostIndex));
2932 __ Subs(num_chr, num_chr, 1);
2933 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2934 temps.Release(temp);
Artem Serov517d9f62016-12-12 15:51:15 +00002935 __ B(gt, &remainder, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002936
2937 if (mirror::kUseStringCompression) {
Anton Kirilov6f644202017-02-27 18:29:45 +00002938 __ B(final_label);
Vladimir Markofdaf0f42016-10-13 19:29:53 +01002939
Anton Kirilov5ec62182016-10-13 20:16:02 +01002940 const size_t c_char_size = Primitive::ComponentSize(Primitive::kPrimByte);
2941 DCHECK_EQ(c_char_size, 1u);
2942 // Copy loop for compressed src, copying 1 character (8-bit) to (16-bit) at a time.
2943 __ Bind(&compressed_string_preloop);
2944 __ Add(src_ptr, src_ptr, srcBegin);
2945 __ Bind(&compressed_string_loop);
2946 temp = temps.Acquire();
2947 __ Ldrb(temp, MemOperand(src_ptr, c_char_size, PostIndex));
2948 __ Strh(temp, MemOperand(dst_ptr, char_size, PostIndex));
2949 temps.Release(temp);
2950 __ Subs(num_chr, num_chr, 1);
Artem Serov517d9f62016-12-12 15:51:15 +00002951 __ B(gt, &compressed_string_loop, /* far_target */ false);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002952 }
2953
Anton Kirilov6f644202017-02-27 18:29:45 +00002954 if (done.IsReferenced()) {
2955 __ Bind(&done);
2956 }
Anton Kirilov5ec62182016-10-13 20:16:02 +01002957}
2958
2959void IntrinsicLocationsBuilderARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2960 CreateFPToIntLocations(arena_, invoke);
2961}
2962
2963void IntrinsicCodeGeneratorARMVIXL::VisitFloatIsInfinite(HInvoke* invoke) {
2964 ArmVIXLAssembler* const assembler = GetAssembler();
2965 const vixl32::Register out = OutputRegister(invoke);
2966 // Shifting left by 1 bit makes the value encodable as an immediate operand;
2967 // we don't care about the sign bit anyway.
2968 constexpr uint32_t infinity = kPositiveInfinityFloat << 1U;
2969
2970 __ Vmov(out, InputSRegisterAt(invoke, 0));
2971 // We don't care about the sign bit, so shift left.
2972 __ Lsl(out, out, 1);
2973 __ Eor(out, out, infinity);
Anton Kirilov5601d4e2017-05-11 19:33:50 +01002974 codegen_->GenerateConditionWithZero(kCondEQ, out, out);
Anton Kirilov5ec62182016-10-13 20:16:02 +01002975}
2976
2977void IntrinsicLocationsBuilderARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2978 CreateFPToIntLocations(arena_, invoke);
2979}
2980
2981void IntrinsicCodeGeneratorARMVIXL::VisitDoubleIsInfinite(HInvoke* invoke) {
2982 ArmVIXLAssembler* const assembler = GetAssembler();
2983 const vixl32::Register out = OutputRegister(invoke);
2984 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
2985 const vixl32::Register temp = temps.Acquire();
2986 // The highest 32 bits of double precision positive infinity separated into
2987 // two constants encodable as immediate operands.
2988 constexpr uint32_t infinity_high = 0x7f000000U;
2989 constexpr uint32_t infinity_high2 = 0x00f00000U;
2990
2991 static_assert((infinity_high | infinity_high2) ==
2992 static_cast<uint32_t>(kPositiveInfinityDouble >> 32U),
2993 "The constants do not add up to the high 32 bits of double "
2994 "precision positive infinity.");
2995 __ Vmov(temp, out, InputDRegisterAt(invoke, 0));
2996 __ Eor(out, out, infinity_high);
2997 __ Eor(out, out, infinity_high2);
2998 // We don't care about the sign bit, so shift left.
2999 __ Orr(out, temp, Operand(out, vixl32::LSL, 1));
Anton Kirilov5601d4e2017-05-11 19:33:50 +01003000 codegen_->GenerateConditionWithZero(kCondEQ, out, out);
Anton Kirilov5ec62182016-10-13 20:16:02 +01003001}
3002
TatWai Chongd8c052a2016-11-02 16:12:48 +08003003void IntrinsicLocationsBuilderARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
3004 if (kEmitCompilerReadBarrier) {
3005 // Do not intrinsify this call with the read barrier configuration.
3006 return;
3007 }
3008 LocationSummary* locations = new (arena_) LocationSummary(invoke,
3009 LocationSummary::kCallOnSlowPath,
3010 kIntrinsified);
3011 locations->SetInAt(0, Location::RequiresRegister());
3012 locations->SetOut(Location::SameAsFirstInput());
3013 locations->AddTemp(Location::RequiresRegister());
3014}
3015
3016void IntrinsicCodeGeneratorARMVIXL::VisitReferenceGetReferent(HInvoke* invoke) {
3017 DCHECK(!kEmitCompilerReadBarrier);
3018 ArmVIXLAssembler* assembler = GetAssembler();
3019 LocationSummary* locations = invoke->GetLocations();
3020
3021 vixl32::Register obj = InputRegisterAt(invoke, 0);
3022 vixl32::Register out = OutputRegister(invoke);
3023
3024 SlowPathCodeARMVIXL* slow_path = new (GetAllocator()) IntrinsicSlowPathARMVIXL(invoke);
3025 codegen_->AddSlowPath(slow_path);
3026
3027 // Load ArtMethod first.
3028 HInvokeStaticOrDirect* invoke_direct = invoke->AsInvokeStaticOrDirect();
3029 DCHECK(invoke_direct != nullptr);
3030 vixl32::Register temp0 = RegisterFrom(codegen_->GenerateCalleeMethodStaticOrDirectCall(
3031 invoke_direct, locations->GetTemp(0)));
3032
3033 // Now get declaring class.
3034 __ Ldr(temp0, MemOperand(temp0, ArtMethod::DeclaringClassOffset().Int32Value()));
3035
3036 uint32_t slow_path_flag_offset = codegen_->GetReferenceSlowFlagOffset();
3037 uint32_t disable_flag_offset = codegen_->GetReferenceDisableFlagOffset();
3038 DCHECK_NE(slow_path_flag_offset, 0u);
3039 DCHECK_NE(disable_flag_offset, 0u);
3040 DCHECK_NE(slow_path_flag_offset, disable_flag_offset);
3041
3042 // Check static flags that prevent using intrinsic.
3043 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
3044 vixl32::Register temp1 = temps.Acquire();
3045 __ Ldr(temp1, MemOperand(temp0, disable_flag_offset));
3046 __ Ldr(temp0, MemOperand(temp0, slow_path_flag_offset));
3047 __ Orr(temp0, temp1, temp0);
3048 __ CompareAndBranchIfNonZero(temp0, slow_path->GetEntryLabel());
3049
3050 // Fast path.
3051 __ Ldr(out, MemOperand(obj, mirror::Reference::ReferentOffset().Int32Value()));
3052 codegen_->MaybeRecordImplicitNullCheck(invoke);
3053 assembler->MaybeUnpoisonHeapReference(out);
3054 __ Bind(slow_path->GetExitLabel());
3055}
3056
Artem Serov9aee2d42017-01-06 15:58:31 +00003057void IntrinsicLocationsBuilderARMVIXL::VisitMathCeil(HInvoke* invoke) {
3058 if (features_.HasARMv8AInstructions()) {
3059 CreateFPToFPLocations(arena_, invoke);
3060 }
3061}
3062
3063void IntrinsicCodeGeneratorARMVIXL::VisitMathCeil(HInvoke* invoke) {
3064 ArmVIXLAssembler* assembler = GetAssembler();
3065 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
3066 __ Vrintp(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
3067}
3068
3069void IntrinsicLocationsBuilderARMVIXL::VisitMathFloor(HInvoke* invoke) {
3070 if (features_.HasARMv8AInstructions()) {
3071 CreateFPToFPLocations(arena_, invoke);
3072 }
3073}
3074
3075void IntrinsicCodeGeneratorARMVIXL::VisitMathFloor(HInvoke* invoke) {
3076 ArmVIXLAssembler* assembler = GetAssembler();
3077 DCHECK(codegen_->GetInstructionSetFeatures().HasARMv8AInstructions());
3078 __ Vrintm(F64, F64, OutputDRegister(invoke), InputDRegisterAt(invoke, 0));
3079}
3080
Nicolas Geoffray331605a2017-03-01 11:01:41 +00003081void IntrinsicLocationsBuilderARMVIXL::VisitIntegerValueOf(HInvoke* invoke) {
3082 InvokeRuntimeCallingConventionARMVIXL calling_convention;
3083 IntrinsicVisitor::ComputeIntegerValueOfLocations(
3084 invoke,
3085 codegen_,
3086 LocationFrom(r0),
3087 LocationFrom(calling_convention.GetRegisterAt(0)));
3088}
3089
3090void IntrinsicCodeGeneratorARMVIXL::VisitIntegerValueOf(HInvoke* invoke) {
3091 IntrinsicVisitor::IntegerValueOfInfo info = IntrinsicVisitor::ComputeIntegerValueOfInfo();
3092 LocationSummary* locations = invoke->GetLocations();
3093 ArmVIXLAssembler* const assembler = GetAssembler();
3094
3095 vixl32::Register out = RegisterFrom(locations->Out());
3096 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
3097 vixl32::Register temp = temps.Acquire();
3098 InvokeRuntimeCallingConventionARMVIXL calling_convention;
3099 vixl32::Register argument = calling_convention.GetRegisterAt(0);
3100 if (invoke->InputAt(0)->IsConstant()) {
3101 int32_t value = invoke->InputAt(0)->AsIntConstant()->GetValue();
3102 if (value >= info.low && value <= info.high) {
3103 // Just embed the j.l.Integer in the code.
3104 ScopedObjectAccess soa(Thread::Current());
3105 mirror::Object* boxed = info.cache->Get(value + (-info.low));
3106 DCHECK(boxed != nullptr && Runtime::Current()->GetHeap()->ObjectIsInBootImageSpace(boxed));
3107 uint32_t address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(boxed));
3108 __ Ldr(out, codegen_->DeduplicateBootImageAddressLiteral(address));
3109 } else {
3110 // Allocate and initialize a new j.l.Integer.
3111 // TODO: If we JIT, we could allocate the j.l.Integer now, and store it in the
3112 // JIT object table.
3113 uint32_t address =
3114 dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.integer));
3115 __ Ldr(argument, codegen_->DeduplicateBootImageAddressLiteral(address));
3116 codegen_->InvokeRuntime(kQuickAllocObjectInitialized, invoke, invoke->GetDexPc());
3117 CheckEntrypointTypes<kQuickAllocObjectWithChecks, void*, mirror::Class*>();
3118 __ Mov(temp, value);
3119 assembler->StoreToOffset(kStoreWord, temp, out, info.value_offset);
3120 // `value` is a final field :-( Ideally, we'd merge this memory barrier with the allocation
3121 // one.
3122 codegen_->GenerateMemoryBarrier(MemBarrierKind::kStoreStore);
3123 }
3124 } else {
3125 vixl32::Register in = RegisterFrom(locations->InAt(0));
3126 // Check bounds of our cache.
3127 __ Add(out, in, -info.low);
3128 __ Cmp(out, info.high - info.low + 1);
3129 vixl32::Label allocate, done;
Anton Kirilovfd522532017-05-10 12:46:57 +01003130 __ B(hs, &allocate, /* is_far_target */ false);
Nicolas Geoffray331605a2017-03-01 11:01:41 +00003131 // If the value is within the bounds, load the j.l.Integer directly from the array.
3132 uint32_t data_offset = mirror::Array::DataOffset(kHeapReferenceSize).Uint32Value();
3133 uint32_t address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.cache));
3134 __ Ldr(temp, codegen_->DeduplicateBootImageAddressLiteral(data_offset + address));
3135 codegen_->LoadFromShiftedRegOffset(Primitive::kPrimNot, locations->Out(), temp, out);
3136 assembler->MaybeUnpoisonHeapReference(out);
3137 __ B(&done);
3138 __ Bind(&allocate);
3139 // Otherwise allocate and initialize a new j.l.Integer.
3140 address = dchecked_integral_cast<uint32_t>(reinterpret_cast<uintptr_t>(info.integer));
3141 __ Ldr(argument, codegen_->DeduplicateBootImageAddressLiteral(address));
3142 codegen_->InvokeRuntime(kQuickAllocObjectInitialized, invoke, invoke->GetDexPc());
3143 CheckEntrypointTypes<kQuickAllocObjectWithChecks, void*, mirror::Class*>();
3144 assembler->StoreToOffset(kStoreWord, in, out, info.value_offset);
3145 // `value` is a final field :-( Ideally, we'd merge this memory barrier with the allocation
3146 // one.
3147 codegen_->GenerateMemoryBarrier(MemBarrierKind::kStoreStore);
3148 __ Bind(&done);
3149 }
3150}
3151
Nicolas Geoffray365719c2017-03-08 13:11:50 +00003152void IntrinsicLocationsBuilderARMVIXL::VisitThreadInterrupted(HInvoke* invoke) {
3153 LocationSummary* locations = new (arena_) LocationSummary(invoke,
3154 LocationSummary::kNoCall,
3155 kIntrinsified);
3156 locations->SetOut(Location::RequiresRegister());
3157}
3158
3159void IntrinsicCodeGeneratorARMVIXL::VisitThreadInterrupted(HInvoke* invoke) {
3160 ArmVIXLAssembler* assembler = GetAssembler();
3161 vixl32::Register out = RegisterFrom(invoke->GetLocations()->Out());
3162 int32_t offset = Thread::InterruptedOffset<kArmPointerSize>().Int32Value();
3163 __ Ldr(out, MemOperand(tr, offset));
3164 UseScratchRegisterScope temps(assembler->GetVIXLAssembler());
3165 vixl32::Register temp = temps.Acquire();
3166 vixl32::Label done;
Anton Kirilovfd522532017-05-10 12:46:57 +01003167 vixl32::Label* const final_label = codegen_->GetFinalLabel(invoke, &done);
3168 __ CompareAndBranchIfZero(out, final_label, /* far_target */ false);
Nicolas Geoffray365719c2017-03-08 13:11:50 +00003169 __ Dmb(vixl32::ISH);
3170 __ Mov(temp, 0);
3171 assembler->StoreToOffset(kStoreWord, temp, tr, offset);
3172 __ Dmb(vixl32::ISH);
Anton Kirilovfd522532017-05-10 12:46:57 +01003173 if (done.IsReferenced()) {
3174 __ Bind(&done);
3175 }
Nicolas Geoffray365719c2017-03-08 13:11:50 +00003176}
3177
Anton Kirilov5ec62182016-10-13 20:16:02 +01003178UNIMPLEMENTED_INTRINSIC(ARMVIXL, MathRoundDouble) // Could be done by changing rounding mode, maybe?
Anton Kirilov5ec62182016-10-13 20:16:02 +01003179UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeCASLong) // High register pressure.
3180UNIMPLEMENTED_INTRINSIC(ARMVIXL, SystemArrayCopyChar)
Anton Kirilov5ec62182016-10-13 20:16:02 +01003181UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerHighestOneBit)
3182UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongHighestOneBit)
3183UNIMPLEMENTED_INTRINSIC(ARMVIXL, IntegerLowestOneBit)
3184UNIMPLEMENTED_INTRINSIC(ARMVIXL, LongLowestOneBit)
3185
Aart Bikff7d89c2016-11-07 08:49:28 -08003186UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOf);
3187UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringStringIndexOfAfter);
Aart Bik71bf7b42016-11-16 10:17:46 -08003188UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferAppend);
3189UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferLength);
3190UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBufferToString);
3191UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderAppend);
3192UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderLength);
3193UNIMPLEMENTED_INTRINSIC(ARMVIXL, StringBuilderToString);
Aart Bikff7d89c2016-11-07 08:49:28 -08003194
Anton Kirilov5ec62182016-10-13 20:16:02 +01003195// 1.8.
3196UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddInt)
3197UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndAddLong)
3198UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetInt)
3199UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetLong)
3200UNIMPLEMENTED_INTRINSIC(ARMVIXL, UnsafeGetAndSetObject)
3201
3202UNREACHABLE_INTRINSICS(ARMVIXL)
3203
3204#undef __
3205
3206} // namespace arm
3207} // namespace art