Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / external / XNNPACK / 6a99b5bdfb9c9603361643c9f9b3dde012639a81 / . / test / f32-dwconv.cc
blob: 49306c4cbd187ad9703ede576ef44b037bb22b9c [file] [log] [blame]
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1// Copyright (c) Facebook, Inc. and its affiliates.
2// All rights reserved.
3//
4// Copyright 2019 Google LLC
5//
6// This source code is licensed under the BSD-style license found in the
7// LICENSE file in the root directory of this source tree.
8//
9// Auto-generated file. Do not edit!
10// Specification: test/f32-dwconv.yaml
11// Generator: tools/generate-dwconv-test.py
12
13
14#include <gtest/gtest.h>
15
16#include <xnnpack/common.h>
17#include <xnnpack/isa-checks.h>
18
19#include <xnnpack/dwconv.h>
20#include "dwconv-microkernel-tester.h"
21
22
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]23#if XNN_ARCH_WASMSIMD
24 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_eq_4) {
25 DWConvMicrokernelTester()
26 .cr(4)
27 .kr(25)
28 .channels(4)
29 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
30 }
31
32 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_div_4) {
33 for (uint32_t channels = 8; channels < 64; channels += 12) {
34 DWConvMicrokernelTester()
35 .cr(4)
36 .kr(25)
37 .channels(channels)
38 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
39 }
40 }
41
42 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_lt_4) {
43 for (uint32_t channels = 1; channels < 4; channels++) {
44 DWConvMicrokernelTester()
45 .cr(4)
46 .kr(25)
47 .channels(channels)
48 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
49 }
50 }
51
52 TEST(F32_DWCONV_UP4X25__WASMSIMD, c_gt_4) {
53 for (uint32_t channels = 5; channels < 8; channels++) {
54 DWConvMicrokernelTester()
55 .cr(4)
56 .kr(25)
57 .channels(channels)
58 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
59 }
60 }
61
62 TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel) {
63 for (size_t channels = 1; channels <= 20; channels += 3) {
64 DWConvMicrokernelTester()
65 .cr(4)
66 .kr(25)
67 .channels(channels)
68 .width(3)
69 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
70 }
71 }
72
73 TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel_with_step) {
74 for (size_t channels = 1; channels <= 20; channels += 3) {
75 for (size_t step = 2; step <= 25; step++) {
76 DWConvMicrokernelTester()
77 .cr(4)
78 .kr(25)
79 .channels(channels)
80 .width(3)
81 .step(step)
82 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
83 }
84 }
85 }
86
87 TEST(F32_DWCONV_UP4X25__WASMSIMD, multipixel_with_output_stride) {
88 for (size_t channels = 1; channels <= 20; channels += 3) {
89 DWConvMicrokernelTester()
90 .cr(4)
91 .kr(25)
92 .channels(4)
93 .width(5)
94 .output_stride(23)
95 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
96 }
97 }
98
99 TEST(F32_DWCONV_UP4X25__WASMSIMD, input_offset) {
100 for (uint32_t channels = 8; channels < 64; channels += 12) {
101 DWConvMicrokernelTester()
102 .cr(4)
103 .kr(25)
104 .channels(channels)
105 .input_offset(112)
106 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
107 }
108 }
109
110 TEST(F32_DWCONV_UP4X25__WASMSIMD, zero) {
111 for (uint32_t mz = 0; mz < 25; mz++) {
112 for (uint32_t channels = 8; channels < 64; channels += 12) {
113 DWConvMicrokernelTester()
114 .cr(4)
115 .kr(25)
116 .channels(channels)
117 .input_offset(112)
118 .zero_index(mz)
119 .Test(xnn_f32_dwconv_ukernel_up4x25__wasmsimd);
120 }
121 }
122 }
123#endif // XNN_ARCH_WASMSIMD
124
125
126#if XNN_ARCH_WASMSIMD
127 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_eq_8) {
128 DWConvMicrokernelTester()
129 .cr(8)
130 .kr(25)
131 .channels(8)
132 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
133 }
134
135 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_div_8) {
136 for (uint32_t channels = 16; channels < 128; channels += 24) {
137 DWConvMicrokernelTester()
138 .cr(8)
139 .kr(25)
140 .channels(channels)
141 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
142 }
143 }
144
145 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_lt_8) {
146 for (uint32_t channels = 1; channels < 8; channels++) {
147 DWConvMicrokernelTester()
148 .cr(8)
149 .kr(25)
150 .channels(channels)
151 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
152 }
153 }
154
155 TEST(F32_DWCONV_UP8X25__WASMSIMD, c_gt_8) {
156 for (uint32_t channels = 9; channels < 16; channels++) {
157 DWConvMicrokernelTester()
158 .cr(8)
159 .kr(25)
160 .channels(channels)
161 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
162 }
163 }
164
165 TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel) {
166 for (size_t channels = 1; channels <= 40; channels += 7) {
167 DWConvMicrokernelTester()
168 .cr(8)
169 .kr(25)
170 .channels(channels)
171 .width(3)
172 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
173 }
174 }
175
176 TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel_with_step) {
177 for (size_t channels = 1; channels <= 40; channels += 7) {
178 for (size_t step = 2; step <= 25; step++) {
179 DWConvMicrokernelTester()
180 .cr(8)
181 .kr(25)
182 .channels(channels)
183 .width(3)
184 .step(step)
185 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
186 }
187 }
188 }
189
190 TEST(F32_DWCONV_UP8X25__WASMSIMD, multipixel_with_output_stride) {
191 for (size_t channels = 1; channels <= 40; channels += 7) {
192 DWConvMicrokernelTester()
193 .cr(8)
194 .kr(25)
195 .channels(8)
196 .width(5)
197 .output_stride(43)
198 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
199 }
200 }
201
202 TEST(F32_DWCONV_UP8X25__WASMSIMD, input_offset) {
203 for (uint32_t channels = 16; channels < 128; channels += 24) {
204 DWConvMicrokernelTester()
205 .cr(8)
206 .kr(25)
207 .channels(channels)
208 .input_offset(176)
209 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
210 }
211 }
212
213 TEST(F32_DWCONV_UP8X25__WASMSIMD, zero) {
214 for (uint32_t mz = 0; mz < 25; mz++) {
215 for (uint32_t channels = 16; channels < 128; channels += 24) {
216 DWConvMicrokernelTester()
217 .cr(8)
218 .kr(25)
219 .channels(channels)
220 .input_offset(176)
221 .zero_index(mz)
222 .Test(xnn_f32_dwconv_ukernel_up8x25__wasmsimd);
223 }
224 }
225 }
226#endif // XNN_ARCH_WASMSIMD
227
228
229#if XNN_ARCH_WASMSIMD
230 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_eq_4) {
231 DWConvMicrokernelTester()
232 .cr(4)
233 .kr(9)
234 .channels(4)
235 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
236 }
237
238 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_div_4) {
239 for (uint32_t channels = 8; channels < 64; channels += 12) {
240 DWConvMicrokernelTester()
241 .cr(4)
242 .kr(9)
243 .channels(channels)
244 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
245 }
246 }
247
248 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_lt_4) {
249 for (uint32_t channels = 1; channels < 4; channels++) {
250 DWConvMicrokernelTester()
251 .cr(4)
252 .kr(9)
253 .channels(channels)
254 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
255 }
256 }
257
258 TEST(F32_DWCONV_UP4X9__WASMSIMD, c_gt_4) {
259 for (uint32_t channels = 5; channels < 8; channels++) {
260 DWConvMicrokernelTester()
261 .cr(4)
262 .kr(9)
263 .channels(channels)
264 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
265 }
266 }
267
268 TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel) {
269 for (size_t channels = 1; channels <= 20; channels += 3) {
270 DWConvMicrokernelTester()
271 .cr(4)
272 .kr(9)
273 .channels(channels)
274 .width(3)
275 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
276 }
277 }
278
279 TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel_with_step) {
280 for (size_t channels = 1; channels <= 20; channels += 3) {
281 for (size_t step = 2; step <= 9; step++) {
282 DWConvMicrokernelTester()
283 .cr(4)
284 .kr(9)
285 .channels(channels)
286 .width(3)
287 .step(step)
288 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
289 }
290 }
291 }
292
293 TEST(F32_DWCONV_UP4X9__WASMSIMD, multipixel_with_output_stride) {
294 for (size_t channels = 1; channels <= 20; channels += 3) {
295 DWConvMicrokernelTester()
296 .cr(4)
297 .kr(9)
298 .channels(4)
299 .width(5)
300 .output_stride(23)
301 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
302 }
303 }
304
305 TEST(F32_DWCONV_UP4X9__WASMSIMD, input_offset) {
306 for (uint32_t channels = 8; channels < 64; channels += 12) {
307 DWConvMicrokernelTester()
308 .cr(4)
309 .kr(9)
310 .channels(channels)
311 .input_offset(112)
312 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
313 }
314 }
315
316 TEST(F32_DWCONV_UP4X9__WASMSIMD, zero) {
317 for (uint32_t mz = 0; mz < 9; mz++) {
318 for (uint32_t channels = 8; channels < 64; channels += 12) {
319 DWConvMicrokernelTester()
320 .cr(4)
321 .kr(9)
322 .channels(channels)
323 .input_offset(112)
324 .zero_index(mz)
325 .Test(xnn_f32_dwconv_ukernel_up4x9__wasmsimd);
326 }
327 }
328 }
329#endif // XNN_ARCH_WASMSIMD
330
331
332#if XNN_ARCH_WASMSIMD
333 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_eq_8) {
334 DWConvMicrokernelTester()
335 .cr(8)
336 .kr(9)
337 .channels(8)
338 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
339 }
340
341 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_div_8) {
342 for (uint32_t channels = 16; channels < 128; channels += 24) {
343 DWConvMicrokernelTester()
344 .cr(8)
345 .kr(9)
346 .channels(channels)
347 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
348 }
349 }
350
351 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_lt_8) {
352 for (uint32_t channels = 1; channels < 8; channels++) {
353 DWConvMicrokernelTester()
354 .cr(8)
355 .kr(9)
356 .channels(channels)
357 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
358 }
359 }
360
361 TEST(F32_DWCONV_UP8X9__WASMSIMD, c_gt_8) {
362 for (uint32_t channels = 9; channels < 16; channels++) {
363 DWConvMicrokernelTester()
364 .cr(8)
365 .kr(9)
366 .channels(channels)
367 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
368 }
369 }
370
371 TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel) {
372 for (size_t channels = 1; channels <= 40; channels += 7) {
373 DWConvMicrokernelTester()
374 .cr(8)
375 .kr(9)
376 .channels(channels)
377 .width(3)
378 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
379 }
380 }
381
382 TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel_with_step) {
383 for (size_t channels = 1; channels <= 40; channels += 7) {
384 for (size_t step = 2; step <= 9; step++) {
385 DWConvMicrokernelTester()
386 .cr(8)
387 .kr(9)
388 .channels(channels)
389 .width(3)
390 .step(step)
391 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
392 }
393 }
394 }
395
396 TEST(F32_DWCONV_UP8X9__WASMSIMD, multipixel_with_output_stride) {
397 for (size_t channels = 1; channels <= 40; channels += 7) {
398 DWConvMicrokernelTester()
399 .cr(8)
400 .kr(9)
401 .channels(8)
402 .width(5)
403 .output_stride(43)
404 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
405 }
406 }
407
408 TEST(F32_DWCONV_UP8X9__WASMSIMD, input_offset) {
409 for (uint32_t channels = 16; channels < 128; channels += 24) {
410 DWConvMicrokernelTester()
411 .cr(8)
412 .kr(9)
413 .channels(channels)
414 .input_offset(176)
415 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
416 }
417 }
418
419 TEST(F32_DWCONV_UP8X9__WASMSIMD, zero) {
420 for (uint32_t mz = 0; mz < 9; mz++) {
421 for (uint32_t channels = 16; channels < 128; channels += 24) {
422 DWConvMicrokernelTester()
423 .cr(8)
424 .kr(9)
425 .channels(channels)
426 .input_offset(176)
427 .zero_index(mz)
428 .Test(xnn_f32_dwconv_ukernel_up8x9__wasmsimd);
429 }
430 }
431 }
432#endif // XNN_ARCH_WASMSIMD
433
434
435#if XNN_ARCH_WASMSIMD
436 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_eq_4) {
437 DWConvMicrokernelTester()
438 .cr(4)
439 .kr(4)
440 .channels(4)
441 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
442 }
443
444 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_div_4) {
445 for (uint32_t channels = 8; channels < 64; channels += 12) {
446 DWConvMicrokernelTester()
447 .cr(4)
448 .kr(4)
449 .channels(channels)
450 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
451 }
452 }
453
454 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_lt_4) {
455 for (uint32_t channels = 1; channels < 4; channels++) {
456 DWConvMicrokernelTester()
457 .cr(4)
458 .kr(4)
459 .channels(channels)
460 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
461 }
462 }
463
464 TEST(F32_DWCONV_UP4X4__WASMSIMD, c_gt_4) {
465 for (uint32_t channels = 5; channels < 8; channels++) {
466 DWConvMicrokernelTester()
467 .cr(4)
468 .kr(4)
469 .channels(channels)
470 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
471 }
472 }
473
474 TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel) {
475 for (size_t channels = 1; channels <= 20; channels += 3) {
476 DWConvMicrokernelTester()
477 .cr(4)
478 .kr(4)
479 .channels(channels)
480 .width(3)
481 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
482 }
483 }
484
485 TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel_with_step) {
486 for (size_t channels = 1; channels <= 20; channels += 3) {
487 for (size_t step = 2; step <= 4; step++) {
488 DWConvMicrokernelTester()
489 .cr(4)
490 .kr(4)
491 .channels(channels)
492 .width(3)
493 .step(step)
494 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
495 }
496 }
497 }
498
499 TEST(F32_DWCONV_UP4X4__WASMSIMD, multipixel_with_output_stride) {
500 for (size_t channels = 1; channels <= 20; channels += 3) {
501 DWConvMicrokernelTester()
502 .cr(4)
503 .kr(4)
504 .channels(4)
505 .width(5)
506 .output_stride(23)
507 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
508 }
509 }
510
511 TEST(F32_DWCONV_UP4X4__WASMSIMD, input_offset) {
512 for (uint32_t channels = 8; channels < 64; channels += 12) {
513 DWConvMicrokernelTester()
514 .cr(4)
515 .kr(4)
516 .channels(channels)
517 .input_offset(112)
518 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
519 }
520 }
521
522 TEST(F32_DWCONV_UP4X4__WASMSIMD, zero) {
523 for (uint32_t mz = 0; mz < 4; mz++) {
524 for (uint32_t channels = 8; channels < 64; channels += 12) {
525 DWConvMicrokernelTester()
526 .cr(4)
527 .kr(4)
528 .channels(channels)
529 .input_offset(112)
530 .zero_index(mz)
531 .Test(xnn_f32_dwconv_ukernel_up4x4__wasmsimd);
532 }
533 }
534 }
535#endif // XNN_ARCH_WASMSIMD
536
537
538#if XNN_ARCH_WASMSIMD
539 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_eq_8) {
540 DWConvMicrokernelTester()
541 .cr(8)
542 .kr(4)
543 .channels(8)
544 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
545 }
546
547 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_div_8) {
548 for (uint32_t channels = 16; channels < 128; channels += 24) {
549 DWConvMicrokernelTester()
550 .cr(8)
551 .kr(4)
552 .channels(channels)
553 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
554 }
555 }
556
557 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_lt_8) {
558 for (uint32_t channels = 1; channels < 8; channels++) {
559 DWConvMicrokernelTester()
560 .cr(8)
561 .kr(4)
562 .channels(channels)
563 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
564 }
565 }
566
567 TEST(F32_DWCONV_UP8X4__WASMSIMD, c_gt_8) {
568 for (uint32_t channels = 9; channels < 16; channels++) {
569 DWConvMicrokernelTester()
570 .cr(8)
571 .kr(4)
572 .channels(channels)
573 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
574 }
575 }
576
577 TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel) {
578 for (size_t channels = 1; channels <= 40; channels += 7) {
579 DWConvMicrokernelTester()
580 .cr(8)
581 .kr(4)
582 .channels(channels)
583 .width(3)
584 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
585 }
586 }
587
588 TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel_with_step) {
589 for (size_t channels = 1; channels <= 40; channels += 7) {
590 for (size_t step = 2; step <= 4; step++) {
591 DWConvMicrokernelTester()
592 .cr(8)
593 .kr(4)
594 .channels(channels)
595 .width(3)
596 .step(step)
597 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
598 }
599 }
600 }
601
602 TEST(F32_DWCONV_UP8X4__WASMSIMD, multipixel_with_output_stride) {
603 for (size_t channels = 1; channels <= 40; channels += 7) {
604 DWConvMicrokernelTester()
605 .cr(8)
606 .kr(4)
607 .channels(8)
608 .width(5)
609 .output_stride(43)
610 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
611 }
612 }
613
614 TEST(F32_DWCONV_UP8X4__WASMSIMD, input_offset) {
615 for (uint32_t channels = 16; channels < 128; channels += 24) {
616 DWConvMicrokernelTester()
617 .cr(8)
618 .kr(4)
619 .channels(channels)
620 .input_offset(176)
621 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
622 }
623 }
624
625 TEST(F32_DWCONV_UP8X4__WASMSIMD, zero) {
626 for (uint32_t mz = 0; mz < 4; mz++) {
627 for (uint32_t channels = 16; channels < 128; channels += 24) {
628 DWConvMicrokernelTester()
629 .cr(8)
630 .kr(4)
631 .channels(channels)
632 .input_offset(176)
633 .zero_index(mz)
634 .Test(xnn_f32_dwconv_ukernel_up8x4__wasmsimd);
635 }
636 }
637 }
638#endif // XNN_ARCH_WASMSIMD
639
640
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]641#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]642 TEST(F32_DWCONV_UP1X4__WASM, c_eq_1) {
643 DWConvMicrokernelTester()
644 .cr(1)
645 .kr(4)
646 .channels(1)
647 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
648 }
649
650 TEST(F32_DWCONV_UP1X4__WASM, c_gt_1) {
651 for (uint32_t channels = 2; channels < 10; channels++) {
652 DWConvMicrokernelTester()
653 .cr(1)
654 .kr(4)
655 .channels(channels)
656 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
657 }
658 }
659
660 TEST(F32_DWCONV_UP1X4__WASM, multipixel) {
661 for (size_t channels = 1; channels <= 5; channels += 1) {
662 DWConvMicrokernelTester()
663 .cr(1)
664 .kr(4)
665 .channels(channels)
666 .width(3)
667 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
668 }
669 }
670
671 TEST(F32_DWCONV_UP1X4__WASM, multipixel_with_step) {
672 for (size_t channels = 1; channels <= 5; channels += 1) {
673 for (size_t step = 2; step <= 4; step++) {
674 DWConvMicrokernelTester()
675 .cr(1)
676 .kr(4)
677 .channels(channels)
678 .width(3)
679 .step(step)
680 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
681 }
682 }
683 }
684
685 TEST(F32_DWCONV_UP1X4__WASM, multipixel_with_output_stride) {
686 for (size_t channels = 1; channels <= 5; channels += 1) {
687 DWConvMicrokernelTester()
688 .cr(1)
689 .kr(4)
690 .channels(1)
691 .width(5)
692 .output_stride(7)
693 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
694 }
695 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]696
697 TEST(F32_DWCONV_UP1X4__WASM, input_offset) {
698 for (uint32_t channels = 2; channels < 16; channels += 3) {
699 DWConvMicrokernelTester()
700 .cr(1)
701 .kr(4)
702 .channels(channels)
703 .input_offset(48)
704 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
705 }
706 }
707
708 TEST(F32_DWCONV_UP1X4__WASM, zero) {
709 for (uint32_t mz = 0; mz < 4; mz++) {
710 for (uint32_t channels = 2; channels < 16; channels += 3) {
711 DWConvMicrokernelTester()
712 .cr(1)
713 .kr(4)
714 .channels(channels)
715 .input_offset(48)
716 .zero_index(mz)
717 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm);
718 }
719 }
720 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]721#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]722
723
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]724#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]725 TEST(F32_DWCONV_UP1X4__WASM_ACC2, c_eq_1) {
726 DWConvMicrokernelTester()
727 .cr(1)
728 .kr(4)
729 .channels(1)
730 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
731 }
732
733 TEST(F32_DWCONV_UP1X4__WASM_ACC2, c_gt_1) {
734 for (uint32_t channels = 2; channels < 10; channels++) {
735 DWConvMicrokernelTester()
736 .cr(1)
737 .kr(4)
738 .channels(channels)
739 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
740 }
741 }
742
743 TEST(F32_DWCONV_UP1X4__WASM_ACC2, multipixel) {
744 for (size_t channels = 1; channels <= 5; channels += 1) {
745 DWConvMicrokernelTester()
746 .cr(1)
747 .kr(4)
748 .channels(channels)
749 .width(3)
750 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
751 }
752 }
753
754 TEST(F32_DWCONV_UP1X4__WASM_ACC2, multipixel_with_step) {
755 for (size_t channels = 1; channels <= 5; channels += 1) {
756 for (size_t step = 2; step <= 4; step++) {
757 DWConvMicrokernelTester()
758 .cr(1)
759 .kr(4)
760 .channels(channels)
761 .width(3)
762 .step(step)
763 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
764 }
765 }
766 }
767
768 TEST(F32_DWCONV_UP1X4__WASM_ACC2, multipixel_with_output_stride) {
769 for (size_t channels = 1; channels <= 5; channels += 1) {
770 DWConvMicrokernelTester()
771 .cr(1)
772 .kr(4)
773 .channels(1)
774 .width(5)
775 .output_stride(7)
776 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
777 }
778 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]779
780 TEST(F32_DWCONV_UP1X4__WASM_ACC2, input_offset) {
781 for (uint32_t channels = 2; channels < 16; channels += 3) {
782 DWConvMicrokernelTester()
783 .cr(1)
784 .kr(4)
785 .channels(channels)
786 .input_offset(48)
787 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
788 }
789 }
790
791 TEST(F32_DWCONV_UP1X4__WASM_ACC2, zero) {
792 for (uint32_t mz = 0; mz < 4; mz++) {
793 for (uint32_t channels = 2; channels < 16; channels += 3) {
794 DWConvMicrokernelTester()
795 .cr(1)
796 .kr(4)
797 .channels(channels)
798 .input_offset(48)
799 .zero_index(mz)
800 .Test(xnn_f32_dwconv_ukernel_up1x4__wasm_acc2);
801 }
802 }
803 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]804#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]805
806
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]807#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]808 TEST(F32_DWCONV_UP2X4__WASM, c_eq_2) {
809 DWConvMicrokernelTester()
810 .cr(2)
811 .kr(4)
812 .channels(2)
813 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
814 }
815
816 TEST(F32_DWCONV_UP2X4__WASM, c_div_2) {
817 for (uint32_t channels = 4; channels < 32; channels += 6) {
818 DWConvMicrokernelTester()
819 .cr(2)
820 .kr(4)
821 .channels(channels)
822 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
823 }
824 }
825
826 TEST(F32_DWCONV_UP2X4__WASM, c_lt_2) {
827 for (uint32_t channels = 1; channels < 2; channels++) {
828 DWConvMicrokernelTester()
829 .cr(2)
830 .kr(4)
831 .channels(channels)
832 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
833 }
834 }
835
836 TEST(F32_DWCONV_UP2X4__WASM, c_gt_2) {
837 for (uint32_t channels = 3; channels < 4; channels++) {
838 DWConvMicrokernelTester()
839 .cr(2)
840 .kr(4)
841 .channels(channels)
842 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
843 }
844 }
845
846 TEST(F32_DWCONV_UP2X4__WASM, multipixel) {
847 for (size_t channels = 1; channels <= 10; channels += 1) {
848 DWConvMicrokernelTester()
849 .cr(2)
850 .kr(4)
851 .channels(channels)
852 .width(3)
853 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
854 }
855 }
856
857 TEST(F32_DWCONV_UP2X4__WASM, multipixel_with_step) {
858 for (size_t channels = 1; channels <= 10; channels += 1) {
859 for (size_t step = 2; step <= 4; step++) {
860 DWConvMicrokernelTester()
861 .cr(2)
862 .kr(4)
863 .channels(channels)
864 .width(3)
865 .step(step)
866 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
867 }
868 }
869 }
870
871 TEST(F32_DWCONV_UP2X4__WASM, multipixel_with_output_stride) {
872 for (size_t channels = 1; channels <= 10; channels += 1) {
873 DWConvMicrokernelTester()
874 .cr(2)
875 .kr(4)
876 .channels(2)
877 .width(5)
878 .output_stride(13)
879 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
880 }
881 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]882
883 TEST(F32_DWCONV_UP2X4__WASM, input_offset) {
884 for (uint32_t channels = 4; channels < 32; channels += 6) {
885 DWConvMicrokernelTester()
886 .cr(2)
887 .kr(4)
888 .channels(channels)
889 .input_offset(80)
890 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
891 }
892 }
893
894 TEST(F32_DWCONV_UP2X4__WASM, zero) {
895 for (uint32_t mz = 0; mz < 4; mz++) {
896 for (uint32_t channels = 4; channels < 32; channels += 6) {
897 DWConvMicrokernelTester()
898 .cr(2)
899 .kr(4)
900 .channels(channels)
901 .input_offset(80)
902 .zero_index(mz)
903 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm);
904 }
905 }
906 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]907#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]908
909
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]910#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]911 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_eq_2) {
912 DWConvMicrokernelTester()
913 .cr(2)
914 .kr(4)
915 .channels(2)
916 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
917 }
918
919 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_div_2) {
920 for (uint32_t channels = 4; channels < 32; channels += 6) {
921 DWConvMicrokernelTester()
922 .cr(2)
923 .kr(4)
924 .channels(channels)
925 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
926 }
927 }
928
929 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_lt_2) {
930 for (uint32_t channels = 1; channels < 2; channels++) {
931 DWConvMicrokernelTester()
932 .cr(2)
933 .kr(4)
934 .channels(channels)
935 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
936 }
937 }
938
939 TEST(F32_DWCONV_UP2X4__WASM_ACC2, c_gt_2) {
940 for (uint32_t channels = 3; channels < 4; channels++) {
941 DWConvMicrokernelTester()
942 .cr(2)
943 .kr(4)
944 .channels(channels)
945 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
946 }
947 }
948
949 TEST(F32_DWCONV_UP2X4__WASM_ACC2, multipixel) {
950 for (size_t channels = 1; channels <= 10; channels += 1) {
951 DWConvMicrokernelTester()
952 .cr(2)
953 .kr(4)
954 .channels(channels)
955 .width(3)
956 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
957 }
958 }
959
960 TEST(F32_DWCONV_UP2X4__WASM_ACC2, multipixel_with_step) {
961 for (size_t channels = 1; channels <= 10; channels += 1) {
962 for (size_t step = 2; step <= 4; step++) {
963 DWConvMicrokernelTester()
964 .cr(2)
965 .kr(4)
966 .channels(channels)
967 .width(3)
968 .step(step)
969 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
970 }
971 }
972 }
973
974 TEST(F32_DWCONV_UP2X4__WASM_ACC2, multipixel_with_output_stride) {
975 for (size_t channels = 1; channels <= 10; channels += 1) {
976 DWConvMicrokernelTester()
977 .cr(2)
978 .kr(4)
979 .channels(2)
980 .width(5)
981 .output_stride(13)
982 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
983 }
984 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]985
986 TEST(F32_DWCONV_UP2X4__WASM_ACC2, input_offset) {
987 for (uint32_t channels = 4; channels < 32; channels += 6) {
988 DWConvMicrokernelTester()
989 .cr(2)
990 .kr(4)
991 .channels(channels)
992 .input_offset(80)
993 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
994 }
995 }
996
997 TEST(F32_DWCONV_UP2X4__WASM_ACC2, zero) {
998 for (uint32_t mz = 0; mz < 4; mz++) {
999 for (uint32_t channels = 4; channels < 32; channels += 6) {
1000 DWConvMicrokernelTester()
1001 .cr(2)
1002 .kr(4)
1003 .channels(channels)
1004 .input_offset(80)
1005 .zero_index(mz)
1006 .Test(xnn_f32_dwconv_ukernel_up2x4__wasm_acc2);
1007 }
1008 }
1009 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1010#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1011
1012
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1013#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1014 TEST(F32_DWCONV_UP1X9__WASM, c_eq_1) {
1015 DWConvMicrokernelTester()
1016 .cr(1)
1017 .kr(9)
1018 .channels(1)
1019 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1020 }
1021
1022 TEST(F32_DWCONV_UP1X9__WASM, c_gt_1) {
1023 for (uint32_t channels = 2; channels < 10; channels++) {
1024 DWConvMicrokernelTester()
1025 .cr(1)
1026 .kr(9)
1027 .channels(channels)
1028 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1029 }
1030 }
1031
1032 TEST(F32_DWCONV_UP1X9__WASM, multipixel) {
1033 for (size_t channels = 1; channels <= 5; channels += 1) {
1034 DWConvMicrokernelTester()
1035 .cr(1)
1036 .kr(9)
1037 .channels(channels)
1038 .width(3)
1039 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1040 }
1041 }
1042
1043 TEST(F32_DWCONV_UP1X9__WASM, multipixel_with_step) {
1044 for (size_t channels = 1; channels <= 5; channels += 1) {
1045 for (size_t step = 2; step <= 9; step++) {
1046 DWConvMicrokernelTester()
1047 .cr(1)
1048 .kr(9)
1049 .channels(channels)
1050 .width(3)
1051 .step(step)
1052 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1053 }
1054 }
1055 }
1056
1057 TEST(F32_DWCONV_UP1X9__WASM, multipixel_with_output_stride) {
1058 for (size_t channels = 1; channels <= 5; channels += 1) {
1059 DWConvMicrokernelTester()
1060 .cr(1)
1061 .kr(9)
1062 .channels(1)
1063 .width(5)
1064 .output_stride(7)
1065 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1066 }
1067 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1068
1069 TEST(F32_DWCONV_UP1X9__WASM, input_offset) {
1070 for (uint32_t channels = 2; channels < 16; channels += 3) {
1071 DWConvMicrokernelTester()
1072 .cr(1)
1073 .kr(9)
1074 .channels(channels)
1075 .input_offset(48)
1076 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1077 }
1078 }
1079
1080 TEST(F32_DWCONV_UP1X9__WASM, zero) {
1081 for (uint32_t mz = 0; mz < 9; mz++) {
1082 for (uint32_t channels = 2; channels < 16; channels += 3) {
1083 DWConvMicrokernelTester()
1084 .cr(1)
1085 .kr(9)
1086 .channels(channels)
1087 .input_offset(48)
1088 .zero_index(mz)
1089 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm);
1090 }
1091 }
1092 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1093#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1094
1095
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1096#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1097 TEST(F32_DWCONV_UP1X9__WASM_ACC2, c_eq_1) {
1098 DWConvMicrokernelTester()
1099 .cr(1)
1100 .kr(9)
1101 .channels(1)
1102 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1103 }
1104
1105 TEST(F32_DWCONV_UP1X9__WASM_ACC2, c_gt_1) {
1106 for (uint32_t channels = 2; channels < 10; channels++) {
1107 DWConvMicrokernelTester()
1108 .cr(1)
1109 .kr(9)
1110 .channels(channels)
1111 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1112 }
1113 }
1114
1115 TEST(F32_DWCONV_UP1X9__WASM_ACC2, multipixel) {
1116 for (size_t channels = 1; channels <= 5; channels += 1) {
1117 DWConvMicrokernelTester()
1118 .cr(1)
1119 .kr(9)
1120 .channels(channels)
1121 .width(3)
1122 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1123 }
1124 }
1125
1126 TEST(F32_DWCONV_UP1X9__WASM_ACC2, multipixel_with_step) {
1127 for (size_t channels = 1; channels <= 5; channels += 1) {
1128 for (size_t step = 2; step <= 9; step++) {
1129 DWConvMicrokernelTester()
1130 .cr(1)
1131 .kr(9)
1132 .channels(channels)
1133 .width(3)
1134 .step(step)
1135 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1136 }
1137 }
1138 }
1139
1140 TEST(F32_DWCONV_UP1X9__WASM_ACC2, multipixel_with_output_stride) {
1141 for (size_t channels = 1; channels <= 5; channels += 1) {
1142 DWConvMicrokernelTester()
1143 .cr(1)
1144 .kr(9)
1145 .channels(1)
1146 .width(5)
1147 .output_stride(7)
1148 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1149 }
1150 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1151
1152 TEST(F32_DWCONV_UP1X9__WASM_ACC2, input_offset) {
1153 for (uint32_t channels = 2; channels < 16; channels += 3) {
1154 DWConvMicrokernelTester()
1155 .cr(1)
1156 .kr(9)
1157 .channels(channels)
1158 .input_offset(48)
1159 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1160 }
1161 }
1162
1163 TEST(F32_DWCONV_UP1X9__WASM_ACC2, zero) {
1164 for (uint32_t mz = 0; mz < 9; mz++) {
1165 for (uint32_t channels = 2; channels < 16; channels += 3) {
1166 DWConvMicrokernelTester()
1167 .cr(1)
1168 .kr(9)
1169 .channels(channels)
1170 .input_offset(48)
1171 .zero_index(mz)
1172 .Test(xnn_f32_dwconv_ukernel_up1x9__wasm_acc2);
1173 }
1174 }
1175 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1176#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1177
1178
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1179#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1180 TEST(F32_DWCONV_UP2X9__WASM, c_eq_2) {
1181 DWConvMicrokernelTester()
1182 .cr(2)
1183 .kr(9)
1184 .channels(2)
1185 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1186 }
1187
1188 TEST(F32_DWCONV_UP2X9__WASM, c_div_2) {
1189 for (uint32_t channels = 4; channels < 32; channels += 6) {
1190 DWConvMicrokernelTester()
1191 .cr(2)
1192 .kr(9)
1193 .channels(channels)
1194 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1195 }
1196 }
1197
1198 TEST(F32_DWCONV_UP2X9__WASM, c_lt_2) {
1199 for (uint32_t channels = 1; channels < 2; channels++) {
1200 DWConvMicrokernelTester()
1201 .cr(2)
1202 .kr(9)
1203 .channels(channels)
1204 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1205 }
1206 }
1207
1208 TEST(F32_DWCONV_UP2X9__WASM, c_gt_2) {
1209 for (uint32_t channels = 3; channels < 4; channels++) {
1210 DWConvMicrokernelTester()
1211 .cr(2)
1212 .kr(9)
1213 .channels(channels)
1214 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1215 }
1216 }
1217
1218 TEST(F32_DWCONV_UP2X9__WASM, multipixel) {
1219 for (size_t channels = 1; channels <= 10; channels += 1) {
1220 DWConvMicrokernelTester()
1221 .cr(2)
1222 .kr(9)
1223 .channels(channels)
1224 .width(3)
1225 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1226 }
1227 }
1228
1229 TEST(F32_DWCONV_UP2X9__WASM, multipixel_with_step) {
1230 for (size_t channels = 1; channels <= 10; channels += 1) {
1231 for (size_t step = 2; step <= 9; step++) {
1232 DWConvMicrokernelTester()
1233 .cr(2)
1234 .kr(9)
1235 .channels(channels)
1236 .width(3)
1237 .step(step)
1238 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1239 }
1240 }
1241 }
1242
1243 TEST(F32_DWCONV_UP2X9__WASM, multipixel_with_output_stride) {
1244 for (size_t channels = 1; channels <= 10; channels += 1) {
1245 DWConvMicrokernelTester()
1246 .cr(2)
1247 .kr(9)
1248 .channels(2)
1249 .width(5)
1250 .output_stride(13)
1251 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1252 }
1253 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1254
1255 TEST(F32_DWCONV_UP2X9__WASM, input_offset) {
1256 for (uint32_t channels = 4; channels < 32; channels += 6) {
1257 DWConvMicrokernelTester()
1258 .cr(2)
1259 .kr(9)
1260 .channels(channels)
1261 .input_offset(80)
1262 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1263 }
1264 }
1265
1266 TEST(F32_DWCONV_UP2X9__WASM, zero) {
1267 for (uint32_t mz = 0; mz < 9; mz++) {
1268 for (uint32_t channels = 4; channels < 32; channels += 6) {
1269 DWConvMicrokernelTester()
1270 .cr(2)
1271 .kr(9)
1272 .channels(channels)
1273 .input_offset(80)
1274 .zero_index(mz)
1275 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm);
1276 }
1277 }
1278 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1279#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1280
1281
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1282#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1283 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_eq_2) {
1284 DWConvMicrokernelTester()
1285 .cr(2)
1286 .kr(9)
1287 .channels(2)
1288 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1289 }
1290
1291 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_div_2) {
1292 for (uint32_t channels = 4; channels < 32; channels += 6) {
1293 DWConvMicrokernelTester()
1294 .cr(2)
1295 .kr(9)
1296 .channels(channels)
1297 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1298 }
1299 }
1300
1301 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_lt_2) {
1302 for (uint32_t channels = 1; channels < 2; channels++) {
1303 DWConvMicrokernelTester()
1304 .cr(2)
1305 .kr(9)
1306 .channels(channels)
1307 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1308 }
1309 }
1310
1311 TEST(F32_DWCONV_UP2X9__WASM_ACC2, c_gt_2) {
1312 for (uint32_t channels = 3; channels < 4; channels++) {
1313 DWConvMicrokernelTester()
1314 .cr(2)
1315 .kr(9)
1316 .channels(channels)
1317 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1318 }
1319 }
1320
1321 TEST(F32_DWCONV_UP2X9__WASM_ACC2, multipixel) {
1322 for (size_t channels = 1; channels <= 10; channels += 1) {
1323 DWConvMicrokernelTester()
1324 .cr(2)
1325 .kr(9)
1326 .channels(channels)
1327 .width(3)
1328 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1329 }
1330 }
1331
1332 TEST(F32_DWCONV_UP2X9__WASM_ACC2, multipixel_with_step) {
1333 for (size_t channels = 1; channels <= 10; channels += 1) {
1334 for (size_t step = 2; step <= 9; step++) {
1335 DWConvMicrokernelTester()
1336 .cr(2)
1337 .kr(9)
1338 .channels(channels)
1339 .width(3)
1340 .step(step)
1341 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1342 }
1343 }
1344 }
1345
1346 TEST(F32_DWCONV_UP2X9__WASM_ACC2, multipixel_with_output_stride) {
1347 for (size_t channels = 1; channels <= 10; channels += 1) {
1348 DWConvMicrokernelTester()
1349 .cr(2)
1350 .kr(9)
1351 .channels(2)
1352 .width(5)
1353 .output_stride(13)
1354 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1355 }
1356 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1357
1358 TEST(F32_DWCONV_UP2X9__WASM_ACC2, input_offset) {
1359 for (uint32_t channels = 4; channels < 32; channels += 6) {
1360 DWConvMicrokernelTester()
1361 .cr(2)
1362 .kr(9)
1363 .channels(channels)
1364 .input_offset(80)
1365 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1366 }
1367 }
1368
1369 TEST(F32_DWCONV_UP2X9__WASM_ACC2, zero) {
1370 for (uint32_t mz = 0; mz < 9; mz++) {
1371 for (uint32_t channels = 4; channels < 32; channels += 6) {
1372 DWConvMicrokernelTester()
1373 .cr(2)
1374 .kr(9)
1375 .channels(channels)
1376 .input_offset(80)
1377 .zero_index(mz)
1378 .Test(xnn_f32_dwconv_ukernel_up2x9__wasm_acc2);
1379 }
1380 }
1381 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1382#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1383
1384
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1385#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1386 TEST(F32_DWCONV_UP1X25__WASM, c_eq_1) {
1387 DWConvMicrokernelTester()
1388 .cr(1)
1389 .kr(25)
1390 .channels(1)
1391 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1392 }
1393
1394 TEST(F32_DWCONV_UP1X25__WASM, c_gt_1) {
1395 for (uint32_t channels = 2; channels < 10; channels++) {
1396 DWConvMicrokernelTester()
1397 .cr(1)
1398 .kr(25)
1399 .channels(channels)
1400 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1401 }
1402 }
1403
1404 TEST(F32_DWCONV_UP1X25__WASM, multipixel) {
1405 for (size_t channels = 1; channels <= 5; channels += 1) {
1406 DWConvMicrokernelTester()
1407 .cr(1)
1408 .kr(25)
1409 .channels(channels)
1410 .width(3)
1411 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1412 }
1413 }
1414
1415 TEST(F32_DWCONV_UP1X25__WASM, multipixel_with_step) {
1416 for (size_t channels = 1; channels <= 5; channels += 1) {
1417 for (size_t step = 2; step <= 25; step++) {
1418 DWConvMicrokernelTester()
1419 .cr(1)
1420 .kr(25)
1421 .channels(channels)
1422 .width(3)
1423 .step(step)
1424 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1425 }
1426 }
1427 }
1428
1429 TEST(F32_DWCONV_UP1X25__WASM, multipixel_with_output_stride) {
1430 for (size_t channels = 1; channels <= 5; channels += 1) {
1431 DWConvMicrokernelTester()
1432 .cr(1)
1433 .kr(25)
1434 .channels(1)
1435 .width(5)
1436 .output_stride(7)
1437 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1438 }
1439 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1440
1441 TEST(F32_DWCONV_UP1X25__WASM, input_offset) {
1442 for (uint32_t channels = 2; channels < 16; channels += 3) {
1443 DWConvMicrokernelTester()
1444 .cr(1)
1445 .kr(25)
1446 .channels(channels)
1447 .input_offset(48)
1448 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1449 }
1450 }
1451
1452 TEST(F32_DWCONV_UP1X25__WASM, zero) {
1453 for (uint32_t mz = 0; mz < 25; mz++) {
1454 for (uint32_t channels = 2; channels < 16; channels += 3) {
1455 DWConvMicrokernelTester()
1456 .cr(1)
1457 .kr(25)
1458 .channels(channels)
1459 .input_offset(48)
1460 .zero_index(mz)
1461 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm);
1462 }
1463 }
1464 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1465#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1466
1467
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1468#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1469 TEST(F32_DWCONV_UP1X25__WASM_ACC2, c_eq_1) {
1470 DWConvMicrokernelTester()
1471 .cr(1)
1472 .kr(25)
1473 .channels(1)
1474 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
1475 }
1476
1477 TEST(F32_DWCONV_UP1X25__WASM_ACC2, c_gt_1) {
1478 for (uint32_t channels = 2; channels < 10; channels++) {
1479 DWConvMicrokernelTester()
1480 .cr(1)
1481 .kr(25)
1482 .channels(channels)
1483 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
1484 }
1485 }
1486
1487 TEST(F32_DWCONV_UP1X25__WASM_ACC2, multipixel) {
1488 for (size_t channels = 1; channels <= 5; channels += 1) {
1489 DWConvMicrokernelTester()
1490 .cr(1)
1491 .kr(25)
1492 .channels(channels)
1493 .width(3)
1494 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
1495 }
1496 }
1497
1498 TEST(F32_DWCONV_UP1X25__WASM_ACC2, multipixel_with_step) {
1499 for (size_t channels = 1; channels <= 5; channels += 1) {
1500 for (size_t step = 2; step <= 25; step++) {
1501 DWConvMicrokernelTester()
1502 .cr(1)
1503 .kr(25)
1504 .channels(channels)
1505 .width(3)
1506 .step(step)
1507 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
1508 }
1509 }
1510 }
1511
1512 TEST(F32_DWCONV_UP1X25__WASM_ACC2, multipixel_with_output_stride) {
1513 for (size_t channels = 1; channels <= 5; channels += 1) {
1514 DWConvMicrokernelTester()
1515 .cr(1)
1516 .kr(25)
1517 .channels(1)
1518 .width(5)
1519 .output_stride(7)
1520 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
1521 }
1522 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1523
1524 TEST(F32_DWCONV_UP1X25__WASM_ACC2, input_offset) {
1525 for (uint32_t channels = 2; channels < 16; channels += 3) {
1526 DWConvMicrokernelTester()
1527 .cr(1)
1528 .kr(25)
1529 .channels(channels)
1530 .input_offset(48)
1531 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
1532 }
1533 }
1534
1535 TEST(F32_DWCONV_UP1X25__WASM_ACC2, zero) {
1536 for (uint32_t mz = 0; mz < 25; mz++) {
1537 for (uint32_t channels = 2; channels < 16; channels += 3) {
1538 DWConvMicrokernelTester()
1539 .cr(1)
1540 .kr(25)
1541 .channels(channels)
1542 .input_offset(48)
1543 .zero_index(mz)
1544 .Test(xnn_f32_dwconv_ukernel_up1x25__wasm_acc2);
1545 }
1546 }
1547 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1548#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1549
1550
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1551#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1552 TEST(F32_DWCONV_UP2X25__WASM, c_eq_2) {
1553 DWConvMicrokernelTester()
1554 .cr(2)
1555 .kr(25)
1556 .channels(2)
1557 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1558 }
1559
1560 TEST(F32_DWCONV_UP2X25__WASM, c_div_2) {
1561 for (uint32_t channels = 4; channels < 32; channels += 6) {
1562 DWConvMicrokernelTester()
1563 .cr(2)
1564 .kr(25)
1565 .channels(channels)
1566 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1567 }
1568 }
1569
1570 TEST(F32_DWCONV_UP2X25__WASM, c_lt_2) {
1571 for (uint32_t channels = 1; channels < 2; channels++) {
1572 DWConvMicrokernelTester()
1573 .cr(2)
1574 .kr(25)
1575 .channels(channels)
1576 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1577 }
1578 }
1579
1580 TEST(F32_DWCONV_UP2X25__WASM, c_gt_2) {
1581 for (uint32_t channels = 3; channels < 4; channels++) {
1582 DWConvMicrokernelTester()
1583 .cr(2)
1584 .kr(25)
1585 .channels(channels)
1586 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1587 }
1588 }
1589
1590 TEST(F32_DWCONV_UP2X25__WASM, multipixel) {
1591 for (size_t channels = 1; channels <= 10; channels += 1) {
1592 DWConvMicrokernelTester()
1593 .cr(2)
1594 .kr(25)
1595 .channels(channels)
1596 .width(3)
1597 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1598 }
1599 }
1600
1601 TEST(F32_DWCONV_UP2X25__WASM, multipixel_with_step) {
1602 for (size_t channels = 1; channels <= 10; channels += 1) {
1603 for (size_t step = 2; step <= 25; step++) {
1604 DWConvMicrokernelTester()
1605 .cr(2)
1606 .kr(25)
1607 .channels(channels)
1608 .width(3)
1609 .step(step)
1610 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1611 }
1612 }
1613 }
1614
1615 TEST(F32_DWCONV_UP2X25__WASM, multipixel_with_output_stride) {
1616 for (size_t channels = 1; channels <= 10; channels += 1) {
1617 DWConvMicrokernelTester()
1618 .cr(2)
1619 .kr(25)
1620 .channels(2)
1621 .width(5)
1622 .output_stride(13)
1623 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1624 }
1625 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1626
1627 TEST(F32_DWCONV_UP2X25__WASM, input_offset) {
1628 for (uint32_t channels = 4; channels < 32; channels += 6) {
1629 DWConvMicrokernelTester()
1630 .cr(2)
1631 .kr(25)
1632 .channels(channels)
1633 .input_offset(80)
1634 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1635 }
1636 }
1637
1638 TEST(F32_DWCONV_UP2X25__WASM, zero) {
1639 for (uint32_t mz = 0; mz < 25; mz++) {
1640 for (uint32_t channels = 4; channels < 32; channels += 6) {
1641 DWConvMicrokernelTester()
1642 .cr(2)
1643 .kr(25)
1644 .channels(channels)
1645 .input_offset(80)
1646 .zero_index(mz)
1647 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm);
1648 }
1649 }
1650 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1651#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1652
1653
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1654#if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1655 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_eq_2) {
1656 DWConvMicrokernelTester()
1657 .cr(2)
1658 .kr(25)
1659 .channels(2)
1660 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1661 }
1662
1663 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_div_2) {
1664 for (uint32_t channels = 4; channels < 32; channels += 6) {
1665 DWConvMicrokernelTester()
1666 .cr(2)
1667 .kr(25)
1668 .channels(channels)
1669 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1670 }
1671 }
1672
1673 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_lt_2) {
1674 for (uint32_t channels = 1; channels < 2; channels++) {
1675 DWConvMicrokernelTester()
1676 .cr(2)
1677 .kr(25)
1678 .channels(channels)
1679 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1680 }
1681 }
1682
1683 TEST(F32_DWCONV_UP2X25__WASM_ACC2, c_gt_2) {
1684 for (uint32_t channels = 3; channels < 4; channels++) {
1685 DWConvMicrokernelTester()
1686 .cr(2)
1687 .kr(25)
1688 .channels(channels)
1689 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1690 }
1691 }
1692
1693 TEST(F32_DWCONV_UP2X25__WASM_ACC2, multipixel) {
1694 for (size_t channels = 1; channels <= 10; channels += 1) {
1695 DWConvMicrokernelTester()
1696 .cr(2)
1697 .kr(25)
1698 .channels(channels)
1699 .width(3)
1700 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1701 }
1702 }
1703
1704 TEST(F32_DWCONV_UP2X25__WASM_ACC2, multipixel_with_step) {
1705 for (size_t channels = 1; channels <= 10; channels += 1) {
1706 for (size_t step = 2; step <= 25; step++) {
1707 DWConvMicrokernelTester()
1708 .cr(2)
1709 .kr(25)
1710 .channels(channels)
1711 .width(3)
1712 .step(step)
1713 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1714 }
1715 }
1716 }
1717
1718 TEST(F32_DWCONV_UP2X25__WASM_ACC2, multipixel_with_output_stride) {
1719 for (size_t channels = 1; channels <= 10; channels += 1) {
1720 DWConvMicrokernelTester()
1721 .cr(2)
1722 .kr(25)
1723 .channels(2)
1724 .width(5)
1725 .output_stride(13)
1726 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1727 }
1728 }
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1729
1730 TEST(F32_DWCONV_UP2X25__WASM_ACC2, input_offset) {
1731 for (uint32_t channels = 4; channels < 32; channels += 6) {
1732 DWConvMicrokernelTester()
1733 .cr(2)
1734 .kr(25)
1735 .channels(channels)
1736 .input_offset(80)
1737 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1738 }
1739 }
1740
1741 TEST(F32_DWCONV_UP2X25__WASM_ACC2, zero) {
1742 for (uint32_t mz = 0; mz < 25; mz++) {
1743 for (uint32_t channels = 4; channels < 32; channels += 6) {
1744 DWConvMicrokernelTester()
1745 .cr(2)
1746 .kr(25)
1747 .channels(channels)
1748 .input_offset(80)
1749 .zero_index(mz)
1750 .Test(xnn_f32_dwconv_ukernel_up2x25__wasm_acc2);
1751 }
1752 }
1753 }
Marat Dukhanfb5b20a2020-06-26 13:14:50 -0700[diff] [blame]1754#endif // XNN_ARCH_WASM || XNN_ARCH_WASMSIMD
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1755
1756
1757TEST(F32_DWCONV_UP1X4__SCALAR, c_eq_1) {
1758 DWConvMicrokernelTester()
1759 .cr(1)
1760 .kr(4)
1761 .channels(1)
1762 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
1763}
1764
1765TEST(F32_DWCONV_UP1X4__SCALAR, c_gt_1) {
1766 for (uint32_t channels = 2; channels < 10; channels++) {
1767 DWConvMicrokernelTester()
1768 .cr(1)
1769 .kr(4)
1770 .channels(channels)
1771 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
1772 }
1773}
1774
1775TEST(F32_DWCONV_UP1X4__SCALAR, multipixel) {
1776 for (size_t channels = 1; channels <= 5; channels += 1) {
1777 DWConvMicrokernelTester()
1778 .cr(1)
1779 .kr(4)
1780 .channels(channels)
1781 .width(3)
1782 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
1783 }
1784}
1785
1786TEST(F32_DWCONV_UP1X4__SCALAR, multipixel_with_step) {
1787 for (size_t channels = 1; channels <= 5; channels += 1) {
1788 for (size_t step = 2; step <= 4; step++) {
1789 DWConvMicrokernelTester()
1790 .cr(1)
1791 .kr(4)
1792 .channels(channels)
1793 .width(3)
1794 .step(step)
1795 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
1796 }
1797 }
1798}
1799
1800TEST(F32_DWCONV_UP1X4__SCALAR, multipixel_with_output_stride) {
1801 for (size_t channels = 1; channels <= 5; channels += 1) {
1802 DWConvMicrokernelTester()
1803 .cr(1)
1804 .kr(4)
1805 .channels(1)
1806 .width(5)
1807 .output_stride(7)
1808 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
1809 }
1810}
1811
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1812TEST(F32_DWCONV_UP1X4__SCALAR, input_offset) {
1813 for (uint32_t channels = 2; channels < 16; channels += 3) {
1814 DWConvMicrokernelTester()
1815 .cr(1)
1816 .kr(4)
1817 .channels(channels)
1818 .input_offset(48)
1819 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
1820 }
1821}
1822
1823TEST(F32_DWCONV_UP1X4__SCALAR, zero) {
1824 for (uint32_t mz = 0; mz < 4; mz++) {
1825 for (uint32_t channels = 2; channels < 16; channels += 3) {
1826 DWConvMicrokernelTester()
1827 .cr(1)
1828 .kr(4)
1829 .channels(channels)
1830 .input_offset(48)
1831 .zero_index(mz)
1832 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar);
1833 }
1834 }
1835}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1836
1837TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, c_eq_1) {
1838 DWConvMicrokernelTester()
1839 .cr(1)
1840 .kr(4)
1841 .channels(1)
1842 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
1843}
1844
1845TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, c_gt_1) {
1846 for (uint32_t channels = 2; channels < 10; channels++) {
1847 DWConvMicrokernelTester()
1848 .cr(1)
1849 .kr(4)
1850 .channels(channels)
1851 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
1852 }
1853}
1854
1855TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, multipixel) {
1856 for (size_t channels = 1; channels <= 5; channels += 1) {
1857 DWConvMicrokernelTester()
1858 .cr(1)
1859 .kr(4)
1860 .channels(channels)
1861 .width(3)
1862 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
1863 }
1864}
1865
1866TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, multipixel_with_step) {
1867 for (size_t channels = 1; channels <= 5; channels += 1) {
1868 for (size_t step = 2; step <= 4; step++) {
1869 DWConvMicrokernelTester()
1870 .cr(1)
1871 .kr(4)
1872 .channels(channels)
1873 .width(3)
1874 .step(step)
1875 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
1876 }
1877 }
1878}
1879
1880TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, multipixel_with_output_stride) {
1881 for (size_t channels = 1; channels <= 5; channels += 1) {
1882 DWConvMicrokernelTester()
1883 .cr(1)
1884 .kr(4)
1885 .channels(1)
1886 .width(5)
1887 .output_stride(7)
1888 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
1889 }
1890}
1891
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1892TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, input_offset) {
1893 for (uint32_t channels = 2; channels < 16; channels += 3) {
1894 DWConvMicrokernelTester()
1895 .cr(1)
1896 .kr(4)
1897 .channels(channels)
1898 .input_offset(48)
1899 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
1900 }
1901}
1902
1903TEST(F32_DWCONV_UP1X4__SCALAR_ACC2, zero) {
1904 for (uint32_t mz = 0; mz < 4; mz++) {
1905 for (uint32_t channels = 2; channels < 16; channels += 3) {
1906 DWConvMicrokernelTester()
1907 .cr(1)
1908 .kr(4)
1909 .channels(channels)
1910 .input_offset(48)
1911 .zero_index(mz)
1912 .Test(xnn_f32_dwconv_ukernel_up1x4__scalar_acc2);
1913 }
1914 }
1915}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]1916
1917TEST(F32_DWCONV_UP2X4__SCALAR, c_eq_2) {
1918 DWConvMicrokernelTester()
1919 .cr(2)
1920 .kr(4)
1921 .channels(2)
1922 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
1923}
1924
1925TEST(F32_DWCONV_UP2X4__SCALAR, c_div_2) {
1926 for (uint32_t channels = 4; channels < 32; channels += 6) {
1927 DWConvMicrokernelTester()
1928 .cr(2)
1929 .kr(4)
1930 .channels(channels)
1931 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
1932 }
1933}
1934
1935TEST(F32_DWCONV_UP2X4__SCALAR, c_lt_2) {
1936 for (uint32_t channels = 1; channels < 2; channels++) {
1937 DWConvMicrokernelTester()
1938 .cr(2)
1939 .kr(4)
1940 .channels(channels)
1941 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
1942 }
1943}
1944
1945TEST(F32_DWCONV_UP2X4__SCALAR, c_gt_2) {
1946 for (uint32_t channels = 3; channels < 4; channels++) {
1947 DWConvMicrokernelTester()
1948 .cr(2)
1949 .kr(4)
1950 .channels(channels)
1951 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
1952 }
1953}
1954
1955TEST(F32_DWCONV_UP2X4__SCALAR, multipixel) {
1956 for (size_t channels = 1; channels <= 10; channels += 1) {
1957 DWConvMicrokernelTester()
1958 .cr(2)
1959 .kr(4)
1960 .channels(channels)
1961 .width(3)
1962 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
1963 }
1964}
1965
1966TEST(F32_DWCONV_UP2X4__SCALAR, multipixel_with_step) {
1967 for (size_t channels = 1; channels <= 10; channels += 1) {
1968 for (size_t step = 2; step <= 4; step++) {
1969 DWConvMicrokernelTester()
1970 .cr(2)
1971 .kr(4)
1972 .channels(channels)
1973 .width(3)
1974 .step(step)
1975 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
1976 }
1977 }
1978}
1979
1980TEST(F32_DWCONV_UP2X4__SCALAR, multipixel_with_output_stride) {
1981 for (size_t channels = 1; channels <= 10; channels += 1) {
1982 DWConvMicrokernelTester()
1983 .cr(2)
1984 .kr(4)
1985 .channels(2)
1986 .width(5)
1987 .output_stride(13)
1988 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
1989 }
1990}
1991
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]1992TEST(F32_DWCONV_UP2X4__SCALAR, input_offset) {
1993 for (uint32_t channels = 4; channels < 32; channels += 6) {
1994 DWConvMicrokernelTester()
1995 .cr(2)
1996 .kr(4)
1997 .channels(channels)
1998 .input_offset(80)
1999 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2000 }
2001}
2002
2003TEST(F32_DWCONV_UP2X4__SCALAR, zero) {
2004 for (uint32_t mz = 0; mz < 4; mz++) {
2005 for (uint32_t channels = 4; channels < 32; channels += 6) {
2006 DWConvMicrokernelTester()
2007 .cr(2)
2008 .kr(4)
2009 .channels(channels)
2010 .input_offset(80)
2011 .zero_index(mz)
2012 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar);
2013 }
2014 }
2015}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2016
2017TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_eq_2) {
2018 DWConvMicrokernelTester()
2019 .cr(2)
2020 .kr(4)
2021 .channels(2)
2022 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2023}
2024
2025TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_div_2) {
2026 for (uint32_t channels = 4; channels < 32; channels += 6) {
2027 DWConvMicrokernelTester()
2028 .cr(2)
2029 .kr(4)
2030 .channels(channels)
2031 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2032 }
2033}
2034
2035TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_lt_2) {
2036 for (uint32_t channels = 1; channels < 2; channels++) {
2037 DWConvMicrokernelTester()
2038 .cr(2)
2039 .kr(4)
2040 .channels(channels)
2041 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2042 }
2043}
2044
2045TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, c_gt_2) {
2046 for (uint32_t channels = 3; channels < 4; channels++) {
2047 DWConvMicrokernelTester()
2048 .cr(2)
2049 .kr(4)
2050 .channels(channels)
2051 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2052 }
2053}
2054
2055TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, multipixel) {
2056 for (size_t channels = 1; channels <= 10; channels += 1) {
2057 DWConvMicrokernelTester()
2058 .cr(2)
2059 .kr(4)
2060 .channels(channels)
2061 .width(3)
2062 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2063 }
2064}
2065
2066TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, multipixel_with_step) {
2067 for (size_t channels = 1; channels <= 10; channels += 1) {
2068 for (size_t step = 2; step <= 4; step++) {
2069 DWConvMicrokernelTester()
2070 .cr(2)
2071 .kr(4)
2072 .channels(channels)
2073 .width(3)
2074 .step(step)
2075 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2076 }
2077 }
2078}
2079
2080TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, multipixel_with_output_stride) {
2081 for (size_t channels = 1; channels <= 10; channels += 1) {
2082 DWConvMicrokernelTester()
2083 .cr(2)
2084 .kr(4)
2085 .channels(2)
2086 .width(5)
2087 .output_stride(13)
2088 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2089 }
2090}
2091
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2092TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, input_offset) {
2093 for (uint32_t channels = 4; channels < 32; channels += 6) {
2094 DWConvMicrokernelTester()
2095 .cr(2)
2096 .kr(4)
2097 .channels(channels)
2098 .input_offset(80)
2099 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2100 }
2101}
2102
2103TEST(F32_DWCONV_UP2X4__SCALAR_ACC2, zero) {
2104 for (uint32_t mz = 0; mz < 4; mz++) {
2105 for (uint32_t channels = 4; channels < 32; channels += 6) {
2106 DWConvMicrokernelTester()
2107 .cr(2)
2108 .kr(4)
2109 .channels(channels)
2110 .input_offset(80)
2111 .zero_index(mz)
2112 .Test(xnn_f32_dwconv_ukernel_up2x4__scalar_acc2);
2113 }
2114 }
2115}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2116
2117TEST(F32_DWCONV_UP1X9__SCALAR, c_eq_1) {
2118 DWConvMicrokernelTester()
2119 .cr(1)
2120 .kr(9)
2121 .channels(1)
2122 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
2123}
2124
2125TEST(F32_DWCONV_UP1X9__SCALAR, c_gt_1) {
2126 for (uint32_t channels = 2; channels < 10; channels++) {
2127 DWConvMicrokernelTester()
2128 .cr(1)
2129 .kr(9)
2130 .channels(channels)
2131 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
2132 }
2133}
2134
2135TEST(F32_DWCONV_UP1X9__SCALAR, multipixel) {
2136 for (size_t channels = 1; channels <= 5; channels += 1) {
2137 DWConvMicrokernelTester()
2138 .cr(1)
2139 .kr(9)
2140 .channels(channels)
2141 .width(3)
2142 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
2143 }
2144}
2145
2146TEST(F32_DWCONV_UP1X9__SCALAR, multipixel_with_step) {
2147 for (size_t channels = 1; channels <= 5; channels += 1) {
2148 for (size_t step = 2; step <= 9; step++) {
2149 DWConvMicrokernelTester()
2150 .cr(1)
2151 .kr(9)
2152 .channels(channels)
2153 .width(3)
2154 .step(step)
2155 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
2156 }
2157 }
2158}
2159
2160TEST(F32_DWCONV_UP1X9__SCALAR, multipixel_with_output_stride) {
2161 for (size_t channels = 1; channels <= 5; channels += 1) {
2162 DWConvMicrokernelTester()
2163 .cr(1)
2164 .kr(9)
2165 .channels(1)
2166 .width(5)
2167 .output_stride(7)
2168 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
2169 }
2170}
2171
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2172TEST(F32_DWCONV_UP1X9__SCALAR, input_offset) {
2173 for (uint32_t channels = 2; channels < 16; channels += 3) {
2174 DWConvMicrokernelTester()
2175 .cr(1)
2176 .kr(9)
2177 .channels(channels)
2178 .input_offset(48)
2179 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
2180 }
2181}
2182
2183TEST(F32_DWCONV_UP1X9__SCALAR, zero) {
2184 for (uint32_t mz = 0; mz < 9; mz++) {
2185 for (uint32_t channels = 2; channels < 16; channels += 3) {
2186 DWConvMicrokernelTester()
2187 .cr(1)
2188 .kr(9)
2189 .channels(channels)
2190 .input_offset(48)
2191 .zero_index(mz)
2192 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar);
2193 }
2194 }
2195}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2196
2197TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, c_eq_1) {
2198 DWConvMicrokernelTester()
2199 .cr(1)
2200 .kr(9)
2201 .channels(1)
2202 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
2203}
2204
2205TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, c_gt_1) {
2206 for (uint32_t channels = 2; channels < 10; channels++) {
2207 DWConvMicrokernelTester()
2208 .cr(1)
2209 .kr(9)
2210 .channels(channels)
2211 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
2212 }
2213}
2214
2215TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, multipixel) {
2216 for (size_t channels = 1; channels <= 5; channels += 1) {
2217 DWConvMicrokernelTester()
2218 .cr(1)
2219 .kr(9)
2220 .channels(channels)
2221 .width(3)
2222 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
2223 }
2224}
2225
2226TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, multipixel_with_step) {
2227 for (size_t channels = 1; channels <= 5; channels += 1) {
2228 for (size_t step = 2; step <= 9; step++) {
2229 DWConvMicrokernelTester()
2230 .cr(1)
2231 .kr(9)
2232 .channels(channels)
2233 .width(3)
2234 .step(step)
2235 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
2236 }
2237 }
2238}
2239
2240TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, multipixel_with_output_stride) {
2241 for (size_t channels = 1; channels <= 5; channels += 1) {
2242 DWConvMicrokernelTester()
2243 .cr(1)
2244 .kr(9)
2245 .channels(1)
2246 .width(5)
2247 .output_stride(7)
2248 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
2249 }
2250}
2251
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2252TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, input_offset) {
2253 for (uint32_t channels = 2; channels < 16; channels += 3) {
2254 DWConvMicrokernelTester()
2255 .cr(1)
2256 .kr(9)
2257 .channels(channels)
2258 .input_offset(48)
2259 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
2260 }
2261}
2262
2263TEST(F32_DWCONV_UP1X9__SCALAR_ACC2, zero) {
2264 for (uint32_t mz = 0; mz < 9; mz++) {
2265 for (uint32_t channels = 2; channels < 16; channels += 3) {
2266 DWConvMicrokernelTester()
2267 .cr(1)
2268 .kr(9)
2269 .channels(channels)
2270 .input_offset(48)
2271 .zero_index(mz)
2272 .Test(xnn_f32_dwconv_ukernel_up1x9__scalar_acc2);
2273 }
2274 }
2275}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2276
2277TEST(F32_DWCONV_UP2X9__SCALAR, c_eq_2) {
2278 DWConvMicrokernelTester()
2279 .cr(2)
2280 .kr(9)
2281 .channels(2)
2282 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2283}
2284
2285TEST(F32_DWCONV_UP2X9__SCALAR, c_div_2) {
2286 for (uint32_t channels = 4; channels < 32; channels += 6) {
2287 DWConvMicrokernelTester()
2288 .cr(2)
2289 .kr(9)
2290 .channels(channels)
2291 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2292 }
2293}
2294
2295TEST(F32_DWCONV_UP2X9__SCALAR, c_lt_2) {
2296 for (uint32_t channels = 1; channels < 2; channels++) {
2297 DWConvMicrokernelTester()
2298 .cr(2)
2299 .kr(9)
2300 .channels(channels)
2301 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2302 }
2303}
2304
2305TEST(F32_DWCONV_UP2X9__SCALAR, c_gt_2) {
2306 for (uint32_t channels = 3; channels < 4; channels++) {
2307 DWConvMicrokernelTester()
2308 .cr(2)
2309 .kr(9)
2310 .channels(channels)
2311 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2312 }
2313}
2314
2315TEST(F32_DWCONV_UP2X9__SCALAR, multipixel) {
2316 for (size_t channels = 1; channels <= 10; channels += 1) {
2317 DWConvMicrokernelTester()
2318 .cr(2)
2319 .kr(9)
2320 .channels(channels)
2321 .width(3)
2322 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2323 }
2324}
2325
2326TEST(F32_DWCONV_UP2X9__SCALAR, multipixel_with_step) {
2327 for (size_t channels = 1; channels <= 10; channels += 1) {
2328 for (size_t step = 2; step <= 9; step++) {
2329 DWConvMicrokernelTester()
2330 .cr(2)
2331 .kr(9)
2332 .channels(channels)
2333 .width(3)
2334 .step(step)
2335 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2336 }
2337 }
2338}
2339
2340TEST(F32_DWCONV_UP2X9__SCALAR, multipixel_with_output_stride) {
2341 for (size_t channels = 1; channels <= 10; channels += 1) {
2342 DWConvMicrokernelTester()
2343 .cr(2)
2344 .kr(9)
2345 .channels(2)
2346 .width(5)
2347 .output_stride(13)
2348 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2349 }
2350}
2351
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2352TEST(F32_DWCONV_UP2X9__SCALAR, input_offset) {
2353 for (uint32_t channels = 4; channels < 32; channels += 6) {
2354 DWConvMicrokernelTester()
2355 .cr(2)
2356 .kr(9)
2357 .channels(channels)
2358 .input_offset(80)
2359 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2360 }
2361}
2362
2363TEST(F32_DWCONV_UP2X9__SCALAR, zero) {
2364 for (uint32_t mz = 0; mz < 9; mz++) {
2365 for (uint32_t channels = 4; channels < 32; channels += 6) {
2366 DWConvMicrokernelTester()
2367 .cr(2)
2368 .kr(9)
2369 .channels(channels)
2370 .input_offset(80)
2371 .zero_index(mz)
2372 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar);
2373 }
2374 }
2375}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2376
2377TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_eq_2) {
2378 DWConvMicrokernelTester()
2379 .cr(2)
2380 .kr(9)
2381 .channels(2)
2382 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2383}
2384
2385TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_div_2) {
2386 for (uint32_t channels = 4; channels < 32; channels += 6) {
2387 DWConvMicrokernelTester()
2388 .cr(2)
2389 .kr(9)
2390 .channels(channels)
2391 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2392 }
2393}
2394
2395TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_lt_2) {
2396 for (uint32_t channels = 1; channels < 2; channels++) {
2397 DWConvMicrokernelTester()
2398 .cr(2)
2399 .kr(9)
2400 .channels(channels)
2401 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2402 }
2403}
2404
2405TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, c_gt_2) {
2406 for (uint32_t channels = 3; channels < 4; channels++) {
2407 DWConvMicrokernelTester()
2408 .cr(2)
2409 .kr(9)
2410 .channels(channels)
2411 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2412 }
2413}
2414
2415TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, multipixel) {
2416 for (size_t channels = 1; channels <= 10; channels += 1) {
2417 DWConvMicrokernelTester()
2418 .cr(2)
2419 .kr(9)
2420 .channels(channels)
2421 .width(3)
2422 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2423 }
2424}
2425
2426TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, multipixel_with_step) {
2427 for (size_t channels = 1; channels <= 10; channels += 1) {
2428 for (size_t step = 2; step <= 9; step++) {
2429 DWConvMicrokernelTester()
2430 .cr(2)
2431 .kr(9)
2432 .channels(channels)
2433 .width(3)
2434 .step(step)
2435 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2436 }
2437 }
2438}
2439
2440TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, multipixel_with_output_stride) {
2441 for (size_t channels = 1; channels <= 10; channels += 1) {
2442 DWConvMicrokernelTester()
2443 .cr(2)
2444 .kr(9)
2445 .channels(2)
2446 .width(5)
2447 .output_stride(13)
2448 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2449 }
2450}
2451
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2452TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, input_offset) {
2453 for (uint32_t channels = 4; channels < 32; channels += 6) {
2454 DWConvMicrokernelTester()
2455 .cr(2)
2456 .kr(9)
2457 .channels(channels)
2458 .input_offset(80)
2459 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2460 }
2461}
2462
2463TEST(F32_DWCONV_UP2X9__SCALAR_ACC2, zero) {
2464 for (uint32_t mz = 0; mz < 9; mz++) {
2465 for (uint32_t channels = 4; channels < 32; channels += 6) {
2466 DWConvMicrokernelTester()
2467 .cr(2)
2468 .kr(9)
2469 .channels(channels)
2470 .input_offset(80)
2471 .zero_index(mz)
2472 .Test(xnn_f32_dwconv_ukernel_up2x9__scalar_acc2);
2473 }
2474 }
2475}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2476
2477TEST(F32_DWCONV_UP1X25__SCALAR, c_eq_1) {
2478 DWConvMicrokernelTester()
2479 .cr(1)
2480 .kr(25)
2481 .channels(1)
2482 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
2483}
2484
2485TEST(F32_DWCONV_UP1X25__SCALAR, c_gt_1) {
2486 for (uint32_t channels = 2; channels < 10; channels++) {
2487 DWConvMicrokernelTester()
2488 .cr(1)
2489 .kr(25)
2490 .channels(channels)
2491 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
2492 }
2493}
2494
2495TEST(F32_DWCONV_UP1X25__SCALAR, multipixel) {
2496 for (size_t channels = 1; channels <= 5; channels += 1) {
2497 DWConvMicrokernelTester()
2498 .cr(1)
2499 .kr(25)
2500 .channels(channels)
2501 .width(3)
2502 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
2503 }
2504}
2505
2506TEST(F32_DWCONV_UP1X25__SCALAR, multipixel_with_step) {
2507 for (size_t channels = 1; channels <= 5; channels += 1) {
2508 for (size_t step = 2; step <= 25; step++) {
2509 DWConvMicrokernelTester()
2510 .cr(1)
2511 .kr(25)
2512 .channels(channels)
2513 .width(3)
2514 .step(step)
2515 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
2516 }
2517 }
2518}
2519
2520TEST(F32_DWCONV_UP1X25__SCALAR, multipixel_with_output_stride) {
2521 for (size_t channels = 1; channels <= 5; channels += 1) {
2522 DWConvMicrokernelTester()
2523 .cr(1)
2524 .kr(25)
2525 .channels(1)
2526 .width(5)
2527 .output_stride(7)
2528 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
2529 }
2530}
2531
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2532TEST(F32_DWCONV_UP1X25__SCALAR, input_offset) {
2533 for (uint32_t channels = 2; channels < 16; channels += 3) {
2534 DWConvMicrokernelTester()
2535 .cr(1)
2536 .kr(25)
2537 .channels(channels)
2538 .input_offset(48)
2539 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
2540 }
2541}
2542
2543TEST(F32_DWCONV_UP1X25__SCALAR, zero) {
2544 for (uint32_t mz = 0; mz < 25; mz++) {
2545 for (uint32_t channels = 2; channels < 16; channels += 3) {
2546 DWConvMicrokernelTester()
2547 .cr(1)
2548 .kr(25)
2549 .channels(channels)
2550 .input_offset(48)
2551 .zero_index(mz)
2552 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar);
2553 }
2554 }
2555}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2556
2557TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, c_eq_1) {
2558 DWConvMicrokernelTester()
2559 .cr(1)
2560 .kr(25)
2561 .channels(1)
2562 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
2563}
2564
2565TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, c_gt_1) {
2566 for (uint32_t channels = 2; channels < 10; channels++) {
2567 DWConvMicrokernelTester()
2568 .cr(1)
2569 .kr(25)
2570 .channels(channels)
2571 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
2572 }
2573}
2574
2575TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, multipixel) {
2576 for (size_t channels = 1; channels <= 5; channels += 1) {
2577 DWConvMicrokernelTester()
2578 .cr(1)
2579 .kr(25)
2580 .channels(channels)
2581 .width(3)
2582 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
2583 }
2584}
2585
2586TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, multipixel_with_step) {
2587 for (size_t channels = 1; channels <= 5; channels += 1) {
2588 for (size_t step = 2; step <= 25; step++) {
2589 DWConvMicrokernelTester()
2590 .cr(1)
2591 .kr(25)
2592 .channels(channels)
2593 .width(3)
2594 .step(step)
2595 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
2596 }
2597 }
2598}
2599
2600TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, multipixel_with_output_stride) {
2601 for (size_t channels = 1; channels <= 5; channels += 1) {
2602 DWConvMicrokernelTester()
2603 .cr(1)
2604 .kr(25)
2605 .channels(1)
2606 .width(5)
2607 .output_stride(7)
2608 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
2609 }
2610}
2611
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2612TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, input_offset) {
2613 for (uint32_t channels = 2; channels < 16; channels += 3) {
2614 DWConvMicrokernelTester()
2615 .cr(1)
2616 .kr(25)
2617 .channels(channels)
2618 .input_offset(48)
2619 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
2620 }
2621}
2622
2623TEST(F32_DWCONV_UP1X25__SCALAR_ACC2, zero) {
2624 for (uint32_t mz = 0; mz < 25; mz++) {
2625 for (uint32_t channels = 2; channels < 16; channels += 3) {
2626 DWConvMicrokernelTester()
2627 .cr(1)
2628 .kr(25)
2629 .channels(channels)
2630 .input_offset(48)
2631 .zero_index(mz)
2632 .Test(xnn_f32_dwconv_ukernel_up1x25__scalar_acc2);
2633 }
2634 }
2635}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2636
2637TEST(F32_DWCONV_UP2X25__SCALAR, c_eq_2) {
2638 DWConvMicrokernelTester()
2639 .cr(2)
2640 .kr(25)
2641 .channels(2)
2642 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2643}
2644
2645TEST(F32_DWCONV_UP2X25__SCALAR, c_div_2) {
2646 for (uint32_t channels = 4; channels < 32; channels += 6) {
2647 DWConvMicrokernelTester()
2648 .cr(2)
2649 .kr(25)
2650 .channels(channels)
2651 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2652 }
2653}
2654
2655TEST(F32_DWCONV_UP2X25__SCALAR, c_lt_2) {
2656 for (uint32_t channels = 1; channels < 2; channels++) {
2657 DWConvMicrokernelTester()
2658 .cr(2)
2659 .kr(25)
2660 .channels(channels)
2661 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2662 }
2663}
2664
2665TEST(F32_DWCONV_UP2X25__SCALAR, c_gt_2) {
2666 for (uint32_t channels = 3; channels < 4; channels++) {
2667 DWConvMicrokernelTester()
2668 .cr(2)
2669 .kr(25)
2670 .channels(channels)
2671 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2672 }
2673}
2674
2675TEST(F32_DWCONV_UP2X25__SCALAR, multipixel) {
2676 for (size_t channels = 1; channels <= 10; channels += 1) {
2677 DWConvMicrokernelTester()
2678 .cr(2)
2679 .kr(25)
2680 .channels(channels)
2681 .width(3)
2682 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2683 }
2684}
2685
2686TEST(F32_DWCONV_UP2X25__SCALAR, multipixel_with_step) {
2687 for (size_t channels = 1; channels <= 10; channels += 1) {
2688 for (size_t step = 2; step <= 25; step++) {
2689 DWConvMicrokernelTester()
2690 .cr(2)
2691 .kr(25)
2692 .channels(channels)
2693 .width(3)
2694 .step(step)
2695 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2696 }
2697 }
2698}
2699
2700TEST(F32_DWCONV_UP2X25__SCALAR, multipixel_with_output_stride) {
2701 for (size_t channels = 1; channels <= 10; channels += 1) {
2702 DWConvMicrokernelTester()
2703 .cr(2)
2704 .kr(25)
2705 .channels(2)
2706 .width(5)
2707 .output_stride(13)
2708 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2709 }
2710}
2711
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2712TEST(F32_DWCONV_UP2X25__SCALAR, input_offset) {
2713 for (uint32_t channels = 4; channels < 32; channels += 6) {
2714 DWConvMicrokernelTester()
2715 .cr(2)
2716 .kr(25)
2717 .channels(channels)
2718 .input_offset(80)
2719 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2720 }
2721}
2722
2723TEST(F32_DWCONV_UP2X25__SCALAR, zero) {
2724 for (uint32_t mz = 0; mz < 25; mz++) {
2725 for (uint32_t channels = 4; channels < 32; channels += 6) {
2726 DWConvMicrokernelTester()
2727 .cr(2)
2728 .kr(25)
2729 .channels(channels)
2730 .input_offset(80)
2731 .zero_index(mz)
2732 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar);
2733 }
2734 }
2735}
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]2736
2737TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_eq_2) {
2738 DWConvMicrokernelTester()
2739 .cr(2)
2740 .kr(25)
2741 .channels(2)
2742 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2743}
2744
2745TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_div_2) {
2746 for (uint32_t channels = 4; channels < 32; channels += 6) {
2747 DWConvMicrokernelTester()
2748 .cr(2)
2749 .kr(25)
2750 .channels(channels)
2751 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2752 }
2753}
2754
2755TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_lt_2) {
2756 for (uint32_t channels = 1; channels < 2; channels++) {
2757 DWConvMicrokernelTester()
2758 .cr(2)
2759 .kr(25)
2760 .channels(channels)
2761 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2762 }
2763}
2764
2765TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, c_gt_2) {
2766 for (uint32_t channels = 3; channels < 4; channels++) {
2767 DWConvMicrokernelTester()
2768 .cr(2)
2769 .kr(25)
2770 .channels(channels)
2771 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2772 }
2773}
2774
2775TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, multipixel) {
2776 for (size_t channels = 1; channels <= 10; channels += 1) {
2777 DWConvMicrokernelTester()
2778 .cr(2)
2779 .kr(25)
2780 .channels(channels)
2781 .width(3)
2782 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2783 }
2784}
2785
2786TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, multipixel_with_step) {
2787 for (size_t channels = 1; channels <= 10; channels += 1) {
2788 for (size_t step = 2; step <= 25; step++) {
2789 DWConvMicrokernelTester()
2790 .cr(2)
2791 .kr(25)
2792 .channels(channels)
2793 .width(3)
2794 .step(step)
2795 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2796 }
2797 }
2798}
2799
2800TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, multipixel_with_output_stride) {
2801 for (size_t channels = 1; channels <= 10; channels += 1) {
2802 DWConvMicrokernelTester()
2803 .cr(2)
2804 .kr(25)
2805 .channels(2)
2806 .width(5)
2807 .output_stride(13)
2808 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2809 }
2810}
Frank Barchardd5360722020-05-17 16:10:36 -0700[diff] [blame]2811
2812TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, input_offset) {
2813 for (uint32_t channels = 4; channels < 32; channels += 6) {
2814 DWConvMicrokernelTester()
2815 .cr(2)
2816 .kr(25)
2817 .channels(channels)
2818 .input_offset(80)
2819 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2820 }
2821}
2822
2823TEST(F32_DWCONV_UP2X25__SCALAR_ACC2, zero) {
2824 for (uint32_t mz = 0; mz < 25; mz++) {
2825 for (uint32_t channels = 4; channels < 32; channels += 6) {
2826 DWConvMicrokernelTester()
2827 .cr(2)
2828 .kr(25)
2829 .channels(channels)
2830 .input_offset(80)
2831 .zero_index(mz)
2832 .Test(xnn_f32_dwconv_ukernel_up2x25__scalar_acc2);
2833 }
2834 }
2835}