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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley97043ac2014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley97043ac2014-04-09 13:14:54 +010033#include <assert.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000034#include <runtime_svc.h>
35#include <debug.h>
Dan Handley35e98e52014-04-09 13:13:04 +010036#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
38/*******************************************************************************
39 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
40 ******************************************************************************/
41int psci_cpu_on(unsigned long target_cpu,
42 unsigned long entrypoint,
43 unsigned long context_id)
44
45{
46 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000047 unsigned int start_afflvl, end_afflvl;
Soby Mathew78879b92015-01-06 15:36:38 +000048 entry_point_info_t ep;
Achin Gupta4f6ad662013-10-25 09:08:21 +010049
50 /* Determine if the cpu exists of not */
51 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
52 if (rc != PSCI_E_SUCCESS) {
Soby Mathew539dced2014-10-02 16:56:51 +010053 return PSCI_E_INVALID_PARAMS;
54 }
55
56 /* Validate the entrypoint using platform pm_ops */
57 if (psci_plat_pm_ops->validate_ns_entrypoint) {
58 rc = psci_plat_pm_ops->validate_ns_entrypoint(entrypoint);
59 if (rc != PSCI_E_SUCCESS) {
60 assert(rc == PSCI_E_INVALID_PARAMS);
61 return PSCI_E_INVALID_PARAMS;
62 }
Achin Gupta4f6ad662013-10-25 09:08:21 +010063 }
64
Achin Gupta0959db52013-12-02 17:33:04 +000065 /*
Soby Mathew78879b92015-01-06 15:36:38 +000066 * Verify and derive the re-entry information for
67 * the non-secure world from the non-secure state from
68 * where this call originated.
69 */
70 rc = psci_get_ns_ep_info(&ep, entrypoint, context_id);
71 if (rc != PSCI_E_SUCCESS)
72 return rc;
73
74
75 /*
Achin Gupta0959db52013-12-02 17:33:04 +000076 * To turn this cpu on, specify which affinity
77 * levels need to be turned on
78 */
79 start_afflvl = MPIDR_AFFLVL0;
80 end_afflvl = get_max_afflvl();
Achin Gupta4f6ad662013-10-25 09:08:21 +010081 rc = psci_afflvl_on(target_cpu,
Soby Mathew78879b92015-01-06 15:36:38 +000082 &ep,
Achin Gupta4f6ad662013-10-25 09:08:21 +010083 start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +000084 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +010085
Achin Gupta4f6ad662013-10-25 09:08:21 +010086 return rc;
87}
88
89unsigned int psci_version(void)
90{
91 return PSCI_MAJOR_VER | PSCI_MINOR_VER;
92}
93
94int psci_cpu_suspend(unsigned int power_state,
95 unsigned long entrypoint,
96 unsigned long context_id)
97{
98 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000099 unsigned int target_afflvl, pstate_type;
Soby Mathew78879b92015-01-06 15:36:38 +0000100 entry_point_info_t ep;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100101
Vikram Kanigiri759ec932014-04-01 19:26:26 +0100102 /* Check SBZ bits in power state are zero */
103 if (psci_validate_power_state(power_state))
104 return PSCI_E_INVALID_PARAMS;
105
Achin Gupta4f6ad662013-10-25 09:08:21 +0100106 /* Sanity check the requested state */
Achin Gupta0959db52013-12-02 17:33:04 +0000107 target_afflvl = psci_get_pstate_afflvl(power_state);
Soby Mathew264999f2014-10-02 17:24:19 +0100108 if (target_afflvl > get_max_afflvl())
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000109 return PSCI_E_INVALID_PARAMS;
110
Soby Mathew539dced2014-10-02 16:56:51 +0100111 /* Validate the power_state using platform pm_ops */
112 if (psci_plat_pm_ops->validate_power_state) {
113 rc = psci_plat_pm_ops->validate_power_state(power_state);
114 if (rc != PSCI_E_SUCCESS) {
115 assert(rc == PSCI_E_INVALID_PARAMS);
116 return PSCI_E_INVALID_PARAMS;
117 }
118 }
119
120 /* Validate the entrypoint using platform pm_ops */
121 if (psci_plat_pm_ops->validate_ns_entrypoint) {
122 rc = psci_plat_pm_ops->validate_ns_entrypoint(entrypoint);
123 if (rc != PSCI_E_SUCCESS) {
124 assert(rc == PSCI_E_INVALID_PARAMS);
125 return PSCI_E_INVALID_PARAMS;
126 }
127 }
128
Achin Gupta317ba092014-05-09 19:32:25 +0100129 /* Determine the 'state type' in the 'power_state' parameter */
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000130 pstate_type = psci_get_pstate_type(power_state);
Achin Gupta317ba092014-05-09 19:32:25 +0100131
132 /*
133 * Ensure that we have a platform specific handler for entering
134 * a standby state.
135 */
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000136 if (pstate_type == PSTATE_TYPE_STANDBY) {
Achin Gupta317ba092014-05-09 19:32:25 +0100137 if (!psci_plat_pm_ops->affinst_standby)
Vikram Kanigirid118f9f2014-03-21 11:57:10 +0000138 return PSCI_E_INVALID_PARAMS;
Achin Gupta317ba092014-05-09 19:32:25 +0100139
Soby Mathew539dced2014-10-02 16:56:51 +0100140 psci_plat_pm_ops->affinst_standby(power_state);
141 return PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100142 }
143
Achin Gupta317ba092014-05-09 19:32:25 +0100144 /*
Soby Mathew78879b92015-01-06 15:36:38 +0000145 * Verify and derive the re-entry information for
146 * the non-secure world from the non-secure state from
147 * where this call originated.
148 */
149 rc = psci_get_ns_ep_info(&ep, entrypoint, context_id);
150 if (rc != PSCI_E_SUCCESS)
151 return rc;
152
Soby Mathew31244d72014-09-30 11:19:51 +0100153 /* Save PSCI power state parameter for the core in suspend context */
154 psci_set_suspend_power_state(power_state);
155
Soby Mathew78879b92015-01-06 15:36:38 +0000156 /*
Achin Gupta317ba092014-05-09 19:32:25 +0100157 * Do what is needed to enter the power down state. Upon success,
Soby Mathew539dced2014-10-02 16:56:51 +0100158 * enter the final wfi which will power down this CPU.
Achin Gupta317ba092014-05-09 19:32:25 +0100159 */
Soby Mathew539dced2014-10-02 16:56:51 +0100160 psci_afflvl_suspend(&ep,
161 MPIDR_AFFLVL0,
162 target_afflvl);
163
164 psci_power_down_wfi();
Soby Mathew31244d72014-09-30 11:19:51 +0100165
166 /* Reset PSCI power state parameter for the core. */
167 psci_set_suspend_power_state(PSCI_INVALID_DATA);
Soby Mathew539dced2014-10-02 16:56:51 +0100168 return PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100169}
170
171int psci_cpu_off(void)
172{
173 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100174 int target_afflvl = get_max_afflvl();
175
Achin Gupta4f6ad662013-10-25 09:08:21 +0100176 /*
177 * Traverse from the highest to the lowest affinity level. When the
178 * lowest affinity level is hit, all the locks are acquired. State
179 * management is done immediately followed by cpu, cluster ...
180 * ..target_afflvl specific actions as this function unwinds back.
181 */
Andrew Thoelke56378aa2014-06-09 12:44:21 +0100182 rc = psci_afflvl_off(MPIDR_AFFLVL0, target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100183
Achin Gupta3140a9e2013-12-02 16:23:12 +0000184 /*
Achin Gupta317ba092014-05-09 19:32:25 +0100185 * Check if all actions needed to safely power down this cpu have
186 * successfully completed. Enter a wfi loop which will allow the
187 * power controller to physically power down this cpu.
188 */
189 if (rc == PSCI_E_SUCCESS)
190 psci_power_down_wfi();
191
192 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000193 * The only error cpu_off can return is E_DENIED. So check if that's
194 * indeed the case.
195 */
Achin Gupta317ba092014-05-09 19:32:25 +0100196 assert (rc == PSCI_E_DENIED);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100197
198 return rc;
199}
200
201int psci_affinity_info(unsigned long target_affinity,
202 unsigned int lowest_affinity_level)
203{
204 int rc = PSCI_E_INVALID_PARAMS;
205 unsigned int aff_state;
Dan Handleyfb037bf2014-04-10 15:37:22 +0100206 aff_map_node_t *node;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100207
Achin Gupta75f73672013-12-05 16:33:10 +0000208 if (lowest_affinity_level > get_max_afflvl())
209 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100210
211 node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
212 if (node && (node->state & PSCI_AFF_PRESENT)) {
Achin Gupta75f73672013-12-05 16:33:10 +0000213
214 /*
215 * TODO: For affinity levels higher than 0 i.e. cpu, the
216 * state will always be either ON or OFF. Need to investigate
217 * how critical is it to support ON_PENDING here.
218 */
219 aff_state = psci_get_state(node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100220
221 /* A suspended cpu is available & on for the OS */
222 if (aff_state == PSCI_STATE_SUSPEND) {
223 aff_state = PSCI_STATE_ON;
224 }
225
226 rc = aff_state;
227 }
Achin Gupta75f73672013-12-05 16:33:10 +0000228
Achin Gupta4f6ad662013-10-25 09:08:21 +0100229 return rc;
230}
231
232/* Unimplemented */
233int psci_migrate(unsigned int target_cpu)
234{
235 return PSCI_E_NOT_SUPPORTED;
236}
237
238/* Unimplemented */
239unsigned int psci_migrate_info_type(void)
240{
Achin Gupta607084e2014-02-09 18:24:19 +0000241 return PSCI_TOS_NOT_PRESENT_MP;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100242}
243
244unsigned long psci_migrate_info_up_cpu(void)
245{
246 /*
247 * Return value of this currently unsupported call depends upon
248 * what psci_migrate_info_type() returns.
249 */
250 return PSCI_E_SUCCESS;
251}
252
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000253/*******************************************************************************
254 * PSCI top level handler for servicing SMCs.
255 ******************************************************************************/
256uint64_t psci_smc_handler(uint32_t smc_fid,
257 uint64_t x1,
258 uint64_t x2,
259 uint64_t x3,
260 uint64_t x4,
261 void *cookie,
262 void *handle,
263 uint64_t flags)
264{
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100265 if (is_caller_secure(flags))
266 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000267
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100268 if (((smc_fid >> FUNCID_CC_SHIFT) & FUNCID_CC_MASK) == SMC_32) {
269 /* 32-bit PSCI function, clear top parameter bits */
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000270
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100271 x1 = (uint32_t)x1;
272 x2 = (uint32_t)x2;
273 x3 = (uint32_t)x3;
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000274
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100275 switch (smc_fid) {
276 case PSCI_VERSION:
277 SMC_RET1(handle, psci_version());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000278
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100279 case PSCI_CPU_OFF:
Achin Guptab51da822014-06-26 09:58:52 +0100280 SMC_RET1(handle, psci_cpu_off());
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000281
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100282 case PSCI_CPU_SUSPEND_AARCH32:
Achin Guptab51da822014-06-26 09:58:52 +0100283 SMC_RET1(handle, psci_cpu_suspend(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000284
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100285 case PSCI_CPU_ON_AARCH32:
286 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000287
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100288 case PSCI_AFFINITY_INFO_AARCH32:
289 SMC_RET1(handle, psci_affinity_info(x1, x2));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000290
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100291 case PSCI_MIG_AARCH32:
292 SMC_RET1(handle, psci_migrate(x1));
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000293
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100294 case PSCI_MIG_INFO_TYPE:
295 SMC_RET1(handle, psci_migrate_info_type());
296
297 case PSCI_MIG_INFO_UP_CPU_AARCH32:
298 SMC_RET1(handle, psci_migrate_info_up_cpu());
299
Juan Castillod5f13092014-08-12 11:17:06 +0100300 case PSCI_SYSTEM_OFF:
301 psci_system_off();
302 /* We should never return from psci_system_off() */
303
304 case PSCI_SYSTEM_RESET:
305 psci_system_reset();
306 /* We should never return from psci_system_reset() */
307
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100308 default:
309 break;
310 }
311 } else {
312 /* 64-bit PSCI function */
313
314 switch (smc_fid) {
315 case PSCI_CPU_SUSPEND_AARCH64:
Achin Guptab51da822014-06-26 09:58:52 +0100316 SMC_RET1(handle, psci_cpu_suspend(x1, x2, x3));
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100317
318 case PSCI_CPU_ON_AARCH64:
319 SMC_RET1(handle, psci_cpu_on(x1, x2, x3));
320
321 case PSCI_AFFINITY_INFO_AARCH64:
322 SMC_RET1(handle, psci_affinity_info(x1, x2));
323
324 case PSCI_MIG_AARCH64:
325 SMC_RET1(handle, psci_migrate(x1));
326
327 case PSCI_MIG_INFO_UP_CPU_AARCH64:
328 SMC_RET1(handle, psci_migrate_info_up_cpu());
329
330 default:
331 break;
332 }
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000333 }
334
Andrew Thoelke5003eca2014-06-10 16:37:37 +0100335 WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
336 SMC_RET1(handle, SMC_UNK);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000337}