Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1 | %{ |
| 2 | /* |
| 3 | * Copyright © 2006 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #include <stdio.h> |
Eric Anholt | f2f1856 | 2006-08-22 12:46:37 -0700 | [diff] [blame] | 30 | #include <string.h> |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 31 | #include <stdlib.h> |
Damien Lespiau | 5e0da9f | 2013-01-24 12:21:13 +0000 | [diff] [blame] | 32 | #include <stdbool.h> |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 33 | #include <stdarg.h> |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 34 | #include <assert.h> |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 35 | #include "gen4asm.h" |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 36 | #include "brw_eu.h" |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 37 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 38 | #define DEFAULT_EXECSIZE (ffs(program_defaults.execute_size) - 1) |
| 39 | #define DEFAULT_DSTREGION -1 |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 40 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 41 | #define SWIZZLE(reg) (reg.dw1.bits.swizzle) |
| 42 | |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 43 | #define YYLTYPE YYLTYPE |
| 44 | typedef struct YYLTYPE |
| 45 | { |
| 46 | int first_line; |
| 47 | int first_column; |
| 48 | int last_line; |
| 49 | int last_column; |
| 50 | } YYLTYPE; |
| 51 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 52 | extern long int gen_level; |
| 53 | extern int advanced_flag; |
| 54 | extern int yylineno; |
| 55 | extern int need_export; |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 56 | static struct src_operand src_null_reg = |
| 57 | { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 58 | .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 59 | .reg.nr = BRW_ARF_NULL, |
| 60 | .reg.type = BRW_REGISTER_TYPE_UD, |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 61 | }; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 62 | static struct brw_reg dst_null_reg = |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 63 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 64 | .file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 65 | .nr = BRW_ARF_NULL, |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 66 | }; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 67 | static struct brw_reg ip_dst = |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 68 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 69 | .file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 70 | .nr = BRW_ARF_IP, |
| 71 | .type = BRW_REGISTER_TYPE_UD, |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 72 | .address_mode = BRW_ADDRESS_DIRECT, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 73 | .hstride = 1, |
| 74 | .dw1.bits.writemask = BRW_WRITEMASK_XYZW, |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 75 | }; |
| 76 | static struct src_operand ip_src = |
| 77 | { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 78 | .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 79 | .reg.nr = BRW_ARF_IP, |
| 80 | .reg.type = BRW_REGISTER_TYPE_UD, |
| 81 | .reg.address_mode = BRW_ADDRESS_DIRECT, |
| 82 | .reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP, |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 83 | }; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 84 | |
| 85 | static int get_type_size(GLuint type); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 86 | int set_instruction_dest(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 87 | struct brw_reg *dest); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 88 | int set_instruction_src0(struct brw_instruction *instr, |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 89 | struct src_operand *src, |
| 90 | YYLTYPE *location); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 91 | int set_instruction_src1(struct brw_instruction *instr, |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 92 | struct src_operand *src, |
| 93 | YYLTYPE *location); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 94 | int set_instruction_dest_three_src(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 95 | struct brw_reg *dest); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 96 | int set_instruction_src0_three_src(struct brw_instruction *instr, |
| 97 | struct src_operand *src); |
| 98 | int set_instruction_src1_three_src(struct brw_instruction *instr, |
| 99 | struct src_operand *src); |
| 100 | int set_instruction_src2_three_src(struct brw_instruction *instr, |
| 101 | struct src_operand *src); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 102 | void set_instruction_options(struct brw_instruction *instr, |
| 103 | struct brw_instruction *options); |
| 104 | void set_instruction_predicate(struct brw_instruction *instr, |
| 105 | struct brw_instruction *predicate); |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 106 | void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 107 | int type); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 108 | void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 109 | int type); |
| 110 | |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 111 | enum message_level { |
| 112 | WARN, |
| 113 | ERROR, |
| 114 | }; |
| 115 | |
| 116 | static void message(enum message_level level, YYLTYPE *location, |
| 117 | const char *fmt, ...) |
| 118 | { |
| 119 | static const char *level_str[] = { "warning", "error" }; |
| 120 | va_list args; |
| 121 | |
| 122 | if (location) |
| 123 | fprintf(stderr, "%d:%d: %s: ", location->first_line, |
| 124 | location->first_column, level_str[level]); |
| 125 | else |
| 126 | fprintf(stderr, "%s: ", level_str[level]); |
| 127 | |
| 128 | va_start(args, fmt); |
| 129 | vfprintf(stderr, fmt, args); |
| 130 | va_end(args); |
| 131 | } |
| 132 | |
Damien Lespiau | d70e9f8 | 2013-01-26 23:09:42 +0000 | [diff] [blame] | 133 | #define warn(flag, l, fmt, ...) \ |
| 134 | do { \ |
| 135 | if (warning_flags & WARN_ ## flag) \ |
| 136 | message(WARN, location, fmt, ## __VA_ARGS__); \ |
| 137 | } while(0) |
| 138 | |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 139 | #define error(l, fmt, ...) message(ERROR, location, fmt, ## __VA_ARGS__) |
| 140 | |
Damien Lespiau | 574a249 | 2013-01-26 18:26:03 +0000 | [diff] [blame] | 141 | /* like strcmp, but handles NULL pointers */ |
| 142 | static bool strcmp0(const char *s1, const char* s2) |
| 143 | { |
| 144 | if (!s1) |
| 145 | return -(s1 != s2); |
| 146 | if (!s2) |
| 147 | return s1 != s2; |
| 148 | return strcmp (s1, s2); |
| 149 | } |
| 150 | |
| 151 | static bool region_equal(struct region *r1, struct region *r2) |
| 152 | { |
| 153 | return memcmp(r1, r2, sizeof(struct region)) == 0; |
| 154 | } |
| 155 | |
| 156 | static bool reg_equal(struct brw_reg *r1, struct brw_reg *r2) |
| 157 | { |
| 158 | return memcmp(r1, r2, sizeof(struct brw_reg)) == 0; |
| 159 | } |
| 160 | |
| 161 | static bool declared_register_equal(struct declared_register *r1, |
| 162 | struct declared_register *r2) |
| 163 | { |
| 164 | if (strcmp0(r1->name, r2->name) != 0) |
| 165 | return false; |
| 166 | |
| 167 | if (!reg_equal(&r1->reg, &r2->reg)) |
| 168 | return false; |
| 169 | |
| 170 | if (!region_equal(&r1->src_region, &r2->src_region)) |
| 171 | return false; |
| 172 | |
| 173 | if (r1->element_size != r2->element_size || |
| 174 | r1->dst_region != r2->dst_region || |
| 175 | r1->type != r2->type) |
| 176 | return false; |
| 177 | |
| 178 | return true; |
| 179 | } |
| 180 | |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 181 | static void brw_program_init(struct brw_program *p) |
| 182 | { |
| 183 | memset(p, 0, sizeof(struct brw_program)); |
| 184 | } |
| 185 | |
| 186 | static void brw_program_append_entry(struct brw_program *p, |
| 187 | struct brw_program_instruction *entry) |
| 188 | { |
| 189 | entry->next = NULL; |
| 190 | if (p->last) |
| 191 | p->last->next = entry; |
| 192 | else |
| 193 | p->first = entry; |
| 194 | p->last = entry; |
| 195 | } |
| 196 | |
| 197 | static void brw_program_add_instruction(struct brw_program *p, |
| 198 | struct brw_instruction *instruction) |
| 199 | { |
| 200 | struct brw_program_instruction *list_entry; |
| 201 | |
| 202 | list_entry = calloc(sizeof(struct brw_program_instruction), 1); |
Damien Lespiau | a45a471 | 2013-01-21 19:28:41 +0000 | [diff] [blame] | 203 | list_entry->type = GEN4ASM_INSTRUCTION_GEN; |
| 204 | list_entry->instruction.gen = *instruction; |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 205 | brw_program_append_entry(p, list_entry); |
| 206 | } |
| 207 | |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 208 | static void brw_program_add_relocatable(struct brw_program *p, |
| 209 | struct relocatable_instruction *reloc) |
| 210 | { |
| 211 | struct brw_program_instruction *list_entry; |
| 212 | |
| 213 | list_entry = calloc(sizeof(struct brw_program_instruction), 1); |
| 214 | list_entry->type = GEN4ASM_INSTRUCTION_GEN_RELOCATABLE; |
| 215 | list_entry->instruction.reloc = *reloc; |
| 216 | brw_program_append_entry(p, list_entry); |
| 217 | } |
| 218 | |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 219 | static void brw_program_add_label(struct brw_program *p, const char *label) |
| 220 | { |
| 221 | struct brw_program_instruction *list_entry; |
| 222 | |
| 223 | list_entry = calloc(sizeof(struct brw_program_instruction), 1); |
Damien Lespiau | a45a471 | 2013-01-21 19:28:41 +0000 | [diff] [blame] | 224 | list_entry->type = GEN4ASM_INSTRUCTION_LABEL; |
| 225 | list_entry->instruction.label.name = strdup(label); |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 226 | brw_program_append_entry(p, list_entry); |
| 227 | } |
| 228 | |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 229 | static int resolve_dst_region(struct declared_register *reference, int region) |
| 230 | { |
| 231 | int resolved = region; |
| 232 | |
| 233 | if (resolved == DEFAULT_DSTREGION) { |
| 234 | if (reference) |
| 235 | resolved = reference->dst_region; |
| 236 | else |
| 237 | resolved = 1; |
| 238 | } |
| 239 | |
| 240 | assert(resolved == 1 || resolved == 2 || resolved == 3); |
| 241 | return resolved; |
| 242 | } |
| 243 | |
Damien Lespiau | 5e0da9f | 2013-01-24 12:21:13 +0000 | [diff] [blame] | 244 | static bool validate_dst_reg(struct brw_instruction *insn, struct brw_reg *reg) |
| 245 | { |
| 246 | |
| 247 | if (reg->address_mode == BRW_ADDRESS_DIRECT && |
| 248 | insn->header.access_mode == BRW_ALIGN_1 && |
| 249 | reg->dw1.bits.writemask != 0 && |
| 250 | reg->dw1.bits.writemask != BRW_WRITEMASK_XYZW) |
| 251 | { |
| 252 | fprintf(stderr, "error: write mask set in align1 instruction\n"); |
| 253 | return false; |
| 254 | } |
| 255 | |
| 256 | return true; |
| 257 | } |
| 258 | |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 259 | static bool validate_src_reg(struct brw_instruction *insn, |
| 260 | struct brw_reg reg, |
| 261 | YYLTYPE *location) |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 262 | { |
Damien Lespiau | d70e9f8 | 2013-01-26 23:09:42 +0000 | [diff] [blame] | 263 | int hstride_for_reg[] = {0, 1, 2, 4}; |
Damien Lespiau | 95b1208 | 2013-01-26 23:55:01 +0000 | [diff] [blame^] | 264 | int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; |
Damien Lespiau | d70e9f8 | 2013-01-26 23:09:42 +0000 | [diff] [blame] | 265 | int width_for_reg[] = {1, 2, 4, 8, 16}; |
Damien Lespiau | 95b1208 | 2013-01-26 23:55:01 +0000 | [diff] [blame^] | 266 | int execsize_for_reg[] = {1, 2, 4, 8, 16, 32}; |
| 267 | int width, hstride, vstride, execsize; |
Damien Lespiau | d70e9f8 | 2013-01-26 23:09:42 +0000 | [diff] [blame] | 268 | |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 269 | if (reg.file == BRW_IMMEDIATE_VALUE) |
| 270 | return true; |
| 271 | |
| 272 | if (insn->header.access_mode == BRW_ALIGN_1 && |
| 273 | SWIZZLE(reg) && SWIZZLE(reg) != BRW_SWIZZLE_NOOP) |
| 274 | { |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 275 | error(location, "swizzle bits set in align1 instruction\n"); |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 276 | return false; |
| 277 | } |
| 278 | |
Damien Lespiau | d70e9f8 | 2013-01-26 23:09:42 +0000 | [diff] [blame] | 279 | assert(reg.hstride >= 0 && reg.hstride < ARRAY_SIZE(hstride_for_reg)); |
| 280 | hstride = hstride_for_reg[reg.hstride]; |
| 281 | |
Damien Lespiau | 95b1208 | 2013-01-26 23:55:01 +0000 | [diff] [blame^] | 282 | if (reg.vstride == 0xf) { |
| 283 | vstride = -1; |
| 284 | } else { |
| 285 | assert(reg.vstride >= 0 && reg.vstride < ARRAY_SIZE(vstride_for_reg)); |
| 286 | vstride = vstride_for_reg[reg.vstride]; |
| 287 | } |
| 288 | |
Damien Lespiau | d70e9f8 | 2013-01-26 23:09:42 +0000 | [diff] [blame] | 289 | assert(reg.width >= 0 && reg.width < ARRAY_SIZE(width_for_reg)); |
| 290 | width = width_for_reg[reg.width]; |
| 291 | |
Damien Lespiau | 95b1208 | 2013-01-26 23:55:01 +0000 | [diff] [blame^] | 292 | assert(insn->header.execution_size >= 0 && |
| 293 | insn->header.execution_size < ARRAY_SIZE(execsize_for_reg)); |
| 294 | execsize = execsize_for_reg[insn->header.execution_size]; |
| 295 | |
Damien Lespiau | d70e9f8 | 2013-01-26 23:09:42 +0000 | [diff] [blame] | 296 | /* Register Region Restrictions */ |
| 297 | |
| 298 | /* D. If Width = 1, HorzStride must be 0 regardless of the values of |
| 299 | * ExecSize and VertStride. |
| 300 | * |
| 301 | * FIXME: In "advanced mode" hstride is set to 1, this is probably a bug |
| 302 | * to fix, but it changes the generated opcodes and thus needs validation. |
| 303 | */ |
| 304 | if (width == 1 && hstride != 0) |
| 305 | warn(ALL, location, "region width is 1 but horizontal stride is %d " |
| 306 | " (should be 0)\n", hstride); |
| 307 | |
Damien Lespiau | 95b1208 | 2013-01-26 23:55:01 +0000 | [diff] [blame^] | 308 | /* E. If ExecSize = Width = 1, both VertStride and HorzStride must be 0. |
| 309 | * This defines a scalar. */ |
| 310 | if (execsize == 1 && width == 1) { |
| 311 | if (hstride != 0) |
| 312 | warn(ALL, location, "execution size and region width are 1 but " |
| 313 | "horizontal stride is %d (should be 0)\n", hstride); |
| 314 | if (vstride != 0) |
| 315 | warn(ALL, location, "execution size and region width are 1 but " |
| 316 | "vertical stride is %d (should be 0)\n", vstride); |
| 317 | } |
| 318 | |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 319 | return true; |
| 320 | } |
| 321 | |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 322 | static int get_subreg_address(GLuint regfile, GLuint type, GLuint subreg, GLuint address_mode) |
| 323 | { |
| 324 | int unit_size = 1; |
| 325 | |
| 326 | assert(address_mode == BRW_ADDRESS_DIRECT); |
| 327 | assert(regfile != BRW_IMMEDIATE_VALUE); |
| 328 | |
| 329 | if (advanced_flag) |
| 330 | unit_size = get_type_size(type); |
| 331 | |
| 332 | return subreg * unit_size; |
| 333 | } |
| 334 | |
| 335 | /* only used in indirect address mode. |
| 336 | * input: sub-register number of an address register |
| 337 | * output: the value of AddrSubRegNum in the instruction binary code |
| 338 | * |
| 339 | * input output(advanced_flag==0) output(advanced_flag==1) |
| 340 | * a0.0 0 0 |
| 341 | * a0.1 invalid input 1 |
| 342 | * a0.2 1 2 |
| 343 | * a0.3 invalid input 3 |
| 344 | * a0.4 2 4 |
| 345 | * a0.5 invalid input 5 |
| 346 | * a0.6 3 6 |
| 347 | * a0.7 invalid input 7 |
| 348 | * a0.8 4 invalid input |
| 349 | * a0.10 5 invalid input |
| 350 | * a0.12 6 invalid input |
| 351 | * a0.14 7 invalid input |
| 352 | */ |
| 353 | static int get_indirect_subreg_address(GLuint subreg) |
| 354 | { |
| 355 | return advanced_flag == 0 ? subreg / 2 : subreg; |
| 356 | } |
| 357 | |
| 358 | static void resolve_subnr(struct brw_reg *reg) |
| 359 | { |
| 360 | if (reg->address_mode == BRW_ADDRESS_DIRECT) |
| 361 | reg->subnr = get_subreg_address(reg->file, reg->type, reg->subnr, |
| 362 | reg->address_mode); |
| 363 | else |
| 364 | reg->subnr = get_indirect_subreg_address(reg->subnr); |
| 365 | } |
| 366 | |
| 367 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 368 | %} |
Damien Lespiau | d94e8a6 | 2013-01-26 19:51:28 +0000 | [diff] [blame] | 369 | %locations |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 370 | |
| 371 | %start ROOT |
| 372 | |
| 373 | %union { |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 374 | char *string; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 375 | int integer; |
| 376 | double number; |
| 377 | struct brw_instruction instruction; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 378 | struct relocatable_instruction relocatable; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 379 | struct brw_program program; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 380 | struct region region; |
| 381 | struct regtype regtype; |
Damien Lespiau | 801b4eb | 2013-01-23 16:20:05 +0000 | [diff] [blame] | 382 | struct brw_reg reg; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 383 | struct condition condition; |
| 384 | struct declared_register symbol_reg; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 385 | imm32_t imm32; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 386 | |
| 387 | struct src_operand src_operand; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 388 | } |
| 389 | |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 390 | %token COLON |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 391 | %token SEMICOLON |
| 392 | %token LPAREN RPAREN |
| 393 | %token LANGLE RANGLE |
| 394 | %token LCURLY RCURLY |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 395 | %token LSQUARE RSQUARE |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 396 | %token COMMA EQ |
| 397 | %token ABS DOT |
| 398 | %token PLUS MINUS MULTIPLY DIVIDE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 399 | |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 400 | %token <integer> TYPE_UD TYPE_D TYPE_UW TYPE_W TYPE_UB TYPE_B |
| 401 | %token <integer> TYPE_VF TYPE_HF TYPE_V TYPE_F |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 402 | |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 403 | %token ALIGN1 ALIGN16 SECHALF COMPR SWITCH ATOMIC NODDCHK NODDCLR |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 404 | %token MASK_DISABLE BREAKPOINT ACCWRCTRL EOT |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 405 | |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 406 | %token SEQ ANY2H ALL2H ANY4H ALL4H ANY8H ALL8H ANY16H ALL16H ANYV ALLV |
| 407 | %token <integer> ZERO EQUAL NOT_ZERO NOT_EQUAL GREATER GREATER_EQUAL LESS LESS_EQUAL |
| 408 | %token <integer> ROUND_INCREMENT OVERFLOW UNORDERED |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 409 | %token <integer> GENREG MSGREG ADDRESSREG ACCREG FLAGREG |
| 410 | %token <integer> MASKREG AMASK IMASK LMASK CMASK |
| 411 | %token <integer> MASKSTACKREG LMS IMS MASKSTACKDEPTHREG IMSD LMSD |
| 412 | %token <integer> NOTIFYREG STATEREG CONTROLREG IPREG |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 413 | %token GENREGFILE MSGREGFILE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 414 | |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 415 | %token <integer> MOV FRC RNDU RNDD RNDE RNDZ NOT LZD |
| 416 | %token <integer> MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2 |
Xiang, Haihao | f1f5208 | 2010-10-19 13:26:24 +0800 | [diff] [blame] | 417 | %token <integer> AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN |
Homer Hsing | 9e711a4 | 2012-09-14 08:56:36 +0800 | [diff] [blame] | 418 | %token <integer> ADDC BFI1 BFREV CBIT F16TO32 F32TO16 FBH FBL |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 419 | %token <integer> SEND NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 420 | %token <integer> PUSH MREST POP WAIT DO ENDIF ILLEGAL |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 421 | %token <integer> MATH_INST |
Homer Hsing | b1ef3bc | 2012-09-14 09:02:01 +0800 | [diff] [blame] | 422 | %token <integer> MAD LRP BFE BFI2 SUBB |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 423 | %token <integer> CALL RET |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 424 | %token <integer> BRD BRC |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 425 | |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 426 | %token NULL_TOKEN MATH SAMPLER GATEWAY READ WRITE URB THREAD_SPAWNER VME DATA_PORT CRE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 427 | |
| 428 | %token MSGLEN RETURNLEN |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 429 | %token <integer> ALLOCATE USED COMPLETE TRANSPOSE INTERLEAVE |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 430 | %token SATURATE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 431 | |
| 432 | %token <integer> INTEGER |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 433 | %token <string> STRING |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 434 | %token <number> NUMBER |
| 435 | |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 436 | %token <integer> INV LOG EXP SQRT RSQ POW SIN COS SINCOS INTDIV INTMOD |
| 437 | %token <integer> INTDIVMOD |
| 438 | %token SIGNED SCALAR |
| 439 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 440 | %token <integer> X Y Z W |
| 441 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 442 | %token <integer> KERNEL_PRAGMA END_KERNEL_PRAGMA CODE_PRAGMA END_CODE_PRAGMA |
| 443 | %token <integer> REG_COUNT_PAYLOAD_PRAGMA REG_COUNT_TOTAL_PRAGMA DECLARE_PRAGMA |
| 444 | %token <integer> BASE ELEMENTSIZE SRCREGION DSTREGION TYPE |
| 445 | |
| 446 | %token <integer> DEFAULT_EXEC_SIZE_PRAGMA DEFAULT_REG_TYPE_PRAGMA |
| 447 | %nonassoc SUBREGNUM |
| 448 | %nonassoc SNDOPR |
| 449 | %left PLUS MINUS |
| 450 | %left MULTIPLY DIVIDE |
| 451 | %right UMINUS |
| 452 | %nonassoc DOT |
| 453 | %nonassoc STR_SYMBOL_REG |
| 454 | %nonassoc EMPTEXECSIZE |
| 455 | %nonassoc LPAREN |
| 456 | |
| 457 | %type <integer> exp sndopr |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 458 | %type <integer> simple_int |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 459 | %type <instruction> instruction unaryinstruction binaryinstruction |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 460 | %type <instruction> binaryaccinstruction trinaryinstruction sendinstruction |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 461 | %type <instruction> syncinstruction |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 462 | %type <instruction> msgtarget |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 463 | %type <instruction> instoptions instoption_list predicate |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 464 | %type <instruction> mathinstruction |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 465 | %type <instruction> nopinstruction |
| 466 | %type <relocatable> relocatableinstruction breakinstruction |
| 467 | %type <relocatable> ifelseinstruction loopinstruction haltinstruction |
| 468 | %type <relocatable> multibranchinstruction subroutineinstruction jumpinstruction |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 469 | %type <string> label |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 470 | %type <program> instrseq |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 471 | %type <integer> instoption |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 472 | %type <integer> unaryop binaryop binaryaccop breakop |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 473 | %type <integer> trinaryop |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 474 | %type <condition> conditionalmodifier |
| 475 | %type <integer> condition saturate negate abs chansel |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 476 | %type <integer> writemask_x writemask_y writemask_z writemask_w |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 477 | %type <integer> srcimmtype execsize dstregion immaddroffset |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 478 | %type <integer> subregnum sampler_datatype |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 479 | %type <integer> urb_swizzle urb_allocate urb_used urb_complete |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 480 | %type <integer> math_function math_signed math_scalar |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 481 | %type <integer> predctrl predstate |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 482 | %type <region> region region_wh indirectregion declare_srcregion; |
| 483 | %type <regtype> regtype |
Damien Lespiau | 801b4eb | 2013-01-23 16:20:05 +0000 | [diff] [blame] | 484 | %type <reg> directgenreg directmsgreg addrreg accreg flagreg maskreg |
| 485 | %type <reg> maskstackreg notifyreg |
| 486 | /* %type <reg> maskstackdepthreg */ |
| 487 | %type <reg> statereg controlreg ipreg nullreg |
| 488 | %type <reg> dstoperandex_typed srcarchoperandex_typed |
| 489 | %type <reg> sendleadreg |
| 490 | %type <reg> indirectgenreg indirectmsgreg addrparam |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 491 | %type <integer> mask_subreg maskstack_subreg |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 492 | %type <integer> declare_elementsize declare_dstregion declare_type |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 493 | /* %type <intger> maskstackdepth_subreg */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 494 | %type <symbol_reg> symbol_reg symbol_reg_p; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 495 | %type <imm32> imm32 |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 496 | %type <reg> dst dstoperand dstoperandex dstreg post_dst writemask |
| 497 | %type <reg> declare_base |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 498 | %type <src_operand> directsrcoperand srcarchoperandex directsrcaccoperand |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 499 | %type <src_operand> indirectsrcoperand |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 500 | %type <src_operand> src srcimm imm32reg payload srcacc srcaccimm swizzle |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 501 | %type <src_operand> relativelocation relativelocation2 |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 502 | %% |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 503 | simple_int: INTEGER { $$ = $1; } |
| 504 | | MINUS INTEGER { $$ = -$2;} |
| 505 | ; |
| 506 | |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 507 | exp: INTEGER { $$ = $1; } |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 508 | | exp PLUS exp { $$ = $1 + $3; } |
| 509 | | exp MINUS exp { $$ = $1 - $3; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 510 | | exp MULTIPLY exp { $$ = $1 * $3; } |
| 511 | | exp DIVIDE exp { if ($3) $$ = $1 / $3; else YYERROR;} |
| 512 | | MINUS exp %prec UMINUS { $$ = -$2;} |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 513 | | LPAREN exp RPAREN { $$ = $2; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 514 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 515 | |
| 516 | ROOT: instrseq |
| 517 | { |
| 518 | compiled_program = $1; |
| 519 | } |
| 520 | ; |
| 521 | |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 522 | |
| 523 | label: STRING COLON |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 524 | ; |
| 525 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 526 | declare_base: BASE EQ dstreg |
| 527 | { |
| 528 | $$ = $3; |
| 529 | } |
| 530 | ; |
| 531 | declare_elementsize: ELEMENTSIZE EQ exp |
| 532 | { |
| 533 | $$ = $3; |
| 534 | } |
| 535 | ; |
| 536 | declare_srcregion: /* empty */ |
| 537 | { |
| 538 | /* XXX is this default correct?*/ |
| 539 | memset (&$$, '\0', sizeof ($$)); |
| 540 | $$.vert_stride = ffs(0); |
| 541 | $$.width = ffs(1) - 1; |
| 542 | $$.horiz_stride = ffs(0); |
| 543 | } |
| 544 | | SRCREGION EQ region |
| 545 | { |
| 546 | $$ = $3; |
| 547 | } |
| 548 | ; |
| 549 | declare_dstregion: /* empty */ |
| 550 | { |
| 551 | $$ = 1; |
| 552 | } |
| 553 | | DSTREGION EQ dstregion |
| 554 | { |
| 555 | $$ = $3; |
| 556 | } |
| 557 | ; |
| 558 | declare_type: TYPE EQ regtype |
| 559 | { |
| 560 | $$ = $3.type; |
| 561 | } |
| 562 | ; |
| 563 | declare_pragma: DECLARE_PRAGMA STRING declare_base declare_elementsize declare_srcregion declare_dstregion declare_type |
| 564 | { |
Damien Lespiau | 574a249 | 2013-01-26 18:26:03 +0000 | [diff] [blame] | 565 | struct declared_register reg, *found, *new_reg; |
| 566 | |
| 567 | reg.name = $2; |
| 568 | reg.reg = $3; |
| 569 | reg.element_size = $4; |
| 570 | reg.src_region = $5; |
| 571 | reg.dst_region = $6; |
| 572 | reg.type = $7; |
| 573 | |
| 574 | found = find_register($2); |
| 575 | if (found) { |
| 576 | if (!declared_register_equal(®, found)) { |
| 577 | fprintf(stderr, "Error: %s already defined and " |
| 578 | "definitions don't agree\n", $2); |
| 579 | YYERROR; |
| 580 | } |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 581 | free($2); // $2 has been malloc'ed by strdup |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 582 | } else { |
Damien Lespiau | 574a249 | 2013-01-26 18:26:03 +0000 | [diff] [blame] | 583 | new_reg = malloc(sizeof(struct declared_register)); |
| 584 | *new_reg = reg; |
| 585 | insert_register(new_reg); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 586 | } |
| 587 | } |
| 588 | ; |
| 589 | |
| 590 | reg_count_total_pragma: REG_COUNT_TOTAL_PRAGMA exp |
| 591 | ; |
| 592 | reg_count_payload_pragma: REG_COUNT_PAYLOAD_PRAGMA exp |
| 593 | ; |
| 594 | |
| 595 | default_exec_size_pragma: DEFAULT_EXEC_SIZE_PRAGMA exp |
| 596 | { |
| 597 | program_defaults.execute_size = $2; |
| 598 | } |
| 599 | ; |
| 600 | default_reg_type_pragma: DEFAULT_REG_TYPE_PRAGMA regtype |
| 601 | { |
| 602 | program_defaults.register_type = $2.type; |
| 603 | } |
| 604 | ; |
| 605 | pragma: reg_count_total_pragma |
| 606 | |reg_count_payload_pragma |
| 607 | |default_exec_size_pragma |
| 608 | |default_reg_type_pragma |
| 609 | |declare_pragma |
| 610 | ; |
| 611 | |
| 612 | instrseq: instrseq pragma |
| 613 | { |
| 614 | $$ = $1; |
| 615 | } |
| 616 | | instrseq instruction SEMICOLON |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 617 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 618 | brw_program_add_instruction(&$1, &$2); |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 619 | $$ = $1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 620 | } |
| 621 | | instruction SEMICOLON |
| 622 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 623 | brw_program_init(&$$); |
| 624 | brw_program_add_instruction(&$$, &$1); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 625 | } |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 626 | | instrseq relocatableinstruction SEMICOLON |
| 627 | { |
| 628 | brw_program_add_relocatable(&$1, &$2); |
| 629 | $$ = $1; |
| 630 | } |
| 631 | | relocatableinstruction SEMICOLON |
| 632 | { |
| 633 | brw_program_init(&$$); |
| 634 | brw_program_add_relocatable(&$$, &$1); |
| 635 | } |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 636 | | instrseq SEMICOLON |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 637 | { |
| 638 | $$ = $1; |
| 639 | } |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 640 | | instrseq label |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 641 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 642 | brw_program_add_label(&$1, $2); |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 643 | $$ = $1; |
| 644 | } |
| 645 | | label |
| 646 | { |
Damien Lespiau | 73d58ed | 2013-01-21 17:07:28 +0000 | [diff] [blame] | 647 | brw_program_init(&$$); |
| 648 | brw_program_add_label(&$$, $1); |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 649 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 650 | | pragma |
| 651 | { |
| 652 | $$.first = NULL; |
| 653 | $$.last = NULL; |
| 654 | } |
Chen, Yangyang | 66649d7 | 2010-12-13 15:36:02 +0800 | [diff] [blame] | 655 | | instrseq error SEMICOLON { |
| 656 | $$ = $1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 657 | } |
| 658 | ; |
| 659 | |
| 660 | /* 1.4.1: Instruction groups */ |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 661 | // binaryinstruction: Source operands cannot be accumulators |
| 662 | // binaryaccinstruction: Source operands can be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 663 | instruction: unaryinstruction |
| 664 | | binaryinstruction |
| 665 | | binaryaccinstruction |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 666 | | trinaryinstruction |
| 667 | | sendinstruction |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 668 | | syncinstruction |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 669 | | mathinstruction |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 670 | | nopinstruction |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 671 | ; |
| 672 | |
| 673 | /* relocatableinstruction are instructions that needs a relocation pass */ |
| 674 | relocatableinstruction: ifelseinstruction |
| 675 | | loopinstruction |
| 676 | | haltinstruction |
| 677 | | multibranchinstruction |
| 678 | | subroutineinstruction |
| 679 | | jumpinstruction |
| 680 | | breakinstruction |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 681 | ; |
| 682 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 683 | ifelseinstruction: ENDIF |
| 684 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 685 | // for Gen4 |
| 686 | if(IS_GENp(6)) { // For gen6+. |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 687 | fprintf(stderr, "ENDIF Syntax error: should be 'ENDIF execsize relativelocation'\n"); |
| 688 | YYERROR; |
| 689 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 690 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 691 | $$.gen.header.opcode = $1; |
| 692 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
| 693 | $$.gen.bits1.da1.dest_horiz_stride = 1; |
| 694 | $$.gen.bits1.da1.src1_reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 695 | $$.gen.bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_UD; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 696 | } |
| 697 | | ENDIF execsize relativelocation instoptions |
| 698 | { |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 699 | // for Gen6+ |
| 700 | /* Gen6, Gen7 bspec: predication is prohibited */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 701 | if(!IS_GENp(6)) { // for gen6- |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 702 | fprintf(stderr, "ENDIF Syntax error: should be 'ENDIF'\n"); |
| 703 | YYERROR; |
| 704 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 705 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 706 | $$.gen.header.opcode = $1; |
| 707 | $$.gen.header.execution_size = $2; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 708 | $$.first_reloc_target = $3.reloc_target; |
| 709 | $$.first_reloc_offset = $3.imm32; |
| 710 | } |
| 711 | | ELSE execsize relativelocation instoptions |
| 712 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 713 | if(!IS_GENp(6)) { |
| 714 | // for Gen4, Gen5. gen_level < 60 |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 715 | /* Set the istack pop count, which must always be 1. */ |
| 716 | $3.imm32 |= (1 << 16); |
| 717 | |
| 718 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 719 | $$.gen.header.opcode = $1; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 720 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 721 | ip_dst.width = $2; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 722 | set_instruction_dest(&$$.gen, &ip_dst); |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 723 | set_instruction_src0(&$$.gen, &ip_src, NULL); |
| 724 | set_instruction_src1(&$$.gen, &$3, NULL); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 725 | $$.first_reloc_target = $3.reloc_target; |
| 726 | $$.first_reloc_offset = $3.imm32; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 727 | } else if(IS_GENp(6)) { |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 728 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 729 | $$.gen.header.opcode = $1; |
| 730 | $$.gen.header.execution_size = $2; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 731 | $$.first_reloc_target = $3.reloc_target; |
| 732 | $$.first_reloc_offset = $3.imm32; |
| 733 | } else { |
| 734 | fprintf(stderr, "'ELSE' instruction is not implemented.\n"); |
| 735 | YYERROR; |
| 736 | } |
| 737 | } |
| 738 | | predicate IF execsize relativelocation |
| 739 | { |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 740 | /* for Gen4, Gen5 */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 741 | /* The branch instructions require that the IP register |
| 742 | * be the destination and first source operand, while the |
| 743 | * offset is the second source operand. The offset is added |
| 744 | * to the pre-incremented IP. |
| 745 | */ |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 746 | /* for Gen6 */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 747 | if(IS_GENp(7)) { |
| 748 | /* Error in Gen7+. */ |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 749 | fprintf(stderr, "Syntax error: IF should be 'IF execsize JIP UIP'\n"); |
| 750 | YYERROR; |
| 751 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 752 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 753 | set_instruction_predicate(&$$.gen, &$1); |
| 754 | $$.gen.header.opcode = $2; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 755 | if(!IS_GENp(6)) { |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 756 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 757 | ip_dst.width = $3; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 758 | set_instruction_dest(&$$.gen, &ip_dst); |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 759 | set_instruction_src0(&$$.gen, &ip_src, NULL); |
| 760 | set_instruction_src1(&$$.gen, &$4, NULL); |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 761 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 762 | $$.first_reloc_target = $4.reloc_target; |
| 763 | $$.first_reloc_offset = $4.imm32; |
| 764 | } |
| 765 | | predicate IF execsize relativelocation relativelocation |
| 766 | { |
| 767 | /* for Gen7+ */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 768 | if(!IS_GENp(7)) { |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 769 | fprintf(stderr, "Syntax error: IF should be 'IF execsize relativelocation'\n"); |
| 770 | YYERROR; |
| 771 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 772 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 773 | set_instruction_predicate(&$$.gen, &$1); |
| 774 | $$.gen.header.opcode = $2; |
| 775 | $$.gen.header.execution_size = $3; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 776 | $$.first_reloc_target = $4.reloc_target; |
| 777 | $$.first_reloc_offset = $4.imm32; |
| 778 | $$.second_reloc_target = $5.reloc_target; |
| 779 | $$.second_reloc_offset = $5.imm32; |
| 780 | } |
| 781 | ; |
| 782 | |
| 783 | loopinstruction: predicate WHILE execsize relativelocation instoptions |
| 784 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 785 | if(!IS_GENp(6)) { |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 786 | /* The branch instructions require that the IP register |
| 787 | * be the destination and first source operand, while the |
| 788 | * offset is the second source operand. The offset is added |
| 789 | * to the pre-incremented IP. |
| 790 | */ |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 791 | ip_dst.width = $3; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 792 | set_instruction_dest(&$$.gen, &ip_dst); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 793 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 794 | set_instruction_predicate(&$$.gen, &$1); |
| 795 | $$.gen.header.opcode = $2; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 796 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 797 | set_instruction_src0(&$$.gen, &ip_src, NULL); |
| 798 | set_instruction_src1(&$$.gen, &$4, NULL); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 799 | $$.first_reloc_target = $4.reloc_target; |
| 800 | $$.first_reloc_offset = $4.imm32; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 801 | } else if (IS_GENp(6)) { |
Homer Hsing | e8cb195 | 2012-09-28 14:05:51 +0800 | [diff] [blame] | 802 | /* Gen6 spec: |
| 803 | dest must have the same element size as src0. |
| 804 | dest horizontal stride must be 1. */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 805 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 806 | set_instruction_predicate(&$$.gen, &$1); |
| 807 | $$.gen.header.opcode = $2; |
| 808 | $$.gen.header.execution_size = $3; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 809 | $$.first_reloc_target = $4.reloc_target; |
| 810 | $$.first_reloc_offset = $4.imm32; |
Homer Hsing | 72a3c19 | 2012-09-27 13:51:33 +0800 | [diff] [blame] | 811 | } else { |
| 812 | fprintf(stderr, "'WHILE' instruction is not implemented!\n"); |
| 813 | YYERROR; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 814 | } |
| 815 | } |
| 816 | | DO |
| 817 | { |
| 818 | // deprecated |
| 819 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 820 | $$.gen.header.opcode = $1; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 821 | }; |
| 822 | |
| 823 | haltinstruction: predicate HALT execsize relativelocation relativelocation instoptions |
| 824 | { |
Homer Hsing | ce55552 | 2012-09-27 15:44:15 +0800 | [diff] [blame] | 825 | // for Gen6, Gen7 |
| 826 | /* Gen6, Gen7 bspec: dst and src0 must be the null reg. */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 827 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 828 | set_instruction_predicate(&$$.gen, &$1); |
| 829 | $$.gen.header.opcode = $2; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 830 | $$.first_reloc_target = $4.reloc_target; |
| 831 | $$.first_reloc_offset = $4.imm32; |
| 832 | $$.second_reloc_target = $5.reloc_target; |
| 833 | $$.second_reloc_offset = $5.imm32; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 834 | dst_null_reg.width = $3; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 835 | set_instruction_dest(&$$.gen, &dst_null_reg); |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 836 | set_instruction_src0(&$$.gen, &src_null_reg, NULL); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 837 | }; |
| 838 | |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 839 | multibranchinstruction: |
| 840 | predicate BRD execsize relativelocation instoptions |
| 841 | { |
| 842 | /* Gen7 bspec: dest must be null. use Switch option */ |
| 843 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 844 | set_instruction_predicate(&$$.gen, &$1); |
| 845 | $$.gen.header.opcode = $2; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 846 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 847 | $$.first_reloc_target = $4.reloc_target; |
| 848 | $$.first_reloc_offset = $4.imm32; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 849 | dst_null_reg.width = $3; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 850 | set_instruction_dest(&$$.gen, &dst_null_reg); |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 851 | } |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 852 | | predicate BRC execsize relativelocation relativelocation instoptions |
| 853 | { |
| 854 | /* Gen7 bspec: dest must be null. src0 must be null. use Switch option */ |
| 855 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 856 | set_instruction_predicate(&$$.gen, &$1); |
| 857 | $$.gen.header.opcode = $2; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 858 | $$.gen.header.thread_control |= BRW_THREAD_SWITCH; |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 859 | $$.first_reloc_target = $4.reloc_target; |
| 860 | $$.first_reloc_offset = $4.imm32; |
| 861 | $$.second_reloc_target = $5.reloc_target; |
| 862 | $$.second_reloc_offset = $5.imm32; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 863 | dst_null_reg.width = $3; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 864 | set_instruction_dest(&$$.gen, &dst_null_reg); |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 865 | set_instruction_src0(&$$.gen, &src_null_reg, NULL); |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 866 | } |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 867 | ; |
| 868 | |
| 869 | subroutineinstruction: |
| 870 | predicate CALL execsize dst relativelocation instoptions |
| 871 | { |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 872 | /* |
| 873 | Gen6 bspec: |
| 874 | source, dest type should be DWORD. |
| 875 | dest must be QWord aligned. |
| 876 | source0 region control must be <2,2,1>. |
| 877 | execution size must be 2. |
| 878 | QtrCtrl is prohibited. |
| 879 | JIP is an immediate operand, must be of type W. |
| 880 | Gen7 bspec: |
| 881 | source, dest type should be DWORD. |
| 882 | dest must be QWord aligned. |
| 883 | source0 region control must be <2,2,1>. |
| 884 | execution size must be 2. |
| 885 | */ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 886 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 887 | set_instruction_predicate(&$$.gen, &$1); |
| 888 | $$.gen.header.opcode = $2; |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 889 | |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 890 | $4.type = BRW_REGISTER_TYPE_D; /* dest type should be DWORD */ |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 891 | $4.width = 1; /* execution size must be 2. Here 1 is encoded 2. */ |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 892 | set_instruction_dest(&$$.gen, &$4); |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 893 | |
| 894 | struct src_operand src0; |
| 895 | memset(&src0, 0, sizeof(src0)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 896 | src0.reg.type = BRW_REGISTER_TYPE_D; /* source type should be DWORD */ |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 897 | /* source0 region control must be <2,2,1>. */ |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 898 | src0.reg.hstride = 1; /*encoded 1*/ |
| 899 | src0.reg.width = 1; /*encoded 2*/ |
| 900 | src0.reg.vstride = 2; /*encoded 2*/ |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 901 | set_instruction_src0(&$$.gen, &src0, NULL); |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 902 | |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 903 | $$.first_reloc_target = $5.reloc_target; |
| 904 | $$.first_reloc_offset = $5.imm32; |
| 905 | } |
| 906 | | predicate RET execsize dstoperandex src instoptions |
| 907 | { |
Homer Hsing | 3de439e | 2012-09-27 15:39:28 +0800 | [diff] [blame] | 908 | /* |
| 909 | Gen6, 7: |
| 910 | source cannot be accumulator. |
| 911 | dest must be null. |
| 912 | src0 region control must be <2,2,1> (not specified clearly. should be same as CALL) |
| 913 | */ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 914 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 915 | set_instruction_predicate(&$$.gen, &$1); |
| 916 | $$.gen.header.opcode = $2; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 917 | dst_null_reg.width = 1; /* execution size of RET should be 2 */ |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 918 | set_instruction_dest(&$$.gen, &dst_null_reg); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 919 | $5.reg.type = BRW_REGISTER_TYPE_D; |
| 920 | $5.reg.hstride = 1; /*encoded 1*/ |
| 921 | $5.reg.width = 1; /*encoded 2*/ |
| 922 | $5.reg.vstride = 2; /*encoded 2*/ |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 923 | set_instruction_src0(&$$.gen, &$5, NULL); |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 924 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 925 | ; |
| 926 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 927 | unaryinstruction: |
| 928 | predicate unaryop conditionalmodifier saturate execsize |
| 929 | dst srcaccimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 930 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 931 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 932 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 933 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 934 | $$.header.saturate = $4; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 935 | $6.width = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 936 | set_instruction_options(&$$, &$8); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 937 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 938 | if (set_instruction_dest(&$$, &$6) != 0) |
| 939 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 940 | if (set_instruction_src0(&$$, &$7, &@7) != 0) |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 941 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 942 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 943 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 944 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 945 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 946 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 947 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 948 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 949 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 950 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 951 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 952 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 953 | if (!IS_GENp(6) && |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 954 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $6.width) == 64) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 955 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 956 | } |
| 957 | ; |
| 958 | |
Homer Hsing | 4285d9c | 2012-09-14 08:41:16 +0800 | [diff] [blame] | 959 | unaryop: MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV | CBIT |
Homer Hsing | 9e711a4 | 2012-09-14 08:56:36 +0800 | [diff] [blame] | 960 | | F16TO32 | F32TO16 | FBH | FBL |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 961 | ; |
| 962 | |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 963 | // Source operands cannot be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 964 | binaryinstruction: |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 965 | predicate binaryop conditionalmodifier saturate execsize |
| 966 | dst src srcimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 967 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 968 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 969 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 970 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 971 | $$.header.saturate = $4; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 972 | set_instruction_options(&$$, &$9); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 973 | set_instruction_predicate(&$$, &$1); |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 974 | $6.width = $5; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 975 | if (set_instruction_dest(&$$, &$6) != 0) |
| 976 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 977 | if (set_instruction_src0(&$$, &$7, &@7) != 0) |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 978 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 979 | if (set_instruction_src1(&$$, &$8, &@8) != 0) |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 980 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 981 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 982 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 983 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 984 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 985 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 986 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 987 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 988 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 989 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 990 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 991 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 992 | if (!IS_GENp(6) && |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 993 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $6.width) == 64) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 994 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 995 | } |
| 996 | ; |
| 997 | |
Homer Hsing | bebe817 | 2012-09-18 13:47:22 +0800 | [diff] [blame] | 998 | /* bspec: BFI1 should not access accumulator. */ |
| 999 | binaryop: MUL | MAC | MACH | LINE | SAD2 | SADA2 | DP4 | DPH | DP3 | DP2 | PLN | BFI1 |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1000 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1001 | |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 1002 | // Source operands can be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1003 | binaryaccinstruction: |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1004 | predicate binaryaccop conditionalmodifier saturate execsize |
| 1005 | dst srcacc srcimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1006 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1007 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1008 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1009 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 1010 | $$.header.saturate = $4; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1011 | $6.width = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 1012 | set_instruction_options(&$$, &$9); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 1013 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1014 | if (set_instruction_dest(&$$, &$6) != 0) |
| 1015 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1016 | if (set_instruction_src0(&$$, &$7, &@7) != 0) |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1017 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1018 | if (set_instruction_src1(&$$, &$8, &@8) != 0) |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1019 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1020 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 1021 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 1022 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 1023 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 1024 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 1025 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 1026 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 1027 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 1028 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 1029 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1030 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1031 | if (!IS_GENp(6) && |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1032 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $6.width) == 64) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1033 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1034 | } |
| 1035 | ; |
| 1036 | |
Homer Hsing | bebe817 | 2012-09-18 13:47:22 +0800 | [diff] [blame] | 1037 | /* TODO: bspec says ADDC/SUBB/CMP/CMPN/SHL/BFI1 cannot use accumulator as dest. */ |
| 1038 | binaryaccop: AVG | ADD | SEL | AND | OR | XOR | SHR | SHL | ASR | CMP | CMPN | ADDC | SUBB |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1039 | ; |
| 1040 | |
Homer Hsing | 8ca5568 | 2012-09-13 11:05:50 +0800 | [diff] [blame] | 1041 | trinaryop: MAD | LRP | BFE | BFI2 |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 1042 | ; |
| 1043 | |
| 1044 | trinaryinstruction: |
| 1045 | predicate trinaryop conditionalmodifier saturate execsize |
| 1046 | dst src src src instoptions |
| 1047 | { |
| 1048 | memset(&$$, 0, sizeof($$)); |
| 1049 | |
| 1050 | $$.header.predicate_control = $1.header.predicate_control; |
| 1051 | $$.header.predicate_inverse = $1.header.predicate_inverse; |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 1052 | $$.bits1.da3src.flag_reg_nr = $1.bits2.da1.flag_reg_nr; |
| 1053 | $$.bits1.da3src.flag_subreg_nr = $1.bits2.da1.flag_subreg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 1054 | |
| 1055 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1056 | $$.header.destreg__conditionalmod = $3.cond; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 1057 | $$.header.saturate = $4; |
| 1058 | $$.header.execution_size = $5; |
| 1059 | |
| 1060 | if (set_instruction_dest_three_src(&$$, &$6)) |
| 1061 | YYERROR; |
| 1062 | if (set_instruction_src0_three_src(&$$, &$7)) |
| 1063 | YYERROR; |
| 1064 | if (set_instruction_src1_three_src(&$$, &$8)) |
| 1065 | YYERROR; |
| 1066 | if (set_instruction_src2_three_src(&$$, &$9)) |
| 1067 | YYERROR; |
| 1068 | set_instruction_options(&$$, &$10); |
| 1069 | |
| 1070 | if ($3.flag_subreg_nr != -1) { |
| 1071 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 1072 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 1073 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 1074 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 1075 | } |
| 1076 | } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1077 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1078 | |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 1079 | sendinstruction: predicate SEND execsize exp post_dst payload msgtarget |
| 1080 | MSGLEN exp RETURNLEN exp instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1081 | { |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1082 | /* Send instructions are messy. The first argument is the |
| 1083 | * post destination -- the grf register that the response |
| 1084 | * starts from. The second argument is the current |
| 1085 | * destination, which is the start of the message arguments |
| 1086 | * to the shared function, and where src0 payload is loaded |
| 1087 | * to if not null. The payload is typically based on the |
| 1088 | * grf 0 thread payload of your current thread, and is |
| 1089 | * implicitly loaded if non-null. |
| 1090 | */ |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1091 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1092 | $$.header.opcode = $2; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1093 | $5.width = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1094 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 1095 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1096 | if (set_instruction_dest(&$$, &$5) != 0) |
| 1097 | YYERROR; |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 1098 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1099 | if (IS_GENp(6)) { |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 1100 | struct src_operand src0; |
| 1101 | |
| 1102 | memset(&src0, 0, sizeof(src0)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1103 | src0.reg.address_mode = BRW_ADDRESS_DIRECT; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1104 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1105 | if (IS_GENp(7)) |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1106 | src0.reg.file = BRW_GENERAL_REGISTER_FILE; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1107 | else |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1108 | src0.reg.file = BRW_MESSAGE_REGISTER_FILE; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1109 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1110 | src0.reg.type = BRW_REGISTER_TYPE_D; |
| 1111 | src0.reg.nr = $4; |
| 1112 | src0.reg.subnr = 0; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1113 | set_instruction_src0(&$$, &src0, NULL); |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 1114 | } else { |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1115 | if (set_instruction_src0(&$$, &$6, &@6) != 0) |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 1116 | YYERROR; |
| 1117 | } |
| 1118 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1119 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 1120 | $$.bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_D; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1121 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1122 | if (IS_GENp(5)) { |
| 1123 | if (IS_GENp(6)) { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1124 | $$.header.destreg__conditionalmod = $7.bits2.send_gen5.sfid; |
Xiang, Haihao | 4f777e7 | 2010-10-08 15:07:51 +0800 | [diff] [blame] | 1125 | } else { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1126 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Xiang, Haihao | 4f777e7 | 2010-10-08 15:07:51 +0800 | [diff] [blame] | 1127 | $$.bits2.send_gen5.sfid = $7.bits2.send_gen5.sfid; |
| 1128 | $$.bits2.send_gen5.end_of_thread = $12.bits3.generic_gen5.end_of_thread; |
| 1129 | } |
| 1130 | |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1131 | $$.bits3.generic_gen5 = $7.bits3.generic_gen5; |
| 1132 | $$.bits3.generic_gen5.msg_length = $9; |
| 1133 | $$.bits3.generic_gen5.response_length = $11; |
| 1134 | $$.bits3.generic_gen5.end_of_thread = |
| 1135 | $12.bits3.generic_gen5.end_of_thread; |
| 1136 | } else { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1137 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1138 | $$.bits3.generic = $7.bits3.generic; |
| 1139 | $$.bits3.generic.msg_length = $9; |
| 1140 | $$.bits3.generic.response_length = $11; |
| 1141 | $$.bits3.generic.end_of_thread = |
| 1142 | $12.bits3.generic.end_of_thread; |
| 1143 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1144 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1145 | | predicate SEND execsize dst sendleadreg payload directsrcoperand instoptions |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1146 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1147 | memset(&$$, 0, sizeof($$)); |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1148 | $$.header.opcode = $2; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1149 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1150 | |
| 1151 | set_instruction_predicate(&$$, &$1); |
| 1152 | |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1153 | $4.width = $3; |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1154 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1155 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1156 | if (set_instruction_src0(&$$, &$6, &@6) != 0) |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1157 | YYERROR; |
| 1158 | /* XXX is this correct? */ |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1159 | if (set_instruction_src1(&$$, &$7, &@7) != 0) |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1160 | YYERROR; |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1161 | |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1162 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1163 | | predicate SEND execsize dst sendleadreg payload imm32reg instoptions |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1164 | { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1165 | if ($7.reg.type != BRW_REGISTER_TYPE_UD && |
| 1166 | $7.reg.type != BRW_REGISTER_TYPE_D && |
| 1167 | $7.reg.type != BRW_REGISTER_TYPE_V) { |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1168 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $7.reg.dw1.ud, $7.reg.type); |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1169 | YYERROR; |
| 1170 | } |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1171 | memset(&$$, 0, sizeof($$)); |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1172 | $$.header.opcode = $2; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1173 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1174 | |
| 1175 | set_instruction_predicate(&$$, &$1); |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1176 | $4.width = $3; |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1177 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1178 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1179 | if (set_instruction_src0(&$$, &$6, &@6) != 0) |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1180 | YYERROR; |
| 1181 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1182 | $$.bits1.da1.src1_reg_type = $7.reg.type; |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1183 | $$.bits3.ud = $7.reg.dw1.ud; |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 1184 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1185 | | predicate SEND execsize dst sendleadreg sndopr imm32reg instoptions |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1186 | { |
| 1187 | struct src_operand src0; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1188 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1189 | if (!IS_GENp(6)) { |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1190 | fprintf(stderr, "error: the syntax of send instruction\n"); |
| 1191 | YYERROR; |
| 1192 | } |
| 1193 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1194 | if ($7.reg.type != BRW_REGISTER_TYPE_UD && |
| 1195 | $7.reg.type != BRW_REGISTER_TYPE_D && |
| 1196 | $7.reg.type != BRW_REGISTER_TYPE_V) { |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1197 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $7.reg.dw1.ud, $7.reg.type); |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1198 | YYERROR; |
| 1199 | } |
| 1200 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1201 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1202 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1203 | $$.header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1204 | set_instruction_predicate(&$$, &$1); |
| 1205 | |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1206 | $4.width = $3; |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1207 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1208 | YYERROR; |
| 1209 | |
| 1210 | memset(&src0, 0, sizeof(src0)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1211 | src0.reg.address_mode = BRW_ADDRESS_DIRECT; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1212 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1213 | if (IS_GENp(7)) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1214 | src0.reg.file = BRW_GENERAL_REGISTER_FILE; |
| 1215 | src0.reg.type = BRW_REGISTER_TYPE_UB; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1216 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1217 | src0.reg.file = BRW_MESSAGE_REGISTER_FILE; |
| 1218 | src0.reg.type = BRW_REGISTER_TYPE_D; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1219 | } |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 1220 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1221 | src0.reg.nr = $5.nr; |
| 1222 | src0.reg.subnr = 0; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1223 | set_instruction_src0(&$$, &src0, NULL); |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1224 | |
| 1225 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1226 | $$.bits1.da1.src1_reg_type = $7.reg.type; |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1227 | $$.bits3.ud = $7.reg.dw1.ud; |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 1228 | $$.bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); |
| 1229 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1230 | | predicate SEND execsize dst sendleadreg sndopr directsrcoperand instoptions |
| 1231 | { |
| 1232 | struct src_operand src0; |
| 1233 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1234 | if (!IS_GENp(6)) { |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1235 | fprintf(stderr, "error: the syntax of send instruction\n"); |
| 1236 | YYERROR; |
| 1237 | } |
| 1238 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1239 | if ($7.reg.file != BRW_ARCHITECTURE_REGISTER_FILE || |
| 1240 | ($7.reg.nr & 0xF0) != BRW_ARF_ADDRESS || |
| 1241 | ($7.reg.nr & 0x0F) != 0 || |
| 1242 | $7.reg.subnr != 0) { |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1243 | fprintf (stderr, "%d: scalar register must be a0.0<0;1,0>:ud\n", yylineno); |
| 1244 | YYERROR; |
| 1245 | } |
| 1246 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1247 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1248 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1249 | $$.header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1250 | set_instruction_predicate(&$$, &$1); |
| 1251 | |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1252 | $4.width = $3; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1253 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1254 | YYERROR; |
| 1255 | |
| 1256 | memset(&src0, 0, sizeof(src0)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1257 | src0.reg.address_mode = BRW_ADDRESS_DIRECT; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1258 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1259 | if (IS_GENp(7)) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1260 | src0.reg.file = BRW_GENERAL_REGISTER_FILE; |
| 1261 | src0.reg.type = BRW_REGISTER_TYPE_UB; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1262 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1263 | src0.reg.file = BRW_MESSAGE_REGISTER_FILE; |
| 1264 | src0.reg.type = BRW_REGISTER_TYPE_D; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1265 | } |
| 1266 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1267 | src0.reg.nr = $5.nr; |
| 1268 | src0.reg.subnr = 0; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1269 | set_instruction_src0(&$$, &src0, NULL); |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1270 | |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1271 | set_instruction_src1(&$$, &$7, &@7); |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1272 | $$.bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); |
| 1273 | } |
| 1274 | | predicate SEND execsize dst sendleadreg payload sndopr imm32reg instoptions |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1275 | { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1276 | if ($8.reg.type != BRW_REGISTER_TYPE_UD && |
| 1277 | $8.reg.type != BRW_REGISTER_TYPE_D && |
| 1278 | $8.reg.type != BRW_REGISTER_TYPE_V) { |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1279 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $8.reg.dw1.ud, $8.reg.type); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1280 | YYERROR; |
| 1281 | } |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1282 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1283 | $$.header.opcode = $2; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1284 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1285 | |
| 1286 | set_instruction_predicate(&$$, &$1); |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1287 | $4.width = $3; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1288 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1289 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1290 | if (set_instruction_src0(&$$, &$6, &@6) != 0) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1291 | YYERROR; |
| 1292 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1293 | $$.bits1.da1.src1_reg_type = $8.reg.type; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1294 | if (IS_GENx(5)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1295 | $$.bits2.send_gen5.sfid = ($7 & EX_DESC_SFID_MASK); |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1296 | $$.bits3.ud = $8.reg.dw1.ud; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1297 | $$.bits3.generic_gen5.end_of_thread = !!($7 & EX_DESC_EOT_MASK); |
| 1298 | } |
| 1299 | else |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1300 | $$.bits3.ud = $8.reg.dw1.ud; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1301 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1302 | | predicate SEND execsize dst sendleadreg payload exp directsrcoperand instoptions |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1303 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1304 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1305 | $$.header.opcode = $2; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 1306 | $$.header.destreg__conditionalmod = $5.nr; /* msg reg index */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1307 | |
| 1308 | set_instruction_predicate(&$$, &$1); |
| 1309 | |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1310 | $4.width = $3; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1311 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1312 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1313 | if (set_instruction_src0(&$$, &$6, &@6) != 0) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1314 | YYERROR; |
| 1315 | /* XXX is this correct? */ |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1316 | if (set_instruction_src1(&$$, &$8, &@8) != 0) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1317 | YYERROR; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1318 | if (IS_GENx(5)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1319 | $$.bits2.send_gen5.sfid = $7; |
| 1320 | } |
| 1321 | } |
| 1322 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1323 | ; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1324 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1325 | sndopr: exp %prec SNDOPR |
| 1326 | { |
| 1327 | $$ = $1; |
| 1328 | } |
| 1329 | ; |
| 1330 | |
| 1331 | jumpinstruction: predicate JMPI execsize relativelocation2 |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1332 | { |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1333 | /* The jump instruction requires that the IP register |
| 1334 | * be the destination and first source operand, while the |
| 1335 | * offset is the second source operand. The next instruction |
| 1336 | * is the post-incremented IP plus the offset. |
| 1337 | */ |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1338 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 1339 | $$.gen.header.opcode = $2; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1340 | if(advanced_flag) |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 1341 | $$.gen.header.mask_control = BRW_MASK_DISABLE; |
| 1342 | set_instruction_predicate(&$$.gen, &$1); |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1343 | ip_dst.width = ffs(1) - 1; |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 1344 | set_instruction_dest(&$$.gen, &ip_dst); |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1345 | set_instruction_src0(&$$.gen, &ip_src, NULL); |
| 1346 | set_instruction_src1(&$$.gen, &$4, NULL); |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 1347 | $$.first_reloc_target = $4.reloc_target; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1348 | $$.first_reloc_offset = $4.imm32; |
Eric Anholt | 356ce76 | 2006-08-31 10:27:48 -0700 | [diff] [blame] | 1349 | } |
| 1350 | ; |
| 1351 | |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1352 | mathinstruction: predicate MATH_INST execsize dst src srcimm math_function instoptions |
| 1353 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1354 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1355 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1356 | $$.header.destreg__conditionalmod = $7; |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1357 | set_instruction_options(&$$, &$8); |
| 1358 | set_instruction_predicate(&$$, &$1); |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1359 | $4.width = $3; |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1360 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1361 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1362 | if (set_instruction_src0(&$$, &$5, &@5) != 0) |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1363 | YYERROR; |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1364 | if (set_instruction_src1(&$$, &$6, &@6) != 0) |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1365 | YYERROR; |
| 1366 | } |
| 1367 | ; |
| 1368 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1369 | breakinstruction: predicate breakop execsize relativelocation relativelocation instoptions |
Eric Anholt | 4ee9c3d | 2006-09-01 13:37:51 -0700 | [diff] [blame] | 1370 | { |
Homer Hsing | ce55552 | 2012-09-27 15:44:15 +0800 | [diff] [blame] | 1371 | // for Gen6, Gen7 |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1372 | memset(&$$, 0, sizeof($$)); |
Damien Lespiau | 79c62f1 | 2013-01-21 21:41:36 +0000 | [diff] [blame] | 1373 | set_instruction_predicate(&$$.gen, &$1); |
| 1374 | $$.gen.header.opcode = $2; |
| 1375 | $$.gen.header.execution_size = $3; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1376 | $$.first_reloc_target = $4.reloc_target; |
| 1377 | $$.first_reloc_offset = $4.imm32; |
| 1378 | $$.second_reloc_target = $5.reloc_target; |
| 1379 | $$.second_reloc_offset = $5.imm32; |
Eric Anholt | 4ee9c3d | 2006-09-01 13:37:51 -0700 | [diff] [blame] | 1380 | } |
| 1381 | ; |
| 1382 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1383 | breakop: BREAK | CONT |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1384 | ; |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1385 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1386 | /* |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1387 | maskpushop: MSAVE | PUSH |
| 1388 | ; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1389 | */ |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1390 | |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1391 | syncinstruction: predicate WAIT notifyreg |
| 1392 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1393 | struct brw_reg notify_dst; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1394 | struct src_operand notify_src; |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1395 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1396 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1397 | $$.header.opcode = $2; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1398 | set_direct_dst_operand(¬ify_dst, &$3, BRW_REGISTER_TYPE_D); |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 1399 | notify_dst.width = ffs(1) - 1; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1400 | set_instruction_dest(&$$, ¬ify_dst); |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 1401 | set_direct_src_operand(¬ify_src, &$3, BRW_REGISTER_TYPE_D); |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 1402 | set_instruction_src0(&$$, ¬ify_src, NULL); |
| 1403 | set_instruction_src1(&$$, &src_null_reg, NULL); |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1404 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1405 | |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1406 | ; |
| 1407 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1408 | nopinstruction: NOP |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1409 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1410 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1411 | $$.header.opcode = $1; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1412 | }; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1413 | |
| 1414 | /* XXX! */ |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1415 | payload: directsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1416 | ; |
| 1417 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1418 | post_dst: dst |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1419 | ; |
| 1420 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1421 | msgtarget: NULL_TOKEN |
| 1422 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1423 | if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1424 | $$.bits2.send_gen5.sfid= BRW_SFID_NULL; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1425 | $$.bits3.generic_gen5.header_present = 0; /* ??? */ |
| 1426 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1427 | $$.bits3.generic.msg_target = BRW_SFID_NULL; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1428 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1429 | } |
| 1430 | | SAMPLER LPAREN INTEGER COMMA INTEGER COMMA |
| 1431 | sampler_datatype RPAREN |
| 1432 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1433 | if (IS_GENp(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1434 | $$.bits2.send_gen5.sfid = BRW_SFID_SAMPLER; |
Xiang, Haihao | 67d4ed6 | 2011-05-23 13:45:04 +0800 | [diff] [blame] | 1435 | $$.bits3.generic_gen5.header_present = 1; /* ??? */ |
| 1436 | $$.bits3.sampler_gen7.binding_table_index = $3; |
| 1437 | $$.bits3.sampler_gen7.sampler = $5; |
| 1438 | $$.bits3.sampler_gen7.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1439 | } else if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1440 | $$.bits2.send_gen5.sfid = BRW_SFID_SAMPLER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1441 | $$.bits3.generic_gen5.header_present = 1; /* ??? */ |
| 1442 | $$.bits3.sampler_gen5.binding_table_index = $3; |
| 1443 | $$.bits3.sampler_gen5.sampler = $5; |
| 1444 | $$.bits3.sampler_gen5.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ |
| 1445 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1446 | $$.bits3.generic.msg_target = BRW_SFID_SAMPLER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1447 | $$.bits3.sampler.binding_table_index = $3; |
| 1448 | $$.bits3.sampler.sampler = $5; |
| 1449 | switch ($7) { |
| 1450 | case TYPE_F: |
| 1451 | $$.bits3.sampler.return_format = |
| 1452 | BRW_SAMPLER_RETURN_FORMAT_FLOAT32; |
| 1453 | break; |
| 1454 | case TYPE_UD: |
| 1455 | $$.bits3.sampler.return_format = |
| 1456 | BRW_SAMPLER_RETURN_FORMAT_UINT32; |
| 1457 | break; |
| 1458 | case TYPE_D: |
| 1459 | $$.bits3.sampler.return_format = |
| 1460 | BRW_SAMPLER_RETURN_FORMAT_SINT32; |
| 1461 | break; |
| 1462 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1463 | } |
| 1464 | } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1465 | | MATH math_function saturate math_signed math_scalar |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1466 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1467 | if (IS_GENp(6)) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1468 | fprintf (stderr, "Gen6+ doesn't have math function\n"); |
Xiang, Haihao | 718cd6c | 2010-10-09 12:52:08 +0800 | [diff] [blame] | 1469 | YYERROR; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1470 | } else if (IS_GENx(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1471 | $$.bits2.send_gen5.sfid = BRW_SFID_MATH; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1472 | $$.bits3.generic_gen5.header_present = 0; |
| 1473 | $$.bits3.math_gen5.function = $2; |
| 1474 | if ($3 == BRW_INSTRUCTION_SATURATE) |
| 1475 | $$.bits3.math_gen5.saturate = 1; |
| 1476 | else |
| 1477 | $$.bits3.math_gen5.saturate = 0; |
| 1478 | $$.bits3.math_gen5.int_type = $4; |
| 1479 | $$.bits3.math_gen5.precision = BRW_MATH_PRECISION_FULL; |
| 1480 | $$.bits3.math_gen5.data_type = $5; |
| 1481 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1482 | $$.bits3.generic.msg_target = BRW_SFID_MATH; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1483 | $$.bits3.math.function = $2; |
| 1484 | if ($3 == BRW_INSTRUCTION_SATURATE) |
| 1485 | $$.bits3.math.saturate = 1; |
| 1486 | else |
| 1487 | $$.bits3.math.saturate = 0; |
| 1488 | $$.bits3.math.int_type = $4; |
| 1489 | $$.bits3.math.precision = BRW_MATH_PRECISION_FULL; |
| 1490 | $$.bits3.math.data_type = $5; |
| 1491 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1492 | } |
| 1493 | | GATEWAY |
| 1494 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1495 | if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1496 | $$.bits2.send_gen5.sfid = BRW_SFID_MESSAGE_GATEWAY; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1497 | $$.bits3.generic_gen5.header_present = 0; /* ??? */ |
| 1498 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1499 | $$.bits3.generic.msg_target = BRW_SFID_MESSAGE_GATEWAY; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1500 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1501 | } |
Zou Nan hai | 807f876 | 2008-06-18 15:05:19 -0700 | [diff] [blame] | 1502 | | READ LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1503 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1504 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1505 | if (IS_GENx(7)) { |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1506 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1507 | GEN6_SFID_DATAPORT_SAMPLER_CACHE; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1508 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1509 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1510 | $$.bits3.gen7_dp.msg_control = $7; |
| 1511 | $$.bits3.gen7_dp.msg_type = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1512 | } else if (IS_GENx(6)) { |
Xiang, Haihao | a8458d5 | 2010-10-09 11:09:47 +0800 | [diff] [blame] | 1513 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1514 | GEN6_SFID_DATAPORT_SAMPLER_CACHE; |
Xiang, Haihao | a8458d5 | 2010-10-09 11:09:47 +0800 | [diff] [blame] | 1515 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 668e0df | 2013-01-15 16:40:06 +0000 | [diff] [blame] | 1516 | $$.bits3.gen6_dp_sampler_const_cache.binding_table_index = $3; |
| 1517 | $$.bits3.gen6_dp_sampler_const_cache.msg_control = $7; |
| 1518 | $$.bits3.gen6_dp_sampler_const_cache.msg_type = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1519 | } else if (IS_GENx(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1520 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1521 | BRW_SFID_DATAPORT_READ; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1522 | $$.bits3.generic_gen5.header_present = 1; |
| 1523 | $$.bits3.dp_read_gen5.binding_table_index = $3; |
| 1524 | $$.bits3.dp_read_gen5.target_cache = $5; |
| 1525 | $$.bits3.dp_read_gen5.msg_control = $7; |
| 1526 | $$.bits3.dp_read_gen5.msg_type = $9; |
| 1527 | } else { |
| 1528 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1529 | BRW_SFID_DATAPORT_READ; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1530 | $$.bits3.dp_read.binding_table_index = $3; |
| 1531 | $$.bits3.dp_read.target_cache = $5; |
| 1532 | $$.bits3.dp_read.msg_control = $7; |
| 1533 | $$.bits3.dp_read.msg_type = $9; |
| 1534 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1535 | } |
Eric Anholt | 4331394 | 2006-08-24 15:26:10 -0700 | [diff] [blame] | 1536 | | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1537 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1538 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1539 | if (IS_GENx(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1540 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1541 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1542 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1543 | $$.bits3.gen7_dp.msg_control = $5; |
| 1544 | $$.bits3.gen7_dp.msg_type = $7; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1545 | } else if (IS_GENx(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1546 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | 61784db | 2010-10-08 16:48:15 +0800 | [diff] [blame] | 1547 | /* Sandybridge supports headerlesss message for render target write. |
| 1548 | * Currently the GFX assembler doesn't support it. so the program must provide |
| 1549 | * message header |
| 1550 | */ |
| 1551 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | fe0bd37 | 2013-01-15 20:24:51 +0000 | [diff] [blame] | 1552 | $$.bits3.gen6_dp.binding_table_index = $3; |
| 1553 | $$.bits3.gen6_dp.msg_control = $5; |
| 1554 | $$.bits3.gen6_dp.msg_type = $7; |
| 1555 | $$.bits3.gen6_dp.send_commit_msg = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1556 | } else if (IS_GENx(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1557 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1558 | BRW_SFID_DATAPORT_WRITE; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1559 | $$.bits3.generic_gen5.header_present = 1; |
| 1560 | $$.bits3.dp_write_gen5.binding_table_index = $3; |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1561 | $$.bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1562 | $$.bits3.dp_write_gen5.msg_control = $5 & 0x7; |
| 1563 | $$.bits3.dp_write_gen5.msg_type = $7; |
| 1564 | $$.bits3.dp_write_gen5.send_commit_msg = $9; |
| 1565 | } else { |
| 1566 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1567 | BRW_SFID_DATAPORT_WRITE; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1568 | $$.bits3.dp_write.binding_table_index = $3; |
| 1569 | /* The msg control field of brw_struct.h is split into |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1570 | * msg control and last_render_target, even though |
| 1571 | * last_render_target isn't common to all write messages. |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1572 | */ |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1573 | $$.bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1574 | $$.bits3.dp_write.msg_control = $5 & 0x7; |
| 1575 | $$.bits3.dp_write.msg_type = $7; |
| 1576 | $$.bits3.dp_write.send_commit_msg = $9; |
| 1577 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1578 | } |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1579 | | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1580 | INTEGER COMMA INTEGER RPAREN |
| 1581 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1582 | if (IS_GENx(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1583 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1584 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1585 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1586 | $$.bits3.gen7_dp.msg_control = $5; |
| 1587 | $$.bits3.gen7_dp.msg_type = $7; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1588 | } else if (IS_GENx(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1589 | $$.bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1590 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
Damien Lespiau | fe0bd37 | 2013-01-15 20:24:51 +0000 | [diff] [blame] | 1591 | $$.bits3.gen6_dp.binding_table_index = $3; |
| 1592 | $$.bits3.gen6_dp.msg_control = $5; |
| 1593 | $$.bits3.gen6_dp.msg_type = $7; |
| 1594 | $$.bits3.gen6_dp.send_commit_msg = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1595 | } else if (IS_GENx(5)) { |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1596 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1597 | BRW_SFID_DATAPORT_WRITE; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1598 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
| 1599 | $$.bits3.dp_write_gen5.binding_table_index = $3; |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1600 | $$.bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1601 | $$.bits3.dp_write_gen5.msg_control = $5 & 0x7; |
| 1602 | $$.bits3.dp_write_gen5.msg_type = $7; |
| 1603 | $$.bits3.dp_write_gen5.send_commit_msg = $9; |
| 1604 | } else { |
| 1605 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1606 | BRW_SFID_DATAPORT_WRITE; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1607 | $$.bits3.dp_write.binding_table_index = $3; |
| 1608 | /* The msg control field of brw_struct.h is split into |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1609 | * msg control and last_render_target, even though |
| 1610 | * last_render_target isn't common to all write messages. |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1611 | */ |
Damien Lespiau | 0fde3dd | 2013-01-15 20:34:50 +0000 | [diff] [blame] | 1612 | $$.bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1613 | $$.bits3.dp_write.msg_control = $5 & 0x7; |
| 1614 | $$.bits3.dp_write.msg_type = $7; |
| 1615 | $$.bits3.dp_write.send_commit_msg = $9; |
| 1616 | } |
| 1617 | } |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1618 | | URB INTEGER urb_swizzle urb_allocate urb_used urb_complete |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1619 | { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1620 | $$.bits3.generic.msg_target = BRW_SFID_URB; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1621 | if (IS_GENp(5)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1622 | $$.bits2.send_gen5.sfid = BRW_SFID_URB; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1623 | $$.bits3.generic_gen5.header_present = 1; |
| 1624 | $$.bits3.urb_gen5.opcode = BRW_URB_OPCODE_WRITE; |
| 1625 | $$.bits3.urb_gen5.offset = $2; |
| 1626 | $$.bits3.urb_gen5.swizzle_control = $3; |
| 1627 | $$.bits3.urb_gen5.pad = 0; |
| 1628 | $$.bits3.urb_gen5.allocate = $4; |
| 1629 | $$.bits3.urb_gen5.used = $5; |
| 1630 | $$.bits3.urb_gen5.complete = $6; |
| 1631 | } else { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1632 | $$.bits3.generic.msg_target = BRW_SFID_URB; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1633 | $$.bits3.urb.opcode = BRW_URB_OPCODE_WRITE; |
| 1634 | $$.bits3.urb.offset = $2; |
| 1635 | $$.bits3.urb.swizzle_control = $3; |
| 1636 | $$.bits3.urb.pad = 0; |
| 1637 | $$.bits3.urb.allocate = $4; |
| 1638 | $$.bits3.urb.used = $5; |
| 1639 | $$.bits3.urb.complete = $6; |
| 1640 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1641 | } |
Zou Nan hai | 26afe90 | 2008-06-18 15:04:11 -0700 | [diff] [blame] | 1642 | | THREAD_SPAWNER LPAREN INTEGER COMMA INTEGER COMMA |
| 1643 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1644 | { |
| 1645 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1646 | BRW_SFID_THREAD_SPAWNER; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1647 | if (IS_GENp(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1648 | $$.bits2.send_gen5.sfid = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1649 | BRW_SFID_THREAD_SPAWNER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1650 | $$.bits3.generic_gen5.header_present = 0; |
| 1651 | $$.bits3.thread_spawner_gen5.opcode = $3; |
| 1652 | $$.bits3.thread_spawner_gen5.requester_type = $5; |
| 1653 | $$.bits3.thread_spawner_gen5.resource_select = $7; |
| 1654 | } else { |
| 1655 | $$.bits3.generic.msg_target = |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1656 | BRW_SFID_THREAD_SPAWNER; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1657 | $$.bits3.thread_spawner.opcode = $3; |
| 1658 | $$.bits3.thread_spawner.requester_type = $5; |
| 1659 | $$.bits3.thread_spawner.resource_select = $7; |
| 1660 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1661 | } |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1662 | | VME LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN |
| 1663 | { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1664 | $$.bits3.generic.msg_target = GEN6_SFID_VME; |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1665 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1666 | if (IS_GENp(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1667 | $$.bits2.send_gen5.sfid = GEN6_SFID_VME; |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1668 | $$.bits3.vme_gen6.binding_table_index = $3; |
| 1669 | $$.bits3.vme_gen6.search_path_index = $5; |
| 1670 | $$.bits3.vme_gen6.lut_subindex = $7; |
| 1671 | $$.bits3.vme_gen6.message_type = $9; |
| 1672 | $$.bits3.generic_gen5.header_present = 1; |
| 1673 | } else { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1674 | fprintf (stderr, "Gen6- doesn't have vme function\n"); |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1675 | YYERROR; |
| 1676 | } |
| 1677 | } |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1678 | | CRE LPAREN INTEGER COMMA INTEGER RPAREN |
| 1679 | { |
| 1680 | if (gen_level < 75) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1681 | fprintf (stderr, "Below Gen7.5 doesn't have CRE function\n"); |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1682 | YYERROR; |
| 1683 | } |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1684 | $$.bits3.generic.msg_target = HSW_SFID_CRE; |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1685 | |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1686 | $$.bits2.send_gen5.sfid = HSW_SFID_CRE; |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1687 | $$.bits3.cre_gen75.binding_table_index = $3; |
| 1688 | $$.bits3.cre_gen75.message_type = $5; |
| 1689 | $$.bits3.generic_gen5.header_present = 1; |
| 1690 | } |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1691 | |
| 1692 | | DATA_PORT LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1693 | INTEGER COMMA INTEGER COMMA INTEGER RPAREN |
| 1694 | { |
| 1695 | $$.bits2.send_gen5.sfid = $3; |
| 1696 | $$.bits3.generic_gen5.header_present = ($13 != 0); |
| 1697 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1698 | if (IS_GENp(7)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1699 | if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && |
| 1700 | $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && |
| 1701 | $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && |
| 1702 | $3 != GEN7_SFID_DATAPORT_DATA_CACHE) { |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1703 | fprintf (stderr, "error: wrong cache type\n"); |
| 1704 | YYERROR; |
| 1705 | } |
| 1706 | |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1707 | $$.bits3.gen7_dp.category = $11; |
| 1708 | $$.bits3.gen7_dp.binding_table_index = $9; |
| 1709 | $$.bits3.gen7_dp.msg_control = $7; |
| 1710 | $$.bits3.gen7_dp.msg_type = $5; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1711 | } else if (IS_GENx(6)) { |
Damien Lespiau | 5e7e3f4 | 2013-01-18 11:04:37 +0000 | [diff] [blame] | 1712 | if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && |
| 1713 | $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && |
| 1714 | $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE) { |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1715 | fprintf (stderr, "error: wrong cache type\n"); |
| 1716 | YYERROR; |
| 1717 | } |
| 1718 | |
Damien Lespiau | 1f1ad59 | 2013-01-15 17:35:24 +0000 | [diff] [blame] | 1719 | $$.bits3.gen6_dp.send_commit_msg = $11; |
| 1720 | $$.bits3.gen6_dp.binding_table_index = $9; |
| 1721 | $$.bits3.gen6_dp.msg_control = $7; |
| 1722 | $$.bits3.gen6_dp.msg_type = $5; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1723 | } else if (!IS_GENp(5)) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1724 | fprintf (stderr, "Gen6- doesn't support data port for sampler/render/constant/data cache\n"); |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1725 | YYERROR; |
| 1726 | } |
| 1727 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1728 | ; |
| 1729 | |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1730 | urb_allocate: ALLOCATE { $$ = 1; } |
| 1731 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1732 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1733 | |
| 1734 | urb_used: USED { $$ = 1; } |
| 1735 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1736 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1737 | |
| 1738 | urb_complete: COMPLETE { $$ = 1; } |
| 1739 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1740 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1741 | |
| 1742 | urb_swizzle: TRANSPOSE { $$ = BRW_URB_SWIZZLE_TRANSPOSE; } |
| 1743 | | INTERLEAVE { $$ = BRW_URB_SWIZZLE_INTERLEAVE; } |
| 1744 | | /* empty */ { $$ = BRW_URB_SWIZZLE_NONE; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1745 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1746 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1747 | sampler_datatype: |
| 1748 | TYPE_F |
| 1749 | | TYPE_UD |
| 1750 | | TYPE_D |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1751 | ; |
| 1752 | |
| 1753 | math_function: INV | LOG | EXP | SQRT | POW | SIN | COS | SINCOS | INTDIV |
| 1754 | | INTMOD | INTDIVMOD |
| 1755 | ; |
| 1756 | |
| 1757 | math_signed: /* empty */ { $$ = 0; } |
| 1758 | | SIGNED { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1759 | ; |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1760 | |
| 1761 | math_scalar: /* empty */ { $$ = 0; } |
| 1762 | | SCALAR { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1763 | ; |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1764 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1765 | /* 1.4.2: Destination register */ |
| 1766 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1767 | dst: dstoperand | dstoperandex |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1768 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1769 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1770 | dstoperand: symbol_reg dstregion |
| 1771 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1772 | $$ = $1.reg; |
| 1773 | $$.hstride = resolve_dst_region(&$1, $2); |
| 1774 | $$.type = $1.type; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1775 | } |
| 1776 | | dstreg dstregion writemask regtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1777 | { |
| 1778 | /* Returns an instruction with just the destination register |
| 1779 | * filled in. |
| 1780 | */ |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1781 | $$ = $1; |
| 1782 | $$.hstride = resolve_dst_region(NULL, $2); |
| 1783 | $$.dw1.bits.writemask = $3.dw1.bits.writemask; |
| 1784 | $$.type = $4.type; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1785 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1786 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1787 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1788 | /* The dstoperandex returns an instruction with just the destination register |
| 1789 | * filled in. |
| 1790 | */ |
| 1791 | dstoperandex: dstoperandex_typed dstregion regtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1792 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1793 | $$ = $1; |
| 1794 | $$.hstride = resolve_dst_region(NULL, $2); |
| 1795 | $$.type = $3.type; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1796 | } |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1797 | | maskstackreg |
| 1798 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1799 | $$ = $1; |
| 1800 | $$.hstride = 1; |
| 1801 | $$.type = BRW_REGISTER_TYPE_UW; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1802 | } |
| 1803 | | controlreg |
| 1804 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1805 | $$ = $1; |
| 1806 | $$.hstride = 1; |
| 1807 | $$.type = BRW_REGISTER_TYPE_UD; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1808 | } |
| 1809 | | ipreg |
| 1810 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1811 | $$ = $1; |
| 1812 | $$.hstride = 1; |
| 1813 | $$.type = BRW_REGISTER_TYPE_UD; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1814 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1815 | | nullreg dstregion regtype |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1816 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1817 | $$ = $1; |
| 1818 | $$.hstride = resolve_dst_region(NULL, $2); |
| 1819 | $$.type = $3.type; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1820 | } |
| 1821 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1822 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1823 | dstoperandex_typed: accreg | flagreg | addrreg | maskreg |
| 1824 | ; |
| 1825 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1826 | symbol_reg: STRING %prec STR_SYMBOL_REG |
| 1827 | { |
| 1828 | struct declared_register *dcl_reg = find_register($1); |
| 1829 | |
| 1830 | if (dcl_reg == NULL) { |
| 1831 | fprintf(stderr, "can't find register %s\n", $1); |
| 1832 | YYERROR; |
| 1833 | } |
| 1834 | |
| 1835 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1836 | free($1); // $1 has been malloc'ed by strdup |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1837 | } |
| 1838 | | symbol_reg_p |
| 1839 | { |
| 1840 | $$=$1; |
| 1841 | } |
| 1842 | ; |
| 1843 | |
| 1844 | symbol_reg_p: STRING LPAREN exp RPAREN |
| 1845 | { |
| 1846 | struct declared_register *dcl_reg = find_register($1); |
| 1847 | |
| 1848 | if (dcl_reg == NULL) { |
| 1849 | fprintf(stderr, "can't find register %s\n", $1); |
| 1850 | YYERROR; |
| 1851 | } |
| 1852 | |
| 1853 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1854 | $$.reg.nr += $3; |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1855 | free($1); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1856 | } |
| 1857 | | STRING LPAREN exp COMMA exp RPAREN |
| 1858 | { |
| 1859 | struct declared_register *dcl_reg = find_register($1); |
| 1860 | |
| 1861 | if (dcl_reg == NULL) { |
| 1862 | fprintf(stderr, "can't find register %s\n", $1); |
| 1863 | YYERROR; |
| 1864 | } |
| 1865 | |
| 1866 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1867 | $$.reg.nr += $3; |
Homer Hsing | 599d7d2 | 2012-10-16 14:14:25 +0800 | [diff] [blame] | 1868 | if(advanced_flag) { |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1869 | int size = get_type_size(dcl_reg->type); |
| 1870 | $$.reg.nr += ($$.reg.subnr + $5) / (32 / size); |
| 1871 | $$.reg.subnr = ($$.reg.subnr + $5) % (32 / size); |
Homer Hsing | 599d7d2 | 2012-10-16 14:14:25 +0800 | [diff] [blame] | 1872 | } else { |
Damien Lespiau | cce4fc2 | 2013-01-23 15:13:55 +0000 | [diff] [blame] | 1873 | $$.reg.nr += ($$.reg.subnr + $5) / 32; |
| 1874 | $$.reg.subnr = ($$.reg.subnr + $5) % 32; |
| 1875 | } |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1876 | free($1); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1877 | } |
| 1878 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1879 | /* Returns a partially complete destination register consisting of the |
| 1880 | * direct or indirect register addressing fields, but not stride or writemask. |
| 1881 | */ |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1882 | dstreg: directgenreg |
| 1883 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1884 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1885 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1886 | } |
| 1887 | | directmsgreg |
Eric Anholt | a34d1e0 | 2006-08-22 14:52:14 -0700 | [diff] [blame] | 1888 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1889 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1890 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | a34d1e0 | 2006-08-22 14:52:14 -0700 | [diff] [blame] | 1891 | } |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1892 | | indirectgenreg |
| 1893 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1894 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1895 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1896 | } |
| 1897 | | indirectmsgreg |
| 1898 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 1899 | $$ = $1; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1900 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1901 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1902 | ; |
| 1903 | |
| 1904 | /* 1.4.3: Source register */ |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1905 | srcaccimm: srcacc | imm32reg |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1906 | ; |
| 1907 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1908 | srcacc: directsrcaccoperand | indirectsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1909 | ; |
| 1910 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1911 | srcimm: directsrcoperand | indirectsrcoperand| imm32reg |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1912 | ; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1913 | |
| 1914 | imm32reg: imm32 srcimmtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1915 | { |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1916 | union { |
| 1917 | int i; |
| 1918 | float f; |
| 1919 | } intfloat; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1920 | uint32_t d; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1921 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1922 | switch ($2) { |
| 1923 | case BRW_REGISTER_TYPE_UD: |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1924 | case BRW_REGISTER_TYPE_D: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1925 | case BRW_REGISTER_TYPE_V: |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1926 | case BRW_REGISTER_TYPE_VF: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1927 | switch ($1.r) { |
| 1928 | case imm32_d: |
| 1929 | d = $1.u.d; |
| 1930 | break; |
| 1931 | default: |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1932 | fprintf (stderr, "%d: non-int D/UD/V/VF representation: %d,type=%d\n", yylineno, $1.r, $2); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1933 | YYERROR; |
| 1934 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1935 | break; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1936 | case BRW_REGISTER_TYPE_UW: |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1937 | case BRW_REGISTER_TYPE_W: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1938 | switch ($1.r) { |
| 1939 | case imm32_d: |
| 1940 | d = $1.u.d; |
| 1941 | break; |
| 1942 | default: |
| 1943 | fprintf (stderr, "non-int W/UW representation\n"); |
| 1944 | YYERROR; |
| 1945 | } |
| 1946 | d &= 0xffff; |
| 1947 | d |= d << 16; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1948 | break; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1949 | case BRW_REGISTER_TYPE_F: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1950 | switch ($1.r) { |
| 1951 | case imm32_f: |
| 1952 | intfloat.f = $1.u.f; |
| 1953 | break; |
| 1954 | case imm32_d: |
| 1955 | intfloat.f = (float) $1.u.d; |
| 1956 | break; |
| 1957 | default: |
| 1958 | fprintf (stderr, "non-float F representation\n"); |
| 1959 | YYERROR; |
| 1960 | } |
| 1961 | d = intfloat.i; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1962 | break; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1963 | #if 0 |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1964 | case BRW_REGISTER_TYPE_VF: |
| 1965 | fprintf (stderr, "Immediate type VF not supported yet\n"); |
| 1966 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1967 | #endif |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1968 | default: |
| 1969 | fprintf(stderr, "unknown immediate type %d\n", $2); |
| 1970 | YYERROR; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1971 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1972 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1973 | $$.reg.file = BRW_IMMEDIATE_VALUE; |
| 1974 | $$.reg.type = $2; |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 1975 | $$.reg.dw1.ud = d; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1976 | } |
| 1977 | ; |
| 1978 | |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1979 | directsrcaccoperand: directsrcoperand |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1980 | | accreg region regtype |
Eric Anholt | 2a0f135 | 2006-08-25 17:44:55 -0700 | [diff] [blame] | 1981 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1982 | set_direct_src_operand(&$$, &$1, $3.type); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1983 | $$.reg.vstride = $2.vert_stride; |
| 1984 | $$.reg.width = $2.width; |
| 1985 | $$.reg.hstride = $2.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1986 | $$.default_region = $2.is_default; |
Eric Anholt | 2a0f135 | 2006-08-25 17:44:55 -0700 | [diff] [blame] | 1987 | } |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1988 | ; |
| 1989 | |
| 1990 | /* Returns a source operand in the src0 fields of an instruction. */ |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1991 | srcarchoperandex: srcarchoperandex_typed region regtype |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1992 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1993 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 1994 | $$.reg.file = $1.file; |
| 1995 | $$.reg.type = $3.type; |
| 1996 | $$.reg.subnr = $1.subnr; |
| 1997 | $$.reg.nr = $1.nr; |
| 1998 | $$.reg.vstride = $2.vert_stride; |
| 1999 | $$.reg.width = $2.width; |
| 2000 | $$.reg.hstride = $2.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2001 | $$.default_region = $2.is_default; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2002 | $$.reg.negate = 0; |
| 2003 | $$.reg.abs = 0; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2004 | } |
| 2005 | | maskstackreg |
| 2006 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2007 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UB); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2008 | } |
| 2009 | | controlreg |
| 2010 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2011 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2012 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2013 | /* | statereg |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2014 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2015 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2016 | }*/ |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2017 | | notifyreg |
| 2018 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2019 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2020 | } |
| 2021 | | ipreg |
| 2022 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2023 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2024 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2025 | | nullreg region regtype |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2026 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2027 | if ($3.is_default) { |
| 2028 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
| 2029 | } else { |
| 2030 | set_direct_src_operand(&$$, &$1, $3.type); |
| 2031 | } |
| 2032 | $$.default_region = 1; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 2033 | } |
| 2034 | ; |
| 2035 | |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 2036 | srcarchoperandex_typed: flagreg | addrreg | maskreg |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2037 | ; |
| 2038 | |
Xiang, Haihao | 128053f | 2012-06-29 16:47:10 +0800 | [diff] [blame] | 2039 | sendleadreg: symbol_reg |
| 2040 | { |
| 2041 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2042 | $$.file = $1.reg.file; |
| 2043 | $$.nr = $1.reg.nr; |
| 2044 | $$.subnr = $1.reg.subnr; |
Xiang, Haihao | 128053f | 2012-06-29 16:47:10 +0800 | [diff] [blame] | 2045 | } |
| 2046 | | directgenreg | directmsgreg |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 2047 | ; |
| 2048 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2049 | src: directsrcoperand | indirectsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2050 | ; |
| 2051 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2052 | directsrcoperand: negate abs symbol_reg region regtype |
| 2053 | { |
| 2054 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2055 | $$.reg.address_mode = BRW_ADDRESS_DIRECT; |
| 2056 | $$.reg.file = $3.reg.file; |
| 2057 | $$.reg.nr = $3.reg.nr; |
| 2058 | $$.reg.subnr = $3.reg.subnr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2059 | if ($5.is_default) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2060 | $$.reg.type = $3.type; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2061 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2062 | $$.reg.type = $5.type; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2063 | } |
| 2064 | if ($4.is_default) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2065 | $$.reg.vstride = $3.src_region.vert_stride; |
| 2066 | $$.reg.width = $3.src_region.width; |
| 2067 | $$.reg.hstride = $3.src_region.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2068 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2069 | $$.reg.vstride = $4.vert_stride; |
| 2070 | $$.reg.width = $4.width; |
| 2071 | $$.reg.hstride = $4.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2072 | } |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2073 | $$.reg.negate = $1; |
| 2074 | $$.reg.abs = $2; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2075 | } |
| 2076 | | statereg region regtype |
| 2077 | { |
| 2078 | if($2.is_default ==1 && $3.is_default == 1) |
| 2079 | { |
| 2080 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
| 2081 | } |
| 2082 | else{ |
| 2083 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2084 | $$.reg.address_mode = BRW_ADDRESS_DIRECT; |
| 2085 | $$.reg.file = $1.file; |
| 2086 | $$.reg.nr = $1.nr; |
| 2087 | $$.reg.subnr = $1.subnr; |
| 2088 | $$.reg.vstride = $2.vert_stride; |
| 2089 | $$.reg.width = $2.width; |
| 2090 | $$.reg.hstride = $2.horiz_stride; |
| 2091 | $$.reg.type = $3.type; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2092 | } |
| 2093 | } |
| 2094 | | negate abs directgenreg region regtype swizzle |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2095 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2096 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2097 | $$.reg.address_mode = BRW_ADDRESS_DIRECT; |
| 2098 | $$.reg.file = $3.file; |
| 2099 | $$.reg.nr = $3.nr; |
| 2100 | $$.reg.subnr = $3.subnr; |
| 2101 | $$.reg.type = $5.type; |
| 2102 | $$.reg.vstride = $4.vert_stride; |
| 2103 | $$.reg.width = $4.width; |
| 2104 | $$.reg.hstride = $4.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2105 | $$.default_region = $4.is_default; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2106 | $$.reg.negate = $1; |
| 2107 | $$.reg.abs = $2; |
| 2108 | $$.reg.dw1.bits.swizzle = $6.reg.dw1.bits.swizzle; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2109 | } |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 2110 | | srcarchoperandex |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2111 | ; |
| 2112 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2113 | indirectsrcoperand: |
| 2114 | negate abs indirectgenreg indirectregion regtype swizzle |
| 2115 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2116 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2117 | $$.reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
| 2118 | $$.reg.file = $3.file; |
| 2119 | $$.reg.subnr = $3.subnr; |
| 2120 | $$.reg.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; |
| 2121 | $$.reg.type = $5.type; |
| 2122 | $$.reg.vstride = $4.vert_stride; |
| 2123 | $$.reg.width = $4.width; |
| 2124 | $$.reg.hstride = $4.horiz_stride; |
| 2125 | $$.reg.negate = $1; |
| 2126 | $$.reg.abs = $2; |
| 2127 | $$.reg.dw1.bits.swizzle = $6.reg.dw1.bits.swizzle; |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2128 | } |
| 2129 | ; |
| 2130 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2131 | /* 1.4.4: Address Registers */ |
Damien Lespiau | 801b4eb | 2013-01-23 16:20:05 +0000 | [diff] [blame] | 2132 | /* Returns a partially-completed struct brw_reg consisting of the address |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2133 | * register fields for register-indirect access. |
| 2134 | */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2135 | addrparam: addrreg COMMA immaddroffset |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2136 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2137 | if ($3 < -512 || $3 > 511) { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2138 | fprintf(stderr, "Address immediate offset %d out of" |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2139 | "range %d\n", $3, yylineno); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2140 | YYERROR; |
| 2141 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2142 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 2143 | $$.subnr = $1.subnr; |
| 2144 | $$.dw1.bits.indirect_offset = $3; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2145 | } |
| 2146 | | addrreg |
| 2147 | { |
| 2148 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 2149 | $$.subnr = $1.subnr; |
| 2150 | $$.dw1.bits.indirect_offset = 0; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2151 | } |
| 2152 | ; |
| 2153 | |
| 2154 | /* The immaddroffset provides an immediate offset value added to the addresses |
| 2155 | * from the address register in register-indirect register access. |
| 2156 | */ |
| 2157 | immaddroffset: /* empty */ { $$ = 0; } |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2158 | | exp |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2159 | ; |
| 2160 | |
| 2161 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2162 | /* 1.4.5: Register files and register numbers */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2163 | subregnum: DOT exp |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2164 | { |
| 2165 | $$ = $2; |
| 2166 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2167 | | %prec SUBREGNUM |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2168 | { |
| 2169 | /* Default to subreg 0 if unspecified. */ |
| 2170 | $$ = 0; |
| 2171 | } |
| 2172 | ; |
| 2173 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2174 | directgenreg: GENREG subregnum |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2175 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2176 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2177 | $$.file = BRW_GENERAL_REGISTER_FILE; |
| 2178 | $$.nr = $1; |
| 2179 | $$.subnr = $2; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2180 | } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2181 | ; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2182 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2183 | indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE |
| 2184 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2185 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 2186 | $$.file = BRW_GENERAL_REGISTER_FILE; |
| 2187 | $$.subnr = $3.subnr; |
| 2188 | $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2189 | } |
| 2190 | ; |
| 2191 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2192 | directmsgreg: MSGREG subregnum |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2193 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2194 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2195 | $$.file = BRW_MESSAGE_REGISTER_FILE; |
| 2196 | $$.nr = $1; |
| 2197 | $$.subnr = $2; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2198 | } |
| 2199 | ; |
| 2200 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2201 | indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE |
| 2202 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2203 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 36f8f65 | 2013-01-23 16:17:28 +0000 | [diff] [blame] | 2204 | $$.file = BRW_MESSAGE_REGISTER_FILE; |
| 2205 | $$.subnr = $3.subnr; |
| 2206 | $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2207 | } |
| 2208 | ; |
| 2209 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2210 | addrreg: ADDRESSREG subregnum |
| 2211 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2212 | if ($1 != 0) { |
| 2213 | fprintf(stderr, |
| 2214 | "address register number %d out of range", $1); |
| 2215 | YYERROR; |
| 2216 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2217 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2218 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2219 | $$.nr = BRW_ARF_ADDRESS | $1; |
| 2220 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2221 | } |
| 2222 | ; |
| 2223 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2224 | accreg: ACCREG subregnum |
| 2225 | { |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2226 | if ($1 > 1) { |
| 2227 | fprintf(stderr, |
| 2228 | "accumulator register number %d out of range", $1); |
| 2229 | YYERROR; |
| 2230 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2231 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2232 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2233 | $$.nr = BRW_ARF_ACCUMULATOR | $1; |
| 2234 | $$.subnr = $2; |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2235 | } |
| 2236 | ; |
| 2237 | |
Xiang, Haihao | f3f6ba2 | 2012-07-17 13:46:59 +0800 | [diff] [blame] | 2238 | flagreg: FLAGREG subregnum |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2239 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2240 | if ((!IS_GENp(7) && $1) > 0 || |
| 2241 | (IS_GENp(7) && $1 > 1)) { |
Xiang, Haihao | f3f6ba2 | 2012-07-17 13:46:59 +0800 | [diff] [blame] | 2242 | fprintf(stderr, |
| 2243 | "flag register number %d out of range\n", $1); |
| 2244 | YYERROR; |
| 2245 | } |
| 2246 | |
| 2247 | if ($2 > 1) { |
| 2248 | fprintf(stderr, |
| 2249 | "flag subregister number %d out of range\n", $1); |
| 2250 | YYERROR; |
| 2251 | } |
| 2252 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2253 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2254 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2255 | $$.nr = BRW_ARF_FLAG | $1; |
| 2256 | $$.subnr = $2; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2257 | } |
| 2258 | ; |
| 2259 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2260 | maskreg: MASKREG subregnum |
| 2261 | { |
| 2262 | if ($1 > 0) { |
| 2263 | fprintf(stderr, |
| 2264 | "mask register number %d out of range", $1); |
| 2265 | YYERROR; |
| 2266 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2267 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2268 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2269 | $$.nr = BRW_ARF_MASK; |
| 2270 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2271 | } |
| 2272 | | mask_subreg |
| 2273 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2274 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2275 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2276 | $$.nr = BRW_ARF_MASK; |
| 2277 | $$.subnr = $1; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2278 | } |
| 2279 | ; |
| 2280 | |
| 2281 | mask_subreg: AMASK | IMASK | LMASK | CMASK |
| 2282 | ; |
| 2283 | |
| 2284 | maskstackreg: MASKSTACKREG subregnum |
| 2285 | { |
| 2286 | if ($1 > 0) { |
| 2287 | fprintf(stderr, |
| 2288 | "mask stack register number %d out of range", $1); |
| 2289 | YYERROR; |
| 2290 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2291 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2292 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2293 | $$.nr = BRW_ARF_MASK_STACK; |
| 2294 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2295 | } |
| 2296 | | maskstack_subreg |
| 2297 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2298 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2299 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2300 | $$.nr = BRW_ARF_MASK_STACK; |
| 2301 | $$.subnr = $1; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2302 | } |
| 2303 | ; |
| 2304 | |
| 2305 | maskstack_subreg: IMS | LMS |
| 2306 | ; |
| 2307 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2308 | /* |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2309 | maskstackdepthreg: MASKSTACKDEPTHREG subregnum |
| 2310 | { |
| 2311 | if ($1 > 0) { |
| 2312 | fprintf(stderr, |
| 2313 | "mask stack register number %d out of range", $1); |
| 2314 | YYERROR; |
| 2315 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2316 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2317 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2318 | $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; |
| 2319 | $$.subreg_nr = $2; |
| 2320 | } |
| 2321 | | maskstackdepth_subreg |
| 2322 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2323 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2324 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2325 | $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; |
| 2326 | $$.subreg_nr = $1; |
| 2327 | } |
| 2328 | ; |
| 2329 | |
| 2330 | maskstackdepth_subreg: IMSD | LMSD |
| 2331 | ; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2332 | */ |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2333 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2334 | notifyreg: NOTIFYREG regtype |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2335 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2336 | int num_notifyreg = (IS_GENp(6)) ? 3 : 2; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2337 | |
| 2338 | if ($1 > num_notifyreg) { |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2339 | fprintf(stderr, |
| 2340 | "notification register number %d out of range", |
| 2341 | $1); |
| 2342 | YYERROR; |
| 2343 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2344 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2345 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2346 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2347 | if (IS_GENp(6)) { |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2348 | $$.nr = BRW_ARF_NOTIFICATION_COUNT; |
| 2349 | $$.subnr = $1; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2350 | } else { |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2351 | $$.nr = BRW_ARF_NOTIFICATION_COUNT | $1; |
| 2352 | $$.subnr = 0; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2353 | } |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2354 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2355 | /* |
| 2356 | | NOTIFYREG regtype |
| 2357 | { |
| 2358 | if ($1 > 1) { |
| 2359 | fprintf(stderr, |
| 2360 | "notification register number %d out of range", |
| 2361 | $1); |
| 2362 | YYERROR; |
| 2363 | } |
| 2364 | memset (&$$, '\0', sizeof ($$)); |
| 2365 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2366 | $$.reg_nr = BRW_ARF_NOTIFICATION_COUNT; |
| 2367 | $$.subreg_nr = 0; |
| 2368 | } |
| 2369 | */ |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2370 | ; |
| 2371 | |
| 2372 | statereg: STATEREG subregnum |
| 2373 | { |
| 2374 | if ($1 > 0) { |
| 2375 | fprintf(stderr, |
| 2376 | "state register number %d out of range", $1); |
| 2377 | YYERROR; |
| 2378 | } |
| 2379 | if ($2 > 1) { |
| 2380 | fprintf(stderr, |
| 2381 | "state subregister number %d out of range", $1); |
| 2382 | YYERROR; |
| 2383 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2384 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2385 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2386 | $$.nr = BRW_ARF_STATE | $1; |
| 2387 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2388 | } |
| 2389 | ; |
| 2390 | |
| 2391 | controlreg: CONTROLREG subregnum |
| 2392 | { |
| 2393 | if ($1 > 0) { |
| 2394 | fprintf(stderr, |
| 2395 | "control register number %d out of range", $1); |
| 2396 | YYERROR; |
| 2397 | } |
| 2398 | if ($2 > 2) { |
| 2399 | fprintf(stderr, |
| 2400 | "control subregister number %d out of range", $1); |
| 2401 | YYERROR; |
| 2402 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2403 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2404 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2405 | $$.nr = BRW_ARF_CONTROL | $1; |
| 2406 | $$.subnr = $2; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2407 | } |
| 2408 | ; |
| 2409 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2410 | ipreg: IPREG regtype |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2411 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2412 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2413 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2414 | $$.nr = BRW_ARF_IP; |
| 2415 | $$.subnr = 0; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2416 | } |
| 2417 | ; |
| 2418 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2419 | nullreg: NULL_TOKEN |
| 2420 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2421 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2422 | $$.file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2423 | $$.nr = BRW_ARF_NULL; |
| 2424 | $$.subnr = 0; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2425 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2426 | ; |
| 2427 | |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2428 | /* 1.4.6: Relative locations */ |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2429 | relativelocation: |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 2430 | simple_int |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2431 | { |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2432 | if (($1 > 32767) || ($1 < -32768)) { |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2433 | fprintf(stderr, |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2434 | "error: relative offset %d out of range \n", |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2435 | $1); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2436 | YYERROR; |
| 2437 | } |
| 2438 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2439 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2440 | $$.reg.file = BRW_IMMEDIATE_VALUE; |
| 2441 | $$.reg.type = BRW_REGISTER_TYPE_D; |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2442 | $$.imm32 = $1 & 0x0000ffff; |
| 2443 | } |
| 2444 | | STRING |
| 2445 | { |
| 2446 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2447 | $$.reg.file = BRW_IMMEDIATE_VALUE; |
| 2448 | $$.reg.type = BRW_REGISTER_TYPE_D; |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2449 | $$.reloc_target = $1; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2450 | } |
| 2451 | ; |
| 2452 | |
| 2453 | relativelocation2: |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 2454 | STRING |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2455 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2456 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2457 | $$.reg.file = BRW_IMMEDIATE_VALUE; |
| 2458 | $$.reg.type = BRW_REGISTER_TYPE_D; |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 2459 | $$.reloc_target = $1; |
| 2460 | } |
| 2461 | | exp |
| 2462 | { |
| 2463 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2464 | $$.reg.file = BRW_IMMEDIATE_VALUE; |
| 2465 | $$.reg.type = BRW_REGISTER_TYPE_D; |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 2466 | $$.imm32 = $1; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2467 | } |
| 2468 | | directgenreg region regtype |
| 2469 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2470 | set_direct_src_operand(&$$, &$1, $3.type); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2471 | $$.reg.vstride = $2.vert_stride; |
| 2472 | $$.reg.width = $2.width; |
| 2473 | $$.reg.hstride = $2.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2474 | $$.default_region = $2.is_default; |
| 2475 | } |
| 2476 | | symbol_reg_p |
| 2477 | { |
| 2478 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2479 | $$.reg.address_mode = BRW_ADDRESS_DIRECT; |
| 2480 | $$.reg.file = $1.reg.file; |
| 2481 | $$.reg.nr = $1.reg.nr; |
| 2482 | $$.reg.subnr = $1.reg.subnr; |
| 2483 | $$.reg.type = $1.type; |
| 2484 | $$.reg.vstride = $1.src_region.vert_stride; |
| 2485 | $$.reg.width = $1.src_region.width; |
| 2486 | $$.reg.hstride = $1.src_region.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2487 | } |
| 2488 | | indirectgenreg indirectregion regtype |
| 2489 | { |
| 2490 | memset (&$$, '\0', sizeof ($$)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2491 | $$.reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
| 2492 | $$.reg.file = $1.file; |
| 2493 | $$.reg.subnr = $1.subnr; |
| 2494 | $$.reg.dw1.bits.indirect_offset = $1.dw1.bits.indirect_offset; |
| 2495 | $$.reg.type = $3.type; |
| 2496 | $$.reg.vstride = $2.vert_stride; |
| 2497 | $$.reg.width = $2.width; |
| 2498 | $$.reg.hstride = $2.horiz_stride; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2499 | } |
| 2500 | ; |
| 2501 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2502 | /* 1.4.7: Regions */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2503 | dstregion: /* empty */ |
| 2504 | { |
| 2505 | $$ = DEFAULT_DSTREGION; |
| 2506 | } |
| 2507 | |LANGLE exp RANGLE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2508 | { |
| 2509 | /* Returns a value for a horiz_stride field of an |
| 2510 | * instruction. |
| 2511 | */ |
| 2512 | if ($2 != 1 && $2 != 2 && $2 != 4) { |
| 2513 | fprintf(stderr, "Invalid horiz size %d\n", $2); |
| 2514 | } |
Eric Anholt | 0edcb25 | 2006-08-22 13:15:38 -0700 | [diff] [blame] | 2515 | $$ = ffs($2); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2516 | } |
| 2517 | ; |
| 2518 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2519 | region: /* empty */ |
| 2520 | { |
| 2521 | /* XXX is this default value correct?*/ |
| 2522 | memset (&$$, '\0', sizeof ($$)); |
| 2523 | $$.vert_stride = ffs(0); |
| 2524 | $$.width = ffs(1) - 1; |
| 2525 | $$.horiz_stride = ffs(0); |
| 2526 | $$.is_default = 1; |
| 2527 | } |
| 2528 | |LANGLE exp RANGLE |
| 2529 | { |
| 2530 | /* XXX is this default value correct for accreg?*/ |
| 2531 | memset (&$$, '\0', sizeof ($$)); |
| 2532 | $$.vert_stride = ffs($2); |
| 2533 | $$.width = ffs(1) - 1; |
| 2534 | $$.horiz_stride = ffs(0); |
| 2535 | } |
| 2536 | |LANGLE exp COMMA exp COMMA exp RANGLE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2537 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2538 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2539 | $$.vert_stride = ffs($2); |
| 2540 | $$.width = ffs($4) - 1; |
Eric Anholt | d4c82e8 | 2006-08-22 13:08:26 -0700 | [diff] [blame] | 2541 | $$.horiz_stride = ffs($6); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2542 | } |
Zou Nan hai | c6f2da4 | 2009-10-28 10:14:19 +0800 | [diff] [blame] | 2543 | | LANGLE exp SEMICOLON exp COMMA exp RANGLE |
| 2544 | { |
| 2545 | memset (&$$, '\0', sizeof ($$)); |
| 2546 | $$.vert_stride = ffs($2); |
| 2547 | $$.width = ffs($4) - 1; |
| 2548 | $$.horiz_stride = ffs($6); |
| 2549 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2550 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2551 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2552 | /* region_wh is used in specifying indirect operands where rather than having |
| 2553 | * a vertical stride, you use subsequent address registers to get a new base |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2554 | * offset for the next row. |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2555 | */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2556 | region_wh: LANGLE exp COMMA exp RANGLE |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2557 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2558 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2559 | $$.vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL; |
| 2560 | $$.width = ffs($2) - 1; |
| 2561 | $$.horiz_stride = ffs($4); |
| 2562 | } |
| 2563 | ; |
| 2564 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2565 | indirectregion: region | region_wh |
| 2566 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2567 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2568 | /* 1.4.8: Types */ |
| 2569 | |
| 2570 | /* regtype returns an integer register type suitable for inserting into an |
| 2571 | * instruction. |
| 2572 | */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2573 | regtype: /* empty */ |
| 2574 | { $$.type = program_defaults.register_type;$$.is_default = 1;} |
| 2575 | | TYPE_F { $$.type = BRW_REGISTER_TYPE_F;$$.is_default = 0; } |
| 2576 | | TYPE_UD { $$.type = BRW_REGISTER_TYPE_UD;$$.is_default = 0; } |
| 2577 | | TYPE_D { $$.type = BRW_REGISTER_TYPE_D;$$.is_default = 0; } |
| 2578 | | TYPE_UW { $$.type = BRW_REGISTER_TYPE_UW;$$.is_default = 0; } |
| 2579 | | TYPE_W { $$.type = BRW_REGISTER_TYPE_W;$$.is_default = 0; } |
| 2580 | | TYPE_UB { $$.type = BRW_REGISTER_TYPE_UB;$$.is_default = 0; } |
| 2581 | | TYPE_B { $$.type = BRW_REGISTER_TYPE_B;$$.is_default = 0; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2582 | ; |
| 2583 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2584 | srcimmtype: /* empty */ |
| 2585 | { |
| 2586 | /* XXX change to default when pragma parse is done */ |
| 2587 | $$ = BRW_REGISTER_TYPE_D; |
| 2588 | } |
| 2589 | |TYPE_F { $$ = BRW_REGISTER_TYPE_F; } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2590 | | TYPE_UD { $$ = BRW_REGISTER_TYPE_UD; } |
| 2591 | | TYPE_D { $$ = BRW_REGISTER_TYPE_D; } |
| 2592 | | TYPE_UW { $$ = BRW_REGISTER_TYPE_UW; } |
| 2593 | | TYPE_W { $$ = BRW_REGISTER_TYPE_W; } |
| 2594 | | TYPE_V { $$ = BRW_REGISTER_TYPE_V; } |
| 2595 | | TYPE_VF { $$ = BRW_REGISTER_TYPE_VF; } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2596 | ; |
| 2597 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2598 | /* 1.4.10: Swizzle control */ |
| 2599 | /* Returns the swizzle control for an align16 instruction's source operand |
| 2600 | * in the src0 fields. |
| 2601 | */ |
| 2602 | swizzle: /* empty */ |
| 2603 | { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2604 | $$.reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2605 | } |
| 2606 | | DOT chansel |
| 2607 | { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2608 | $$.reg.dw1.bits.swizzle = BRW_SWIZZLE4($2, $2, $2, $2); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2609 | } |
| 2610 | | DOT chansel chansel chansel chansel |
| 2611 | { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2612 | $$.reg.dw1.bits.swizzle = BRW_SWIZZLE4($2, $3, $4, $5); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2613 | } |
| 2614 | ; |
| 2615 | |
| 2616 | chansel: X | Y | Z | W |
| 2617 | ; |
| 2618 | |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2619 | /* 1.4.9: Write mask */ |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2620 | /* Returns a partially completed struct brw_reg, with just the writemask bits |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2621 | * filled out. |
| 2622 | */ |
| 2623 | writemask: /* empty */ |
| 2624 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2625 | $$.dw1.bits.writemask = BRW_WRITEMASK_XYZW; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2626 | } |
| 2627 | | DOT writemask_x writemask_y writemask_z writemask_w |
| 2628 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2629 | $$.dw1.bits.writemask = $2 | $3 | $4 | $5; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2630 | } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2631 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2632 | |
| 2633 | writemask_x: /* empty */ { $$ = 0; } |
| 2634 | | X { $$ = 1 << BRW_CHANNEL_X; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2635 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2636 | |
| 2637 | writemask_y: /* empty */ { $$ = 0; } |
| 2638 | | Y { $$ = 1 << BRW_CHANNEL_Y; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2639 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2640 | |
| 2641 | writemask_z: /* empty */ { $$ = 0; } |
| 2642 | | Z { $$ = 1 << BRW_CHANNEL_Z; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2643 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2644 | |
| 2645 | writemask_w: /* empty */ { $$ = 0; } |
| 2646 | | W { $$ = 1 << BRW_CHANNEL_W; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2647 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2648 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2649 | /* 1.4.11: Immediate values */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2650 | imm32: exp { $$.r = imm32_d; $$.u.d = $1; } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2651 | | NUMBER { $$.r = imm32_f; $$.u.f = $1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2652 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2653 | |
| 2654 | /* 1.4.12: Predication and modifiers */ |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2655 | predicate: /* empty */ |
| 2656 | { |
| 2657 | $$.header.predicate_control = BRW_PREDICATE_NONE; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2658 | $$.bits2.da1.flag_reg_nr = 0; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2659 | $$.bits2.da1.flag_subreg_nr = 0; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2660 | $$.header.predicate_inverse = 0; |
| 2661 | } |
| 2662 | | LPAREN predstate flagreg predctrl RPAREN |
| 2663 | { |
| 2664 | $$.header.predicate_control = $4; |
| 2665 | /* XXX: Should deal with erroring when the user tries to |
| 2666 | * set a predicate for one flag register and conditional |
| 2667 | * modification on the other flag register. |
| 2668 | */ |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2669 | $$.bits2.da1.flag_reg_nr = ($3.nr & 0xF); |
| 2670 | $$.bits2.da1.flag_subreg_nr = $3.subnr; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2671 | $$.header.predicate_inverse = $2; |
| 2672 | } |
| 2673 | ; |
| 2674 | |
| 2675 | predstate: /* empty */ { $$ = 0; } |
| 2676 | | PLUS { $$ = 0; } |
| 2677 | | MINUS { $$ = 1; } |
| 2678 | ; |
| 2679 | |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2680 | predctrl: /* empty */ { $$ = BRW_PREDICATE_NORMAL; } |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2681 | | DOT X { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_X; } |
| 2682 | | DOT Y { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Y; } |
| 2683 | | DOT Z { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Z; } |
| 2684 | | DOT W { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_W; } |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2685 | | ANYV { $$ = BRW_PREDICATE_ALIGN1_ANYV; } |
| 2686 | | ALLV { $$ = BRW_PREDICATE_ALIGN1_ALLV; } |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2687 | | ANY2H { $$ = BRW_PREDICATE_ALIGN1_ANY2H; } |
| 2688 | | ALL2H { $$ = BRW_PREDICATE_ALIGN1_ALL2H; } |
| 2689 | | ANY4H { $$ = BRW_PREDICATE_ALIGN1_ANY4H; } |
| 2690 | | ALL4H { $$ = BRW_PREDICATE_ALIGN1_ALL4H; } |
| 2691 | | ANY8H { $$ = BRW_PREDICATE_ALIGN1_ANY8H; } |
| 2692 | | ALL8H { $$ = BRW_PREDICATE_ALIGN1_ALL8H; } |
| 2693 | | ANY16H { $$ = BRW_PREDICATE_ALIGN1_ANY16H; } |
| 2694 | | ALL16H { $$ = BRW_PREDICATE_ALIGN1_ALL16H; } |
Eric Anholt | dc96c56 | 2006-08-22 14:42:45 -0700 | [diff] [blame] | 2695 | ; |
| 2696 | |
| 2697 | negate: /* empty */ { $$ = 0; } |
| 2698 | | MINUS { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2699 | ; |
Eric Anholt | dc96c56 | 2006-08-22 14:42:45 -0700 | [diff] [blame] | 2700 | |
| 2701 | abs: /* empty */ { $$ = 0; } |
| 2702 | | ABS { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2703 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2704 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2705 | execsize: /* empty */ %prec EMPTEXECSIZE |
| 2706 | { |
| 2707 | $$ = ffs(program_defaults.execute_size) - 1; |
| 2708 | } |
| 2709 | |LPAREN exp RPAREN |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2710 | { |
| 2711 | /* Returns a value for the execution_size field of an |
| 2712 | * instruction. |
| 2713 | */ |
| 2714 | if ($2 != 1 && $2 != 2 && $2 != 4 && $2 != 8 && $2 != 16 && |
| 2715 | $2 != 32) { |
| 2716 | fprintf(stderr, "Invalid execution size %d\n", $2); |
| 2717 | YYERROR; |
| 2718 | } |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2719 | $$ = ffs($2) - 1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2720 | } |
| 2721 | ; |
| 2722 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2723 | saturate: /* empty */ { $$ = BRW_INSTRUCTION_NORMAL; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2724 | | SATURATE { $$ = BRW_INSTRUCTION_SATURATE; } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2725 | ; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2726 | conditionalmodifier: condition |
| 2727 | { |
| 2728 | $$.cond = $1; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2729 | $$.flag_reg_nr = 0; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2730 | $$.flag_subreg_nr = -1; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2731 | } |
| 2732 | | condition DOT flagreg |
| 2733 | { |
| 2734 | $$.cond = $1; |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 2735 | $$.flag_reg_nr = ($3.nr & 0xF); |
| 2736 | $$.flag_subreg_nr = $3.subnr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2737 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2738 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2739 | condition: /* empty */ { $$ = BRW_CONDITIONAL_NONE; } |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2740 | | ZERO |
| 2741 | | EQUAL |
| 2742 | | NOT_ZERO |
| 2743 | | NOT_EQUAL |
| 2744 | | GREATER |
| 2745 | | GREATER_EQUAL |
| 2746 | | LESS |
| 2747 | | LESS_EQUAL |
| 2748 | | ROUND_INCREMENT |
| 2749 | | OVERFLOW |
| 2750 | | UNORDERED |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2751 | ; |
| 2752 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2753 | /* 1.4.13: Instruction options */ |
Zou Nan hai | c6f2da4 | 2009-10-28 10:14:19 +0800 | [diff] [blame] | 2754 | instoptions: /* empty */ |
| 2755 | { memset(&$$, 0, sizeof($$)); } |
| 2756 | | LCURLY instoption_list RCURLY |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2757 | { $$ = $2; } |
| 2758 | ; |
| 2759 | |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2760 | instoption_list:instoption_list COMMA instoption |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2761 | { |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2762 | $$ = $1; |
| 2763 | switch ($3) { |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2764 | case ALIGN1: |
| 2765 | $$.header.access_mode = BRW_ALIGN_1; |
| 2766 | break; |
| 2767 | case ALIGN16: |
| 2768 | $$.header.access_mode = BRW_ALIGN_16; |
| 2769 | break; |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2770 | case SECHALF: |
| 2771 | $$.header.compression_control |= BRW_COMPRESSION_2NDHALF; |
| 2772 | break; |
| 2773 | case COMPR: |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2774 | if (!IS_GENp(6)) { |
Xiang, Haihao | c2382ca | 2010-10-09 13:57:48 +0800 | [diff] [blame] | 2775 | $$.header.compression_control |= |
| 2776 | BRW_COMPRESSION_COMPRESSED; |
| 2777 | } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2778 | break; |
| 2779 | case SWITCH: |
| 2780 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 2781 | break; |
| 2782 | case ATOMIC: |
| 2783 | $$.header.thread_control |= BRW_THREAD_ATOMIC; |
| 2784 | break; |
| 2785 | case NODDCHK: |
| 2786 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED; |
| 2787 | break; |
| 2788 | case NODDCLR: |
| 2789 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCLEARED; |
| 2790 | break; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2791 | case MASK_DISABLE: |
| 2792 | $$.header.mask_control = BRW_MASK_DISABLE; |
| 2793 | break; |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2794 | case BREAKPOINT: |
| 2795 | $$.header.debug_control = BRW_DEBUG_BREAKPOINT; |
| 2796 | break; |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2797 | case ACCWRCTRL: |
Damien Lespiau | 4431869 | 2013-01-18 11:52:01 +0000 | [diff] [blame] | 2798 | $$.header.acc_wr_control = BRW_ACCUMULATOR_WRITE_ENABLE; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2799 | } |
| 2800 | } |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2801 | | instoption_list instoption |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2802 | { |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2803 | $$ = $1; |
| 2804 | switch ($2) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2805 | case ALIGN1: |
| 2806 | $$.header.access_mode = BRW_ALIGN_1; |
| 2807 | break; |
| 2808 | case ALIGN16: |
| 2809 | $$.header.access_mode = BRW_ALIGN_16; |
| 2810 | break; |
| 2811 | case SECHALF: |
| 2812 | $$.header.compression_control |= BRW_COMPRESSION_2NDHALF; |
| 2813 | break; |
| 2814 | case COMPR: |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2815 | if (!IS_GENp(6)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2816 | $$.header.compression_control |= |
| 2817 | BRW_COMPRESSION_COMPRESSED; |
| 2818 | } |
| 2819 | break; |
| 2820 | case SWITCH: |
| 2821 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 2822 | break; |
| 2823 | case ATOMIC: |
| 2824 | $$.header.thread_control |= BRW_THREAD_ATOMIC; |
| 2825 | break; |
| 2826 | case NODDCHK: |
| 2827 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED; |
| 2828 | break; |
| 2829 | case NODDCLR: |
| 2830 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCLEARED; |
| 2831 | break; |
| 2832 | case MASK_DISABLE: |
| 2833 | $$.header.mask_control = BRW_MASK_DISABLE; |
| 2834 | break; |
| 2835 | case BREAKPOINT: |
| 2836 | $$.header.debug_control = BRW_DEBUG_BREAKPOINT; |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2837 | break; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2838 | case EOT: |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 2839 | /* XXX: EOT shouldn't be an instoption, I don't think */ |
| 2840 | $$.bits3.generic.end_of_thread = 1; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2841 | break; |
| 2842 | } |
| 2843 | } |
| 2844 | | /* empty, header defaults to zeroes. */ |
Eric Anholt | e609d6b | 2006-08-24 12:36:56 -0700 | [diff] [blame] | 2845 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 2846 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | e609d6b | 2006-08-24 12:36:56 -0700 | [diff] [blame] | 2847 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2848 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2849 | |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2850 | instoption: ALIGN1 { $$ = ALIGN1; } |
| 2851 | | ALIGN16 { $$ = ALIGN16; } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2852 | | SECHALF { $$ = SECHALF; } |
| 2853 | | COMPR { $$ = COMPR; } |
| 2854 | | SWITCH { $$ = SWITCH; } |
| 2855 | | ATOMIC { $$ = ATOMIC; } |
| 2856 | | NODDCHK { $$ = NODDCHK; } |
| 2857 | | NODDCLR { $$ = NODDCLR; } |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2858 | | MASK_DISABLE { $$ = MASK_DISABLE; } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2859 | | BREAKPOINT { $$ = BREAKPOINT; } |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2860 | | ACCWRCTRL { $$ = ACCWRCTRL; } |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2861 | | EOT { $$ = EOT; } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2862 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2863 | |
| 2864 | %% |
| 2865 | extern int yylineno; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2866 | extern char *input_filename; |
| 2867 | |
| 2868 | int errors; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2869 | |
| 2870 | void yyerror (char *msg) |
| 2871 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2872 | fprintf(stderr, "%s: %d: %s at \"%s\"\n", |
| 2873 | input_filename, yylineno, msg, lex_text()); |
| 2874 | ++errors; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2875 | } |
| 2876 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2877 | static int get_type_size(GLuint type) |
| 2878 | { |
| 2879 | int size = 1; |
| 2880 | |
| 2881 | switch (type) { |
| 2882 | case BRW_REGISTER_TYPE_F: |
| 2883 | case BRW_REGISTER_TYPE_UD: |
| 2884 | case BRW_REGISTER_TYPE_D: |
| 2885 | size = 4; |
| 2886 | break; |
| 2887 | |
| 2888 | case BRW_REGISTER_TYPE_UW: |
| 2889 | case BRW_REGISTER_TYPE_W: |
| 2890 | size = 2; |
| 2891 | break; |
| 2892 | |
| 2893 | case BRW_REGISTER_TYPE_UB: |
| 2894 | case BRW_REGISTER_TYPE_B: |
| 2895 | size = 1; |
| 2896 | break; |
| 2897 | |
| 2898 | default: |
| 2899 | assert(0); |
| 2900 | size = 1; |
| 2901 | break; |
| 2902 | } |
| 2903 | |
| 2904 | return size; |
| 2905 | } |
| 2906 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2907 | static void reset_instruction_src_region(struct brw_instruction *instr, |
| 2908 | struct src_operand *src) |
| 2909 | { |
| 2910 | if (!src->default_region) |
| 2911 | return; |
| 2912 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2913 | if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && |
| 2914 | ((src->reg.nr & 0xF0) == BRW_ARF_ADDRESS)) { |
| 2915 | src->reg.vstride = ffs(0); |
| 2916 | src->reg.width = ffs(1) - 1; |
| 2917 | src->reg.hstride = ffs(0); |
| 2918 | } else if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && |
| 2919 | ((src->reg.nr & 0xF0) == BRW_ARF_ACCUMULATOR)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2920 | int horiz_stride = 1, width, vert_stride; |
| 2921 | if (instr->header.compression_control == BRW_COMPRESSION_COMPRESSED) { |
| 2922 | width = 16; |
| 2923 | } else { |
| 2924 | width = 8; |
| 2925 | } |
| 2926 | |
| 2927 | if (width > (1 << instr->header.execution_size)) |
| 2928 | width = (1 << instr->header.execution_size); |
| 2929 | |
| 2930 | vert_stride = horiz_stride * width; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2931 | src->reg.vstride = ffs(vert_stride); |
| 2932 | src->reg.width = ffs(width) - 1; |
| 2933 | src->reg.hstride = ffs(horiz_stride); |
| 2934 | } else if ((src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE) && |
| 2935 | (src->reg.nr == BRW_ARF_NULL) && |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2936 | (instr->header.opcode == BRW_OPCODE_SEND)) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2937 | src->reg.vstride = ffs(8); |
| 2938 | src->reg.width = ffs(8) - 1; |
| 2939 | src->reg.hstride = ffs(1); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2940 | } else { |
| 2941 | |
| 2942 | int horiz_stride = 1, width, vert_stride; |
| 2943 | |
| 2944 | if (instr->header.execution_size == 0) { /* scalar */ |
| 2945 | horiz_stride = 0; |
| 2946 | width = 1; |
| 2947 | vert_stride = 0; |
| 2948 | } else { |
| 2949 | if ((instr->header.opcode == BRW_OPCODE_MUL) || |
| 2950 | (instr->header.opcode == BRW_OPCODE_MAC) || |
| 2951 | (instr->header.opcode == BRW_OPCODE_CMP) || |
| 2952 | (instr->header.opcode == BRW_OPCODE_ASR) || |
| 2953 | (instr->header.opcode == BRW_OPCODE_ADD) || |
| 2954 | (instr->header.opcode == BRW_OPCODE_SHL)) { |
| 2955 | horiz_stride = 0; |
| 2956 | width = 1; |
| 2957 | vert_stride = 0; |
| 2958 | } else { |
| 2959 | width = (1 << instr->header.execution_size) / horiz_stride; |
| 2960 | vert_stride = horiz_stride * width; |
Xiang, Haihao | e7f4dc6 | 2011-03-01 16:43:02 +0800 | [diff] [blame] | 2961 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2962 | if (get_type_size(src->reg.type) * (width + src->reg.subnr) > 32) { |
Xiang, Haihao | e7f4dc6 | 2011-03-01 16:43:02 +0800 | [diff] [blame] | 2963 | horiz_stride = 0; |
| 2964 | width = 1; |
| 2965 | vert_stride = 0; |
| 2966 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2967 | } |
| 2968 | } |
| 2969 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 2970 | src->reg.vstride = ffs(vert_stride); |
| 2971 | src->reg.width = ffs(width) - 1; |
| 2972 | src->reg.hstride = ffs(horiz_stride); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2973 | } |
| 2974 | } |
| 2975 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2976 | /** |
| 2977 | * Fills in the destination register information in instr from the bits in dst. |
| 2978 | */ |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2979 | int set_instruction_dest(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 2980 | struct brw_reg *dest) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2981 | { |
Damien Lespiau | 5e0da9f | 2013-01-24 12:21:13 +0000 | [diff] [blame] | 2982 | if (!validate_dst_reg(instr, dest)) |
| 2983 | return 1; |
| 2984 | |
Damien Lespiau | 9fcc1bd | 2013-01-24 16:16:35 +0000 | [diff] [blame] | 2985 | /* the assembler support expressing subnr in bytes or in number of |
| 2986 | * elements. */ |
| 2987 | resolve_subnr(dest); |
| 2988 | |
| 2989 | brw_set_dest(&genasm_compile, instr, *dest); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2990 | |
| 2991 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2992 | } |
| 2993 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2994 | /* Sets the first source operand for the instruction. Returns 0 on success. */ |
| 2995 | int set_instruction_src0(struct brw_instruction *instr, |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 2996 | struct src_operand *src, |
| 2997 | YYLTYPE *location) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2998 | { |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 2999 | if (advanced_flag) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3000 | reset_instruction_src_region(instr, src); |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 3001 | |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 3002 | if (!validate_src_reg(instr, src->reg, location)) |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 3003 | return 1; |
| 3004 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3005 | instr->bits1.da1.src0_reg_file = src->reg.file; |
| 3006 | instr->bits1.da1.src0_reg_type = src->reg.type; |
| 3007 | if (src->reg.file == BRW_IMMEDIATE_VALUE) { |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 3008 | instr->bits3.ud = src->reg.dw1.ud; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3009 | } else if (src->reg.address_mode == BRW_ADDRESS_DIRECT) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3010 | if (instr->header.access_mode == BRW_ALIGN_1) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3011 | instr->bits2.da1.src0_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode); |
| 3012 | instr->bits2.da1.src0_reg_nr = src->reg.nr; |
| 3013 | instr->bits2.da1.src0_vert_stride = src->reg.vstride; |
| 3014 | instr->bits2.da1.src0_width = src->reg.width; |
| 3015 | instr->bits2.da1.src0_horiz_stride = src->reg.hstride; |
| 3016 | instr->bits2.da1.src0_negate = src->reg.negate; |
| 3017 | instr->bits2.da1.src0_abs = src->reg.abs; |
| 3018 | instr->bits2.da1.src0_address_mode = src->reg.address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3019 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3020 | instr->bits2.da16.src0_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode); |
| 3021 | instr->bits2.da16.src0_reg_nr = src->reg.nr; |
| 3022 | instr->bits2.da16.src0_vert_stride = src->reg.vstride; |
| 3023 | instr->bits2.da16.src0_negate = src->reg.negate; |
| 3024 | instr->bits2.da16.src0_abs = src->reg.abs; |
| 3025 | instr->bits2.da16.src0_swz_x = BRW_GET_SWZ(SWIZZLE(src->reg), 0); |
| 3026 | instr->bits2.da16.src0_swz_y = BRW_GET_SWZ(SWIZZLE(src->reg), 1); |
| 3027 | instr->bits2.da16.src0_swz_z = BRW_GET_SWZ(SWIZZLE(src->reg), 2); |
| 3028 | instr->bits2.da16.src0_swz_w = BRW_GET_SWZ(SWIZZLE(src->reg), 3); |
| 3029 | instr->bits2.da16.src0_address_mode = src->reg.address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3030 | } |
| 3031 | } else { |
| 3032 | if (instr->header.access_mode == BRW_ALIGN_1) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3033 | instr->bits2.ia1.src0_indirect_offset = src->reg.dw1.bits.indirect_offset; |
| 3034 | instr->bits2.ia1.src0_subreg_nr = get_indirect_subreg_address(src->reg.subnr); |
| 3035 | instr->bits2.ia1.src0_abs = src->reg.abs; |
| 3036 | instr->bits2.ia1.src0_negate = src->reg.negate; |
| 3037 | instr->bits2.ia1.src0_address_mode = src->reg.address_mode; |
| 3038 | instr->bits2.ia1.src0_horiz_stride = src->reg.hstride; |
| 3039 | instr->bits2.ia1.src0_width = src->reg.width; |
| 3040 | instr->bits2.ia1.src0_vert_stride = src->reg.vstride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3041 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3042 | instr->bits2.ia16.src0_swz_x = BRW_GET_SWZ(SWIZZLE(src->reg), 0); |
| 3043 | instr->bits2.ia16.src0_swz_y = BRW_GET_SWZ(SWIZZLE(src->reg), 1); |
| 3044 | instr->bits2.ia16.src0_swz_z = BRW_GET_SWZ(SWIZZLE(src->reg), 2); |
| 3045 | instr->bits2.ia16.src0_swz_w = BRW_GET_SWZ(SWIZZLE(src->reg), 3); |
| 3046 | instr->bits2.ia16.src0_indirect_offset = (src->reg.dw1.bits.indirect_offset >> 4); /* half register aligned */ |
| 3047 | instr->bits2.ia16.src0_subreg_nr = get_indirect_subreg_address(src->reg.subnr); |
| 3048 | instr->bits2.ia16.src0_abs = src->reg.abs; |
| 3049 | instr->bits2.ia16.src0_negate = src->reg.negate; |
| 3050 | instr->bits2.ia16.src0_address_mode = src->reg.address_mode; |
| 3051 | instr->bits2.ia16.src0_vert_stride = src->reg.vstride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3052 | } |
| 3053 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3054 | |
| 3055 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3056 | } |
| 3057 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3058 | /* Sets the second source operand for the instruction. Returns 0 on success. |
| 3059 | */ |
| 3060 | int set_instruction_src1(struct brw_instruction *instr, |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 3061 | struct src_operand *src, |
| 3062 | YYLTYPE *location) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3063 | { |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 3064 | if (advanced_flag) |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3065 | reset_instruction_src_region(instr, src); |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 3066 | |
Damien Lespiau | e9172aa | 2013-01-26 22:44:45 +0000 | [diff] [blame] | 3067 | if (!validate_src_reg(instr, src->reg, location)) |
Damien Lespiau | c0592b2 | 2013-01-24 18:32:20 +0000 | [diff] [blame] | 3068 | return 1; |
| 3069 | |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3070 | instr->bits1.da1.src1_reg_file = src->reg.file; |
| 3071 | instr->bits1.da1.src1_reg_type = src->reg.type; |
| 3072 | if (src->reg.file == BRW_IMMEDIATE_VALUE) { |
Damien Lespiau | 9c72beb | 2013-01-25 15:48:58 +0000 | [diff] [blame] | 3073 | instr->bits3.ud = src->reg.dw1.ud; |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3074 | } else if (src->reg.address_mode == BRW_ADDRESS_DIRECT) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3075 | if (instr->header.access_mode == BRW_ALIGN_1) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3076 | instr->bits3.da1.src1_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode); |
| 3077 | instr->bits3.da1.src1_reg_nr = src->reg.nr; |
| 3078 | instr->bits3.da1.src1_vert_stride = src->reg.vstride; |
| 3079 | instr->bits3.da1.src1_width = src->reg.width; |
| 3080 | instr->bits3.da1.src1_horiz_stride = src->reg.hstride; |
| 3081 | instr->bits3.da1.src1_negate = src->reg.negate; |
| 3082 | instr->bits3.da1.src1_abs = src->reg.abs; |
| 3083 | instr->bits3.da1.src1_address_mode = src->reg.address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3084 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3085 | instr->bits3.da16.src1_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode); |
| 3086 | instr->bits3.da16.src1_reg_nr = src->reg.nr; |
| 3087 | instr->bits3.da16.src1_vert_stride = src->reg.vstride; |
| 3088 | instr->bits3.da16.src1_negate = src->reg.negate; |
| 3089 | instr->bits3.da16.src1_abs = src->reg.abs; |
| 3090 | instr->bits3.da16.src1_swz_x = BRW_GET_SWZ(SWIZZLE(src->reg), 0); |
| 3091 | instr->bits3.da16.src1_swz_y = BRW_GET_SWZ(SWIZZLE(src->reg), 1); |
| 3092 | instr->bits3.da16.src1_swz_z = BRW_GET_SWZ(SWIZZLE(src->reg), 2); |
| 3093 | instr->bits3.da16.src1_swz_w = BRW_GET_SWZ(SWIZZLE(src->reg), 3); |
| 3094 | instr->bits3.da16.src1_address_mode = src->reg.address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3095 | } |
| 3096 | } else { |
| 3097 | if (instr->header.access_mode == BRW_ALIGN_1) { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3098 | instr->bits3.ia1.src1_indirect_offset = src->reg.dw1.bits.indirect_offset; |
| 3099 | instr->bits3.ia1.src1_subreg_nr = get_indirect_subreg_address(src->reg.subnr); |
| 3100 | instr->bits3.ia1.src1_abs = src->reg.abs; |
| 3101 | instr->bits3.ia1.src1_negate = src->reg.negate; |
| 3102 | instr->bits3.ia1.src1_address_mode = src->reg.address_mode; |
| 3103 | instr->bits3.ia1.src1_horiz_stride = src->reg.hstride; |
| 3104 | instr->bits3.ia1.src1_width = src->reg.width; |
| 3105 | instr->bits3.ia1.src1_vert_stride = src->reg.vstride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3106 | } else { |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3107 | instr->bits3.ia16.src1_swz_x = BRW_GET_SWZ(SWIZZLE(src->reg), 0); |
| 3108 | instr->bits3.ia16.src1_swz_y = BRW_GET_SWZ(SWIZZLE(src->reg), 1); |
| 3109 | instr->bits3.ia16.src1_swz_z = BRW_GET_SWZ(SWIZZLE(src->reg), 2); |
| 3110 | instr->bits3.ia16.src1_swz_w = BRW_GET_SWZ(SWIZZLE(src->reg), 3); |
| 3111 | instr->bits3.ia16.src1_indirect_offset = (src->reg.dw1.bits.indirect_offset >> 4); /* half register aligned */ |
| 3112 | instr->bits3.ia16.src1_subreg_nr = get_indirect_subreg_address(src->reg.subnr); |
| 3113 | instr->bits3.ia16.src1_abs = src->reg.abs; |
| 3114 | instr->bits3.ia16.src1_negate = src->reg.negate; |
| 3115 | instr->bits3.ia16.src1_address_mode = src->reg.address_mode; |
| 3116 | instr->bits3.ia16.src1_vert_stride = src->reg.vstride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3117 | } |
| 3118 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3119 | |
| 3120 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3121 | } |
| 3122 | |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3123 | /* convert 2-src reg type to 3-src reg type |
| 3124 | * |
| 3125 | * 2-src reg type: |
| 3126 | * 000=UD 001=D 010=UW 011=W 100=UB 101=B 110=DF 111=F |
| 3127 | * |
| 3128 | * 3-src reg type: |
| 3129 | * 00=F 01=D 10=UD 11=DF |
| 3130 | */ |
| 3131 | static int reg_type_2_to_3(int reg_type) |
| 3132 | { |
| 3133 | int r = 0; |
| 3134 | switch(reg_type) { |
| 3135 | case 7: r = 0; break; |
| 3136 | case 1: r = 1; break; |
| 3137 | case 0: r = 2; break; |
| 3138 | // TODO: supporting DF |
| 3139 | } |
| 3140 | return r; |
| 3141 | } |
| 3142 | |
| 3143 | int set_instruction_dest_three_src(struct brw_instruction *instr, |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3144 | struct brw_reg *dest) |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3145 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3146 | instr->bits1.da3src.dest_reg_file = dest->file; |
| 3147 | instr->bits1.da3src.dest_reg_nr = dest->nr; |
| 3148 | instr->bits1.da3src.dest_subreg_nr = get_subreg_address(dest->file, dest->type, dest->subnr, dest->address_mode) / 4; // in DWORD |
| 3149 | instr->bits1.da3src.dest_writemask = dest->dw1.bits.writemask; |
| 3150 | instr->bits1.da3src.dest_reg_type = reg_type_2_to_3(dest->type); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3151 | return 0; |
| 3152 | } |
| 3153 | |
| 3154 | int set_instruction_src0_three_src(struct brw_instruction *instr, |
| 3155 | struct src_operand *src) |
| 3156 | { |
| 3157 | if (advanced_flag) { |
| 3158 | reset_instruction_src_region(instr, src); |
| 3159 | } |
| 3160 | // TODO: supporting src0 swizzle, src0 modifier, src0 rep_ctrl |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3161 | instr->bits1.da3src.src_reg_type = reg_type_2_to_3(src->reg.type); |
| 3162 | instr->bits2.da3src.src0_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode) / 4; // in DWORD |
| 3163 | instr->bits2.da3src.src0_reg_nr = src->reg.nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3164 | return 0; |
| 3165 | } |
| 3166 | |
| 3167 | int set_instruction_src1_three_src(struct brw_instruction *instr, |
| 3168 | struct src_operand *src) |
| 3169 | { |
| 3170 | if (advanced_flag) { |
| 3171 | reset_instruction_src_region(instr, src); |
| 3172 | } |
| 3173 | // TODO: supporting src1 swizzle, src1 modifier, src1 rep_ctrl |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3174 | int v = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode) / 4; // in DWORD |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3175 | instr->bits2.da3src.src1_subreg_nr_low = v % 4; // lower 2 bits |
| 3176 | instr->bits3.da3src.src1_subreg_nr_high = v / 4; // highest bit |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3177 | instr->bits3.da3src.src1_reg_nr = src->reg.nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3178 | return 0; |
| 3179 | } |
| 3180 | |
| 3181 | int set_instruction_src2_three_src(struct brw_instruction *instr, |
| 3182 | struct src_operand *src) |
| 3183 | { |
| 3184 | if (advanced_flag) { |
| 3185 | reset_instruction_src_region(instr, src); |
| 3186 | } |
| 3187 | // TODO: supporting src2 swizzle, src2 modifier, src2 rep_ctrl |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3188 | instr->bits3.da3src.src2_subreg_nr = get_subreg_address(src->reg.file, src->reg.type, src->reg.subnr, src->reg.address_mode) / 4; // in DWORD |
| 3189 | instr->bits3.da3src.src2_reg_nr = src->reg.nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3190 | return 0; |
| 3191 | } |
| 3192 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3193 | void set_instruction_options(struct brw_instruction *instr, |
| 3194 | struct brw_instruction *options) |
| 3195 | { |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3196 | /* XXX: more instr options */ |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3197 | instr->header.access_mode = options->header.access_mode; |
| 3198 | instr->header.mask_control = options->header.mask_control; |
| 3199 | instr->header.dependency_control = options->header.dependency_control; |
| 3200 | instr->header.compression_control = |
| 3201 | options->header.compression_control; |
| 3202 | } |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3203 | |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 3204 | void set_instruction_predicate(struct brw_instruction *instr, |
| 3205 | struct brw_instruction *predicate) |
| 3206 | { |
| 3207 | instr->header.predicate_control = predicate->header.predicate_control; |
| 3208 | instr->header.predicate_inverse = predicate->header.predicate_inverse; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 3209 | instr->bits2.da1.flag_reg_nr = predicate->bits2.da1.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 3210 | instr->bits2.da1.flag_subreg_nr = predicate->bits2.da1.flag_subreg_nr; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 3211 | } |
| 3212 | |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3213 | void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3214 | int type) |
| 3215 | { |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3216 | *dst = *reg; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3217 | dst->address_mode = BRW_ADDRESS_DIRECT; |
Damien Lespiau | 0375073 | 2013-01-23 20:33:00 +0000 | [diff] [blame] | 3218 | dst->type = type; |
| 3219 | dst->hstride = 1; |
| 3220 | dst->dw1.bits.writemask = BRW_WRITEMASK_XYZW; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3221 | } |
| 3222 | |
Damien Lespiau | b33b881 | 2013-01-23 16:06:49 +0000 | [diff] [blame] | 3223 | void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 3224 | int type) |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3225 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 3226 | memset(src, 0, sizeof(*src)); |
Damien Lespiau | 9d5a87a | 2013-01-23 22:29:23 +0000 | [diff] [blame] | 3227 | src->reg.address_mode = BRW_ADDRESS_DIRECT; |
| 3228 | src->reg.file = reg->file; |
| 3229 | src->reg.type = type; |
| 3230 | src->reg.subnr = reg->subnr; |
| 3231 | src->reg.nr = reg->nr; |
| 3232 | src->reg.vstride = 0; |
| 3233 | src->reg.width = 0; |
| 3234 | src->reg.hstride = 0; |
| 3235 | src->reg.negate = 0; |
| 3236 | src->reg.abs = 0; |
| 3237 | SWIZZLE(src->reg) = BRW_SWIZZLE_NOOP; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3238 | } |