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gerrit-public.fairphone.software / platform / external / libavc / refs/tags/rel/13/fp3/6.A.023.1 / . / decoder / ih264d_api.c
blob: 923c519465e3a0a717935c780d39858feeb56271 [file] [log] [blame]
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1/******************************************************************************
2 *
3 * Copyright (C) 2015 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19*/
20
21/*****************************************************************************/
22/* */
23/* File Name : ih264d_api.c */
24/* */
25/* Description : Has all API related functions */
26/* */
27/* */
28/* List of Functions : api_check_struct_sanity */
29/* ih264d_set_processor */
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]30/* ih264d_create */
31/* ih264d_delete */
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]32/* ih264d_init */
33/* ih264d_map_error */
34/* ih264d_video_decode */
35/* ih264d_get_version */
36/* ih264d_get_display_frame */
37/* ih264d_set_display_frame */
38/* ih264d_set_flush_mode */
39/* ih264d_get_status */
40/* ih264d_get_buf_info */
41/* ih264d_set_params */
42/* ih264d_set_default_params */
43/* ih264d_reset */
44/* ih264d_ctl */
45/* ih264d_rel_display_frame */
46/* ih264d_set_degrade */
47/* ih264d_get_frame_dimensions */
48/* ih264d_set_num_cores */
49/* ih264d_fill_output_struct_from_context */
50/* ih264d_api_function */
51/* */
52/* Issues / Problems : None */
53/* */
54/* Revision History : */
55/* */
56/* DD MM YYYY Author(s) Changes (Describe the changes made) */
57/* 14 10 2008 100356(SKV) Draft */
58/* */
59/*****************************************************************************/
60#include "ih264_typedefs.h"
61#include "ih264_macros.h"
62#include "ih264_platform_macros.h"
63#include "ih264d_tables.h"
64#include "iv.h"
65#include "ivd.h"
66#include "ih264d.h"
67#include "ih264d_defs.h"
68
69#include <string.h>
70#include <limits.h>
71#include <stddef.h>
72
73#include "ih264d_inter_pred.h"
74
75#include "ih264d_structs.h"
76#include "ih264d_nal.h"
77#include "ih264d_error_handler.h"
78
79#include "ih264d_defs.h"
80
81#include "ithread.h"
82#include "ih264d_parse_slice.h"
83#include "ih264d_function_selector.h"
84#include "ih264_error.h"
85#include "ih264_disp_mgr.h"
86#include "ih264_buf_mgr.h"
87#include "ih264d_deblocking.h"
88#include "ih264d_parse_cavlc.h"
89#include "ih264d_parse_cabac.h"
90#include "ih264d_utils.h"
91#include "ih264d_format_conv.h"
92#include "ih264d_parse_headers.h"
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]93#include "ih264d_thread_compute_bs.h"
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]94#include <assert.h>
95
96
97/*********************/
98/* Codec Versioning */
99/*********************/
100//Move this to where it is used
101#define CODEC_NAME "H264VDEC"
102#define CODEC_RELEASE_TYPE "production"
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]103#define CODEC_RELEASE_VER "05.00"
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]104#define CODEC_VENDOR "ITTIAM"
105#define MAXVERSION_STRLEN 511
Dan Willemsend8383dc2019-08-27 19:47:33 -0700[diff] [blame]106#ifdef ANDROID
Dan Willemsen1c01bc12015-10-27 17:52:13 -0700[diff] [blame]107#define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \
108 snprintf(version_string, MAXVERSION_STRLEN, \
109 "@(#)Id:%s_%s Ver:%s Released by %s", \
110 codec_name, codec_release_type, codec_release_ver, codec_vendor)
111#else
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]112#define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \
Martin Storsjo85a43d22015-05-20 00:12:28 +0300[diff] [blame]113 snprintf(version_string, MAXVERSION_STRLEN, \
114 "@(#)Id:%s_%s Ver:%s Released by %s Build: %s @ %s", \
115 codec_name, codec_release_type, codec_release_ver, codec_vendor, __DATE__, __TIME__)
Dan Willemsen1c01bc12015-10-27 17:52:13 -0700[diff] [blame]116#endif
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]117
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]118
119#define MIN_IN_BUFS 1
120#define MIN_OUT_BUFS_420 3
121#define MIN_OUT_BUFS_422ILE 1
122#define MIN_OUT_BUFS_RGB565 1
123#define MIN_OUT_BUFS_420SP 2
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]124
125#define NUM_FRAMES_LIMIT_ENABLED 0
126
127#if NUM_FRAMES_LIMIT_ENABLED
128#define NUM_FRAMES_LIMIT 10000
129#else
130#define NUM_FRAMES_LIMIT 0x7FFFFFFF
131#endif
132
133
134UWORD32 ih264d_get_extra_mem_external(UWORD32 width, UWORD32 height);
135WORD32 ih264d_get_frame_dimensions(iv_obj_t *dec_hdl,
136 void *pv_api_ip,
137 void *pv_api_op);
Harish Mahendrakard5953ce2016-04-26 16:20:31 +0530[diff] [blame]138WORD32 ih264d_get_vui_params(iv_obj_t *dec_hdl,
139 void *pv_api_ip,
140 void *pv_api_op);
141
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]142WORD32 ih264d_get_sei_mdcv_params(iv_obj_t *dec_hdl,
143 void *pv_api_ip,
144 void *pv_api_op);
145
146WORD32 ih264d_get_sei_cll_params(iv_obj_t *dec_hdl,
147 void *pv_api_ip,
148 void *pv_api_op);
149
150WORD32 ih264d_get_sei_ave_params(iv_obj_t *dec_hdl,
151 void *pv_api_ip,
152 void *pv_api_op);
153
154WORD32 ih264d_get_sei_ccv_params(iv_obj_t *dec_hdl,
155 void *pv_api_ip,
156 void *pv_api_op);
157
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]158WORD32 ih264d_set_num_cores(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op);
159
160WORD32 ih264d_deblock_display(dec_struct_t *ps_dec);
161
162void ih264d_signal_decode_thread(dec_struct_t *ps_dec);
163
164void ih264d_signal_bs_deblk_thread(dec_struct_t *ps_dec);
165void ih264d_decode_picture_thread(dec_struct_t *ps_dec);
166
167WORD32 ih264d_set_degrade(iv_obj_t *ps_codec_obj,
168 void *pv_api_ip,
169 void *pv_api_op);
170
171void ih264d_fill_output_struct_from_context(dec_struct_t *ps_dec,
172 ivd_video_decode_op_t *ps_dec_op);
173
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]174/*!
175 **************************************************************************
176 * \if Function name : ih264d_export_sei_params \endif
177 *
178 * \brief
179 * Exports sei params from decoder to application.
180 *
181 * \return
182 * 0 on Success and error code otherwise
183 **************************************************************************
184 */
185
186void ih264d_export_sei_params(ivd_sei_decode_op_t *ps_sei_decode_op, dec_struct_t *ps_dec)
187{
188 WORD32 i4_status = IV_SUCCESS;
189 sei *ps_sei = (sei *)ps_dec->pv_disp_sei_params;
190
191 i4_status = ih264d_export_sei_mdcv_params(ps_sei_decode_op, ps_sei, &ps_dec->s_sei_export);
192 i4_status = ih264d_export_sei_cll_params(ps_sei_decode_op, ps_sei, &ps_dec->s_sei_export);
193 i4_status = ih264d_export_sei_ave_params(ps_sei_decode_op, ps_sei, &ps_dec->s_sei_export);
194 i4_status = ih264d_export_sei_ccv_params(ps_sei_decode_op, ps_sei, &ps_dec->s_sei_export);
195
196 UNUSED(i4_status);
197}
198
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]199static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
200 void *pv_api_ip,
201 void *pv_api_op)
202{
203 IVD_API_COMMAND_TYPE_T e_cmd;
204 UWORD32 *pu4_api_ip;
205 UWORD32 *pu4_api_op;
206 UWORD32 i, j;
207
208 if(NULL == pv_api_op)
209 return (IV_FAIL);
210
211 if(NULL == pv_api_ip)
212 return (IV_FAIL);
213
214 pu4_api_ip = (UWORD32 *)pv_api_ip;
215 pu4_api_op = (UWORD32 *)pv_api_op;
216 e_cmd = *(pu4_api_ip + 1);
217
218 /* error checks on handle */
219 switch((WORD32)e_cmd)
220 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]221 case IVD_CMD_CREATE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]222 break;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]223
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]224 case IVD_CMD_REL_DISPLAY_FRAME:
225 case IVD_CMD_SET_DISPLAY_FRAME:
226 case IVD_CMD_GET_DISPLAY_FRAME:
227 case IVD_CMD_VIDEO_DECODE:
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]228 case IVD_CMD_DELETE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]229 case IVD_CMD_VIDEO_CTL:
230 if(ps_handle == NULL)
231 {
232 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
233 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
234 return IV_FAIL;
235 }
236
237 if(ps_handle->u4_size != sizeof(iv_obj_t))
238 {
239 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
240 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
241 return IV_FAIL;
242 }
243
244 if(ps_handle->pv_fxns != ih264d_api_function)
245 {
246 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
247 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
248 return IV_FAIL;
249 }
250
251 if(ps_handle->pv_codec_handle == NULL)
252 {
253 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
254 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
255 return IV_FAIL;
256 }
257 break;
258 default:
259 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
260 *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
261 return IV_FAIL;
262 }
263
264 switch((WORD32)e_cmd)
265 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]266 case IVD_CMD_CREATE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]267 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]268 ih264d_create_ip_t *ps_ip = (ih264d_create_ip_t *)pv_api_ip;
269 ih264d_create_op_t *ps_op = (ih264d_create_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]270
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]271
272 ps_op->s_ivd_create_op_t.u4_error_code = 0;
273
274 if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ih264d_create_ip_t))
275 || (ps_ip->s_ivd_create_ip_t.u4_size
276 < sizeof(ivd_create_ip_t)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]277 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]278 ps_op->s_ivd_create_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]279 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]280 ps_op->s_ivd_create_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]281 IVD_IP_API_STRUCT_SIZE_INCORRECT;
282 H264_DEC_DEBUG_PRINT("\n");
283 return (IV_FAIL);
284 }
285
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]286 if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ih264d_create_op_t))
287 && (ps_op->s_ivd_create_op_t.u4_size
288 != sizeof(ivd_create_op_t)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]289 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]290 ps_op->s_ivd_create_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]291 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]292 ps_op->s_ivd_create_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]293 IVD_OP_API_STRUCT_SIZE_INCORRECT;
294 H264_DEC_DEBUG_PRINT("\n");
295 return (IV_FAIL);
296 }
297
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]298
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]299 if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
300 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]301 != IV_YUV_422ILE)
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]302 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]303 != IV_RGB_565)
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]304 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]305 != IV_YUV_420SP_UV)
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]306 && (ps_ip->s_ivd_create_ip_t.e_output_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]307 != IV_YUV_420SP_VU))
308 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]309 ps_op->s_ivd_create_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]310 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]311 ps_op->s_ivd_create_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]312 IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
313 H264_DEC_DEBUG_PRINT("\n");
314 return (IV_FAIL);
315 }
316
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]317 }
318 break;
319
320 case IVD_CMD_GET_DISPLAY_FRAME:
321 {
322 ih264d_get_display_frame_ip_t *ps_ip =
323 (ih264d_get_display_frame_ip_t *)pv_api_ip;
324 ih264d_get_display_frame_op_t *ps_op =
325 (ih264d_get_display_frame_op_t *)pv_api_op;
326
327 ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
328
329 if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
330 != sizeof(ih264d_get_display_frame_ip_t))
331 && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
332 != sizeof(ivd_get_display_frame_ip_t)))
333 {
334 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
335 << IVD_UNSUPPORTEDPARAM;
336 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
337 IVD_IP_API_STRUCT_SIZE_INCORRECT;
338 return (IV_FAIL);
339 }
340
341 if((ps_op->s_ivd_get_display_frame_op_t.u4_size
342 != sizeof(ih264d_get_display_frame_op_t))
343 && (ps_op->s_ivd_get_display_frame_op_t.u4_size
344 != sizeof(ivd_get_display_frame_op_t)))
345 {
346 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
347 << IVD_UNSUPPORTEDPARAM;
348 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
349 IVD_OP_API_STRUCT_SIZE_INCORRECT;
350 return (IV_FAIL);
351 }
352 }
353 break;
354
355 case IVD_CMD_REL_DISPLAY_FRAME:
356 {
357 ih264d_rel_display_frame_ip_t *ps_ip =
358 (ih264d_rel_display_frame_ip_t *)pv_api_ip;
359 ih264d_rel_display_frame_op_t *ps_op =
360 (ih264d_rel_display_frame_op_t *)pv_api_op;
361
362 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
363
364 if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
365 != sizeof(ih264d_rel_display_frame_ip_t))
366 && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
367 != sizeof(ivd_rel_display_frame_ip_t)))
368 {
369 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
370 << IVD_UNSUPPORTEDPARAM;
371 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
372 IVD_IP_API_STRUCT_SIZE_INCORRECT;
373 return (IV_FAIL);
374 }
375
376 if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
377 != sizeof(ih264d_rel_display_frame_op_t))
378 && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
379 != sizeof(ivd_rel_display_frame_op_t)))
380 {
381 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
382 << IVD_UNSUPPORTEDPARAM;
383 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
384 IVD_OP_API_STRUCT_SIZE_INCORRECT;
385 return (IV_FAIL);
386 }
387
388 }
389 break;
390
391 case IVD_CMD_SET_DISPLAY_FRAME:
392 {
393 ih264d_set_display_frame_ip_t *ps_ip =
394 (ih264d_set_display_frame_ip_t *)pv_api_ip;
395 ih264d_set_display_frame_op_t *ps_op =
396 (ih264d_set_display_frame_op_t *)pv_api_op;
397 UWORD32 j;
398
399 ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
400
401 if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
402 != sizeof(ih264d_set_display_frame_ip_t))
403 && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
404 != sizeof(ivd_set_display_frame_ip_t)))
405 {
406 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
407 << IVD_UNSUPPORTEDPARAM;
408 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
409 IVD_IP_API_STRUCT_SIZE_INCORRECT;
410 return (IV_FAIL);
411 }
412
413 if((ps_op->s_ivd_set_display_frame_op_t.u4_size
414 != sizeof(ih264d_set_display_frame_op_t))
415 && (ps_op->s_ivd_set_display_frame_op_t.u4_size
416 != sizeof(ivd_set_display_frame_op_t)))
417 {
418 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
419 << IVD_UNSUPPORTEDPARAM;
420 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
421 IVD_OP_API_STRUCT_SIZE_INCORRECT;
422 return (IV_FAIL);
423 }
424
425 if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
426 {
427 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
428 << IVD_UNSUPPORTEDPARAM;
429 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
430 IVD_DISP_FRM_ZERO_OP_BUFS;
431 return IV_FAIL;
432 }
433
434 for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
435 j++)
436 {
437 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
438 == 0)
439 {
440 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
441 << IVD_UNSUPPORTEDPARAM;
442 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
443 IVD_DISP_FRM_ZERO_OP_BUFS;
444 return IV_FAIL;
445 }
446
447 for(i = 0;
448 i
449 < ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
450 i++)
451 {
452 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
453 == NULL)
454 {
455 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
456 << IVD_UNSUPPORTEDPARAM;
457 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
458 IVD_DISP_FRM_OP_BUF_NULL;
459 return IV_FAIL;
460 }
461
462 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
463 == 0)
464 {
465 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
466 << IVD_UNSUPPORTEDPARAM;
467 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
468 IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
469 return IV_FAIL;
470 }
471 }
472 }
473 }
474 break;
475
476 case IVD_CMD_VIDEO_DECODE:
477 {
478 ih264d_video_decode_ip_t *ps_ip =
479 (ih264d_video_decode_ip_t *)pv_api_ip;
480 ih264d_video_decode_op_t *ps_op =
481 (ih264d_video_decode_op_t *)pv_api_op;
482
483 H264_DEC_DEBUG_PRINT("The input bytes is: %d",
484 ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
485 ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
486
487 if(ps_ip->s_ivd_video_decode_ip_t.u4_size
488 != sizeof(ih264d_video_decode_ip_t)&&
489 ps_ip->s_ivd_video_decode_ip_t.u4_size != offsetof(ivd_video_decode_ip_t, s_out_buffer))
490 {
491 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
492 << IVD_UNSUPPORTEDPARAM;
493 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
494 IVD_IP_API_STRUCT_SIZE_INCORRECT;
495 return (IV_FAIL);
496 }
497
498 if(ps_op->s_ivd_video_decode_op_t.u4_size
499 != sizeof(ih264d_video_decode_op_t)&&
500 ps_op->s_ivd_video_decode_op_t.u4_size != offsetof(ivd_video_decode_op_t, u4_output_present))
501 {
502 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
503 << IVD_UNSUPPORTEDPARAM;
504 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
505 IVD_OP_API_STRUCT_SIZE_INCORRECT;
506 return (IV_FAIL);
507 }
508
509 }
510 break;
511
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]512 case IVD_CMD_DELETE:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]513 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]514 ih264d_delete_ip_t *ps_ip =
515 (ih264d_delete_ip_t *)pv_api_ip;
516 ih264d_delete_op_t *ps_op =
517 (ih264d_delete_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]518
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]519 ps_op->s_ivd_delete_op_t.u4_error_code = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]520
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]521 if(ps_ip->s_ivd_delete_ip_t.u4_size
522 != sizeof(ih264d_delete_ip_t))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]523 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]524 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]525 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]526 ps_op->s_ivd_delete_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]527 IVD_IP_API_STRUCT_SIZE_INCORRECT;
528 return (IV_FAIL);
529 }
530
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]531 if(ps_op->s_ivd_delete_op_t.u4_size
532 != sizeof(ih264d_delete_op_t))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]533 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]534 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]535 << IVD_UNSUPPORTEDPARAM;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]536 ps_op->s_ivd_delete_op_t.u4_error_code |=
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]537 IVD_OP_API_STRUCT_SIZE_INCORRECT;
538 return (IV_FAIL);
539 }
540
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]541 }
542 break;
543
544 case IVD_CMD_VIDEO_CTL:
545 {
546 UWORD32 *pu4_ptr_cmd;
547 UWORD32 sub_command;
548
549 pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
550 pu4_ptr_cmd += 2;
551 sub_command = *pu4_ptr_cmd;
552
553 switch(sub_command)
554 {
555 case IVD_CMD_CTL_SETPARAMS:
556 {
557 ih264d_ctl_set_config_ip_t *ps_ip;
558 ih264d_ctl_set_config_op_t *ps_op;
559 ps_ip = (ih264d_ctl_set_config_ip_t *)pv_api_ip;
560 ps_op = (ih264d_ctl_set_config_op_t *)pv_api_op;
561
562 if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
563 != sizeof(ih264d_ctl_set_config_ip_t))
564 {
565 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
566 << IVD_UNSUPPORTEDPARAM;
567 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
568 IVD_IP_API_STRUCT_SIZE_INCORRECT;
569 return IV_FAIL;
570 }
571 }
572 //no break; is needed here
573 case IVD_CMD_CTL_SETDEFAULT:
574 {
575 ih264d_ctl_set_config_op_t *ps_op;
576 ps_op = (ih264d_ctl_set_config_op_t *)pv_api_op;
577 if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
578 != sizeof(ih264d_ctl_set_config_op_t))
579 {
580 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
581 << IVD_UNSUPPORTEDPARAM;
582 ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
583 IVD_OP_API_STRUCT_SIZE_INCORRECT;
584 return IV_FAIL;
585 }
586 }
587 break;
588
589 case IVD_CMD_CTL_GETPARAMS:
590 {
591 ih264d_ctl_getstatus_ip_t *ps_ip;
592 ih264d_ctl_getstatus_op_t *ps_op;
593
594 ps_ip = (ih264d_ctl_getstatus_ip_t *)pv_api_ip;
595 ps_op = (ih264d_ctl_getstatus_op_t *)pv_api_op;
596 if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
597 != sizeof(ih264d_ctl_getstatus_ip_t))
598 {
599 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
600 << IVD_UNSUPPORTEDPARAM;
601 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
602 IVD_IP_API_STRUCT_SIZE_INCORRECT;
603 return IV_FAIL;
604 }
605 if(ps_op->s_ivd_ctl_getstatus_op_t.u4_size
606 != sizeof(ih264d_ctl_getstatus_op_t))
607 {
608 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
609 << IVD_UNSUPPORTEDPARAM;
610 ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
611 IVD_OP_API_STRUCT_SIZE_INCORRECT;
612 return IV_FAIL;
613 }
614 }
615 break;
616
617 case IVD_CMD_CTL_GETBUFINFO:
618 {
619 ih264d_ctl_getbufinfo_ip_t *ps_ip;
620 ih264d_ctl_getbufinfo_op_t *ps_op;
621 ps_ip = (ih264d_ctl_getbufinfo_ip_t *)pv_api_ip;
622 ps_op = (ih264d_ctl_getbufinfo_op_t *)pv_api_op;
623
624 if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
625 != sizeof(ih264d_ctl_getbufinfo_ip_t))
626 {
627 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
628 << IVD_UNSUPPORTEDPARAM;
629 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
630 IVD_IP_API_STRUCT_SIZE_INCORRECT;
631 return IV_FAIL;
632 }
633 if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
634 != sizeof(ih264d_ctl_getbufinfo_op_t))
635 {
636 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
637 << IVD_UNSUPPORTEDPARAM;
638 ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
639 IVD_OP_API_STRUCT_SIZE_INCORRECT;
640 return IV_FAIL;
641 }
642 }
643 break;
644
645 case IVD_CMD_CTL_GETVERSION:
646 {
647 ih264d_ctl_getversioninfo_ip_t *ps_ip;
648 ih264d_ctl_getversioninfo_op_t *ps_op;
649 ps_ip = (ih264d_ctl_getversioninfo_ip_t *)pv_api_ip;
650 ps_op = (ih264d_ctl_getversioninfo_op_t *)pv_api_op;
651 if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
652 != sizeof(ih264d_ctl_getversioninfo_ip_t))
653 {
654 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
655 << IVD_UNSUPPORTEDPARAM;
656 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
657 IVD_IP_API_STRUCT_SIZE_INCORRECT;
658 return IV_FAIL;
659 }
660 if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
661 != sizeof(ih264d_ctl_getversioninfo_op_t))
662 {
663 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
664 << IVD_UNSUPPORTEDPARAM;
665 ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
666 IVD_OP_API_STRUCT_SIZE_INCORRECT;
667 return IV_FAIL;
668 }
669 }
670 break;
671
672 case IVD_CMD_CTL_FLUSH:
673 {
674 ih264d_ctl_flush_ip_t *ps_ip;
675 ih264d_ctl_flush_op_t *ps_op;
676 ps_ip = (ih264d_ctl_flush_ip_t *)pv_api_ip;
677 ps_op = (ih264d_ctl_flush_op_t *)pv_api_op;
678 if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
679 != sizeof(ih264d_ctl_flush_ip_t))
680 {
681 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
682 << IVD_UNSUPPORTEDPARAM;
683 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
684 IVD_IP_API_STRUCT_SIZE_INCORRECT;
685 return IV_FAIL;
686 }
687 if(ps_op->s_ivd_ctl_flush_op_t.u4_size
688 != sizeof(ih264d_ctl_flush_op_t))
689 {
690 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
691 << IVD_UNSUPPORTEDPARAM;
692 ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
693 IVD_OP_API_STRUCT_SIZE_INCORRECT;
694 return IV_FAIL;
695 }
696 }
697 break;
698
699 case IVD_CMD_CTL_RESET:
700 {
701 ih264d_ctl_reset_ip_t *ps_ip;
702 ih264d_ctl_reset_op_t *ps_op;
703 ps_ip = (ih264d_ctl_reset_ip_t *)pv_api_ip;
704 ps_op = (ih264d_ctl_reset_op_t *)pv_api_op;
705 if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
706 != sizeof(ih264d_ctl_reset_ip_t))
707 {
708 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
709 << IVD_UNSUPPORTEDPARAM;
710 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
711 IVD_IP_API_STRUCT_SIZE_INCORRECT;
712 return IV_FAIL;
713 }
714 if(ps_op->s_ivd_ctl_reset_op_t.u4_size
715 != sizeof(ih264d_ctl_reset_op_t))
716 {
717 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
718 << IVD_UNSUPPORTEDPARAM;
719 ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
720 IVD_OP_API_STRUCT_SIZE_INCORRECT;
721 return IV_FAIL;
722 }
723 }
724 break;
725
726 case IH264D_CMD_CTL_DEGRADE:
727 {
728 ih264d_ctl_degrade_ip_t *ps_ip;
729 ih264d_ctl_degrade_op_t *ps_op;
730
731 ps_ip = (ih264d_ctl_degrade_ip_t *)pv_api_ip;
732 ps_op = (ih264d_ctl_degrade_op_t *)pv_api_op;
733
734 if(ps_ip->u4_size != sizeof(ih264d_ctl_degrade_ip_t))
735 {
736 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
737 ps_op->u4_error_code |=
738 IVD_IP_API_STRUCT_SIZE_INCORRECT;
739 return IV_FAIL;
740 }
741
742 if(ps_op->u4_size != sizeof(ih264d_ctl_degrade_op_t))
743 {
744 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
745 ps_op->u4_error_code |=
746 IVD_OP_API_STRUCT_SIZE_INCORRECT;
747 return IV_FAIL;
748 }
749
750 if((ps_ip->i4_degrade_pics < 0)
751 || (ps_ip->i4_degrade_pics > 4)
752 || (ps_ip->i4_nondegrade_interval < 0)
753 || (ps_ip->i4_degrade_type < 0)
754 || (ps_ip->i4_degrade_type > 15))
755 {
756 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
757 return IV_FAIL;
758 }
759
760 break;
761 }
762
763 case IH264D_CMD_CTL_GET_BUFFER_DIMENSIONS:
764 {
765 ih264d_ctl_get_frame_dimensions_ip_t *ps_ip;
766 ih264d_ctl_get_frame_dimensions_op_t *ps_op;
767
768 ps_ip = (ih264d_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
769 ps_op = (ih264d_ctl_get_frame_dimensions_op_t *)pv_api_op;
770
771 if(ps_ip->u4_size
772 != sizeof(ih264d_ctl_get_frame_dimensions_ip_t))
773 {
774 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
775 ps_op->u4_error_code |=
776 IVD_IP_API_STRUCT_SIZE_INCORRECT;
777 return IV_FAIL;
778 }
779
780 if(ps_op->u4_size
781 != sizeof(ih264d_ctl_get_frame_dimensions_op_t))
782 {
783 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
784 ps_op->u4_error_code |=
785 IVD_OP_API_STRUCT_SIZE_INCORRECT;
786 return IV_FAIL;
787 }
788
789 break;
790 }
Harish Mahendrakard5953ce2016-04-26 16:20:31 +0530[diff] [blame]791 case IH264D_CMD_CTL_GET_VUI_PARAMS:
792 {
793 ih264d_ctl_get_vui_params_ip_t *ps_ip;
794 ih264d_ctl_get_vui_params_op_t *ps_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]795
Harish Mahendrakard5953ce2016-04-26 16:20:31 +0530[diff] [blame]796 ps_ip =
797 (ih264d_ctl_get_vui_params_ip_t *)pv_api_ip;
798 ps_op =
799 (ih264d_ctl_get_vui_params_op_t *)pv_api_op;
800
801 if(ps_ip->u4_size
802 != sizeof(ih264d_ctl_get_vui_params_ip_t))
803 {
804 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
805 ps_op->u4_error_code |=
806 IVD_IP_API_STRUCT_SIZE_INCORRECT;
807 return IV_FAIL;
808 }
809
810 if(ps_op->u4_size
811 != sizeof(ih264d_ctl_get_vui_params_op_t))
812 {
813 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
814 ps_op->u4_error_code |=
815 IVD_OP_API_STRUCT_SIZE_INCORRECT;
816 return IV_FAIL;
817 }
818
819 break;
820 }
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]821 case IH264D_CMD_CTL_GET_SEI_MDCV_PARAMS:
822 {
823 ih264d_ctl_get_sei_mdcv_params_ip_t *ps_ip;
824 ih264d_ctl_get_sei_mdcv_params_op_t *ps_op;
825
826 ps_ip = (ih264d_ctl_get_sei_mdcv_params_ip_t *)pv_api_ip;
827 ps_op = (ih264d_ctl_get_sei_mdcv_params_op_t *)pv_api_op;
828
829 if(ps_ip->u4_size != sizeof(ih264d_ctl_get_sei_mdcv_params_ip_t))
830 {
831 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
832 ps_op->u4_error_code |=
833 IVD_IP_API_STRUCT_SIZE_INCORRECT;
834 return IV_FAIL;
835 }
836
837 if(ps_op->u4_size != sizeof(ih264d_ctl_get_sei_mdcv_params_op_t))
838 {
839 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
840 ps_op->u4_error_code |=
841 IVD_OP_API_STRUCT_SIZE_INCORRECT;
842 return IV_FAIL;
843 }
844
845 break;
846 }
847
848 case IH264D_CMD_CTL_GET_SEI_CLL_PARAMS:
849 {
850 ih264d_ctl_get_sei_cll_params_ip_t *ps_ip;
851 ih264d_ctl_get_sei_cll_params_op_t *ps_op;
852
853 ps_ip = (ih264d_ctl_get_sei_cll_params_ip_t *)pv_api_ip;
854 ps_op = (ih264d_ctl_get_sei_cll_params_op_t *)pv_api_op;
855
856 if(ps_ip->u4_size != sizeof(ih264d_ctl_get_sei_cll_params_ip_t))
857 {
858 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
859 ps_op->u4_error_code |=
860 IVD_IP_API_STRUCT_SIZE_INCORRECT;
861 return IV_FAIL;
862 }
863
864 if(ps_op->u4_size != sizeof(ih264d_ctl_get_sei_cll_params_op_t))
865 {
866 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
867 ps_op->u4_error_code |=
868 IVD_OP_API_STRUCT_SIZE_INCORRECT;
869 return IV_FAIL;
870 }
871
872 break;
873 }
874
875 case IH264D_CMD_CTL_GET_SEI_AVE_PARAMS:
876 {
877 ih264d_ctl_get_sei_ave_params_ip_t *ps_ip;
878 ih264d_ctl_get_sei_ave_params_op_t *ps_op;
879
880 ps_ip = (ih264d_ctl_get_sei_ave_params_ip_t *)pv_api_ip;
881 ps_op = (ih264d_ctl_get_sei_ave_params_op_t *)pv_api_op;
882
883 if(ps_ip->u4_size != sizeof(ih264d_ctl_get_sei_ave_params_ip_t))
884 {
885 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
886 ps_op->u4_error_code |=
887 IVD_IP_API_STRUCT_SIZE_INCORRECT;
888 return IV_FAIL;
889 }
890
891 if(ps_op->u4_size != sizeof(ih264d_ctl_get_sei_ave_params_op_t))
892 {
893 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
894 ps_op->u4_error_code |=
895 IVD_OP_API_STRUCT_SIZE_INCORRECT;
896 return IV_FAIL;
897 }
898
899 break;
900 }
901
902 case IH264D_CMD_CTL_GET_SEI_CCV_PARAMS:
903 {
904 ih264d_ctl_get_sei_ccv_params_ip_t *ps_ip;
905 ih264d_ctl_get_sei_ccv_params_op_t *ps_op;
906
907 ps_ip = (ih264d_ctl_get_sei_ccv_params_ip_t *)pv_api_ip;
908 ps_op = (ih264d_ctl_get_sei_ccv_params_op_t *)pv_api_op;
909
910 if(ps_ip->u4_size != sizeof(ih264d_ctl_get_sei_ccv_params_ip_t))
911 {
912 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
913 ps_op->u4_error_code |=
914 IVD_IP_API_STRUCT_SIZE_INCORRECT;
915 return IV_FAIL;
916 }
917
918 if(ps_op->u4_size != sizeof(ih264d_ctl_get_sei_ccv_params_op_t))
919 {
920 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
921 ps_op->u4_error_code |=
922 IVD_OP_API_STRUCT_SIZE_INCORRECT;
923 return IV_FAIL;
924 }
925
926 break;
927 }
928
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]929 case IH264D_CMD_CTL_SET_NUM_CORES:
930 {
931 ih264d_ctl_set_num_cores_ip_t *ps_ip;
932 ih264d_ctl_set_num_cores_op_t *ps_op;
933
934 ps_ip = (ih264d_ctl_set_num_cores_ip_t *)pv_api_ip;
935 ps_op = (ih264d_ctl_set_num_cores_op_t *)pv_api_op;
936
937 if(ps_ip->u4_size != sizeof(ih264d_ctl_set_num_cores_ip_t))
938 {
939 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
940 ps_op->u4_error_code |=
941 IVD_IP_API_STRUCT_SIZE_INCORRECT;
942 return IV_FAIL;
943 }
944
945 if(ps_op->u4_size != sizeof(ih264d_ctl_set_num_cores_op_t))
946 {
947 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
948 ps_op->u4_error_code |=
949 IVD_OP_API_STRUCT_SIZE_INCORRECT;
950 return IV_FAIL;
951 }
952
953 if((ps_ip->u4_num_cores != 1) && (ps_ip->u4_num_cores != 2)
954 && (ps_ip->u4_num_cores != 3)
955 && (ps_ip->u4_num_cores != 4))
956 {
957 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
958 return IV_FAIL;
959 }
960 break;
961 }
962 case IH264D_CMD_CTL_SET_PROCESSOR:
963 {
964 ih264d_ctl_set_processor_ip_t *ps_ip;
965 ih264d_ctl_set_processor_op_t *ps_op;
966
967 ps_ip = (ih264d_ctl_set_processor_ip_t *)pv_api_ip;
968 ps_op = (ih264d_ctl_set_processor_op_t *)pv_api_op;
969
970 if(ps_ip->u4_size != sizeof(ih264d_ctl_set_processor_ip_t))
971 {
972 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
973 ps_op->u4_error_code |=
974 IVD_IP_API_STRUCT_SIZE_INCORRECT;
975 return IV_FAIL;
976 }
977
978 if(ps_op->u4_size != sizeof(ih264d_ctl_set_processor_op_t))
979 {
980 ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
981 ps_op->u4_error_code |=
982 IVD_OP_API_STRUCT_SIZE_INCORRECT;
983 return IV_FAIL;
984 }
985
986 break;
987 }
988 default:
989 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
990 *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
991 return IV_FAIL;
992 break;
993 }
994 }
995 break;
996 }
997
998 return IV_SUCCESS;
999}
1000
1001
1002/**
1003 *******************************************************************************
1004 *
1005 * @brief
1006 * Sets Processor type
1007 *
1008 * @par Description:
1009 * Sets Processor type
1010 *
1011 * @param[in] ps_codec_obj
1012 * Pointer to codec object at API level
1013 *
1014 * @param[in] pv_api_ip
1015 * Pointer to input argument structure
1016 *
1017 * @param[out] pv_api_op
1018 * Pointer to output argument structure
1019 *
1020 * @returns Status
1021 *
1022 * @remarks
1023 *
1024 *
1025 *******************************************************************************
1026 */
1027
1028WORD32 ih264d_set_processor(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
1029{
1030 ih264d_ctl_set_processor_ip_t *ps_ip;
1031 ih264d_ctl_set_processor_op_t *ps_op;
1032 dec_struct_t *ps_codec = (dec_struct_t *)dec_hdl->pv_codec_handle;
1033
1034 ps_ip = (ih264d_ctl_set_processor_ip_t *)pv_api_ip;
1035 ps_op = (ih264d_ctl_set_processor_op_t *)pv_api_op;
1036
1037 ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
1038 ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
1039
1040 ih264d_init_function_ptr(ps_codec);
1041
1042 ps_op->u4_error_code = 0;
1043 return IV_SUCCESS;
1044}
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1045
1046
1047/**************************************************************************
1048 * \if Function name : ih264d_init_decoder \endif
1049 *
1050 *
1051 * \brief
1052 * Initializes the decoder
1053 *
1054 * \param apiVersion : Version of the api being used.
1055 * \param errorHandlingMechanism : Mechanism to be used for errror handling.
1056 * \param postFilteringType: Type of post filtering operation to be used.
1057 * \param uc_outputFormat: Format of the decoded picture [default 4:2:0].
1058 * \param uc_dispBufs: Number of Display Buffers.
1059 * \param p_NALBufAPI: Pointer to NAL Buffer API.
1060 * \param p_DispBufAPI: Pointer to Display Buffer API.
1061 * \param ih264d_dec_mem_manager :Pointer to the function that will be called by decoder
1062 * for memory allocation and freeing.
1063 *
1064 * \return
1065 * 0 on Success and -1 on error
1066 *
1067 **************************************************************************
1068 */
1069void ih264d_init_decoder(void * ps_dec_params)
1070{
1071 dec_struct_t * ps_dec = (dec_struct_t *)ps_dec_params;
1072 dec_slice_params_t *ps_cur_slice;
1073 pocstruct_t *ps_prev_poc, *ps_cur_poc;
Harish Mahendrakar370bd862016-04-21 09:04:37 +0530[diff] [blame]1074 WORD32 size;
1075
1076 size = sizeof(pred_info_t) * 2 * 32;
1077 memset(ps_dec->ps_pred, 0 , size);
1078
1079 size = sizeof(disp_mgr_t);
1080 memset(ps_dec->pv_disp_buf_mgr, 0 , size);
1081
1082 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
1083 memset(ps_dec->pv_pic_buf_mgr, 0, size);
1084
1085 size = sizeof(dec_err_status_t);
1086 memset(ps_dec->ps_dec_err_status, 0, size);
1087
1088 size = sizeof(sei);
1089 memset(ps_dec->ps_sei, 0, size);
1090
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]1091 size = sizeof(sei);
1092 memset(ps_dec->ps_sei_parse, 0, size);
1093
Harish Mahendrakar370bd862016-04-21 09:04:37 +0530[diff] [blame]1094 size = sizeof(dpb_commands_t);
1095 memset(ps_dec->ps_dpb_cmds, 0, size);
1096
1097 size = sizeof(dec_bit_stream_t);
1098 memset(ps_dec->ps_bitstrm, 0, size);
1099
1100 size = sizeof(dec_slice_params_t);
1101 memset(ps_dec->ps_cur_slice, 0, size);
1102
1103 size = MAX(sizeof(dec_seq_params_t), sizeof(dec_pic_params_t));
1104 memset(ps_dec->pv_scratch_sps_pps, 0, size);
1105
1106 size = sizeof(ctxt_inc_mb_info_t);
1107 memset(ps_dec->ps_left_mb_ctxt_info, 0, size);
1108
1109 size = (sizeof(neighbouradd_t) << 2);
1110 memset(ps_dec->ps_left_mvpred_addr, 0 ,size);
1111
1112 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
1113 memset(ps_dec->pv_mv_buf_mgr, 0, size);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1114
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1115 /* Free any dynamic buffers that are allocated */
1116 ih264d_free_dynamic_bufs(ps_dec);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1117
Harish Mahendrakar01da7b52019-10-22 16:01:37 -0700[diff] [blame]1118 {
1119 UWORD8 i;
1120 struct pic_buffer_t *ps_init_dpb;
1121 ps_init_dpb = ps_dec->ps_dpb_mgr->ps_init_dpb[0][0];
1122 for(i = 0; i < 2 * MAX_REF_BUFS; i++)
1123 {
1124 ps_init_dpb->pu1_buf1 = NULL;
1125 ps_init_dpb->u1_long_term_frm_idx = MAX_REF_BUFS + 1;
1126 ps_dec->ps_dpb_mgr->ps_init_dpb[0][i] = ps_init_dpb;
1127 ps_dec->ps_dpb_mgr->ps_mod_dpb[0][i] = ps_init_dpb;
1128 ps_init_dpb++;
1129 }
1130
1131 ps_init_dpb = ps_dec->ps_dpb_mgr->ps_init_dpb[1][0];
1132 for(i = 0; i < 2 * MAX_REF_BUFS; i++)
1133 {
1134 ps_init_dpb->pu1_buf1 = NULL;
1135 ps_init_dpb->u1_long_term_frm_idx = MAX_REF_BUFS + 1;
1136 ps_dec->ps_dpb_mgr->ps_init_dpb[1][i] = ps_init_dpb;
1137 ps_dec->ps_dpb_mgr->ps_mod_dpb[1][i] = ps_init_dpb;
1138 ps_init_dpb++;
1139 }
1140 }
1141
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1142 ps_cur_slice = ps_dec->ps_cur_slice;
1143 ps_dec->init_done = 0;
1144
1145 ps_dec->u4_num_cores = 1;
1146
1147 ps_dec->u2_pic_ht = ps_dec->u2_pic_wd = 0;
1148
1149 ps_dec->u1_separate_parse = DEFAULT_SEPARATE_PARSE;
1150 ps_dec->u4_app_disable_deblk_frm = 0;
1151 ps_dec->i4_degrade_type = 0;
1152 ps_dec->i4_degrade_pics = 0;
1153
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1154 memset(ps_dec->ps_pps, 0,
1155 ((sizeof(dec_pic_params_t)) * MAX_NUM_PIC_PARAMS));
1156 memset(ps_dec->ps_sps, 0,
1157 ((sizeof(dec_seq_params_t)) * MAX_NUM_SEQ_PARAMS));
1158
1159 /* Initialization of function pointers ih264d_deblock_picture function*/
1160
1161 ps_dec->p_DeblockPicture[0] = ih264d_deblock_picture_non_mbaff;
1162 ps_dec->p_DeblockPicture[1] = ih264d_deblock_picture_mbaff;
1163
1164 ps_dec->s_cab_dec_env.pv_codec_handle = ps_dec;
1165
1166 ps_dec->u4_num_fld_in_frm = 0;
1167
1168 ps_dec->ps_dpb_mgr->pv_codec_handle = ps_dec;
1169
1170 /* Initialize the sei validity u4_flag with zero indiacting sei is not valid*/
1171 ps_dec->ps_sei->u1_is_valid = 0;
1172
1173 /* decParams Initializations */
1174 ps_dec->ps_cur_pps = NULL;
1175 ps_dec->ps_cur_sps = NULL;
1176 ps_dec->u1_init_dec_flag = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]1177 ps_dec->u1_first_slice_in_stream = 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1178 ps_dec->u1_last_pic_not_decoded = 0;
1179 ps_dec->u4_app_disp_width = 0;
1180 ps_dec->i4_header_decoded = 0;
1181 ps_dec->u4_total_frames_decoded = 0;
1182
1183 ps_dec->i4_error_code = 0;
Isha Kulkarni34769a52019-01-28 17:43:35 +0530[diff] [blame]1184 ps_dec->i4_content_type = IV_CONTENTTYPE_NA;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1185 ps_dec->ps_cur_slice->u1_mbaff_frame_flag = 0;
1186
1187 ps_dec->ps_dec_err_status->u1_err_flag = ACCEPT_ALL_PICS; //REJECT_PB_PICS;
1188 ps_dec->ps_dec_err_status->u1_cur_pic_type = PIC_TYPE_UNKNOWN;
1189 ps_dec->ps_dec_err_status->u4_frm_sei_sync = SYNC_FRM_DEFAULT;
1190 ps_dec->ps_dec_err_status->u4_cur_frm = INIT_FRAME;
1191 ps_dec->ps_dec_err_status->u1_pic_aud_i = PIC_TYPE_UNKNOWN;
1192
1193 ps_dec->u1_pr_sl_type = 0xFF;
1194 ps_dec->u2_mbx = 0xffff;
1195 ps_dec->u2_mby = 0;
1196 ps_dec->u2_total_mbs_coded = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1197
1198 /* POC initializations */
1199 ps_prev_poc = &ps_dec->s_prev_pic_poc;
1200 ps_cur_poc = &ps_dec->s_cur_pic_poc;
1201 ps_prev_poc->i4_pic_order_cnt_lsb = ps_cur_poc->i4_pic_order_cnt_lsb = 0;
1202 ps_prev_poc->i4_pic_order_cnt_msb = ps_cur_poc->i4_pic_order_cnt_msb = 0;
1203 ps_prev_poc->i4_delta_pic_order_cnt_bottom =
1204 ps_cur_poc->i4_delta_pic_order_cnt_bottom = 0;
1205 ps_prev_poc->i4_delta_pic_order_cnt[0] =
1206 ps_cur_poc->i4_delta_pic_order_cnt[0] = 0;
1207 ps_prev_poc->i4_delta_pic_order_cnt[1] =
1208 ps_cur_poc->i4_delta_pic_order_cnt[1] = 0;
1209 ps_prev_poc->u1_mmco_equalto5 = ps_cur_poc->u1_mmco_equalto5 = 0;
1210 ps_prev_poc->i4_top_field_order_count = ps_cur_poc->i4_top_field_order_count =
1211 0;
1212 ps_prev_poc->i4_bottom_field_order_count =
1213 ps_cur_poc->i4_bottom_field_order_count = 0;
1214 ps_prev_poc->u1_bot_field = ps_cur_poc->u1_bot_field = 0;
1215 ps_prev_poc->u1_mmco_equalto5 = ps_cur_poc->u1_mmco_equalto5 = 0;
1216 ps_prev_poc->i4_prev_frame_num_ofst = ps_cur_poc->i4_prev_frame_num_ofst = 0;
1217 ps_cur_slice->u1_mmco_equalto5 = 0;
1218 ps_cur_slice->u2_frame_num = 0;
1219
1220 ps_dec->i4_max_poc = 0;
1221 ps_dec->i4_prev_max_display_seq = 0;
1222 ps_dec->u1_recon_mb_grp = 4;
Rakesh Kumarfe5a6ad2019-03-07 12:30:09 +0530[diff] [blame]1223 ps_dec->i4_reorder_depth = -1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1224
1225 /* Field PIC initializations */
1226 ps_dec->u1_second_field = 0;
1227 ps_dec->s_prev_seq_params.u1_eoseq_pending = 0;
1228
1229 /* Set the cropping parameters as zero */
1230 ps_dec->u2_crop_offset_y = 0;
1231 ps_dec->u2_crop_offset_uv = 0;
1232
1233 /* The Initial Frame Rate Info is not Present */
1234 ps_dec->i4_vui_frame_rate = -1;
Isha Kulkarni34769a52019-01-28 17:43:35 +0530[diff] [blame]1235 ps_dec->i4_pic_type = NA_SLICE;
1236 ps_dec->i4_frametype = IV_NA_FRAME;
1237 ps_dec->i4_content_type = IV_CONTENTTYPE_NA;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1238
1239 ps_dec->u1_res_changed = 0;
1240
1241
1242 ps_dec->u1_frame_decoded_flag = 0;
1243
1244 /* Set the default frame seek mask mode */
1245 ps_dec->u4_skip_frm_mask = SKIP_NONE;
1246
1247 /********************************************************/
1248 /* Initialize CAVLC residual decoding function pointers */
1249 /********************************************************/
1250 ps_dec->pf_cavlc_4x4res_block[0] = ih264d_cavlc_4x4res_block_totalcoeff_1;
1251 ps_dec->pf_cavlc_4x4res_block[1] =
1252 ih264d_cavlc_4x4res_block_totalcoeff_2to10;
1253 ps_dec->pf_cavlc_4x4res_block[2] =
1254 ih264d_cavlc_4x4res_block_totalcoeff_11to16;
1255
1256 ps_dec->pf_cavlc_parse4x4coeff[0] = ih264d_cavlc_parse4x4coeff_n0to7;
1257 ps_dec->pf_cavlc_parse4x4coeff[1] = ih264d_cavlc_parse4x4coeff_n8;
1258
1259 ps_dec->pf_cavlc_parse_8x8block[0] =
1260 ih264d_cavlc_parse_8x8block_none_available;
1261 ps_dec->pf_cavlc_parse_8x8block[1] =
1262 ih264d_cavlc_parse_8x8block_left_available;
1263 ps_dec->pf_cavlc_parse_8x8block[2] =
1264 ih264d_cavlc_parse_8x8block_top_available;
1265 ps_dec->pf_cavlc_parse_8x8block[3] =
1266 ih264d_cavlc_parse_8x8block_both_available;
1267
1268 /***************************************************************************/
1269 /* Initialize Bs calculation function pointers for P and B, 16x16/non16x16 */
1270 /***************************************************************************/
1271 ps_dec->pf_fill_bs1[0][0] = ih264d_fill_bs1_16x16mb_pslice;
1272 ps_dec->pf_fill_bs1[0][1] = ih264d_fill_bs1_non16x16mb_pslice;
1273
1274 ps_dec->pf_fill_bs1[1][0] = ih264d_fill_bs1_16x16mb_bslice;
1275 ps_dec->pf_fill_bs1[1][1] = ih264d_fill_bs1_non16x16mb_bslice;
1276
1277 ps_dec->pf_fill_bs_xtra_left_edge[0] =
1278 ih264d_fill_bs_xtra_left_edge_cur_frm;
1279 ps_dec->pf_fill_bs_xtra_left_edge[1] =
1280 ih264d_fill_bs_xtra_left_edge_cur_fld;
1281
1282 /* Initialize Reference Pic Buffers */
1283 ih264d_init_ref_bufs(ps_dec->ps_dpb_mgr);
1284
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1285 ps_dec->u2_prv_frame_num = 0;
1286 ps_dec->u1_top_bottom_decoded = 0;
1287 ps_dec->u1_dangling_field = 0;
1288
1289 ps_dec->s_cab_dec_env.cabac_table = gau4_ih264d_cabac_table;
1290
1291 ps_dec->pu1_left_mv_ctxt_inc = ps_dec->u1_left_mv_ctxt_inc_arr[0];
1292 ps_dec->pi1_left_ref_idx_ctxt_inc =
1293 &ps_dec->i1_left_ref_idx_ctx_inc_arr[0][0];
1294 ps_dec->pu1_left_yuv_dc_csbp = &ps_dec->u1_yuv_dc_csbp_topmb;
1295
1296 /* ! */
1297 /* Initializing flush frame u4_flag */
1298 ps_dec->u1_flushfrm = 0;
1299
1300 {
1301 ps_dec->s_cab_dec_env.pv_codec_handle = (void*)ps_dec;
1302 ps_dec->ps_bitstrm->pv_codec_handle = (void*)ps_dec;
1303 ps_dec->ps_cur_slice->pv_codec_handle = (void*)ps_dec;
1304 ps_dec->ps_dpb_mgr->pv_codec_handle = (void*)ps_dec;
1305 }
1306
1307 memset(ps_dec->disp_bufs, 0, (MAX_DISP_BUFS_NEW) * sizeof(disp_buf_t));
1308 memset(ps_dec->u4_disp_buf_mapping, 0,
1309 (MAX_DISP_BUFS_NEW) * sizeof(UWORD32));
1310 memset(ps_dec->u4_disp_buf_to_be_freed, 0,
1311 (MAX_DISP_BUFS_NEW) * sizeof(UWORD32));
Harish Mahendrakar2c9d67f2016-05-24 13:11:51 -0700[diff] [blame]1312 memset(ps_dec->ps_cur_slice, 0, sizeof(dec_slice_params_t));
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1313
1314 ih264d_init_arch(ps_dec);
1315 ih264d_init_function_ptr(ps_dec);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1316 ps_dec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1317 ps_dec->init_done = 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]1318
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1319}
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1320WORD32 ih264d_free_static_bufs(iv_obj_t *dec_hdl)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1321{
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1322 dec_struct_t *ps_dec;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1323
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1324 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1325 void *pv_mem_ctxt;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1326
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1327 ps_dec = (dec_struct_t *)dec_hdl->pv_codec_handle;
1328 pf_aligned_free = ps_dec->pf_aligned_free;
1329 pv_mem_ctxt = ps_dec->pv_mem_ctxt;
1330
Manisha Jajood1e64cc2020-07-22 13:49:11 +0530[diff] [blame]1331#ifdef KEEP_THREADS_ACTIVE
1332 /* Wait for threads */
1333 ps_dec->i4_break_threads = 1;
1334 if(ps_dec->u4_dec_thread_created)
1335 {
1336 ithread_mutex_lock(ps_dec->apv_proc_start_mutex[0]);
1337
1338 ps_dec->ai4_process_start[0] = PROC_START;
1339
1340 ithread_cond_signal(ps_dec->apv_proc_start_condition[0]);
1341
1342 ithread_mutex_unlock(ps_dec->apv_proc_start_mutex[0]);
1343
1344 ithread_join(ps_dec->pv_dec_thread_handle, NULL);
1345
1346 ps_dec->u4_dec_thread_created = 0;
1347 }
1348
1349 if(ps_dec->u4_bs_deblk_thread_created)
1350 {
1351 ithread_mutex_lock(ps_dec->apv_proc_start_mutex[1]);
1352
1353 ps_dec->ai4_process_start[1] = PROC_START;
1354
1355 ithread_cond_signal(ps_dec->apv_proc_start_condition[1]);
1356
1357 ithread_mutex_unlock(ps_dec->apv_proc_start_mutex[1]);
1358
1359 ithread_join(ps_dec->pv_bs_deblk_thread_handle, NULL);
1360
1361 ps_dec->u4_bs_deblk_thread_created = 0;
1362 }
1363
1364 // destroy mutex and condition variable for both the threads
1365 // 1. ih264d_decode_picture_thread
1366 // 2. ih264d_recon_deblk_thread
1367 {
1368 UWORD32 i;
1369 for(i = 0; i < 2; i++)
1370 {
1371 ithread_cond_destroy(ps_dec->apv_proc_start_condition[i]);
1372 ithread_cond_destroy(ps_dec->apv_proc_done_condition[i]);
1373
1374 ithread_mutex_destroy(ps_dec->apv_proc_start_mutex[i]);
1375 ithread_mutex_destroy(ps_dec->apv_proc_done_mutex[i]);
1376 }
1377 }
1378 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->apv_proc_start_mutex[0]);
1379 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->apv_proc_start_condition[0]);
1380#endif
1381
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1382 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_sps);
1383 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pps);
1384 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_dec_thread_handle);
1385 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_bs_deblk_thread_handle);
1386 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dpb_mgr);
1387 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pred);
1388 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_disp_buf_mgr);
1389 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_pic_buf_mgr);
1390 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pic_buf_base);
1391 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dec_err_status);
1392 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_sei);
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]1393 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_sei_parse);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1394 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dpb_cmds);
1395 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_bitstrm);
1396 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_cur_slice);
1397 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_scratch_sps_pps);
1398 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_bits_buf_static);
1399 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ppv_map_ref_idx_to_poc_base);
1400 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->p_cabac_ctxt_table_t);
1401 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_left_mb_ctxt_info);
1402 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_ref_buff_base);
1403 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pi2_pred1);
1404 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_temp_mc_buffer);
1405 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_init_dpb_base);
1406 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu4_mbaff_wt_mat);
1407 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu4_wts_ofsts_mat);
1408 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_left_mvpred_addr);
1409 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pv_mv_buf_mgr);
1410 PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_col_mv_base);
1411 PS_DEC_ALIGNED_FREE(ps_dec, dec_hdl->pv_codec_handle);
1412
1413 if(dec_hdl)
1414 {
1415 pf_aligned_free(pv_mem_ctxt, dec_hdl);
1416 }
1417 return IV_SUCCESS;
1418}
1419/*****************************************************************************/
1420/* */
1421/* Function Name : ih264d_create */
1422/* */
1423/* Description : creates decoder */
1424/* */
1425/* Inputs :iv_obj_t decoder handle */
1426/* :pv_api_ip pointer to input structure */
1427/* :pv_api_op pointer to output structure */
1428/* Outputs : */
1429/* Returns : void */
1430/* */
1431/* Issues : none */
1432/* */
1433/* Revision History: */
1434/* */
1435/* DD MM YYYY Author(s) Changes (Describe the changes made) */
1436/* 22 10 2008 100356 Draft */
1437/* */
1438/*****************************************************************************/
1439WORD32 ih264d_allocate_static_bufs(iv_obj_t **dec_hdl, void *pv_api_ip, void *pv_api_op)
1440{
1441 ih264d_create_ip_t *ps_create_ip;
1442 ih264d_create_op_t *ps_create_op;
1443 void *pv_buf;
1444 UWORD8 *pu1_buf;
1445 dec_struct_t *ps_dec;
1446 void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1447 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1448 void *pv_mem_ctxt;
1449 WORD32 size;
1450
1451 ps_create_ip = (ih264d_create_ip_t *)pv_api_ip;
1452 ps_create_op = (ih264d_create_op_t *)pv_api_op;
1453
1454 ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
1455
1456 pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1457 pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1458 pv_mem_ctxt = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1459
1460 /* Initialize return handle to NULL */
1461 ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1462 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1463 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1464 memset(pv_buf, 0, sizeof(iv_obj_t));
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1465 *dec_hdl = (iv_obj_t *)pv_buf;
1466 ps_create_op->s_ivd_create_op_t.pv_handle = *dec_hdl;
1467
1468 (*dec_hdl)->pv_codec_handle = NULL;
1469 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(dec_struct_t));
1470 RETURN_IF((NULL == pv_buf), IV_FAIL);
1471 (*dec_hdl)->pv_codec_handle = (dec_struct_t *)pv_buf;
1472 ps_dec = (dec_struct_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1473
1474 memset(ps_dec, 0, sizeof(dec_struct_t));
1475
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1476#ifndef LOGO_EN
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1477 ps_dec->u4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1478#else
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1479 ps_dec->u4_share_disp_buf = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1480#endif
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1481
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1482 ps_dec->u1_chroma_format =
1483 (UWORD8)(ps_create_ip->s_ivd_create_ip_t.e_output_format);
1484
1485 if((ps_dec->u1_chroma_format != IV_YUV_420P)
1486 && (ps_dec->u1_chroma_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1487 != IV_YUV_420SP_UV)
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1488 && (ps_dec->u1_chroma_format
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1489 != IV_YUV_420SP_VU))
1490 {
1491 ps_dec->u4_share_disp_buf = 0;
1492 }
1493
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1494 ps_dec->pf_aligned_alloc = pf_aligned_alloc;
1495 ps_dec->pf_aligned_free = pf_aligned_free;
1496 ps_dec->pv_mem_ctxt = pv_mem_ctxt;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1497
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1498
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1499 size = ((sizeof(dec_seq_params_t)) * MAX_NUM_SEQ_PARAMS);
1500 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1501 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1502 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1503 ps_dec->ps_sps = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1504
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1505 size = (sizeof(dec_pic_params_t)) * MAX_NUM_PIC_PARAMS;
1506 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1507 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1508 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1509 ps_dec->ps_pps = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1510
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1511 size = ithread_get_handle_size();
1512 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1513 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1514 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1515 ps_dec->pv_dec_thread_handle = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1516
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1517 size = ithread_get_handle_size();
1518 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1519 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1520 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1521 ps_dec->pv_bs_deblk_thread_handle = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1522
Manisha Jajood1e64cc2020-07-22 13:49:11 +0530[diff] [blame]1523#ifdef KEEP_THREADS_ACTIVE
1524 {
1525 UWORD32 i;
1526 /* Request memory to hold mutex (start/done) for both threads */
1527 size = ithread_get_mutex_lock_size() << 2;
1528 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 8, size);
1529 RETURN_IF((NULL == pv_buf), IV_FAIL);
1530 memset(pv_buf, 0, size);
1531
1532 // init mutex variable for both the threads
1533 // 1. ih264d_decode_picture_thread
1534 // 2. ih264d_recon_deblk_thread
1535 for(i = 0; i < 2; i++)
1536 {
1537 WORD32 ret;
1538 WORD32 mutex_size = ithread_get_mutex_lock_size();
1539
1540 ps_dec->apv_proc_start_mutex[i] =
1541 (UWORD8 *)pv_buf + (2 * i * mutex_size);
1542 ps_dec->apv_proc_done_mutex[i] =
1543 (UWORD8 *)pv_buf + ((2 * i + 1) * mutex_size);
1544
1545 ret = ithread_mutex_init(ps_dec->apv_proc_start_mutex[0]);
1546 RETURN_IF((ret != IV_SUCCESS), ret);
1547
1548 ret = ithread_mutex_init(ps_dec->apv_proc_done_mutex[i]);
1549 RETURN_IF((ret != IV_SUCCESS), ret);
1550 }
1551
1552 size = ithread_get_cond_struct_size() << 2;
1553 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 8, size);
1554 RETURN_IF((NULL == pv_buf), IV_FAIL);
1555 memset(pv_buf, 0, size);
1556
1557 // init condition variable for both the threads
1558 for(i = 0; i < 2; i++)
1559 {
1560 WORD32 ret;
1561 WORD32 cond_size = ithread_get_cond_struct_size();
1562 ps_dec->apv_proc_start_condition[i] =
1563 (UWORD8 *)pv_buf + (2 * i * cond_size);
1564 ps_dec->apv_proc_done_condition[i] =
1565 (UWORD8 *)pv_buf + ((2 * i + 1) * cond_size);
1566
1567 ret = ithread_cond_init(ps_dec->apv_proc_start_condition[i]);
1568 RETURN_IF((ret != IV_SUCCESS), ret);
1569
1570 ret = ithread_cond_init(ps_dec->apv_proc_done_condition[i]);
1571 RETURN_IF((ret != IV_SUCCESS), ret);
1572 }
1573 }
1574#endif
1575
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1576 size = sizeof(dpb_manager_t);
1577 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1578 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1579 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1580 ps_dec->ps_dpb_mgr = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1581
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1582 size = sizeof(pred_info_t) * 2 * 32;
1583 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1584 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1585 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1586 ps_dec->ps_pred = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1587
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1588 size = sizeof(disp_mgr_t);
1589 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1590 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1591 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1592 ps_dec->pv_disp_buf_mgr = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1593
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1594 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
1595 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1596 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1597 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1598 ps_dec->pv_pic_buf_mgr = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1599
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1600 size = sizeof(struct pic_buffer_t) * (H264_MAX_REF_PICS * 2);
1601 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1602 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1603 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1604 ps_dec->ps_pic_buf_base = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1605
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1606 size = sizeof(dec_err_status_t);
1607 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1608 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1609 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1610 ps_dec->ps_dec_err_status = (dec_err_status_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1611
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1612 size = sizeof(sei);
1613 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1614 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1615 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1616 ps_dec->ps_sei = (sei *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1617
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]1618 size = sizeof(sei);
1619 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1620 RETURN_IF((NULL == pv_buf), IV_FAIL);
1621 memset(pv_buf, 0, size);
1622 ps_dec->ps_sei_parse = (sei *)pv_buf;
1623
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1624 size = sizeof(dpb_commands_t);
1625 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1626 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1627 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1628 ps_dec->ps_dpb_cmds = (dpb_commands_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1629
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1630 size = sizeof(dec_bit_stream_t);
1631 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1632 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1633 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1634 ps_dec->ps_bitstrm = (dec_bit_stream_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1635
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1636 size = sizeof(dec_slice_params_t);
1637 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1638 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1639 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1640 ps_dec->ps_cur_slice = (dec_slice_params_t *)pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1641
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1642 size = MAX(sizeof(dec_seq_params_t), sizeof(dec_pic_params_t));
1643 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1644 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1645 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1646 ps_dec->pv_scratch_sps_pps = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1647
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1648
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1649 ps_dec->u4_static_bits_buf_size = 256000;
1650 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, ps_dec->u4_static_bits_buf_size);
1651 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1652 memset(pv_buf, 0, ps_dec->u4_static_bits_buf_size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1653 ps_dec->pu1_bits_buf_static = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1654
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1655
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1656 size = ((TOTAL_LIST_ENTRIES + PAD_MAP_IDX_POC)
1657 * sizeof(void *));
1658 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1659 RETURN_IF((NULL == pv_buf), IV_FAIL);
1660 ps_dec->ppv_map_ref_idx_to_poc_base = pv_buf;
1661 memset(ps_dec->ppv_map_ref_idx_to_poc_base, 0, size);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1662
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1663 ps_dec->ppv_map_ref_idx_to_poc = ps_dec->ppv_map_ref_idx_to_poc_base + OFFSET_MAP_IDX_POC;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1664
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1665
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1666 size = (sizeof(bin_ctxt_model_t) * NUM_CABAC_CTXTS);
1667 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1668 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1669 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1670 ps_dec->p_cabac_ctxt_table_t = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1671
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1672
1673
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1674 size = sizeof(ctxt_inc_mb_info_t);
1675 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1676 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1677 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1678 ps_dec->ps_left_mb_ctxt_info = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1679
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1680
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1681
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1682 size = MAX_REF_BUF_SIZE * 2;
1683 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1684 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1685 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1686 ps_dec->pu1_ref_buff_base = pv_buf;
1687 ps_dec->pu1_ref_buff = ps_dec->pu1_ref_buff_base + MAX_REF_BUF_SIZE;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1688
1689
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1690 size = ((sizeof(WORD16)) * PRED_BUFFER_WIDTH
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]1691 * PRED_BUFFER_HEIGHT * 2);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1692 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1693 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1694 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1695 ps_dec->pi2_pred1 = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1696
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1697
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1698 size = sizeof(UWORD8) * (MB_LUM_SIZE);
1699 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1700 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1701 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1702 ps_dec->pu1_temp_mc_buffer = pv_buf;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1703
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1704
1705
1706
1707 size = 8 * MAX_REF_BUFS * sizeof(struct pic_buffer_t);
1708 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1709 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1710 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1711
1712 ps_dec->pu1_init_dpb_base = pv_buf;
1713 pu1_buf = pv_buf;
1714 ps_dec->ps_dpb_mgr->ps_init_dpb[0][0] = (struct pic_buffer_t *)pu1_buf;
1715
1716 pu1_buf += size / 2;
1717 ps_dec->ps_dpb_mgr->ps_init_dpb[1][0] = (struct pic_buffer_t *)pu1_buf;
1718
Hamsalekha S07db35a2017-05-08 17:11:05 +0530[diff] [blame]1719 size = (sizeof(UWORD32) * 2 * 3
1720 * ((MAX_FRAMES << 1) * (MAX_FRAMES << 1)) * 2);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1721 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1722 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1723 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1724 ps_dec->pu4_mbaff_wt_mat = pv_buf;
1725
1726 size = sizeof(UWORD32) * 2 * 3
Harish Mahendrakarbee9b9a2017-01-13 11:26:23 +0530[diff] [blame]1727 * ((MAX_FRAMES << 1) * (MAX_FRAMES << 1));
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1728 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1729 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1730 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1731 ps_dec->pu4_wts_ofsts_mat = pv_buf;
1732
1733
1734 size = (sizeof(neighbouradd_t) << 2);
1735 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1736 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1737 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1738 ps_dec->ps_left_mvpred_addr = pv_buf;
1739
1740
1741 size = sizeof(buf_mgr_t) + ithread_get_mutex_lock_size();
1742 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1743 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]1744 memset(pv_buf, 0, size);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1745 ps_dec->pv_mv_buf_mgr = pv_buf;
1746
1747
1748 size = sizeof(col_mv_buf_t) * (H264_MAX_REF_PICS * 2);
1749 pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1750 RETURN_IF((NULL == pv_buf), IV_FAIL);
1751 ps_dec->ps_col_mv_base = pv_buf;
1752 memset(ps_dec->ps_col_mv_base, 0, size);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1753
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1754 ih264d_init_decoder(ps_dec);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1755
1756 return IV_SUCCESS;
1757}
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1758
1759
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1760/*****************************************************************************/
1761/* */
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1762/* Function Name : ih264d_create */
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1763/* */
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1764/* Description : creates decoder */
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1765/* */
1766/* Inputs :iv_obj_t decoder handle */
1767/* :pv_api_ip pointer to input structure */
1768/* :pv_api_op pointer to output structure */
1769/* Outputs : */
1770/* Returns : void */
1771/* */
1772/* Issues : none */
1773/* */
1774/* Revision History: */
1775/* */
1776/* DD MM YYYY Author(s) Changes (Describe the changes made) */
1777/* 22 10 2008 100356 Draft */
1778/* */
1779/*****************************************************************************/
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1780WORD32 ih264d_create(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1781{
Harish Mahendrakar7720b3f2017-10-26 16:13:50 +0530[diff] [blame]1782 ih264d_create_ip_t *ps_create_ip;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1783 ih264d_create_op_t *ps_create_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1784
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1785 WORD32 ret;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1786
Harish Mahendrakar7720b3f2017-10-26 16:13:50 +0530[diff] [blame]1787 ps_create_ip = (ih264d_create_ip_t *)pv_api_ip;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1788 ps_create_op = (ih264d_create_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1789
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1790 ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
Harish Mahendrakar7720b3f2017-10-26 16:13:50 +0530[diff] [blame]1791 dec_hdl = NULL;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1792 ret = ih264d_allocate_static_bufs(&dec_hdl, pv_api_ip, pv_api_op);
1793
1794 /* If allocation of some buffer fails, then free buffers allocated till then */
Harish Mahendrakar7720b3f2017-10-26 16:13:50 +0530[diff] [blame]1795 if(IV_FAIL == ret)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1796 {
Harish Mahendrakar7720b3f2017-10-26 16:13:50 +0530[diff] [blame]1797 if(dec_hdl)
1798 {
1799 if(dec_hdl->pv_codec_handle)
1800 {
1801 ih264d_free_static_bufs(dec_hdl);
1802 }
1803 else
1804 {
1805 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1806 void *pv_mem_ctxt;
1807
1808 pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1809 pv_mem_ctxt = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1810 pf_aligned_free(pv_mem_ctxt, dec_hdl);
1811 }
1812 }
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1813 ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
Harish Mahendrakar54160a62019-04-16 10:51:53 -0700[diff] [blame]1814 ps_create_op->s_ivd_create_op_t.u4_error_code |= 1 << IVD_FATALERROR;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1815
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1816 return IV_FAIL;
1817 }
1818
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1819 return IV_SUCCESS;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1820}
1821
1822/*****************************************************************************/
1823/* */
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1824/* Function Name : ih264d_map_error */
1825/* */
1826/* Description : Maps error codes to IVD error groups */
1827/* */
1828/* Inputs : */
1829/* Globals : <Does it use any global variables?> */
1830/* Outputs : */
1831/* Returns : void */
1832/* */
1833/* Issues : none */
1834/* */
1835/* Revision History: */
1836/* */
1837/* DD MM YYYY Author(s) Changes (Describe the changes made) */
1838/* 22 10 2008 100356 Draft */
1839/* */
1840/*****************************************************************************/
1841UWORD32 ih264d_map_error(UWORD32 i4_err_status)
1842{
1843 UWORD32 temp = 0;
1844
1845 switch(i4_err_status)
1846 {
1847 case ERROR_MEM_ALLOC_ISRAM_T:
1848 case ERROR_MEM_ALLOC_SDRAM_T:
1849 case ERROR_BUF_MGR:
1850 case ERROR_MB_GROUP_ASSGN_T:
1851 case ERROR_FRAME_LIMIT_OVER:
1852 case ERROR_ACTUAL_RESOLUTION_GREATER_THAN_INIT:
1853 case ERROR_PROFILE_NOT_SUPPORTED:
1854 case ERROR_INIT_NOT_DONE:
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]1855 case IVD_MEM_ALLOC_FAILED:
Harish Mahendrakar54160a62019-04-16 10:51:53 -0700[diff] [blame]1856 case ERROR_FEATURE_UNAVAIL:
1857 case IVD_STREAM_WIDTH_HEIGHT_NOT_SUPPORTED:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1858 temp = 1 << IVD_FATALERROR;
1859 H264_DEC_DEBUG_PRINT("\nFatal Error\n");
1860 break;
1861
1862 case ERROR_DBP_MANAGER_T:
1863 case ERROR_GAPS_IN_FRM_NUM:
1864 case ERROR_UNKNOWN_NAL:
1865 case ERROR_INV_MB_SLC_GRP_T:
1866 case ERROR_MULTIPLE_SLC_GRP_T:
1867 case ERROR_UNKNOWN_LEVEL:
1868 case ERROR_UNAVAIL_PICBUF_T:
1869 case ERROR_UNAVAIL_MVBUF_T:
1870 case ERROR_UNAVAIL_DISPBUF_T:
1871 case ERROR_NUM_REF:
1872 case ERROR_REFIDX_ORDER_T:
1873 case ERROR_PIC0_NOT_FOUND_T:
1874 case ERROR_MB_TYPE:
1875 case ERROR_SUB_MB_TYPE:
1876 case ERROR_CBP:
1877 case ERROR_REF_IDX:
1878 case ERROR_NUM_MV:
1879 case ERROR_CHROMA_PRED_MODE:
1880 case ERROR_INTRAPRED:
1881 case ERROR_NEXT_MB_ADDRESS_T:
1882 case ERROR_MB_ADDRESS_T:
1883 case ERROR_PIC1_NOT_FOUND_T:
1884 case ERROR_CAVLC_NUM_COEFF_T:
1885 case ERROR_CAVLC_SCAN_POS_T:
1886 case ERROR_PRED_WEIGHT_TABLE_T:
1887 case ERROR_CORRUPTED_SLICE:
1888 temp = 1 << IVD_CORRUPTEDDATA;
1889 break;
1890
1891 case ERROR_NOT_SUPP_RESOLUTION:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1892 case ERROR_ACTUAL_LEVEL_GREATER_THAN_INIT:
1893 temp = 1 << IVD_UNSUPPORTEDINPUT;
1894 break;
1895
1896 case ERROR_INVALID_PIC_PARAM:
1897 case ERROR_INVALID_SEQ_PARAM:
1898 case ERROR_EGC_EXCEED_32_1_T:
1899 case ERROR_EGC_EXCEED_32_2_T:
1900 case ERROR_INV_RANGE_TEV_T:
1901 case ERROR_INV_SLC_TYPE_T:
1902 case ERROR_INV_POC_TYPE_T:
1903 case ERROR_INV_RANGE_QP_T:
1904 case ERROR_INV_SPS_PPS_T:
1905 case ERROR_INV_SLICE_HDR_T:
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]1906 case ERROR_INV_SEI_MDCV_PARAMS:
1907 case ERROR_INV_SEI_CLL_PARAMS:
1908 case ERROR_INV_SEI_AVE_PARAMS:
1909 case ERROR_INV_SEI_CCV_PARAMS:
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]1910 temp = 1 << IVD_CORRUPTEDHEADER;
1911 break;
1912
1913 case ERROR_EOB_FLUSHBITS_T:
1914 case ERROR_EOB_GETBITS_T:
1915 case ERROR_EOB_GETBIT_T:
1916 case ERROR_EOB_BYPASS_T:
1917 case ERROR_EOB_DECISION_T:
1918 case ERROR_EOB_TERMINATE_T:
1919 case ERROR_EOB_READCOEFF4X4CAB_T:
1920 temp = 1 << IVD_INSUFFICIENTDATA;
1921 break;
1922 case ERROR_DYNAMIC_RESOLUTION_NOT_SUPPORTED:
1923 case ERROR_DISP_WIDTH_RESET_TO_PIC_WIDTH:
1924 temp = 1 << IVD_UNSUPPORTEDPARAM | 1 << IVD_FATALERROR;
1925 break;
1926
1927 case ERROR_DANGLING_FIELD_IN_PIC:
1928 temp = 1 << IVD_APPLIEDCONCEALMENT;
1929 break;
1930
1931 }
1932
1933 return temp;
1934
1935}
1936
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]1937UWORD32 ih264d_get_outbuf_size(WORD32 pic_wd,
1938 UWORD32 pic_ht,
1939 UWORD8 u1_chroma_format,
1940 UWORD32 *p_buf_size)
1941{
1942 UWORD32 u4_min_num_out_bufs = 0;
1943
1944 if(u1_chroma_format == IV_YUV_420P)
1945 u4_min_num_out_bufs = MIN_OUT_BUFS_420;
1946 else if(u1_chroma_format == IV_YUV_422ILE)
1947 u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
1948 else if(u1_chroma_format == IV_RGB_565)
1949 u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
1950 else if((u1_chroma_format == IV_YUV_420SP_UV)
1951 || (u1_chroma_format == IV_YUV_420SP_VU))
1952 u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
1953
1954 if(u1_chroma_format == IV_YUV_420P)
1955 {
1956 p_buf_size[0] = (pic_wd * pic_ht);
1957 p_buf_size[1] = (pic_wd * pic_ht) >> 2;
1958 p_buf_size[2] = (pic_wd * pic_ht) >> 2;
1959 }
1960 else if(u1_chroma_format == IV_YUV_422ILE)
1961 {
1962 p_buf_size[0] = (pic_wd * pic_ht) * 2;
1963 p_buf_size[1] = p_buf_size[2] = 0;
1964 }
1965 else if(u1_chroma_format == IV_RGB_565)
1966 {
1967 p_buf_size[0] = (pic_wd * pic_ht) * 2;
1968 p_buf_size[1] = p_buf_size[2] = 0;
1969 }
1970 else if((u1_chroma_format == IV_YUV_420SP_UV)
1971 || (u1_chroma_format == IV_YUV_420SP_VU))
1972 {
1973 p_buf_size[0] = (pic_wd * pic_ht);
1974 p_buf_size[1] = (pic_wd * pic_ht) >> 1;
1975 p_buf_size[2] = 0;
1976 }
1977
1978 return u4_min_num_out_bufs;
1979}
1980
1981WORD32 check_app_out_buf_size(dec_struct_t *ps_dec)
1982{
1983 UWORD32 au4_min_out_buf_size[IVD_VIDDEC_MAX_IO_BUFFERS];
1984 UWORD32 u4_min_num_out_bufs, i;
1985 UWORD32 pic_wd, pic_ht;
1986
1987 if(0 == ps_dec->u4_share_disp_buf)
1988 {
1989 pic_wd = ps_dec->u2_disp_width;
1990 pic_ht = ps_dec->u2_disp_height;
1991
1992 }
1993 else
1994 {
Ritu Baldwa3692ace2017-12-22 14:20:20 +0530[diff] [blame]1995 pic_wd = ps_dec->u2_frm_wd_y;
1996 pic_ht = ps_dec->u2_frm_ht_y;
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]1997 }
1998
1999 if(ps_dec->u4_app_disp_width > pic_wd)
2000 pic_wd = ps_dec->u4_app_disp_width;
2001
2002 u4_min_num_out_bufs = ih264d_get_outbuf_size(pic_wd, pic_ht,
2003 ps_dec->u1_chroma_format,
2004 &au4_min_out_buf_size[0]);
2005
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]2006
Ritu Baldwa3692ace2017-12-22 14:20:20 +0530[diff] [blame]2007 if(0 == ps_dec->u4_share_disp_buf)
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]2008 {
Ritu Baldwa3692ace2017-12-22 14:20:20 +0530[diff] [blame]2009 if(ps_dec->ps_out_buffer->u4_num_bufs < u4_min_num_out_bufs)
2010 return IV_FAIL;
2011
2012 for(i = 0; i < u4_min_num_out_bufs; i++)
2013 {
2014 if(ps_dec->ps_out_buffer->u4_min_out_buf_size[i]
2015 < au4_min_out_buf_size[i])
2016 return (IV_FAIL);
2017 }
2018 }
2019 else
2020 {
2021 if(ps_dec->disp_bufs[0].u4_num_bufs < u4_min_num_out_bufs)
2022 return IV_FAIL;
2023
2024 for(i = 0; i < u4_min_num_out_bufs; i++)
2025 {
2026 /* We need to check only with the disp_buffer[0], because we have
2027 * already ensured that all the buffers are of the same size in
2028 * ih264d_set_display_frame.
2029 */
2030 if(ps_dec->disp_bufs[0].u4_bufsize[i] < au4_min_out_buf_size[i])
2031 return (IV_FAIL);
2032 }
2033
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]2034 }
2035
2036 return (IV_SUCCESS);
2037}
2038
2039
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2040/*****************************************************************************/
2041/* */
2042/* Function Name : ih264d_video_decode */
2043/* */
2044/* Description : handle video decode API command */
2045/* */
2046/* Inputs :iv_obj_t decoder handle */
2047/* :pv_api_ip pointer to input structure */
2048/* :pv_api_op pointer to output structure */
2049/* Outputs : */
2050/* Returns : void */
2051/* */
2052/* Issues : none */
2053/* */
2054/* Revision History: */
2055/* */
2056/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2057/* 22 10 2008 100356 Draft */
2058/* */
2059/*****************************************************************************/
2060
2061WORD32 ih264d_video_decode(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
2062{
2063 /* ! */
2064
2065 dec_struct_t * ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
2066
2067 WORD32 i4_err_status = 0;
2068 UWORD8 *pu1_buf = NULL;
2069 WORD32 buflen;
2070 UWORD32 u4_max_ofst, u4_length_of_start_code = 0;
2071
2072 UWORD32 bytes_consumed = 0;
2073 UWORD32 cur_slice_is_nonref = 0;
2074 UWORD32 u4_next_is_aud;
2075 UWORD32 u4_first_start_code_found = 0;
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2076 WORD32 ret = 0,api_ret_value = IV_SUCCESS;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2077 WORD32 header_data_left = 0,frame_data_left = 0;
2078 UWORD8 *pu1_bitstrm_buf;
Shivaansh Agrawal2205f2d2020-12-18 00:25:54 +0530[diff] [blame]2079 ih264d_video_decode_ip_t *ps_h264d_dec_ip;
2080 ih264d_video_decode_op_t *ps_h264d_dec_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2081 ivd_video_decode_ip_t *ps_dec_ip;
2082 ivd_video_decode_op_t *ps_dec_op;
Martin Storsjo086dd8e2015-06-13 00:35:01 +0300[diff] [blame]2083
2084 ithread_set_name((void*)"Parse_thread");
2085
Shivaansh Agrawal2205f2d2020-12-18 00:25:54 +0530[diff] [blame]2086 ps_h264d_dec_ip = (ih264d_video_decode_ip_t *)pv_api_ip;
2087 ps_h264d_dec_op = (ih264d_video_decode_op_t *)pv_api_op;
2088 ps_dec_ip = &ps_h264d_dec_ip->s_ivd_video_decode_ip_t;
2089 ps_dec_op = &ps_h264d_dec_op->s_ivd_video_decode_op_t;
Harish Mahendrakar33db7a02016-04-20 16:13:52 +0530[diff] [blame]2090
2091 {
2092 UWORD32 u4_size;
2093 u4_size = ps_dec_op->u4_size;
Shivaansh Agrawal2205f2d2020-12-18 00:25:54 +0530[diff] [blame]2094 memset(ps_h264d_dec_op, 0, sizeof(ih264d_video_decode_op_t));
Harish Mahendrakar33db7a02016-04-20 16:13:52 +0530[diff] [blame]2095 ps_dec_op->u4_size = u4_size;
2096 }
2097
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2098 ps_dec->pv_dec_out = ps_dec_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2099 if(ps_dec->init_done != 1)
2100 {
2101 return IV_FAIL;
2102 }
2103
2104 /*Data memory barries instruction,so that bitstream write by the application is complete*/
2105 DATA_SYNC();
2106
2107 if(0 == ps_dec->u1_flushfrm)
2108 {
2109 if(ps_dec_ip->pv_stream_buffer == NULL)
2110 {
2111 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2112 ps_dec_op->u4_error_code |= IVD_DEC_FRM_BS_BUF_NULL;
2113 return IV_FAIL;
2114 }
2115 if(ps_dec_ip->u4_num_Bytes <= 0)
2116 {
2117 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2118 ps_dec_op->u4_error_code |= IVD_DEC_NUMBYTES_INV;
2119 return IV_FAIL;
2120
2121 }
2122 }
2123 ps_dec->u1_pic_decode_done = 0;
2124
Manisha Jajood1e64cc2020-07-22 13:49:11 +0530[diff] [blame]2125#ifdef KEEP_THREADS_ACTIVE
2126 {
2127 UWORD32 i;
2128 ps_dec->i4_break_threads = 0;
2129 for (i = 0; i < 2; i++)
2130 {
2131 ret = ithread_mutex_lock(ps_dec->apv_proc_start_mutex[i]);
2132 RETURN_IF((ret != IV_SUCCESS), ret);
2133
2134 ps_dec->ai4_process_start[i] = PROC_INIT;
2135
2136 ret = ithread_mutex_unlock(ps_dec->apv_proc_start_mutex[i]);
2137 RETURN_IF((ret != IV_SUCCESS), ret);
2138 }
2139 }
2140#else
2141 ps_dec->u4_dec_thread_created = 0;
2142 ps_dec->u4_bs_deblk_thread_created = 0;
2143#endif
2144
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2145 ps_dec_op->u4_num_bytes_consumed = 0;
Rakesh Kumarfe5a6ad2019-03-07 12:30:09 +0530[diff] [blame]2146 ps_dec_op->i4_reorder_depth = -1;
2147 ps_dec_op->i4_display_index = DEFAULT_POC;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2148 ps_dec->ps_out_buffer = NULL;
2149
2150 if(ps_dec_ip->u4_size
2151 >= offsetof(ivd_video_decode_ip_t, s_out_buffer))
2152 ps_dec->ps_out_buffer = &ps_dec_ip->s_out_buffer;
2153
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2154 ps_dec->u4_fmt_conv_cur_row = 0;
2155
2156 ps_dec->u4_output_present = 0;
2157 ps_dec->s_disp_op.u4_error_code = 1;
2158 ps_dec->u4_fmt_conv_num_rows = FMT_CONV_NUM_ROWS;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2159 if(0 == ps_dec->u4_share_disp_buf
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2160 && ps_dec->i4_decode_header == 0)
2161 {
2162 UWORD32 i;
Harish Mahendrakaraa11ab92017-06-16 15:37:48 +0530[diff] [blame]2163 if((ps_dec->ps_out_buffer->u4_num_bufs == 0) ||
2164 (ps_dec->ps_out_buffer->u4_num_bufs > IVD_VIDDEC_MAX_IO_BUFFERS))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2165 {
2166 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2167 ps_dec_op->u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS;
2168 return IV_FAIL;
2169 }
2170
2171 for(i = 0; i < ps_dec->ps_out_buffer->u4_num_bufs; i++)
2172 {
2173 if(ps_dec->ps_out_buffer->pu1_bufs[i] == NULL)
2174 {
2175 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2176 ps_dec_op->u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL;
2177 return IV_FAIL;
2178 }
2179
2180 if(ps_dec->ps_out_buffer->u4_min_out_buf_size[i] == 0)
2181 {
2182 ps_dec_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
2183 ps_dec_op->u4_error_code |=
2184 IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
2185 return IV_FAIL;
2186 }
2187 }
2188 }
2189
2190 if(ps_dec->u4_total_frames_decoded >= NUM_FRAMES_LIMIT)
2191 {
2192 ps_dec_op->u4_error_code = ERROR_FRAME_LIMIT_OVER;
2193 return IV_FAIL;
2194 }
2195
2196 /* ! */
2197 ps_dec->u4_ts = ps_dec_ip->u4_ts;
2198
2199 ps_dec_op->u4_error_code = 0;
Isha Kulkarni34769a52019-01-28 17:43:35 +0530[diff] [blame]2200 ps_dec_op->e_pic_type = IV_NA_FRAME;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2201 ps_dec_op->u4_output_present = 0;
2202 ps_dec_op->u4_frame_decoded_flag = 0;
2203
Isha Kulkarni34769a52019-01-28 17:43:35 +0530[diff] [blame]2204 ps_dec->i4_frametype = IV_NA_FRAME;
2205 ps_dec->i4_content_type = IV_CONTENTTYPE_NA;
Harish Mahendrakar49456122017-01-05 12:10:47 +0530[diff] [blame]2206
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2207 ps_dec->u4_slice_start_code_found = 0;
2208
2209 /* In case the deocder is not in flush mode(in shared mode),
2210 then decoder has to pick up a buffer to write current frame.
2211 Check if a frame is available in such cases */
2212
2213 if(ps_dec->u1_init_dec_flag == 1 && ps_dec->u4_share_disp_buf == 1
2214 && ps_dec->u1_flushfrm == 0)
2215 {
2216 UWORD32 i;
2217
2218 WORD32 disp_avail = 0, free_id;
2219
2220 /* Check if at least one buffer is available with the codec */
2221 /* If not then return to application with error */
2222 for(i = 0; i < ps_dec->u1_pic_bufs; i++)
2223 {
2224 if(0 == ps_dec->u4_disp_buf_mapping[i]
2225 || 1 == ps_dec->u4_disp_buf_to_be_freed[i])
2226 {
2227 disp_avail = 1;
2228 break;
2229 }
2230
2231 }
2232
2233 if(0 == disp_avail)
2234 {
2235 /* If something is queued for display wait for that buffer to be returned */
2236
2237 ps_dec_op->u4_error_code = IVD_DEC_REF_BUF_NULL;
2238 ps_dec_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2239 return (IV_FAIL);
2240 }
2241
2242 while(1)
2243 {
2244 pic_buffer_t *ps_pic_buf;
2245 ps_pic_buf = (pic_buffer_t *)ih264_buf_mgr_get_next_free(
2246 (buf_mgr_t *)ps_dec->pv_pic_buf_mgr, &free_id);
2247
2248 if(ps_pic_buf == NULL)
2249 {
Manisha Jajood1e64cc2020-07-22 13:49:11 +0530[diff] [blame]2250 UWORD32 display_queued = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2251
2252 /* check if any buffer was given for display which is not returned yet */
2253 for(i = 0; i < (MAX_DISP_BUFS_NEW); i++)
2254 {
2255 if(0 != ps_dec->u4_disp_buf_mapping[i])
2256 {
2257 display_queued = 1;
2258 break;
2259 }
2260 }
2261 /* If some buffer is queued for display, then codec has to singal an error and wait
2262 for that buffer to be returned.
2263 If nothing is queued for display then codec has ownership of all display buffers
2264 and it can reuse any of the existing buffers and continue decoding */
2265
2266 if(1 == display_queued)
2267 {
2268 /* If something is queued for display wait for that buffer to be returned */
2269 ps_dec_op->u4_error_code = IVD_DEC_REF_BUF_NULL;
2270 ps_dec_op->u4_error_code |= (1
2271 << IVD_UNSUPPORTEDPARAM);
2272 return (IV_FAIL);
2273 }
2274 }
2275 else
2276 {
2277 /* If the buffer is with display, then mark it as in use and then look for a buffer again */
2278 if(1 == ps_dec->u4_disp_buf_mapping[free_id])
2279 {
2280 ih264_buf_mgr_set_status(
2281 (buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
2282 free_id,
2283 BUF_MGR_IO);
2284 }
2285 else
2286 {
2287 /**
2288 * Found a free buffer for present call. Release it now.
2289 * Will be again obtained later.
2290 */
2291 ih264_buf_mgr_release((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
2292 free_id,
2293 BUF_MGR_IO);
2294 break;
2295 }
2296 }
2297 }
2298
2299 }
2300
Hamsalekha Sd0ab5b02017-02-21 16:01:02 +0530[diff] [blame]2301 if(ps_dec->u1_flushfrm)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2302 {
Hamsalekha Sd0ab5b02017-02-21 16:01:02 +0530[diff] [blame]2303 if(ps_dec->u1_init_dec_flag == 0)
2304 {
2305 /*Come out of flush mode and return*/
2306 ps_dec->u1_flushfrm = 0;
2307 return (IV_FAIL);
2308 }
2309
2310
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2311
2312 ih264d_get_next_display_field(ps_dec, ps_dec->ps_out_buffer,
2313 &(ps_dec->s_disp_op));
2314 if(0 == ps_dec->s_disp_op.u4_error_code)
2315 {
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]2316 /* check output buffer size given by the application */
2317 if(check_app_out_buf_size(ps_dec) != IV_SUCCESS)
2318 {
2319 ps_dec_op->u4_error_code= IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
2320 return (IV_FAIL);
2321 }
2322
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2323 ps_dec->u4_fmt_conv_cur_row = 0;
2324 ps_dec->u4_fmt_conv_num_rows = ps_dec->s_disp_frame_info.u4_y_ht;
2325 ih264d_format_convert(ps_dec, &(ps_dec->s_disp_op),
2326 ps_dec->u4_fmt_conv_cur_row,
2327 ps_dec->u4_fmt_conv_num_rows);
2328 ps_dec->u4_fmt_conv_cur_row += ps_dec->u4_fmt_conv_num_rows;
2329 ps_dec->u4_output_present = 1;
2330
2331 }
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]2332 ih264d_export_sei_params(&ps_dec_op->s_sei_decode_op, ps_dec);
2333
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2334 ih264d_release_display_field(ps_dec, &(ps_dec->s_disp_op));
2335
2336 ps_dec_op->u4_pic_wd = (UWORD32)ps_dec->u2_disp_width;
2337 ps_dec_op->u4_pic_ht = (UWORD32)ps_dec->u2_disp_height;
Rakesh Kumarfe5a6ad2019-03-07 12:30:09 +0530[diff] [blame]2338 ps_dec_op->i4_reorder_depth = ps_dec->i4_reorder_depth;
2339 ps_dec_op->i4_display_index = ps_dec->i4_display_index;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2340
2341 ps_dec_op->u4_new_seq = 0;
2342
2343 ps_dec_op->u4_output_present = ps_dec->u4_output_present;
2344 ps_dec_op->u4_progressive_frame_flag =
2345 ps_dec->s_disp_op.u4_progressive_frame_flag;
2346 ps_dec_op->e_output_format =
2347 ps_dec->s_disp_op.e_output_format;
2348 ps_dec_op->s_disp_frm_buf = ps_dec->s_disp_op.s_disp_frm_buf;
2349 ps_dec_op->e4_fld_type = ps_dec->s_disp_op.e4_fld_type;
2350 ps_dec_op->u4_ts = ps_dec->s_disp_op.u4_ts;
2351 ps_dec_op->u4_disp_buf_id = ps_dec->s_disp_op.u4_disp_buf_id;
2352
2353 /*In the case of flush ,since no frame is decoded set pic type as invalid*/
2354 ps_dec_op->u4_is_ref_flag = -1;
2355 ps_dec_op->e_pic_type = IV_NA_FRAME;
2356 ps_dec_op->u4_frame_decoded_flag = 0;
2357
2358 if(0 == ps_dec->s_disp_op.u4_error_code)
2359 {
2360 return (IV_SUCCESS);
2361 }
2362 else
2363 return (IV_FAIL);
2364
2365 }
2366 if(ps_dec->u1_res_changed == 1)
2367 {
2368 /*if resolution has changed and all buffers have been flushed, reset decoder*/
2369 ih264d_init_decoder(ps_dec);
2370 }
2371
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2372 ps_dec->u2_cur_mb_addr = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2373 ps_dec->u2_total_mbs_coded = 0;
2374 ps_dec->u2_cur_slice_num = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2375 ps_dec->cur_dec_mb_num = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2376 ps_dec->cur_recon_mb_num = 0;
Harish Mahendrakar0b23c812017-01-16 14:43:42 +0530[diff] [blame]2377 ps_dec->u4_first_slice_in_pic = 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2378 ps_dec->u1_slice_header_done = 0;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2379 ps_dec->u1_dangling_field = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2380 ps_dec->u4_cur_bs_mb_num = 0;
Harish Mahendrakar5e4f64c2016-06-01 13:31:45 +0530[diff] [blame]2381 ps_dec->u4_start_recon_deblk = 0;
Hamsalekha Sfe183752017-05-22 14:10:15 +0530[diff] [blame]2382 ps_dec->u4_sps_cnt_in_process = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2383
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2384 DEBUG_THREADS_PRINTF(" Starting process call\n");
2385
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2386
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2387 ps_dec->u4_pic_buf_got = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2388
2389 do
2390 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2391 WORD32 buf_size;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2392
2393 pu1_buf = (UWORD8*)ps_dec_ip->pv_stream_buffer
2394 + ps_dec_op->u4_num_bytes_consumed;
2395
2396 u4_max_ofst = ps_dec_ip->u4_num_Bytes
2397 - ps_dec_op->u4_num_bytes_consumed;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2398
2399 /* If dynamic bitstream buffer is not allocated and
2400 * header decode is done, then allocate dynamic bitstream buffer
2401 */
2402 if((NULL == ps_dec->pu1_bits_buf_dynamic) &&
2403 (ps_dec->i4_header_decoded & 1))
2404 {
2405 WORD32 size;
2406
2407 void *pv_buf;
2408 void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
2409 size = MAX(256000, ps_dec->u2_pic_wd * ps_dec->u2_pic_ht * 3 / 2);
Hamsalekha Sf2b70d32017-07-04 17:06:50 +0530[diff] [blame]2410 pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128,
2411 size + EXTRA_BS_OFFSET);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2412 RETURN_IF((NULL == pv_buf), IV_FAIL);
Rakesh Kumar590ff562018-08-08 12:30:55 +0530[diff] [blame]2413 memset(pv_buf, 0, size + EXTRA_BS_OFFSET);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2414 ps_dec->pu1_bits_buf_dynamic = pv_buf;
2415 ps_dec->u4_dynamic_bits_buf_size = size;
2416 }
2417
2418 if(ps_dec->pu1_bits_buf_dynamic)
2419 {
2420 pu1_bitstrm_buf = ps_dec->pu1_bits_buf_dynamic;
2421 buf_size = ps_dec->u4_dynamic_bits_buf_size;
2422 }
2423 else
2424 {
2425 pu1_bitstrm_buf = ps_dec->pu1_bits_buf_static;
2426 buf_size = ps_dec->u4_static_bits_buf_size;
2427 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2428
2429 u4_next_is_aud = 0;
2430
2431 buflen = ih264d_find_start_code(pu1_buf, 0, u4_max_ofst,
2432 &u4_length_of_start_code,
2433 &u4_next_is_aud);
2434
2435 if(buflen == -1)
2436 buflen = 0;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2437 /* Ignore bytes beyond the allocated size of intermediate buffer */
Harish Mahendrakar33ef7de2016-12-23 15:29:14 +0530[diff] [blame]2438 /* Since 8 bytes are read ahead, ensure 8 bytes are free at the
2439 end of the buffer, which will be memset to 0 after emulation prevention */
2440 buflen = MIN(buflen, buf_size - 8);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2441
2442 bytes_consumed = buflen + u4_length_of_start_code;
2443 ps_dec_op->u4_num_bytes_consumed += bytes_consumed;
2444
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2445 if(buflen)
2446 {
2447 memcpy(pu1_bitstrm_buf, pu1_buf + u4_length_of_start_code,
2448 buflen);
Harish Mahendrakar7ba9f342015-08-26 16:17:55 +0530[diff] [blame]2449 /* Decoder may read extra 8 bytes near end of the frame */
2450 if((buflen + 8) < buf_size)
2451 {
2452 memset(pu1_bitstrm_buf + buflen, 0, 8);
2453 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2454 u4_first_start_code_found = 1;
2455
2456 }
2457 else
2458 {
2459 /*start code not found*/
2460
2461 if(u4_first_start_code_found == 0)
2462 {
2463 /*no start codes found in current process call*/
2464
2465 ps_dec->i4_error_code = ERROR_START_CODE_NOT_FOUND;
2466 ps_dec_op->u4_error_code |= 1 << IVD_INSUFFICIENTDATA;
2467
2468 if(ps_dec->u4_pic_buf_got == 0)
2469 {
2470
2471 ih264d_fill_output_struct_from_context(ps_dec,
2472 ps_dec_op);
2473
2474 ps_dec_op->u4_error_code = ps_dec->i4_error_code;
2475 ps_dec_op->u4_frame_decoded_flag = 0;
2476
2477 return (IV_FAIL);
2478 }
2479 else
2480 {
2481 ps_dec->u1_pic_decode_done = 1;
2482 continue;
2483 }
2484 }
2485 else
2486 {
2487 /* a start code has already been found earlier in the same process call*/
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2488 frame_data_left = 0;
Harish Mahendrakar2cd2f7a2017-01-16 11:26:26 +0530[diff] [blame]2489 header_data_left = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2490 continue;
2491 }
2492
2493 }
2494
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2495 ret = ih264d_parse_nal_unit(dec_hdl, ps_dec_op,
2496 pu1_bitstrm_buf, buflen);
2497 if(ret != OK)
2498 {
2499 UWORD32 error = ih264d_map_error(ret);
2500 ps_dec_op->u4_error_code = error | ret;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2501 api_ret_value = IV_FAIL;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2502
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2503 if((ret == IVD_RES_CHANGED)
Harish Mahendrakare027a112015-10-02 15:58:13 +0530[diff] [blame]2504 || (ret == IVD_MEM_ALLOC_FAILED)
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2505 || (ret == ERROR_UNAVAIL_PICBUF_T)
Harish Mahendrakar3a419ea2016-05-26 10:46:21 +0530[diff] [blame]2506 || (ret == ERROR_UNAVAIL_MVBUF_T)
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]2507 || (ret == ERROR_INV_SPS_PPS_T)
Harish Mahendrakar54160a62019-04-16 10:51:53 -0700[diff] [blame]2508 || (ret == ERROR_FEATURE_UNAVAIL)
2509 || (ret == IVD_STREAM_WIDTH_HEIGHT_NOT_SUPPORTED)
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]2510 || (ret == IVD_DISP_FRM_ZERO_OP_BUF_SIZE))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2511 {
Harish Mahendrakar3a419ea2016-05-26 10:46:21 +0530[diff] [blame]2512 ps_dec->u4_slice_start_code_found = 0;
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2513 break;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2514 }
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2515
2516 if((ret == ERROR_INCOMPLETE_FRAME) || (ret == ERROR_DANGLING_FIELD_IN_PIC))
2517 {
2518 ps_dec_op->u4_num_bytes_consumed -= bytes_consumed;
2519 api_ret_value = IV_FAIL;
2520 break;
2521 }
2522
2523 if(ret == ERROR_IN_LAST_SLICE_OF_PIC)
2524 {
2525 api_ret_value = IV_FAIL;
2526 break;
2527 }
2528
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2529 }
2530
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2531 header_data_left = ((ps_dec->i4_decode_header == 1)
2532 && (ps_dec->i4_header_decoded != 3)
2533 && (ps_dec_op->u4_num_bytes_consumed
2534 < ps_dec_ip->u4_num_Bytes));
2535 frame_data_left = (((ps_dec->i4_decode_header == 0)
2536 && ((ps_dec->u1_pic_decode_done == 0)
2537 || (u4_next_is_aud == 1)))
2538 && (ps_dec_op->u4_num_bytes_consumed
2539 < ps_dec_ip->u4_num_Bytes));
2540 }
2541 while(( header_data_left == 1)||(frame_data_left == 1));
2542
Hamsalekha S5df744a2017-06-22 16:55:28 +0530[diff] [blame]2543 if((ps_dec->u4_pic_buf_got == 1)
Harish Mahendrakare027a112015-10-02 15:58:13 +0530[diff] [blame]2544 && (ret != IVD_MEM_ALLOC_FAILED)
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2545 && ps_dec->u2_total_mbs_coded < ps_dec->u2_frm_ht_in_mbs * ps_dec->u2_frm_wd_in_mbs)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2546 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2547 // last slice - missing/corruption
2548 WORD32 num_mb_skipped;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2549 WORD32 prev_slice_err;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2550 pocstruct_t temp_poc;
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2551 WORD32 ret1;
Harish Mahendrakare1cf7ea2016-12-26 11:21:07 +0530[diff] [blame]2552 WORD32 ht_in_mbs;
2553 ht_in_mbs = ps_dec->u2_pic_ht >> (4 + ps_dec->ps_cur_slice->u1_field_pic_flag);
2554 num_mb_skipped = (ht_in_mbs * ps_dec->u2_frm_wd_in_mbs)
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2555 - ps_dec->u2_total_mbs_coded;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2556
Harish Mahendrakarc7a1cf42016-02-01 15:08:19 +0530[diff] [blame]2557 if(ps_dec->u4_first_slice_in_pic && (ps_dec->u4_pic_buf_got == 0))
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2558 prev_slice_err = 1;
2559 else
2560 prev_slice_err = 2;
2561
Harish Mahendrakarb9269052016-07-12 10:37:28 +0530[diff] [blame]2562 if(ps_dec->u4_first_slice_in_pic && (ps_dec->u2_total_mbs_coded == 0))
2563 prev_slice_err = 1;
2564
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2565 ret1 = ih264d_mark_err_slice_skip(ps_dec, num_mb_skipped, ps_dec->u1_nal_unit_type == IDR_SLICE_NAL, ps_dec->ps_cur_slice->u2_frame_num,
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2566 &temp_poc, prev_slice_err);
2567
Harish Mahendrakarc2e8ffe2016-09-17 14:04:29 +0530[diff] [blame]2568 if((ret1 == ERROR_UNAVAIL_PICBUF_T) || (ret1 == ERROR_UNAVAIL_MVBUF_T) ||
2569 (ret1 == ERROR_INV_SPS_PPS_T))
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2570 {
Harish Mahendrakarc2e8ffe2016-09-17 14:04:29 +0530[diff] [blame]2571 ret = ret1;
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2572 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2573 }
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2574
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2575 if((ret == IVD_RES_CHANGED)
Harish Mahendrakare027a112015-10-02 15:58:13 +0530[diff] [blame]2576 || (ret == IVD_MEM_ALLOC_FAILED)
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2577 || (ret == ERROR_UNAVAIL_PICBUF_T)
Harish Mahendrakar3a419ea2016-05-26 10:46:21 +0530[diff] [blame]2578 || (ret == ERROR_UNAVAIL_MVBUF_T)
2579 || (ret == ERROR_INV_SPS_PPS_T))
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2580 {
2581
2582 /* signal the decode thread */
2583 ih264d_signal_decode_thread(ps_dec);
2584 /* close deblock thread if it is not closed yet */
2585 if(ps_dec->u4_num_cores == 3)
2586 {
2587 ih264d_signal_bs_deblk_thread(ps_dec);
2588 }
Harish Mahendrakarc7a1cf42016-02-01 15:08:19 +0530[diff] [blame]2589 /* dont consume bitstream for change in resolution case */
2590 if(ret == IVD_RES_CHANGED)
2591 {
2592 ps_dec_op->u4_num_bytes_consumed -= bytes_consumed;
2593 }
Hamsalekha Se789d1d2015-07-10 13:41:00 +0530[diff] [blame]2594 return IV_FAIL;
2595 }
2596
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2597
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2598 if(ps_dec->u1_separate_parse)
2599 {
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2600 /* If Format conversion is not complete,
2601 complete it here */
2602 if(ps_dec->u4_num_cores == 2)
2603 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2604
2605 /*do deblocking of all mbs*/
2606 if((ps_dec->u4_nmb_deblk == 0) &&(ps_dec->u4_start_recon_deblk == 1) && (ps_dec->ps_cur_sps->u1_mb_aff_flag == 0))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2607 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2608 UWORD32 u4_num_mbs,u4_max_addr;
2609 tfr_ctxt_t s_tfr_ctxt;
2610 tfr_ctxt_t *ps_tfr_cxt = &s_tfr_ctxt;
2611 pad_mgr_t *ps_pad_mgr = &ps_dec->s_pad_mgr;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2612
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2613 /*BS is done for all mbs while parsing*/
2614 u4_max_addr = (ps_dec->u2_frm_wd_in_mbs * ps_dec->u2_frm_ht_in_mbs) - 1;
2615 ps_dec->u4_cur_bs_mb_num = u4_max_addr + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2616
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2617
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2618 ih264d_init_deblk_tfr_ctxt(ps_dec, ps_pad_mgr, ps_tfr_cxt,
2619 ps_dec->u2_frm_wd_in_mbs, 0);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2620
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2621
2622 u4_num_mbs = u4_max_addr
2623 - ps_dec->u4_cur_deblk_mb_num + 1;
2624
2625 DEBUG_PERF_PRINTF("mbs left for deblocking= %d \n",u4_num_mbs);
2626
2627 if(u4_num_mbs != 0)
2628 ih264d_check_mb_map_deblk(ps_dec, u4_num_mbs,
2629 ps_tfr_cxt,1);
2630
2631 ps_dec->u4_start_recon_deblk = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2632
2633 }
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2634
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2635 }
2636
2637 /*signal the decode thread*/
2638 ih264d_signal_decode_thread(ps_dec);
2639 /* close deblock thread if it is not closed yet*/
2640 if(ps_dec->u4_num_cores == 3)
2641 {
2642 ih264d_signal_bs_deblk_thread(ps_dec);
2643 }
2644 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2645
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2646
2647 DATA_SYNC();
2648
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2649
2650 if((ps_dec_op->u4_error_code & 0xff)
2651 != ERROR_DYNAMIC_RESOLUTION_NOT_SUPPORTED)
2652 {
2653 ps_dec_op->u4_pic_wd = (UWORD32)ps_dec->u2_disp_width;
2654 ps_dec_op->u4_pic_ht = (UWORD32)ps_dec->u2_disp_height;
Rakesh Kumarfe5a6ad2019-03-07 12:30:09 +0530[diff] [blame]2655 ps_dec_op->i4_reorder_depth = ps_dec->i4_reorder_depth;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2656 }
2657
2658//Report if header (sps and pps) has not been decoded yet
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2659 if(ps_dec->i4_decode_header == 1 && ps_dec->i4_header_decoded != 3)
2660 {
2661 ps_dec_op->u4_error_code |= (1 << IVD_INSUFFICIENTDATA);
Ritu Baldwab3427a42018-03-28 13:22:45 +0530[diff] [blame]2662 api_ret_value = IV_FAIL;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2663 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2664
Hamsalekha S5df744a2017-06-22 16:55:28 +0530[diff] [blame]2665 if((ps_dec->u4_pic_buf_got == 1)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2666 && (ERROR_DANGLING_FIELD_IN_PIC != i4_err_status))
2667 {
2668 /*
2669 * For field pictures, set the bottom and top picture decoded u4_flag correctly.
2670 */
2671
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2672 if(ps_dec->ps_cur_slice->u1_field_pic_flag)
2673 {
2674 if(1 == ps_dec->ps_cur_slice->u1_bottom_field_flag)
2675 {
2676 ps_dec->u1_top_bottom_decoded |= BOT_FIELD_ONLY;
2677 }
2678 else
2679 {
2680 ps_dec->u1_top_bottom_decoded |= TOP_FIELD_ONLY;
2681 }
2682 }
Hamsalekha S77038222017-05-08 17:03:06 +0530[diff] [blame]2683 else
2684 {
2685 ps_dec->u1_top_bottom_decoded = TOP_FIELD_ONLY | BOT_FIELD_ONLY;
2686 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2687
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2688 /* if new frame in not found (if we are still getting slices from previous frame)
2689 * ih264d_deblock_display is not called. Such frames will not be added to reference /display
2690 */
Hamsalekha S5df744a2017-06-22 16:55:28 +0530[diff] [blame]2691 if ((ps_dec->ps_dec_err_status->u1_err_flag & REJECT_CUR_PIC) == 0)
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2692 {
2693 /* Calling Function to deblock Picture and Display */
2694 ret = ih264d_deblock_display(ps_dec);
Hamsalekha S9f0dcba2015-06-09 15:54:31 +0530[diff] [blame]2695 }
2696
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2697
2698 /*set to complete ,as we dont support partial frame decode*/
2699 if(ps_dec->i4_header_decoded == 3)
2700 {
2701 ps_dec->u2_total_mbs_coded = ps_dec->ps_cur_sps->u2_max_mb_addr + 1;
2702 }
2703
2704 /*Update the i4_frametype at the end of picture*/
2705 if(ps_dec->ps_cur_slice->u1_nal_unit_type == IDR_SLICE_NAL)
2706 {
2707 ps_dec->i4_frametype = IV_IDR_FRAME;
2708 }
2709 else if(ps_dec->i4_pic_type == B_SLICE)
2710 {
2711 ps_dec->i4_frametype = IV_B_FRAME;
2712 }
2713 else if(ps_dec->i4_pic_type == P_SLICE)
2714 {
2715 ps_dec->i4_frametype = IV_P_FRAME;
2716 }
2717 else if(ps_dec->i4_pic_type == I_SLICE)
2718 {
2719 ps_dec->i4_frametype = IV_I_FRAME;
2720 }
2721 else
2722 {
2723 H264_DEC_DEBUG_PRINT("Shouldn't come here\n");
2724 }
2725
2726 //Update the content type
2727 ps_dec->i4_content_type = ps_dec->ps_cur_slice->u1_field_pic_flag;
2728
2729 ps_dec->u4_total_frames_decoded = ps_dec->u4_total_frames_decoded + 2;
2730 ps_dec->u4_total_frames_decoded = ps_dec->u4_total_frames_decoded
2731 - ps_dec->ps_cur_slice->u1_field_pic_flag;
2732
2733 }
2734
2735 /* close deblock thread if it is not closed yet*/
Manisha Jajood1e64cc2020-07-22 13:49:11 +0530[diff] [blame]2736#ifndef KEEP_THREADS_ACTIVE
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2737 if(ps_dec->u4_num_cores == 3)
2738 {
2739 ih264d_signal_bs_deblk_thread(ps_dec);
2740 }
Manisha Jajood1e64cc2020-07-22 13:49:11 +0530[diff] [blame]2741#endif
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2742
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2743
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2744 {
2745 /* In case the decoder is configured to run in low delay mode,
2746 * then get display buffer and then format convert.
2747 * Note in this mode, format conversion does not run paralelly in a thread and adds to the codec cycles
2748 */
2749
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2750 if((IVD_DECODE_FRAME_OUT == ps_dec->e_frm_out_mode)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2751 && ps_dec->u1_init_dec_flag)
2752 {
2753
2754 ih264d_get_next_display_field(ps_dec, ps_dec->ps_out_buffer,
2755 &(ps_dec->s_disp_op));
2756 if(0 == ps_dec->s_disp_op.u4_error_code)
2757 {
2758 ps_dec->u4_fmt_conv_cur_row = 0;
2759 ps_dec->u4_output_present = 1;
2760 }
2761 }
2762
2763 ih264d_fill_output_struct_from_context(ps_dec, ps_dec_op);
2764
2765 /* If Format conversion is not complete,
2766 complete it here */
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2767 if(ps_dec->u4_output_present &&
2768 (ps_dec->u4_fmt_conv_cur_row < ps_dec->s_disp_frame_info.u4_y_ht))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2769 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2770 ps_dec->u4_fmt_conv_num_rows = ps_dec->s_disp_frame_info.u4_y_ht
2771 - ps_dec->u4_fmt_conv_cur_row;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2772 ih264d_format_convert(ps_dec, &(ps_dec->s_disp_op),
2773 ps_dec->u4_fmt_conv_cur_row,
2774 ps_dec->u4_fmt_conv_num_rows);
2775 ps_dec->u4_fmt_conv_cur_row += ps_dec->u4_fmt_conv_num_rows;
2776 }
2777
2778 ih264d_release_display_field(ps_dec, &(ps_dec->s_disp_op));
2779 }
2780
2781 if(ps_dec->i4_decode_header == 1 && (ps_dec->i4_header_decoded & 1) == 1)
2782 {
2783 ps_dec_op->u4_progressive_frame_flag = 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2784 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2785 {
2786 if((0 == ps_dec->ps_sps->u1_frame_mbs_only_flag)
2787 && (0 == ps_dec->ps_sps->u1_mb_aff_flag))
2788 ps_dec_op->u4_progressive_frame_flag = 0;
2789
2790 }
2791 }
2792
Harish Mahendrakar49456122017-01-05 12:10:47 +0530[diff] [blame]2793 if((TOP_FIELD_ONLY | BOT_FIELD_ONLY) == ps_dec->u1_top_bottom_decoded)
2794 {
2795 ps_dec->u1_top_bottom_decoded = 0;
2796 }
2797 /*--------------------------------------------------------------------*/
2798 /* Do End of Pic processing. */
2799 /* Should be called only if frame was decoded in previous process call*/
2800 /*--------------------------------------------------------------------*/
2801 if(ps_dec->u4_pic_buf_got == 1)
2802 {
2803 if(1 == ps_dec->u1_last_pic_not_decoded)
2804 {
2805 ret = ih264d_end_of_pic_dispbuf_mgr(ps_dec);
2806
2807 if(ret != OK)
2808 return ret;
2809
2810 ret = ih264d_end_of_pic(ps_dec);
2811 if(ret != OK)
2812 return ret;
2813 }
2814 else
2815 {
2816 ret = ih264d_end_of_pic(ps_dec);
2817 if(ret != OK)
2818 return ret;
2819 }
2820
2821 }
2822
2823
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2824 /*Data memory barrier instruction,so that yuv write by the library is complete*/
2825 DATA_SYNC();
2826
2827 H264_DEC_DEBUG_PRINT("The num bytes consumed: %d\n",
2828 ps_dec_op->u4_num_bytes_consumed);
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2829 return api_ret_value;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2830}
2831
2832WORD32 ih264d_get_version(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
2833{
2834 char version_string[MAXVERSION_STRLEN + 1];
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2835 UWORD32 version_string_len;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2836
2837 ivd_ctl_getversioninfo_ip_t *ps_ip;
2838 ivd_ctl_getversioninfo_op_t *ps_op;
2839
2840 ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
2841 ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
2842 UNUSED(dec_hdl);
2843 ps_op->u4_error_code = IV_SUCCESS;
2844
2845 VERSION(version_string, CODEC_NAME, CODEC_RELEASE_TYPE, CODEC_RELEASE_VER,
2846 CODEC_VENDOR);
2847
2848 if((WORD32)ps_ip->u4_version_buffer_size <= 0)
2849 {
2850 ps_op->u4_error_code = IH264D_VERS_BUF_INSUFFICIENT;
2851 return (IV_FAIL);
2852 }
2853
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2854 version_string_len = strnlen(version_string, MAXVERSION_STRLEN) + 1;
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2855
2856 if(ps_ip->u4_version_buffer_size >= version_string_len) //(WORD32)sizeof(sizeof(version_string)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2857 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2858 memcpy(ps_ip->pv_version_buffer, version_string, version_string_len);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2859 ps_op->u4_error_code = IV_SUCCESS;
2860 }
2861 else
2862 {
2863 ps_op->u4_error_code = IH264D_VERS_BUF_INSUFFICIENT;
2864 return IV_FAIL;
2865 }
2866 return (IV_SUCCESS);
2867}
2868
2869/*****************************************************************************/
2870/* */
2871/* Function Name : ih264d_get_display_frame */
2872/* */
2873/* Description : */
2874/* Inputs :iv_obj_t decoder handle */
2875/* :pv_api_ip pointer to input structure */
2876/* :pv_api_op pointer to output structure */
2877/* Outputs : */
2878/* Returns : void */
2879/* */
2880/* Issues : none */
2881/* */
2882/* Revision History: */
2883/* */
2884/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2885/* 22 10 2008 100356 Draft */
2886/* */
2887/*****************************************************************************/
2888WORD32 ih264d_get_display_frame(iv_obj_t *dec_hdl,
2889 void *pv_api_ip,
2890 void *pv_api_op)
2891{
2892
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]2893 UNUSED(dec_hdl);
2894 UNUSED(pv_api_ip);
2895 UNUSED(pv_api_op);
2896 // This function is no longer needed, output is returned in the process()
2897 return IV_FAIL;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2898}
2899
2900/*****************************************************************************/
2901/* */
2902/* Function Name : ih264d_set_display_frame */
2903/* */
2904/* Description : */
2905/* */
2906/* Inputs :iv_obj_t decoder handle */
2907/* :pv_api_ip pointer to input structure */
2908/* :pv_api_op pointer to output structure */
2909/* Outputs : */
2910/* Returns : void */
2911/* */
2912/* Issues : none */
2913/* */
2914/* Revision History: */
2915/* */
2916/* DD MM YYYY Author(s) Changes (Describe the changes made) */
2917/* 22 10 2008 100356 Draft */
2918/* */
2919/*****************************************************************************/
2920WORD32 ih264d_set_display_frame(iv_obj_t *dec_hdl,
2921 void *pv_api_ip,
2922 void *pv_api_op)
2923{
2924
Ritu Baldwa3692ace2017-12-22 14:20:20 +0530[diff] [blame]2925 UWORD32 u4_disp_buf_size[3], u4_num_disp_bufs;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2926 ivd_set_display_frame_ip_t *dec_disp_ip;
2927 ivd_set_display_frame_op_t *dec_disp_op;
2928
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]2929 UWORD32 i;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2930 dec_struct_t * ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
2931
2932 dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2933 dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2934 dec_disp_op->u4_error_code = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2935
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2936
2937 ps_dec->u4_num_disp_bufs = 0;
2938 if(ps_dec->u4_share_disp_buf)
2939 {
2940 UWORD32 u4_num_bufs = dec_disp_ip->num_disp_bufs;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2941
2942 u4_num_bufs = MIN(u4_num_bufs, MAX_DISP_BUFS_NEW);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2943
2944 ps_dec->u4_num_disp_bufs = u4_num_bufs;
Ritu Baldwa3692ace2017-12-22 14:20:20 +0530[diff] [blame]2945
2946 /* Get the number and sizes of the first buffer. Compare this with the
2947 * rest to make sure all the buffers are of the same size.
2948 */
2949 u4_num_disp_bufs = dec_disp_ip->s_disp_buffer[0].u4_num_bufs;
2950
2951 u4_disp_buf_size[0] =
2952 dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[0];
2953 u4_disp_buf_size[1] =
2954 dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1];
2955 u4_disp_buf_size[2] =
2956 dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[2];
2957
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2958 for(i = 0; i < u4_num_bufs; i++)
2959 {
Ritu Baldwa3692ace2017-12-22 14:20:20 +0530[diff] [blame]2960 if(dec_disp_ip->s_disp_buffer[i].u4_num_bufs != u4_num_disp_bufs)
2961 {
2962 return IV_FAIL;
2963 }
2964
2965 if((dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[0]
2966 != u4_disp_buf_size[0])
2967 || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[1]
2968 != u4_disp_buf_size[1])
2969 || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[2]
2970 != u4_disp_buf_size[2]))
2971 {
2972 return IV_FAIL;
2973 }
2974
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]2975 ps_dec->disp_bufs[i].u4_num_bufs =
2976 dec_disp_ip->s_disp_buffer[i].u4_num_bufs;
2977
2978 ps_dec->disp_bufs[i].buf[0] =
2979 dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2980 ps_dec->disp_bufs[i].buf[1] =
2981 dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2982 ps_dec->disp_bufs[i].buf[2] =
2983 dec_disp_ip->s_disp_buffer[i].pu1_bufs[2];
2984
2985 ps_dec->disp_bufs[i].u4_bufsize[0] =
2986 dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[0];
2987 ps_dec->disp_bufs[i].u4_bufsize[1] =
2988 dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[1];
2989 ps_dec->disp_bufs[i].u4_bufsize[2] =
2990 dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[2];
2991
2992 }
2993 }
2994 return IV_SUCCESS;
2995
2996}
2997
2998/*****************************************************************************/
2999/* */
3000/* Function Name : ih264d_set_flush_mode */
3001/* */
3002/* Description : */
3003/* */
3004/* Inputs :iv_obj_t decoder handle */
3005/* :pv_api_ip pointer to input structure */
3006/* :pv_api_op pointer to output structure */
3007/* Globals : <Does it use any global variables?> */
3008/* Outputs : */
3009/* Returns : void */
3010/* */
3011/* Issues : none */
3012/* */
3013/* Revision History: */
3014/* */
3015/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3016/* 22 10 2008 100356 Draft */
3017/* */
3018/*****************************************************************************/
3019WORD32 ih264d_set_flush_mode(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3020{
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3021 dec_struct_t * ps_dec;
3022 ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t*)pv_api_op;
3023 ps_ctl_op->u4_error_code = 0;
3024
3025 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3026 UNUSED(pv_api_ip);
3027 /* ! */
3028 /* Signal flush frame control call */
3029 ps_dec->u1_flushfrm = 1;
3030
Harish Mahendrakar59348122015-09-02 09:01:40 +0530[diff] [blame]3031 if(ps_dec->u1_init_dec_flag == 1)
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3032 {
Harish Mahendrakar59348122015-09-02 09:01:40 +0530[diff] [blame]3033 ih264d_release_pics_in_dpb((void *)ps_dec, ps_dec->u1_pic_bufs);
3034 ih264d_release_display_bufs(ps_dec);
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3035 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3036
Harish Mahendrakar59348122015-09-02 09:01:40 +0530[diff] [blame]3037 ps_ctl_op->u4_error_code = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3038
Harish Mahendrakar4b6344b2016-10-21 11:11:38 +0530[diff] [blame]3039 /* Ignore dangling fields during flush */
3040 ps_dec->u1_top_bottom_decoded = 0;
3041
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3042 return IV_SUCCESS;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3043}
3044
3045/*****************************************************************************/
3046/* */
3047/* Function Name : ih264d_get_status */
3048/* */
3049/* Description : */
3050/* */
3051/* Inputs :iv_obj_t decoder handle */
3052/* :pv_api_ip pointer to input structure */
3053/* :pv_api_op pointer to output structure */
3054/* Globals : <Does it use any global variables?> */
3055/* Outputs : */
3056/* Returns : void */
3057/* */
3058/* Issues : none */
3059/* */
3060/* Revision History: */
3061/* */
3062/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3063/* 22 10 2008 100356 Draft */
3064/* */
3065/*****************************************************************************/
3066
3067WORD32 ih264d_get_status(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3068{
3069
3070 UWORD32 i;
3071 dec_struct_t * ps_dec;
3072 UWORD32 pic_wd, pic_ht;
3073 ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t*)pv_api_op;
3074 UNUSED(pv_api_ip);
3075 ps_ctl_op->u4_error_code = 0;
3076
3077 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3078
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3079
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3080 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3081 {
3082 ps_ctl_op->u4_pic_ht = ps_dec->u2_disp_height;
3083 ps_ctl_op->u4_pic_wd = ps_dec->u2_disp_width;
3084
3085 if(0 == ps_dec->u4_share_disp_buf)
3086 {
3087 pic_wd = ps_dec->u2_disp_width;
3088 pic_ht = ps_dec->u2_disp_height;
3089
3090 }
3091 else
3092 {
3093 pic_wd = ps_dec->u2_frm_wd_y;
3094 pic_ht = ps_dec->u2_frm_ht_y;
3095 }
3096 }
3097 else
3098 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3099 pic_wd = 0;
3100 pic_ht = 0;
3101
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3102 ps_ctl_op->u4_pic_ht = pic_wd;
3103 ps_ctl_op->u4_pic_wd = pic_ht;
3104
3105 if(1 == ps_dec->u4_share_disp_buf)
3106 {
3107 pic_wd += (PAD_LEN_Y_H << 1);
3108 pic_ht += (PAD_LEN_Y_V << 2);
3109
3110 }
3111
3112 }
3113
3114 if(ps_dec->u4_app_disp_width > pic_wd)
3115 pic_wd = ps_dec->u4_app_disp_width;
3116 if(0 == ps_dec->u4_share_disp_buf)
3117 ps_ctl_op->u4_num_disp_bufs = 1;
3118 else
3119 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3120 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3121 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3122 if((ps_dec->ps_cur_sps->u1_vui_parameters_present_flag == 1) &&
3123 (1 == ps_dec->ps_cur_sps->s_vui.u1_bitstream_restriction_flag))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3124 {
3125 ps_ctl_op->u4_num_disp_bufs =
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3126 ps_dec->ps_cur_sps->s_vui.u4_num_reorder_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3127 }
3128 else
3129 {
3130 /*if VUI is not present assume maximum possible refrence frames for the level,
3131 * as max reorder frames*/
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3132 ps_ctl_op->u4_num_disp_bufs = ih264d_get_dpb_size(ps_dec->ps_cur_sps);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3133 }
3134
3135 ps_ctl_op->u4_num_disp_bufs +=
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3136 ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3137 }
3138 else
3139 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3140 ps_ctl_op->u4_num_disp_bufs = 32;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3141 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3142 ps_ctl_op->u4_num_disp_bufs = MAX(
3143 ps_ctl_op->u4_num_disp_bufs, 6);
3144 ps_ctl_op->u4_num_disp_bufs = MIN(
3145 ps_ctl_op->u4_num_disp_bufs, 32);
3146 }
3147
3148 ps_ctl_op->u4_error_code = ps_dec->i4_error_code;
3149
3150 ps_ctl_op->u4_frame_rate = 0; //make it proper
3151 ps_ctl_op->u4_bit_rate = 0; //make it proper
3152 ps_ctl_op->e_content_type = ps_dec->i4_content_type;
3153 ps_ctl_op->e_output_chroma_format = ps_dec->u1_chroma_format;
3154 ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
3155
3156 if(ps_dec->u1_chroma_format == IV_YUV_420P)
3157 {
3158 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
3159 }
3160 else if(ps_dec->u1_chroma_format == IV_YUV_422ILE)
3161 {
3162 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
3163 }
3164 else if(ps_dec->u1_chroma_format == IV_RGB_565)
3165 {
3166 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
3167 }
3168 else if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
3169 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
3170 {
3171 ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
3172 }
3173
3174 else
3175 {
3176 //Invalid chroma format; Error code may be updated, verify in testing if needed
3177 ps_ctl_op->u4_error_code = ERROR_FEATURE_UNAVAIL;
3178 return IV_FAIL;
3179 }
3180
3181 for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
3182 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3183 ps_ctl_op->u4_min_in_buf_size[i] = MAX(256000, pic_wd * pic_ht * 3 / 2);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3184 }
3185
3186 /*!*/
3187 if(ps_dec->u1_chroma_format == IV_YUV_420P)
3188 {
3189 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht);
3190 ps_ctl_op->u4_min_out_buf_size[1] = (pic_wd * pic_ht)
3191 >> 2;
3192 ps_ctl_op->u4_min_out_buf_size[2] = (pic_wd * pic_ht)
3193 >> 2;
3194 }
3195 else if(ps_dec->u1_chroma_format == IV_YUV_422ILE)
3196 {
3197 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht)
3198 * 2;
3199 ps_ctl_op->u4_min_out_buf_size[1] =
3200 ps_ctl_op->u4_min_out_buf_size[2] = 0;
3201 }
3202 else if(ps_dec->u1_chroma_format == IV_RGB_565)
3203 {
3204 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht)
3205 * 2;
3206 ps_ctl_op->u4_min_out_buf_size[1] =
3207 ps_ctl_op->u4_min_out_buf_size[2] = 0;
3208 }
3209 else if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
3210 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
3211 {
3212 ps_ctl_op->u4_min_out_buf_size[0] = (pic_wd * pic_ht);
3213 ps_ctl_op->u4_min_out_buf_size[1] = (pic_wd * pic_ht)
3214 >> 1;
3215 ps_ctl_op->u4_min_out_buf_size[2] = 0;
3216 }
3217
3218 ps_dec->u4_num_disp_bufs_requested = ps_ctl_op->u4_num_disp_bufs;
3219 return IV_SUCCESS;
3220}
3221
3222/*****************************************************************************/
3223/* */
3224/* Function Name : ih264d_get_buf_info */
3225/* */
3226/* Description : */
3227/* */
3228/* Inputs :iv_obj_t decoder handle */
3229/* :pv_api_ip pointer to input structure */
3230/* :pv_api_op pointer to output structure */
3231/* Globals : <Does it use any global variables?> */
3232/* Outputs : */
3233/* Returns : void */
3234/* */
3235/* Issues : none */
3236/* */
3237/* Revision History: */
3238/* */
3239/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3240/* 22 10 2008 100356 Draft */
3241/* */
3242/*****************************************************************************/
3243WORD32 ih264d_get_buf_info(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3244{
3245
3246 dec_struct_t * ps_dec;
3247 UWORD8 i = 0; // Default for 420P format
3248 UWORD16 pic_wd, pic_ht;
3249 ivd_ctl_getbufinfo_op_t *ps_ctl_op =
3250 (ivd_ctl_getbufinfo_op_t*)pv_api_op;
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]3251 UWORD32 au4_min_out_buf_size[IVD_VIDDEC_MAX_IO_BUFFERS];
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3252 UNUSED(pv_api_ip);
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]3253
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3254 ps_ctl_op->u4_error_code = 0;
3255
3256 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3257
3258 ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3259
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3260
3261 ps_ctl_op->u4_num_disp_bufs = 1;
3262
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3263
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3264 pic_wd = 0;
3265 pic_ht = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3266
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3267 if(ps_dec->i4_header_decoded == 3)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3268 {
3269
3270 if(0 == ps_dec->u4_share_disp_buf)
3271 {
3272 pic_wd = ps_dec->u2_disp_width;
3273 pic_ht = ps_dec->u2_disp_height;
3274
3275 }
3276 else
3277 {
3278 pic_wd = ps_dec->u2_frm_wd_y;
3279 pic_ht = ps_dec->u2_frm_ht_y;
3280 }
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3281
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3282 }
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3283
3284 for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3285 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3286 ps_ctl_op->u4_min_in_buf_size[i] = MAX(256000, pic_wd * pic_ht * 3 / 2);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3287 }
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3288 if((WORD32)ps_dec->u4_app_disp_width > pic_wd)
3289 pic_wd = ps_dec->u4_app_disp_width;
3290
3291 if(0 == ps_dec->u4_share_disp_buf)
3292 ps_ctl_op->u4_num_disp_bufs = 1;
3293 else
3294 {
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3295 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3296 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3297 if((ps_dec->ps_cur_sps->u1_vui_parameters_present_flag == 1) &&
3298 (1 == ps_dec->ps_cur_sps->s_vui.u1_bitstream_restriction_flag))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3299 {
3300 ps_ctl_op->u4_num_disp_bufs =
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3301 ps_dec->ps_cur_sps->s_vui.u4_num_reorder_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3302 }
3303 else
3304 {
3305 /*if VUI is not present assume maximum possible refrence frames for the level,
3306 * as max reorder frames*/
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3307 ps_ctl_op->u4_num_disp_bufs = ih264d_get_dpb_size(ps_dec->ps_cur_sps);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3308 }
3309
3310 ps_ctl_op->u4_num_disp_bufs +=
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3311 ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3312
3313 }
3314 else
3315 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3316 ps_ctl_op->u4_num_disp_bufs = 32;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3317
3318 }
3319
3320 ps_ctl_op->u4_num_disp_bufs = MAX(
3321 ps_ctl_op->u4_num_disp_bufs, 6);
3322 ps_ctl_op->u4_num_disp_bufs = MIN(
3323 ps_ctl_op->u4_num_disp_bufs, 32);
3324 }
3325
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]3326 ps_ctl_op->u4_min_num_out_bufs = ih264d_get_outbuf_size(
3327 pic_wd, pic_ht, ps_dec->u1_chroma_format,
3328 &au4_min_out_buf_size[0]);
3329
3330 for(i = 0; i < ps_ctl_op->u4_min_num_out_bufs; i++)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3331 {
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]3332 ps_ctl_op->u4_min_out_buf_size[i] = au4_min_out_buf_size[i];
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3333 }
Hamsalekha S3f6c9412017-06-01 11:44:39 +0530[diff] [blame]3334
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3335 ps_dec->u4_num_disp_bufs_requested = ps_ctl_op->u4_num_disp_bufs;
3336
3337 return IV_SUCCESS;
3338}
3339
3340/*****************************************************************************/
3341/* */
3342/* Function Name : ih264d_set_params */
3343/* */
3344/* Description : */
3345/* */
3346/* Inputs :iv_obj_t decoder handle */
3347/* :pv_api_ip pointer to input structure */
3348/* :pv_api_op pointer to output structure */
3349/* Outputs : */
3350/* Returns : void */
3351/* */
3352/* Issues : none */
3353/* */
3354/* Revision History: */
3355/* */
3356/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3357/* 22 10 2008 100356 Draft */
3358/* */
3359/*****************************************************************************/
3360WORD32 ih264d_set_params(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3361{
3362
3363 dec_struct_t * ps_dec;
3364 WORD32 ret = IV_SUCCESS;
3365
Shivaansh Agrawal2205f2d2020-12-18 00:25:54 +0530[diff] [blame]3366 ih264d_ctl_set_config_ip_t *ps_h264d_ctl_ip =
3367 (ih264d_ctl_set_config_ip_t *)pv_api_ip;
3368 ih264d_ctl_set_config_op_t *ps_h264d_ctl_op =
3369 (ih264d_ctl_set_config_op_t *)pv_api_op;;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3370 ivd_ctl_set_config_ip_t *ps_ctl_ip =
Shivaansh Agrawal2205f2d2020-12-18 00:25:54 +0530[diff] [blame]3371 &ps_h264d_ctl_ip->s_ivd_ctl_set_config_ip_t;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3372 ivd_ctl_set_config_op_t *ps_ctl_op =
Shivaansh Agrawal2205f2d2020-12-18 00:25:54 +0530[diff] [blame]3373 &ps_h264d_ctl_op->s_ivd_ctl_set_config_op_t;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3374
3375 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3376
3377 ps_dec->u4_skip_frm_mask = 0;
3378
3379 ps_ctl_op->u4_error_code = 0;
3380
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3381 if(ps_ctl_ip->e_frm_skip_mode != IVD_SKIP_NONE)
3382 {
Harish Mahendrakar4f95fc02019-04-15 09:29:47 -0700[diff] [blame]3383 ps_ctl_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
3384 ret = IV_FAIL;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3385 }
3386
Harish Mahendrakara0036e72020-07-08 17:20:27 -0700[diff] [blame]3387 if(ps_ctl_ip->u4_disp_wd >= ps_dec->u2_disp_width)
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3388 {
Harish Mahendrakarcbf620e2015-12-18 10:01:50 +0530[diff] [blame]3389 ps_dec->u4_app_disp_width = ps_ctl_ip->u4_disp_wd;
3390 }
3391 else if(0 == ps_dec->i4_header_decoded)
3392 {
3393 ps_dec->u4_app_disp_width = ps_ctl_ip->u4_disp_wd;
3394 }
3395 else if(ps_ctl_ip->u4_disp_wd == 0)
3396 {
3397 ps_dec->u4_app_disp_width = 0;
3398 }
3399 else
3400 {
3401 /*
3402 * Set the display width to zero. This will ensure that the wrong value we had stored (0xFFFFFFFF)
3403 * does not propogate.
3404 */
3405 ps_dec->u4_app_disp_width = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3406 ps_ctl_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
3407 ps_ctl_op->u4_error_code |= ERROR_DISP_WIDTH_INVALID;
3408 ret = IV_FAIL;
3409 }
Harish Mahendrakarcbf620e2015-12-18 10:01:50 +0530[diff] [blame]3410
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3411 if(ps_ctl_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
3412 ps_dec->i4_decode_header = 0;
3413 else if(ps_ctl_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
3414 ps_dec->i4_decode_header = 1;
3415 else
3416 {
3417 ps_ctl_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
3418 ps_dec->i4_decode_header = 1;
3419 ret = IV_FAIL;
3420 }
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3421 ps_dec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3422
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3423 if((ps_ctl_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
3424 (ps_ctl_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
3425 {
3426 ps_ctl_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
3427 ret = IV_FAIL;
3428 }
3429 ps_dec->e_frm_out_mode = ps_ctl_ip->e_frm_out_mode;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3430 return ret;
3431
3432}
3433
3434/*****************************************************************************/
3435/* */
3436/* Function Name : ih264d_set_default_params */
3437/* */
3438/* Description : */
3439/* */
3440/* Inputs :iv_obj_t decoder handle */
3441/* :pv_api_ip pointer to input structure */
3442/* :pv_api_op pointer to output structure */
3443/* Outputs : */
3444/* Returns : void */
3445/* */
3446/* Issues : none */
3447/* */
3448/* Revision History: */
3449/* */
3450/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3451/* 08 08 2011 100421 Copied from set_params */
3452/* */
3453/*****************************************************************************/
3454WORD32 ih264d_set_default_params(iv_obj_t *dec_hdl,
3455 void *pv_api_ip,
3456 void *pv_api_op)
3457{
3458
3459 dec_struct_t * ps_dec;
3460 WORD32 ret = IV_SUCCESS;
3461
3462 ivd_ctl_set_config_op_t *ps_ctl_op =
3463 (ivd_ctl_set_config_op_t *)pv_api_op;
3464 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3465 UNUSED(pv_api_ip);
3466
3467
3468 {
3469 ps_dec->u4_app_disp_width = 0;
3470 ps_dec->u4_skip_frm_mask = 0;
3471 ps_dec->i4_decode_header = 1;
3472
3473 ps_ctl_op->u4_error_code = 0;
3474 }
3475
3476
3477 return ret;
3478}
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3479/*****************************************************************************/
3480/* */
3481/* Function Name : ih264d_reset */
3482/* */
3483/* Description : */
3484/* */
3485/* Inputs :iv_obj_t decoder handle */
3486/* :pv_api_ip pointer to input structure */
3487/* :pv_api_op pointer to output structure */
3488/* Globals : <Does it use any global variables?> */
3489/* Outputs : */
3490/* Returns : void */
3491/* */
3492/* Issues : none */
3493/* */
3494/* Revision History: */
3495/* */
3496/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3497/* 22 10 2008 100356 Draft */
3498/* */
3499/*****************************************************************************/
3500WORD32 ih264d_delete(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3501{
3502 dec_struct_t *ps_dec;
3503 ih264d_delete_ip_t *ps_ip = (ih264d_delete_ip_t *)pv_api_ip;
3504 ih264d_delete_op_t *ps_op = (ih264d_delete_op_t *)pv_api_op;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3505
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3506 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
3507 UNUSED(ps_ip);
3508 ps_op->s_ivd_delete_op_t.u4_error_code = 0;
3509 ih264d_free_dynamic_bufs(ps_dec);
3510 ih264d_free_static_bufs(dec_hdl);
3511 return IV_SUCCESS;
3512}
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3513/*****************************************************************************/
3514/* */
3515/* Function Name : ih264d_reset */
3516/* */
3517/* Description : */
3518/* */
3519/* Inputs :iv_obj_t decoder handle */
3520/* :pv_api_ip pointer to input structure */
3521/* :pv_api_op pointer to output structure */
3522/* Globals : <Does it use any global variables?> */
3523/* Outputs : */
3524/* Returns : void */
3525/* */
3526/* Issues : none */
3527/* */
3528/* Revision History: */
3529/* */
3530/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3531/* 22 10 2008 100356 Draft */
3532/* */
3533/*****************************************************************************/
3534WORD32 ih264d_reset(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3535{
3536 dec_struct_t * ps_dec;
3537 ivd_ctl_reset_op_t *ps_ctl_op = (ivd_ctl_reset_op_t *)pv_api_op;
3538 UNUSED(pv_api_ip);
3539 ps_ctl_op->u4_error_code = 0;
3540
3541 ps_dec = (dec_struct_t *)(dec_hdl->pv_codec_handle);
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3542
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3543 if(ps_dec != NULL)
3544 {
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3545 ih264d_init_decoder(ps_dec);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3546 }
3547 else
3548 {
3549 H264_DEC_DEBUG_PRINT(
3550 "\nReset called without Initializing the decoder\n");
3551 ps_ctl_op->u4_error_code = ERROR_INIT_NOT_DONE;
3552 }
3553
3554 return IV_SUCCESS;
3555}
3556
3557/*****************************************************************************/
3558/* */
3559/* Function Name : ih264d_ctl */
3560/* */
3561/* Description : */
3562/* */
3563/* Inputs :iv_obj_t decoder handle */
3564/* :pv_api_ip pointer to input structure */
3565/* :pv_api_op pointer to output structure */
3566/* Outputs : */
3567/* Returns : void */
3568/* */
3569/* Issues : none */
3570/* */
3571/* Revision History: */
3572/* */
3573/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3574/* 22 10 2008 100356 Draft */
3575/* */
3576/*****************************************************************************/
3577WORD32 ih264d_ctl(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
3578{
3579 ivd_ctl_set_config_ip_t *ps_ctl_ip;
3580 ivd_ctl_set_config_op_t *ps_ctl_op;
3581 WORD32 ret = IV_SUCCESS;
3582 UWORD32 subcommand;
3583 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3584
3585 if(ps_dec->init_done != 1)
3586 {
3587 //Return proper Error Code
3588 return IV_FAIL;
3589 }
3590 ps_ctl_ip = (ivd_ctl_set_config_ip_t*)pv_api_ip;
3591 ps_ctl_op = (ivd_ctl_set_config_op_t*)pv_api_op;
3592 ps_ctl_op->u4_error_code = 0;
3593 subcommand = ps_ctl_ip->e_sub_cmd;
3594
3595 switch(subcommand)
3596 {
3597 case IVD_CMD_CTL_GETPARAMS:
3598 ret = ih264d_get_status(dec_hdl, (void *)pv_api_ip,
3599 (void *)pv_api_op);
3600 break;
3601 case IVD_CMD_CTL_SETPARAMS:
3602 ret = ih264d_set_params(dec_hdl, (void *)pv_api_ip,
3603 (void *)pv_api_op);
3604 break;
3605 case IVD_CMD_CTL_RESET:
3606 ret = ih264d_reset(dec_hdl, (void *)pv_api_ip, (void *)pv_api_op);
3607 break;
3608 case IVD_CMD_CTL_SETDEFAULT:
3609 ret = ih264d_set_default_params(dec_hdl, (void *)pv_api_ip,
3610 (void *)pv_api_op);
3611 break;
3612 case IVD_CMD_CTL_FLUSH:
3613 ret = ih264d_set_flush_mode(dec_hdl, (void *)pv_api_ip,
3614 (void *)pv_api_op);
3615 break;
3616 case IVD_CMD_CTL_GETBUFINFO:
3617 ret = ih264d_get_buf_info(dec_hdl, (void *)pv_api_ip,
3618 (void *)pv_api_op);
3619 break;
3620 case IVD_CMD_CTL_GETVERSION:
3621 ret = ih264d_get_version(dec_hdl, (void *)pv_api_ip,
3622 (void *)pv_api_op);
3623 break;
3624 case IH264D_CMD_CTL_DEGRADE:
3625 ret = ih264d_set_degrade(dec_hdl, (void *)pv_api_ip,
3626 (void *)pv_api_op);
3627 break;
3628
3629 case IH264D_CMD_CTL_SET_NUM_CORES:
3630 ret = ih264d_set_num_cores(dec_hdl, (void *)pv_api_ip,
3631 (void *)pv_api_op);
3632 break;
3633 case IH264D_CMD_CTL_GET_BUFFER_DIMENSIONS:
3634 ret = ih264d_get_frame_dimensions(dec_hdl, (void *)pv_api_ip,
3635 (void *)pv_api_op);
3636 break;
Harish Mahendrakard5953ce2016-04-26 16:20:31 +0530[diff] [blame]3637 case IH264D_CMD_CTL_GET_VUI_PARAMS:
3638 ret = ih264d_get_vui_params(dec_hdl, (void *)pv_api_ip,
3639 (void *)pv_api_op);
3640 break;
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]3641 case IH264D_CMD_CTL_GET_SEI_MDCV_PARAMS:
3642 ret = ih264d_get_sei_mdcv_params(dec_hdl, (void *)pv_api_ip,
3643 (void *)pv_api_op);
3644 break;
3645 case IH264D_CMD_CTL_GET_SEI_CLL_PARAMS:
3646 ret = ih264d_get_sei_cll_params(dec_hdl, (void *)pv_api_ip,
3647 (void *)pv_api_op);
3648 break;
3649 case IH264D_CMD_CTL_GET_SEI_AVE_PARAMS:
3650 ret = ih264d_get_sei_ave_params(dec_hdl, (void *)pv_api_ip,
3651 (void *)pv_api_op);
3652 break;
3653 case IH264D_CMD_CTL_GET_SEI_CCV_PARAMS:
3654 ret = ih264d_get_sei_ccv_params(dec_hdl, (void *)pv_api_ip,
3655 (void *)pv_api_op);
3656 break;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3657 case IH264D_CMD_CTL_SET_PROCESSOR:
3658 ret = ih264d_set_processor(dec_hdl, (void *)pv_api_ip,
3659 (void *)pv_api_op);
3660 break;
3661 default:
3662 H264_DEC_DEBUG_PRINT("\ndo nothing\n")
3663 ;
3664 break;
3665 }
3666
3667 return ret;
3668}
3669/*****************************************************************************/
3670/* */
3671/* Function Name : ih264d_rel_display_frame */
3672/* */
3673/* Description : */
3674/* */
3675/* Inputs :iv_obj_t decoder handle */
3676/* :pv_api_ip pointer to input structure */
3677/* :pv_api_op pointer to output structure */
3678/* Outputs : */
3679/* Returns : void */
3680/* */
3681/* Issues : none */
3682/* */
3683/* Revision History: */
3684/* */
3685/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3686/* 22 10 2008 100356 Draft */
3687/* */
3688/*****************************************************************************/
3689WORD32 ih264d_rel_display_frame(iv_obj_t *dec_hdl,
3690 void *pv_api_ip,
3691 void *pv_api_op)
3692{
3693
3694 ivd_rel_display_frame_ip_t *ps_rel_ip;
3695 ivd_rel_display_frame_op_t *ps_rel_op;
3696 UWORD32 buf_released = 0;
3697
Isha Kulkarni34769a52019-01-28 17:43:35 +0530[diff] [blame]3698 UWORD32 u4_ts = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3699 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3700
3701 ps_rel_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
3702 ps_rel_op = (ivd_rel_display_frame_op_t *)pv_api_op;
3703 ps_rel_op->u4_error_code = 0;
3704 u4_ts = ps_rel_ip->u4_disp_buf_id;
3705
3706 if(0 == ps_dec->u4_share_disp_buf)
3707 {
3708 ps_dec->u4_disp_buf_mapping[u4_ts] = 0;
3709 ps_dec->u4_disp_buf_to_be_freed[u4_ts] = 0;
3710 return IV_SUCCESS;
3711 }
3712
3713 if(ps_dec->pv_pic_buf_mgr != NULL)
3714 {
3715 if(1 == ps_dec->u4_disp_buf_mapping[u4_ts])
3716 {
3717 ih264_buf_mgr_release((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
3718 ps_rel_ip->u4_disp_buf_id,
3719 BUF_MGR_IO);
3720 ps_dec->u4_disp_buf_mapping[u4_ts] = 0;
3721 buf_released = 1;
3722 }
3723 }
3724
3725 if((1 == ps_dec->u4_share_disp_buf) && (0 == buf_released))
3726 ps_dec->u4_disp_buf_to_be_freed[u4_ts] = 1;
3727
3728 return IV_SUCCESS;
3729}
3730
3731/**
3732 *******************************************************************************
3733 *
3734 * @brief
3735 * Sets degrade params
3736 *
3737 * @par Description:
3738 * Sets degrade params.
3739 * Refer to ih264d_ctl_degrade_ip_t definition for details
3740 *
3741 * @param[in] ps_codec_obj
3742 * Pointer to codec object at API level
3743 *
3744 * @param[in] pv_api_ip
3745 * Pointer to input argument structure
3746 *
3747 * @param[out] pv_api_op
3748 * Pointer to output argument structure
3749 *
3750 * @returns Status
3751 *
3752 * @remarks
3753 *
3754 *
3755 *******************************************************************************
3756 */
3757
3758WORD32 ih264d_set_degrade(iv_obj_t *ps_codec_obj,
3759 void *pv_api_ip,
3760 void *pv_api_op)
3761{
3762 ih264d_ctl_degrade_ip_t *ps_ip;
3763 ih264d_ctl_degrade_op_t *ps_op;
3764 dec_struct_t *ps_codec = (dec_struct_t *)ps_codec_obj->pv_codec_handle;
3765
3766 ps_ip = (ih264d_ctl_degrade_ip_t *)pv_api_ip;
3767 ps_op = (ih264d_ctl_degrade_op_t *)pv_api_op;
3768
3769 ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
3770 ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
3771 ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
3772
3773 ps_op->u4_error_code = 0;
3774 ps_codec->i4_degrade_pic_cnt = 0;
3775
3776 return IV_SUCCESS;
3777}
3778
3779WORD32 ih264d_get_frame_dimensions(iv_obj_t *dec_hdl,
3780 void *pv_api_ip,
3781 void *pv_api_op)
3782{
3783 ih264d_ctl_get_frame_dimensions_ip_t *ps_ip;
3784 ih264d_ctl_get_frame_dimensions_op_t *ps_op;
3785 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3786 UWORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
3787
3788 ps_ip = (ih264d_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3789
3790 ps_op = (ih264d_ctl_get_frame_dimensions_op_t *)pv_api_op;
3791 UNUSED(ps_ip);
Marco Nelissen8ef4c3f2015-06-03 07:26:32 -0700[diff] [blame]3792 if((NULL != ps_dec->ps_cur_sps) && (1 == (ps_dec->ps_cur_sps->u1_is_valid)))
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3793 {
3794 disp_wd = ps_dec->u2_disp_width;
3795 disp_ht = ps_dec->u2_disp_height;
3796
3797 if(0 == ps_dec->u4_share_disp_buf)
3798 {
3799 buffer_wd = disp_wd;
3800 buffer_ht = disp_ht;
3801 }
3802 else
3803 {
3804 buffer_wd = ps_dec->u2_frm_wd_y;
3805 buffer_ht = ps_dec->u2_frm_ht_y;
3806 }
3807 }
3808 else
3809 {
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]3810 disp_wd = 0;
3811 disp_ht = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3812
3813 if(0 == ps_dec->u4_share_disp_buf)
3814 {
3815 buffer_wd = disp_wd;
3816 buffer_ht = disp_ht;
3817 }
3818 else
3819 {
3820 buffer_wd = ALIGN16(disp_wd) + (PAD_LEN_Y_H << 1);
3821 buffer_ht = ALIGN16(disp_ht) + (PAD_LEN_Y_V << 2);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]3822 }
3823 }
3824 if(ps_dec->u4_app_disp_width > buffer_wd)
3825 buffer_wd = ps_dec->u4_app_disp_width;
3826
3827 if(0 == ps_dec->u4_share_disp_buf)
3828 {
3829 x_offset = 0;
3830 y_offset = 0;
3831 }
3832 else
3833 {
3834 y_offset = (PAD_LEN_Y_V << 1);
3835 x_offset = PAD_LEN_Y_H;
3836
3837 if((NULL != ps_dec->ps_sps) && (1 == (ps_dec->ps_sps->u1_is_valid))
3838 && (0 != ps_dec->u2_crop_offset_y))
3839 {
3840 y_offset += ps_dec->u2_crop_offset_y / ps_dec->u2_frm_wd_y;
3841 x_offset += ps_dec->u2_crop_offset_y % ps_dec->u2_frm_wd_y;
3842 }
3843 }
3844
3845 ps_op->u4_disp_wd[0] = disp_wd;
3846 ps_op->u4_disp_ht[0] = disp_ht;
3847 ps_op->u4_buffer_wd[0] = buffer_wd;
3848 ps_op->u4_buffer_ht[0] = buffer_ht;
3849 ps_op->u4_x_offset[0] = x_offset;
3850 ps_op->u4_y_offset[0] = y_offset;
3851
3852 ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3853 >> 1);
3854 ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3855 >> 1);
3856 ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3857 >> 1);
3858 ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3859 >> 1);
3860 ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] =
3861 (ps_op->u4_x_offset[0] >> 1);
3862 ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] =
3863 (ps_op->u4_y_offset[0] >> 1);
3864
3865 if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
3866 || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU))
3867 {
3868 ps_op->u4_disp_wd[2] = 0;
3869 ps_op->u4_disp_ht[2] = 0;
3870 ps_op->u4_buffer_wd[2] = 0;
3871 ps_op->u4_buffer_ht[2] = 0;
3872 ps_op->u4_x_offset[2] = 0;
3873 ps_op->u4_y_offset[2] = 0;
3874
3875 ps_op->u4_disp_wd[1] <<= 1;
3876 ps_op->u4_buffer_wd[1] <<= 1;
3877 ps_op->u4_x_offset[1] <<= 1;
3878 }
3879
3880 return IV_SUCCESS;
3881
3882}
3883
Harish Mahendrakard5953ce2016-04-26 16:20:31 +0530[diff] [blame]3884WORD32 ih264d_get_vui_params(iv_obj_t *dec_hdl,
3885 void *pv_api_ip,
3886 void *pv_api_op)
3887{
3888 ih264d_ctl_get_vui_params_ip_t *ps_ip;
3889 ih264d_ctl_get_vui_params_op_t *ps_op;
3890 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3891 dec_seq_params_t *ps_sps;
3892 vui_t *ps_vui;
3893 WORD32 i;
3894 UWORD32 u4_size;
3895
3896 ps_ip = (ih264d_ctl_get_vui_params_ip_t *)pv_api_ip;
3897 ps_op = (ih264d_ctl_get_vui_params_op_t *)pv_api_op;
3898 UNUSED(ps_ip);
3899
3900 u4_size = ps_op->u4_size;
3901 memset(ps_op, 0, sizeof(ih264d_ctl_get_vui_params_op_t));
3902 ps_op->u4_size = u4_size;
3903
3904 if(NULL == ps_dec->ps_cur_sps)
3905 {
3906 ps_op->u4_error_code = ERROR_VUI_PARAMS_NOT_FOUND;
3907 return IV_FAIL;
3908 }
3909
3910 ps_sps = ps_dec->ps_cur_sps;
3911 if((0 == ps_sps->u1_is_valid)
3912 || (0 == ps_sps->u1_vui_parameters_present_flag))
3913 {
3914 ps_op->u4_error_code = ERROR_VUI_PARAMS_NOT_FOUND;
3915 return IV_FAIL;
3916 }
3917
3918 ps_vui = &ps_sps->s_vui;
3919
3920 ps_op->u1_aspect_ratio_idc = ps_vui->u1_aspect_ratio_idc;
3921 ps_op->u2_sar_width = ps_vui->u2_sar_width;
3922 ps_op->u2_sar_height = ps_vui->u2_sar_height;
3923 ps_op->u1_overscan_appropriate_flag = ps_vui->u1_overscan_appropriate_flag;
3924 ps_op->u1_video_format = ps_vui->u1_video_format;
3925 ps_op->u1_video_full_range_flag = ps_vui->u1_video_full_range_flag;
3926 ps_op->u1_colour_primaries = ps_vui->u1_colour_primaries;
3927 ps_op->u1_tfr_chars = ps_vui->u1_tfr_chars;
3928 ps_op->u1_matrix_coeffs = ps_vui->u1_matrix_coeffs;
3929 ps_op->u1_cr_top_field = ps_vui->u1_cr_top_field;
3930 ps_op->u1_cr_bottom_field = ps_vui->u1_cr_bottom_field;
3931 ps_op->u4_num_units_in_tick = ps_vui->u4_num_units_in_tick;
3932 ps_op->u4_time_scale = ps_vui->u4_time_scale;
3933 ps_op->u1_fixed_frame_rate_flag = ps_vui->u1_fixed_frame_rate_flag;
3934 ps_op->u1_nal_hrd_params_present = ps_vui->u1_nal_hrd_params_present;
3935 ps_op->u1_vcl_hrd_params_present = ps_vui->u1_vcl_hrd_params_present;
3936 ps_op->u1_low_delay_hrd_flag = ps_vui->u1_low_delay_hrd_flag;
3937 ps_op->u1_pic_struct_present_flag = ps_vui->u1_pic_struct_present_flag;
3938 ps_op->u1_bitstream_restriction_flag = ps_vui->u1_bitstream_restriction_flag;
3939 ps_op->u1_mv_over_pic_boundaries_flag = ps_vui->u1_mv_over_pic_boundaries_flag;
3940 ps_op->u4_max_bytes_per_pic_denom = ps_vui->u4_max_bytes_per_pic_denom;
3941 ps_op->u4_max_bits_per_mb_denom = ps_vui->u4_max_bits_per_mb_denom;
3942 ps_op->u4_log2_max_mv_length_horz = ps_vui->u4_log2_max_mv_length_horz;
3943 ps_op->u4_log2_max_mv_length_vert = ps_vui->u4_log2_max_mv_length_vert;
3944 ps_op->u4_num_reorder_frames = ps_vui->u4_num_reorder_frames;
3945 ps_op->u4_max_dec_frame_buffering = ps_vui->u4_max_dec_frame_buffering;
3946
3947 return IV_SUCCESS;
3948}
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]3949/*****************************************************************************/
3950/* */
3951/* Function Name : ih264d_get_sei_mdcv_params */
3952/* */
3953/* Description : This function populates SEI mdcv message in */
3954/* output structure */
3955/* Inputs : iv_obj_t decoder handle */
3956/* : pv_api_ip pointer to input structure */
3957/* : pv_api_op pointer to output structure */
3958/* Outputs : */
3959/* Returns : returns 0; 1 with error code when MDCV is not present */
3960/* */
3961/* Issues : none */
3962/* */
3963/* Revision History: */
3964/* */
3965/* DD MM YYYY Author(s) Changes (Describe the changes made) */
3966/* */
3967/* */
3968/*****************************************************************************/
3969WORD32 ih264d_get_sei_mdcv_params(iv_obj_t *dec_hdl,
3970 void *pv_api_ip,
3971 void *pv_api_op)
3972{
3973 ih264d_ctl_get_sei_mdcv_params_ip_t *ps_ip;
3974 ih264d_ctl_get_sei_mdcv_params_op_t *ps_op;
3975 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
3976 sei_mdcv_params_t *ps_sei_mdcv;
3977 WORD32 i4_count;
3978
3979 ps_ip = (ih264d_ctl_get_sei_mdcv_params_ip_t *)pv_api_ip;
3980 ps_op = (ih264d_ctl_get_sei_mdcv_params_op_t *)pv_api_op;
3981 UNUSED(ps_ip);
3982
3983 if(0 == ps_dec->s_sei_export.u1_sei_mdcv_params_present_flag)
3984 {
3985 ps_op->u4_error_code = ERROR_SEI_MDCV_PARAMS_NOT_FOUND;
3986 return IV_FAIL;
3987 }
3988
3989 ps_sei_mdcv = &ps_dec->s_sei_export.s_sei_mdcv_params;
3990
3991 for(i4_count = 0; i4_count < NUM_SEI_MDCV_PRIMARIES; i4_count++)
3992 {
3993 ps_op->au2_display_primaries_x[i4_count] = ps_sei_mdcv->au2_display_primaries_x[i4_count];
3994 ps_op->au2_display_primaries_y[i4_count] = ps_sei_mdcv->au2_display_primaries_y[i4_count];
3995 }
3996
3997 ps_op->u2_white_point_x = ps_sei_mdcv->u2_white_point_x;
3998 ps_op->u2_white_point_y = ps_sei_mdcv->u2_white_point_y;
3999 ps_op->u4_max_display_mastering_luminance = ps_sei_mdcv->u4_max_display_mastering_luminance;
4000 ps_op->u4_min_display_mastering_luminance = ps_sei_mdcv->u4_min_display_mastering_luminance;
4001
4002 return IV_SUCCESS;
4003}
4004
4005/*****************************************************************************/
4006/* */
4007/* Function Name : ih264d_get_sei_cll_params */
4008/* */
4009/* Description : This function populates SEI cll message in */
4010/* output structure */
4011/* Inputs : iv_obj_t decoder handle */
4012/* : pv_api_ip pointer to input structure */
4013/* : pv_api_op pointer to output structure */
4014/* Outputs : */
4015/* Returns : returns 0; 1 with error code when CLL is not present */
4016/* */
4017/* Issues : none */
4018/* */
4019/* Revision History: */
4020/* */
4021/* DD MM YYYY Author(s) Changes (Describe the changes made) */
4022/* */
4023/* */
4024/*****************************************************************************/
4025WORD32 ih264d_get_sei_cll_params(iv_obj_t *dec_hdl,
4026 void *pv_api_ip,
4027 void *pv_api_op)
4028{
4029 ih264d_ctl_get_sei_cll_params_ip_t *ps_ip;
4030 ih264d_ctl_get_sei_cll_params_op_t *ps_op;
4031 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
4032 sei_cll_params_t *ps_sei_cll;
4033
4034 ps_ip = (ih264d_ctl_get_sei_cll_params_ip_t *)pv_api_ip;
4035 ps_op = (ih264d_ctl_get_sei_cll_params_op_t *)pv_api_op;
4036 UNUSED(ps_ip);
4037
4038 if(0 == ps_dec->s_sei_export.u1_sei_cll_params_present_flag)
4039 {
4040 ps_op->u4_error_code = ERROR_SEI_CLL_PARAMS_NOT_FOUND;
4041 return IV_FAIL;
4042 }
4043
4044 ps_sei_cll = &ps_dec->s_sei_export.s_sei_cll_params;
4045
4046 ps_op->u2_max_content_light_level = ps_sei_cll->u2_max_content_light_level;
4047 ps_op->u2_max_pic_average_light_level = ps_sei_cll->u2_max_pic_average_light_level;
4048
4049 return IV_SUCCESS;
4050}
4051
4052/*****************************************************************************/
4053/* */
4054/* Function Name : ih264d_get_sei_ave_params */
4055/* */
4056/* Description : This function populates SEI ave message in */
4057/* output structure */
4058/* Inputs : iv_obj_t decoder handle */
4059/* : pv_api_ip pointer to input structure */
4060/* : pv_api_op pointer to output structure */
4061/* Outputs : */
4062/* Returns : returns 0; 1 with error code when AVE is not present */
4063/* */
4064/* Issues : none */
4065/* */
4066/* Revision History: */
4067/* */
4068/* DD MM YYYY Author(s) Changes (Describe the changes made) */
4069/* */
4070/* */
4071/*****************************************************************************/
4072WORD32 ih264d_get_sei_ave_params(iv_obj_t *dec_hdl,
4073 void *pv_api_ip,
4074 void *pv_api_op)
4075{
4076 ih264d_ctl_get_sei_ave_params_ip_t *ps_ip;
4077 ih264d_ctl_get_sei_ave_params_op_t *ps_op;
4078 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
4079 sei_ave_params_t *ps_sei_ave;
4080
4081 ps_ip = (ih264d_ctl_get_sei_ave_params_ip_t *)pv_api_ip;
4082 ps_op = (ih264d_ctl_get_sei_ave_params_op_t *)pv_api_op;
4083 UNUSED(ps_ip);
4084
4085 if(0 == ps_dec->s_sei_export.u1_sei_ave_params_present_flag)
4086 {
4087 ps_op->u4_error_code = ERROR_SEI_AVE_PARAMS_NOT_FOUND;
4088 return IV_FAIL;
4089 }
4090
4091 ps_sei_ave = &ps_dec->s_sei_export.s_sei_ave_params;
4092
4093 ps_op->u4_ambient_illuminance = ps_sei_ave->u4_ambient_illuminance;
4094 ps_op->u2_ambient_light_x = ps_sei_ave->u2_ambient_light_x;
4095 ps_op->u2_ambient_light_y = ps_sei_ave->u2_ambient_light_y;
4096
4097 return IV_SUCCESS;
4098}
4099
4100/*****************************************************************************/
4101/* */
4102/* Function Name : ih264d_get_sei_ccv_params */
4103/* */
4104/* Description : This function populates SEI mdcv message in */
4105/* output structure */
4106/* Inputs : iv_obj_t decoder handle */
4107/* : pv_api_ip pointer to input structure */
4108/* : pv_api_op pointer to output structure */
4109/* Outputs : */
4110/* Returns : returns 0; 1 with error code when CCV is not present */
4111/* */
4112/* Issues : none */
4113/* */
4114/* Revision History: */
4115/* */
4116/* DD MM YYYY Author(s) Changes (Describe the changes made) */
4117/* */
4118/* */
4119/*****************************************************************************/
4120WORD32 ih264d_get_sei_ccv_params(iv_obj_t *dec_hdl,
4121 void *pv_api_ip,
4122 void *pv_api_op)
4123{
4124 ih264d_ctl_get_sei_ccv_params_ip_t *ps_ip;
4125 ih264d_ctl_get_sei_ccv_params_op_t *ps_op;
4126 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
4127 sei_ccv_params_t *ps_sei_ccv;
4128 WORD32 i4_count;
4129
4130 ps_ip = (ih264d_ctl_get_sei_ccv_params_ip_t *)pv_api_ip;
4131 ps_op = (ih264d_ctl_get_sei_ccv_params_op_t *)pv_api_op;
4132 UNUSED(ps_ip);
4133
4134 if(0 == ps_dec->s_sei_export.u1_sei_ccv_params_present_flag)
4135 {
4136 ps_op->u4_error_code = ERROR_SEI_CCV_PARAMS_NOT_FOUND;
4137 return IV_FAIL;
4138 }
4139
4140 ps_sei_ccv = &ps_dec->s_sei_export.s_sei_ccv_params;
4141
4142 ps_op->u1_ccv_cancel_flag = ps_sei_ccv->u1_ccv_cancel_flag;
4143
4144 if(0 == ps_op->u1_ccv_cancel_flag)
4145 {
4146 ps_op->u1_ccv_persistence_flag = ps_sei_ccv->u1_ccv_persistence_flag;
4147 ps_op->u1_ccv_primaries_present_flag = ps_sei_ccv->u1_ccv_primaries_present_flag;
4148 ps_op->u1_ccv_min_luminance_value_present_flag =
4149 ps_sei_ccv->u1_ccv_min_luminance_value_present_flag;
4150 ps_op->u1_ccv_max_luminance_value_present_flag =
4151 ps_sei_ccv->u1_ccv_max_luminance_value_present_flag;
4152 ps_op->u1_ccv_avg_luminance_value_present_flag =
4153 ps_sei_ccv->u1_ccv_avg_luminance_value_present_flag;
4154 ps_op->u1_ccv_reserved_zero_2bits = ps_sei_ccv->u1_ccv_reserved_zero_2bits;
4155
4156 if(1 == ps_sei_ccv->u1_ccv_primaries_present_flag)
4157 {
4158 for(i4_count = 0; i4_count < NUM_SEI_CCV_PRIMARIES; i4_count++)
4159 {
4160 ps_op->ai4_ccv_primaries_x[i4_count] = ps_sei_ccv->ai4_ccv_primaries_x[i4_count];
4161 ps_op->ai4_ccv_primaries_y[i4_count] = ps_sei_ccv->ai4_ccv_primaries_y[i4_count];
4162 }
4163 }
4164
4165 if(1 == ps_sei_ccv->u1_ccv_min_luminance_value_present_flag)
4166 {
4167 ps_op->u4_ccv_min_luminance_value = ps_sei_ccv->u4_ccv_min_luminance_value;
4168 }
4169 if(1 == ps_sei_ccv->u1_ccv_max_luminance_value_present_flag)
4170 {
4171 ps_op->u4_ccv_max_luminance_value = ps_sei_ccv->u4_ccv_max_luminance_value;
4172 }
4173 if(1 == ps_sei_ccv->u1_ccv_avg_luminance_value_present_flag)
4174 {
4175 ps_op->u4_ccv_avg_luminance_value = ps_sei_ccv->u4_ccv_avg_luminance_value;
4176 }
4177 }
4178
4179 return IV_SUCCESS;
4180}
Harish Mahendrakard5953ce2016-04-26 16:20:31 +0530[diff] [blame]4181
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]4182WORD32 ih264d_set_num_cores(iv_obj_t *dec_hdl, void *pv_api_ip, void *pv_api_op)
4183{
4184 ih264d_ctl_set_num_cores_ip_t *ps_ip;
4185 ih264d_ctl_set_num_cores_op_t *ps_op;
4186 dec_struct_t *ps_dec = dec_hdl->pv_codec_handle;
4187
4188 ps_ip = (ih264d_ctl_set_num_cores_ip_t *)pv_api_ip;
4189 ps_op = (ih264d_ctl_set_num_cores_op_t *)pv_api_op;
4190 ps_op->u4_error_code = 0;
4191 ps_dec->u4_num_cores = ps_ip->u4_num_cores;
4192 if(ps_dec->u4_num_cores == 1)
4193 {
4194 ps_dec->u1_separate_parse = 0;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]4195 }
4196 else
4197 {
4198 ps_dec->u1_separate_parse = 1;
4199 }
4200
4201 /*using only upto three threads currently*/
4202 if(ps_dec->u4_num_cores > 3)
4203 ps_dec->u4_num_cores = 3;
4204
4205 return IV_SUCCESS;
4206}
4207
4208void ih264d_fill_output_struct_from_context(dec_struct_t *ps_dec,
4209 ivd_video_decode_op_t *ps_dec_op)
4210{
4211 if((ps_dec_op->u4_error_code & 0xff)
4212 != ERROR_DYNAMIC_RESOLUTION_NOT_SUPPORTED)
4213 {
4214 ps_dec_op->u4_pic_wd = (UWORD32)ps_dec->u2_disp_width;
4215 ps_dec_op->u4_pic_ht = (UWORD32)ps_dec->u2_disp_height;
4216 }
Rakesh Kumarfe5a6ad2019-03-07 12:30:09 +0530[diff] [blame]4217 ps_dec_op->i4_reorder_depth = ps_dec->i4_reorder_depth;
4218 ps_dec_op->i4_display_index = ps_dec->i4_display_index;
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]4219 ps_dec_op->e_pic_type = ps_dec->i4_frametype;
4220
4221 ps_dec_op->u4_new_seq = 0;
4222 ps_dec_op->u4_output_present = ps_dec->u4_output_present;
4223 ps_dec_op->u4_progressive_frame_flag =
4224 ps_dec->s_disp_op.u4_progressive_frame_flag;
4225
4226 ps_dec_op->u4_is_ref_flag = 1;
4227 if(ps_dec_op->u4_frame_decoded_flag)
4228 {
4229 if(ps_dec->ps_cur_slice->u1_nal_ref_idc == 0)
4230 ps_dec_op->u4_is_ref_flag = 0;
4231 }
4232
4233 ps_dec_op->e_output_format = ps_dec->s_disp_op.e_output_format;
4234 ps_dec_op->s_disp_frm_buf = ps_dec->s_disp_op.s_disp_frm_buf;
4235 ps_dec_op->e4_fld_type = ps_dec->s_disp_op.e4_fld_type;
4236 ps_dec_op->u4_ts = ps_dec->s_disp_op.u4_ts;
4237 ps_dec_op->u4_disp_buf_id = ps_dec->s_disp_op.u4_disp_buf_id;
Chamarthi Kishoread2eaf82019-10-01 11:59:43 +0530[diff] [blame]4238
4239 ih264d_export_sei_params(&ps_dec_op->s_sei_decode_op, ps_dec);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]4240}
4241
4242/*****************************************************************************/
4243/* */
4244/* Function Name : ih264d_api_function */
4245/* */
4246/* Description : */
4247/* */
4248/* Inputs :iv_obj_t decoder handle */
4249/* :pv_api_ip pointer to input structure */
4250/* :pv_api_op pointer to output structure */
4251/* Outputs : */
4252/* Returns : void */
4253/* */
4254/* Issues : none */
4255/* */
4256/* Revision History: */
4257/* */
4258/* DD MM YYYY Author(s) Changes (Describe the changes made) */
4259/* 22 10 2008 100356 Draft */
4260/* */
4261/*****************************************************************************/
4262IV_API_CALL_STATUS_T ih264d_api_function(iv_obj_t *dec_hdl,
4263 void *pv_api_ip,
4264 void *pv_api_op)
4265{
4266 UWORD32 command;
4267 UWORD32 *pu2_ptr_cmd;
4268 UWORD32 u4_api_ret;
4269 IV_API_CALL_STATUS_T e_status;
4270 e_status = api_check_struct_sanity(dec_hdl, pv_api_ip, pv_api_op);
4271
4272 if(e_status != IV_SUCCESS)
4273 {
4274 UWORD32 *ptr_err;
4275
4276 ptr_err = (UWORD32 *)pv_api_op;
4277 UNUSED(ptr_err);
4278 H264_DEC_DEBUG_PRINT("error code = %d\n", *(ptr_err + 1));
4279 return IV_FAIL;
4280 }
4281
4282 pu2_ptr_cmd = (UWORD32 *)pv_api_ip;
4283 pu2_ptr_cmd++;
4284
4285 command = *pu2_ptr_cmd;
4286// H264_DEC_DEBUG_PRINT("inside lib = %d\n",command);
4287 switch(command)
4288 {
4289
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]4290 case IVD_CMD_CREATE:
4291 u4_api_ret = ih264d_create(dec_hdl, (void *)pv_api_ip,
4292 (void *)pv_api_op);
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]4293 break;
Harish Mahendrakar251b0072015-08-04 09:55:15 +0530[diff] [blame]4294 case IVD_CMD_DELETE:
4295 u4_api_ret = ih264d_delete(dec_hdl, (void *)pv_api_ip,
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]4296 (void *)pv_api_op);
4297 break;
4298
4299 case IVD_CMD_VIDEO_DECODE:
4300 u4_api_ret = ih264d_video_decode(dec_hdl, (void *)pv_api_ip,
4301 (void *)pv_api_op);
4302 break;
4303
4304 case IVD_CMD_GET_DISPLAY_FRAME:
4305 u4_api_ret = ih264d_get_display_frame(dec_hdl, (void *)pv_api_ip,
4306 (void *)pv_api_op);
4307
4308 break;
4309
4310 case IVD_CMD_SET_DISPLAY_FRAME:
4311 u4_api_ret = ih264d_set_display_frame(dec_hdl, (void *)pv_api_ip,
4312 (void *)pv_api_op);
4313
4314 break;
4315
4316 case IVD_CMD_REL_DISPLAY_FRAME:
4317 u4_api_ret = ih264d_rel_display_frame(dec_hdl, (void *)pv_api_ip,
4318 (void *)pv_api_op);
4319 break;
4320
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530[diff] [blame]4321 case IVD_CMD_VIDEO_CTL:
4322 u4_api_ret = ih264d_ctl(dec_hdl, (void *)pv_api_ip,
4323 (void *)pv_api_op);
4324 break;
4325 default:
4326 u4_api_ret = IV_FAIL;
4327 break;
4328 }
4329
4330 return u4_api_ret;
4331}