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Alex Deucher09361392015-04-20 12:04:22 -04001/*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
Emil Velikova30da8e2015-08-07 17:20:51 +010022 *
Alex Deucher09361392015-04-20 12:04:22 -040023 */
24
25#ifndef _AMDGPU_INTERNAL_H_
26#define _AMDGPU_INTERNAL_H_
27
28#ifdef HAVE_CONFIG_H
29#include "config.h"
30#endif
31
32#include <assert.h>
33#include <pthread.h>
34#include "xf86atomic.h"
35#include "amdgpu.h"
36#include "util_double_list.h"
37
38#define AMDGPU_CS_MAX_RINGS 8
monk.liu2f2c8ac2015-04-23 13:18:59 +080039/* do not use below macro if b is not power of 2 aligned value */
Jack Xiao74547792015-05-07 16:07:03 +080040#define __round_mask(x, y) ((__typeof__(x))((y)-1))
41#define ROUND_UP(x, y) ((((x)-1) | __round_mask(x, y))+1)
42#define ROUND_DOWN(x, y) ((x) & ~__round_mask(x, y))
Alex Deucher09361392015-04-20 12:04:22 -040043
Jammy Zhou241cf6d2015-05-13 01:14:11 +080044#define AMDGPU_INVALID_VA_ADDRESS 0xffffffffffffffff
45
Alex Deucher09361392015-04-20 12:04:22 -040046struct amdgpu_bo_va_hole {
47 struct list_head list;
48 uint64_t offset;
49 uint64_t size;
50};
51
52struct amdgpu_bo_va_mgr {
Ken Wang322d02d2015-05-21 17:21:21 +080053 atomic_t refcount;
Alex Deucher09361392015-04-20 12:04:22 -040054 /* the start virtual address */
55 uint64_t va_offset;
Jammy Zhou241cf6d2015-05-13 01:14:11 +080056 uint64_t va_max;
Alex Deucher09361392015-04-20 12:04:22 -040057 struct list_head va_holes;
58 pthread_mutex_t bo_va_mutex;
59 uint32_t va_alignment;
60};
61
Sabre Shao23fab592015-07-09 13:50:36 +080062struct amdgpu_va {
63 amdgpu_device_handle dev;
64 uint64_t address;
65 uint64_t size;
66 enum amdgpu_gpu_va_range range;
67};
68
Alex Deucher09361392015-04-20 12:04:22 -040069struct amdgpu_device {
70 atomic_t refcount;
71 int fd;
72 int flink_fd;
73 unsigned major_version;
74 unsigned minor_version;
75
76 /** List of buffer handles. Protected by bo_table_mutex. */
77 struct util_hash_table *bo_handles;
78 /** List of buffer GEM flink names. Protected by bo_table_mutex. */
79 struct util_hash_table *bo_flink_names;
Alex Deucher09361392015-04-20 12:04:22 -040080 /** This protects all hash tables. */
81 pthread_mutex_t bo_table_mutex;
Alex Deucher09361392015-04-20 12:04:22 -040082 struct drm_amdgpu_info_device dev_info;
83 struct amdgpu_gpu_info info;
Ken Wang322d02d2015-05-21 17:21:21 +080084 struct amdgpu_bo_va_mgr *vamgr;
Alex Deucher09361392015-04-20 12:04:22 -040085};
86
87struct amdgpu_bo {
88 atomic_t refcount;
89 struct amdgpu_device *dev;
90
91 uint64_t alloc_size;
Alex Deucher09361392015-04-20 12:04:22 -040092
93 uint32_t handle;
94 uint32_t flink_name;
95
96 pthread_mutex_t cpu_access_mutex;
97 void *cpu_ptr;
98 int cpu_map_count;
99};
100
Christian König6dc2eaf2015-04-22 14:52:34 +0200101struct amdgpu_bo_list {
102 struct amdgpu_device *dev;
103
104 uint32_t handle;
105};
106
Alex Deucher09361392015-04-20 12:04:22 -0400107struct amdgpu_context {
Christian König9c2afff2015-04-22 12:21:13 +0200108 struct amdgpu_device *dev;
Alex Deucher09361392015-04-20 12:04:22 -0400109 /** Mutex for accessing fences and to maintain command submissions
Jammy Zhou40c53362015-05-29 12:59:59 +0200110 in good sequence. */
Alex Deucher09361392015-04-20 12:04:22 -0400111 pthread_mutex_t sequence_mutex;
Alex Deucher09361392015-04-20 12:04:22 -0400112 /* context id*/
113 uint32_t id;
114};
115
Alex Deucher09361392015-04-20 12:04:22 -0400116/**
117 * Functions.
118 */
119
120void amdgpu_device_free_internal(amdgpu_device_handle dev);
121
122void amdgpu_bo_free_internal(amdgpu_bo_handle bo);
123
Ken Wang322d02d2015-05-21 17:21:21 +0800124struct amdgpu_bo_va_mgr* amdgpu_vamgr_get_global(struct amdgpu_device *dev);
125
126void amdgpu_vamgr_reference(struct amdgpu_bo_va_mgr **dst, struct amdgpu_bo_va_mgr *src);
Alex Deucher09361392015-04-20 12:04:22 -0400127
Ken Wang5b019082015-07-09 13:48:25 +0800128uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
Sabre Shao23fab592015-07-09 13:50:36 +0800129 uint64_t alignment, uint64_t base_required);
Alex Deucher09361392015-04-20 12:04:22 -0400130
Ken Wang322d02d2015-05-21 17:21:21 +0800131void amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va,
132 uint64_t size);
Alex Deucher09361392015-04-20 12:04:22 -0400133
134int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
135
136uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
137
138/**
139 * Inline functions.
140 */
141
142/**
143 * Increment src and decrement dst as if we were updating references
144 * for an assignment between 2 pointers of some objects.
145 *
146 * \return true if dst is 0
147 */
148static inline bool update_references(atomic_t *dst, atomic_t *src)
149{
150 if (dst != src) {
151 /* bump src first */
152 if (src) {
153 assert(atomic_read(src) > 0);
154 atomic_inc(src);
155 }
156 if (dst) {
157 assert(atomic_read(dst) > 0);
158 return atomic_dec_and_test(dst);
159 }
160 }
161 return false;
162}
163
164/**
165 * Assignment between two amdgpu_bo pointers with reference counting.
166 *
167 * Usage:
168 * struct amdgpu_bo *dst = ... , *src = ...;
169 *
170 * dst = src;
171 * // No reference counting. Only use this when you need to move
172 * // a reference from one pointer to another.
173 *
174 * amdgpu_bo_reference(&dst, src);
175 * // Reference counters are updated. dst is decremented and src is
176 * // incremented. dst is freed if its reference counter is 0.
177 */
178static inline void amdgpu_bo_reference(struct amdgpu_bo **dst,
179 struct amdgpu_bo *src)
180{
181 if (update_references(&(*dst)->refcount, &src->refcount))
182 amdgpu_bo_free_internal(*dst);
183 *dst = src;
184}
185
186/**
187 * Assignment between two amdgpu_device pointers with reference counting.
188 *
189 * Usage:
190 * struct amdgpu_device *dst = ... , *src = ...;
191 *
192 * dst = src;
193 * // No reference counting. Only use this when you need to move
194 * // a reference from one pointer to another.
195 *
196 * amdgpu_device_reference(&dst, src);
197 * // Reference counters are updated. dst is decremented and src is
198 * // incremented. dst is freed if its reference counter is 0.
199 */
200void amdgpu_device_reference(struct amdgpu_device **dst,
201 struct amdgpu_device *src);
202#endif