Bill Wendling | bc9bffa | 2007-03-07 05:43:18 +0000 | [diff] [blame] | 1 | //====- X86InstrMMX.td - Describe the X86 Instruction Set --*- tablegen -*-===// |
Evan Cheng | ffcb95b | 2006-02-21 19:13:53 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame^] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Evan Cheng | ffcb95b | 2006-02-21 19:13:53 +0000 | [diff] [blame] | 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file describes the X86 MMX instruction set, defining the instructions, |
| 11 | // and properties of the instructions which are needed for code generation, |
| 12 | // machine code emission, and analysis. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
Evan Cheng | ba753c6 | 2006-03-20 06:04:52 +0000 | [diff] [blame] | 16 | // Some 'special' instructions |
Evan Cheng | 6e141fd | 2007-12-12 23:12:09 +0000 | [diff] [blame] | 17 | let isImplicitDef = 1 in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 18 | def IMPLICIT_DEF_VR64 : I<0, Pseudo, (outs VR64:$dst), (ins), |
Evan Cheng | ba753c6 | 2006-03-20 06:04:52 +0000 | [diff] [blame] | 19 | "#IMPLICIT_DEF $dst", |
| 20 | [(set VR64:$dst, (v8i8 (undef)))]>, |
| 21 | Requires<[HasMMX]>; |
| 22 | |
Bill Wendling | bc9bffa | 2007-03-07 05:43:18 +0000 | [diff] [blame] | 23 | // 64-bit vector undef's. |
| 24 | def : Pat<(v8i8 (undef)), (IMPLICIT_DEF_VR64)>; |
| 25 | def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>; |
| 26 | def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>; |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 27 | def : Pat<(v1i64 (undef)), (IMPLICIT_DEF_VR64)>; |
Evan Cheng | ba753c6 | 2006-03-20 06:04:52 +0000 | [diff] [blame] | 28 | |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 29 | //===----------------------------------------------------------------------===// |
| 30 | // MMX Pattern Fragments |
| 31 | //===----------------------------------------------------------------------===// |
| 32 | |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 33 | def load_mmx : PatFrag<(ops node:$ptr), (v1i64 (load node:$ptr))>; |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 34 | |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 35 | def bc_v8i8 : PatFrag<(ops node:$in), (v8i8 (bitconvert node:$in))>; |
| 36 | def bc_v4i16 : PatFrag<(ops node:$in), (v4i16 (bitconvert node:$in))>; |
| 37 | def bc_v2i32 : PatFrag<(ops node:$in), (v2i32 (bitconvert node:$in))>; |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 38 | def bc_v1i64 : PatFrag<(ops node:$in), (v1i64 (bitconvert node:$in))>; |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 39 | |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 40 | //===----------------------------------------------------------------------===// |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 41 | // MMX Masks |
| 42 | //===----------------------------------------------------------------------===// |
| 43 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 44 | // MMX_SHUFFLE_get_shuf_imm xform function: convert vector_shuffle mask to |
| 45 | // PSHUFW imm. |
| 46 | def MMX_SHUFFLE_get_shuf_imm : SDNodeXForm<build_vector, [{ |
| 47 | return getI8Imm(X86::getShuffleSHUFImmediate(N)); |
| 48 | }]>; |
| 49 | |
| 50 | // Patterns for: vector_shuffle v1, v2, <2, 6, 3, 7, ...> |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 51 | def MMX_UNPCKH_shuffle_mask : PatLeaf<(build_vector), [{ |
| 52 | return X86::isUNPCKHMask(N); |
| 53 | }]>; |
| 54 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 55 | // Patterns for: vector_shuffle v1, v2, <0, 4, 2, 5, ...> |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 56 | def MMX_UNPCKL_shuffle_mask : PatLeaf<(build_vector), [{ |
| 57 | return X86::isUNPCKLMask(N); |
| 58 | }]>; |
| 59 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 60 | // Patterns for: vector_shuffle v1, <undef>, <0, 0, 1, 1, ...> |
| 61 | def MMX_UNPCKH_v_undef_shuffle_mask : PatLeaf<(build_vector), [{ |
| 62 | return X86::isUNPCKH_v_undef_Mask(N); |
| 63 | }]>; |
| 64 | |
| 65 | // Patterns for: vector_shuffle v1, <undef>, <2, 2, 3, 3, ...> |
| 66 | def MMX_UNPCKL_v_undef_shuffle_mask : PatLeaf<(build_vector), [{ |
| 67 | return X86::isUNPCKL_v_undef_Mask(N); |
| 68 | }]>; |
| 69 | |
| 70 | // Patterns for shuffling. |
| 71 | def MMX_PSHUFW_shuffle_mask : PatLeaf<(build_vector), [{ |
| 72 | return X86::isPSHUFDMask(N); |
| 73 | }], MMX_SHUFFLE_get_shuf_imm>; |
| 74 | |
| 75 | // Patterns for: vector_shuffle v1, v2, <4, 5, 2, 3>; etc. |
| 76 | def MMX_MOVL_shuffle_mask : PatLeaf<(build_vector), [{ |
| 77 | return X86::isMOVLMask(N); |
| 78 | }]>; |
| 79 | |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 80 | //===----------------------------------------------------------------------===// |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 81 | // MMX Multiclasses |
| 82 | //===----------------------------------------------------------------------===// |
| 83 | |
| 84 | let isTwoAddress = 1 in { |
| 85 | // MMXI_binop_rm - Simple MMX binary operator. |
| 86 | multiclass MMXI_binop_rm<bits<8> opc, string OpcodeStr, SDNode OpNode, |
| 87 | ValueType OpVT, bit Commutable = 0> { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 88 | def rr : MMXI<opc, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 89 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 90 | [(set VR64:$dst, (OpVT (OpNode VR64:$src1, VR64:$src2)))]> { |
| 91 | let isCommutable = Commutable; |
| 92 | } |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 93 | def rm : MMXI<opc, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 94 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 95 | [(set VR64:$dst, (OpVT (OpNode VR64:$src1, |
| 96 | (bitconvert |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 97 | (load_mmx addr:$src2)))))]>; |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 98 | } |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 99 | |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 100 | multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, |
| 101 | bit Commutable = 0> { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 102 | def rr : MMXI<opc, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 103 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 104 | [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))]> { |
| 105 | let isCommutable = Commutable; |
| 106 | } |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 107 | def rm : MMXI<opc, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 108 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 109 | [(set VR64:$dst, (IntId VR64:$src1, |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 110 | (bitconvert (load_mmx addr:$src2))))]>; |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 111 | } |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 112 | |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 113 | // MMXI_binop_rm_v1i64 - Simple MMX binary operator whose type is v1i64. |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 114 | // |
| 115 | // FIXME: we could eliminate this and use MMXI_binop_rm instead if tblgen knew |
| 116 | // to collapse (bitconvert VT to VT) into its operand. |
| 117 | // |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 118 | multiclass MMXI_binop_rm_v1i64<bits<8> opc, string OpcodeStr, SDNode OpNode, |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 119 | bit Commutable = 0> { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 120 | def rr : MMXI<opc, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 121 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 122 | [(set VR64:$dst, (v1i64 (OpNode VR64:$src1, VR64:$src2)))]> { |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 123 | let isCommutable = Commutable; |
| 124 | } |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 125 | def rm : MMXI<opc, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 126 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 127 | [(set VR64:$dst, |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 128 | (OpNode VR64:$src1,(load_mmx addr:$src2)))]>; |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 129 | } |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 130 | |
| 131 | multiclass MMXI_binop_rmi_int<bits<8> opc, bits<8> opc2, Format ImmForm, |
| 132 | string OpcodeStr, Intrinsic IntId> { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 133 | def rr : MMXI<opc, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 134 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 135 | [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 136 | def rm : MMXI<opc, MRMSrcMem, (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 137 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 138 | [(set VR64:$dst, (IntId VR64:$src1, |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 139 | (bitconvert (load_mmx addr:$src2))))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 140 | def ri : MMXIi8<opc2, ImmForm, (outs VR64:$dst), (ins VR64:$src1, i32i8imm:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 141 | !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 142 | [(set VR64:$dst, (IntId VR64:$src1, |
| 143 | (scalar_to_vector (i32 imm:$src2))))]>; |
| 144 | } |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | //===----------------------------------------------------------------------===// |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 148 | // MMX EMMS & FEMMS Instructions |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 149 | //===----------------------------------------------------------------------===// |
| 150 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 151 | def MMX_EMMS : MMXI<0x77, RawFrm, (outs), (ins), "emms", [(int_x86_mmx_emms)]>; |
| 152 | def MMX_FEMMS : MMXI<0x0E, RawFrm, (outs), (ins), "femms", [(int_x86_mmx_femms)]>; |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 153 | |
| 154 | //===----------------------------------------------------------------------===// |
| 155 | // MMX Scalar Instructions |
| 156 | //===----------------------------------------------------------------------===// |
Bill Wendling | 229baff | 2007-03-05 23:09:45 +0000 | [diff] [blame] | 157 | |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 158 | // Data Transfer Instructions |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 159 | def MMX_MOVD64rr : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 160 | "movd\t{$src, $dst|$dst, $src}", []>; |
Bill Wendling | 627c00b | 2007-12-17 23:07:56 +0000 | [diff] [blame] | 161 | let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 162 | def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 163 | "movd\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 164 | def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 165 | "movd\t{$src, $dst|$dst, $src}", []>; |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 166 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 167 | def MMX_MOVD64to64rr : MMXRI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 168 | "movd\t{$src, $dst|$dst, $src}", []>; |
Bill Wendling | 9388842 | 2007-07-04 00:19:54 +0000 | [diff] [blame] | 169 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 170 | def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 171 | "movq\t{$src, $dst|$dst, $src}", []>; |
Bill Wendling | 627c00b | 2007-12-17 23:07:56 +0000 | [diff] [blame] | 172 | let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 173 | def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 174 | "movq\t{$src, $dst|$dst, $src}", |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 175 | [(set VR64:$dst, (load_mmx addr:$src))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 176 | def MMX_MOVQ64mr : MMXI<0x7F, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 177 | "movq\t{$src, $dst|$dst, $src}", |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 178 | [(store (v1i64 VR64:$src), addr:$dst)]>; |
| 179 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 180 | def MMX_MOVDQ2Qrr : MMXID<0xD6, MRMDestMem, (outs VR64:$dst), (ins VR128:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 181 | "movdq2q\t{$src, $dst|$dst, $src}", |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 182 | [(set VR64:$dst, |
| 183 | (v1i64 (vector_extract (v2i64 VR128:$src), |
| 184 | (iPTR 0))))]>; |
| 185 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 186 | def MMX_MOVQ2DQrr : MMXIS<0xD6, MRMDestMem, (outs VR128:$dst), (ins VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 187 | "movq2dq\t{$src, $dst|$dst, $src}", |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 188 | [(set VR128:$dst, |
| 189 | (bitconvert (v1i64 VR64:$src)))]>; |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 190 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 191 | def MMX_MOVNTQmr : MMXI<0xE7, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 192 | "movntq\t{$src, $dst|$dst, $src}", |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 193 | [(int_x86_mmx_movnt_dq addr:$dst, VR64:$src)]>; |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 194 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 195 | let AddedComplexity = 15 in |
| 196 | // movd to MMX register zero-extends |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 197 | def MMX_MOVZDI2PDIrr : MMX2I<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 198 | "movd\t{$src, $dst|$dst, $src}", |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 199 | [(set VR64:$dst, |
| 200 | (v2i32 (vector_shuffle immAllZerosV, |
| 201 | (v2i32 (scalar_to_vector GR32:$src)), |
| 202 | MMX_MOVL_shuffle_mask)))]>; |
| 203 | let AddedComplexity = 20 in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 204 | def MMX_MOVZDI2PDIrm : MMX2I<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 205 | "movd\t{$src, $dst|$dst, $src}", |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 206 | [(set VR64:$dst, |
| 207 | (v2i32 (vector_shuffle immAllZerosV, |
| 208 | (v2i32 (scalar_to_vector |
| 209 | (loadi32 addr:$src))), |
| 210 | MMX_MOVL_shuffle_mask)))]>; |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 211 | |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 212 | // Arithmetic Instructions |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 213 | |
| 214 | // -- Addition |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 215 | defm MMX_PADDB : MMXI_binop_rm<0xFC, "paddb", add, v8i8, 1>; |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 216 | defm MMX_PADDW : MMXI_binop_rm<0xFD, "paddw", add, v4i16, 1>; |
| 217 | defm MMX_PADDD : MMXI_binop_rm<0xFE, "paddd", add, v2i32, 1>; |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 218 | defm MMX_PADDQ : MMXI_binop_rm<0xD4, "paddq", add, v1i64, 1>; |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 219 | |
| 220 | defm MMX_PADDSB : MMXI_binop_rm_int<0xEC, "paddsb" , int_x86_mmx_padds_b, 1>; |
| 221 | defm MMX_PADDSW : MMXI_binop_rm_int<0xED, "paddsw" , int_x86_mmx_padds_w, 1>; |
| 222 | |
| 223 | defm MMX_PADDUSB : MMXI_binop_rm_int<0xDC, "paddusb", int_x86_mmx_paddus_b, 1>; |
| 224 | defm MMX_PADDUSW : MMXI_binop_rm_int<0xDD, "paddusw", int_x86_mmx_paddus_w, 1>; |
| 225 | |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 226 | // -- Subtraction |
Bill Wendling | c1fb047 | 2007-03-10 09:57:05 +0000 | [diff] [blame] | 227 | defm MMX_PSUBB : MMXI_binop_rm<0xF8, "psubb", sub, v8i8>; |
| 228 | defm MMX_PSUBW : MMXI_binop_rm<0xF9, "psubw", sub, v4i16>; |
| 229 | defm MMX_PSUBD : MMXI_binop_rm<0xFA, "psubd", sub, v2i32>; |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 230 | defm MMX_PSUBQ : MMXI_binop_rm<0xFB, "psubq", sub, v1i64>; |
Bill Wendling | c1fb047 | 2007-03-10 09:57:05 +0000 | [diff] [blame] | 231 | |
| 232 | defm MMX_PSUBSB : MMXI_binop_rm_int<0xE8, "psubsb" , int_x86_mmx_psubs_b>; |
| 233 | defm MMX_PSUBSW : MMXI_binop_rm_int<0xE9, "psubsw" , int_x86_mmx_psubs_w>; |
| 234 | |
| 235 | defm MMX_PSUBUSB : MMXI_binop_rm_int<0xD8, "psubusb", int_x86_mmx_psubus_b>; |
| 236 | defm MMX_PSUBUSW : MMXI_binop_rm_int<0xD9, "psubusw", int_x86_mmx_psubus_w>; |
| 237 | |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 238 | // -- Multiplication |
Bill Wendling | 74027e9 | 2007-03-15 21:24:36 +0000 | [diff] [blame] | 239 | defm MMX_PMULLW : MMXI_binop_rm<0xD5, "pmullw", mul, v4i16, 1>; |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 240 | |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 241 | defm MMX_PMULHW : MMXI_binop_rm_int<0xE5, "pmulhw", int_x86_mmx_pmulh_w, 1>; |
| 242 | defm MMX_PMULHUW : MMXI_binop_rm_int<0xE4, "pmulhuw", int_x86_mmx_pmulhu_w, 1>; |
| 243 | defm MMX_PMULUDQ : MMXI_binop_rm_int<0xF4, "pmuludq", int_x86_mmx_pmulu_dq, 1>; |
| 244 | |
| 245 | // -- Miscellanea |
Bill Wendling | 74027e9 | 2007-03-15 21:24:36 +0000 | [diff] [blame] | 246 | defm MMX_PMADDWD : MMXI_binop_rm_int<0xF5, "pmaddwd", int_x86_mmx_pmadd_wd, 1>; |
| 247 | |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 248 | defm MMX_PAVGB : MMXI_binop_rm_int<0xE0, "pavgb", int_x86_mmx_pavg_b, 1>; |
| 249 | defm MMX_PAVGW : MMXI_binop_rm_int<0xE3, "pavgw", int_x86_mmx_pavg_w, 1>; |
| 250 | |
| 251 | defm MMX_PMINUB : MMXI_binop_rm_int<0xDA, "pminub", int_x86_mmx_pminu_b, 1>; |
| 252 | defm MMX_PMINSW : MMXI_binop_rm_int<0xEA, "pminsw", int_x86_mmx_pmins_w, 1>; |
| 253 | |
| 254 | defm MMX_PMAXUB : MMXI_binop_rm_int<0xDE, "pmaxub", int_x86_mmx_pmaxu_b, 1>; |
| 255 | defm MMX_PMAXSW : MMXI_binop_rm_int<0xEE, "pmaxsw", int_x86_mmx_pmaxs_w, 1>; |
| 256 | |
| 257 | defm MMX_PSADBW : MMXI_binop_rm_int<0xE0, "psadbw", int_x86_mmx_psad_bw, 1>; |
| 258 | |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 259 | // Logical Instructions |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 260 | defm MMX_PAND : MMXI_binop_rm_v1i64<0xDB, "pand", and, 1>; |
| 261 | defm MMX_POR : MMXI_binop_rm_v1i64<0xEB, "por" , or, 1>; |
| 262 | defm MMX_PXOR : MMXI_binop_rm_v1i64<0xEF, "pxor", xor, 1>; |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 263 | |
| 264 | let isTwoAddress = 1 in { |
| 265 | def MMX_PANDNrr : MMXI<0xDF, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 266 | (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 267 | "pandn\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 268 | [(set VR64:$dst, (v1i64 (and (vnot VR64:$src1), |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 269 | VR64:$src2)))]>; |
| 270 | def MMX_PANDNrm : MMXI<0xDF, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 271 | (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 272 | "pandn\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 273 | [(set VR64:$dst, (v1i64 (and (vnot VR64:$src1), |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 274 | (load addr:$src2))))]>; |
| 275 | } |
| 276 | |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 277 | // Shift Instructions |
| 278 | defm MMX_PSRLW : MMXI_binop_rmi_int<0xD1, 0x71, MRM2r, "psrlw", |
| 279 | int_x86_mmx_psrl_w>; |
| 280 | defm MMX_PSRLD : MMXI_binop_rmi_int<0xD2, 0x72, MRM2r, "psrld", |
| 281 | int_x86_mmx_psrl_d>; |
| 282 | defm MMX_PSRLQ : MMXI_binop_rmi_int<0xD3, 0x73, MRM2r, "psrlq", |
| 283 | int_x86_mmx_psrl_q>; |
| 284 | |
| 285 | defm MMX_PSLLW : MMXI_binop_rmi_int<0xF1, 0x71, MRM6r, "psllw", |
| 286 | int_x86_mmx_psll_w>; |
| 287 | defm MMX_PSLLD : MMXI_binop_rmi_int<0xF2, 0x72, MRM6r, "pslld", |
| 288 | int_x86_mmx_psll_d>; |
| 289 | defm MMX_PSLLQ : MMXI_binop_rmi_int<0xF3, 0x73, MRM6r, "psllq", |
| 290 | int_x86_mmx_psll_q>; |
| 291 | |
| 292 | defm MMX_PSRAW : MMXI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw", |
| 293 | int_x86_mmx_psra_w>; |
| 294 | defm MMX_PSRAD : MMXI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad", |
| 295 | int_x86_mmx_psra_d>; |
| 296 | |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 297 | // Comparison Instructions |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 298 | defm MMX_PCMPEQB : MMXI_binop_rm_int<0x74, "pcmpeqb", int_x86_mmx_pcmpeq_b>; |
| 299 | defm MMX_PCMPEQW : MMXI_binop_rm_int<0x75, "pcmpeqw", int_x86_mmx_pcmpeq_w>; |
| 300 | defm MMX_PCMPEQD : MMXI_binop_rm_int<0x76, "pcmpeqd", int_x86_mmx_pcmpeq_d>; |
| 301 | |
| 302 | defm MMX_PCMPGTB : MMXI_binop_rm_int<0x64, "pcmpgtb", int_x86_mmx_pcmpgt_b>; |
| 303 | defm MMX_PCMPGTW : MMXI_binop_rm_int<0x65, "pcmpgtw", int_x86_mmx_pcmpgt_w>; |
| 304 | defm MMX_PCMPGTD : MMXI_binop_rm_int<0x66, "pcmpgtd", int_x86_mmx_pcmpgt_d>; |
| 305 | |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 306 | // Conversion Instructions |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 307 | |
| 308 | // -- Unpack Instructions |
| 309 | let isTwoAddress = 1 in { |
| 310 | // Unpack High Packed Data Instructions |
| 311 | def MMX_PUNPCKHBWrr : MMXI<0x68, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 312 | (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 313 | "punpckhbw\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 314 | [(set VR64:$dst, |
| 315 | (v8i8 (vector_shuffle VR64:$src1, VR64:$src2, |
| 316 | MMX_UNPCKH_shuffle_mask)))]>; |
| 317 | def MMX_PUNPCKHBWrm : MMXI<0x68, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 318 | (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 319 | "punpckhbw\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 320 | [(set VR64:$dst, |
| 321 | (v8i8 (vector_shuffle VR64:$src1, |
| 322 | (bc_v8i8 (load_mmx addr:$src2)), |
| 323 | MMX_UNPCKH_shuffle_mask)))]>; |
| 324 | |
| 325 | def MMX_PUNPCKHWDrr : MMXI<0x69, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 326 | (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 327 | "punpckhwd\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 328 | [(set VR64:$dst, |
| 329 | (v4i16 (vector_shuffle VR64:$src1, VR64:$src2, |
| 330 | MMX_UNPCKH_shuffle_mask)))]>; |
| 331 | def MMX_PUNPCKHWDrm : MMXI<0x69, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 332 | (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 333 | "punpckhwd\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 334 | [(set VR64:$dst, |
| 335 | (v4i16 (vector_shuffle VR64:$src1, |
| 336 | (bc_v4i16 (load_mmx addr:$src2)), |
| 337 | MMX_UNPCKH_shuffle_mask)))]>; |
| 338 | |
| 339 | def MMX_PUNPCKHDQrr : MMXI<0x6A, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 340 | (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 341 | "punpckhdq\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 342 | [(set VR64:$dst, |
| 343 | (v2i32 (vector_shuffle VR64:$src1, VR64:$src2, |
| 344 | MMX_UNPCKH_shuffle_mask)))]>; |
| 345 | def MMX_PUNPCKHDQrm : MMXI<0x6A, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 346 | (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 347 | "punpckhdq\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 348 | [(set VR64:$dst, |
| 349 | (v2i32 (vector_shuffle VR64:$src1, |
| 350 | (bc_v2i32 (load_mmx addr:$src2)), |
| 351 | MMX_UNPCKH_shuffle_mask)))]>; |
| 352 | |
| 353 | // Unpack Low Packed Data Instructions |
| 354 | def MMX_PUNPCKLBWrr : MMXI<0x60, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 355 | (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 356 | "punpcklbw\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 357 | [(set VR64:$dst, |
| 358 | (v8i8 (vector_shuffle VR64:$src1, VR64:$src2, |
| 359 | MMX_UNPCKL_shuffle_mask)))]>; |
| 360 | def MMX_PUNPCKLBWrm : MMXI<0x60, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 361 | (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 362 | "punpcklbw\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 363 | [(set VR64:$dst, |
| 364 | (v8i8 (vector_shuffle VR64:$src1, |
| 365 | (bc_v8i8 (load_mmx addr:$src2)), |
| 366 | MMX_UNPCKL_shuffle_mask)))]>; |
| 367 | |
| 368 | def MMX_PUNPCKLWDrr : MMXI<0x61, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 369 | (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 370 | "punpcklwd\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 371 | [(set VR64:$dst, |
| 372 | (v4i16 (vector_shuffle VR64:$src1, VR64:$src2, |
| 373 | MMX_UNPCKL_shuffle_mask)))]>; |
| 374 | def MMX_PUNPCKLWDrm : MMXI<0x61, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 375 | (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 376 | "punpcklwd\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 377 | [(set VR64:$dst, |
| 378 | (v4i16 (vector_shuffle VR64:$src1, |
| 379 | (bc_v4i16 (load_mmx addr:$src2)), |
| 380 | MMX_UNPCKL_shuffle_mask)))]>; |
| 381 | |
| 382 | def MMX_PUNPCKLDQrr : MMXI<0x62, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 383 | (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 384 | "punpckldq\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 385 | [(set VR64:$dst, |
| 386 | (v2i32 (vector_shuffle VR64:$src1, VR64:$src2, |
| 387 | MMX_UNPCKL_shuffle_mask)))]>; |
| 388 | def MMX_PUNPCKLDQrm : MMXI<0x62, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 389 | (outs VR64:$dst), (ins VR64:$src1, i64mem:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 390 | "punpckldq\t{$src2, $dst|$dst, $src2}", |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 391 | [(set VR64:$dst, |
| 392 | (v2i32 (vector_shuffle VR64:$src1, |
| 393 | (bc_v2i32 (load_mmx addr:$src2)), |
| 394 | MMX_UNPCKL_shuffle_mask)))]>; |
| 395 | } |
| 396 | |
| 397 | // -- Pack Instructions |
| 398 | defm MMX_PACKSSWB : MMXI_binop_rm_int<0x63, "packsswb", int_x86_mmx_packsswb>; |
| 399 | defm MMX_PACKSSDW : MMXI_binop_rm_int<0x6B, "packssdw", int_x86_mmx_packssdw>; |
| 400 | defm MMX_PACKUSWB : MMXI_binop_rm_int<0x67, "packuswb", int_x86_mmx_packuswb>; |
| 401 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 402 | // -- Shuffle Instructions |
| 403 | def MMX_PSHUFWri : MMXIi8<0x70, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 404 | (outs VR64:$dst), (ins VR64:$src1, i8imm:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 405 | "pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}", |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 406 | [(set VR64:$dst, |
| 407 | (v4i16 (vector_shuffle |
| 408 | VR64:$src1, (undef), |
| 409 | MMX_PSHUFW_shuffle_mask:$src2)))]>; |
| 410 | def MMX_PSHUFWmi : MMXIi8<0x70, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 411 | (outs VR64:$dst), (ins i64mem:$src1, i8imm:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 412 | "pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}", |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 413 | [(set VR64:$dst, |
| 414 | (v4i16 (vector_shuffle |
| 415 | (bc_v4i16 (load_mmx addr:$src1)), |
| 416 | (undef), |
| 417 | MMX_PSHUFW_shuffle_mask:$src2)))]>; |
| 418 | |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 419 | // -- Conversion Instructions |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 420 | def MMX_CVTPD2PIrr : MMX2I<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 421 | "cvtpd2pi\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 422 | def MMX_CVTPD2PIrm : MMX2I<0x2D, MRMSrcMem, (outs VR64:$dst), (ins f128mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 423 | "cvtpd2pi\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | ffcb95b | 2006-02-21 19:13:53 +0000 | [diff] [blame] | 424 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 425 | def MMX_CVTPI2PDrr : MMX2I<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 426 | "cvtpi2pd\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 427 | def MMX_CVTPI2PDrm : MMX2I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 428 | "cvtpi2pd\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 3246e06 | 2006-03-25 01:31:59 +0000 | [diff] [blame] | 429 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 430 | def MMX_CVTPI2PSrr : MMXI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 431 | "cvtpi2ps\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 432 | def MMX_CVTPI2PSrm : MMXI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 433 | "cvtpi2ps\t{$src, $dst|$dst, $src}", []>; |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 434 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 435 | def MMX_CVTPS2PIrr : MMXI<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 436 | "cvtps2pi\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 437 | def MMX_CVTPS2PIrm : MMXI<0x2D, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 438 | "cvtps2pi\t{$src, $dst|$dst, $src}", []>; |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 439 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 440 | def MMX_CVTTPD2PIrr : MMX2I<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 441 | "cvttpd2pi\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 442 | def MMX_CVTTPD2PIrm : MMX2I<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f128mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 443 | "cvttpd2pi\t{$src, $dst|$dst, $src}", []>; |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 444 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 445 | def MMX_CVTTPS2PIrr : MMXI<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 446 | "cvttps2pi\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 447 | def MMX_CVTTPS2PIrm : MMXI<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 448 | "cvttps2pi\t{$src, $dst|$dst, $src}", []>; |
Evan Cheng | fcf5e21 | 2006-04-11 06:57:30 +0000 | [diff] [blame] | 449 | |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 450 | // Extract / Insert |
| 451 | def MMX_X86pextrw : SDNode<"X86ISD::PEXTRW", SDTypeProfile<1, 2, []>, []>; |
| 452 | def MMX_X86pinsrw : SDNode<"X86ISD::PINSRW", SDTypeProfile<1, 3, []>, []>; |
Evan Cheng | fcf5e21 | 2006-04-11 06:57:30 +0000 | [diff] [blame] | 453 | |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 454 | def MMX_PEXTRWri : MMXIi8<0xC5, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 455 | (outs GR32:$dst), (ins VR64:$src1, i16i8imm:$src2), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 456 | "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}", |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 457 | [(set GR32:$dst, (MMX_X86pextrw (v4i16 VR64:$src1), |
| 458 | (iPTR imm:$src2)))]>; |
| 459 | let isTwoAddress = 1 in { |
| 460 | def MMX_PINSRWrri : MMXIi8<0xC4, MRMSrcReg, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 461 | (outs VR64:$dst), (ins VR64:$src1, GR32:$src2, i16i8imm:$src3), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 462 | "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 463 | [(set VR64:$dst, (v4i16 (MMX_X86pinsrw (v4i16 VR64:$src1), |
| 464 | GR32:$src2, (iPTR imm:$src3))))]>; |
| 465 | def MMX_PINSRWrmi : MMXIi8<0xC4, MRMSrcMem, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 466 | (outs VR64:$dst), (ins VR64:$src1, i16mem:$src2, i16i8imm:$src3), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 467 | "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}", |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 468 | [(set VR64:$dst, |
| 469 | (v4i16 (MMX_X86pinsrw (v4i16 VR64:$src1), |
| 470 | (i32 (anyext (loadi16 addr:$src2))), |
| 471 | (iPTR imm:$src3))))]>; |
| 472 | } |
| 473 | |
| 474 | // Mask creation |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 475 | def MMX_PMOVMSKBrr : MMXI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR64:$src), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 476 | "pmovmskb\t{$src, $dst|$dst, $src}", |
Bill Wendling | 71bfd11 | 2007-04-03 23:48:32 +0000 | [diff] [blame] | 477 | [(set GR32:$dst, (int_x86_mmx_pmovmskb VR64:$src))]>; |
| 478 | |
| 479 | // Misc. |
Evan Cheng | 071a279 | 2007-09-11 19:55:27 +0000 | [diff] [blame] | 480 | let Uses = [EDI] in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 481 | def MMX_MASKMOVQ : MMXI<0xF7, MRMDestMem, (outs), (ins VR64:$src, VR64:$mask), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 482 | "maskmovq\t{$mask, $src|$src, $mask}", |
Evan Cheng | 071a279 | 2007-09-11 19:55:27 +0000 | [diff] [blame] | 483 | [(int_x86_mmx_maskmovq VR64:$src, VR64:$mask, EDI)]>; |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 484 | |
| 485 | //===----------------------------------------------------------------------===// |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 486 | // Alias Instructions |
| 487 | //===----------------------------------------------------------------------===// |
| 488 | |
| 489 | // Alias instructions that map zero vector to pxor. |
Bill Wendling | 627c00b | 2007-12-17 23:07:56 +0000 | [diff] [blame] | 490 | let isReMaterializable = 1, neverHasSideEffects = 1 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 491 | def MMX_V_SET0 : MMXI<0xEF, MRMInitReg, (outs VR64:$dst), (ins), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 492 | "pxor\t$dst, $dst", |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 493 | [(set VR64:$dst, (v2i32 immAllZerosV))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 494 | def MMX_V_SETALLONES : MMXI<0x76, MRMInitReg, (outs VR64:$dst), (ins), |
Dan Gohman | b1576f5 | 2007-07-31 20:11:57 +0000 | [diff] [blame] | 495 | "pcmpeqd\t$dst, $dst", |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 496 | [(set VR64:$dst, (v2i32 immAllOnesV))]>; |
Dan Gohman | d45eddd | 2007-06-26 00:48:07 +0000 | [diff] [blame] | 497 | } |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 498 | |
| 499 | //===----------------------------------------------------------------------===// |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 500 | // Non-Instruction Patterns |
| 501 | //===----------------------------------------------------------------------===// |
| 502 | |
| 503 | // Store 64-bit integer vector values. |
| 504 | def : Pat<(store (v8i8 VR64:$src), addr:$dst), |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 505 | (MMX_MOVQ64mr addr:$dst, VR64:$src)>; |
Bill Wendling | a31bd27 | 2007-03-06 18:53:42 +0000 | [diff] [blame] | 506 | def : Pat<(store (v4i16 VR64:$src), addr:$dst), |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 507 | (MMX_MOVQ64mr addr:$dst, VR64:$src)>; |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 508 | def : Pat<(store (v2i32 VR64:$src), addr:$dst), |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 509 | (MMX_MOVQ64mr addr:$dst, VR64:$src)>; |
| 510 | def : Pat<(store (v1i64 VR64:$src), addr:$dst), |
| 511 | (MMX_MOVQ64mr addr:$dst, VR64:$src)>; |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 512 | |
Bill Wendling | bc9bffa | 2007-03-07 05:43:18 +0000 | [diff] [blame] | 513 | // Bit convert. |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 514 | def : Pat<(v8i8 (bitconvert (v1i64 VR64:$src))), (v8i8 VR64:$src)>; |
Bill Wendling | bc9bffa | 2007-03-07 05:43:18 +0000 | [diff] [blame] | 515 | def : Pat<(v8i8 (bitconvert (v2i32 VR64:$src))), (v8i8 VR64:$src)>; |
| 516 | def : Pat<(v8i8 (bitconvert (v4i16 VR64:$src))), (v8i8 VR64:$src)>; |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 517 | def : Pat<(v4i16 (bitconvert (v1i64 VR64:$src))), (v4i16 VR64:$src)>; |
Bill Wendling | bc9bffa | 2007-03-07 05:43:18 +0000 | [diff] [blame] | 518 | def : Pat<(v4i16 (bitconvert (v2i32 VR64:$src))), (v4i16 VR64:$src)>; |
| 519 | def : Pat<(v4i16 (bitconvert (v8i8 VR64:$src))), (v4i16 VR64:$src)>; |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 520 | def : Pat<(v2i32 (bitconvert (v1i64 VR64:$src))), (v2i32 VR64:$src)>; |
Bill Wendling | bc9bffa | 2007-03-07 05:43:18 +0000 | [diff] [blame] | 521 | def : Pat<(v2i32 (bitconvert (v4i16 VR64:$src))), (v2i32 VR64:$src)>; |
| 522 | def : Pat<(v2i32 (bitconvert (v8i8 VR64:$src))), (v2i32 VR64:$src)>; |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 523 | def : Pat<(v1i64 (bitconvert (v2i32 VR64:$src))), (v1i64 VR64:$src)>; |
| 524 | def : Pat<(v1i64 (bitconvert (v4i16 VR64:$src))), (v1i64 VR64:$src)>; |
| 525 | def : Pat<(v1i64 (bitconvert (v8i8 VR64:$src))), (v1i64 VR64:$src)>; |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 526 | |
Bill Wendling | 9388842 | 2007-07-04 00:19:54 +0000 | [diff] [blame] | 527 | // 64-bit bit convert. |
| 528 | def : Pat<(v1i64 (bitconvert (i64 GR64:$src))), |
| 529 | (MMX_MOVD64to64rr GR64:$src)>; |
| 530 | def : Pat<(v2i32 (bitconvert (i64 GR64:$src))), |
| 531 | (MMX_MOVD64to64rr GR64:$src)>; |
| 532 | def : Pat<(v4i16 (bitconvert (i64 GR64:$src))), |
| 533 | (MMX_MOVD64to64rr GR64:$src)>; |
| 534 | def : Pat<(v8i8 (bitconvert (i64 GR64:$src))), |
| 535 | (MMX_MOVD64to64rr GR64:$src)>; |
| 536 | |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 537 | def MMX_X86s2vec : SDNode<"X86ISD::S2VEC", SDTypeProfile<1, 1, []>, []>; |
| 538 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 539 | // Move scalar to XMM zero-extended |
| 540 | // movd to XMM register zero-extends |
| 541 | let AddedComplexity = 15 in { |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 542 | def : Pat<(v8i8 (vector_shuffle immAllZerosV_bc, |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 543 | (v8i8 (MMX_X86s2vec GR32:$src)), MMX_MOVL_shuffle_mask)), |
| 544 | (MMX_MOVZDI2PDIrr GR32:$src)>; |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 545 | def : Pat<(v4i16 (vector_shuffle immAllZerosV_bc, |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 546 | (v4i16 (MMX_X86s2vec GR32:$src)), MMX_MOVL_shuffle_mask)), |
| 547 | (MMX_MOVZDI2PDIrr GR32:$src)>; |
| 548 | def : Pat<(v2i32 (vector_shuffle immAllZerosV, |
| 549 | (v2i32 (MMX_X86s2vec GR32:$src)), MMX_MOVL_shuffle_mask)), |
| 550 | (MMX_MOVZDI2PDIrr GR32:$src)>; |
| 551 | } |
| 552 | |
| 553 | // Scalar to v2i32 / v4i16 / v8i8. The source may be a GR32, but only the lower |
| 554 | // 8 or 16-bits matter. |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 555 | def : Pat<(v8i8 (MMX_X86s2vec GR32:$src)), (MMX_MOVD64rr GR32:$src)>; |
| 556 | def : Pat<(v4i16 (MMX_X86s2vec GR32:$src)), (MMX_MOVD64rr GR32:$src)>; |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 557 | def : Pat<(v2i32 (MMX_X86s2vec GR32:$src)), (MMX_MOVD64rr GR32:$src)>; |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 558 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 559 | // Patterns to perform canonical versions of vector shuffling. |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 560 | let AddedComplexity = 10 in { |
| 561 | def : Pat<(v8i8 (vector_shuffle VR64:$src, (undef), |
| 562 | MMX_UNPCKL_v_undef_shuffle_mask)), |
| 563 | (MMX_PUNPCKLBWrr VR64:$src, VR64:$src)>; |
| 564 | def : Pat<(v4i16 (vector_shuffle VR64:$src, (undef), |
| 565 | MMX_UNPCKL_v_undef_shuffle_mask)), |
| 566 | (MMX_PUNPCKLWDrr VR64:$src, VR64:$src)>; |
| 567 | def : Pat<(v2i32 (vector_shuffle VR64:$src, (undef), |
| 568 | MMX_UNPCKL_v_undef_shuffle_mask)), |
| 569 | (MMX_PUNPCKLDQrr VR64:$src, VR64:$src)>; |
| 570 | } |
| 571 | |
Bill Wendling | 69dc533 | 2007-04-24 21:18:37 +0000 | [diff] [blame] | 572 | let AddedComplexity = 10 in { |
| 573 | def : Pat<(v8i8 (vector_shuffle VR64:$src, (undef), |
| 574 | MMX_UNPCKH_v_undef_shuffle_mask)), |
| 575 | (MMX_PUNPCKHBWrr VR64:$src, VR64:$src)>; |
| 576 | def : Pat<(v4i16 (vector_shuffle VR64:$src, (undef), |
| 577 | MMX_UNPCKH_v_undef_shuffle_mask)), |
| 578 | (MMX_PUNPCKHWDrr VR64:$src, VR64:$src)>; |
| 579 | def : Pat<(v2i32 (vector_shuffle VR64:$src, (undef), |
| 580 | MMX_UNPCKH_v_undef_shuffle_mask)), |
| 581 | (MMX_PUNPCKHDQrr VR64:$src, VR64:$src)>; |
| 582 | } |
| 583 | |
| 584 | // Patterns to perform vector shuffling with a zeroed out vector. |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 585 | let AddedComplexity = 20 in { |
| 586 | def : Pat<(bc_v2i32 (vector_shuffle immAllZerosV, |
| 587 | (v2i32 (scalar_to_vector (load_mmx addr:$src))), |
| 588 | MMX_UNPCKL_shuffle_mask)), |
| 589 | (MMX_PUNPCKLDQrm VR64:$src, VR64:$src)>; |
| 590 | } |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 591 | |
Bill Wendling | 6dc29ec | 2007-03-27 21:20:36 +0000 | [diff] [blame] | 592 | // Some special case PANDN patterns. |
Bill Wendling | 823efee | 2007-04-03 06:00:37 +0000 | [diff] [blame] | 593 | // FIXME: Get rid of these. |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 594 | def : Pat<(v1i64 (and (xor VR64:$src1, (bc_v1i64 (v2i32 immAllOnesV))), |
| 595 | VR64:$src2)), |
| 596 | (MMX_PANDNrr VR64:$src1, VR64:$src2)>; |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 597 | def : Pat<(v1i64 (and (xor VR64:$src1, (bc_v1i64 (v4i16 immAllOnesV_bc))), |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 598 | VR64:$src2)), |
| 599 | (MMX_PANDNrr VR64:$src1, VR64:$src2)>; |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 600 | def : Pat<(v1i64 (and (xor VR64:$src1, (bc_v1i64 (v8i8 immAllOnesV_bc))), |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 601 | VR64:$src2)), |
| 602 | (MMX_PANDNrr VR64:$src1, VR64:$src2)>; |
| 603 | |
| 604 | def : Pat<(v1i64 (and (xor VR64:$src1, (bc_v1i64 (v2i32 immAllOnesV))), |
| 605 | (load addr:$src2))), |
| 606 | (MMX_PANDNrm VR64:$src1, addr:$src2)>; |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 607 | def : Pat<(v1i64 (and (xor VR64:$src1, (bc_v1i64 (v4i16 immAllOnesV_bc))), |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 608 | (load addr:$src2))), |
| 609 | (MMX_PANDNrm VR64:$src1, addr:$src2)>; |
Chris Lattner | 8a59448 | 2007-11-25 00:24:49 +0000 | [diff] [blame] | 610 | def : Pat<(v1i64 (and (xor VR64:$src1, (bc_v1i64 (v8i8 immAllOnesV_bc))), |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 611 | (load addr:$src2))), |
| 612 | (MMX_PANDNrm VR64:$src1, addr:$src2)>; |