blob: 1ca23554aefabd4fd00c762623ab5b70d6b82a61 [file] [log] [blame]
Duncan Sands9d32f602011-01-20 13:21:55 +00001; RUN: opt < %s -instsimplify -S | FileCheck %s
2target datalayout = "p:32:32"
3
4define i1 @ptrtoint() {
5; CHECK: @ptrtoint
6 %a = alloca i8
7 %tmp = ptrtoint i8* %a to i32
8 %r = icmp eq i32 %tmp, 0
9 ret i1 %r
10; CHECK: ret i1 false
11}
12
13define i1 @zext(i32 %x) {
14; CHECK: @zext
15 %e1 = zext i32 %x to i64
16 %e2 = zext i32 %x to i64
17 %r = icmp eq i64 %e1, %e2
18 ret i1 %r
19; CHECK: ret i1 true
20}
21
22define i1 @zext2(i1 %x) {
23; CHECK: @zext2
24 %e = zext i1 %x to i32
25 %c = icmp ne i32 %e, 0
26 ret i1 %c
27; CHECK: ret i1 %x
28}
29
Duncan Sandsd70d1a52011-01-25 09:38:29 +000030define i1 @zext3() {
31; CHECK: @zext3
32 %e = zext i1 1 to i32
33 %c = icmp ne i32 %e, 0
34 ret i1 %c
35; CHECK: ret i1 true
36}
37
Duncan Sands9d32f602011-01-20 13:21:55 +000038define i1 @sext(i32 %x) {
39; CHECK: @sext
40 %e1 = sext i32 %x to i64
41 %e2 = sext i32 %x to i64
42 %r = icmp eq i64 %e1, %e2
43 ret i1 %r
44; CHECK: ret i1 true
45}
46
47define i1 @sext2(i1 %x) {
48; CHECK: @sext2
49 %e = sext i1 %x to i32
50 %c = icmp ne i32 %e, 0
51 ret i1 %c
52; CHECK: ret i1 %x
53}
Duncan Sandsd70d1a52011-01-25 09:38:29 +000054
55define i1 @sext3() {
56; CHECK: @sext3
57 %e = sext i1 1 to i32
58 %c = icmp ne i32 %e, 0
59 ret i1 %c
60; CHECK: ret i1 true
61}
62
63define i1 @add(i32 %x, i32 %y) {
Duncan Sands227fba12011-01-25 15:14:15 +000064; CHECK: @add
Duncan Sandsd70d1a52011-01-25 09:38:29 +000065 %l = lshr i32 %x, 1
Duncan Sands227fba12011-01-25 15:14:15 +000066 %q = lshr i32 %y, 1
67 %r = or i32 %q, 1
Duncan Sandsd70d1a52011-01-25 09:38:29 +000068 %s = add i32 %l, %r
69 %c = icmp eq i32 %s, 0
70 ret i1 %c
Duncan Sands227fba12011-01-25 15:14:15 +000071; CHECK: ret i1 false
Duncan Sandsd70d1a52011-01-25 09:38:29 +000072}
73
74define i1 @add2(i8 %x, i8 %y) {
75; CHECK: @add2
76 %l = or i8 %x, 128
77 %r = or i8 %y, 129
78 %s = add i8 %l, %r
79 %c = icmp eq i8 %s, 0
80 ret i1 %c
81; CHECK: ret i1 false
82}
83
Duncan Sands227fba12011-01-25 15:14:15 +000084define i1 @add3(i8 %x, i8 %y) {
85; CHECK: @add3
86 %l = zext i8 %x to i32
87 %r = zext i8 %y to i32
88 %s = add i32 %l, %r
89 %c = icmp eq i32 %s, 0
90 ret i1 %c
91; CHECK: ret i1 %c
92}
93
Duncan Sands52fb8462011-02-13 17:15:40 +000094define i1 @add4(i32 %x, i32 %y) {
95; CHECK: @add4
96 %z = add nsw i32 %y, 1
97 %s1 = add nsw i32 %x, %y
98 %s2 = add nsw i32 %x, %z
99 %c = icmp slt i32 %s1, %s2
100 ret i1 %c
101; CHECK: ret i1 true
102}
103
104define i1 @add5(i32 %x, i32 %y) {
105; CHECK: @add5
106 %z = add nuw i32 %y, 1
107 %s1 = add nuw i32 %x, %z
108 %s2 = add nuw i32 %x, %y
109 %c = icmp ugt i32 %s1, %s2
110 ret i1 %c
111; CHECK: ret i1 true
112}
113
Duncan Sandsd70d1a52011-01-25 09:38:29 +0000114define i1 @addpowtwo(i32 %x, i32 %y) {
115; CHECK: @addpowtwo
116 %l = lshr i32 %x, 1
117 %r = shl i32 1, %y
118 %s = add i32 %l, %r
119 %c = icmp eq i32 %s, 0
120 ret i1 %c
121; CHECK: ret i1 false
122}
123
124define i1 @or(i32 %x) {
125; CHECK: @or
126 %o = or i32 %x, 1
127 %c = icmp eq i32 %o, 0
128 ret i1 %c
129; CHECK: ret i1 false
130}
Duncan Sands91367822011-01-29 13:27:00 +0000131
132define i1 @shl(i32 %x) {
133; CHECK: @shl
134 %s = shl i32 1, %x
135 %c = icmp eq i32 %s, 0
136 ret i1 %c
137; CHECK: ret i1 false
138}
139
Nick Lewycky3a73e342011-03-04 07:00:57 +0000140define i1 @lshr1(i32 %x) {
141; CHECK: @lshr1
Duncan Sands91367822011-01-29 13:27:00 +0000142 %s = lshr i32 -1, %x
143 %c = icmp eq i32 %s, 0
144 ret i1 %c
145; CHECK: ret i1 false
146}
147
Nick Lewycky3a73e342011-03-04 07:00:57 +0000148define i1 @lshr2(i32 %x) {
149; CHECK: @lshr2
150 %s = lshr i32 %x, 30
151 %c = icmp ugt i32 %s, 8
152 ret i1 %c
153; CHECK: ret i1 false
154}
155
156define i1 @ashr1(i32 %x) {
157; CHECK: @ashr1
Duncan Sands91367822011-01-29 13:27:00 +0000158 %s = ashr i32 -1, %x
159 %c = icmp eq i32 %s, 0
160 ret i1 %c
161; CHECK: ret i1 false
162}
Duncan Sands50ca4d32011-02-03 09:37:39 +0000163
Nick Lewycky3a73e342011-03-04 07:00:57 +0000164define i1 @ashr2(i32 %x) {
165; CHECK: @ashr2
166 %s = ashr i32 %x, 30
167 %c = icmp slt i32 %s, -5
168 ret i1 %c
169; CHECK: ret i1 false
170}
171
Duncan Sands50ca4d32011-02-03 09:37:39 +0000172define i1 @select1(i1 %cond) {
173; CHECK: @select1
174 %s = select i1 %cond, i32 1, i32 0
175 %c = icmp eq i32 %s, 1
176 ret i1 %c
177; CHECK: ret i1 %cond
178}
179
180define i1 @select2(i1 %cond) {
181; CHECK: @select2
182 %x = zext i1 %cond to i32
183 %s = select i1 %cond, i32 %x, i32 0
184 %c = icmp ne i32 %s, 0
185 ret i1 %c
186; CHECK: ret i1 %cond
187}
188
189define i1 @select3(i1 %cond) {
190; CHECK: @select3
191 %x = zext i1 %cond to i32
192 %s = select i1 %cond, i32 1, i32 %x
193 %c = icmp ne i32 %s, 0
194 ret i1 %c
195; CHECK: ret i1 %cond
196}
197
198define i1 @select4(i1 %cond) {
199; CHECK: @select4
200 %invert = xor i1 %cond, 1
201 %s = select i1 %invert, i32 0, i32 1
202 %c = icmp ne i32 %s, 0
203 ret i1 %c
204; CHECK: ret i1 %cond
205}
Nick Lewycky88cd0aa2011-03-01 08:15:50 +0000206
Duncan Sands6dc9e2b2011-10-30 19:56:36 +0000207define i1 @select5(i32 %x) {
208; CHECK: @select5
209 %c = icmp eq i32 %x, 0
210 %s = select i1 %c, i32 1, i32 %x
211 %c2 = icmp eq i32 %s, 0
212 ret i1 %c2
213; CHECK: ret i1 false
214}
215
216define i1 @select6(i32 %x) {
217; CHECK: @select6
218 %c = icmp sgt i32 %x, 0
219 %s = select i1 %c, i32 %x, i32 4
220 %c2 = icmp eq i32 %s, 0
221 ret i1 %c2
222; CHECK: ret i1 %c2
223}
224
Nick Lewycky88cd0aa2011-03-01 08:15:50 +0000225define i1 @urem1(i32 %X, i32 %Y) {
226; CHECK: @urem1
227 %A = urem i32 %X, %Y
228 %B = icmp ult i32 %A, %Y
229 ret i1 %B
230; CHECK: ret i1 true
231}
232
233define i1 @urem2(i32 %X, i32 %Y) {
234; CHECK: @urem2
235 %A = urem i32 %X, %Y
236 %B = icmp eq i32 %A, %Y
237 ret i1 %B
Benjamin Kramer7bff3e72011-03-09 22:07:31 +0000238; CHECK: ret i1 false
Nick Lewycky88cd0aa2011-03-01 08:15:50 +0000239}
Nick Lewycky3a73e342011-03-04 07:00:57 +0000240
241define i1 @urem3(i32 %X) {
242; CHECK: @urem3
243 %A = urem i32 %X, 10
244 %B = icmp ult i32 %A, 15
245 ret i1 %B
246; CHECK: ret i1 true
247}
248
249define i1 @urem4(i32 %X) {
250; CHECK: @urem4
251 %A = urem i32 %X, 15
252 %B = icmp ult i32 %A, 10
253 ret i1 %B
254; CHECK: ret i1 %B
255}
256
Nick Lewycky78679272011-03-04 10:06:52 +0000257define i1 @urem5(i16 %X, i32 %Y) {
258; CHECK: @urem5
259 %A = zext i16 %X to i32
260 %B = urem i32 %A, %Y
261 %C = icmp slt i32 %B, %Y
262 ret i1 %C
263; CHECK: ret i1 true
264}
265
Nick Lewycky84dd4fa2011-03-09 06:26:03 +0000266define i1 @urem6(i32 %X, i32 %Y) {
267; CHECK: @urem6
268 %A = urem i32 %X, %Y
269 %B = icmp ugt i32 %Y, %A
270 ret i1 %B
271; CHECK: ret i1 true
272}
273
Nick Lewycky3a73e342011-03-04 07:00:57 +0000274define i1 @srem1(i32 %X) {
275; CHECK: @srem1
276 %A = srem i32 %X, -5
277 %B = icmp sgt i32 %A, 5
278 ret i1 %B
279; CHECK: ret i1 false
280}
281
Nick Lewyckyb69050a2011-03-11 09:00:19 +0000282; PR9343 #15
283; CHECK: @srem2
284; CHECK: ret i1 false
285define i1 @srem2(i16 %X, i32 %Y) {
286 %A = zext i16 %X to i32
287 %B = add nsw i32 %A, 1
288 %C = srem i32 %B, %Y
289 %D = icmp slt i32 %C, 0
290 ret i1 %D
291}
Benjamin Kramer14b2a592011-03-12 17:18:11 +0000292
293; CHECK: @srem3
294; CHECK-NEXT: ret i1 false
295define i1 @srem3(i16 %X, i32 %Y) {
296 %A = zext i16 %X to i32
297 %B = or i32 2147483648, %A
298 %C = sub nsw i32 1, %B
299 %D = srem i32 %C, %Y
300 %E = icmp slt i32 %D, 0
301 ret i1 %E
302}
303
Nick Lewycky3a73e342011-03-04 07:00:57 +0000304define i1 @udiv1(i32 %X) {
305; CHECK: @udiv1
306 %A = udiv i32 %X, 1000000
307 %B = icmp ult i32 %A, 5000
308 ret i1 %B
309; CHECK: ret i1 true
310}
311
Nick Lewycky58bfcdb2011-03-05 05:19:11 +0000312define i1 @udiv2(i32 %X, i32 %Y, i32 %Z) {
313; CHECK: @udiv2
314 %A = udiv exact i32 10, %Z
315 %B = udiv exact i32 20, %Z
316 %C = icmp ult i32 %A, %B
317 ret i1 %C
318; CHECK: ret i1 true
319}
320
Duncan Sandsc65c7472011-10-28 18:17:44 +0000321define i1 @udiv3(i32 %X, i32 %Y) {
322; CHECK: @udiv3
323 %A = udiv i32 %X, %Y
324 %C = icmp ugt i32 %A, %X
325 ret i1 %C
326; CHECK: ret i1 false
327}
328
329define i1 @udiv4(i32 %X, i32 %Y) {
330; CHECK: @udiv4
331 %A = udiv i32 %X, %Y
332 %C = icmp ule i32 %A, %X
333 ret i1 %C
334; CHECK: ret i1 true
335}
336
337define i1 @udiv5(i32 %X) {
338; CHECK: @udiv5
339 %A = udiv i32 123, %X
340 %C = icmp ugt i32 %A, 124
341 ret i1 %C
342; CHECK: ret i1 false
343}
344
Eli Friedman7781ae52011-11-08 21:08:02 +0000345; PR11340
346define i1 @udiv6(i32 %X) nounwind {
347; CHECK: @udiv6
348 %A = udiv i32 1, %X
349 %C = icmp eq i32 %A, 0
350 ret i1 %C
351; CHECK: ret i1 %C
352}
353
354
Nick Lewycky3a73e342011-03-04 07:00:57 +0000355define i1 @sdiv1(i32 %X) {
356; CHECK: @sdiv1
357 %A = sdiv i32 %X, 1000000
358 %B = icmp slt i32 %A, 3000
359 ret i1 %B
360; CHECK: ret i1 true
361}
362
363define i1 @or1(i32 %X) {
364; CHECK: @or1
365 %A = or i32 %X, 62
366 %B = icmp ult i32 %A, 50
367 ret i1 %B
368; CHECK: ret i1 false
369}
370
371define i1 @and1(i32 %X) {
372; CHECK: @and1
373 %A = and i32 %X, 62
374 %B = icmp ugt i32 %A, 70
375 ret i1 %B
376; CHECK: ret i1 false
377}
Duncan Sands32a43cc2011-10-27 19:16:21 +0000378
379define i1 @mul1(i32 %X) {
380; CHECK: @mul1
381; Square of a non-zero number is non-zero if there is no overflow.
382 %Y = or i32 %X, 1
383 %M = mul nuw i32 %Y, %Y
384 %C = icmp eq i32 %M, 0
385 ret i1 %C
386; CHECK: ret i1 false
387}
388
389define i1 @mul2(i32 %X) {
390; CHECK: @mul2
391; Square of a non-zero number is positive if there is no signed overflow.
392 %Y = or i32 %X, 1
393 %M = mul nsw i32 %Y, %Y
394 %C = icmp sgt i32 %M, 0
395 ret i1 %C
396; CHECK: ret i1 true
397}
398
399define i1 @mul3(i32 %X, i32 %Y) {
400; CHECK: @mul3
401; Product of non-negative numbers is non-negative if there is no signed overflow.
402 %XX = mul nsw i32 %X, %X
403 %YY = mul nsw i32 %Y, %Y
404 %M = mul nsw i32 %XX, %YY
405 %C = icmp sge i32 %M, 0
406 ret i1 %C
407; CHECK: ret i1 true
408}
Duncan Sandsedfb9312012-02-10 14:26:42 +0000409
410define <2 x i1> @vectorselect1(<2 x i1> %cond) {
411; CHECK: @vectorselect1
412 %invert = xor <2 x i1> %cond, <i1 1, i1 1>
413 %s = select <2 x i1> %invert, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 1, i32 1>
414 %c = icmp ne <2 x i32> %s, <i32 0, i32 0>
415 ret <2 x i1> %c
416; CHECK: ret <2 x i1> %cond
417}