Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1 | /* |
| 2 | * © Copyright 2018 Alyssa Rosenzweig |
Alyssa Rosenzweig | 5ff7973 | 2019-08-06 16:43:28 -0700 | [diff] [blame] | 3 | * Copyright © 2014-2017 Broadcom |
Alyssa Rosenzweig | f714eab | 2019-08-07 10:11:28 -0700 | [diff] [blame] | 4 | * Copyright (C) 2017 Intel Corporation |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice (including the next |
| 14 | * paragraph) shall be included in all copies or substantial portions of the |
| 15 | * Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 23 | * SOFTWARE. |
| 24 | * |
| 25 | */ |
| 26 | |
| 27 | #include <sys/poll.h> |
| 28 | #include <errno.h> |
| 29 | |
Boris Brezillon | 154cb72 | 2019-09-14 09:58:55 +0200 | [diff] [blame] | 30 | #include "pan_bo.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 31 | #include "pan_context.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 32 | #include "pan_format.h" |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 33 | #include "panfrost-quirks.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 34 | |
| 35 | #include "util/macros.h" |
Eric Anholt | 882ca6d | 2019-06-27 15:05:31 -0700 | [diff] [blame] | 36 | #include "util/format/u_format.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 37 | #include "util/u_inlines.h" |
| 38 | #include "util/u_upload_mgr.h" |
| 39 | #include "util/u_memory.h" |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 40 | #include "util/u_vbuf.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 41 | #include "util/half_float.h" |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 42 | #include "util/u_helpers.h" |
Eric Anholt | 882ca6d | 2019-06-27 15:05:31 -0700 | [diff] [blame] | 43 | #include "util/format/u_format.h" |
Alyssa Rosenzweig | 72fc06d | 2019-08-08 07:10:24 -0700 | [diff] [blame] | 44 | #include "util/u_prim.h" |
Alyssa Rosenzweig | 7f54812 | 2019-06-26 15:59:29 -0700 | [diff] [blame] | 45 | #include "util/u_prim_restart.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 46 | #include "indices/u_primconvert.h" |
| 47 | #include "tgsi/tgsi_parse.h" |
Alyssa Rosenzweig | 4647999 | 2019-07-31 15:49:13 -0700 | [diff] [blame] | 48 | #include "tgsi/tgsi_from_mesa.h" |
Alyssa Rosenzweig | 31f5a43 | 2019-05-02 02:27:04 +0000 | [diff] [blame] | 49 | #include "util/u_math.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 50 | |
| 51 | #include "pan_screen.h" |
| 52 | #include "pan_blending.h" |
| 53 | #include "pan_blend_shaders.h" |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 54 | #include "pan_util.h" |
Icecream95 | cf2c5a5 | 2020-01-23 10:32:18 +1300 | [diff] [blame] | 55 | #include "pandecode/decode.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 56 | |
Alyssa Rosenzweig | b0e915b | 2019-12-09 11:00:42 -0500 | [diff] [blame] | 57 | struct midgard_tiler_descriptor |
Boris Brezillon | aa851a6 | 2019-09-01 10:30:39 +0200 | [diff] [blame] | 58 | panfrost_emit_midg_tiler(struct panfrost_batch *batch, unsigned vertex_count) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 59 | { |
Tomeu Vizoso | 6469c1a | 2019-10-29 15:42:03 +0100 | [diff] [blame] | 60 | struct panfrost_screen *screen = pan_screen(batch->ctx->base.screen); |
Alyssa Rosenzweig | 9fb0904 | 2019-11-27 08:31:16 -0500 | [diff] [blame] | 61 | bool hierarchy = !(screen->quirks & MIDGARD_NO_HIER_TILING); |
Vinson Lee | de2e5f6 | 2019-11-27 23:37:00 -0800 | [diff] [blame] | 62 | struct midgard_tiler_descriptor t = {0}; |
Boris Brezillon | aa851a6 | 2019-09-01 10:30:39 +0200 | [diff] [blame] | 63 | unsigned height = batch->key.height; |
| 64 | unsigned width = batch->key.width; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 65 | |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 66 | t.hierarchy_mask = |
Alyssa Rosenzweig | 9fb0904 | 2019-11-27 08:31:16 -0500 | [diff] [blame] | 67 | panfrost_choose_hierarchy_mask(width, height, vertex_count, hierarchy); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 68 | |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 69 | /* Compute the polygon header size and use that to offset the body */ |
| 70 | |
| 71 | unsigned header_size = panfrost_tiler_header_size( |
Alyssa Rosenzweig | 9fb0904 | 2019-11-27 08:31:16 -0500 | [diff] [blame] | 72 | width, height, t.hierarchy_mask, hierarchy); |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 73 | |
Alyssa Rosenzweig | f5c2934 | 2019-08-19 14:30:53 -0700 | [diff] [blame] | 74 | t.polygon_list_size = panfrost_tiler_full_size( |
Alyssa Rosenzweig | 9fb0904 | 2019-11-27 08:31:16 -0500 | [diff] [blame] | 75 | width, height, t.hierarchy_mask, hierarchy); |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 76 | |
| 77 | /* Sanity check */ |
| 78 | |
Alyssa Rosenzweig | 9fb0904 | 2019-11-27 08:31:16 -0500 | [diff] [blame] | 79 | if (vertex_count) { |
Boris Brezillon | 1e483a8 | 2019-09-14 19:18:51 +0200 | [diff] [blame] | 80 | struct panfrost_bo *tiler_heap; |
| 81 | |
| 82 | tiler_heap = panfrost_batch_get_tiler_heap(batch); |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 83 | t.polygon_list = panfrost_batch_get_polygon_list(batch, |
| 84 | header_size + |
| 85 | t.polygon_list_size); |
Alyssa Rosenzweig | f5c2934 | 2019-08-19 14:30:53 -0700 | [diff] [blame] | 86 | |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 87 | |
| 88 | /* Allow the entire tiler heap */ |
Boris Brezillon | 1e483a8 | 2019-09-14 19:18:51 +0200 | [diff] [blame] | 89 | t.heap_start = tiler_heap->gpu; |
| 90 | t.heap_end = tiler_heap->gpu + tiler_heap->size; |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 91 | } else { |
Boris Brezillon | 1e483a8 | 2019-09-14 19:18:51 +0200 | [diff] [blame] | 92 | struct panfrost_bo *tiler_dummy; |
| 93 | |
| 94 | tiler_dummy = panfrost_batch_get_tiler_dummy(batch); |
Alyssa Rosenzweig | 9fb0904 | 2019-11-27 08:31:16 -0500 | [diff] [blame] | 95 | header_size = MALI_TILER_MINIMUM_HEADER_SIZE; |
Boris Brezillon | 1e483a8 | 2019-09-14 19:18:51 +0200 | [diff] [blame] | 96 | |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 97 | /* The tiler is disabled, so don't allow the tiler heap */ |
Boris Brezillon | 1e483a8 | 2019-09-14 19:18:51 +0200 | [diff] [blame] | 98 | t.heap_start = tiler_dummy->gpu; |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 99 | t.heap_end = t.heap_start; |
| 100 | |
| 101 | /* Use a dummy polygon list */ |
Boris Brezillon | 1e483a8 | 2019-09-14 19:18:51 +0200 | [diff] [blame] | 102 | t.polygon_list = tiler_dummy->gpu; |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 103 | |
Alyssa Rosenzweig | 897110a | 2019-08-19 14:47:50 -0700 | [diff] [blame] | 104 | /* Disable the tiler */ |
Alyssa Rosenzweig | 9fb0904 | 2019-11-27 08:31:16 -0500 | [diff] [blame] | 105 | if (hierarchy) |
| 106 | t.hierarchy_mask |= MALI_TILER_DISABLED; |
| 107 | else { |
| 108 | t.hierarchy_mask = MALI_TILER_USER; |
| 109 | t.polygon_list_size = MALI_TILER_MINIMUM_HEADER_SIZE + 4; |
Tomeu Vizoso | 6469c1a | 2019-10-29 15:42:03 +0100 | [diff] [blame] | 110 | |
Alyssa Rosenzweig | adf716d | 2019-12-05 09:06:53 -0500 | [diff] [blame] | 111 | /* We don't have a WRITE_VALUE job, so write the polygon list manually */ |
Tomeu Vizoso | 6469c1a | 2019-10-29 15:42:03 +0100 | [diff] [blame] | 112 | uint32_t *polygon_list_body = (uint32_t *) (tiler_dummy->cpu + header_size); |
| 113 | polygon_list_body[0] = 0xa0000000; /* TODO: Just that? */ |
| 114 | } |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | t.polygon_list_body = |
| 118 | t.polygon_list + header_size; |
| 119 | |
Alyssa Rosenzweig | 31fc52a | 2019-07-10 07:22:19 -0700 | [diff] [blame] | 120 | return t; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 121 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 122 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 123 | static void |
| 124 | panfrost_clear( |
| 125 | struct pipe_context *pipe, |
| 126 | unsigned buffers, |
| 127 | const union pipe_color_union *color, |
| 128 | double depth, unsigned stencil) |
| 129 | { |
| 130 | struct panfrost_context *ctx = pan_context(pipe); |
Boris Brezillon | c138ca8 | 2019-09-19 15:52:02 +0200 | [diff] [blame] | 131 | |
| 132 | /* TODO: panfrost_get_fresh_batch_for_fbo() instantiates a new batch if |
| 133 | * the existing batch targeting this FBO has draws. We could probably |
| 134 | * avoid that by replacing plain clears by quad-draws with a specific |
| 135 | * color/depth/stencil value, thus avoiding the generation of extra |
Alyssa Rosenzweig | adf716d | 2019-12-05 09:06:53 -0500 | [diff] [blame] | 136 | * fragment jobs. |
Boris Brezillon | c138ca8 | 2019-09-19 15:52:02 +0200 | [diff] [blame] | 137 | */ |
| 138 | struct panfrost_batch *batch = panfrost_get_fresh_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 139 | |
Boris Brezillon | 0eec73a | 2019-09-14 18:40:23 +0200 | [diff] [blame] | 140 | panfrost_batch_add_fbo_bos(batch); |
Boris Brezillon | 12d8a17 | 2019-09-05 21:41:28 +0200 | [diff] [blame] | 141 | panfrost_batch_clear(batch, buffers, color, depth, stencil); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 142 | } |
| 143 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 144 | static void |
Boris Brezillon | 12f7217 | 2019-08-02 19:18:46 +0200 | [diff] [blame] | 145 | panfrost_attach_vt_framebuffer(struct panfrost_context *ctx) |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 146 | { |
Alyssa Rosenzweig | 990e244 | 2019-07-24 08:46:15 -0700 | [diff] [blame] | 147 | struct panfrost_screen *screen = pan_screen(ctx->base.screen); |
Boris Brezillon | 4166ca9 | 2019-09-05 19:07:12 +0200 | [diff] [blame] | 148 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
| 149 | |
Alyssa Rosenzweig | b0e915b | 2019-12-09 11:00:42 -0500 | [diff] [blame] | 150 | /* If we haven't, reserve space for the framebuffer */ |
| 151 | |
| 152 | if (!batch->framebuffer.gpu) { |
| 153 | unsigned size = (screen->quirks & MIDGARD_SFBD) ? |
| 154 | sizeof(struct mali_single_framebuffer) : |
| 155 | sizeof(struct bifrost_framebuffer); |
| 156 | |
| 157 | batch->framebuffer = panfrost_allocate_transient(batch, size); |
| 158 | |
| 159 | /* Tag the pointer */ |
| 160 | if (!(screen->quirks & MIDGARD_SFBD)) |
| 161 | batch->framebuffer.gpu |= MALI_MFBD; |
| 162 | } |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 163 | |
Alyssa Rosenzweig | cd1be46 | 2019-07-31 14:08:07 -0700 | [diff] [blame] | 164 | for (unsigned i = 0; i < PIPE_SHADER_TYPES; ++i) |
Alyssa Rosenzweig | b0e915b | 2019-12-09 11:00:42 -0500 | [diff] [blame] | 165 | ctx->payloads[i].postfix.framebuffer = batch->framebuffer.gpu; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 166 | } |
| 167 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 168 | /* Reset per-frame context, called on context initialisation as well as after |
| 169 | * flushing a frame */ |
| 170 | |
Boris Brezillon | 6ddfd37 | 2019-09-05 20:47:45 +0200 | [diff] [blame] | 171 | void |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 172 | panfrost_invalidate_frame(struct panfrost_context *ctx) |
| 173 | { |
Alyssa Rosenzweig | cd1be46 | 2019-07-31 14:08:07 -0700 | [diff] [blame] | 174 | for (unsigned i = 0; i < PIPE_SHADER_TYPES; ++i) |
| 175 | ctx->payloads[i].postfix.framebuffer = 0; |
Alyssa Rosenzweig | 718ebfa | 2019-07-11 11:39:33 -0700 | [diff] [blame] | 176 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 177 | if (ctx->rasterizer) |
| 178 | ctx->dirty |= PAN_DIRTY_RASTERIZER; |
| 179 | |
| 180 | /* XXX */ |
| 181 | ctx->dirty |= PAN_DIRTY_SAMPLERS | PAN_DIRTY_TEXTURES; |
Alyssa Rosenzweig | 72fc06d | 2019-08-08 07:10:24 -0700 | [diff] [blame] | 182 | |
| 183 | /* TODO: When does this need to be handled? */ |
| 184 | ctx->active_queries = true; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 185 | } |
| 186 | |
| 187 | /* In practice, every field of these payloads should be configurable |
| 188 | * arbitrarily, which means these functions are basically catch-all's for |
| 189 | * as-of-yet unwavering unknowns */ |
| 190 | |
| 191 | static void |
| 192 | panfrost_emit_vertex_payload(struct panfrost_context *ctx) |
| 193 | { |
Tomeu Vizoso | 5a7688f | 2019-07-11 08:06:41 +0200 | [diff] [blame] | 194 | /* 0x2 bit clear on 32-bit T6XX */ |
| 195 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 196 | struct midgard_payload_vertex_tiler payload = { |
Tomeu Vizoso | 5a7688f | 2019-07-11 08:06:41 +0200 | [diff] [blame] | 197 | .gl_enables = 0x4 | 0x2, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 198 | }; |
| 199 | |
Alyssa Rosenzweig | 3b72241 | 2019-07-31 14:56:03 -0700 | [diff] [blame] | 200 | /* Vertex and compute are closely coupled, so share a payload */ |
| 201 | |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 202 | memcpy(&ctx->payloads[PIPE_SHADER_VERTEX], &payload, sizeof(payload)); |
Alyssa Rosenzweig | 3b72241 | 2019-07-31 14:56:03 -0700 | [diff] [blame] | 203 | memcpy(&ctx->payloads[PIPE_SHADER_COMPUTE], &payload, sizeof(payload)); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 204 | } |
| 205 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 206 | static unsigned |
| 207 | translate_tex_wrap(enum pipe_tex_wrap w) |
| 208 | { |
| 209 | switch (w) { |
| 210 | case PIPE_TEX_WRAP_REPEAT: |
| 211 | return MALI_WRAP_REPEAT; |
| 212 | |
Alyssa Rosenzweig | 9836c26 | 2019-08-20 13:14:56 -0700 | [diff] [blame] | 213 | case PIPE_TEX_WRAP_CLAMP: |
Alyssa Rosenzweig | 5fe5827 | 2019-12-27 12:42:53 -0500 | [diff] [blame] | 214 | return MALI_WRAP_CLAMP; |
| 215 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 216 | case PIPE_TEX_WRAP_CLAMP_TO_EDGE: |
| 217 | return MALI_WRAP_CLAMP_TO_EDGE; |
| 218 | |
| 219 | case PIPE_TEX_WRAP_CLAMP_TO_BORDER: |
| 220 | return MALI_WRAP_CLAMP_TO_BORDER; |
| 221 | |
| 222 | case PIPE_TEX_WRAP_MIRROR_REPEAT: |
| 223 | return MALI_WRAP_MIRRORED_REPEAT; |
| 224 | |
Alyssa Rosenzweig | 5fe5827 | 2019-12-27 12:42:53 -0500 | [diff] [blame] | 225 | case PIPE_TEX_WRAP_MIRROR_CLAMP: |
| 226 | return MALI_WRAP_MIRRORED_CLAMP; |
| 227 | |
| 228 | case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: |
| 229 | return MALI_WRAP_MIRRORED_CLAMP_TO_EDGE; |
| 230 | |
| 231 | case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: |
| 232 | return MALI_WRAP_MIRRORED_CLAMP_TO_BORDER; |
| 233 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 234 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 235 | unreachable("Invalid wrap"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 236 | } |
| 237 | } |
| 238 | |
| 239 | static unsigned |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 240 | panfrost_translate_compare_func(enum pipe_compare_func in) |
| 241 | { |
| 242 | switch (in) { |
| 243 | case PIPE_FUNC_NEVER: |
| 244 | return MALI_FUNC_NEVER; |
| 245 | |
| 246 | case PIPE_FUNC_LESS: |
| 247 | return MALI_FUNC_LESS; |
| 248 | |
| 249 | case PIPE_FUNC_EQUAL: |
| 250 | return MALI_FUNC_EQUAL; |
| 251 | |
| 252 | case PIPE_FUNC_LEQUAL: |
| 253 | return MALI_FUNC_LEQUAL; |
| 254 | |
| 255 | case PIPE_FUNC_GREATER: |
| 256 | return MALI_FUNC_GREATER; |
| 257 | |
| 258 | case PIPE_FUNC_NOTEQUAL: |
| 259 | return MALI_FUNC_NOTEQUAL; |
| 260 | |
| 261 | case PIPE_FUNC_GEQUAL: |
| 262 | return MALI_FUNC_GEQUAL; |
| 263 | |
| 264 | case PIPE_FUNC_ALWAYS: |
| 265 | return MALI_FUNC_ALWAYS; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 266 | |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 267 | default: |
| 268 | unreachable("Invalid func"); |
| 269 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 270 | } |
| 271 | |
| 272 | static unsigned |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 273 | panfrost_translate_stencil_op(enum pipe_stencil_op in) |
| 274 | { |
| 275 | switch (in) { |
| 276 | case PIPE_STENCIL_OP_KEEP: |
| 277 | return MALI_STENCIL_KEEP; |
| 278 | |
| 279 | case PIPE_STENCIL_OP_ZERO: |
| 280 | return MALI_STENCIL_ZERO; |
| 281 | |
| 282 | case PIPE_STENCIL_OP_REPLACE: |
| 283 | return MALI_STENCIL_REPLACE; |
| 284 | |
| 285 | case PIPE_STENCIL_OP_INCR: |
| 286 | return MALI_STENCIL_INCR; |
| 287 | |
| 288 | case PIPE_STENCIL_OP_DECR: |
| 289 | return MALI_STENCIL_DECR; |
| 290 | |
| 291 | case PIPE_STENCIL_OP_INCR_WRAP: |
| 292 | return MALI_STENCIL_INCR_WRAP; |
| 293 | |
| 294 | case PIPE_STENCIL_OP_DECR_WRAP: |
| 295 | return MALI_STENCIL_DECR_WRAP; |
| 296 | |
| 297 | case PIPE_STENCIL_OP_INVERT: |
| 298 | return MALI_STENCIL_INVERT; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 299 | |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 300 | default: |
| 301 | unreachable("Invalid stencil op"); |
| 302 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 303 | } |
| 304 | |
| 305 | static void |
| 306 | panfrost_make_stencil_state(const struct pipe_stencil_state *in, struct mali_stencil_test *out) |
| 307 | { |
| 308 | out->ref = 0; /* Gallium gets it from elsewhere */ |
| 309 | |
| 310 | out->mask = in->valuemask; |
| 311 | out->func = panfrost_translate_compare_func(in->func); |
| 312 | out->sfail = panfrost_translate_stencil_op(in->fail_op); |
| 313 | out->dpfail = panfrost_translate_stencil_op(in->zfail_op); |
| 314 | out->dppass = panfrost_translate_stencil_op(in->zpass_op); |
| 315 | } |
| 316 | |
| 317 | static void |
| 318 | panfrost_default_shader_backend(struct panfrost_context *ctx) |
| 319 | { |
Tomeu Vizoso | e40d11c | 2019-11-05 16:25:27 +0100 | [diff] [blame] | 320 | struct panfrost_screen *screen = pan_screen(ctx->base.screen); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 321 | struct mali_shader_meta shader = { |
| 322 | .alpha_coverage = ~MALI_ALPHA_COVERAGE(0.000000), |
| 323 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 324 | .unknown2_3 = MALI_DEPTH_FUNC(MALI_FUNC_ALWAYS) | 0x3010, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 325 | .unknown2_4 = MALI_NO_MSAA | 0x4e0, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 326 | }; |
| 327 | |
Tomeu Vizoso | e40d11c | 2019-11-05 16:25:27 +0100 | [diff] [blame] | 328 | /* unknown2_4 has 0x10 bit set on T6XX and T720. We don't know why this is |
Arnaud Patard | 397f9ba | 2019-07-23 06:42:00 -0700 | [diff] [blame] | 329 | * required (independent of 32-bit/64-bit descriptors), or why it's not |
| 330 | * used on later GPU revisions. Otherwise, all shader jobs fault on |
| 331 | * these earlier chips (perhaps this is a chicken bit of some kind). |
| 332 | * More investigation is needed. */ |
| 333 | |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 334 | if (screen->quirks & MIDGARD_SFBD) |
Arnaud Patard | 397f9ba | 2019-07-23 06:42:00 -0700 | [diff] [blame] | 335 | shader.unknown2_4 |= 0x10; |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 336 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 337 | struct pipe_stencil_state default_stencil = { |
| 338 | .enabled = 0, |
| 339 | .func = PIPE_FUNC_ALWAYS, |
| 340 | .fail_op = MALI_STENCIL_KEEP, |
| 341 | .zfail_op = MALI_STENCIL_KEEP, |
| 342 | .zpass_op = MALI_STENCIL_KEEP, |
| 343 | .writemask = 0xFF, |
| 344 | .valuemask = 0xFF |
| 345 | }; |
| 346 | |
| 347 | panfrost_make_stencil_state(&default_stencil, &shader.stencil_front); |
| 348 | shader.stencil_mask_front = default_stencil.writemask; |
| 349 | |
| 350 | panfrost_make_stencil_state(&default_stencil, &shader.stencil_back); |
| 351 | shader.stencil_mask_back = default_stencil.writemask; |
| 352 | |
| 353 | if (default_stencil.enabled) |
| 354 | shader.unknown2_4 |= MALI_STENCIL_TEST; |
| 355 | |
| 356 | memcpy(&ctx->fragment_shader_core, &shader, sizeof(shader)); |
| 357 | } |
| 358 | |
| 359 | /* Generates a vertex/tiler job. This is, in some sense, the heart of the |
| 360 | * graphics command stream. It should be called once per draw, accordding to |
| 361 | * presentations. Set is_tiler for "tiler" jobs (fragment shader jobs, but in |
| 362 | * Mali parlance, "fragment" refers to framebuffer writeout). Clear it for |
| 363 | * vertex jobs. */ |
| 364 | |
| 365 | struct panfrost_transfer |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 366 | panfrost_vertex_tiler_job(struct panfrost_context *ctx, bool is_tiler) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 367 | { |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 368 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 369 | struct mali_job_descriptor_header job = { |
| 370 | .job_type = is_tiler ? JOB_TYPE_TILER : JOB_TYPE_VERTEX, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 371 | .job_descriptor_size = 1, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 372 | }; |
| 373 | |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 374 | struct midgard_payload_vertex_tiler *payload = is_tiler ? &ctx->payloads[PIPE_SHADER_FRAGMENT] : &ctx->payloads[PIPE_SHADER_VERTEX]; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 375 | |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 376 | struct panfrost_transfer transfer = panfrost_allocate_transient(batch, sizeof(job) + sizeof(*payload)); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 377 | memcpy(transfer.cpu, &job, sizeof(job)); |
Tomeu Vizoso | 5a7688f | 2019-07-11 08:06:41 +0200 | [diff] [blame] | 378 | memcpy(transfer.cpu + sizeof(job), payload, sizeof(*payload)); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 379 | return transfer; |
| 380 | } |
| 381 | |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 382 | mali_ptr |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 383 | panfrost_vertex_buffer_address(struct panfrost_context *ctx, unsigned i) |
| 384 | { |
| 385 | struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[i]; |
| 386 | struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer.resource); |
| 387 | |
| 388 | return rsrc->bo->gpu + buf->buffer_offset; |
| 389 | } |
| 390 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 391 | static bool |
| 392 | panfrost_writes_point_size(struct panfrost_context *ctx) |
| 393 | { |
Alyssa Rosenzweig | ac6aa93 | 2019-07-31 14:13:30 -0700 | [diff] [blame] | 394 | assert(ctx->shader[PIPE_SHADER_VERTEX]); |
| 395 | struct panfrost_shader_state *vs = &ctx->shader[PIPE_SHADER_VERTEX]->variants[ctx->shader[PIPE_SHADER_VERTEX]->active_variant]; |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 396 | |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 397 | return vs->writes_point_size && ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.draw_mode == MALI_POINTS; |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 398 | } |
| 399 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 400 | /* Stage the attribute descriptors so we can adjust src_offset |
| 401 | * to let BOs align nicely */ |
| 402 | |
| 403 | static void |
| 404 | panfrost_stage_attributes(struct panfrost_context *ctx) |
| 405 | { |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 406 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 407 | struct panfrost_vertex_state *so = ctx->vertex; |
| 408 | |
Alyssa Rosenzweig | be691ca | 2019-12-19 14:00:24 -0500 | [diff] [blame] | 409 | size_t sz = sizeof(struct mali_attr_meta) * PAN_MAX_ATTRIBUTE; |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 410 | struct panfrost_transfer transfer = panfrost_allocate_transient(batch, sz); |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 411 | struct mali_attr_meta *target = (struct mali_attr_meta *) transfer.cpu; |
| 412 | |
| 413 | /* Copy as-is for the first pass */ |
| 414 | memcpy(target, so->hw, sz); |
| 415 | |
| 416 | /* Fixup offsets for the second pass. Recall that the hardware |
| 417 | * calculates attribute addresses as: |
| 418 | * |
| 419 | * addr = base + (stride * vtx) + src_offset; |
| 420 | * |
| 421 | * However, on Mali, base must be aligned to 64-bytes, so we |
| 422 | * instead let: |
| 423 | * |
| 424 | * base' = base & ~63 = base - (base & 63) |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 425 | * |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 426 | * To compensate when using base' (see emit_vertex_data), we have |
| 427 | * to adjust src_offset by the masked off piece: |
| 428 | * |
| 429 | * addr' = base' + (stride * vtx) + (src_offset + (base & 63)) |
| 430 | * = base - (base & 63) + (stride * vtx) + src_offset + (base & 63) |
| 431 | * = base + (stride * vtx) + src_offset |
| 432 | * = addr; |
| 433 | * |
| 434 | * QED. |
| 435 | */ |
| 436 | |
Rohan Garg | 16edd56 | 2019-07-17 18:50:13 +0200 | [diff] [blame] | 437 | unsigned start = ctx->payloads[PIPE_SHADER_VERTEX].offset_start; |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 438 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 439 | for (unsigned i = 0; i < so->num_elements; ++i) { |
| 440 | unsigned vbi = so->pipe[i].vertex_buffer_index; |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 441 | struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[vbi]; |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 442 | mali_ptr addr = panfrost_vertex_buffer_address(ctx, vbi); |
| 443 | |
| 444 | /* Adjust by the masked off bits of the offset */ |
| 445 | target[i].src_offset += (addr & 63); |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 446 | |
| 447 | /* Also, somewhat obscurely per-instance data needs to be |
| 448 | * offset in response to a delayed start in an indexed draw */ |
| 449 | |
Alyssa Rosenzweig | be691ca | 2019-12-19 14:00:24 -0500 | [diff] [blame] | 450 | if (so->pipe[i].instance_divisor && ctx->instance_count > 1 && start) |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 451 | target[i].src_offset -= buf->stride * start; |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 452 | } |
| 453 | |
Alyssa Rosenzweig | be691ca | 2019-12-19 14:00:24 -0500 | [diff] [blame] | 454 | /* Let's also include vertex builtins */ |
| 455 | |
| 456 | target[PAN_VERTEX_ID].format = MALI_R32UI; |
| 457 | target[PAN_VERTEX_ID].swizzle = panfrost_get_default_swizzle(1); |
| 458 | |
| 459 | target[PAN_INSTANCE_ID].format = MALI_R32UI; |
| 460 | target[PAN_INSTANCE_ID].swizzle = panfrost_get_default_swizzle(1); |
| 461 | |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 462 | ctx->payloads[PIPE_SHADER_VERTEX].postfix.attribute_meta = transfer.gpu; |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 463 | } |
| 464 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 465 | static void |
| 466 | panfrost_upload_sampler_descriptors(struct panfrost_context *ctx) |
| 467 | { |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 468 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 469 | size_t desc_size = sizeof(struct mali_sampler_descriptor); |
| 470 | |
| 471 | for (int t = 0; t <= PIPE_SHADER_FRAGMENT; ++t) { |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 472 | mali_ptr upload = 0; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 473 | |
Alyssa Rosenzweig | 73bd9fe | 2019-12-13 12:41:54 -0500 | [diff] [blame] | 474 | if (ctx->sampler_count[t]) { |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 475 | size_t transfer_size = desc_size * ctx->sampler_count[t]; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 476 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 477 | struct panfrost_transfer transfer = |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 478 | panfrost_allocate_transient(batch, transfer_size); |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 479 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 480 | struct mali_sampler_descriptor *desc = |
| 481 | (struct mali_sampler_descriptor *) transfer.cpu; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 482 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 483 | for (int i = 0; i < ctx->sampler_count[t]; ++i) |
| 484 | desc[i] = ctx->samplers[t][i]->hw; |
| 485 | |
| 486 | upload = transfer.gpu; |
| 487 | } |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 488 | |
Alyssa Rosenzweig | cd1be46 | 2019-07-31 14:08:07 -0700 | [diff] [blame] | 489 | ctx->payloads[t].postfix.sampler_descriptor = upload; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 490 | } |
| 491 | } |
| 492 | |
Alyssa Rosenzweig | 9f15f4d | 2019-08-20 15:36:00 -0700 | [diff] [blame] | 493 | static enum mali_texture_layout |
| 494 | panfrost_layout_for_texture(struct panfrost_resource *rsrc) |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 495 | { |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 496 | switch (rsrc->layout) { |
| 497 | case PAN_AFBC: |
Alyssa Rosenzweig | 9f15f4d | 2019-08-20 15:36:00 -0700 | [diff] [blame] | 498 | return MALI_TEXTURE_AFBC; |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 499 | case PAN_TILED: |
Alyssa Rosenzweig | 9f15f4d | 2019-08-20 15:36:00 -0700 | [diff] [blame] | 500 | return MALI_TEXTURE_TILED; |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 501 | case PAN_LINEAR: |
Alyssa Rosenzweig | 6bd9c4d | 2020-01-10 13:12:35 -0500 | [diff] [blame] | 502 | return MALI_TEXTURE_LINEAR; |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 503 | default: |
Alyssa Rosenzweig | 9f15f4d | 2019-08-20 15:36:00 -0700 | [diff] [blame] | 504 | unreachable("Invalid texture layout"); |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 505 | } |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 506 | } |
| 507 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 508 | static mali_ptr |
| 509 | panfrost_upload_tex( |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 510 | struct panfrost_context *ctx, |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 511 | enum pipe_shader_type st, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 512 | struct panfrost_sampler_view *view) |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 513 | { |
| 514 | if (!view) |
Alyssa Rosenzweig | 6d8490f | 2019-07-11 15:34:56 -0700 | [diff] [blame] | 515 | return (mali_ptr) 0; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 516 | |
Alyssa Rosenzweig | 5317154 | 2019-06-12 15:07:09 -0700 | [diff] [blame] | 517 | struct pipe_sampler_view *pview = &view->base; |
| 518 | struct panfrost_resource *rsrc = pan_resource(pview->texture); |
Tomeu Vizoso | ed3eede | 2020-01-02 11:24:19 +0100 | [diff] [blame] | 519 | mali_ptr descriptor_gpu; |
| 520 | void *descriptor; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 521 | |
| 522 | /* Do we interleave an explicit stride with every element? */ |
| 523 | |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 524 | bool has_manual_stride = view->manual_stride; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 525 | |
Alyssa Rosenzweig | 5317154 | 2019-06-12 15:07:09 -0700 | [diff] [blame] | 526 | /* For easy access */ |
| 527 | |
Alyssa Rosenzweig | 5e268a0 | 2019-08-16 10:25:05 -0700 | [diff] [blame] | 528 | bool is_buffer = pview->target == PIPE_BUFFER; |
| 529 | unsigned first_level = is_buffer ? 0 : pview->u.tex.first_level; |
| 530 | unsigned last_level = is_buffer ? 0 : pview->u.tex.last_level; |
| 531 | unsigned first_layer = is_buffer ? 0 : pview->u.tex.first_layer; |
| 532 | unsigned last_layer = is_buffer ? 0 : pview->u.tex.last_layer; |
Alyssa Rosenzweig | 4152d45 | 2020-01-06 21:22:12 -0500 | [diff] [blame] | 533 | unsigned first_face = 0; |
| 534 | unsigned last_face = 0; |
| 535 | unsigned face_mult = 1; |
| 536 | |
| 537 | /* Cubemaps have 6 faces as layers in between each actual layer. |
| 538 | * There's a bit of an impedence mismatch between Gallium and the |
| 539 | * hardware, let's fixup for it */ |
| 540 | |
| 541 | if (pview->target == PIPE_TEXTURE_CUBE || pview->target == PIPE_TEXTURE_CUBE_ARRAY) { |
| 542 | /* TODO: logic wrong in the asserted out cases ... can they happen? */ |
| 543 | |
| 544 | first_face = first_layer % 6; |
| 545 | last_face = last_layer % 6; |
| 546 | first_layer /= 6; |
| 547 | last_layer /= 6; |
| 548 | |
| 549 | assert((first_layer == last_layer) || (first_face == 0 && last_face == 5)); |
| 550 | face_mult = 6; |
| 551 | } |
Alyssa Rosenzweig | 5317154 | 2019-06-12 15:07:09 -0700 | [diff] [blame] | 552 | |
Tomeu Vizoso | 7c745f6 | 2019-06-28 09:17:55 +0200 | [diff] [blame] | 553 | /* Lower-bit is set when sampling from colour AFBC */ |
Boris Brezillon | aa5bc35 | 2019-07-02 11:37:40 +0200 | [diff] [blame] | 554 | bool is_afbc = rsrc->layout == PAN_AFBC; |
Tomeu Vizoso | 7c745f6 | 2019-06-28 09:17:55 +0200 | [diff] [blame] | 555 | bool is_zs = rsrc->base.bind & PIPE_BIND_DEPTH_STENCIL; |
| 556 | unsigned afbc_bit = (is_afbc && !is_zs) ? 1 : 0; |
| 557 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 558 | /* Add the BO to the job so it's retained until the job is done. */ |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 559 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 560 | panfrost_batch_add_bo(batch, rsrc->bo, |
| 561 | PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ | |
| 562 | panfrost_bo_access_for_stage(st)); |
Boris Brezillon | 873b7b9 | 2019-07-01 17:22:26 +0200 | [diff] [blame] | 563 | |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 564 | /* Add the usage flags in, since they can change across the CSO |
| 565 | * lifetime due to layout switches */ |
| 566 | |
Alyssa Rosenzweig | 9f15f4d | 2019-08-20 15:36:00 -0700 | [diff] [blame] | 567 | view->hw.format.layout = panfrost_layout_for_texture(rsrc); |
| 568 | view->hw.format.manual_stride = has_manual_stride; |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 569 | |
Alyssa Rosenzweig | 4152d45 | 2020-01-06 21:22:12 -0500 | [diff] [blame] | 570 | /* Inject the addresses in, interleaving array indices, mip levels, |
| 571 | * cube faces, and strides in that order */ |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 572 | |
| 573 | unsigned idx = 0; |
Tomeu Vizoso | ed3eede | 2020-01-02 11:24:19 +0100 | [diff] [blame] | 574 | unsigned levels = 1 + last_level - first_level; |
| 575 | unsigned layers = 1 + last_layer - first_layer; |
Alyssa Rosenzweig | 4152d45 | 2020-01-06 21:22:12 -0500 | [diff] [blame] | 576 | unsigned faces = 1 + last_face - first_face; |
| 577 | unsigned num_elements = levels * layers * faces; |
Tomeu Vizoso | ed3eede | 2020-01-02 11:24:19 +0100 | [diff] [blame] | 578 | if (has_manual_stride) |
| 579 | num_elements *= 2; |
| 580 | |
| 581 | descriptor = malloc(sizeof(struct mali_texture_descriptor) + |
| 582 | sizeof(mali_ptr) * num_elements); |
| 583 | memcpy(descriptor, &view->hw, sizeof(struct mali_texture_descriptor)); |
| 584 | |
| 585 | mali_ptr *pointers_and_strides = descriptor + |
| 586 | sizeof(struct mali_texture_descriptor); |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 587 | |
Alyssa Rosenzweig | 4152d45 | 2020-01-06 21:22:12 -0500 | [diff] [blame] | 588 | for (unsigned w = first_layer; w <= last_layer; ++w) { |
| 589 | for (unsigned l = first_level; l <= last_level; ++l) { |
| 590 | for (unsigned f = first_face; f <= last_face; ++f) { |
Tomeu Vizoso | ed3eede | 2020-01-02 11:24:19 +0100 | [diff] [blame] | 591 | pointers_and_strides[idx++] = |
Alyssa Rosenzweig | 4152d45 | 2020-01-06 21:22:12 -0500 | [diff] [blame] | 592 | panfrost_get_texture_address(rsrc, l, w*face_mult + f) |
Icecream95 | 31bd3b5 | 2020-01-11 19:19:45 +1300 | [diff] [blame] | 593 | + afbc_bit + view->astc_stretch; |
Alyssa Rosenzweig | 4152d45 | 2020-01-06 21:22:12 -0500 | [diff] [blame] | 594 | |
| 595 | if (has_manual_stride) { |
| 596 | pointers_and_strides[idx++] = |
| 597 | rsrc->slices[l].stride; |
| 598 | } |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 599 | } |
| 600 | } |
| 601 | } |
| 602 | |
Tomeu Vizoso | ed3eede | 2020-01-02 11:24:19 +0100 | [diff] [blame] | 603 | descriptor_gpu = panfrost_upload_transient(batch, descriptor, |
| 604 | sizeof(struct mali_texture_descriptor) + |
| 605 | num_elements * sizeof(*pointers_and_strides)); |
| 606 | free(descriptor); |
| 607 | |
| 608 | return descriptor_gpu; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 609 | } |
| 610 | |
| 611 | static void |
| 612 | panfrost_upload_texture_descriptors(struct panfrost_context *ctx) |
| 613 | { |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 614 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
| 615 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 616 | for (int t = 0; t <= PIPE_SHADER_FRAGMENT; ++t) { |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 617 | mali_ptr trampoline = 0; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 618 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 619 | if (ctx->sampler_view_count[t]) { |
| 620 | uint64_t trampolines[PIPE_MAX_SHADER_SAMPLER_VIEWS]; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 621 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 622 | for (int i = 0; i < ctx->sampler_view_count[t]; ++i) |
| 623 | trampolines[i] = |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 624 | panfrost_upload_tex(ctx, t, ctx->sampler_views[t][i]); |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 625 | |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 626 | trampoline = panfrost_upload_transient(batch, trampolines, sizeof(uint64_t) * ctx->sampler_view_count[t]); |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 627 | } |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 628 | |
Alyssa Rosenzweig | cd1be46 | 2019-07-31 14:08:07 -0700 | [diff] [blame] | 629 | ctx->payloads[t].postfix.texture_trampoline = trampoline; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 630 | } |
| 631 | } |
| 632 | |
Boris Brezillon | c57f7d0 | 2019-06-14 10:41:17 +0200 | [diff] [blame] | 633 | struct sysval_uniform { |
| 634 | union { |
| 635 | float f[4]; |
| 636 | int32_t i[4]; |
| 637 | uint32_t u[4]; |
Alyssa Rosenzweig | 2efa025 | 2019-08-01 11:03:15 -0700 | [diff] [blame] | 638 | uint64_t du[2]; |
Boris Brezillon | c57f7d0 | 2019-06-14 10:41:17 +0200 | [diff] [blame] | 639 | }; |
| 640 | }; |
| 641 | |
| 642 | static void panfrost_upload_viewport_scale_sysval(struct panfrost_context *ctx, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 643 | struct sysval_uniform *uniform) |
Boris Brezillon | c57f7d0 | 2019-06-14 10:41:17 +0200 | [diff] [blame] | 644 | { |
| 645 | const struct pipe_viewport_state *vp = &ctx->pipe_viewport; |
| 646 | |
| 647 | uniform->f[0] = vp->scale[0]; |
| 648 | uniform->f[1] = vp->scale[1]; |
| 649 | uniform->f[2] = vp->scale[2]; |
| 650 | } |
| 651 | |
| 652 | static void panfrost_upload_viewport_offset_sysval(struct panfrost_context *ctx, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 653 | struct sysval_uniform *uniform) |
Boris Brezillon | c57f7d0 | 2019-06-14 10:41:17 +0200 | [diff] [blame] | 654 | { |
| 655 | const struct pipe_viewport_state *vp = &ctx->pipe_viewport; |
| 656 | |
| 657 | uniform->f[0] = vp->translate[0]; |
| 658 | uniform->f[1] = vp->translate[1]; |
| 659 | uniform->f[2] = vp->translate[2]; |
| 660 | } |
| 661 | |
Boris Brezillon | c355886 | 2019-06-17 22:13:04 +0200 | [diff] [blame] | 662 | static void panfrost_upload_txs_sysval(struct panfrost_context *ctx, |
| 663 | enum pipe_shader_type st, |
| 664 | unsigned int sysvalid, |
| 665 | struct sysval_uniform *uniform) |
| 666 | { |
| 667 | unsigned texidx = PAN_SYSVAL_ID_TO_TXS_TEX_IDX(sysvalid); |
| 668 | unsigned dim = PAN_SYSVAL_ID_TO_TXS_DIM(sysvalid); |
| 669 | bool is_array = PAN_SYSVAL_ID_TO_TXS_IS_ARRAY(sysvalid); |
| 670 | struct pipe_sampler_view *tex = &ctx->sampler_views[st][texidx]->base; |
| 671 | |
| 672 | assert(dim); |
| 673 | uniform->i[0] = u_minify(tex->texture->width0, tex->u.tex.first_level); |
| 674 | |
| 675 | if (dim > 1) |
| 676 | uniform->i[1] = u_minify(tex->texture->height0, |
| 677 | tex->u.tex.first_level); |
| 678 | |
| 679 | if (dim > 2) |
| 680 | uniform->i[2] = u_minify(tex->texture->depth0, |
| 681 | tex->u.tex.first_level); |
| 682 | |
| 683 | if (is_array) |
| 684 | uniform->i[dim] = tex->texture->array_size; |
| 685 | } |
| 686 | |
Alyssa Rosenzweig | 2efa025 | 2019-08-01 11:03:15 -0700 | [diff] [blame] | 687 | static void panfrost_upload_ssbo_sysval( |
| 688 | struct panfrost_context *ctx, |
| 689 | enum pipe_shader_type st, |
| 690 | unsigned ssbo_id, |
| 691 | struct sysval_uniform *uniform) |
| 692 | { |
| 693 | assert(ctx->ssbo_mask[st] & (1 << ssbo_id)); |
| 694 | struct pipe_shader_buffer sb = ctx->ssbo[st][ssbo_id]; |
| 695 | |
| 696 | /* Compute address */ |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 697 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 2efa025 | 2019-08-01 11:03:15 -0700 | [diff] [blame] | 698 | struct panfrost_bo *bo = pan_resource(sb.buffer)->bo; |
| 699 | |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 700 | panfrost_batch_add_bo(batch, bo, |
| 701 | PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_RW | |
| 702 | panfrost_bo_access_for_stage(st)); |
Alyssa Rosenzweig | 2efa025 | 2019-08-01 11:03:15 -0700 | [diff] [blame] | 703 | |
| 704 | /* Upload address and size as sysval */ |
| 705 | uniform->du[0] = bo->gpu + sb.buffer_offset; |
| 706 | uniform->u[2] = sb.buffer_size; |
| 707 | } |
| 708 | |
Alyssa Rosenzweig | 4e07e7b | 2019-11-21 08:42:28 -0500 | [diff] [blame] | 709 | static void |
| 710 | panfrost_upload_sampler_sysval( |
| 711 | struct panfrost_context *ctx, |
| 712 | enum pipe_shader_type st, |
| 713 | unsigned sampler_index, |
| 714 | struct sysval_uniform *uniform) |
| 715 | { |
| 716 | struct pipe_sampler_state *sampl = |
| 717 | &ctx->samplers[st][sampler_index]->base; |
| 718 | |
| 719 | uniform->f[0] = sampl->min_lod; |
| 720 | uniform->f[1] = sampl->max_lod; |
| 721 | uniform->f[2] = sampl->lod_bias; |
| 722 | |
| 723 | /* Even without any errata, Midgard represents "no mipmapping" as |
| 724 | * fixing the LOD with the clamps; keep behaviour consistent. c.f. |
| 725 | * panfrost_create_sampler_state which also explains our choice of |
| 726 | * epsilon value (again to keep behaviour consistent) */ |
| 727 | |
| 728 | if (sampl->min_mip_filter == PIPE_TEX_MIPFILTER_NONE) |
| 729 | uniform->f[1] = uniform->f[0] + (1.0/256.0); |
| 730 | } |
| 731 | |
Alyssa Rosenzweig | 15954ab | 2019-08-06 14:07:10 -0700 | [diff] [blame] | 732 | static void panfrost_upload_num_work_groups_sysval(struct panfrost_context *ctx, |
| 733 | struct sysval_uniform *uniform) |
| 734 | { |
| 735 | uniform->u[0] = ctx->compute_grid->grid[0]; |
| 736 | uniform->u[1] = ctx->compute_grid->grid[1]; |
| 737 | uniform->u[2] = ctx->compute_grid->grid[2]; |
| 738 | } |
| 739 | |
Boris Brezillon | c57f7d0 | 2019-06-14 10:41:17 +0200 | [diff] [blame] | 740 | static void panfrost_upload_sysvals(struct panfrost_context *ctx, void *buf, |
| 741 | struct panfrost_shader_state *ss, |
| 742 | enum pipe_shader_type st) |
| 743 | { |
| 744 | struct sysval_uniform *uniforms = (void *)buf; |
| 745 | |
| 746 | for (unsigned i = 0; i < ss->sysval_count; ++i) { |
| 747 | int sysval = ss->sysval[i]; |
| 748 | |
| 749 | switch (PAN_SYSVAL_TYPE(sysval)) { |
| 750 | case PAN_SYSVAL_VIEWPORT_SCALE: |
| 751 | panfrost_upload_viewport_scale_sysval(ctx, &uniforms[i]); |
| 752 | break; |
| 753 | case PAN_SYSVAL_VIEWPORT_OFFSET: |
| 754 | panfrost_upload_viewport_offset_sysval(ctx, &uniforms[i]); |
| 755 | break; |
Boris Brezillon | c355886 | 2019-06-17 22:13:04 +0200 | [diff] [blame] | 756 | case PAN_SYSVAL_TEXTURE_SIZE: |
| 757 | panfrost_upload_txs_sysval(ctx, st, PAN_SYSVAL_ID(sysval), |
| 758 | &uniforms[i]); |
| 759 | break; |
Alyssa Rosenzweig | 2efa025 | 2019-08-01 11:03:15 -0700 | [diff] [blame] | 760 | case PAN_SYSVAL_SSBO: |
| 761 | panfrost_upload_ssbo_sysval(ctx, st, PAN_SYSVAL_ID(sysval), |
| 762 | &uniforms[i]); |
| 763 | break; |
Alyssa Rosenzweig | 15954ab | 2019-08-06 14:07:10 -0700 | [diff] [blame] | 764 | case PAN_SYSVAL_NUM_WORK_GROUPS: |
| 765 | panfrost_upload_num_work_groups_sysval(ctx, &uniforms[i]); |
| 766 | break; |
Alyssa Rosenzweig | 4e07e7b | 2019-11-21 08:42:28 -0500 | [diff] [blame] | 767 | case PAN_SYSVAL_SAMPLER: |
| 768 | panfrost_upload_sampler_sysval(ctx, st, PAN_SYSVAL_ID(sysval), |
| 769 | &uniforms[i]); |
| 770 | break; |
Boris Brezillon | c57f7d0 | 2019-06-14 10:41:17 +0200 | [diff] [blame] | 771 | default: |
| 772 | assert(0); |
| 773 | } |
| 774 | } |
| 775 | } |
| 776 | |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 777 | static const void * |
| 778 | panfrost_map_constant_buffer_cpu(struct panfrost_constant_buffer *buf, unsigned index) |
| 779 | { |
| 780 | struct pipe_constant_buffer *cb = &buf->cb[index]; |
| 781 | struct panfrost_resource *rsrc = pan_resource(cb->buffer); |
| 782 | |
| 783 | if (rsrc) |
| 784 | return rsrc->bo->cpu; |
| 785 | else if (cb->user_buffer) |
| 786 | return cb->user_buffer; |
| 787 | else |
| 788 | unreachable("No constant buffer"); |
| 789 | } |
| 790 | |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 791 | static mali_ptr |
| 792 | panfrost_map_constant_buffer_gpu( |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 793 | struct panfrost_context *ctx, |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 794 | enum pipe_shader_type st, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 795 | struct panfrost_constant_buffer *buf, |
| 796 | unsigned index) |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 797 | { |
| 798 | struct pipe_constant_buffer *cb = &buf->cb[index]; |
| 799 | struct panfrost_resource *rsrc = pan_resource(cb->buffer); |
Boris Brezillon | c16fb1f | 2019-09-14 17:32:02 +0200 | [diff] [blame] | 800 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 801 | |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 802 | if (rsrc) { |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 803 | panfrost_batch_add_bo(batch, rsrc->bo, |
| 804 | PAN_BO_ACCESS_SHARED | |
| 805 | PAN_BO_ACCESS_READ | |
| 806 | panfrost_bo_access_for_stage(st)); |
Alyssa Rosenzweig | 0b714f3 | 2020-01-06 20:39:58 -0500 | [diff] [blame] | 807 | |
| 808 | /* Alignment gauranteed by PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT */ |
| 809 | return rsrc->bo->gpu + cb->buffer_offset; |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 810 | } else if (cb->user_buffer) { |
Alyssa Rosenzweig | 0b714f3 | 2020-01-06 20:39:58 -0500 | [diff] [blame] | 811 | return panfrost_upload_transient(batch, cb->user_buffer + cb->buffer_offset, cb->buffer_size); |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 812 | } else { |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 813 | unreachable("No constant buffer"); |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 814 | } |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 815 | } |
| 816 | |
Alyssa Rosenzweig | 5d60be4 | 2019-06-20 16:16:07 -0700 | [diff] [blame] | 817 | /* Compute number of UBOs active (more specifically, compute the highest UBO |
Alyssa Rosenzweig | 4c6d751 | 2019-06-20 16:21:48 -0700 | [diff] [blame] | 818 | * number addressable -- if there are gaps, include them in the count anyway). |
| 819 | * We always include UBO #0 in the count, since we *need* uniforms enabled for |
| 820 | * sysvals. */ |
Alyssa Rosenzweig | 5d60be4 | 2019-06-20 16:16:07 -0700 | [diff] [blame] | 821 | |
| 822 | static unsigned |
| 823 | panfrost_ubo_count(struct panfrost_context *ctx, enum pipe_shader_type stage) |
| 824 | { |
Alyssa Rosenzweig | 4c6d751 | 2019-06-20 16:21:48 -0700 | [diff] [blame] | 825 | unsigned mask = ctx->constant_buffer[stage].enabled_mask | 1; |
Alyssa Rosenzweig | 5d60be4 | 2019-06-20 16:16:07 -0700 | [diff] [blame] | 826 | return 32 - __builtin_clz(mask); |
| 827 | } |
| 828 | |
Tomeu Vizoso | ab81a23 | 2019-11-20 16:00:23 +0100 | [diff] [blame] | 829 | /* Fixes up a shader state with current state */ |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 830 | |
Tomeu Vizoso | ab81a23 | 2019-11-20 16:00:23 +0100 | [diff] [blame] | 831 | static void |
| 832 | panfrost_patch_shader_state(struct panfrost_context *ctx, |
| 833 | enum pipe_shader_type stage) |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 834 | { |
Tomeu Vizoso | ab81a23 | 2019-11-20 16:00:23 +0100 | [diff] [blame] | 835 | struct panfrost_shader_variants *all = ctx->shader[stage]; |
| 836 | |
| 837 | if (!all) { |
| 838 | ctx->payloads[stage].postfix.shader = 0; |
| 839 | return; |
| 840 | } |
| 841 | |
| 842 | struct panfrost_shader_state *ss = &all->variants[all->active_variant]; |
| 843 | |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 844 | ss->tripipe->texture_count = ctx->sampler_view_count[stage]; |
| 845 | ss->tripipe->sampler_count = ctx->sampler_count[stage]; |
| 846 | |
| 847 | ss->tripipe->midgard1.flags = 0x220; |
| 848 | |
| 849 | unsigned ubo_count = panfrost_ubo_count(ctx, stage); |
| 850 | ss->tripipe->midgard1.uniform_buffer_count = ubo_count; |
| 851 | |
Boris Brezillon | 12f790f | 2019-10-01 20:12:12 +0200 | [diff] [blame] | 852 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
| 853 | |
| 854 | /* Add the shader BO to the batch. */ |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 855 | panfrost_batch_add_bo(batch, ss->bo, |
| 856 | PAN_BO_ACCESS_PRIVATE | |
| 857 | PAN_BO_ACCESS_READ | |
| 858 | panfrost_bo_access_for_stage(stage)); |
Boris Brezillon | 12f790f | 2019-10-01 20:12:12 +0200 | [diff] [blame] | 859 | |
Tomeu Vizoso | ab81a23 | 2019-11-20 16:00:23 +0100 | [diff] [blame] | 860 | ctx->payloads[stage].postfix.shader = panfrost_upload_transient(batch, |
| 861 | ss->tripipe, |
| 862 | sizeof(struct mali_shader_meta)); |
Alyssa Rosenzweig | 3bfdb87 | 2019-07-31 15:05:57 -0700 | [diff] [blame] | 863 | } |
| 864 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 865 | /* Go through dirty flags and actualise them in the cmdstream. */ |
| 866 | |
| 867 | void |
| 868 | panfrost_emit_for_draw(struct panfrost_context *ctx, bool with_vertex_data) |
| 869 | { |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 870 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 990e244 | 2019-07-24 08:46:15 -0700 | [diff] [blame] | 871 | struct panfrost_screen *screen = pan_screen(ctx->base.screen); |
Alyssa Rosenzweig | 8c26890 | 2019-03-12 23:16:37 +0000 | [diff] [blame] | 872 | |
Boris Brezillon | 0eec73a | 2019-09-14 18:40:23 +0200 | [diff] [blame] | 873 | panfrost_batch_add_fbo_bos(batch); |
Boris Brezillon | 12f7217 | 2019-08-02 19:18:46 +0200 | [diff] [blame] | 874 | panfrost_attach_vt_framebuffer(ctx); |
Alyssa Rosenzweig | 718ebfa | 2019-07-11 11:39:33 -0700 | [diff] [blame] | 875 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 876 | if (with_vertex_data) { |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 877 | panfrost_emit_vertex_data(batch); |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 878 | |
| 879 | /* Varyings emitted for -all- geometry */ |
| 880 | unsigned total_count = ctx->padded_count * ctx->instance_count; |
| 881 | panfrost_emit_varying_descriptor(ctx, total_count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 882 | } |
| 883 | |
Alyssa Rosenzweig | 8c26890 | 2019-03-12 23:16:37 +0000 | [diff] [blame] | 884 | bool msaa = ctx->rasterizer->base.multisample; |
| 885 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 886 | if (ctx->dirty & PAN_DIRTY_RASTERIZER) { |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 887 | ctx->payloads[PIPE_SHADER_FRAGMENT].gl_enables = ctx->rasterizer->tiler_gl_enables; |
Alyssa Rosenzweig | 8c26890 | 2019-03-12 23:16:37 +0000 | [diff] [blame] | 888 | |
| 889 | /* TODO: Sample size */ |
| 890 | SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_HAS_MSAA, msaa); |
| 891 | SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_NO_MSAA, !msaa); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 892 | } |
| 893 | |
Boris Brezillon | 12d8a17 | 2019-09-05 21:41:28 +0200 | [diff] [blame] | 894 | panfrost_batch_set_requirements(batch); |
Tomeu Vizoso | babc3ad | 2019-06-20 15:37:10 +0200 | [diff] [blame] | 895 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 896 | if (ctx->occlusion_query) { |
Alyssa Rosenzweig | a0c0030 | 2019-10-26 09:02:34 -0400 | [diff] [blame] | 897 | ctx->payloads[PIPE_SHADER_FRAGMENT].gl_enables |= MALI_OCCLUSION_QUERY; |
Urja Rannikko | dff99ce | 2019-10-22 12:05:07 +0000 | [diff] [blame] | 898 | ctx->payloads[PIPE_SHADER_FRAGMENT].postfix.occlusion_counter = ctx->occlusion_query->bo->gpu; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 899 | } |
| 900 | |
Tomeu Vizoso | ab81a23 | 2019-11-20 16:00:23 +0100 | [diff] [blame] | 901 | panfrost_patch_shader_state(ctx, PIPE_SHADER_VERTEX); |
| 902 | panfrost_patch_shader_state(ctx, PIPE_SHADER_COMPUTE); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 903 | |
| 904 | if (ctx->dirty & (PAN_DIRTY_RASTERIZER | PAN_DIRTY_VS)) { |
| 905 | /* Check if we need to link the gl_PointSize varying */ |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 906 | if (!panfrost_writes_point_size(ctx)) { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 907 | /* If the size is constant, write it out. Otherwise, |
| 908 | * don't touch primitive_size (since we would clobber |
| 909 | * the pointer there) */ |
| 910 | |
Alyssa Rosenzweig | 3909b16 | 2019-12-30 12:55:50 -0500 | [diff] [blame] | 911 | bool points = ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.draw_mode == MALI_POINTS; |
| 912 | |
| 913 | ctx->payloads[PIPE_SHADER_FRAGMENT].primitive_size.constant = points ? |
| 914 | ctx->rasterizer->base.point_size : |
| 915 | ctx->rasterizer->base.line_width; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 916 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 917 | } |
| 918 | |
| 919 | /* TODO: Maybe dirty track FS, maybe not. For now, it's transient. */ |
Alyssa Rosenzweig | ac6aa93 | 2019-07-31 14:13:30 -0700 | [diff] [blame] | 920 | if (ctx->shader[PIPE_SHADER_FRAGMENT]) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 921 | ctx->dirty |= PAN_DIRTY_FS; |
| 922 | |
| 923 | if (ctx->dirty & PAN_DIRTY_FS) { |
Alyssa Rosenzweig | ac6aa93 | 2019-07-31 14:13:30 -0700 | [diff] [blame] | 924 | assert(ctx->shader[PIPE_SHADER_FRAGMENT]); |
| 925 | struct panfrost_shader_state *variant = &ctx->shader[PIPE_SHADER_FRAGMENT]->variants[ctx->shader[PIPE_SHADER_FRAGMENT]->active_variant]; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 926 | |
Tomeu Vizoso | ab81a23 | 2019-11-20 16:00:23 +0100 | [diff] [blame] | 927 | panfrost_patch_shader_state(ctx, PIPE_SHADER_FRAGMENT); |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 928 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 929 | #define COPY(name) ctx->fragment_shader_core.name = variant->tripipe->name |
| 930 | |
| 931 | COPY(shader); |
| 932 | COPY(attribute_count); |
| 933 | COPY(varying_count); |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 934 | COPY(texture_count); |
| 935 | COPY(sampler_count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 936 | COPY(midgard1.uniform_count); |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 937 | COPY(midgard1.uniform_buffer_count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 938 | COPY(midgard1.work_count); |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 939 | COPY(midgard1.flags); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 940 | COPY(midgard1.unknown2); |
| 941 | |
| 942 | #undef COPY |
Alyssa Rosenzweig | 46396af | 2019-07-05 15:40:08 -0700 | [diff] [blame] | 943 | |
| 944 | /* Get blending setup */ |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 945 | unsigned rt_count = MAX2(ctx->pipe_framebuffer.nr_cbufs, 1); |
Alyssa Rosenzweig | 46396af | 2019-07-05 15:40:08 -0700 | [diff] [blame] | 946 | |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 947 | struct panfrost_blend_final blend[PIPE_MAX_COLOR_BUFS]; |
Alyssa Rosenzweig | d58600c | 2019-12-31 21:37:30 -0500 | [diff] [blame] | 948 | unsigned shader_offset = 0; |
| 949 | struct panfrost_bo *shader_bo = NULL; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 950 | |
Alyssa Rosenzweig | d58600c | 2019-12-31 21:37:30 -0500 | [diff] [blame] | 951 | for (unsigned c = 0; c < rt_count; ++c) { |
| 952 | blend[c] = panfrost_get_blend_for_context(ctx, c, &shader_bo, &shader_offset); |
| 953 | } |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 954 | |
| 955 | /* If there is a blend shader, work registers are shared. XXX: opt */ |
| 956 | |
| 957 | for (unsigned c = 0; c < rt_count; ++c) { |
| 958 | if (blend[c].is_shader) |
| 959 | ctx->fragment_shader_core.midgard1.work_count = 16; |
| 960 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 961 | |
Alyssa Rosenzweig | b670bec | 2019-06-21 11:56:28 -0700 | [diff] [blame] | 962 | /* Depending on whether it's legal to in the given shader, we |
| 963 | * try to enable early-z testing (or forward-pixel kill?) */ |
| 964 | |
Tomeu Vizoso | 27801b9 | 2019-11-12 13:48:54 +0100 | [diff] [blame] | 965 | SET_BIT(ctx->fragment_shader_core.midgard1.flags, MALI_EARLY_Z, !variant->can_discard); |
Alyssa Rosenzweig | 8d1adc0 | 2019-06-07 16:00:49 -0700 | [diff] [blame] | 966 | |
| 967 | /* Any time texturing is used, derivatives are implicitly |
| 968 | * calculated, so we need to enable helper invocations */ |
| 969 | |
Tomeu Vizoso | 27801b9 | 2019-11-12 13:48:54 +0100 | [diff] [blame] | 970 | SET_BIT(ctx->fragment_shader_core.midgard1.flags, MALI_HELPER_INVOCATIONS, variant->helper_invocations); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 971 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 972 | /* Assign the stencil refs late */ |
Alyssa Rosenzweig | 65d8909 | 2019-07-17 15:42:48 -0700 | [diff] [blame] | 973 | |
| 974 | unsigned front_ref = ctx->stencil_ref.ref_value[0]; |
| 975 | unsigned back_ref = ctx->stencil_ref.ref_value[1]; |
| 976 | bool back_enab = ctx->depth_stencil->stencil[1].enabled; |
| 977 | |
| 978 | ctx->fragment_shader_core.stencil_front.ref = front_ref; |
| 979 | ctx->fragment_shader_core.stencil_back.ref = back_enab ? back_ref : front_ref; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 980 | |
| 981 | /* CAN_DISCARD should be set if the fragment shader possibly |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 982 | * contains a 'discard' instruction. It is likely this is |
| 983 | * related to optimizations related to forward-pixel kill, as |
| 984 | * per "Mali Performance 3: Is EGL_BUFFER_PRESERVED a good |
| 985 | * thing?" by Peter Harris |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 986 | */ |
| 987 | |
Tomeu Vizoso | 27801b9 | 2019-11-12 13:48:54 +0100 | [diff] [blame] | 988 | SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_CAN_DISCARD, variant->can_discard); |
| 989 | SET_BIT(ctx->fragment_shader_core.midgard1.flags, 0x400, variant->can_discard); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 990 | |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 991 | /* Even on MFBD, the shader descriptor gets blend shaders. It's |
| 992 | * *also* copied to the blend_meta appended (by convention), |
| 993 | * but this is the field actually read by the hardware. (Or |
Alyssa Rosenzweig | d58600c | 2019-12-31 21:37:30 -0500 | [diff] [blame] | 994 | * maybe both are read...?). Specify the last RTi with a blend |
| 995 | * shader. */ |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 996 | |
Alyssa Rosenzweig | d58600c | 2019-12-31 21:37:30 -0500 | [diff] [blame] | 997 | ctx->fragment_shader_core.blend.shader = 0; |
| 998 | |
| 999 | for (signed rt = (rt_count - 1); rt >= 0; --rt) { |
| 1000 | if (blend[rt].is_shader) { |
| 1001 | ctx->fragment_shader_core.blend.shader = |
| 1002 | blend[rt].shader.gpu | blend[rt].shader.first_tag; |
| 1003 | break; |
| 1004 | } |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 1005 | } |
| 1006 | |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 1007 | if (screen->quirks & MIDGARD_SFBD) { |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1008 | /* When only a single render target platform is used, the blend |
| 1009 | * information is inside the shader meta itself. We |
| 1010 | * additionally need to signal CAN_DISCARD for nontrivial blend |
| 1011 | * modes (so we're able to read back the destination buffer) */ |
| 1012 | |
Tomeu Vizoso | 27801b9 | 2019-11-12 13:48:54 +0100 | [diff] [blame] | 1013 | SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_HAS_BLEND_SHADER, blend[0].is_shader); |
| 1014 | |
| 1015 | if (!blend[0].is_shader) { |
Alyssa Rosenzweig | 46396af | 2019-07-05 15:40:08 -0700 | [diff] [blame] | 1016 | ctx->fragment_shader_core.blend.equation = |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1017 | *blend[0].equation.equation; |
Alyssa Rosenzweig | 46396af | 2019-07-05 15:40:08 -0700 | [diff] [blame] | 1018 | ctx->fragment_shader_core.blend.constant = |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1019 | blend[0].equation.constant; |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1020 | } |
| 1021 | |
Tomeu Vizoso | 27801b9 | 2019-11-12 13:48:54 +0100 | [diff] [blame] | 1022 | SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_CAN_DISCARD, !blend[0].no_blending); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1023 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1024 | |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1025 | size_t size = sizeof(struct mali_shader_meta) + (sizeof(struct midgard_blend_rt) * rt_count); |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 1026 | struct panfrost_transfer transfer = panfrost_allocate_transient(batch, size); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1027 | memcpy(transfer.cpu, &ctx->fragment_shader_core, sizeof(struct mali_shader_meta)); |
| 1028 | |
Alyssa Rosenzweig | fa14cdf | 2019-10-27 19:46:21 -0400 | [diff] [blame] | 1029 | ctx->payloads[PIPE_SHADER_FRAGMENT].postfix.shader = transfer.gpu; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1030 | |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 1031 | if (!(screen->quirks & MIDGARD_SFBD)) { |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1032 | /* Additional blend descriptor tacked on for jobs using MFBD */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1033 | |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1034 | struct midgard_blend_rt rts[4]; |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1035 | |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1036 | for (unsigned i = 0; i < rt_count; ++i) { |
Alyssa Rosenzweig | fd81916 | 2019-11-12 14:19:52 -0500 | [diff] [blame] | 1037 | rts[i].flags = 0x200; |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1038 | |
Alyssa Rosenzweig | 6585bb9 | 2019-06-17 16:23:23 -0700 | [diff] [blame] | 1039 | bool is_srgb = |
Alyssa Rosenzweig | f085474 | 2019-06-19 11:27:59 -0700 | [diff] [blame] | 1040 | (ctx->pipe_framebuffer.nr_cbufs > i) && |
Alyssa Rosenzweig | 227c395 | 2019-07-18 10:59:59 -0700 | [diff] [blame] | 1041 | (ctx->pipe_framebuffer.cbufs[i]) && |
Alyssa Rosenzweig | 6585bb9 | 2019-06-17 16:23:23 -0700 | [diff] [blame] | 1042 | util_format_is_srgb(ctx->pipe_framebuffer.cbufs[i]->format); |
| 1043 | |
Alyssa Rosenzweig | fd81916 | 2019-11-12 14:19:52 -0500 | [diff] [blame] | 1044 | SET_BIT(rts[i].flags, MALI_BLEND_MRT_SHADER, blend[i].is_shader); |
| 1045 | SET_BIT(rts[i].flags, MALI_BLEND_LOAD_TIB, !blend[i].no_blending); |
| 1046 | SET_BIT(rts[i].flags, MALI_BLEND_SRGB, is_srgb); |
| 1047 | SET_BIT(rts[i].flags, MALI_BLEND_NO_DITHER, !ctx->blend->base.dither); |
Alyssa Rosenzweig | 5c554e2 | 2019-07-17 16:19:45 -0700 | [diff] [blame] | 1048 | |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1049 | if (blend[i].is_shader) { |
Alyssa Rosenzweig | d58600c | 2019-12-31 21:37:30 -0500 | [diff] [blame] | 1050 | rts[i].blend.shader = blend[i].shader.gpu | blend[i].shader.first_tag; |
Alyssa Rosenzweig | 3645c78 | 2019-05-18 20:36:00 +0000 | [diff] [blame] | 1051 | } else { |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1052 | rts[i].blend.equation = *blend[i].equation.equation; |
| 1053 | rts[i].blend.constant = blend[i].equation.constant; |
Alyssa Rosenzweig | 3645c78 | 2019-05-18 20:36:00 +0000 | [diff] [blame] | 1054 | } |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 1055 | } |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1056 | |
Alyssa Rosenzweig | 375d4c2 | 2019-08-12 16:14:03 -0700 | [diff] [blame] | 1057 | memcpy(transfer.cpu + sizeof(struct mali_shader_meta), rts, sizeof(rts[0]) * rt_count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1058 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1059 | } |
| 1060 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 1061 | /* We stage to transient, so always dirty.. */ |
Alyssa Rosenzweig | a34370e | 2019-07-31 15:06:14 -0700 | [diff] [blame] | 1062 | if (ctx->vertex) |
| 1063 | panfrost_stage_attributes(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1064 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 1065 | if (ctx->dirty & PAN_DIRTY_SAMPLERS) |
| 1066 | panfrost_upload_sampler_descriptors(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1067 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 1068 | if (ctx->dirty & PAN_DIRTY_TEXTURES) |
| 1069 | panfrost_upload_texture_descriptors(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1070 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1071 | const struct pipe_viewport_state *vp = &ctx->pipe_viewport; |
| 1072 | |
Alyssa Rosenzweig | 428bed3 | 2019-07-31 15:06:38 -0700 | [diff] [blame] | 1073 | for (int i = 0; i < PIPE_SHADER_TYPES; ++i) { |
| 1074 | struct panfrost_shader_variants *all = ctx->shader[i]; |
| 1075 | |
| 1076 | if (!all) |
| 1077 | continue; |
| 1078 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1079 | struct panfrost_constant_buffer *buf = &ctx->constant_buffer[i]; |
| 1080 | |
Alyssa Rosenzweig | 428bed3 | 2019-07-31 15:06:38 -0700 | [diff] [blame] | 1081 | struct panfrost_shader_state *ss = &all->variants[all->active_variant]; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1082 | |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 1083 | /* Uniforms are implicitly UBO #0 */ |
| 1084 | bool has_uniforms = buf->enabled_mask & (1 << 0); |
| 1085 | |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1086 | /* Allocate room for the sysval and the uniforms */ |
| 1087 | size_t sys_size = sizeof(float) * 4 * ss->sysval_count; |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 1088 | size_t uniform_size = has_uniforms ? (buf->cb[0].buffer_size) : 0; |
| 1089 | size_t size = sys_size + uniform_size; |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 1090 | struct panfrost_transfer transfer = panfrost_allocate_transient(batch, size); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1091 | |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1092 | /* Upload sysvals requested by the shader */ |
Boris Brezillon | c57f7d0 | 2019-06-14 10:41:17 +0200 | [diff] [blame] | 1093 | panfrost_upload_sysvals(ctx, transfer.cpu, ss, i); |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1094 | |
| 1095 | /* Upload uniforms */ |
Icecream95 | 8004874 | 2020-01-24 19:45:17 +1300 | [diff] [blame^] | 1096 | if (has_uniforms && uniform_size) { |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 1097 | const void *cpu = panfrost_map_constant_buffer_cpu(buf, 0); |
| 1098 | memcpy(transfer.cpu + sys_size, cpu, uniform_size); |
| 1099 | } |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1100 | |
Alyssa Rosenzweig | 3113be3 | 2019-07-31 14:15:19 -0700 | [diff] [blame] | 1101 | int uniform_count = |
| 1102 | ctx->shader[i]->variants[ctx->shader[i]->active_variant].uniform_count; |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1103 | |
Alyssa Rosenzweig | cd1be46 | 2019-07-31 14:08:07 -0700 | [diff] [blame] | 1104 | struct mali_vertex_tiler_postfix *postfix = |
| 1105 | &ctx->payloads[i].postfix; |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1106 | |
Alyssa Rosenzweig | 4c6d751 | 2019-06-20 16:21:48 -0700 | [diff] [blame] | 1107 | /* Next up, attach UBOs. UBO #0 is the uniforms we just |
| 1108 | * uploaded */ |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1109 | |
Alyssa Rosenzweig | 4c6d751 | 2019-06-20 16:21:48 -0700 | [diff] [blame] | 1110 | unsigned ubo_count = panfrost_ubo_count(ctx, i); |
| 1111 | assert(ubo_count >= 1); |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1112 | |
Alyssa Rosenzweig | 4c6d751 | 2019-06-20 16:21:48 -0700 | [diff] [blame] | 1113 | size_t sz = sizeof(struct mali_uniform_buffer_meta) * ubo_count; |
Alyssa Rosenzweig | fae790e | 2019-07-15 11:30:35 -0700 | [diff] [blame] | 1114 | struct mali_uniform_buffer_meta ubos[PAN_MAX_CONST_BUFFERS]; |
Alyssa Rosenzweig | 4c6d751 | 2019-06-20 16:21:48 -0700 | [diff] [blame] | 1115 | |
| 1116 | /* Upload uniforms as a UBO */ |
| 1117 | ubos[0].size = MALI_POSITIVE((2 + uniform_count)); |
| 1118 | ubos[0].ptr = transfer.gpu >> 2; |
| 1119 | |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 1120 | /* The rest are honest-to-goodness UBOs */ |
| 1121 | |
| 1122 | for (unsigned ubo = 1; ubo < ubo_count; ++ubo) { |
Alyssa Rosenzweig | 42f0aae | 2019-08-30 17:37:22 -0700 | [diff] [blame] | 1123 | size_t usz = buf->cb[ubo].buffer_size; |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 1124 | |
Alyssa Rosenzweig | f28e9e8 | 2019-06-20 16:51:08 -0700 | [diff] [blame] | 1125 | bool enabled = buf->enabled_mask & (1 << ubo); |
Alyssa Rosenzweig | 42f0aae | 2019-08-30 17:37:22 -0700 | [diff] [blame] | 1126 | bool empty = usz == 0; |
Alyssa Rosenzweig | f28e9e8 | 2019-06-20 16:51:08 -0700 | [diff] [blame] | 1127 | |
| 1128 | if (!enabled || empty) { |
| 1129 | /* Stub out disabled UBOs to catch accesses */ |
| 1130 | |
| 1131 | ubos[ubo].size = 0; |
| 1132 | ubos[ubo].ptr = 0xDEAD0000; |
| 1133 | continue; |
| 1134 | } |
| 1135 | |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 1136 | mali_ptr gpu = panfrost_map_constant_buffer_gpu(ctx, i, buf, ubo); |
Alyssa Rosenzweig | f28e9e8 | 2019-06-20 16:51:08 -0700 | [diff] [blame] | 1137 | |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 1138 | unsigned bytes_per_field = 16; |
Alyssa Rosenzweig | 42f0aae | 2019-08-30 17:37:22 -0700 | [diff] [blame] | 1139 | unsigned aligned = ALIGN_POT(usz, bytes_per_field); |
Alyssa Rosenzweig | 856e039 | 2019-06-20 16:32:06 -0700 | [diff] [blame] | 1140 | unsigned fields = aligned / bytes_per_field; |
| 1141 | |
| 1142 | ubos[ubo].size = MALI_POSITIVE(fields); |
| 1143 | ubos[ubo].ptr = gpu >> 2; |
| 1144 | } |
| 1145 | |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 1146 | mali_ptr ubufs = panfrost_upload_transient(batch, ubos, sz); |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1147 | postfix->uniforms = transfer.gpu; |
| 1148 | postfix->uniform_buffers = ubufs; |
| 1149 | |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 1150 | buf->dirty_mask = 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1151 | } |
| 1152 | |
Alyssa Rosenzweig | 2eb65c2 | 2019-03-13 01:50:40 +0000 | [diff] [blame] | 1153 | /* TODO: Upload the viewport somewhere more appropriate */ |
| 1154 | |
| 1155 | /* Clip bounds are encoded as floats. The viewport itself is encoded as |
| 1156 | * (somewhat) asymmetric ints. */ |
| 1157 | const struct pipe_scissor_state *ss = &ctx->scissor; |
| 1158 | |
| 1159 | struct mali_viewport view = { |
| 1160 | /* By default, do no viewport clipping, i.e. clip to (-inf, |
| 1161 | * inf) in each direction. Clipping to the viewport in theory |
| 1162 | * should work, but in practice causes issues when we're not |
| 1163 | * explicitly trying to scissor */ |
| 1164 | |
Alyssa Rosenzweig | 7c82dfb | 2019-07-05 08:25:56 -0700 | [diff] [blame] | 1165 | .clip_minx = -INFINITY, |
| 1166 | .clip_miny = -INFINITY, |
| 1167 | .clip_maxx = INFINITY, |
| 1168 | .clip_maxy = INFINITY, |
Alyssa Rosenzweig | 2eb65c2 | 2019-03-13 01:50:40 +0000 | [diff] [blame] | 1169 | }; |
| 1170 | |
Alyssa Rosenzweig | bd9446e | 2019-03-24 20:01:15 +0000 | [diff] [blame] | 1171 | /* Always scissor to the viewport by default. */ |
Alyssa Rosenzweig | fad7647 | 2019-07-17 16:30:09 -0700 | [diff] [blame] | 1172 | float vp_minx = (int) (vp->translate[0] - fabsf(vp->scale[0])); |
| 1173 | float vp_maxx = (int) (vp->translate[0] + fabsf(vp->scale[0])); |
Alyssa Rosenzweig | bd9446e | 2019-03-24 20:01:15 +0000 | [diff] [blame] | 1174 | |
Alyssa Rosenzweig | fad7647 | 2019-07-17 16:30:09 -0700 | [diff] [blame] | 1175 | float vp_miny = (int) (vp->translate[1] - fabsf(vp->scale[1])); |
| 1176 | float vp_maxy = (int) (vp->translate[1] + fabsf(vp->scale[1])); |
Alyssa Rosenzweig | bd9446e | 2019-03-24 20:01:15 +0000 | [diff] [blame] | 1177 | |
Alyssa Rosenzweig | d4542f8 | 2019-08-16 10:25:34 -0700 | [diff] [blame] | 1178 | float minz = (vp->translate[2] - fabsf(vp->scale[2])); |
| 1179 | float maxz = (vp->translate[2] + fabsf(vp->scale[2])); |
| 1180 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1181 | /* Apply the scissor test */ |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1182 | |
Alyssa Rosenzweig | fad7647 | 2019-07-17 16:30:09 -0700 | [diff] [blame] | 1183 | unsigned minx, miny, maxx, maxy; |
| 1184 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1185 | if (ss && ctx->rasterizer && ctx->rasterizer->base.scissor) { |
Alyssa Rosenzweig | fad7647 | 2019-07-17 16:30:09 -0700 | [diff] [blame] | 1186 | minx = MAX2(ss->minx, vp_minx); |
| 1187 | miny = MAX2(ss->miny, vp_miny); |
| 1188 | maxx = MIN2(ss->maxx, vp_maxx); |
| 1189 | maxy = MIN2(ss->maxy, vp_maxy); |
| 1190 | } else { |
| 1191 | minx = vp_minx; |
| 1192 | miny = vp_miny; |
| 1193 | maxx = vp_maxx; |
| 1194 | maxy = vp_maxy; |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1195 | } |
Alyssa Rosenzweig | 2eb65c2 | 2019-03-13 01:50:40 +0000 | [diff] [blame] | 1196 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1197 | /* Hardware needs the min/max to be strictly ordered, so flip if we |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1198 | * need to. The viewport transformation in the vertex shader will |
| 1199 | * handle the negatives if we don't */ |
| 1200 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1201 | if (miny > maxy) { |
Alyssa Rosenzweig | 8fba6ab | 2019-08-21 09:21:19 -0700 | [diff] [blame] | 1202 | unsigned temp = miny; |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1203 | miny = maxy; |
| 1204 | maxy = temp; |
| 1205 | } |
| 1206 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1207 | if (minx > maxx) { |
Alyssa Rosenzweig | 8fba6ab | 2019-08-21 09:21:19 -0700 | [diff] [blame] | 1208 | unsigned temp = minx; |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1209 | minx = maxx; |
| 1210 | maxx = temp; |
| 1211 | } |
| 1212 | |
Alyssa Rosenzweig | d4542f8 | 2019-08-16 10:25:34 -0700 | [diff] [blame] | 1213 | if (minz > maxz) { |
| 1214 | float temp = minz; |
| 1215 | minz = maxz; |
| 1216 | maxz = temp; |
| 1217 | } |
| 1218 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1219 | /* Clamp to the framebuffer size as a last check */ |
| 1220 | |
| 1221 | minx = MIN2(ctx->pipe_framebuffer.width, minx); |
| 1222 | maxx = MIN2(ctx->pipe_framebuffer.width, maxx); |
| 1223 | |
| 1224 | miny = MIN2(ctx->pipe_framebuffer.height, miny); |
| 1225 | maxy = MIN2(ctx->pipe_framebuffer.height, maxy); |
| 1226 | |
Alyssa Rosenzweig | c378829 | 2019-06-18 12:30:55 -0700 | [diff] [blame] | 1227 | /* Update the job, unless we're doing wallpapering (whose lack of |
| 1228 | * scissor we can ignore, since if we "miss" a tile of wallpaper, it'll |
| 1229 | * just... be faster :) */ |
| 1230 | |
Alyssa Rosenzweig | f085474 | 2019-06-19 11:27:59 -0700 | [diff] [blame] | 1231 | if (!ctx->wallpaper_batch) |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 1232 | panfrost_batch_union_scissor(batch, minx, miny, maxx, maxy); |
Alyssa Rosenzweig | c378829 | 2019-06-18 12:30:55 -0700 | [diff] [blame] | 1233 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1234 | /* Upload */ |
| 1235 | |
| 1236 | view.viewport0[0] = minx; |
| 1237 | view.viewport1[0] = MALI_POSITIVE(maxx); |
| 1238 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1239 | view.viewport0[1] = miny; |
| 1240 | view.viewport1[1] = MALI_POSITIVE(maxy); |
| 1241 | |
Alyssa Rosenzweig | d4542f8 | 2019-08-16 10:25:34 -0700 | [diff] [blame] | 1242 | view.clip_minz = minz; |
| 1243 | view.clip_maxz = maxz; |
| 1244 | |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1245 | ctx->payloads[PIPE_SHADER_FRAGMENT].postfix.viewport = |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 1246 | panfrost_upload_transient(batch, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1247 | &view, |
| 1248 | sizeof(struct mali_viewport)); |
Alyssa Rosenzweig | 2eb65c2 | 2019-03-13 01:50:40 +0000 | [diff] [blame] | 1249 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1250 | ctx->dirty = 0; |
| 1251 | } |
| 1252 | |
| 1253 | /* Corresponds to exactly one draw, but does not submit anything */ |
| 1254 | |
| 1255 | static void |
| 1256 | panfrost_queue_draw(struct panfrost_context *ctx) |
| 1257 | { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1258 | /* Handle dirty flags now */ |
| 1259 | panfrost_emit_for_draw(ctx, true); |
| 1260 | |
Alyssa Rosenzweig | cd5d618 | 2019-06-20 15:25:17 -0700 | [diff] [blame] | 1261 | /* If rasterizer discard is enable, only submit the vertex */ |
| 1262 | |
| 1263 | bool rasterizer_discard = ctx->rasterizer |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1264 | && ctx->rasterizer->base.rasterizer_discard; |
Alyssa Rosenzweig | cd5d618 | 2019-06-20 15:25:17 -0700 | [diff] [blame] | 1265 | |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 1266 | struct panfrost_transfer vertex = panfrost_vertex_tiler_job(ctx, false); |
Alyssa Rosenzweig | cd5d618 | 2019-06-20 15:25:17 -0700 | [diff] [blame] | 1267 | struct panfrost_transfer tiler; |
| 1268 | |
| 1269 | if (!rasterizer_discard) |
| 1270 | tiler = panfrost_vertex_tiler_job(ctx, true); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1271 | |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 1272 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | f085474 | 2019-06-19 11:27:59 -0700 | [diff] [blame] | 1273 | |
Alyssa Rosenzweig | cd5d618 | 2019-06-20 15:25:17 -0700 | [diff] [blame] | 1274 | if (rasterizer_discard) |
| 1275 | panfrost_scoreboard_queue_vertex_job(batch, vertex, FALSE); |
Boris Brezillon | 71eda74 | 2019-09-20 08:55:54 +0200 | [diff] [blame] | 1276 | else if (ctx->wallpaper_batch && batch->first_tiler.gpu) |
Alyssa Rosenzweig | f085474 | 2019-06-19 11:27:59 -0700 | [diff] [blame] | 1277 | panfrost_scoreboard_queue_fused_job_prepend(batch, vertex, tiler); |
| 1278 | else |
| 1279 | panfrost_scoreboard_queue_fused_job(batch, vertex, tiler); |
Alyssa Rosenzweig | bc887e8 | 2019-12-09 11:18:47 -0500 | [diff] [blame] | 1280 | |
| 1281 | for (unsigned i = 0; i < PIPE_SHADER_TYPES; ++i) { |
| 1282 | struct panfrost_shader_variants *all = ctx->shader[i]; |
| 1283 | |
| 1284 | if (!all) |
| 1285 | continue; |
| 1286 | |
| 1287 | struct panfrost_shader_state *ss = &all->variants[all->active_variant]; |
| 1288 | batch->stack_size = MAX2(batch->stack_size, ss->stack_size); |
| 1289 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1290 | } |
| 1291 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1292 | /* The entire frame is in memory -- send it off to the kernel! */ |
| 1293 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1294 | void |
| 1295 | panfrost_flush( |
| 1296 | struct pipe_context *pipe, |
| 1297 | struct pipe_fence_handle **fence, |
| 1298 | unsigned flags) |
| 1299 | { |
| 1300 | struct panfrost_context *ctx = pan_context(pipe); |
Boris Brezillon | b5d8f9b | 2019-09-15 18:23:10 +0200 | [diff] [blame] | 1301 | struct util_dynarray fences; |
| 1302 | |
| 1303 | /* We must collect the fences before the flush is done, otherwise we'll |
| 1304 | * lose track of them. |
| 1305 | */ |
| 1306 | if (fence) { |
| 1307 | util_dynarray_init(&fences, NULL); |
Boris Brezillon | a45984b | 2019-09-15 19:15:16 +0200 | [diff] [blame] | 1308 | hash_table_foreach(ctx->batches, hentry) { |
| 1309 | struct panfrost_batch *batch = hentry->data; |
| 1310 | |
| 1311 | panfrost_batch_fence_reference(batch->out_sync); |
| 1312 | util_dynarray_append(&fences, |
| 1313 | struct panfrost_batch_fence *, |
| 1314 | batch->out_sync); |
| 1315 | } |
Boris Brezillon | b5d8f9b | 2019-09-15 18:23:10 +0200 | [diff] [blame] | 1316 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1317 | |
Boris Brezillon | a45984b | 2019-09-15 19:15:16 +0200 | [diff] [blame] | 1318 | /* Submit all pending jobs */ |
| 1319 | panfrost_flush_all_batches(ctx, false); |
Boris Brezillon | 2fc91a1 | 2019-09-05 19:14:25 +0200 | [diff] [blame] | 1320 | |
| 1321 | if (fence) { |
Boris Brezillon | b5d8f9b | 2019-09-15 18:23:10 +0200 | [diff] [blame] | 1322 | struct panfrost_fence *f = panfrost_fence_create(ctx, &fences); |
Boris Brezillon | 2fc91a1 | 2019-09-05 19:14:25 +0200 | [diff] [blame] | 1323 | pipe->screen->fence_reference(pipe->screen, fence, NULL); |
| 1324 | *fence = (struct pipe_fence_handle *)f; |
Boris Brezillon | b5d8f9b | 2019-09-15 18:23:10 +0200 | [diff] [blame] | 1325 | |
| 1326 | util_dynarray_foreach(&fences, struct panfrost_batch_fence *, fence) |
| 1327 | panfrost_batch_fence_unreference(*fence); |
| 1328 | |
| 1329 | util_dynarray_fini(&fences); |
Boris Brezillon | 2fc91a1 | 2019-09-05 19:14:25 +0200 | [diff] [blame] | 1330 | } |
Icecream95 | cf2c5a5 | 2020-01-23 10:32:18 +1300 | [diff] [blame] | 1331 | |
| 1332 | if (pan_debug & PAN_DBG_TRACE) |
| 1333 | pandecode_next_frame(); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1334 | } |
| 1335 | |
| 1336 | #define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_##c; |
| 1337 | |
| 1338 | static int |
| 1339 | g2m_draw_mode(enum pipe_prim_type mode) |
| 1340 | { |
| 1341 | switch (mode) { |
| 1342 | DEFINE_CASE(POINTS); |
| 1343 | DEFINE_CASE(LINES); |
| 1344 | DEFINE_CASE(LINE_LOOP); |
| 1345 | DEFINE_CASE(LINE_STRIP); |
| 1346 | DEFINE_CASE(TRIANGLES); |
| 1347 | DEFINE_CASE(TRIANGLE_STRIP); |
| 1348 | DEFINE_CASE(TRIANGLE_FAN); |
| 1349 | DEFINE_CASE(QUADS); |
| 1350 | DEFINE_CASE(QUAD_STRIP); |
| 1351 | DEFINE_CASE(POLYGON); |
| 1352 | |
| 1353 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 1354 | unreachable("Invalid draw mode"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1355 | } |
| 1356 | } |
| 1357 | |
| 1358 | #undef DEFINE_CASE |
| 1359 | |
| 1360 | static unsigned |
| 1361 | panfrost_translate_index_size(unsigned size) |
| 1362 | { |
| 1363 | switch (size) { |
| 1364 | case 1: |
| 1365 | return MALI_DRAW_INDEXED_UINT8; |
| 1366 | |
| 1367 | case 2: |
| 1368 | return MALI_DRAW_INDEXED_UINT16; |
| 1369 | |
| 1370 | case 4: |
| 1371 | return MALI_DRAW_INDEXED_UINT32; |
| 1372 | |
| 1373 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 1374 | unreachable("Invalid index size"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1375 | } |
| 1376 | } |
| 1377 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1378 | /* Gets a GPU address for the associated index buffer. Only gauranteed to be |
| 1379 | * good for the duration of the draw (transient), could last longer */ |
| 1380 | |
| 1381 | static mali_ptr |
| 1382 | panfrost_get_index_buffer_mapped(struct panfrost_context *ctx, const struct pipe_draw_info *info) |
| 1383 | { |
| 1384 | struct panfrost_resource *rsrc = (struct panfrost_resource *) (info->index.resource); |
| 1385 | |
| 1386 | off_t offset = info->start * info->index_size; |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 1387 | struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1388 | |
| 1389 | if (!info->has_user_indices) { |
| 1390 | /* Only resources can be directly mapped */ |
Boris Brezillon | ada752a | 2019-09-15 09:21:13 +0200 | [diff] [blame] | 1391 | panfrost_batch_add_bo(batch, rsrc->bo, |
| 1392 | PAN_BO_ACCESS_SHARED | |
| 1393 | PAN_BO_ACCESS_READ | |
| 1394 | PAN_BO_ACCESS_VERTEX_TILER); |
Alyssa Rosenzweig | 6170814 | 2019-03-21 02:54:38 +0000 | [diff] [blame] | 1395 | return rsrc->bo->gpu + offset; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1396 | } else { |
| 1397 | /* Otherwise, we need to upload to transient memory */ |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1398 | const uint8_t *ibuf8 = (const uint8_t *) info->index.user; |
Boris Brezillon | 07a6883 | 2019-09-01 10:15:23 +0200 | [diff] [blame] | 1399 | return panfrost_upload_transient(batch, ibuf8 + offset, info->count * info->index_size); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1400 | } |
| 1401 | } |
| 1402 | |
Alyssa Rosenzweig | 9865b79 | 2019-06-17 09:26:34 -0700 | [diff] [blame] | 1403 | static bool |
| 1404 | panfrost_scissor_culls_everything(struct panfrost_context *ctx) |
| 1405 | { |
| 1406 | const struct pipe_scissor_state *ss = &ctx->scissor; |
| 1407 | |
| 1408 | /* Check if we're scissoring at all */ |
| 1409 | |
Boris Brezillon | 443e530 | 2019-06-26 11:16:31 +0200 | [diff] [blame] | 1410 | if (!(ctx->rasterizer && ctx->rasterizer->base.scissor)) |
Alyssa Rosenzweig | 9865b79 | 2019-06-17 09:26:34 -0700 | [diff] [blame] | 1411 | return false; |
| 1412 | |
Alyssa Rosenzweig | 124f6b5 | 2019-06-24 14:13:20 -0700 | [diff] [blame] | 1413 | return (ss->minx == ss->maxx) || (ss->miny == ss->maxy); |
Alyssa Rosenzweig | 9865b79 | 2019-06-17 09:26:34 -0700 | [diff] [blame] | 1414 | } |
| 1415 | |
Alyssa Rosenzweig | 72fc06d | 2019-08-08 07:10:24 -0700 | [diff] [blame] | 1416 | /* Count generated primitives (when there is no geom/tess shaders) for |
| 1417 | * transform feedback */ |
| 1418 | |
| 1419 | static void |
| 1420 | panfrost_statistics_record( |
| 1421 | struct panfrost_context *ctx, |
| 1422 | const struct pipe_draw_info *info) |
| 1423 | { |
| 1424 | if (!ctx->active_queries) |
| 1425 | return; |
| 1426 | |
| 1427 | uint32_t prims = u_prims_for_vertices(info->mode, info->count); |
| 1428 | ctx->prims_generated += prims; |
| 1429 | |
Alyssa Rosenzweig | 42f0aae | 2019-08-30 17:37:22 -0700 | [diff] [blame] | 1430 | if (!ctx->streamout.num_targets) |
Alyssa Rosenzweig | 72fc06d | 2019-08-08 07:10:24 -0700 | [diff] [blame] | 1431 | return; |
| 1432 | |
| 1433 | ctx->tf_prims_generated += prims; |
| 1434 | } |
| 1435 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1436 | static void |
| 1437 | panfrost_draw_vbo( |
| 1438 | struct pipe_context *pipe, |
| 1439 | const struct pipe_draw_info *info) |
| 1440 | { |
| 1441 | struct panfrost_context *ctx = pan_context(pipe); |
| 1442 | |
Alyssa Rosenzweig | 9865b79 | 2019-06-17 09:26:34 -0700 | [diff] [blame] | 1443 | /* First of all, check the scissor to see if anything is drawn at all. |
| 1444 | * If it's not, we drop the draw (mostly a conformance issue; |
| 1445 | * well-behaved apps shouldn't hit this) */ |
| 1446 | |
| 1447 | if (panfrost_scissor_culls_everything(ctx)) |
| 1448 | return; |
| 1449 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1450 | int mode = info->mode; |
| 1451 | |
Alyssa Rosenzweig | 7f54812 | 2019-06-26 15:59:29 -0700 | [diff] [blame] | 1452 | /* Fallback unsupported restart index */ |
| 1453 | unsigned primitive_index = (1 << (info->index_size * 8)) - 1; |
| 1454 | |
| 1455 | if (info->primitive_restart && info->index_size |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1456 | && info->restart_index != primitive_index) { |
Alyssa Rosenzweig | 7f54812 | 2019-06-26 15:59:29 -0700 | [diff] [blame] | 1457 | util_draw_vbo_without_prim_restart(pipe, info); |
| 1458 | return; |
| 1459 | } |
| 1460 | |
Alyssa Rosenzweig | 85e2bb5 | 2019-02-08 02:28:12 +0000 | [diff] [blame] | 1461 | /* Fallback for unsupported modes */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1462 | |
Alyssa Rosenzweig | 27b6264 | 2019-08-21 09:40:11 -0700 | [diff] [blame] | 1463 | assert(ctx->rasterizer != NULL); |
| 1464 | |
Alyssa Rosenzweig | 7c02c4f | 2019-03-15 02:13:34 +0000 | [diff] [blame] | 1465 | if (!(ctx->draw_modes & (1 << mode))) { |
Alyssa Rosenzweig | 27b6264 | 2019-08-21 09:40:11 -0700 | [diff] [blame] | 1466 | if (mode == PIPE_PRIM_QUADS && info->count == 4 && !ctx->rasterizer->base.flatshade) { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1467 | mode = PIPE_PRIM_TRIANGLE_FAN; |
| 1468 | } else { |
| 1469 | if (info->count < 4) { |
| 1470 | /* Degenerate case? */ |
| 1471 | return; |
| 1472 | } |
| 1473 | |
| 1474 | util_primconvert_save_rasterizer_state(ctx->primconvert, &ctx->rasterizer->base); |
| 1475 | util_primconvert_draw_vbo(ctx->primconvert, info); |
| 1476 | return; |
| 1477 | } |
| 1478 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1479 | |
Boris Brezillon | 835439b | 2019-09-05 21:01:20 +0200 | [diff] [blame] | 1480 | ctx->payloads[PIPE_SHADER_VERTEX].offset_start = info->start; |
| 1481 | ctx->payloads[PIPE_SHADER_FRAGMENT].offset_start = info->start; |
| 1482 | |
Alyssa Rosenzweig | 59c9623 | 2019-02-25 05:32:16 +0000 | [diff] [blame] | 1483 | /* Now that we have a guaranteed terminating path, find the job. |
| 1484 | * Assignment commented out to prevent unused warning */ |
| 1485 | |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 1486 | /* struct panfrost_batch *batch = */ panfrost_get_batch_for_fbo(ctx); |
Alyssa Rosenzweig | 59c9623 | 2019-02-25 05:32:16 +0000 | [diff] [blame] | 1487 | |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1488 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.draw_mode = g2m_draw_mode(mode); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1489 | |
Rohan Garg | 16edd56 | 2019-07-17 18:50:13 +0200 | [diff] [blame] | 1490 | /* Take into account a negative bias */ |
| 1491 | ctx->vertex_count = info->count + abs(info->index_bias); |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1492 | ctx->instance_count = info->instance_count; |
Alyssa Rosenzweig | 7c29588 | 2019-08-08 08:16:09 -0700 | [diff] [blame] | 1493 | ctx->active_prim = info->mode; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1494 | |
| 1495 | /* For non-indexed draws, they're the same */ |
Alyssa Rosenzweig | c9b164f | 2019-06-27 08:29:06 -0700 | [diff] [blame] | 1496 | unsigned vertex_count = ctx->vertex_count; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1497 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1498 | unsigned draw_flags = 0; |
| 1499 | |
| 1500 | /* The draw flags interpret how primitive size is interpreted */ |
| 1501 | |
| 1502 | if (panfrost_writes_point_size(ctx)) |
| 1503 | draw_flags |= MALI_DRAW_VARYING_SIZE; |
| 1504 | |
Alyssa Rosenzweig | 7f54812 | 2019-06-26 15:59:29 -0700 | [diff] [blame] | 1505 | if (info->primitive_restart) |
| 1506 | draw_flags |= MALI_DRAW_PRIMITIVE_RESTART_FIXED_INDEX; |
| 1507 | |
Alyssa Rosenzweig | 6ddaa55 | 2019-11-22 11:45:13 -0500 | [diff] [blame] | 1508 | /* These doesn't make much sense */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1509 | |
Alyssa Rosenzweig | 6ddaa55 | 2019-11-22 11:45:13 -0500 | [diff] [blame] | 1510 | draw_flags |= 0x3000; |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1511 | |
Alyssa Rosenzweig | 71df7c6 | 2019-12-27 15:33:21 -0500 | [diff] [blame] | 1512 | if (ctx->rasterizer && ctx->rasterizer->base.flatshade_first) |
| 1513 | draw_flags |= MALI_DRAW_FLATSHADE_FIRST; |
Alyssa Rosenzweig | 0e4c321 | 2019-03-31 04:26:48 +0000 | [diff] [blame] | 1514 | |
Alyssa Rosenzweig | 72fc06d | 2019-08-08 07:10:24 -0700 | [diff] [blame] | 1515 | panfrost_statistics_record(ctx, info); |
| 1516 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1517 | if (info->index_size) { |
| 1518 | /* Calculate the min/max index used so we can figure out how |
| 1519 | * many times to invoke the vertex shader */ |
| 1520 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1521 | /* Fetch / calculate index bounds */ |
| 1522 | unsigned min_index = 0, max_index = 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1523 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1524 | if (info->max_index == ~0u) { |
| 1525 | u_vbuf_get_minmax_index(pipe, info, &min_index, &max_index); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1526 | } else { |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1527 | min_index = info->min_index; |
| 1528 | max_index = info->max_index; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1529 | } |
| 1530 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1531 | /* Use the corresponding values */ |
Alyssa Rosenzweig | c9b164f | 2019-06-27 08:29:06 -0700 | [diff] [blame] | 1532 | vertex_count = max_index - min_index + 1; |
Rohan Garg | 16edd56 | 2019-07-17 18:50:13 +0200 | [diff] [blame] | 1533 | ctx->payloads[PIPE_SHADER_VERTEX].offset_start = min_index + info->index_bias; |
| 1534 | ctx->payloads[PIPE_SHADER_FRAGMENT].offset_start = min_index + info->index_bias; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1535 | |
Rohan Garg | 16edd56 | 2019-07-17 18:50:13 +0200 | [diff] [blame] | 1536 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.offset_bias_correction = -min_index; |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1537 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.index_count = MALI_POSITIVE(info->count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1538 | |
| 1539 | //assert(!info->restart_index); /* TODO: Research */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1540 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1541 | draw_flags |= panfrost_translate_index_size(info->index_size); |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1542 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.indices = panfrost_get_index_buffer_mapped(ctx, info); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1543 | } else { |
| 1544 | /* Index count == vertex count, if no indexing is applied, as |
| 1545 | * if it is internally indexed in the expected order */ |
| 1546 | |
Rohan Garg | 16edd56 | 2019-07-17 18:50:13 +0200 | [diff] [blame] | 1547 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.offset_bias_correction = 0; |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1548 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.index_count = MALI_POSITIVE(ctx->vertex_count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1549 | |
| 1550 | /* Reverse index state */ |
Alyssa Rosenzweig | e39c527 | 2020-01-24 08:26:38 -0500 | [diff] [blame] | 1551 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.indices = (mali_ptr) 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1552 | } |
| 1553 | |
Alyssa Rosenzweig | c9b164f | 2019-06-27 08:29:06 -0700 | [diff] [blame] | 1554 | /* Dispatch "compute jobs" for the vertex/tiler pair as (1, |
| 1555 | * vertex_count, 1) */ |
| 1556 | |
| 1557 | panfrost_pack_work_groups_fused( |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1558 | &ctx->payloads[PIPE_SHADER_VERTEX].prefix, |
| 1559 | &ctx->payloads[PIPE_SHADER_FRAGMENT].prefix, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1560 | 1, vertex_count, info->instance_count, |
| 1561 | 1, 1, 1); |
Alyssa Rosenzweig | c9b164f | 2019-06-27 08:29:06 -0700 | [diff] [blame] | 1562 | |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1563 | ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.unknown_draw = draw_flags; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1564 | |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1565 | /* Encode the padded vertex count */ |
| 1566 | |
| 1567 | if (info->instance_count > 1) { |
Alyssa Rosenzweig | d36ca7c | 2019-12-19 16:46:43 -0500 | [diff] [blame] | 1568 | ctx->padded_count = panfrost_padded_vertex_count(vertex_count); |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1569 | |
Alyssa Rosenzweig | d36ca7c | 2019-12-19 16:46:43 -0500 | [diff] [blame] | 1570 | unsigned shift = __builtin_ctz(ctx->padded_count); |
| 1571 | unsigned k = ctx->padded_count >> (shift + 1); |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1572 | |
Alyssa Rosenzweig | d36ca7c | 2019-12-19 16:46:43 -0500 | [diff] [blame] | 1573 | ctx->payloads[PIPE_SHADER_VERTEX].instance_shift = shift; |
| 1574 | ctx->payloads[PIPE_SHADER_FRAGMENT].instance_shift = shift; |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1575 | |
Alyssa Rosenzweig | d36ca7c | 2019-12-19 16:46:43 -0500 | [diff] [blame] | 1576 | ctx->payloads[PIPE_SHADER_VERTEX].instance_odd = k; |
| 1577 | ctx->payloads[PIPE_SHADER_FRAGMENT].instance_odd = k; |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1578 | } else { |
Boris Brezillon | 055497f | 2019-09-18 15:22:24 +0200 | [diff] [blame] | 1579 | ctx->padded_count = vertex_count; |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1580 | |
| 1581 | /* Reset instancing state */ |
Alyssa Rosenzweig | 0da5201 | 2019-07-31 14:05:14 -0700 | [diff] [blame] | 1582 | ctx->payloads[PIPE_SHADER_VERTEX].instance_shift = 0; |
| 1583 | ctx->payloads[PIPE_SHADER_VERTEX].instance_odd = 0; |
| 1584 | ctx->payloads[PIPE_SHADER_FRAGMENT].instance_shift = 0; |
| 1585 | ctx->payloads[PIPE_SHADER_FRAGMENT].instance_odd = 0; |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1586 | } |
| 1587 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1588 | /* Fire off the draw itself */ |
| 1589 | panfrost_queue_draw(ctx); |
Alyssa Rosenzweig | 7c29588 | 2019-08-08 08:16:09 -0700 | [diff] [blame] | 1590 | |
| 1591 | /* Increment transform feedback offsets */ |
| 1592 | |
| 1593 | for (unsigned i = 0; i < ctx->streamout.num_targets; ++i) { |
| 1594 | unsigned output_count = u_stream_outputs_for_vertices( |
| 1595 | ctx->active_prim, ctx->vertex_count); |
| 1596 | |
| 1597 | ctx->streamout.offsets[i] += output_count; |
| 1598 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1599 | } |
| 1600 | |
| 1601 | /* CSO state */ |
| 1602 | |
| 1603 | static void |
| 1604 | panfrost_generic_cso_delete(struct pipe_context *pctx, void *hwcso) |
| 1605 | { |
| 1606 | free(hwcso); |
| 1607 | } |
| 1608 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1609 | static void * |
| 1610 | panfrost_create_rasterizer_state( |
| 1611 | struct pipe_context *pctx, |
| 1612 | const struct pipe_rasterizer_state *cso) |
| 1613 | { |
| 1614 | struct panfrost_rasterizer *so = CALLOC_STRUCT(panfrost_rasterizer); |
| 1615 | |
| 1616 | so->base = *cso; |
| 1617 | |
Tomeu Vizoso | 5a7688f | 2019-07-11 08:06:41 +0200 | [diff] [blame] | 1618 | /* Bitmask, unknown meaning of the start value. 0x105 on 32-bit T6XX */ |
| 1619 | so->tiler_gl_enables = 0x7; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1620 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1621 | if (cso->front_ccw) |
| 1622 | so->tiler_gl_enables |= MALI_FRONT_CCW_TOP; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1623 | |
| 1624 | if (cso->cull_face & PIPE_FACE_FRONT) |
| 1625 | so->tiler_gl_enables |= MALI_CULL_FACE_FRONT; |
| 1626 | |
| 1627 | if (cso->cull_face & PIPE_FACE_BACK) |
| 1628 | so->tiler_gl_enables |= MALI_CULL_FACE_BACK; |
| 1629 | |
| 1630 | return so; |
| 1631 | } |
| 1632 | |
| 1633 | static void |
| 1634 | panfrost_bind_rasterizer_state( |
| 1635 | struct pipe_context *pctx, |
| 1636 | void *hwcso) |
| 1637 | { |
| 1638 | struct panfrost_context *ctx = pan_context(pctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1639 | |
| 1640 | /* TODO: Why can't rasterizer be NULL ever? Other drivers are fine.. */ |
| 1641 | if (!hwcso) |
| 1642 | return; |
| 1643 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1644 | ctx->rasterizer = hwcso; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1645 | ctx->dirty |= PAN_DIRTY_RASTERIZER; |
Alyssa Rosenzweig | be03060 | 2019-06-24 11:01:05 -0700 | [diff] [blame] | 1646 | |
Tomeu Vizoso | 7d24cef | 2019-11-13 08:42:34 +0100 | [diff] [blame] | 1647 | ctx->fragment_shader_core.depth_units = ctx->rasterizer->base.offset_units * 2.0f; |
Alyssa Rosenzweig | 8305766 | 2019-07-11 07:02:26 -0700 | [diff] [blame] | 1648 | ctx->fragment_shader_core.depth_factor = ctx->rasterizer->base.offset_scale; |
| 1649 | |
| 1650 | /* Gauranteed with the core GL call, so don't expose ARB_polygon_offset */ |
| 1651 | assert(ctx->rasterizer->base.offset_clamp == 0.0); |
| 1652 | |
| 1653 | /* XXX: Which bit is which? Does this maybe allow offseting not-tri? */ |
| 1654 | |
| 1655 | SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_DEPTH_RANGE_A, ctx->rasterizer->base.offset_tri); |
| 1656 | SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_DEPTH_RANGE_B, ctx->rasterizer->base.offset_tri); |
| 1657 | |
Alyssa Rosenzweig | be03060 | 2019-06-24 11:01:05 -0700 | [diff] [blame] | 1658 | /* Point sprites are emulated */ |
| 1659 | |
Alyssa Rosenzweig | f35f373 | 2019-06-24 11:53:58 -0700 | [diff] [blame] | 1660 | struct panfrost_shader_state *variant = |
Alyssa Rosenzweig | ac6aa93 | 2019-07-31 14:13:30 -0700 | [diff] [blame] | 1661 | ctx->shader[PIPE_SHADER_FRAGMENT] ? &ctx->shader[PIPE_SHADER_FRAGMENT]->variants[ctx->shader[PIPE_SHADER_FRAGMENT]->active_variant] : NULL; |
Alyssa Rosenzweig | f35f373 | 2019-06-24 11:53:58 -0700 | [diff] [blame] | 1662 | |
| 1663 | if (ctx->rasterizer->base.sprite_coord_enable || (variant && variant->point_sprite_mask)) |
Alyssa Rosenzweig | ac6aa93 | 2019-07-31 14:13:30 -0700 | [diff] [blame] | 1664 | ctx->base.bind_fs_state(&ctx->base, ctx->shader[PIPE_SHADER_FRAGMENT]); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1665 | } |
| 1666 | |
| 1667 | static void * |
| 1668 | panfrost_create_vertex_elements_state( |
| 1669 | struct pipe_context *pctx, |
| 1670 | unsigned num_elements, |
| 1671 | const struct pipe_vertex_element *elements) |
| 1672 | { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1673 | struct panfrost_vertex_state *so = CALLOC_STRUCT(panfrost_vertex_state); |
| 1674 | |
| 1675 | so->num_elements = num_elements; |
| 1676 | memcpy(so->pipe, elements, sizeof(*elements) * num_elements); |
| 1677 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1678 | for (int i = 0; i < num_elements; ++i) { |
Alyssa Rosenzweig | 8d74749 | 2019-06-27 14:13:10 -0700 | [diff] [blame] | 1679 | so->hw[i].index = i; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1680 | |
| 1681 | enum pipe_format fmt = elements[i].src_format; |
| 1682 | const struct util_format_description *desc = util_format_description(fmt); |
| 1683 | so->hw[i].unknown1 = 0x2; |
| 1684 | so->hw[i].swizzle = panfrost_get_default_swizzle(desc->nr_channels); |
| 1685 | |
| 1686 | so->hw[i].format = panfrost_find_format(desc); |
| 1687 | |
| 1688 | /* The field itself should probably be shifted over */ |
| 1689 | so->hw[i].src_offset = elements[i].src_offset; |
| 1690 | } |
| 1691 | |
| 1692 | return so; |
| 1693 | } |
| 1694 | |
| 1695 | static void |
| 1696 | panfrost_bind_vertex_elements_state( |
| 1697 | struct pipe_context *pctx, |
| 1698 | void *hwcso) |
| 1699 | { |
| 1700 | struct panfrost_context *ctx = pan_context(pctx); |
| 1701 | |
| 1702 | ctx->vertex = hwcso; |
| 1703 | ctx->dirty |= PAN_DIRTY_VERTEX; |
| 1704 | } |
| 1705 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1706 | static void * |
| 1707 | panfrost_create_shader_state( |
| 1708 | struct pipe_context *pctx, |
Alyssa Rosenzweig | 271726e | 2019-12-13 15:13:02 -0500 | [diff] [blame] | 1709 | const struct pipe_shader_state *cso, |
| 1710 | enum pipe_shader_type stage) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1711 | { |
| 1712 | struct panfrost_shader_variants *so = CALLOC_STRUCT(panfrost_shader_variants); |
| 1713 | so->base = *cso; |
| 1714 | |
| 1715 | /* Token deep copy to prevent memory corruption */ |
| 1716 | |
| 1717 | if (cso->type == PIPE_SHADER_IR_TGSI) |
| 1718 | so->base.tokens = tgsi_dup_tokens(so->base.tokens); |
| 1719 | |
Alyssa Rosenzweig | 271726e | 2019-12-13 15:13:02 -0500 | [diff] [blame] | 1720 | /* Precompile for shader-db if we need to */ |
| 1721 | if (unlikely((pan_debug & PAN_DBG_PRECOMPILE) && cso->type == PIPE_SHADER_IR_NIR)) { |
| 1722 | struct panfrost_context *ctx = pan_context(pctx); |
| 1723 | |
| 1724 | struct mali_shader_meta meta; |
| 1725 | struct panfrost_shader_state state; |
| 1726 | uint64_t outputs_written; |
| 1727 | |
| 1728 | panfrost_shader_compile(ctx, &meta, |
| 1729 | PIPE_SHADER_IR_NIR, |
| 1730 | so->base.ir.nir, |
| 1731 | tgsi_processor_to_shader_stage(stage), &state, |
| 1732 | &outputs_written); |
| 1733 | } |
| 1734 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1735 | return so; |
| 1736 | } |
| 1737 | |
| 1738 | static void |
| 1739 | panfrost_delete_shader_state( |
| 1740 | struct pipe_context *pctx, |
| 1741 | void *so) |
| 1742 | { |
Alyssa Rosenzweig | acc52ff | 2019-02-14 04:00:19 +0000 | [diff] [blame] | 1743 | struct panfrost_shader_variants *cso = (struct panfrost_shader_variants *) so; |
| 1744 | |
| 1745 | if (cso->base.type == PIPE_SHADER_IR_TGSI) { |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 1746 | DBG("Deleting TGSI shader leaks duplicated tokens\n"); |
Alyssa Rosenzweig | acc52ff | 2019-02-14 04:00:19 +0000 | [diff] [blame] | 1747 | } |
| 1748 | |
Tomeu Vizoso | 950b5fc5 | 2019-08-01 16:45:50 +0200 | [diff] [blame] | 1749 | for (unsigned i = 0; i < cso->variant_count; ++i) { |
| 1750 | struct panfrost_shader_state *shader_state = &cso->variants[i]; |
Boris Brezillon | e15ab93 | 2019-09-14 10:35:47 +0200 | [diff] [blame] | 1751 | panfrost_bo_unreference(shader_state->bo); |
Tomeu Vizoso | 950b5fc5 | 2019-08-01 16:45:50 +0200 | [diff] [blame] | 1752 | shader_state->bo = NULL; |
| 1753 | } |
Icecream95 | d8a3501 | 2020-01-12 14:19:25 +1300 | [diff] [blame] | 1754 | free(cso->variants); |
Tomeu Vizoso | 950b5fc5 | 2019-08-01 16:45:50 +0200 | [diff] [blame] | 1755 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1756 | free(so); |
| 1757 | } |
| 1758 | |
| 1759 | static void * |
| 1760 | panfrost_create_sampler_state( |
| 1761 | struct pipe_context *pctx, |
| 1762 | const struct pipe_sampler_state *cso) |
| 1763 | { |
| 1764 | struct panfrost_sampler_state *so = CALLOC_STRUCT(panfrost_sampler_state); |
| 1765 | so->base = *cso; |
| 1766 | |
| 1767 | /* sampler_state corresponds to mali_sampler_descriptor, which we can generate entirely here */ |
| 1768 | |
Alyssa Rosenzweig | cf6cad3 | 2019-07-31 08:50:02 -0700 | [diff] [blame] | 1769 | bool min_nearest = cso->min_img_filter == PIPE_TEX_FILTER_NEAREST; |
| 1770 | bool mag_nearest = cso->mag_img_filter == PIPE_TEX_FILTER_NEAREST; |
| 1771 | bool mip_linear = cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR; |
| 1772 | |
| 1773 | unsigned min_filter = min_nearest ? MALI_SAMP_MIN_NEAREST : 0; |
| 1774 | unsigned mag_filter = mag_nearest ? MALI_SAMP_MAG_NEAREST : 0; |
| 1775 | unsigned mip_filter = mip_linear ? |
| 1776 | (MALI_SAMP_MIP_LINEAR_1 | MALI_SAMP_MIP_LINEAR_2) : 0; |
Alyssa Rosenzweig | 3e47a11 | 2019-07-31 09:08:07 -0700 | [diff] [blame] | 1777 | unsigned normalized = cso->normalized_coords ? MALI_SAMP_NORM_COORDS : 0; |
Alyssa Rosenzweig | cf6cad3 | 2019-07-31 08:50:02 -0700 | [diff] [blame] | 1778 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1779 | struct mali_sampler_descriptor sampler_descriptor = { |
Alyssa Rosenzweig | 3e47a11 | 2019-07-31 09:08:07 -0700 | [diff] [blame] | 1780 | .filter_mode = min_filter | mag_filter | mip_filter | normalized, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1781 | .wrap_s = translate_tex_wrap(cso->wrap_s), |
| 1782 | .wrap_t = translate_tex_wrap(cso->wrap_t), |
| 1783 | .wrap_r = translate_tex_wrap(cso->wrap_r), |
Alyssa Rosenzweig | de077c2 | 2019-12-27 12:56:03 -0500 | [diff] [blame] | 1784 | .compare_func = panfrost_flip_compare_func( |
| 1785 | panfrost_translate_compare_func( |
| 1786 | cso->compare_func)), |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1787 | .border_color = { |
| 1788 | cso->border_color.f[0], |
| 1789 | cso->border_color.f[1], |
| 1790 | cso->border_color.f[2], |
| 1791 | cso->border_color.f[3] |
| 1792 | }, |
Icecream95 | f2f1277 | 2020-01-09 15:13:58 +1300 | [diff] [blame] | 1793 | .min_lod = FIXED_16(cso->min_lod, false), /* clamp at 0 */ |
| 1794 | .max_lod = FIXED_16(cso->max_lod, false), |
| 1795 | .lod_bias = FIXED_16(cso->lod_bias, true), /* can be negative */ |
Alyssa Rosenzweig | 17adcfc | 2019-06-24 09:16:11 -0700 | [diff] [blame] | 1796 | .seamless_cube_map = cso->seamless_cube_map, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1797 | }; |
| 1798 | |
Alyssa Rosenzweig | f57dfe4 | 2019-06-21 16:58:48 -0700 | [diff] [blame] | 1799 | /* If necessary, we disable mipmapping in the sampler descriptor by |
| 1800 | * clamping the LOD as tight as possible (from 0 to epsilon, |
| 1801 | * essentially -- remember these are fixed point numbers, so |
| 1802 | * epsilon=1/256) */ |
| 1803 | |
| 1804 | if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE) |
| 1805 | sampler_descriptor.max_lod = sampler_descriptor.min_lod; |
| 1806 | |
| 1807 | /* Enforce that there is something in the middle by adding epsilon*/ |
| 1808 | |
| 1809 | if (sampler_descriptor.min_lod == sampler_descriptor.max_lod) |
| 1810 | sampler_descriptor.max_lod++; |
| 1811 | |
| 1812 | /* Sanity check */ |
| 1813 | assert(sampler_descriptor.max_lod > sampler_descriptor.min_lod); |
| 1814 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1815 | so->hw = sampler_descriptor; |
| 1816 | |
| 1817 | return so; |
| 1818 | } |
| 1819 | |
| 1820 | static void |
| 1821 | panfrost_bind_sampler_states( |
| 1822 | struct pipe_context *pctx, |
| 1823 | enum pipe_shader_type shader, |
| 1824 | unsigned start_slot, unsigned num_sampler, |
| 1825 | void **sampler) |
| 1826 | { |
| 1827 | assert(start_slot == 0); |
| 1828 | |
| 1829 | struct panfrost_context *ctx = pan_context(pctx); |
| 1830 | |
| 1831 | /* XXX: Should upload, not just copy? */ |
| 1832 | ctx->sampler_count[shader] = num_sampler; |
| 1833 | memcpy(ctx->samplers[shader], sampler, num_sampler * sizeof (void *)); |
| 1834 | |
| 1835 | ctx->dirty |= PAN_DIRTY_SAMPLERS; |
| 1836 | } |
| 1837 | |
| 1838 | static bool |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1839 | panfrost_variant_matches( |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1840 | struct panfrost_context *ctx, |
| 1841 | struct panfrost_shader_state *variant, |
| 1842 | enum pipe_shader_type type) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1843 | { |
Alyssa Rosenzweig | be03060 | 2019-06-24 11:01:05 -0700 | [diff] [blame] | 1844 | struct pipe_rasterizer_state *rasterizer = &ctx->rasterizer->base; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1845 | struct pipe_alpha_state *alpha = &ctx->depth_stencil->alpha; |
| 1846 | |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1847 | bool is_fragment = (type == PIPE_SHADER_FRAGMENT); |
| 1848 | |
| 1849 | if (is_fragment && (alpha->enabled || variant->alpha_state.enabled)) { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1850 | /* Make sure enable state is at least the same */ |
| 1851 | if (alpha->enabled != variant->alpha_state.enabled) { |
| 1852 | return false; |
| 1853 | } |
| 1854 | |
| 1855 | /* Check that the contents of the test are the same */ |
| 1856 | bool same_func = alpha->func == variant->alpha_state.func; |
| 1857 | bool same_ref = alpha->ref_value == variant->alpha_state.ref_value; |
| 1858 | |
| 1859 | if (!(same_func && same_ref)) { |
| 1860 | return false; |
| 1861 | } |
| 1862 | } |
Alyssa Rosenzweig | be03060 | 2019-06-24 11:01:05 -0700 | [diff] [blame] | 1863 | |
| 1864 | if (is_fragment && rasterizer && (rasterizer->sprite_coord_enable | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1865 | variant->point_sprite_mask)) { |
Alyssa Rosenzweig | be03060 | 2019-06-24 11:01:05 -0700 | [diff] [blame] | 1866 | /* Ensure the same varyings are turned to point sprites */ |
| 1867 | if (rasterizer->sprite_coord_enable != variant->point_sprite_mask) |
| 1868 | return false; |
| 1869 | |
| 1870 | /* Ensure the orientation is correct */ |
| 1871 | bool upper_left = |
| 1872 | rasterizer->sprite_coord_mode == |
| 1873 | PIPE_SPRITE_COORD_UPPER_LEFT; |
| 1874 | |
| 1875 | if (variant->point_sprite_upper_left != upper_left) |
| 1876 | return false; |
| 1877 | } |
| 1878 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1879 | /* Otherwise, we're good to go */ |
| 1880 | return true; |
| 1881 | } |
| 1882 | |
Alyssa Rosenzweig | f714eab | 2019-08-07 10:11:28 -0700 | [diff] [blame] | 1883 | /** |
| 1884 | * Fix an uncompiled shader's stream output info, and produce a bitmask |
| 1885 | * of which VARYING_SLOT_* are captured for stream output. |
| 1886 | * |
| 1887 | * Core Gallium stores output->register_index as a "slot" number, where |
| 1888 | * slots are assigned consecutively to all outputs in info->outputs_written. |
| 1889 | * This naive packing of outputs doesn't work for us - we too have slots, |
| 1890 | * but the layout is defined by the VUE map, which we won't have until we |
| 1891 | * compile a specific shader variant. So, we remap these and simply store |
| 1892 | * VARYING_SLOT_* in our copy's output->register_index fields. |
| 1893 | * |
| 1894 | * We then produce a bitmask of outputs which are used for SO. |
| 1895 | * |
| 1896 | * Implementation from iris. |
| 1897 | */ |
| 1898 | |
| 1899 | static uint64_t |
| 1900 | update_so_info(struct pipe_stream_output_info *so_info, |
| 1901 | uint64_t outputs_written) |
| 1902 | { |
| 1903 | uint64_t so_outputs = 0; |
Vinson Lee | de2e5f6 | 2019-11-27 23:37:00 -0800 | [diff] [blame] | 1904 | uint8_t reverse_map[64] = {0}; |
Alyssa Rosenzweig | f714eab | 2019-08-07 10:11:28 -0700 | [diff] [blame] | 1905 | unsigned slot = 0; |
| 1906 | |
| 1907 | while (outputs_written) |
| 1908 | reverse_map[slot++] = u_bit_scan64(&outputs_written); |
| 1909 | |
| 1910 | for (unsigned i = 0; i < so_info->num_outputs; i++) { |
| 1911 | struct pipe_stream_output *output = &so_info->output[i]; |
| 1912 | |
| 1913 | /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */ |
| 1914 | output->register_index = reverse_map[output->register_index]; |
| 1915 | |
| 1916 | so_outputs |= 1ull << output->register_index; |
| 1917 | } |
| 1918 | |
| 1919 | return so_outputs; |
| 1920 | } |
| 1921 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1922 | static void |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1923 | panfrost_bind_shader_state( |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1924 | struct pipe_context *pctx, |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1925 | void *hwcso, |
| 1926 | enum pipe_shader_type type) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1927 | { |
| 1928 | struct panfrost_context *ctx = pan_context(pctx); |
| 1929 | |
Alyssa Rosenzweig | 3113be3 | 2019-07-31 14:15:19 -0700 | [diff] [blame] | 1930 | ctx->shader[type] = hwcso; |
| 1931 | |
| 1932 | if (type == PIPE_SHADER_FRAGMENT) |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1933 | ctx->dirty |= PAN_DIRTY_FS; |
Alyssa Rosenzweig | 3113be3 | 2019-07-31 14:15:19 -0700 | [diff] [blame] | 1934 | else |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1935 | ctx->dirty |= PAN_DIRTY_VS; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1936 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1937 | if (!hwcso) return; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1938 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1939 | /* Match the appropriate variant */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1940 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1941 | signed variant = -1; |
| 1942 | struct panfrost_shader_variants *variants = (struct panfrost_shader_variants *) hwcso; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1943 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1944 | for (unsigned i = 0; i < variants->variant_count; ++i) { |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1945 | if (panfrost_variant_matches(ctx, &variants->variants[i], type)) { |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1946 | variant = i; |
| 1947 | break; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1948 | } |
| 1949 | } |
| 1950 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1951 | if (variant == -1) { |
| 1952 | /* No variant matched, so create a new one */ |
| 1953 | variant = variants->variant_count++; |
Icecream95 | d8a3501 | 2020-01-12 14:19:25 +1300 | [diff] [blame] | 1954 | |
| 1955 | if (variants->variant_count > variants->variant_space) { |
| 1956 | unsigned old_space = variants->variant_space; |
| 1957 | |
| 1958 | variants->variant_space *= 2; |
| 1959 | if (variants->variant_space == 0) |
| 1960 | variants->variant_space = 1; |
| 1961 | |
| 1962 | /* Arbitrary limit to stop runaway programs from |
| 1963 | * creating an unbounded number of shader variants. */ |
| 1964 | assert(variants->variant_space < 1024); |
| 1965 | |
| 1966 | unsigned msize = sizeof(struct panfrost_shader_state); |
| 1967 | variants->variants = realloc(variants->variants, |
| 1968 | variants->variant_space * msize); |
| 1969 | |
| 1970 | memset(&variants->variants[old_space], 0, |
| 1971 | (variants->variant_space - old_space) * msize); |
| 1972 | } |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1973 | |
Alyssa Rosenzweig | be03060 | 2019-06-24 11:01:05 -0700 | [diff] [blame] | 1974 | struct panfrost_shader_state *v = |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 1975 | &variants->variants[variant]; |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1976 | |
Alyssa Rosenzweig | be03060 | 2019-06-24 11:01:05 -0700 | [diff] [blame] | 1977 | if (type == PIPE_SHADER_FRAGMENT) { |
| 1978 | v->alpha_state = ctx->depth_stencil->alpha; |
| 1979 | |
| 1980 | if (ctx->rasterizer) { |
| 1981 | v->point_sprite_mask = ctx->rasterizer->base.sprite_coord_enable; |
| 1982 | v->point_sprite_upper_left = |
| 1983 | ctx->rasterizer->base.sprite_coord_mode == |
| 1984 | PIPE_SPRITE_COORD_UPPER_LEFT; |
| 1985 | } |
| 1986 | } |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1987 | |
Alyssa Rosenzweig | 5443826 | 2019-08-14 14:21:02 -0700 | [diff] [blame] | 1988 | variants->variants[variant].tripipe = calloc(1, sizeof(struct mali_shader_meta)); |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1989 | |
| 1990 | } |
| 1991 | |
| 1992 | /* Select this variant */ |
| 1993 | variants->active_variant = variant; |
| 1994 | |
| 1995 | struct panfrost_shader_state *shader_state = &variants->variants[variant]; |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1996 | assert(panfrost_variant_matches(ctx, shader_state, type)); |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1997 | |
| 1998 | /* We finally have a variant, so compile it */ |
| 1999 | |
| 2000 | if (!shader_state->compiled) { |
Alyssa Rosenzweig | 5b0a1a4 | 2019-08-07 10:26:12 -0700 | [diff] [blame] | 2001 | uint64_t outputs_written = 0; |
| 2002 | |
Alyssa Rosenzweig | c228046 | 2019-07-31 15:19:09 -0700 | [diff] [blame] | 2003 | panfrost_shader_compile(ctx, shader_state->tripipe, |
| 2004 | variants->base.type, |
| 2005 | variants->base.type == PIPE_SHADER_IR_NIR ? |
| 2006 | variants->base.ir.nir : |
| 2007 | variants->base.tokens, |
Alyssa Rosenzweig | 5b0a1a4 | 2019-08-07 10:26:12 -0700 | [diff] [blame] | 2008 | tgsi_processor_to_shader_stage(type), shader_state, |
| 2009 | &outputs_written); |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 2010 | |
| 2011 | shader_state->compiled = true; |
Alyssa Rosenzweig | e7a05a6 | 2019-08-07 10:33:15 -0700 | [diff] [blame] | 2012 | |
| 2013 | /* Fixup the stream out information, since what Gallium returns |
| 2014 | * normally is mildly insane */ |
| 2015 | |
| 2016 | shader_state->stream_output = variants->base.stream_output; |
| 2017 | shader_state->so_mask = |
| 2018 | update_so_info(&shader_state->stream_output, outputs_written); |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 2019 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2020 | } |
| 2021 | |
Alyssa Rosenzweig | 271726e | 2019-12-13 15:13:02 -0500 | [diff] [blame] | 2022 | static void * |
| 2023 | panfrost_create_vs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso) |
| 2024 | { |
| 2025 | return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX); |
| 2026 | } |
| 2027 | |
| 2028 | static void * |
| 2029 | panfrost_create_fs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso) |
| 2030 | { |
| 2031 | return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT); |
| 2032 | } |
| 2033 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2034 | static void |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 2035 | panfrost_bind_vs_state(struct pipe_context *pctx, void *hwcso) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2036 | { |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 2037 | panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX); |
| 2038 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2039 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 2040 | static void |
| 2041 | panfrost_bind_fs_state(struct pipe_context *pctx, void *hwcso) |
| 2042 | { |
| 2043 | panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2044 | } |
| 2045 | |
| 2046 | static void |
| 2047 | panfrost_set_vertex_buffers( |
| 2048 | struct pipe_context *pctx, |
| 2049 | unsigned start_slot, |
| 2050 | unsigned num_buffers, |
| 2051 | const struct pipe_vertex_buffer *buffers) |
| 2052 | { |
| 2053 | struct panfrost_context *ctx = pan_context(pctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2054 | |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 2055 | util_set_vertex_buffers_mask(ctx->vertex_buffers, &ctx->vb_mask, buffers, start_slot, num_buffers); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2056 | } |
| 2057 | |
| 2058 | static void |
| 2059 | panfrost_set_constant_buffer( |
| 2060 | struct pipe_context *pctx, |
| 2061 | enum pipe_shader_type shader, uint index, |
| 2062 | const struct pipe_constant_buffer *buf) |
| 2063 | { |
| 2064 | struct panfrost_context *ctx = pan_context(pctx); |
| 2065 | struct panfrost_constant_buffer *pbuf = &ctx->constant_buffer[shader]; |
| 2066 | |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 2067 | util_copy_constant_buffer(&pbuf->cb[index], buf); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2068 | |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 2069 | unsigned mask = (1 << index); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2070 | |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 2071 | if (unlikely(!buf)) { |
| 2072 | pbuf->enabled_mask &= ~mask; |
| 2073 | pbuf->dirty_mask &= ~mask; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2074 | return; |
| 2075 | } |
| 2076 | |
Alyssa Rosenzweig | ca2caf0 | 2019-06-20 16:07:57 -0700 | [diff] [blame] | 2077 | pbuf->enabled_mask |= mask; |
| 2078 | pbuf->dirty_mask |= mask; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2079 | } |
| 2080 | |
| 2081 | static void |
| 2082 | panfrost_set_stencil_ref( |
| 2083 | struct pipe_context *pctx, |
| 2084 | const struct pipe_stencil_ref *ref) |
| 2085 | { |
| 2086 | struct panfrost_context *ctx = pan_context(pctx); |
| 2087 | ctx->stencil_ref = *ref; |
| 2088 | |
| 2089 | /* Shader core dirty */ |
| 2090 | ctx->dirty |= PAN_DIRTY_FS; |
| 2091 | } |
| 2092 | |
Alyssa Rosenzweig | 83c02a5 | 2019-06-17 14:26:08 -0700 | [diff] [blame] | 2093 | static enum mali_texture_type |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2094 | panfrost_translate_texture_type(enum pipe_texture_target t) { |
| 2095 | switch (t) |
| 2096 | { |
| 2097 | case PIPE_BUFFER: |
Alyssa Rosenzweig | 0ae72df | 2019-08-16 10:26:03 -0700 | [diff] [blame] | 2098 | case PIPE_TEXTURE_1D: |
| 2099 | case PIPE_TEXTURE_1D_ARRAY: |
| 2100 | return MALI_TEX_1D; |
Alyssa Rosenzweig | 83c02a5 | 2019-06-17 14:26:08 -0700 | [diff] [blame] | 2101 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2102 | case PIPE_TEXTURE_2D: |
| 2103 | case PIPE_TEXTURE_2D_ARRAY: |
| 2104 | case PIPE_TEXTURE_RECT: |
| 2105 | return MALI_TEX_2D; |
Alyssa Rosenzweig | 83c02a5 | 2019-06-17 14:26:08 -0700 | [diff] [blame] | 2106 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2107 | case PIPE_TEXTURE_3D: |
| 2108 | return MALI_TEX_3D; |
Alyssa Rosenzweig | 83c02a5 | 2019-06-17 14:26:08 -0700 | [diff] [blame] | 2109 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2110 | case PIPE_TEXTURE_CUBE: |
| 2111 | case PIPE_TEXTURE_CUBE_ARRAY: |
| 2112 | return MALI_TEX_CUBE; |
Alyssa Rosenzweig | 83c02a5 | 2019-06-17 14:26:08 -0700 | [diff] [blame] | 2113 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2114 | default: |
| 2115 | unreachable("Unknown target"); |
Alyssa Rosenzweig | 83c02a5 | 2019-06-17 14:26:08 -0700 | [diff] [blame] | 2116 | } |
| 2117 | } |
| 2118 | |
Icecream95 | 31bd3b5 | 2020-01-11 19:19:45 +1300 | [diff] [blame] | 2119 | static uint8_t |
| 2120 | panfrost_compute_astc_stretch( |
| 2121 | const struct util_format_description *desc) |
| 2122 | { |
| 2123 | unsigned width = desc->block.width; |
| 2124 | unsigned height = desc->block.height; |
| 2125 | assert(width >= 4 && width <= 12); |
| 2126 | assert(height >= 4 && height <= 12); |
| 2127 | if (width == 12) |
| 2128 | width = 11; |
| 2129 | if (height == 12) |
| 2130 | height = 11; |
| 2131 | return ((height - 4) * 8) + (width - 4); |
| 2132 | } |
| 2133 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2134 | static struct pipe_sampler_view * |
| 2135 | panfrost_create_sampler_view( |
| 2136 | struct pipe_context *pctx, |
| 2137 | struct pipe_resource *texture, |
| 2138 | const struct pipe_sampler_view *template) |
| 2139 | { |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2140 | struct panfrost_sampler_view *so = rzalloc(pctx, struct panfrost_sampler_view); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2141 | int bytes_per_pixel = util_format_get_blocksize(texture->format); |
| 2142 | |
| 2143 | pipe_reference(NULL, &texture->reference); |
| 2144 | |
| 2145 | struct panfrost_resource *prsrc = (struct panfrost_resource *) texture; |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2146 | assert(prsrc->bo); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2147 | |
| 2148 | so->base = *template; |
| 2149 | so->base.texture = texture; |
| 2150 | so->base.reference.count = 1; |
| 2151 | so->base.context = pctx; |
| 2152 | |
| 2153 | /* sampler_views correspond to texture descriptors, minus the texture |
| 2154 | * (data) itself. So, we serialise the descriptor here and cache it for |
| 2155 | * later. */ |
| 2156 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2157 | const struct util_format_description *desc = util_format_description(prsrc->base.format); |
| 2158 | |
| 2159 | unsigned char user_swizzle[4] = { |
| 2160 | template->swizzle_r, |
| 2161 | template->swizzle_g, |
| 2162 | template->swizzle_b, |
| 2163 | template->swizzle_a |
| 2164 | }; |
| 2165 | |
| 2166 | enum mali_format format = panfrost_find_format(desc); |
| 2167 | |
Icecream95 | 31bd3b5 | 2020-01-11 19:19:45 +1300 | [diff] [blame] | 2168 | if (format == MALI_ASTC_HDR_SUPP || format == MALI_ASTC_SRGB_SUPP) |
| 2169 | so->astc_stretch = panfrost_compute_astc_stretch(desc); |
| 2170 | |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2171 | /* Check if we need to set a custom stride by computing the "expected" |
| 2172 | * stride and comparing it to what the BO actually wants. Only applies |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2173 | * to linear textures, since tiled/compressed textures have strict |
| 2174 | * alignment requirements for their strides as it is */ |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2175 | |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2176 | unsigned first_level = template->u.tex.first_level; |
| 2177 | unsigned last_level = template->u.tex.last_level; |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2178 | |
Boris Brezillon | aa5bc35 | 2019-07-02 11:37:40 +0200 | [diff] [blame] | 2179 | if (prsrc->layout == PAN_LINEAR) { |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2180 | for (unsigned l = first_level; l <= last_level; ++l) { |
Boris Brezillon | aa5bc35 | 2019-07-02 11:37:40 +0200 | [diff] [blame] | 2181 | unsigned actual_stride = prsrc->slices[l].stride; |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2182 | unsigned width = u_minify(texture->width0, l); |
| 2183 | unsigned comp_stride = width * bytes_per_pixel; |
| 2184 | |
| 2185 | if (comp_stride != actual_stride) { |
Alyssa Rosenzweig | aaae618 | 2019-07-15 14:59:03 -0700 | [diff] [blame] | 2186 | so->manual_stride = true; |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2187 | break; |
| 2188 | } |
| 2189 | } |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2190 | } |
| 2191 | |
Alyssa Rosenzweig | 67a34ac | 2019-06-14 16:26:49 -0700 | [diff] [blame] | 2192 | /* In the hardware, array_size refers specifically to array textures, |
| 2193 | * whereas in Gallium, it also covers cubemaps */ |
| 2194 | |
| 2195 | unsigned array_size = texture->array_size; |
| 2196 | |
Alyssa Rosenzweig | 0ad17f5 | 2019-06-24 14:39:37 -0700 | [diff] [blame] | 2197 | if (template->target == PIPE_TEXTURE_CUBE) { |
Alyssa Rosenzweig | 67a34ac | 2019-06-14 16:26:49 -0700 | [diff] [blame] | 2198 | /* TODO: Cubemap arrays */ |
| 2199 | assert(array_size == 6); |
Alyssa Rosenzweig | eb3c097 | 2019-06-21 17:27:05 -0700 | [diff] [blame] | 2200 | array_size /= 6; |
Alyssa Rosenzweig | 67a34ac | 2019-06-14 16:26:49 -0700 | [diff] [blame] | 2201 | } |
| 2202 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2203 | struct mali_texture_descriptor texture_descriptor = { |
Alyssa Rosenzweig | 5317154 | 2019-06-12 15:07:09 -0700 | [diff] [blame] | 2204 | .width = MALI_POSITIVE(u_minify(texture->width0, first_level)), |
| 2205 | .height = MALI_POSITIVE(u_minify(texture->height0, first_level)), |
| 2206 | .depth = MALI_POSITIVE(u_minify(texture->depth0, first_level)), |
Alyssa Rosenzweig | 67a34ac | 2019-06-14 16:26:49 -0700 | [diff] [blame] | 2207 | .array_size = MALI_POSITIVE(array_size), |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2208 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2209 | .format = { |
| 2210 | .swizzle = panfrost_translate_swizzle_4(desc->swizzle), |
| 2211 | .format = format, |
Alyssa Rosenzweig | 58c34e4 | 2019-06-17 16:16:20 -0700 | [diff] [blame] | 2212 | .srgb = desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB, |
Alyssa Rosenzweig | 0ad17f5 | 2019-06-24 14:39:37 -0700 | [diff] [blame] | 2213 | .type = panfrost_translate_texture_type(template->target), |
Alyssa Rosenzweig | 9f15f4d | 2019-08-20 15:36:00 -0700 | [diff] [blame] | 2214 | .unknown2 = 0x1, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2215 | }, |
| 2216 | |
| 2217 | .swizzle = panfrost_translate_swizzle_4(user_swizzle) |
| 2218 | }; |
| 2219 | |
Alyssa Rosenzweig | 96f6b8a | 2019-08-20 15:24:18 -0700 | [diff] [blame] | 2220 | texture_descriptor.levels = last_level - first_level; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2221 | |
| 2222 | so->hw = texture_descriptor; |
| 2223 | |
| 2224 | return (struct pipe_sampler_view *) so; |
| 2225 | } |
| 2226 | |
| 2227 | static void |
| 2228 | panfrost_set_sampler_views( |
| 2229 | struct pipe_context *pctx, |
| 2230 | enum pipe_shader_type shader, |
| 2231 | unsigned start_slot, unsigned num_views, |
| 2232 | struct pipe_sampler_view **views) |
| 2233 | { |
| 2234 | struct panfrost_context *ctx = pan_context(pctx); |
Tomeu Vizoso | 5dfe412 | 2019-12-12 08:43:12 +0100 | [diff] [blame] | 2235 | unsigned new_nr = 0; |
| 2236 | unsigned i; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2237 | |
| 2238 | assert(start_slot == 0); |
| 2239 | |
Tomeu Vizoso | 5dfe412 | 2019-12-12 08:43:12 +0100 | [diff] [blame] | 2240 | for (i = 0; i < num_views; ++i) { |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 2241 | if (views[i]) |
| 2242 | new_nr = i + 1; |
Tomeu Vizoso | 5dfe412 | 2019-12-12 08:43:12 +0100 | [diff] [blame] | 2243 | pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i], |
| 2244 | views[i]); |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 2245 | } |
| 2246 | |
Tomeu Vizoso | 5dfe412 | 2019-12-12 08:43:12 +0100 | [diff] [blame] | 2247 | for (; i < ctx->sampler_view_count[shader]; i++) { |
| 2248 | pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i], |
| 2249 | NULL); |
| 2250 | } |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 2251 | ctx->sampler_view_count[shader] = new_nr; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2252 | |
| 2253 | ctx->dirty |= PAN_DIRTY_TEXTURES; |
| 2254 | } |
| 2255 | |
| 2256 | static void |
| 2257 | panfrost_sampler_view_destroy( |
| 2258 | struct pipe_context *pctx, |
Tomeu Vizoso | 9fe1a92 | 2019-05-23 10:09:33 +0200 | [diff] [blame] | 2259 | struct pipe_sampler_view *view) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2260 | { |
Tomeu Vizoso | 9fe1a92 | 2019-05-23 10:09:33 +0200 | [diff] [blame] | 2261 | pipe_resource_reference(&view->texture, NULL); |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2262 | ralloc_free(view); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2263 | } |
| 2264 | |
Alyssa Rosenzweig | 4e736b8 | 2019-08-01 10:31:35 -0700 | [diff] [blame] | 2265 | static void |
| 2266 | panfrost_set_shader_buffers( |
| 2267 | struct pipe_context *pctx, |
| 2268 | enum pipe_shader_type shader, |
| 2269 | unsigned start, unsigned count, |
| 2270 | const struct pipe_shader_buffer *buffers, |
| 2271 | unsigned writable_bitmask) |
| 2272 | { |
| 2273 | struct panfrost_context *ctx = pan_context(pctx); |
| 2274 | |
| 2275 | util_set_shader_buffers_mask(ctx->ssbo[shader], &ctx->ssbo_mask[shader], |
| 2276 | buffers, start, count); |
| 2277 | } |
| 2278 | |
Alyssa Rosenzweig | 5ad00fb | 2019-07-15 14:15:24 -0700 | [diff] [blame] | 2279 | /* Hints that a framebuffer should use AFBC where possible */ |
| 2280 | |
| 2281 | static void |
| 2282 | panfrost_hint_afbc( |
| 2283 | struct panfrost_screen *screen, |
| 2284 | const struct pipe_framebuffer_state *fb) |
| 2285 | { |
| 2286 | /* AFBC implemenation incomplete; hide it */ |
| 2287 | if (!(pan_debug & PAN_DBG_AFBC)) return; |
| 2288 | |
| 2289 | /* Hint AFBC to the resources bound to each color buffer */ |
| 2290 | |
| 2291 | for (unsigned i = 0; i < fb->nr_cbufs; ++i) { |
| 2292 | struct pipe_surface *surf = fb->cbufs[i]; |
| 2293 | struct panfrost_resource *rsrc = pan_resource(surf->texture); |
| 2294 | panfrost_resource_hint_layout(screen, rsrc, PAN_AFBC, 1); |
| 2295 | } |
| 2296 | |
| 2297 | /* Also hint it to the depth buffer */ |
| 2298 | |
| 2299 | if (fb->zsbuf) { |
| 2300 | struct panfrost_resource *rsrc = pan_resource(fb->zsbuf->texture); |
| 2301 | panfrost_resource_hint_layout(screen, rsrc, PAN_AFBC, 1); |
| 2302 | } |
| 2303 | } |
| 2304 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2305 | static void |
| 2306 | panfrost_set_framebuffer_state(struct pipe_context *pctx, |
| 2307 | const struct pipe_framebuffer_state *fb) |
| 2308 | { |
| 2309 | struct panfrost_context *ctx = pan_context(pctx); |
| 2310 | |
Boris Brezillon | 1ac33aa | 2019-09-15 20:33:13 +0200 | [diff] [blame] | 2311 | panfrost_hint_afbc(pan_screen(pctx->screen), fb); |
Alyssa Rosenzweig | 629c736 | 2019-07-18 11:05:01 -0700 | [diff] [blame] | 2312 | util_copy_framebuffer_state(&ctx->pipe_framebuffer, fb); |
Boris Brezillon | 1ac33aa | 2019-09-15 20:33:13 +0200 | [diff] [blame] | 2313 | ctx->batch = NULL; |
| 2314 | panfrost_invalidate_frame(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2315 | } |
| 2316 | |
| 2317 | static void * |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2318 | panfrost_create_depth_stencil_state(struct pipe_context *pipe, |
| 2319 | const struct pipe_depth_stencil_alpha_state *depth_stencil) |
| 2320 | { |
| 2321 | return mem_dup(depth_stencil, sizeof(*depth_stencil)); |
| 2322 | } |
| 2323 | |
| 2324 | static void |
| 2325 | panfrost_bind_depth_stencil_state(struct pipe_context *pipe, |
| 2326 | void *cso) |
| 2327 | { |
| 2328 | struct panfrost_context *ctx = pan_context(pipe); |
| 2329 | struct pipe_depth_stencil_alpha_state *depth_stencil = cso; |
| 2330 | ctx->depth_stencil = depth_stencil; |
| 2331 | |
| 2332 | if (!depth_stencil) |
| 2333 | return; |
| 2334 | |
| 2335 | /* Alpha does not exist in the hardware (it's not in ES3), so it's |
| 2336 | * emulated in the fragment shader */ |
| 2337 | |
| 2338 | if (depth_stencil->alpha.enabled) { |
| 2339 | /* We need to trigger a new shader (maybe) */ |
Alyssa Rosenzweig | ac6aa93 | 2019-07-31 14:13:30 -0700 | [diff] [blame] | 2340 | ctx->base.bind_fs_state(&ctx->base, ctx->shader[PIPE_SHADER_FRAGMENT]); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2341 | } |
| 2342 | |
| 2343 | /* Stencil state */ |
Alyssa Rosenzweig | 65d8909 | 2019-07-17 15:42:48 -0700 | [diff] [blame] | 2344 | SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_STENCIL_TEST, depth_stencil->stencil[0].enabled); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2345 | |
| 2346 | panfrost_make_stencil_state(&depth_stencil->stencil[0], &ctx->fragment_shader_core.stencil_front); |
| 2347 | ctx->fragment_shader_core.stencil_mask_front = depth_stencil->stencil[0].writemask; |
| 2348 | |
Alyssa Rosenzweig | 65d8909 | 2019-07-17 15:42:48 -0700 | [diff] [blame] | 2349 | /* If back-stencil is not enabled, use the front values */ |
| 2350 | bool back_enab = ctx->depth_stencil->stencil[1].enabled; |
| 2351 | unsigned back_index = back_enab ? 1 : 0; |
| 2352 | |
| 2353 | panfrost_make_stencil_state(&depth_stencil->stencil[back_index], &ctx->fragment_shader_core.stencil_back); |
| 2354 | ctx->fragment_shader_core.stencil_mask_back = depth_stencil->stencil[back_index].writemask; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2355 | |
| 2356 | /* Depth state (TODO: Refactor) */ |
Boris Brezillon | 2844082 | 2019-11-04 11:57:22 +0100 | [diff] [blame] | 2357 | SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_DEPTH_WRITEMASK, |
| 2358 | depth_stencil->depth.writemask); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2359 | |
| 2360 | int func = depth_stencil->depth.enabled ? depth_stencil->depth.func : PIPE_FUNC_ALWAYS; |
| 2361 | |
| 2362 | ctx->fragment_shader_core.unknown2_3 &= ~MALI_DEPTH_FUNC_MASK; |
| 2363 | ctx->fragment_shader_core.unknown2_3 |= MALI_DEPTH_FUNC(panfrost_translate_compare_func(func)); |
| 2364 | |
| 2365 | /* Bounds test not implemented */ |
| 2366 | assert(!depth_stencil->depth.bounds_test); |
| 2367 | |
| 2368 | ctx->dirty |= PAN_DIRTY_FS; |
| 2369 | } |
| 2370 | |
| 2371 | static void |
| 2372 | panfrost_delete_depth_stencil_state(struct pipe_context *pipe, void *depth) |
| 2373 | { |
| 2374 | free( depth ); |
| 2375 | } |
| 2376 | |
| 2377 | static void |
| 2378 | panfrost_set_sample_mask(struct pipe_context *pipe, |
| 2379 | unsigned sample_mask) |
| 2380 | { |
| 2381 | } |
| 2382 | |
| 2383 | static void |
| 2384 | panfrost_set_clip_state(struct pipe_context *pipe, |
| 2385 | const struct pipe_clip_state *clip) |
| 2386 | { |
| 2387 | //struct panfrost_context *panfrost = pan_context(pipe); |
| 2388 | } |
| 2389 | |
| 2390 | static void |
| 2391 | panfrost_set_viewport_states(struct pipe_context *pipe, |
| 2392 | unsigned start_slot, |
| 2393 | unsigned num_viewports, |
| 2394 | const struct pipe_viewport_state *viewports) |
| 2395 | { |
| 2396 | struct panfrost_context *ctx = pan_context(pipe); |
| 2397 | |
| 2398 | assert(start_slot == 0); |
| 2399 | assert(num_viewports == 1); |
| 2400 | |
| 2401 | ctx->pipe_viewport = *viewports; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2402 | } |
| 2403 | |
| 2404 | static void |
| 2405 | panfrost_set_scissor_states(struct pipe_context *pipe, |
| 2406 | unsigned start_slot, |
| 2407 | unsigned num_scissors, |
| 2408 | const struct pipe_scissor_state *scissors) |
| 2409 | { |
| 2410 | struct panfrost_context *ctx = pan_context(pipe); |
| 2411 | |
| 2412 | assert(start_slot == 0); |
| 2413 | assert(num_scissors == 1); |
| 2414 | |
| 2415 | ctx->scissor = *scissors; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2416 | } |
| 2417 | |
| 2418 | static void |
| 2419 | panfrost_set_polygon_stipple(struct pipe_context *pipe, |
| 2420 | const struct pipe_poly_stipple *stipple) |
| 2421 | { |
| 2422 | //struct panfrost_context *panfrost = pan_context(pipe); |
| 2423 | } |
| 2424 | |
| 2425 | static void |
| 2426 | panfrost_set_active_query_state(struct pipe_context *pipe, |
Ilia Mirkin | 0e30c6b | 2019-07-04 11:41:41 -0400 | [diff] [blame] | 2427 | bool enable) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2428 | { |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2429 | struct panfrost_context *ctx = pan_context(pipe); |
| 2430 | ctx->active_queries = enable; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2431 | } |
| 2432 | |
| 2433 | static void |
| 2434 | panfrost_destroy(struct pipe_context *pipe) |
| 2435 | { |
| 2436 | struct panfrost_context *panfrost = pan_context(pipe); |
| 2437 | |
| 2438 | if (panfrost->blitter) |
| 2439 | util_blitter_destroy(panfrost->blitter); |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2440 | |
Alyssa Rosenzweig | 7005c0d | 2019-06-23 11:05:10 -0700 | [diff] [blame] | 2441 | if (panfrost->blitter_wallpaper) |
| 2442 | util_blitter_destroy(panfrost->blitter_wallpaper); |
| 2443 | |
Boris Brezillon | b60ed3c | 2019-11-06 15:52:45 +0100 | [diff] [blame] | 2444 | util_unreference_framebuffer_state(&panfrost->pipe_framebuffer); |
Boris Brezillon | 8c8e4fd | 2019-11-06 15:49:43 +0100 | [diff] [blame] | 2445 | u_upload_destroy(pipe->stream_uploader); |
| 2446 | |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2447 | ralloc_free(pipe); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2448 | } |
| 2449 | |
| 2450 | static struct pipe_query * |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2451 | panfrost_create_query(struct pipe_context *pipe, |
| 2452 | unsigned type, |
| 2453 | unsigned index) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2454 | { |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2455 | struct panfrost_query *q = rzalloc(pipe, struct panfrost_query); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2456 | |
| 2457 | q->type = type; |
| 2458 | q->index = index; |
| 2459 | |
| 2460 | return (struct pipe_query *) q; |
| 2461 | } |
| 2462 | |
| 2463 | static void |
| 2464 | panfrost_destroy_query(struct pipe_context *pipe, struct pipe_query *q) |
| 2465 | { |
Urja Rannikko | dff99ce | 2019-10-22 12:05:07 +0000 | [diff] [blame] | 2466 | struct panfrost_query *query = (struct panfrost_query *) q; |
| 2467 | |
| 2468 | if (query->bo) { |
| 2469 | panfrost_bo_unreference(query->bo); |
| 2470 | query->bo = NULL; |
| 2471 | } |
| 2472 | |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2473 | ralloc_free(q); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2474 | } |
| 2475 | |
Ilia Mirkin | 0e30c6b | 2019-07-04 11:41:41 -0400 | [diff] [blame] | 2476 | static bool |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2477 | panfrost_begin_query(struct pipe_context *pipe, struct pipe_query *q) |
| 2478 | { |
| 2479 | struct panfrost_context *ctx = pan_context(pipe); |
| 2480 | struct panfrost_query *query = (struct panfrost_query *) q; |
| 2481 | |
| 2482 | switch (query->type) { |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2483 | case PIPE_QUERY_OCCLUSION_COUNTER: |
| 2484 | case PIPE_QUERY_OCCLUSION_PREDICATE: |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2485 | case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: |
Urja Rannikko | dff99ce | 2019-10-22 12:05:07 +0000 | [diff] [blame] | 2486 | /* Allocate a bo for the query results to be stored */ |
| 2487 | if (!query->bo) { |
| 2488 | query->bo = panfrost_bo_create( |
| 2489 | pan_screen(ctx->base.screen), |
| 2490 | sizeof(unsigned), 0); |
| 2491 | } |
| 2492 | |
| 2493 | unsigned *result = (unsigned *)query->bo->cpu; |
| 2494 | *result = 0; /* Default to 0 if nothing at all drawn. */ |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2495 | ctx->occlusion_query = query; |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2496 | break; |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2497 | |
| 2498 | /* Geometry statistics are computed in the driver. XXX: geom/tess |
| 2499 | * shaders.. */ |
| 2500 | |
| 2501 | case PIPE_QUERY_PRIMITIVES_GENERATED: |
| 2502 | query->start = ctx->prims_generated; |
| 2503 | break; |
| 2504 | case PIPE_QUERY_PRIMITIVES_EMITTED: |
| 2505 | query->start = ctx->tf_prims_generated; |
| 2506 | break; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2507 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2508 | default: |
Alyssa Rosenzweig | 42f0aae | 2019-08-30 17:37:22 -0700 | [diff] [blame] | 2509 | fprintf(stderr, "Skipping query %u\n", query->type); |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2510 | break; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2511 | } |
| 2512 | |
| 2513 | return true; |
| 2514 | } |
| 2515 | |
| 2516 | static bool |
| 2517 | panfrost_end_query(struct pipe_context *pipe, struct pipe_query *q) |
| 2518 | { |
| 2519 | struct panfrost_context *ctx = pan_context(pipe); |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2520 | struct panfrost_query *query = (struct panfrost_query *) q; |
| 2521 | |
| 2522 | switch (query->type) { |
| 2523 | case PIPE_QUERY_OCCLUSION_COUNTER: |
| 2524 | case PIPE_QUERY_OCCLUSION_PREDICATE: |
| 2525 | case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: |
| 2526 | ctx->occlusion_query = NULL; |
| 2527 | break; |
| 2528 | case PIPE_QUERY_PRIMITIVES_GENERATED: |
| 2529 | query->end = ctx->prims_generated; |
| 2530 | break; |
| 2531 | case PIPE_QUERY_PRIMITIVES_EMITTED: |
| 2532 | query->end = ctx->tf_prims_generated; |
| 2533 | break; |
| 2534 | } |
| 2535 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2536 | return true; |
| 2537 | } |
| 2538 | |
Ilia Mirkin | 0e30c6b | 2019-07-04 11:41:41 -0400 | [diff] [blame] | 2539 | static bool |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2540 | panfrost_get_query_result(struct pipe_context *pipe, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2541 | struct pipe_query *q, |
Ilia Mirkin | 0e30c6b | 2019-07-04 11:41:41 -0400 | [diff] [blame] | 2542 | bool wait, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2543 | union pipe_query_result *vresult) |
| 2544 | { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2545 | struct panfrost_query *query = (struct panfrost_query *) q; |
Boris Brezillon | a45984b | 2019-09-15 19:15:16 +0200 | [diff] [blame] | 2546 | struct panfrost_context *ctx = pan_context(pipe); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2547 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2548 | |
| 2549 | switch (query->type) { |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2550 | case PIPE_QUERY_OCCLUSION_COUNTER: |
| 2551 | case PIPE_QUERY_OCCLUSION_PREDICATE: |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2552 | case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: |
| 2553 | /* Flush first */ |
Boris Brezillon | a45984b | 2019-09-15 19:15:16 +0200 | [diff] [blame] | 2554 | panfrost_flush_all_batches(ctx, true); |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2555 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2556 | /* Read back the query results */ |
Urja Rannikko | dff99ce | 2019-10-22 12:05:07 +0000 | [diff] [blame] | 2557 | unsigned *result = (unsigned *) query->bo->cpu; |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2558 | unsigned passed = *result; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2559 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2560 | if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) { |
| 2561 | vresult->u64 = passed; |
| 2562 | } else { |
| 2563 | vresult->b = !!passed; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2564 | } |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2565 | |
| 2566 | break; |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2567 | |
| 2568 | case PIPE_QUERY_PRIMITIVES_GENERATED: |
| 2569 | case PIPE_QUERY_PRIMITIVES_EMITTED: |
Boris Brezillon | a45984b | 2019-09-15 19:15:16 +0200 | [diff] [blame] | 2570 | panfrost_flush_all_batches(ctx, true); |
Alyssa Rosenzweig | 7c224c1 | 2019-08-08 07:01:12 -0700 | [diff] [blame] | 2571 | vresult->u64 = query->end - query->start; |
| 2572 | break; |
| 2573 | |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2574 | default: |
Alyssa Rosenzweig | 42f0aae | 2019-08-30 17:37:22 -0700 | [diff] [blame] | 2575 | DBG("Skipped query get %u\n", query->type); |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2576 | break; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2577 | } |
| 2578 | |
| 2579 | return true; |
| 2580 | } |
| 2581 | |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2582 | static struct pipe_stream_output_target * |
| 2583 | panfrost_create_stream_output_target(struct pipe_context *pctx, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2584 | struct pipe_resource *prsc, |
| 2585 | unsigned buffer_offset, |
| 2586 | unsigned buffer_size) |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2587 | { |
| 2588 | struct pipe_stream_output_target *target; |
| 2589 | |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2590 | target = rzalloc(pctx, struct pipe_stream_output_target); |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2591 | |
| 2592 | if (!target) |
| 2593 | return NULL; |
| 2594 | |
| 2595 | pipe_reference_init(&target->reference, 1); |
| 2596 | pipe_resource_reference(&target->buffer, prsc); |
| 2597 | |
| 2598 | target->context = pctx; |
| 2599 | target->buffer_offset = buffer_offset; |
| 2600 | target->buffer_size = buffer_size; |
| 2601 | |
| 2602 | return target; |
| 2603 | } |
| 2604 | |
| 2605 | static void |
| 2606 | panfrost_stream_output_target_destroy(struct pipe_context *pctx, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2607 | struct pipe_stream_output_target *target) |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2608 | { |
| 2609 | pipe_resource_reference(&target->buffer, NULL); |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2610 | ralloc_free(target); |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2611 | } |
| 2612 | |
| 2613 | static void |
| 2614 | panfrost_set_stream_output_targets(struct pipe_context *pctx, |
Alyssa Rosenzweig | a2d0ea9 | 2019-07-10 10:10:31 -0700 | [diff] [blame] | 2615 | unsigned num_targets, |
| 2616 | struct pipe_stream_output_target **targets, |
| 2617 | const unsigned *offsets) |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2618 | { |
Alyssa Rosenzweig | 5ff7973 | 2019-08-06 16:43:28 -0700 | [diff] [blame] | 2619 | struct panfrost_context *ctx = pan_context(pctx); |
| 2620 | struct panfrost_streamout *so = &ctx->streamout; |
| 2621 | |
| 2622 | assert(num_targets <= ARRAY_SIZE(so->targets)); |
| 2623 | |
| 2624 | for (unsigned i = 0; i < num_targets; i++) { |
| 2625 | if (offsets[i] != -1) |
| 2626 | so->offsets[i] = offsets[i]; |
| 2627 | |
| 2628 | pipe_so_target_reference(&so->targets[i], targets[i]); |
| 2629 | } |
| 2630 | |
| 2631 | for (unsigned i = 0; i < so->num_targets; i++) |
| 2632 | pipe_so_target_reference(&so->targets[i], NULL); |
| 2633 | |
| 2634 | so->num_targets = num_targets; |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2635 | } |
| 2636 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2637 | struct pipe_context * |
| 2638 | panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags) |
| 2639 | { |
Tomeu Vizoso | 0fcf73b | 2019-06-18 14:24:57 +0200 | [diff] [blame] | 2640 | struct panfrost_context *ctx = rzalloc(screen, struct panfrost_context); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2641 | struct pipe_context *gallium = (struct pipe_context *) ctx; |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2642 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2643 | gallium->screen = screen; |
| 2644 | |
| 2645 | gallium->destroy = panfrost_destroy; |
| 2646 | |
| 2647 | gallium->set_framebuffer_state = panfrost_set_framebuffer_state; |
| 2648 | |
| 2649 | gallium->flush = panfrost_flush; |
| 2650 | gallium->clear = panfrost_clear; |
| 2651 | gallium->draw_vbo = panfrost_draw_vbo; |
| 2652 | |
| 2653 | gallium->set_vertex_buffers = panfrost_set_vertex_buffers; |
| 2654 | gallium->set_constant_buffer = panfrost_set_constant_buffer; |
Alyssa Rosenzweig | 4e736b8 | 2019-08-01 10:31:35 -0700 | [diff] [blame] | 2655 | gallium->set_shader_buffers = panfrost_set_shader_buffers; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2656 | |
| 2657 | gallium->set_stencil_ref = panfrost_set_stencil_ref; |
| 2658 | |
| 2659 | gallium->create_sampler_view = panfrost_create_sampler_view; |
| 2660 | gallium->set_sampler_views = panfrost_set_sampler_views; |
| 2661 | gallium->sampler_view_destroy = panfrost_sampler_view_destroy; |
| 2662 | |
| 2663 | gallium->create_rasterizer_state = panfrost_create_rasterizer_state; |
| 2664 | gallium->bind_rasterizer_state = panfrost_bind_rasterizer_state; |
| 2665 | gallium->delete_rasterizer_state = panfrost_generic_cso_delete; |
| 2666 | |
| 2667 | gallium->create_vertex_elements_state = panfrost_create_vertex_elements_state; |
| 2668 | gallium->bind_vertex_elements_state = panfrost_bind_vertex_elements_state; |
Alyssa Rosenzweig | 81d3262 | 2019-05-17 00:14:49 +0000 | [diff] [blame] | 2669 | gallium->delete_vertex_elements_state = panfrost_generic_cso_delete; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2670 | |
Alyssa Rosenzweig | 271726e | 2019-12-13 15:13:02 -0500 | [diff] [blame] | 2671 | gallium->create_fs_state = panfrost_create_fs_state; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2672 | gallium->delete_fs_state = panfrost_delete_shader_state; |
| 2673 | gallium->bind_fs_state = panfrost_bind_fs_state; |
| 2674 | |
Alyssa Rosenzweig | 271726e | 2019-12-13 15:13:02 -0500 | [diff] [blame] | 2675 | gallium->create_vs_state = panfrost_create_vs_state; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2676 | gallium->delete_vs_state = panfrost_delete_shader_state; |
| 2677 | gallium->bind_vs_state = panfrost_bind_vs_state; |
| 2678 | |
| 2679 | gallium->create_sampler_state = panfrost_create_sampler_state; |
| 2680 | gallium->delete_sampler_state = panfrost_generic_cso_delete; |
| 2681 | gallium->bind_sampler_states = panfrost_bind_sampler_states; |
| 2682 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2683 | gallium->create_depth_stencil_alpha_state = panfrost_create_depth_stencil_state; |
| 2684 | gallium->bind_depth_stencil_alpha_state = panfrost_bind_depth_stencil_state; |
| 2685 | gallium->delete_depth_stencil_alpha_state = panfrost_delete_depth_stencil_state; |
| 2686 | |
| 2687 | gallium->set_sample_mask = panfrost_set_sample_mask; |
| 2688 | |
| 2689 | gallium->set_clip_state = panfrost_set_clip_state; |
| 2690 | gallium->set_viewport_states = panfrost_set_viewport_states; |
| 2691 | gallium->set_scissor_states = panfrost_set_scissor_states; |
| 2692 | gallium->set_polygon_stipple = panfrost_set_polygon_stipple; |
| 2693 | gallium->set_active_query_state = panfrost_set_active_query_state; |
| 2694 | |
| 2695 | gallium->create_query = panfrost_create_query; |
| 2696 | gallium->destroy_query = panfrost_destroy_query; |
| 2697 | gallium->begin_query = panfrost_begin_query; |
| 2698 | gallium->end_query = panfrost_end_query; |
| 2699 | gallium->get_query_result = panfrost_get_query_result; |
| 2700 | |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2701 | gallium->create_stream_output_target = panfrost_create_stream_output_target; |
| 2702 | gallium->stream_output_target_destroy = panfrost_stream_output_target_destroy; |
| 2703 | gallium->set_stream_output_targets = panfrost_set_stream_output_targets; |
| 2704 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2705 | panfrost_resource_context_init(gallium); |
Alyssa Rosenzweig | 46396af | 2019-07-05 15:40:08 -0700 | [diff] [blame] | 2706 | panfrost_blend_context_init(gallium); |
Alyssa Rosenzweig | a8fc40a | 2019-07-23 08:28:23 -0700 | [diff] [blame] | 2707 | panfrost_compute_context_init(gallium); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2708 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2709 | /* XXX: leaks */ |
| 2710 | gallium->stream_uploader = u_upload_create_default(gallium); |
| 2711 | gallium->const_uploader = gallium->stream_uploader; |
| 2712 | assert(gallium->stream_uploader); |
| 2713 | |
Alyssa Rosenzweig | 85e2bb5 | 2019-02-08 02:28:12 +0000 | [diff] [blame] | 2714 | /* Midgard supports ES modes, plus QUADS/QUAD_STRIPS/POLYGON */ |
| 2715 | ctx->draw_modes = (1 << (PIPE_PRIM_POLYGON + 1)) - 1; |
| 2716 | |
| 2717 | ctx->primconvert = util_primconvert_create(gallium, ctx->draw_modes); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2718 | |
| 2719 | ctx->blitter = util_blitter_create(gallium); |
Alyssa Rosenzweig | 7005c0d | 2019-06-23 11:05:10 -0700 | [diff] [blame] | 2720 | ctx->blitter_wallpaper = util_blitter_create(gallium); |
| 2721 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2722 | assert(ctx->blitter); |
Alyssa Rosenzweig | 7005c0d | 2019-06-23 11:05:10 -0700 | [diff] [blame] | 2723 | assert(ctx->blitter_wallpaper); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2724 | |
| 2725 | /* Prepare for render! */ |
| 2726 | |
Boris Brezillon | 2c52699 | 2019-09-05 21:41:26 +0200 | [diff] [blame] | 2727 | panfrost_batch_init(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2728 | panfrost_emit_vertex_payload(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2729 | panfrost_invalidate_frame(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2730 | panfrost_default_shader_backend(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2731 | |
| 2732 | return gallium; |
| 2733 | } |