blob: 8570150ecc273f2e03fa77c78be8a3a79051eea1 [file] [log] [blame]
Gurchetan Singhd6b8b032017-05-31 14:31:31 -07001/*
2 * Copyright 2016 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Roman Stratiienko142dd9c2020-12-14 17:34:09 +02007#include "../../helpers.h"
Gurchetan Singhbc4f0232019-06-27 20:05:54 -07008#include "../../util.h"
Gurchetan Singhd6b8b032017-05-31 14:31:31 -07009#include "../cros_gralloc_driver.h"
10
Tomasz Mikolajewskica2938a2017-11-17 20:30:56 +090011#include <cassert>
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070012#include <hardware/gralloc.h>
13#include <memory.h>
14
15struct gralloc0_module {
16 gralloc_module_t base;
17 std::unique_ptr<alloc_device_t> alloc;
Yiwei Zhang61f97522021-07-01 20:43:04 +000018 cros_gralloc_driver *driver;
Gurchetan Singhbcfd7582017-08-01 15:02:24 -070019 bool initialized;
20 std::mutex initialization_mutex;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070021};
22
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -070023struct cros_gralloc0_buffer_info {
24 uint32_t drm_fourcc;
25 int num_fds;
26 int fds[4];
27 uint64_t modifier;
28 uint32_t offset[4];
29 uint32_t stride[4];
30};
31
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070032/* This enumeration must match the one in <gralloc_drm.h>.
33 * The functions supported by this gralloc's temporary private API are listed
34 * below. Use of these functions is highly discouraged and should only be
35 * reserved for cases where no alternative to get same information (such as
36 * querying ANativeWindow) exists.
37 */
38// clang-format off
39enum {
40 GRALLOC_DRM_GET_STRIDE,
41 GRALLOC_DRM_GET_FORMAT,
42 GRALLOC_DRM_GET_DIMENSIONS,
43 GRALLOC_DRM_GET_BACKING_STORE,
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -070044 GRALLOC_DRM_GET_BUFFER_INFO,
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +000045 GRALLOC_DRM_GET_USAGE,
46};
47
48/* This enumeration corresponds to the GRALLOC_DRM_GET_USAGE query op, which
49 * defines a set of bit flags used by the client to query vendor usage bits.
50 *
51 * Here is the common flow:
52 * 1) EGL/Vulkan calls GRALLOC_DRM_GET_USAGE to append one or multiple vendor
53 * usage bits to the existing usage and sets onto the ANativeWindow.
54 * 2) Some implicit GL draw cmd or the explicit vkCreateSwapchainKHR kicks off
55 * the next dequeueBuffer on the ANativeWindow with the combined usage.
56 * 3) dequeueBuffer then asks gralloc hal for an allocation/re-allocation, and
57 * calls into the below `gralloc0_alloc(...)` api.
58 */
59enum {
60 GRALLOC_DRM_GET_USAGE_FRONT_RENDERING_BIT = 0x00000001,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070061};
62// clang-format on
63
David Stevens6116b312019-09-03 10:49:50 +090064// Gralloc0 doesn't define a video decoder flag. However, the IAllocator gralloc0
65// passthrough gives the low 32-bits of the BufferUsage flags to gralloc0 in their
66// entirety, so we can detect the video decoder flag passed by IAllocator clients.
67#define BUFFER_USAGE_VIDEO_DECODER (1 << 22)
68
Yiwei Zhangbb9d4af2021-06-20 19:23:38 +000069// Gralloc0 doesn't define the BufferUsage::GPU_DATA_BUFFER flag. Define here to
70// align accordingly since AHardwareBuffer and Vulkan interop requires gralloc
71// to support allocating with AHARDWAREBUFFER_USAGE_GPU_DATA_BUFFER.
72#define BUFFER_USAGE_GPU_DATA_BUFFER (1 << 24)
73
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +000074// Reserve the GRALLOC_USAGE_PRIVATE_0 bit for buffers used for front rendering.
75// minigbm backend later decides to use BO_USE_FRONT_RENDERING or BO_USE_LINEAR
76// upon buffer allocaton.
77#define BUFFER_USAGE_FRONT_RENDERING GRALLOC_USAGE_PRIVATE_0
78
Gurchetan Singha1892b22017-09-28 16:40:52 -070079static uint64_t gralloc0_convert_usage(int usage)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070080{
Gurchetan Singha1892b22017-09-28 16:40:52 -070081 uint64_t use_flags = BO_USE_NONE;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070082
Gurchetan Singha1892b22017-09-28 16:40:52 -070083 if (usage & GRALLOC_USAGE_CURSOR)
84 use_flags |= BO_USE_NONE;
85 if ((usage & GRALLOC_USAGE_SW_READ_MASK) == GRALLOC_USAGE_SW_READ_RARELY)
86 use_flags |= BO_USE_SW_READ_RARELY;
87 if ((usage & GRALLOC_USAGE_SW_READ_MASK) == GRALLOC_USAGE_SW_READ_OFTEN)
88 use_flags |= BO_USE_SW_READ_OFTEN;
89 if ((usage & GRALLOC_USAGE_SW_WRITE_MASK) == GRALLOC_USAGE_SW_WRITE_RARELY)
90 use_flags |= BO_USE_SW_WRITE_RARELY;
91 if ((usage & GRALLOC_USAGE_SW_WRITE_MASK) == GRALLOC_USAGE_SW_WRITE_OFTEN)
92 use_flags |= BO_USE_SW_WRITE_OFTEN;
93 if (usage & GRALLOC_USAGE_HW_TEXTURE)
94 use_flags |= BO_USE_TEXTURE;
95 if (usage & GRALLOC_USAGE_HW_RENDER)
96 use_flags |= BO_USE_RENDERING;
97 if (usage & GRALLOC_USAGE_HW_2D)
98 use_flags |= BO_USE_RENDERING;
99 if (usage & GRALLOC_USAGE_HW_COMPOSER)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700100 /* HWC wants to use display hardware, but can defer to OpenGL. */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700101 use_flags |= BO_USE_SCANOUT | BO_USE_TEXTURE;
102 if (usage & GRALLOC_USAGE_HW_FB)
103 use_flags |= BO_USE_NONE;
104 if (usage & GRALLOC_USAGE_EXTERNAL_DISP)
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700105 /*
106 * This flag potentially covers external display for the normal drivers (i915,
107 * rockchip) and usb monitors (evdi/udl). It's complicated so ignore it.
108 * */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700109 use_flags |= BO_USE_NONE;
Gurchetan Singhb7edf5d2020-10-16 10:28:04 -0700110 /* Map this flag to linear until real HW protection is available on Android. */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700111 if (usage & GRALLOC_USAGE_PROTECTED)
Gurchetan Singhb7edf5d2020-10-16 10:28:04 -0700112 use_flags |= BO_USE_LINEAR;
Hirokazu Honda5e55f952019-11-08 12:57:55 +0900113 if (usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) {
114 use_flags |= BO_USE_HW_VIDEO_ENCODER;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700115 /*HACK: See b/30054495 */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700116 use_flags |= BO_USE_SW_READ_OFTEN;
Hirokazu Honda5e55f952019-11-08 12:57:55 +0900117 }
Gurchetan Singha1892b22017-09-28 16:40:52 -0700118 if (usage & GRALLOC_USAGE_HW_CAMERA_WRITE)
119 use_flags |= BO_USE_CAMERA_WRITE;
120 if (usage & GRALLOC_USAGE_HW_CAMERA_READ)
121 use_flags |= BO_USE_CAMERA_READ;
122 if (usage & GRALLOC_USAGE_RENDERSCRIPT)
123 use_flags |= BO_USE_RENDERSCRIPT;
David Stevens6116b312019-09-03 10:49:50 +0900124 if (usage & BUFFER_USAGE_VIDEO_DECODER)
125 use_flags |= BO_USE_HW_VIDEO_DECODER;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000126 if (usage & BUFFER_USAGE_FRONT_RENDERING)
127 use_flags |= BO_USE_FRONT_RENDERING;
Yiwei Zhangbb9d4af2021-06-20 19:23:38 +0000128 if (usage & BUFFER_USAGE_GPU_DATA_BUFFER)
129 use_flags |= BO_USE_GPU_DATA_BUFFER;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700130
Gurchetan Singha1892b22017-09-28 16:40:52 -0700131 return use_flags;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700132}
133
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700134static uint32_t gralloc0_convert_map_usage(int map_usage)
135{
136 uint32_t map_flags = BO_MAP_NONE;
137
138 if (map_usage & GRALLOC_USAGE_SW_READ_MASK)
139 map_flags |= BO_MAP_READ;
140 if (map_usage & GRALLOC_USAGE_SW_WRITE_MASK)
141 map_flags |= BO_MAP_WRITE;
142
143 return map_flags;
144}
145
Hirokazu Honda758cf122019-12-03 11:01:59 +0900146static int gralloc0_droid_yuv_format(int droid_format)
147{
148
149 return (droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888 ||
150 droid_format == HAL_PIXEL_FORMAT_YV12);
151}
152
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700153static int gralloc0_alloc(alloc_device_t *dev, int w, int h, int format, int usage,
154 buffer_handle_t *handle, int *stride)
155{
156 int32_t ret;
157 bool supported;
158 struct cros_gralloc_buffer_descriptor descriptor;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700159 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700160
161 descriptor.width = w;
162 descriptor.height = h;
163 descriptor.droid_format = format;
Jason Macnak1de7f662020-01-24 15:05:57 -0800164 descriptor.droid_usage = usage;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700165 descriptor.drm_format = cros_gralloc_convert_format(format);
Gurchetan Singha1892b22017-09-28 16:40:52 -0700166 descriptor.use_flags = gralloc0_convert_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800167 descriptor.reserved_region_size = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700168
169 supported = mod->driver->is_supported(&descriptor);
170 if (!supported && (usage & GRALLOC_USAGE_HW_COMPOSER)) {
Gurchetan Singha1892b22017-09-28 16:40:52 -0700171 descriptor.use_flags &= ~BO_USE_SCANOUT;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700172 supported = mod->driver->is_supported(&descriptor);
173 }
Hirokazu Honda758cf122019-12-03 11:01:59 +0900174 if (!supported && (usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) &&
David Stevens150b4962020-12-14 10:43:32 +0900175 format != HAL_PIXEL_FORMAT_YCbCr_420_888) {
176 // Unmask BO_USE_HW_VIDEO_ENCODER for other formats. They are mostly
177 // intermediate formats not passed directly to the encoder (e.g.
178 // camera). YV12 is passed to the encoder component, but it is converted
179 // to YCbCr_420_888 before being passed to the hw encoder.
Hirokazu Honda758cf122019-12-03 11:01:59 +0900180 descriptor.use_flags &= ~BO_USE_HW_VIDEO_ENCODER;
David Stevens150b4962020-12-14 10:43:32 +0900181 drv_log("Retrying format %u allocation without encoder flag", format);
Hirokazu Honda758cf122019-12-03 11:01:59 +0900182 supported = mod->driver->is_supported(&descriptor);
183 }
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000184 if (!supported && (usage & BUFFER_USAGE_FRONT_RENDERING)) {
185 descriptor.use_flags &= ~BO_USE_FRONT_RENDERING;
186 descriptor.use_flags |= BO_USE_LINEAR;
187 supported = mod->driver->is_supported(&descriptor);
188 }
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700189
190 if (!supported) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700191 drv_log("Unsupported combination -- HAL format: %u, HAL usage: %u, "
192 "drv_format: %4.4s, use_flags: %llu\n",
193 format, usage, reinterpret_cast<char *>(&descriptor.drm_format),
194 static_cast<unsigned long long>(descriptor.use_flags));
Tomasz Figa90bb7432017-07-21 17:54:05 +0900195 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700196 }
197
198 ret = mod->driver->allocate(&descriptor, handle);
199 if (ret)
200 return ret;
201
202 auto hnd = cros_gralloc_convert_handle(*handle);
203 *stride = hnd->pixel_stride;
204
Tomasz Figa90bb7432017-07-21 17:54:05 +0900205 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700206}
207
208static int gralloc0_free(alloc_device_t *dev, buffer_handle_t handle)
209{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700210 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700211 return mod->driver->release(handle);
212}
213
214static int gralloc0_close(struct hw_device_t *dev)
215{
216 /* Memory is freed by managed pointers on process close. */
Tomasz Figa90bb7432017-07-21 17:54:05 +0900217 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700218}
219
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700220static int gralloc0_init(struct gralloc0_module *mod, bool initialize_alloc)
221{
222 std::lock_guard<std::mutex> lock(mod->initialization_mutex);
223
224 if (mod->initialized)
225 return 0;
226
Yiwei Zhang61f97522021-07-01 20:43:04 +0000227 mod->driver = cros_gralloc_driver::get_instance();
228 if (!mod->driver)
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700229 return -ENODEV;
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700230
231 if (initialize_alloc) {
232 mod->alloc = std::make_unique<alloc_device_t>();
233 mod->alloc->alloc = gralloc0_alloc;
234 mod->alloc->free = gralloc0_free;
235 mod->alloc->common.tag = HARDWARE_DEVICE_TAG;
236 mod->alloc->common.version = 0;
237 mod->alloc->common.module = (hw_module_t *)mod;
238 mod->alloc->common.close = gralloc0_close;
239 }
240
241 mod->initialized = true;
242 return 0;
243}
244
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700245static int gralloc0_open(const struct hw_module_t *mod, const char *name, struct hw_device_t **dev)
246{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700247 auto const_module = reinterpret_cast<const struct gralloc0_module *>(mod);
248 auto module = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700249
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700250 if (module->initialized) {
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700251 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900252 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700253 }
254
255 if (strcmp(name, GRALLOC_HARDWARE_GPU0)) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700256 drv_log("Incorrect device name - %s.\n", name);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900257 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700258 }
259
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700260 if (gralloc0_init(module, true))
261 return -ENODEV;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700262
263 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900264 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700265}
266
267static int gralloc0_register_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
268{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700269 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
270 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700271
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000272 if (!mod->initialized) {
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700273 if (gralloc0_init(mod, false))
274 return -ENODEV;
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000275 }
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700276
277 return mod->driver->retain(handle);
278}
279
280static int gralloc0_unregister_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
281{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700282 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700283 return mod->driver->release(handle);
284}
285
286static int gralloc0_lock(struct gralloc_module_t const *module, buffer_handle_t handle, int usage,
287 int l, int t, int w, int h, void **vaddr)
288{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700289 return module->lockAsync(module, handle, usage, l, t, w, h, vaddr, -1);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700290}
291
292static int gralloc0_unlock(struct gralloc_module_t const *module, buffer_handle_t handle)
293{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700294 int32_t fence_fd, ret;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700295 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700296 ret = mod->driver->unlock(handle, &fence_fd);
297 if (ret)
298 return ret;
299
Jason Macnak1de7f662020-01-24 15:05:57 -0800300 ret = cros_gralloc_sync_wait(fence_fd, /*close_acquire_fence=*/true);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700301 if (ret)
302 return ret;
303
304 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700305}
306
307static int gralloc0_perform(struct gralloc_module_t const *module, int op, ...)
308{
309 va_list args;
310 int32_t *out_format, ret;
311 uint64_t *out_store;
312 buffer_handle_t handle;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000313 cros_gralloc_handle_t hnd;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700314 uint32_t *out_width, *out_height, *out_stride;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700315 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
316 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000317 uint64_t format_modifier = 0;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700318 struct cros_gralloc0_buffer_info *info;
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000319 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
320 auto mod = const_cast<struct gralloc0_module *>(const_module);
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000321 uint32_t req_usage;
322 uint32_t gralloc_usage = 0;
323 uint32_t *out_gralloc_usage;
324
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000325 if (!mod->initialized) {
326 if (gralloc0_init(mod, false))
327 return -ENODEV;
328 }
329
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000330 va_start(args, op);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700331
332 switch (op) {
333 case GRALLOC_DRM_GET_STRIDE:
334 case GRALLOC_DRM_GET_FORMAT:
335 case GRALLOC_DRM_GET_DIMENSIONS:
336 case GRALLOC_DRM_GET_BACKING_STORE:
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700337 case GRALLOC_DRM_GET_BUFFER_INFO:
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000338 /* retrieve handles for ops with buffer_handle_t */
339 handle = va_arg(args, buffer_handle_t);
340 hnd = cros_gralloc_convert_handle(handle);
341 if (!hnd) {
342 va_end(args);
343 drv_log("Invalid handle.\n");
344 return -EINVAL;
345 }
346 break;
347 case GRALLOC_DRM_GET_USAGE:
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700348 break;
349 default:
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000350 va_end(args);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900351 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700352 }
353
Tomasz Figa90bb7432017-07-21 17:54:05 +0900354 ret = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700355 switch (op) {
356 case GRALLOC_DRM_GET_STRIDE:
357 out_stride = va_arg(args, uint32_t *);
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000358 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700359 if (ret)
360 break;
361
362 if (strides[0] != hnd->strides[0]) {
363 uint32_t bytes_per_pixel = drv_bytes_per_pixel_from_format(hnd->format, 0);
364 *out_stride = DIV_ROUND_UP(strides[0], bytes_per_pixel);
365 } else {
366 *out_stride = hnd->pixel_stride;
367 }
368
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700369 break;
370 case GRALLOC_DRM_GET_FORMAT:
371 out_format = va_arg(args, int32_t *);
372 *out_format = hnd->droid_format;
373 break;
374 case GRALLOC_DRM_GET_DIMENSIONS:
375 out_width = va_arg(args, uint32_t *);
376 out_height = va_arg(args, uint32_t *);
377 *out_width = hnd->width;
378 *out_height = hnd->height;
379 break;
380 case GRALLOC_DRM_GET_BACKING_STORE:
381 out_store = va_arg(args, uint64_t *);
382 ret = mod->driver->get_backing_store(handle, out_store);
383 break;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700384 case GRALLOC_DRM_GET_BUFFER_INFO:
385 info = va_arg(args, struct cros_gralloc0_buffer_info *);
Yiwei Zhang5a031c62021-06-04 07:17:14 +0000386 memset(info, 0, sizeof(*info));
Roman Stratiienko142dd9c2020-12-14 17:34:09 +0200387 info->drm_fourcc = drv_get_standard_fourcc(hnd->format);
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700388 info->num_fds = hnd->num_planes;
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000389 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
390 if (ret)
391 break;
392
393 info->modifier = format_modifier ? format_modifier : hnd->format_modifier;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700394 for (uint32_t i = 0; i < hnd->num_planes; i++) {
395 info->fds[i] = hnd->fds[i];
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000396 if (strides[i]) {
397 info->stride[i] = strides[i];
398 info->offset[i] = offsets[i];
399 } else {
400 info->stride[i] = hnd->strides[i];
401 info->offset[i] = hnd->offsets[i];
402 }
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700403 }
Kristian H. Kristensene77c32c2020-07-23 16:04:47 -0700404 break;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000405 case GRALLOC_DRM_GET_USAGE:
406 req_usage = va_arg(args, uint32_t);
407 out_gralloc_usage = va_arg(args, uint32_t *);
408 if (req_usage & GRALLOC_DRM_GET_USAGE_FRONT_RENDERING_BIT)
409 gralloc_usage |= BUFFER_USAGE_FRONT_RENDERING;
410 *out_gralloc_usage = gralloc_usage;
411 break;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700412 default:
Tomasz Figa90bb7432017-07-21 17:54:05 +0900413 ret = -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700414 }
415
416 va_end(args);
417
418 return ret;
419}
420
421static int gralloc0_lock_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
422 int usage, int l, int t, int w, int h, struct android_ycbcr *ycbcr)
423{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700424 return module->lockAsync_ycbcr(module, handle, usage, l, t, w, h, ycbcr, -1);
425}
426
427static int gralloc0_lock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
428 int usage, int l, int t, int w, int h, void **vaddr, int fence_fd)
429{
430 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700431 uint32_t map_flags;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700432 uint8_t *addr[DRV_MAX_PLANES];
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000433 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
434 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700435 struct rectangle rect = { .x = static_cast<uint32_t>(l),
436 .y = static_cast<uint32_t>(t),
437 .width = static_cast<uint32_t>(w),
438 .height = static_cast<uint32_t>(h) };
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700439
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000440 if (!mod->initialized) {
441 if (gralloc0_init(mod, false))
442 return -ENODEV;
443 }
444
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700445 auto hnd = cros_gralloc_convert_handle(handle);
446 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700447 drv_log("Invalid handle.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700448 return -EINVAL;
449 }
450
451 if (hnd->droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700452 drv_log("HAL_PIXEL_FORMAT_YCbCr_*_888 format not compatible.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700453 return -EINVAL;
454 }
455
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800456 assert(l >= 0);
457 assert(t >= 0);
458 assert(w >= 0);
459 assert(h >= 0);
460
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700461 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800462 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700463 *vaddr = addr[0];
464 return ret;
465}
466
467static int gralloc0_unlock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
468 int *fence_fd)
469{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700470 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700471 return mod->driver->unlock(handle, fence_fd);
472}
473
474static int gralloc0_lock_async_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
475 int usage, int l, int t, int w, int h,
476 struct android_ycbcr *ycbcr, int fence_fd)
477{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700478 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700479 uint32_t map_flags;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700480 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
481 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000482 uint64_t format_modifier = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700483 uint8_t *addr[DRV_MAX_PLANES] = { nullptr, nullptr, nullptr, nullptr };
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000484 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
485 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700486 struct rectangle rect = { .x = static_cast<uint32_t>(l),
487 .y = static_cast<uint32_t>(t),
488 .width = static_cast<uint32_t>(w),
489 .height = static_cast<uint32_t>(h) };
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700490
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000491 if (!mod->initialized) {
492 if (gralloc0_init(mod, false))
493 return -ENODEV;
494 }
495
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700496 auto hnd = cros_gralloc_convert_handle(handle);
497 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700498 drv_log("Invalid handle.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900499 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700500 }
501
Hirokazu Honda758cf122019-12-03 11:01:59 +0900502 if (!gralloc0_droid_yuv_format(hnd->droid_format) &&
503 hnd->droid_format != HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700504 drv_log("Non-YUV format not compatible.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900505 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700506 }
507
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800508 assert(l >= 0);
509 assert(t >= 0);
510 assert(w >= 0);
511 assert(h >= 0);
512
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700513 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800514 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Tomasz Figaaddd5f22017-07-05 17:50:18 +0900515 if (ret)
516 return ret;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700517
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700518 if (!map_flags) {
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000519 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700520 if (ret)
521 return ret;
522
523 for (uint32_t plane = 0; plane < DRV_MAX_PLANES; plane++)
Jason Macnaka03926e2020-05-14 10:57:17 -0700524 addr[plane] =
525 reinterpret_cast<uint8_t *>(static_cast<uintptr_t>(offsets[plane]));
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700526 }
527
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700528 switch (hnd->format) {
529 case DRM_FORMAT_NV12:
530 ycbcr->y = addr[0];
531 ycbcr->cb = addr[1];
532 ycbcr->cr = addr[1] + 1;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700533 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
534 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700535 ycbcr->chroma_step = 2;
536 break;
537 case DRM_FORMAT_YVU420:
538 case DRM_FORMAT_YVU420_ANDROID:
539 ycbcr->y = addr[0];
540 ycbcr->cb = addr[2];
541 ycbcr->cr = addr[1];
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700542 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
543 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700544 ycbcr->chroma_step = 1;
545 break;
546 default:
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700547 module->unlock(module, handle);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900548 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700549 }
550
Tomasz Figa90bb7432017-07-21 17:54:05 +0900551 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700552}
553
Tomasz Figa4df286c2017-08-02 19:35:40 +0900554// clang-format off
555static struct hw_module_methods_t gralloc0_module_methods = { .open = gralloc0_open };
556// clang-format on
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700557
558struct gralloc0_module HAL_MODULE_INFO_SYM = {
559 .base =
560 {
561 .common =
562 {
563 .tag = HARDWARE_MODULE_TAG,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700564 .module_api_version = GRALLOC_MODULE_API_VERSION_0_3,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700565 .hal_api_version = 0,
566 .id = GRALLOC_HARDWARE_MODULE_ID,
567 .name = "CrOS Gralloc",
568 .author = "Chrome OS",
569 .methods = &gralloc0_module_methods,
570 },
571
572 .registerBuffer = gralloc0_register_buffer,
573 .unregisterBuffer = gralloc0_unregister_buffer,
574 .lock = gralloc0_lock,
575 .unlock = gralloc0_unlock,
576 .perform = gralloc0_perform,
577 .lock_ycbcr = gralloc0_lock_ycbcr,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700578 .lockAsync = gralloc0_lock_async,
579 .unlockAsync = gralloc0_unlock_async,
580 .lockAsync_ycbcr = gralloc0_lock_async_ycbcr,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700581 },
582
583 .alloc = nullptr,
584 .driver = nullptr,
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700585 .initialized = false,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700586};