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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
40
41#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
48#undef likely
49#undef unlikely
50#define likely(x) __builtin_expect(!!(x), 1)
51#define unlikely(x) __builtin_expect(!!(x), 0)
52
53
54
55/*------------------------------------------------------------*/
56/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
72/* The last seen execute target instruction */
73ULong last_execute_target;
74
75/* The possible outcomes of a decoding operation */
76typedef enum {
77 S390_DECODE_OK,
78 S390_DECODE_UNKNOWN_INSN,
79 S390_DECODE_UNIMPLEMENTED_INSN,
80 S390_DECODE_UNKNOWN_SPECIAL_INSN,
81 S390_DECODE_ERROR
82} s390_decode_t;
83
84/*------------------------------------------------------------*/
85/*--- Helpers for constructing IR. ---*/
86/*------------------------------------------------------------*/
87
88/* Sign extend a value with the given number of bits. This is a
89 macro because it allows us to overload the type of the value.
90 Note that VALUE must have a signed type! */
91#undef sign_extend
92#define sign_extend(value,num_bits) \
93(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
94 (sizeof(__typeof__(value)) * 8 - (num_bits)))
95
96
97/* Add a statement to the current irsb. */
98static __inline__ void
99stmt(IRStmt *st)
100{
101 addStmtToIRSB(irsb, st);
102}
103
104/* Allocate a new temporary of the given type. */
105static __inline__ IRTemp
106newTemp(IRType type)
107{
108 vassert(isPlausibleIRType(type));
109
110 return newIRTemp(irsb->tyenv, type);
111}
112
113/* Create an expression node for a temporary */
114static __inline__ IRExpr *
115mkexpr(IRTemp tmp)
116{
117 return IRExpr_RdTmp(tmp);
118}
119
120/* Add a statement that assigns to a temporary */
121static __inline__ void
122assign(IRTemp dst, IRExpr *expr)
123{
124 stmt(IRStmt_WrTmp(dst, expr));
125}
126
127/* Create a temporary of the given type and assign the expression to it */
128static __inline__ IRTemp
129mktemp(IRType type, IRExpr *expr)
130{
131 IRTemp temp = newTemp(type);
132
133 assign(temp, expr);
134
135 return temp;
136}
137
138/* Create a unary expression */
139static __inline__ IRExpr *
140unop(IROp kind, IRExpr *op)
141{
142 return IRExpr_Unop(kind, op);
143}
144
145/* Create a binary expression */
146static __inline__ IRExpr *
147binop(IROp kind, IRExpr *op1, IRExpr *op2)
148{
149 return IRExpr_Binop(kind, op1, op2);
150}
151
152/* Create a ternary expression */
153static __inline__ IRExpr *
154triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
155{
156 return IRExpr_Triop(kind, op1, op2, op3);
157}
158
159/* Create a quaternary expression */
160static __inline__ IRExpr *
161qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
162{
163 return IRExpr_Qop(kind, op1, op2, op3, op4);
164}
165
166/* Create an expression node for an 8-bit integer constant */
167static __inline__ IRExpr *
168mkU8(UInt value)
169{
170 vassert(value < 256);
171
172 return IRExpr_Const(IRConst_U8((UChar)value));
173}
174
175/* Create an expression node for a 16-bit integer constant */
176static __inline__ IRExpr *
177mkU16(UInt value)
178{
179 vassert(value < 65536);
180
181 return IRExpr_Const(IRConst_U16((UShort)value));
182}
183
184/* Create an expression node for a 32-bit integer constant */
185static __inline__ IRExpr *
186mkU32(UInt value)
187{
188 return IRExpr_Const(IRConst_U32(value));
189}
190
191/* Create an expression node for a 64-bit integer constant */
192static __inline__ IRExpr *
193mkU64(ULong value)
194{
195 return IRExpr_Const(IRConst_U64(value));
196}
197
198/* Create an expression node for a 32-bit floating point constant
199 whose value is given by a bit pattern. */
200static __inline__ IRExpr *
201mkF32i(UInt value)
202{
203 return IRExpr_Const(IRConst_F32i(value));
204}
205
206/* Create an expression node for a 32-bit floating point constant
207 whose value is given by a bit pattern. */
208static __inline__ IRExpr *
209mkF64i(ULong value)
210{
211 return IRExpr_Const(IRConst_F64i(value));
212}
213
214/* Little helper function for my sanity. ITE = if-then-else */
215static IRExpr *
216mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
217{
218 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
219
220 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
221}
222
223/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
224static void __inline__
225store(IRExpr *addr, IRExpr *data)
226{
227 stmt(IRStmt_Store(Iend_BE, addr, data));
228}
229
230/* Create an expression that loads a TYPE sized value from ADDR.
231 This is a big-endian machine. */
232static __inline__ IRExpr *
233load(IRType type, IRExpr *addr)
234{
235 return IRExpr_Load(Iend_BE, type, addr);
236}
237
238/* Function call */
239static void
240call_function(IRExpr *callee_address)
241{
242 irsb->next = callee_address;
243 irsb->jumpkind = Ijk_Call;
244
245 dis_res->whatNext = Dis_StopHere;
246}
247
248/* Function return sequence */
249static void
250return_from_function(IRExpr *return_address)
251{
252 irsb->next = return_address;
253 irsb->jumpkind = Ijk_Ret;
254
255 dis_res->whatNext = Dis_StopHere;
256}
257
258/* A conditional branch whose target is not known at instrumentation time.
259
260 if (condition) goto computed_target;
261
262 Needs to be represented as:
263
264 if (! condition) goto next_instruction;
265 goto computed_target;
266
267 This inversion is being handled at code generation time. So we just
268 take the condition here as is.
269*/
270static void
271if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
272{
273 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
274
275 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
276
277 irsb->next = target;
278 irsb->jumpkind = Ijk_Boring;
279
280 dis_res->whatNext = Dis_StopHere;
281}
282
283/* A conditional branch whose target is known at instrumentation time. */
284static void
285if_condition_goto(IRExpr *condition, Addr64 target)
286{
287 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
288
289 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
290 dis_res->whatNext = Dis_Continue;
291}
292
293/* An unconditional branch. Target may or may not be known at instrumentation
294 time. */
295static void
296always_goto(IRExpr *target)
297{
298 irsb->next = target;
299 irsb->jumpkind = Ijk_Boring;
300
301 dis_res->whatNext = Dis_StopHere;
302}
303
304/* A system call */
305static void
306system_call(IRExpr *sysno)
307{
308 /* Store the system call number in the pseudo register. */
309 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
310
311 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so.
312 fixs390: As we do not use it, can we get rid of it ?? */
313 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
314
315 /* It's important that all ArchRegs carry their up-to-date value
316 at this point. So we declare an end-of-block here, which
317 forces any TempRegs caching ArchRegs to be flushed. */
318 irsb->next = mkU64(guest_IA_next_instr);
319
320 irsb->jumpkind = Ijk_Sys_syscall;
321
322 dis_res->whatNext = Dis_StopHere;
323}
324
325/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
326 instructions to VEX's IRRoundingMode. */
327static IRRoundingMode
328encode_rounding_mode(UChar mode)
329{
330 switch (mode) {
331 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
332 case S390_ROUND_ZERO: return Irrm_ZERO;
333 case S390_ROUND_POSINF: return Irrm_PosINF;
334 case S390_ROUND_NEGINF: return Irrm_NegINF;
335 }
336 vpanic("encode_rounding_mode");
337}
338
339static __inline__ IRExpr *get_fpr_dw0(UInt);
340static __inline__ void put_fpr_dw0(UInt, IRExpr *);
341
342/* Read a floating point register pair and combine their contents into a
343 128-bit value */
344static IRExpr *
345get_fpr_pair(UInt archreg)
346{
347 IRExpr *high = get_fpr_dw0(archreg);
348 IRExpr *low = get_fpr_dw0(archreg + 2);
349
350 return binop(Iop_F64HLtoF128, high, low);
351}
352
353/* Write a 128-bit floating point value into a register pair. */
354static void
355put_fpr_pair(UInt archreg, IRExpr *expr)
356{
357 IRExpr *high = unop(Iop_F128HItoF64, expr);
358 IRExpr *low = unop(Iop_F128LOtoF64, expr);
359
360 put_fpr_dw0(archreg, high);
361 put_fpr_dw0(archreg + 2, low);
362}
363
364
365/* Flags thunk offsets */
366#define S390X_GUEST_OFFSET_CC_OP S390_GUEST_OFFSET(guest_CC_OP)
367#define S390X_GUEST_OFFSET_CC_DEP1 S390_GUEST_OFFSET(guest_CC_DEP1)
368#define S390X_GUEST_OFFSET_CC_DEP2 S390_GUEST_OFFSET(guest_CC_DEP2)
369#define S390X_GUEST_OFFSET_CC_NDEP S390_GUEST_OFFSET(guest_CC_NDEP)
370
371/*------------------------------------------------------------*/
372/*--- Build the flags thunk. ---*/
373/*------------------------------------------------------------*/
374
375/* Completely fill the flags thunk. We're always filling all fields.
376 Apparently, that is better for redundant PUT elimination. */
377static void
378s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
379{
380 UInt op_off, dep1_off, dep2_off, ndep_off;
381
382 op_off = S390X_GUEST_OFFSET_CC_OP;
383 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
384 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
385 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
386
387 stmt(IRStmt_Put(op_off, op));
388 stmt(IRStmt_Put(dep1_off, dep1));
389 stmt(IRStmt_Put(dep2_off, dep2));
390 stmt(IRStmt_Put(ndep_off, ndep));
391}
392
393
394/* Create an expression for V and widen the result to 64 bit. */
395static IRExpr *
396s390_cc_widen(IRTemp v, Bool sign_extend)
397{
398 IRExpr *expr;
399
400 expr = mkexpr(v);
401
402 switch (typeOfIRTemp(irsb->tyenv, v)) {
403 case Ity_I64:
404 break;
405 case Ity_I32:
406 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
407 break;
408 case Ity_I16:
409 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
410 break;
411 case Ity_I8:
412 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
413 break;
414 default:
415 vpanic("s390_cc_widen");
416 }
417
418 return expr;
419}
420
421static void
422s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
423{
424 IRExpr *op, *dep1, *dep2, *ndep;
425
426 op = mkU64(opc);
427 dep1 = s390_cc_widen(d1, sign_extend);
428 dep2 = mkU64(0);
429 ndep = mkU64(0);
430
431 s390_cc_thunk_fill(op, dep1, dep2, ndep);
432}
433
434
435static void
436s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
437{
438 IRExpr *op, *dep1, *dep2, *ndep;
439
440 op = mkU64(opc);
441 dep1 = s390_cc_widen(d1, sign_extend);
442 dep2 = s390_cc_widen(d2, sign_extend);
443 ndep = mkU64(0);
444
445 s390_cc_thunk_fill(op, dep1, dep2, ndep);
446}
447
448
449/* memcheck believes that the NDEP field in the flags thunk is always
450 defined. But for some flag computations (e.g. add with carry) that is
451 just not true. We therefore need to convey to memcheck that the value
452 of the ndep field does matter and therefore we make the DEP2 field
453 depend on it:
454
455 DEP2 = original_DEP2 ^ NDEP
456
457 In s390_calculate_cc we exploit that (a^b)^b == a
458 I.e. we xor the DEP2 value with the NDEP value to recover the
459 original_DEP2 value. */
460static void
461s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
462{
463 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
464
465 op = mkU64(opc);
466 dep1 = s390_cc_widen(d1, sign_extend);
467 dep2 = s390_cc_widen(d2, sign_extend);
468 ndep = s390_cc_widen(nd, sign_extend);
469
470 dep2x = binop(Iop_Xor64, dep2, ndep);
471
472 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
473}
474
475
476/* Write one floating point value into the flags thunk */
477static void
478s390_cc_thunk_put1f(UInt opc, IRTemp d1)
479{
480 IRExpr *op, *dep1, *dep2, *ndep;
481
482 op = mkU64(opc);
483 dep1 = mkexpr(d1);
484 dep2 = mkU64(0);
485 ndep = mkU64(0);
486
487 s390_cc_thunk_fill(op, dep1, dep2, ndep);
488}
489
490
491/* Write a floating point value and an integer into the flags thunk. The
492 integer value is zero-extended first. */
493static void
494s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
495{
496 IRExpr *op, *dep1, *dep2, *ndep;
497
498 op = mkU64(opc);
499 dep1 = mkexpr(d1);
500 dep2 = s390_cc_widen(d2, False);
501 ndep = mkU64(0);
502
503 s390_cc_thunk_fill(op, dep1, dep2, ndep);
504}
505
506
507/* Write a 128-bit floating point value into the flags thunk. This is
508 done by splitting the value into two 64-bits values. */
509static void
510s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
511{
512 IRExpr *op, *hi, *lo, *ndep;
513
514 op = mkU64(opc);
515 hi = unop(Iop_F128HItoF64, mkexpr(d1));
516 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
517 ndep = mkU64(0);
518
519 s390_cc_thunk_fill(op, hi, lo, ndep);
520}
521
522
523/* Write a 128-bit floating point value and an integer into the flags thunk.
524 The integer value is zero-extended first. */
525static void
526s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
527{
528 IRExpr *op, *hi, *lo, *lox, *ndep;
529
530 op = mkU64(opc);
531 hi = unop(Iop_F128HItoF64, mkexpr(d1));
532 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
533 ndep = s390_cc_widen(nd, False);
534
535 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
536
537 s390_cc_thunk_fill(op, hi, lox, ndep);
538}
539
540
541static void
542s390_cc_set(UInt val)
543{
544 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
545 mkU64(val), mkU64(0), mkU64(0));
546}
547
548/* Build IR to calculate the condition code from flags thunk.
549 Returns an expression of type Ity_I32 */
550static IRExpr *
551s390_call_calculate_cc(void)
552{
553 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
554
555 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
556 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
557 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
558 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
559
560 args = mkIRExprVec_4(op, dep1, dep2, ndep);
561 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
562 "s390_calculate_cc", &s390_calculate_cc, args);
563
564 /* Exclude OP and NDEP from definedness checking. We're only
565 interested in DEP1 and DEP2. */
566 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
567
568 return call;
569}
570
571/* Build IR to calculate the internal condition code for a "compare and branch"
572 insn. Returns an expression of type Ity_I32 */
573static IRExpr *
574s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
575{
576 IRExpr **args, *call, *op, *dep1, *dep2;
577
578 op = mkU64(opc);
579 dep1 = s390_cc_widen(op1, sign_extend);
580 dep2 = s390_cc_widen(op2, sign_extend);
581
582 args = mkIRExprVec_3(op, dep1, dep2);
583 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
584 "s390_calculate_icc", &s390_calculate_icc, args);
585
586 /* Exclude OP from definedness checking. We're only
587 interested in DEP1 and DEP2. */
588 call->Iex.CCall.cee->mcx_mask = (1<<0);
589
590 return call;
591}
592
593/* Build IR to calculate the condition code from flags thunk.
594 Returns an expression of type Ity_I32 */
595static IRExpr *
596s390_call_calculate_cond(UInt m)
597{
598 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
599
600 mask = mkU64(m);
601 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
602 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
603 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
604 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
605
606 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
607 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
608 "s390_calculate_cond", &s390_calculate_cond, args);
609
610 /* Exclude the requested condition, OP and NDEP from definedness
611 checking. We're only interested in DEP1 and DEP2. */
612 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
613
614 return call;
615}
616
617#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
618#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
619#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
620#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
621#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
622#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
623#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
624 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
625#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
626 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
627#define s390_call_calculate_iccZZ(op,dep1,dep2) \
628 s390_call_calculate_icc(op,dep1,dep2,False)
629#define s390_call_calculate_iccSS(op,dep1,dep2) \
630 s390_call_calculate_icc(op,dep1,dep2,True)
631
632
633#define OFFB_TISTART offsetof(VexGuestS390XState, guest_TISTART)
634#define OFFB_TILEN offsetof(VexGuestS390XState, guest_TILEN)
635
636
637/*------------------------------------------------------------*/
638/*--- Guest register access ---*/
639/*------------------------------------------------------------*/
640
641
642/*------------------------------------------------------------*/
643/*--- ar registers ---*/
644/*------------------------------------------------------------*/
645
646/* Return the guest state offset of a ar register. */
647static UInt
648ar_offset(UInt archreg)
649{
650 static const UInt offset[16] = {
651 offsetof(VexGuestS390XState, guest_a0),
652 offsetof(VexGuestS390XState, guest_a1),
653 offsetof(VexGuestS390XState, guest_a2),
654 offsetof(VexGuestS390XState, guest_a3),
655 offsetof(VexGuestS390XState, guest_a4),
656 offsetof(VexGuestS390XState, guest_a5),
657 offsetof(VexGuestS390XState, guest_a6),
658 offsetof(VexGuestS390XState, guest_a7),
659 offsetof(VexGuestS390XState, guest_a8),
660 offsetof(VexGuestS390XState, guest_a9),
661 offsetof(VexGuestS390XState, guest_a10),
662 offsetof(VexGuestS390XState, guest_a11),
663 offsetof(VexGuestS390XState, guest_a12),
664 offsetof(VexGuestS390XState, guest_a13),
665 offsetof(VexGuestS390XState, guest_a14),
666 offsetof(VexGuestS390XState, guest_a15),
667 };
668
669 vassert(archreg < 16);
670
671 return offset[archreg];
672}
673
674
675/* Return the guest state offset of word #0 of a ar register. */
676static __inline__ UInt
677ar_w0_offset(UInt archreg)
678{
679 return ar_offset(archreg) + 0;
680}
681
682/* Write word #0 of a ar to the guest state. */
683static __inline__ void
684put_ar_w0(UInt archreg, IRExpr *expr)
685{
686 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
687
688 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
689}
690
691/* Read word #0 of a ar register. */
692static __inline__ IRExpr *
693get_ar_w0(UInt archreg)
694{
695 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
696}
697
698
699/*------------------------------------------------------------*/
700/*--- fpr registers ---*/
701/*------------------------------------------------------------*/
702
703/* Return the guest state offset of a fpr register. */
704static UInt
705fpr_offset(UInt archreg)
706{
707 static const UInt offset[16] = {
708 offsetof(VexGuestS390XState, guest_f0),
709 offsetof(VexGuestS390XState, guest_f1),
710 offsetof(VexGuestS390XState, guest_f2),
711 offsetof(VexGuestS390XState, guest_f3),
712 offsetof(VexGuestS390XState, guest_f4),
713 offsetof(VexGuestS390XState, guest_f5),
714 offsetof(VexGuestS390XState, guest_f6),
715 offsetof(VexGuestS390XState, guest_f7),
716 offsetof(VexGuestS390XState, guest_f8),
717 offsetof(VexGuestS390XState, guest_f9),
718 offsetof(VexGuestS390XState, guest_f10),
719 offsetof(VexGuestS390XState, guest_f11),
720 offsetof(VexGuestS390XState, guest_f12),
721 offsetof(VexGuestS390XState, guest_f13),
722 offsetof(VexGuestS390XState, guest_f14),
723 offsetof(VexGuestS390XState, guest_f15),
724 };
725
726 vassert(archreg < 16);
727
728 return offset[archreg];
729}
730
731
732/* Return the guest state offset of word #0 of a fpr register. */
733static __inline__ UInt
734fpr_w0_offset(UInt archreg)
735{
736 return fpr_offset(archreg) + 0;
737}
738
739/* Write word #0 of a fpr to the guest state. */
740static __inline__ void
741put_fpr_w0(UInt archreg, IRExpr *expr)
742{
743 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
744
745 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
746}
747
748/* Read word #0 of a fpr register. */
749static __inline__ IRExpr *
750get_fpr_w0(UInt archreg)
751{
752 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
753}
754
755/* Return the guest state offset of double word #0 of a fpr register. */
756static __inline__ UInt
757fpr_dw0_offset(UInt archreg)
758{
759 return fpr_offset(archreg) + 0;
760}
761
762/* Write double word #0 of a fpr to the guest state. */
763static __inline__ void
764put_fpr_dw0(UInt archreg, IRExpr *expr)
765{
766 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
767
768 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
769}
770
771/* Read double word #0 of a fpr register. */
772static __inline__ IRExpr *
773get_fpr_dw0(UInt archreg)
774{
775 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
776}
777
778
779/*------------------------------------------------------------*/
780/*--- gpr registers ---*/
781/*------------------------------------------------------------*/
782
783/* Return the guest state offset of a gpr register. */
784static UInt
785gpr_offset(UInt archreg)
786{
787 static const UInt offset[16] = {
788 offsetof(VexGuestS390XState, guest_r0),
789 offsetof(VexGuestS390XState, guest_r1),
790 offsetof(VexGuestS390XState, guest_r2),
791 offsetof(VexGuestS390XState, guest_r3),
792 offsetof(VexGuestS390XState, guest_r4),
793 offsetof(VexGuestS390XState, guest_r5),
794 offsetof(VexGuestS390XState, guest_r6),
795 offsetof(VexGuestS390XState, guest_r7),
796 offsetof(VexGuestS390XState, guest_r8),
797 offsetof(VexGuestS390XState, guest_r9),
798 offsetof(VexGuestS390XState, guest_r10),
799 offsetof(VexGuestS390XState, guest_r11),
800 offsetof(VexGuestS390XState, guest_r12),
801 offsetof(VexGuestS390XState, guest_r13),
802 offsetof(VexGuestS390XState, guest_r14),
803 offsetof(VexGuestS390XState, guest_r15),
804 };
805
806 vassert(archreg < 16);
807
808 return offset[archreg];
809}
810
811
812/* Return the guest state offset of word #0 of a gpr register. */
813static __inline__ UInt
814gpr_w0_offset(UInt archreg)
815{
816 return gpr_offset(archreg) + 0;
817}
818
819/* Write word #0 of a gpr to the guest state. */
820static __inline__ void
821put_gpr_w0(UInt archreg, IRExpr *expr)
822{
823 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
824
825 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
826}
827
828/* Read word #0 of a gpr register. */
829static __inline__ IRExpr *
830get_gpr_w0(UInt archreg)
831{
832 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
833}
834
835/* Return the guest state offset of double word #0 of a gpr register. */
836static __inline__ UInt
837gpr_dw0_offset(UInt archreg)
838{
839 return gpr_offset(archreg) + 0;
840}
841
842/* Write double word #0 of a gpr to the guest state. */
843static __inline__ void
844put_gpr_dw0(UInt archreg, IRExpr *expr)
845{
846 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
847
848 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
849}
850
851/* Read double word #0 of a gpr register. */
852static __inline__ IRExpr *
853get_gpr_dw0(UInt archreg)
854{
855 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
856}
857
858/* Return the guest state offset of half word #1 of a gpr register. */
859static __inline__ UInt
860gpr_hw1_offset(UInt archreg)
861{
862 return gpr_offset(archreg) + 2;
863}
864
865/* Write half word #1 of a gpr to the guest state. */
866static __inline__ void
867put_gpr_hw1(UInt archreg, IRExpr *expr)
868{
869 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
870
871 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
872}
873
874/* Read half word #1 of a gpr register. */
875static __inline__ IRExpr *
876get_gpr_hw1(UInt archreg)
877{
878 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
879}
880
881/* Return the guest state offset of byte #6 of a gpr register. */
882static __inline__ UInt
883gpr_b6_offset(UInt archreg)
884{
885 return gpr_offset(archreg) + 6;
886}
887
888/* Write byte #6 of a gpr to the guest state. */
889static __inline__ void
890put_gpr_b6(UInt archreg, IRExpr *expr)
891{
892 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
893
894 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
895}
896
897/* Read byte #6 of a gpr register. */
898static __inline__ IRExpr *
899get_gpr_b6(UInt archreg)
900{
901 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
902}
903
904/* Return the guest state offset of byte #3 of a gpr register. */
905static __inline__ UInt
906gpr_b3_offset(UInt archreg)
907{
908 return gpr_offset(archreg) + 3;
909}
910
911/* Write byte #3 of a gpr to the guest state. */
912static __inline__ void
913put_gpr_b3(UInt archreg, IRExpr *expr)
914{
915 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
916
917 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
918}
919
920/* Read byte #3 of a gpr register. */
921static __inline__ IRExpr *
922get_gpr_b3(UInt archreg)
923{
924 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
925}
926
927/* Return the guest state offset of byte #0 of a gpr register. */
928static __inline__ UInt
929gpr_b0_offset(UInt archreg)
930{
931 return gpr_offset(archreg) + 0;
932}
933
934/* Write byte #0 of a gpr to the guest state. */
935static __inline__ void
936put_gpr_b0(UInt archreg, IRExpr *expr)
937{
938 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
939
940 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
941}
942
943/* Read byte #0 of a gpr register. */
944static __inline__ IRExpr *
945get_gpr_b0(UInt archreg)
946{
947 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
948}
949
950/* Return the guest state offset of word #1 of a gpr register. */
951static __inline__ UInt
952gpr_w1_offset(UInt archreg)
953{
954 return gpr_offset(archreg) + 4;
955}
956
957/* Write word #1 of a gpr to the guest state. */
958static __inline__ void
959put_gpr_w1(UInt archreg, IRExpr *expr)
960{
961 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
962
963 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
964}
965
966/* Read word #1 of a gpr register. */
967static __inline__ IRExpr *
968get_gpr_w1(UInt archreg)
969{
970 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
971}
972
973/* Return the guest state offset of half word #3 of a gpr register. */
974static __inline__ UInt
975gpr_hw3_offset(UInt archreg)
976{
977 return gpr_offset(archreg) + 6;
978}
979
980/* Write half word #3 of a gpr to the guest state. */
981static __inline__ void
982put_gpr_hw3(UInt archreg, IRExpr *expr)
983{
984 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
985
986 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
987}
988
989/* Read half word #3 of a gpr register. */
990static __inline__ IRExpr *
991get_gpr_hw3(UInt archreg)
992{
993 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
994}
995
996/* Return the guest state offset of byte #7 of a gpr register. */
997static __inline__ UInt
998gpr_b7_offset(UInt archreg)
999{
1000 return gpr_offset(archreg) + 7;
1001}
1002
1003/* Write byte #7 of a gpr to the guest state. */
1004static __inline__ void
1005put_gpr_b7(UInt archreg, IRExpr *expr)
1006{
1007 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1008
1009 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1010}
1011
1012/* Read byte #7 of a gpr register. */
1013static __inline__ IRExpr *
1014get_gpr_b7(UInt archreg)
1015{
1016 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1017}
1018
1019/* Return the guest state offset of half word #0 of a gpr register. */
1020static __inline__ UInt
1021gpr_hw0_offset(UInt archreg)
1022{
1023 return gpr_offset(archreg) + 0;
1024}
1025
1026/* Write half word #0 of a gpr to the guest state. */
1027static __inline__ void
1028put_gpr_hw0(UInt archreg, IRExpr *expr)
1029{
1030 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1031
1032 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1033}
1034
1035/* Read half word #0 of a gpr register. */
1036static __inline__ IRExpr *
1037get_gpr_hw0(UInt archreg)
1038{
1039 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1040}
1041
1042/* Return the guest state offset of byte #4 of a gpr register. */
1043static __inline__ UInt
1044gpr_b4_offset(UInt archreg)
1045{
1046 return gpr_offset(archreg) + 4;
1047}
1048
1049/* Write byte #4 of a gpr to the guest state. */
1050static __inline__ void
1051put_gpr_b4(UInt archreg, IRExpr *expr)
1052{
1053 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1054
1055 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1056}
1057
1058/* Read byte #4 of a gpr register. */
1059static __inline__ IRExpr *
1060get_gpr_b4(UInt archreg)
1061{
1062 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1063}
1064
1065/* Return the guest state offset of byte #1 of a gpr register. */
1066static __inline__ UInt
1067gpr_b1_offset(UInt archreg)
1068{
1069 return gpr_offset(archreg) + 1;
1070}
1071
1072/* Write byte #1 of a gpr to the guest state. */
1073static __inline__ void
1074put_gpr_b1(UInt archreg, IRExpr *expr)
1075{
1076 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1077
1078 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1079}
1080
1081/* Read byte #1 of a gpr register. */
1082static __inline__ IRExpr *
1083get_gpr_b1(UInt archreg)
1084{
1085 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1086}
1087
1088/* Return the guest state offset of half word #2 of a gpr register. */
1089static __inline__ UInt
1090gpr_hw2_offset(UInt archreg)
1091{
1092 return gpr_offset(archreg) + 4;
1093}
1094
1095/* Write half word #2 of a gpr to the guest state. */
1096static __inline__ void
1097put_gpr_hw2(UInt archreg, IRExpr *expr)
1098{
1099 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1100
1101 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1102}
1103
1104/* Read half word #2 of a gpr register. */
1105static __inline__ IRExpr *
1106get_gpr_hw2(UInt archreg)
1107{
1108 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1109}
1110
1111/* Return the guest state offset of byte #5 of a gpr register. */
1112static __inline__ UInt
1113gpr_b5_offset(UInt archreg)
1114{
1115 return gpr_offset(archreg) + 5;
1116}
1117
1118/* Write byte #5 of a gpr to the guest state. */
1119static __inline__ void
1120put_gpr_b5(UInt archreg, IRExpr *expr)
1121{
1122 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1123
1124 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1125}
1126
1127/* Read byte #5 of a gpr register. */
1128static __inline__ IRExpr *
1129get_gpr_b5(UInt archreg)
1130{
1131 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1132}
1133
1134/* Return the guest state offset of byte #2 of a gpr register. */
1135static __inline__ UInt
1136gpr_b2_offset(UInt archreg)
1137{
1138 return gpr_offset(archreg) + 2;
1139}
1140
1141/* Write byte #2 of a gpr to the guest state. */
1142static __inline__ void
1143put_gpr_b2(UInt archreg, IRExpr *expr)
1144{
1145 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1146
1147 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1148}
1149
1150/* Read byte #2 of a gpr register. */
1151static __inline__ IRExpr *
1152get_gpr_b2(UInt archreg)
1153{
1154 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1155}
1156
1157/* Return the guest state offset of the counter register. */
1158static UInt
1159counter_offset(void)
1160{
1161 return offsetof(VexGuestS390XState, guest_counter);
1162}
1163
1164/* Return the guest state offset of double word #0 of the counter register. */
1165static __inline__ UInt
1166counter_dw0_offset(void)
1167{
1168 return counter_offset() + 0;
1169}
1170
1171/* Write double word #0 of the counter to the guest state. */
1172static __inline__ void
1173put_counter_dw0(IRExpr *expr)
1174{
1175 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1176
1177 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1178}
1179
1180/* Read double word #0 of the counter register. */
1181static __inline__ IRExpr *
1182get_counter_dw0(void)
1183{
1184 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1185}
1186
1187/* Return the guest state offset of word #0 of the counter register. */
1188static __inline__ UInt
1189counter_w0_offset(void)
1190{
1191 return counter_offset() + 0;
1192}
1193
1194/* Return the guest state offset of word #1 of the counter register. */
1195static __inline__ UInt
1196counter_w1_offset(void)
1197{
1198 return counter_offset() + 4;
1199}
1200
1201/* Write word #0 of the counter to the guest state. */
1202static __inline__ void
1203put_counter_w0(IRExpr *expr)
1204{
1205 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1206
1207 stmt(IRStmt_Put(counter_w0_offset(), expr));
1208}
1209
1210/* Read word #0 of the counter register. */
1211static __inline__ IRExpr *
1212get_counter_w0(void)
1213{
1214 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1215}
1216
1217/* Write word #1 of the counter to the guest state. */
1218static __inline__ void
1219put_counter_w1(IRExpr *expr)
1220{
1221 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1222
1223 stmt(IRStmt_Put(counter_w1_offset(), expr));
1224}
1225
1226/* Read word #1 of the counter register. */
1227static __inline__ IRExpr *
1228get_counter_w1(void)
1229{
1230 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1231}
1232
1233/* Return the guest state offset of the fpc register. */
1234static UInt
1235fpc_offset(void)
1236{
1237 return offsetof(VexGuestS390XState, guest_fpc);
1238}
1239
1240/* Return the guest state offset of word #0 of the fpc register. */
1241static __inline__ UInt
1242fpc_w0_offset(void)
1243{
1244 return fpc_offset() + 0;
1245}
1246
1247/* Write word #0 of the fpc to the guest state. */
1248static __inline__ void
1249put_fpc_w0(IRExpr *expr)
1250{
1251 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1252
1253 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1254}
1255
1256/* Read word #0 of the fpc register. */
1257static __inline__ IRExpr *
1258get_fpc_w0(void)
1259{
1260 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1261}
1262
1263
1264/*------------------------------------------------------------*/
1265/*--- Build IR for formats ---*/
1266/*------------------------------------------------------------*/
1267static void
1268s390_format_I(HChar *(*irgen)(UChar i),
1269 UChar i)
1270{
1271 HChar *mnm = irgen(i);
1272
1273 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1274 s390_disasm(ENC2(MNM, UINT), mnm, i);
1275}
1276
1277static void
1278s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1279 UChar r1, UShort i2)
1280{
1281 irgen(r1, i2);
1282}
1283
1284static void
1285s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1286 UChar r1, UShort i2)
1287{
1288 HChar *mnm = irgen(r1, i2);
1289
1290 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1291 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1292}
1293
1294static void
1295s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1296 UChar r1, UShort i2)
1297{
1298 HChar *mnm = irgen(r1, i2);
1299
1300 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1301 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1302}
1303
1304static void
1305s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1306 UChar r1, UShort i2)
1307{
1308 HChar *mnm = irgen(r1, i2);
1309
1310 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1311 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1312}
1313
1314static void
1315s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1316 UChar r1, UChar r3, UShort i2)
1317{
1318 HChar *mnm = irgen(r1, r3, i2);
1319
1320 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1321 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1322}
1323
1324static void
1325s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1326 UChar r1, UChar r3, UShort i2)
1327{
1328 HChar *mnm = irgen(r1, r3, i2);
1329
1330 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1331 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1332}
1333
1334static void
1335s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1336 UChar i5),
1337 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1338{
1339 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1340
1341 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1342 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1343 i5);
1344}
1345
1346static void
1347s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1348 UChar r1, UChar r2, UShort i4, UChar m3)
1349{
1350 HChar *mnm = irgen(r1, r2, i4, m3);
1351
1352 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1353 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1354 r2, m3, (Int)(Short)i4);
1355}
1356
1357static void
1358s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1359 UChar r1, UChar m3, UShort i4, UChar i2)
1360{
1361 HChar *mnm = irgen(r1, m3, i4, i2);
1362
1363 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1364 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1365 r1, i2, m3, (Int)(Short)i4);
1366}
1367
1368static void
1369s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1370 UChar r1, UChar m3, UShort i4, UChar i2)
1371{
1372 HChar *mnm = irgen(r1, m3, i4, i2);
1373
1374 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1375 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1376 (Int)(Char)i2, m3, (Int)(Short)i4);
1377}
1378
1379static void
1380s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1381 UChar r1, UInt i2)
1382{
1383 irgen(r1, i2);
1384}
1385
1386static void
1387s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1388 UChar r1, UInt i2)
1389{
1390 HChar *mnm = irgen(r1, i2);
1391
1392 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1393 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1394}
1395
1396static void
1397s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1398 UChar r1, UInt i2)
1399{
1400 HChar *mnm = irgen(r1, i2);
1401
1402 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1403 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1404}
1405
1406static void
1407s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1408 UChar r1, UInt i2)
1409{
1410 HChar *mnm = irgen(r1, i2);
1411
1412 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1413 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1414}
1415
1416static void
1417s390_format_RIL_UP(HChar *(*irgen)(void),
1418 UChar r1, UInt i2)
1419{
1420 HChar *mnm = irgen();
1421
1422 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1423 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1424}
1425
1426static void
1427s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1428 IRTemp op4addr),
1429 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1430{
1431 HChar *mnm;
1432 IRTemp op4addr = newTemp(Ity_I64);
1433
1434 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1435 mkU64(0)));
1436
1437 mnm = irgen(r1, m3, i2, op4addr);
1438
1439 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1440 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1441 (Int)(Char)i2, m3, d4, 0, b4);
1442}
1443
1444static void
1445s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1446 IRTemp op4addr),
1447 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1448{
1449 HChar *mnm;
1450 IRTemp op4addr = newTemp(Ity_I64);
1451
1452 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1453 mkU64(0)));
1454
1455 mnm = irgen(r1, m3, i2, op4addr);
1456
1457 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1458 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1459 i2, m3, d4, 0, b4);
1460}
1461
1462static void
1463s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1464 UChar r1, UChar r2)
1465{
1466 irgen(r1, r2);
1467}
1468
1469static void
1470s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1471 UChar r1, UChar r2)
1472{
1473 HChar *mnm = irgen(r1, r2);
1474
1475 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1476 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1477}
1478
1479static void
1480s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1481 UChar r1, UChar r2)
1482{
1483 HChar *mnm = irgen(r1, r2);
1484
1485 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1486 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1487}
1488
1489static void
1490s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1491 UChar r1, UChar r2)
1492{
1493 irgen(r1, r2);
1494}
1495
1496static void
1497s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1498 UChar r1, UChar r2)
1499{
1500 HChar *mnm = irgen(r1, r2);
1501
1502 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1503 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1504}
1505
1506static void
1507s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1508 UChar r1, UChar r2)
1509{
1510 HChar *mnm = irgen(r1, r2);
1511
1512 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1513 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1514}
1515
1516static void
1517s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1518 UChar r1, UChar r2)
1519{
1520 HChar *mnm = irgen(r1, r2);
1521
1522 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1523 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1524}
1525
1526static void
1527s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1528 UChar r1, UChar r2)
1529{
1530 HChar *mnm = irgen(r1, r2);
1531
1532 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1533 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1534}
1535
1536static void
1537s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1538 UChar r1)
1539{
1540 HChar *mnm = irgen(r1);
1541
1542 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1543 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1544}
1545
1546static void
1547s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1548 UChar r1)
1549{
1550 HChar *mnm = irgen(r1);
1551
1552 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1553 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1554}
1555
1556static void
1557s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1558 UChar r1, UChar r3, UChar r2)
1559{
1560 HChar *mnm = irgen(r1, r3, r2);
1561
1562 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1563 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1564}
1565
1566static void
sewardjd7bde722011-04-05 13:19:33 +00001567s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1568 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1569{
1570 irgen(m3, r1, r2);
1571
1572 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1573 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1574}
1575
1576static void
sewardj2019a972011-03-07 16:04:07 +00001577s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1578 UChar r3, UChar r1, UChar r2)
1579{
1580 HChar *mnm = irgen(r3, r1, r2);
1581
1582 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1583 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1584}
1585
1586static void
1587s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1588 UChar r3, UChar r1, UChar r2)
1589{
1590 HChar *mnm = irgen(r3, r1, r2);
1591
1592 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1593 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1594}
1595
1596static void
1597s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1598 UChar r3, UChar r1, UChar r2)
1599{
1600 HChar *mnm = irgen(r3, r1, r2);
1601
1602 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1603 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1604}
1605
1606static void
1607s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1608 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1609{
1610 HChar *mnm;
1611 IRTemp op4addr = newTemp(Ity_I64);
1612
1613 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1614 mkU64(0)));
1615
1616 mnm = irgen(r1, r2, m3, op4addr);
1617
1618 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1619 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1620 r2, m3, d4, 0, b4);
1621}
1622
1623static void
1624s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1625 UChar r1, UChar b2, UShort d2)
1626{
1627 HChar *mnm;
1628 IRTemp op2addr = newTemp(Ity_I64);
1629
1630 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1631 mkU64(0)));
1632
1633 mnm = irgen(r1, op2addr);
1634
1635 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1636 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1637}
1638
1639static void
1640s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1641 UChar r1, UChar r3, UChar b2, UShort d2)
1642{
1643 HChar *mnm;
1644 IRTemp op2addr = newTemp(Ity_I64);
1645
1646 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1647 mkU64(0)));
1648
1649 mnm = irgen(r1, r3, op2addr);
1650
1651 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1652 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1653}
1654
1655static void
1656s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1657 UChar r1, UChar r3, UChar b2, UShort d2)
1658{
1659 HChar *mnm;
1660 IRTemp op2addr = newTemp(Ity_I64);
1661
1662 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1663 mkU64(0)));
1664
1665 mnm = irgen(r1, r3, op2addr);
1666
1667 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1668 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1669}
1670
1671static void
1672s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1673 UChar r1, UChar r3, UChar b2, UShort d2)
1674{
1675 HChar *mnm;
1676 IRTemp op2addr = newTemp(Ity_I64);
1677
1678 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1679 mkU64(0)));
1680
1681 mnm = irgen(r1, r3, op2addr);
1682
1683 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1684 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1685}
1686
1687static void
1688s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1689 UChar r1, UChar r3, UShort i2)
1690{
1691 HChar *mnm = irgen(r1, r3, i2);
1692
1693 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1694 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1695}
1696
1697static void
1698s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1699 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1700{
1701 HChar *mnm;
1702 IRTemp op2addr = newTemp(Ity_I64);
1703 IRTemp d2 = newTemp(Ity_I64);
1704
1705 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1706 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1707 mkU64(0)));
1708
1709 mnm = irgen(r1, r3, op2addr);
1710
1711 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1712 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1713}
1714
1715static void
1716s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1717 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1718{
1719 HChar *mnm;
1720 IRTemp op2addr = newTemp(Ity_I64);
1721 IRTemp d2 = newTemp(Ity_I64);
1722
1723 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1724 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1725 mkU64(0)));
1726
1727 mnm = irgen(r1, r3, op2addr);
1728
1729 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1730 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1731}
1732
1733static void
1734s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1735 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1736{
1737 HChar *mnm;
1738 IRTemp op2addr = newTemp(Ity_I64);
1739 IRTemp d2 = newTemp(Ity_I64);
1740
1741 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1742 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1743 mkU64(0)));
1744
1745 mnm = irgen(r1, r3, op2addr);
1746
1747 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1748 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1749}
1750
1751static void
sewardjd7bde722011-04-05 13:19:33 +00001752s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1753 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1754 Int xmnm_kind)
1755{
1756 IRTemp op2addr = newTemp(Ity_I64);
1757 IRTemp d2 = newTemp(Ity_I64);
1758
1759 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1760 guest_IA_next_instr);
1761 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1762 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1763 mkU64(0)));
1764
1765 irgen(r1, op2addr);
1766
1767 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1768 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1769}
1770
1771static void
sewardj2019a972011-03-07 16:04:07 +00001772s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1773 IRTemp op2addr),
1774 UChar r1, UChar x2, UChar b2, UShort d2)
1775{
1776 IRTemp op2addr = newTemp(Ity_I64);
1777
1778 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1779 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1780 mkU64(0)));
1781
1782 irgen(r1, x2, b2, d2, op2addr);
1783}
1784
1785static void
1786s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1787 UChar r1, UChar x2, UChar b2, UShort d2)
1788{
1789 HChar *mnm;
1790 IRTemp op2addr = newTemp(Ity_I64);
1791
1792 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1793 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1794 mkU64(0)));
1795
1796 mnm = irgen(r1, op2addr);
1797
1798 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1799 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1800}
1801
1802static void
1803s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1804 UChar r1, UChar x2, UChar b2, UShort d2)
1805{
1806 HChar *mnm;
1807 IRTemp op2addr = newTemp(Ity_I64);
1808
1809 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1810 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1811 mkU64(0)));
1812
1813 mnm = irgen(r1, op2addr);
1814
1815 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1816 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1817}
1818
1819static void
1820s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1821 UChar r1, UChar x2, UChar b2, UShort d2)
1822{
1823 HChar *mnm;
1824 IRTemp op2addr = newTemp(Ity_I64);
1825
1826 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1827 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1828 mkU64(0)));
1829
1830 mnm = irgen(r1, op2addr);
1831
1832 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1833 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1834}
1835
1836static void
1837s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1838 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1839{
1840 HChar *mnm;
1841 IRTemp op2addr = newTemp(Ity_I64);
1842
1843 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1844 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1845 mkU64(0)));
1846
1847 mnm = irgen(r3, op2addr, r1);
1848
1849 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1850 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1851}
1852
1853static void
1854s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1855 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1856{
1857 HChar *mnm;
1858 IRTemp op2addr = newTemp(Ity_I64);
1859 IRTemp d2 = newTemp(Ity_I64);
1860
1861 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1862 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1863 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1864 mkU64(0)));
1865
1866 mnm = irgen(r1, op2addr);
1867
1868 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1869 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1870}
1871
1872static void
1873s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1874 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1875{
1876 HChar *mnm;
1877 IRTemp op2addr = newTemp(Ity_I64);
1878 IRTemp d2 = newTemp(Ity_I64);
1879
1880 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1881 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1882 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1883 mkU64(0)));
1884
1885 mnm = irgen(r1, op2addr);
1886
1887 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1888 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1889}
1890
1891static void
1892s390_format_RXY_URRD(HChar *(*irgen)(void),
1893 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1894{
1895 HChar *mnm;
1896 IRTemp op2addr = newTemp(Ity_I64);
1897 IRTemp d2 = newTemp(Ity_I64);
1898
1899 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1900 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1901 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1902 mkU64(0)));
1903
1904 mnm = irgen();
1905
1906 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1907 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1908}
1909
1910static void
1911s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1912 UChar b2, UShort d2)
1913{
1914 HChar *mnm;
1915 IRTemp op2addr = newTemp(Ity_I64);
1916
1917 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1918 mkU64(0)));
1919
1920 mnm = irgen(op2addr);
1921
1922 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1923 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1924}
1925
1926static void
1927s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1928 UChar i2, UChar b1, UShort d1)
1929{
1930 HChar *mnm;
1931 IRTemp op1addr = newTemp(Ity_I64);
1932
1933 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1934 mkU64(0)));
1935
1936 mnm = irgen(i2, op1addr);
1937
1938 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1939 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1940}
1941
1942static void
1943s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1944 UChar i2, UChar b1, UShort dl1, UChar dh1)
1945{
1946 HChar *mnm;
1947 IRTemp op1addr = newTemp(Ity_I64);
1948 IRTemp d1 = newTemp(Ity_I64);
1949
1950 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1951 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1952 mkU64(0)));
1953
1954 mnm = irgen(i2, op1addr);
1955
1956 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1957 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1958}
1959
1960static void
1961s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1962 UChar i2, UChar b1, UShort dl1, UChar dh1)
1963{
1964 HChar *mnm;
1965 IRTemp op1addr = newTemp(Ity_I64);
1966 IRTemp d1 = newTemp(Ity_I64);
1967
1968 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1969 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1970 mkU64(0)));
1971
1972 mnm = irgen(i2, op1addr);
1973
1974 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1975 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
1976}
1977
1978static void
1979s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
1980 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
1981{
1982 HChar *mnm;
1983 IRTemp op1addr = newTemp(Ity_I64);
1984 IRTemp op2addr = newTemp(Ity_I64);
1985
1986 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1987 mkU64(0)));
1988 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1989 mkU64(0)));
1990
1991 mnm = irgen(l, op1addr, op2addr);
1992
1993 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1994 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
1995}
1996
1997static void
1998s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
1999 UChar b1, UShort d1, UShort i2)
2000{
2001 HChar *mnm;
2002 IRTemp op1addr = newTemp(Ity_I64);
2003
2004 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2005 mkU64(0)));
2006
2007 mnm = irgen(i2, op1addr);
2008
2009 if (unlikely(vex_traceflags & VEX_TRACE_FE))
2010 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2011}
2012
2013static void
2014s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2015 UChar b1, UShort d1, UShort i2)
2016{
2017 HChar *mnm;
2018 IRTemp op1addr = newTemp(Ity_I64);
2019
2020 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2021 mkU64(0)));
2022
2023 mnm = irgen(i2, op1addr);
2024
2025 if (unlikely(vex_traceflags & VEX_TRACE_FE))
2026 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2027}
2028
2029
2030
2031/*------------------------------------------------------------*/
2032/*--- Build IR for opcodes ---*/
2033/*------------------------------------------------------------*/
2034
2035static HChar *
2036s390_irgen_AR(UChar r1, UChar r2)
2037{
2038 IRTemp op1 = newTemp(Ity_I32);
2039 IRTemp op2 = newTemp(Ity_I32);
2040 IRTemp result = newTemp(Ity_I32);
2041
2042 assign(op1, get_gpr_w1(r1));
2043 assign(op2, get_gpr_w1(r2));
2044 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2045 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2046 put_gpr_w1(r1, mkexpr(result));
2047
2048 return "ar";
2049}
2050
2051static HChar *
2052s390_irgen_AGR(UChar r1, UChar r2)
2053{
2054 IRTemp op1 = newTemp(Ity_I64);
2055 IRTemp op2 = newTemp(Ity_I64);
2056 IRTemp result = newTemp(Ity_I64);
2057
2058 assign(op1, get_gpr_dw0(r1));
2059 assign(op2, get_gpr_dw0(r2));
2060 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2061 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2062 put_gpr_dw0(r1, mkexpr(result));
2063
2064 return "agr";
2065}
2066
2067static HChar *
2068s390_irgen_AGFR(UChar r1, UChar r2)
2069{
2070 IRTemp op1 = newTemp(Ity_I64);
2071 IRTemp op2 = newTemp(Ity_I64);
2072 IRTemp result = newTemp(Ity_I64);
2073
2074 assign(op1, get_gpr_dw0(r1));
2075 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2076 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2077 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2078 put_gpr_dw0(r1, mkexpr(result));
2079
2080 return "agfr";
2081}
2082
2083static HChar *
2084s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2085{
2086 IRTemp op2 = newTemp(Ity_I32);
2087 IRTemp op3 = newTemp(Ity_I32);
2088 IRTemp result = newTemp(Ity_I32);
2089
2090 assign(op2, get_gpr_w1(r2));
2091 assign(op3, get_gpr_w1(r3));
2092 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2093 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2094 put_gpr_w1(r1, mkexpr(result));
2095
2096 return "ark";
2097}
2098
2099static HChar *
2100s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2101{
2102 IRTemp op2 = newTemp(Ity_I64);
2103 IRTemp op3 = newTemp(Ity_I64);
2104 IRTemp result = newTemp(Ity_I64);
2105
2106 assign(op2, get_gpr_dw0(r2));
2107 assign(op3, get_gpr_dw0(r3));
2108 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2109 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2110 put_gpr_dw0(r1, mkexpr(result));
2111
2112 return "agrk";
2113}
2114
2115static HChar *
2116s390_irgen_A(UChar r1, IRTemp op2addr)
2117{
2118 IRTemp op1 = newTemp(Ity_I32);
2119 IRTemp op2 = newTemp(Ity_I32);
2120 IRTemp result = newTemp(Ity_I32);
2121
2122 assign(op1, get_gpr_w1(r1));
2123 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2124 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2125 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2126 put_gpr_w1(r1, mkexpr(result));
2127
2128 return "a";
2129}
2130
2131static HChar *
2132s390_irgen_AY(UChar r1, IRTemp op2addr)
2133{
2134 IRTemp op1 = newTemp(Ity_I32);
2135 IRTemp op2 = newTemp(Ity_I32);
2136 IRTemp result = newTemp(Ity_I32);
2137
2138 assign(op1, get_gpr_w1(r1));
2139 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2140 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2141 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2142 put_gpr_w1(r1, mkexpr(result));
2143
2144 return "ay";
2145}
2146
2147static HChar *
2148s390_irgen_AG(UChar r1, IRTemp op2addr)
2149{
2150 IRTemp op1 = newTemp(Ity_I64);
2151 IRTemp op2 = newTemp(Ity_I64);
2152 IRTemp result = newTemp(Ity_I64);
2153
2154 assign(op1, get_gpr_dw0(r1));
2155 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2156 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2157 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2158 put_gpr_dw0(r1, mkexpr(result));
2159
2160 return "ag";
2161}
2162
2163static HChar *
2164s390_irgen_AGF(UChar r1, IRTemp op2addr)
2165{
2166 IRTemp op1 = newTemp(Ity_I64);
2167 IRTemp op2 = newTemp(Ity_I64);
2168 IRTemp result = newTemp(Ity_I64);
2169
2170 assign(op1, get_gpr_dw0(r1));
2171 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2172 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2173 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2174 put_gpr_dw0(r1, mkexpr(result));
2175
2176 return "agf";
2177}
2178
2179static HChar *
2180s390_irgen_AFI(UChar r1, UInt i2)
2181{
2182 IRTemp op1 = newTemp(Ity_I32);
2183 Int op2;
2184 IRTemp result = newTemp(Ity_I32);
2185
2186 assign(op1, get_gpr_w1(r1));
2187 op2 = (Int)i2;
2188 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2189 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2190 mkU32((UInt)op2)));
2191 put_gpr_w1(r1, mkexpr(result));
2192
2193 return "afi";
2194}
2195
2196static HChar *
2197s390_irgen_AGFI(UChar r1, UInt i2)
2198{
2199 IRTemp op1 = newTemp(Ity_I64);
2200 Long op2;
2201 IRTemp result = newTemp(Ity_I64);
2202
2203 assign(op1, get_gpr_dw0(r1));
2204 op2 = (Long)(Int)i2;
2205 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2206 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2207 mkU64((ULong)op2)));
2208 put_gpr_dw0(r1, mkexpr(result));
2209
2210 return "agfi";
2211}
2212
2213static HChar *
2214s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2215{
2216 Int op2;
2217 IRTemp op3 = newTemp(Ity_I32);
2218 IRTemp result = newTemp(Ity_I32);
2219
2220 op2 = (Int)(Short)i2;
2221 assign(op3, get_gpr_w1(r3));
2222 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2223 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2224 op2)), op3);
2225 put_gpr_w1(r1, mkexpr(result));
2226
2227 return "ahik";
2228}
2229
2230static HChar *
2231s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2232{
2233 Long op2;
2234 IRTemp op3 = newTemp(Ity_I64);
2235 IRTemp result = newTemp(Ity_I64);
2236
2237 op2 = (Long)(Short)i2;
2238 assign(op3, get_gpr_dw0(r3));
2239 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2240 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2241 op2)), op3);
2242 put_gpr_dw0(r1, mkexpr(result));
2243
2244 return "aghik";
2245}
2246
2247static HChar *
2248s390_irgen_ASI(UChar i2, IRTemp op1addr)
2249{
2250 IRTemp op1 = newTemp(Ity_I32);
2251 Int op2;
2252 IRTemp result = newTemp(Ity_I32);
2253
2254 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2255 op2 = (Int)(Char)i2;
2256 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2257 store(mkexpr(op1addr), mkexpr(result));
2258 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2259 mkU32((UInt)op2)));
2260
2261 return "asi";
2262}
2263
2264static HChar *
2265s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2266{
2267 IRTemp op1 = newTemp(Ity_I64);
2268 Long op2;
2269 IRTemp result = newTemp(Ity_I64);
2270
2271 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2272 op2 = (Long)(Char)i2;
2273 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2274 store(mkexpr(op1addr), mkexpr(result));
2275 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2276 mkU64((ULong)op2)));
2277
2278 return "agsi";
2279}
2280
2281static HChar *
2282s390_irgen_AH(UChar r1, IRTemp op2addr)
2283{
2284 IRTemp op1 = newTemp(Ity_I32);
2285 IRTemp op2 = newTemp(Ity_I32);
2286 IRTemp result = newTemp(Ity_I32);
2287
2288 assign(op1, get_gpr_w1(r1));
2289 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2290 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2291 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2292 put_gpr_w1(r1, mkexpr(result));
2293
2294 return "ah";
2295}
2296
2297static HChar *
2298s390_irgen_AHY(UChar r1, IRTemp op2addr)
2299{
2300 IRTemp op1 = newTemp(Ity_I32);
2301 IRTemp op2 = newTemp(Ity_I32);
2302 IRTemp result = newTemp(Ity_I32);
2303
2304 assign(op1, get_gpr_w1(r1));
2305 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2306 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2307 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2308 put_gpr_w1(r1, mkexpr(result));
2309
2310 return "ahy";
2311}
2312
2313static HChar *
2314s390_irgen_AHI(UChar r1, UShort i2)
2315{
2316 IRTemp op1 = newTemp(Ity_I32);
2317 Int op2;
2318 IRTemp result = newTemp(Ity_I32);
2319
2320 assign(op1, get_gpr_w1(r1));
2321 op2 = (Int)(Short)i2;
2322 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2323 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2324 mkU32((UInt)op2)));
2325 put_gpr_w1(r1, mkexpr(result));
2326
2327 return "ahi";
2328}
2329
2330static HChar *
2331s390_irgen_AGHI(UChar r1, UShort i2)
2332{
2333 IRTemp op1 = newTemp(Ity_I64);
2334 Long op2;
2335 IRTemp result = newTemp(Ity_I64);
2336
2337 assign(op1, get_gpr_dw0(r1));
2338 op2 = (Long)(Short)i2;
2339 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2340 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2341 mkU64((ULong)op2)));
2342 put_gpr_dw0(r1, mkexpr(result));
2343
2344 return "aghi";
2345}
2346
2347static HChar *
2348s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2349{
2350 IRTemp op2 = newTemp(Ity_I32);
2351 IRTemp op3 = newTemp(Ity_I32);
2352 IRTemp result = newTemp(Ity_I32);
2353
2354 assign(op2, get_gpr_w0(r2));
2355 assign(op3, get_gpr_w0(r3));
2356 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2357 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2358 put_gpr_w0(r1, mkexpr(result));
2359
2360 return "ahhhr";
2361}
2362
2363static HChar *
2364s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2365{
2366 IRTemp op2 = newTemp(Ity_I32);
2367 IRTemp op3 = newTemp(Ity_I32);
2368 IRTemp result = newTemp(Ity_I32);
2369
2370 assign(op2, get_gpr_w0(r2));
2371 assign(op3, get_gpr_w1(r3));
2372 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2373 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2374 put_gpr_w0(r1, mkexpr(result));
2375
2376 return "ahhlr";
2377}
2378
2379static HChar *
2380s390_irgen_AIH(UChar r1, UInt i2)
2381{
2382 IRTemp op1 = newTemp(Ity_I32);
2383 Int op2;
2384 IRTemp result = newTemp(Ity_I32);
2385
2386 assign(op1, get_gpr_w0(r1));
2387 op2 = (Int)i2;
2388 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2389 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2390 mkU32((UInt)op2)));
2391 put_gpr_w0(r1, mkexpr(result));
2392
2393 return "aih";
2394}
2395
2396static HChar *
2397s390_irgen_ALR(UChar r1, UChar r2)
2398{
2399 IRTemp op1 = newTemp(Ity_I32);
2400 IRTemp op2 = newTemp(Ity_I32);
2401 IRTemp result = newTemp(Ity_I32);
2402
2403 assign(op1, get_gpr_w1(r1));
2404 assign(op2, get_gpr_w1(r2));
2405 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2406 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2407 put_gpr_w1(r1, mkexpr(result));
2408
2409 return "alr";
2410}
2411
2412static HChar *
2413s390_irgen_ALGR(UChar r1, UChar r2)
2414{
2415 IRTemp op1 = newTemp(Ity_I64);
2416 IRTemp op2 = newTemp(Ity_I64);
2417 IRTemp result = newTemp(Ity_I64);
2418
2419 assign(op1, get_gpr_dw0(r1));
2420 assign(op2, get_gpr_dw0(r2));
2421 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2422 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2423 put_gpr_dw0(r1, mkexpr(result));
2424
2425 return "algr";
2426}
2427
2428static HChar *
2429s390_irgen_ALGFR(UChar r1, UChar r2)
2430{
2431 IRTemp op1 = newTemp(Ity_I64);
2432 IRTemp op2 = newTemp(Ity_I64);
2433 IRTemp result = newTemp(Ity_I64);
2434
2435 assign(op1, get_gpr_dw0(r1));
2436 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2437 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2438 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2439 put_gpr_dw0(r1, mkexpr(result));
2440
2441 return "algfr";
2442}
2443
2444static HChar *
2445s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2446{
2447 IRTemp op2 = newTemp(Ity_I32);
2448 IRTemp op3 = newTemp(Ity_I32);
2449 IRTemp result = newTemp(Ity_I32);
2450
2451 assign(op2, get_gpr_w1(r2));
2452 assign(op3, get_gpr_w1(r3));
2453 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2454 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2455 put_gpr_w1(r1, mkexpr(result));
2456
2457 return "alrk";
2458}
2459
2460static HChar *
2461s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2462{
2463 IRTemp op2 = newTemp(Ity_I64);
2464 IRTemp op3 = newTemp(Ity_I64);
2465 IRTemp result = newTemp(Ity_I64);
2466
2467 assign(op2, get_gpr_dw0(r2));
2468 assign(op3, get_gpr_dw0(r3));
2469 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2470 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2471 put_gpr_dw0(r1, mkexpr(result));
2472
2473 return "algrk";
2474}
2475
2476static HChar *
2477s390_irgen_AL(UChar r1, IRTemp op2addr)
2478{
2479 IRTemp op1 = newTemp(Ity_I32);
2480 IRTemp op2 = newTemp(Ity_I32);
2481 IRTemp result = newTemp(Ity_I32);
2482
2483 assign(op1, get_gpr_w1(r1));
2484 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2485 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2486 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2487 put_gpr_w1(r1, mkexpr(result));
2488
2489 return "al";
2490}
2491
2492static HChar *
2493s390_irgen_ALY(UChar r1, IRTemp op2addr)
2494{
2495 IRTemp op1 = newTemp(Ity_I32);
2496 IRTemp op2 = newTemp(Ity_I32);
2497 IRTemp result = newTemp(Ity_I32);
2498
2499 assign(op1, get_gpr_w1(r1));
2500 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2501 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2502 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2503 put_gpr_w1(r1, mkexpr(result));
2504
2505 return "aly";
2506}
2507
2508static HChar *
2509s390_irgen_ALG(UChar r1, IRTemp op2addr)
2510{
2511 IRTemp op1 = newTemp(Ity_I64);
2512 IRTemp op2 = newTemp(Ity_I64);
2513 IRTemp result = newTemp(Ity_I64);
2514
2515 assign(op1, get_gpr_dw0(r1));
2516 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2517 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2518 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2519 put_gpr_dw0(r1, mkexpr(result));
2520
2521 return "alg";
2522}
2523
2524static HChar *
2525s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2526{
2527 IRTemp op1 = newTemp(Ity_I64);
2528 IRTemp op2 = newTemp(Ity_I64);
2529 IRTemp result = newTemp(Ity_I64);
2530
2531 assign(op1, get_gpr_dw0(r1));
2532 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2533 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2534 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2535 put_gpr_dw0(r1, mkexpr(result));
2536
2537 return "algf";
2538}
2539
2540static HChar *
2541s390_irgen_ALFI(UChar r1, UInt i2)
2542{
2543 IRTemp op1 = newTemp(Ity_I32);
2544 UInt op2;
2545 IRTemp result = newTemp(Ity_I32);
2546
2547 assign(op1, get_gpr_w1(r1));
2548 op2 = i2;
2549 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2550 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2551 mkU32(op2)));
2552 put_gpr_w1(r1, mkexpr(result));
2553
2554 return "alfi";
2555}
2556
2557static HChar *
2558s390_irgen_ALGFI(UChar r1, UInt i2)
2559{
2560 IRTemp op1 = newTemp(Ity_I64);
2561 ULong op2;
2562 IRTemp result = newTemp(Ity_I64);
2563
2564 assign(op1, get_gpr_dw0(r1));
2565 op2 = (ULong)i2;
2566 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2567 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2568 mkU64(op2)));
2569 put_gpr_dw0(r1, mkexpr(result));
2570
2571 return "algfi";
2572}
2573
2574static HChar *
2575s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2576{
2577 IRTemp op2 = newTemp(Ity_I32);
2578 IRTemp op3 = newTemp(Ity_I32);
2579 IRTemp result = newTemp(Ity_I32);
2580
2581 assign(op2, get_gpr_w0(r2));
2582 assign(op3, get_gpr_w0(r3));
2583 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2584 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2585 put_gpr_w0(r1, mkexpr(result));
2586
2587 return "alhhhr";
2588}
2589
2590static HChar *
2591s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2592{
2593 IRTemp op2 = newTemp(Ity_I32);
2594 IRTemp op3 = newTemp(Ity_I32);
2595 IRTemp result = newTemp(Ity_I32);
2596
2597 assign(op2, get_gpr_w0(r2));
2598 assign(op3, get_gpr_w1(r3));
2599 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2600 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2601 put_gpr_w0(r1, mkexpr(result));
2602
2603 return "alhhlr";
2604}
2605
2606static HChar *
2607s390_irgen_ALCR(UChar r1, UChar r2)
2608{
2609 IRTemp op1 = newTemp(Ity_I32);
2610 IRTemp op2 = newTemp(Ity_I32);
2611 IRTemp result = newTemp(Ity_I32);
2612 IRTemp carry_in = newTemp(Ity_I32);
2613
2614 assign(op1, get_gpr_w1(r1));
2615 assign(op2, get_gpr_w1(r2));
2616 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2617 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2618 mkexpr(carry_in)));
2619 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2620 put_gpr_w1(r1, mkexpr(result));
2621
2622 return "alcr";
2623}
2624
2625static HChar *
2626s390_irgen_ALCGR(UChar r1, UChar r2)
2627{
2628 IRTemp op1 = newTemp(Ity_I64);
2629 IRTemp op2 = newTemp(Ity_I64);
2630 IRTemp result = newTemp(Ity_I64);
2631 IRTemp carry_in = newTemp(Ity_I64);
2632
2633 assign(op1, get_gpr_dw0(r1));
2634 assign(op2, get_gpr_dw0(r2));
2635 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2636 mkU8(1))));
2637 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2638 mkexpr(carry_in)));
2639 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2640 put_gpr_dw0(r1, mkexpr(result));
2641
2642 return "alcgr";
2643}
2644
2645static HChar *
2646s390_irgen_ALC(UChar r1, IRTemp op2addr)
2647{
2648 IRTemp op1 = newTemp(Ity_I32);
2649 IRTemp op2 = newTemp(Ity_I32);
2650 IRTemp result = newTemp(Ity_I32);
2651 IRTemp carry_in = newTemp(Ity_I32);
2652
2653 assign(op1, get_gpr_w1(r1));
2654 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2655 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2656 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2657 mkexpr(carry_in)));
2658 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2659 put_gpr_w1(r1, mkexpr(result));
2660
2661 return "alc";
2662}
2663
2664static HChar *
2665s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2666{
2667 IRTemp op1 = newTemp(Ity_I64);
2668 IRTemp op2 = newTemp(Ity_I64);
2669 IRTemp result = newTemp(Ity_I64);
2670 IRTemp carry_in = newTemp(Ity_I64);
2671
2672 assign(op1, get_gpr_dw0(r1));
2673 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2674 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2675 mkU8(1))));
2676 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2677 mkexpr(carry_in)));
2678 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2679 put_gpr_dw0(r1, mkexpr(result));
2680
2681 return "alcg";
2682}
2683
2684static HChar *
2685s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2686{
2687 IRTemp op1 = newTemp(Ity_I32);
2688 UInt op2;
2689 IRTemp result = newTemp(Ity_I32);
2690
2691 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2692 op2 = (UInt)(Int)(Char)i2;
2693 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2694 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2695 mkU32(op2)));
2696 store(mkexpr(op1addr), mkexpr(result));
2697
2698 return "alsi";
2699}
2700
2701static HChar *
2702s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2703{
2704 IRTemp op1 = newTemp(Ity_I64);
2705 ULong op2;
2706 IRTemp result = newTemp(Ity_I64);
2707
2708 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2709 op2 = (ULong)(Long)(Char)i2;
2710 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2711 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2712 mkU64(op2)));
2713 store(mkexpr(op1addr), mkexpr(result));
2714
2715 return "algsi";
2716}
2717
2718static HChar *
2719s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2720{
2721 UInt op2;
2722 IRTemp op3 = newTemp(Ity_I32);
2723 IRTemp result = newTemp(Ity_I32);
2724
2725 op2 = (UInt)(Int)(Short)i2;
2726 assign(op3, get_gpr_w1(r3));
2727 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2728 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2729 op3);
2730 put_gpr_w1(r1, mkexpr(result));
2731
2732 return "alhsik";
2733}
2734
2735static HChar *
2736s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2737{
2738 ULong op2;
2739 IRTemp op3 = newTemp(Ity_I64);
2740 IRTemp result = newTemp(Ity_I64);
2741
2742 op2 = (ULong)(Long)(Short)i2;
2743 assign(op3, get_gpr_dw0(r3));
2744 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2745 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2746 op3);
2747 put_gpr_dw0(r1, mkexpr(result));
2748
2749 return "alghsik";
2750}
2751
2752static HChar *
2753s390_irgen_ALSIH(UChar r1, UInt i2)
2754{
2755 IRTemp op1 = newTemp(Ity_I32);
2756 UInt op2;
2757 IRTemp result = newTemp(Ity_I32);
2758
2759 assign(op1, get_gpr_w0(r1));
2760 op2 = i2;
2761 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2762 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2763 mkU32(op2)));
2764 put_gpr_w0(r1, mkexpr(result));
2765
2766 return "alsih";
2767}
2768
2769static HChar *
2770s390_irgen_ALSIHN(UChar r1, UInt i2)
2771{
2772 IRTemp op1 = newTemp(Ity_I32);
2773 UInt op2;
2774 IRTemp result = newTemp(Ity_I32);
2775
2776 assign(op1, get_gpr_w0(r1));
2777 op2 = i2;
2778 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2779 put_gpr_w0(r1, mkexpr(result));
2780
2781 return "alsihn";
2782}
2783
2784static HChar *
2785s390_irgen_NR(UChar r1, UChar r2)
2786{
2787 IRTemp op1 = newTemp(Ity_I32);
2788 IRTemp op2 = newTemp(Ity_I32);
2789 IRTemp result = newTemp(Ity_I32);
2790
2791 assign(op1, get_gpr_w1(r1));
2792 assign(op2, get_gpr_w1(r2));
2793 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2794 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2795 put_gpr_w1(r1, mkexpr(result));
2796
2797 return "nr";
2798}
2799
2800static HChar *
2801s390_irgen_NGR(UChar r1, UChar r2)
2802{
2803 IRTemp op1 = newTemp(Ity_I64);
2804 IRTemp op2 = newTemp(Ity_I64);
2805 IRTemp result = newTemp(Ity_I64);
2806
2807 assign(op1, get_gpr_dw0(r1));
2808 assign(op2, get_gpr_dw0(r2));
2809 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2810 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2811 put_gpr_dw0(r1, mkexpr(result));
2812
2813 return "ngr";
2814}
2815
2816static HChar *
2817s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2818{
2819 IRTemp op2 = newTemp(Ity_I32);
2820 IRTemp op3 = newTemp(Ity_I32);
2821 IRTemp result = newTemp(Ity_I32);
2822
2823 assign(op2, get_gpr_w1(r2));
2824 assign(op3, get_gpr_w1(r3));
2825 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2826 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2827 put_gpr_w1(r1, mkexpr(result));
2828
2829 return "nrk";
2830}
2831
2832static HChar *
2833s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2834{
2835 IRTemp op2 = newTemp(Ity_I64);
2836 IRTemp op3 = newTemp(Ity_I64);
2837 IRTemp result = newTemp(Ity_I64);
2838
2839 assign(op2, get_gpr_dw0(r2));
2840 assign(op3, get_gpr_dw0(r3));
2841 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2842 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2843 put_gpr_dw0(r1, mkexpr(result));
2844
2845 return "ngrk";
2846}
2847
2848static HChar *
2849s390_irgen_N(UChar r1, IRTemp op2addr)
2850{
2851 IRTemp op1 = newTemp(Ity_I32);
2852 IRTemp op2 = newTemp(Ity_I32);
2853 IRTemp result = newTemp(Ity_I32);
2854
2855 assign(op1, get_gpr_w1(r1));
2856 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2857 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2858 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2859 put_gpr_w1(r1, mkexpr(result));
2860
2861 return "n";
2862}
2863
2864static HChar *
2865s390_irgen_NY(UChar r1, IRTemp op2addr)
2866{
2867 IRTemp op1 = newTemp(Ity_I32);
2868 IRTemp op2 = newTemp(Ity_I32);
2869 IRTemp result = newTemp(Ity_I32);
2870
2871 assign(op1, get_gpr_w1(r1));
2872 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2873 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2874 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2875 put_gpr_w1(r1, mkexpr(result));
2876
2877 return "ny";
2878}
2879
2880static HChar *
2881s390_irgen_NG(UChar r1, IRTemp op2addr)
2882{
2883 IRTemp op1 = newTemp(Ity_I64);
2884 IRTemp op2 = newTemp(Ity_I64);
2885 IRTemp result = newTemp(Ity_I64);
2886
2887 assign(op1, get_gpr_dw0(r1));
2888 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2889 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2890 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2891 put_gpr_dw0(r1, mkexpr(result));
2892
2893 return "ng";
2894}
2895
2896static HChar *
2897s390_irgen_NI(UChar i2, IRTemp op1addr)
2898{
2899 IRTemp op1 = newTemp(Ity_I8);
2900 UChar op2;
2901 IRTemp result = newTemp(Ity_I8);
2902
2903 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2904 op2 = i2;
2905 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2906 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2907 store(mkexpr(op1addr), mkexpr(result));
2908
2909 return "ni";
2910}
2911
2912static HChar *
2913s390_irgen_NIY(UChar i2, IRTemp op1addr)
2914{
2915 IRTemp op1 = newTemp(Ity_I8);
2916 UChar op2;
2917 IRTemp result = newTemp(Ity_I8);
2918
2919 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2920 op2 = i2;
2921 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2922 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2923 store(mkexpr(op1addr), mkexpr(result));
2924
2925 return "niy";
2926}
2927
2928static HChar *
2929s390_irgen_NIHF(UChar r1, UInt i2)
2930{
2931 IRTemp op1 = newTemp(Ity_I32);
2932 UInt op2;
2933 IRTemp result = newTemp(Ity_I32);
2934
2935 assign(op1, get_gpr_w0(r1));
2936 op2 = i2;
2937 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2938 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2939 put_gpr_w0(r1, mkexpr(result));
2940
2941 return "nihf";
2942}
2943
2944static HChar *
2945s390_irgen_NIHH(UChar r1, UShort i2)
2946{
2947 IRTemp op1 = newTemp(Ity_I16);
2948 UShort op2;
2949 IRTemp result = newTemp(Ity_I16);
2950
2951 assign(op1, get_gpr_hw0(r1));
2952 op2 = i2;
2953 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2954 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2955 put_gpr_hw0(r1, mkexpr(result));
2956
2957 return "nihh";
2958}
2959
2960static HChar *
2961s390_irgen_NIHL(UChar r1, UShort i2)
2962{
2963 IRTemp op1 = newTemp(Ity_I16);
2964 UShort op2;
2965 IRTemp result = newTemp(Ity_I16);
2966
2967 assign(op1, get_gpr_hw1(r1));
2968 op2 = i2;
2969 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2970 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2971 put_gpr_hw1(r1, mkexpr(result));
2972
2973 return "nihl";
2974}
2975
2976static HChar *
2977s390_irgen_NILF(UChar r1, UInt i2)
2978{
2979 IRTemp op1 = newTemp(Ity_I32);
2980 UInt op2;
2981 IRTemp result = newTemp(Ity_I32);
2982
2983 assign(op1, get_gpr_w1(r1));
2984 op2 = i2;
2985 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2986 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2987 put_gpr_w1(r1, mkexpr(result));
2988
2989 return "nilf";
2990}
2991
2992static HChar *
2993s390_irgen_NILH(UChar r1, UShort i2)
2994{
2995 IRTemp op1 = newTemp(Ity_I16);
2996 UShort op2;
2997 IRTemp result = newTemp(Ity_I16);
2998
2999 assign(op1, get_gpr_hw2(r1));
3000 op2 = i2;
3001 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3002 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3003 put_gpr_hw2(r1, mkexpr(result));
3004
3005 return "nilh";
3006}
3007
3008static HChar *
3009s390_irgen_NILL(UChar r1, UShort i2)
3010{
3011 IRTemp op1 = newTemp(Ity_I16);
3012 UShort op2;
3013 IRTemp result = newTemp(Ity_I16);
3014
3015 assign(op1, get_gpr_hw3(r1));
3016 op2 = i2;
3017 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3018 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3019 put_gpr_hw3(r1, mkexpr(result));
3020
3021 return "nill";
3022}
3023
3024static HChar *
3025s390_irgen_BASR(UChar r1, UChar r2)
3026{
3027 IRTemp target = newTemp(Ity_I64);
3028
3029 if (r2 == 0) {
3030 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3031 } else {
3032 if (r1 != r2) {
3033 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3034 call_function(get_gpr_dw0(r2));
3035 } else {
3036 assign(target, get_gpr_dw0(r2));
3037 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3038 call_function(mkexpr(target));
3039 }
3040 }
3041
3042 return "basr";
3043}
3044
3045static HChar *
3046s390_irgen_BAS(UChar r1, IRTemp op2addr)
3047{
3048 IRTemp target = newTemp(Ity_I64);
3049
3050 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3051 assign(target, mkexpr(op2addr));
3052 call_function(mkexpr(target));
3053
3054 return "bas";
3055}
3056
3057static HChar *
3058s390_irgen_BCR(UChar r1, UChar r2)
3059{
3060 IRTemp cond = newTemp(Ity_I32);
3061
sewardja52e37e2011-04-28 18:48:06 +00003062 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3063 stmt(IRStmt_MBE(Imbe_Fence));
3064 }
3065
sewardj2019a972011-03-07 16:04:07 +00003066 if ((r2 == 0) || (r1 == 0)) {
3067 } else {
3068 if (r1 == 15) {
3069 return_from_function(get_gpr_dw0(r2));
3070 } else {
3071 assign(cond, s390_call_calculate_cond(r1));
3072 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3073 mkU32(0)), get_gpr_dw0(r2));
3074 }
3075 }
3076 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3077 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3078
3079 return "bcr";
3080}
3081
3082static HChar *
3083s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3084{
3085 IRTemp cond = newTemp(Ity_I32);
3086
3087 if (r1 == 0) {
3088 } else {
3089 if (r1 == 15) {
3090 always_goto(mkexpr(op2addr));
3091 } else {
3092 assign(cond, s390_call_calculate_cond(r1));
3093 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3094 mkU32(0)), mkexpr(op2addr));
3095 }
3096 }
3097 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3098 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3099
3100 return "bc";
3101}
3102
3103static HChar *
3104s390_irgen_BCTR(UChar r1, UChar r2)
3105{
3106 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3107 if (r2 != 0) {
3108 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3109 ), get_gpr_dw0(r2));
3110 }
3111
3112 return "bctr";
3113}
3114
3115static HChar *
3116s390_irgen_BCTGR(UChar r1, UChar r2)
3117{
3118 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3119 if (r2 != 0) {
3120 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3121 mkU64(0)), get_gpr_dw0(r2));
3122 }
3123
3124 return "bctgr";
3125}
3126
3127static HChar *
3128s390_irgen_BCT(UChar r1, IRTemp op2addr)
3129{
3130 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3131 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3132 mkexpr(op2addr));
3133
3134 return "bct";
3135}
3136
3137static HChar *
3138s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3139{
3140 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3141 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3142 mkexpr(op2addr));
3143
3144 return "bctg";
3145}
3146
3147static HChar *
3148s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3149{
3150 IRTemp value = newTemp(Ity_I32);
3151
3152 assign(value, get_gpr_w1(r3 | 1));
3153 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3154 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3155 mkexpr(value)), mkexpr(op2addr));
3156
3157 return "bxh";
3158}
3159
3160static HChar *
3161s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3162{
3163 IRTemp value = newTemp(Ity_I64);
3164
3165 assign(value, get_gpr_dw0(r3 | 1));
3166 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3167 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3168 mkexpr(value)), mkexpr(op2addr));
3169
3170 return "bxhg";
3171}
3172
3173static HChar *
3174s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3175{
3176 IRTemp value = newTemp(Ity_I32);
3177
3178 assign(value, get_gpr_w1(r3 | 1));
3179 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3180 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3181 get_gpr_w1(r1)), mkexpr(op2addr));
3182
3183 return "bxle";
3184}
3185
3186static HChar *
3187s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3188{
3189 IRTemp value = newTemp(Ity_I64);
3190
3191 assign(value, get_gpr_dw0(r3 | 1));
3192 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3193 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3194 get_gpr_dw0(r1)), mkexpr(op2addr));
3195
3196 return "bxleg";
3197}
3198
3199static HChar *
3200s390_irgen_BRAS(UChar r1, UShort i2)
3201{
3202 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3203 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)));
3204
3205 return "bras";
3206}
3207
3208static HChar *
3209s390_irgen_BRASL(UChar r1, UInt i2)
3210{
3211 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
3212 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3213
3214 return "brasl";
3215}
3216
3217static HChar *
3218s390_irgen_BRC(UChar r1, UShort i2)
3219{
3220 IRTemp cond = newTemp(Ity_I32);
3221
3222 if (r1 == 0) {
3223 } else {
3224 if (r1 == 15) {
3225 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1))
3226 );
3227 } else {
3228 assign(cond, s390_call_calculate_cond(r1));
3229 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3230 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3231
3232 }
3233 }
3234 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3235 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3236
3237 return "brc";
3238}
3239
3240static HChar *
3241s390_irgen_BRCL(UChar r1, UInt i2)
3242{
3243 IRTemp cond = newTemp(Ity_I32);
3244
3245 if (r1 == 0) {
3246 } else {
3247 if (r1 == 15) {
3248 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3249 } else {
3250 assign(cond, s390_call_calculate_cond(r1));
3251 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3252 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3253 }
3254 }
3255 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3256 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3257
3258 return "brcl";
3259}
3260
3261static HChar *
3262s390_irgen_BRCT(UChar r1, UShort i2)
3263{
3264 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3265 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3266 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3267
3268 return "brct";
3269}
3270
3271static HChar *
3272s390_irgen_BRCTG(UChar r1, UShort i2)
3273{
3274 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3275 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3276 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3277
3278 return "brctg";
3279}
3280
3281static HChar *
3282s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3283{
3284 IRTemp value = newTemp(Ity_I32);
3285
3286 assign(value, get_gpr_w1(r3 | 1));
3287 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3288 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3289 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3290
3291 return "brxh";
3292}
3293
3294static HChar *
3295s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3296{
3297 IRTemp value = newTemp(Ity_I64);
3298
3299 assign(value, get_gpr_dw0(r3 | 1));
3300 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3301 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3302 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3303
3304 return "brxhg";
3305}
3306
3307static HChar *
3308s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3309{
3310 IRTemp value = newTemp(Ity_I32);
3311
3312 assign(value, get_gpr_w1(r3 | 1));
3313 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3314 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3315 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3316
3317 return "brxle";
3318}
3319
3320static HChar *
3321s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3322{
3323 IRTemp value = newTemp(Ity_I64);
3324
3325 assign(value, get_gpr_dw0(r3 | 1));
3326 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3327 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3328 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3329
3330 return "brxlg";
3331}
3332
3333static HChar *
3334s390_irgen_CR(UChar r1, UChar r2)
3335{
3336 IRTemp op1 = newTemp(Ity_I32);
3337 IRTemp op2 = newTemp(Ity_I32);
3338
3339 assign(op1, get_gpr_w1(r1));
3340 assign(op2, get_gpr_w1(r2));
3341 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3342
3343 return "cr";
3344}
3345
3346static HChar *
3347s390_irgen_CGR(UChar r1, UChar r2)
3348{
3349 IRTemp op1 = newTemp(Ity_I64);
3350 IRTemp op2 = newTemp(Ity_I64);
3351
3352 assign(op1, get_gpr_dw0(r1));
3353 assign(op2, get_gpr_dw0(r2));
3354 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3355
3356 return "cgr";
3357}
3358
3359static HChar *
3360s390_irgen_CGFR(UChar r1, UChar r2)
3361{
3362 IRTemp op1 = newTemp(Ity_I64);
3363 IRTemp op2 = newTemp(Ity_I64);
3364
3365 assign(op1, get_gpr_dw0(r1));
3366 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3367 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3368
3369 return "cgfr";
3370}
3371
3372static HChar *
3373s390_irgen_C(UChar r1, IRTemp op2addr)
3374{
3375 IRTemp op1 = newTemp(Ity_I32);
3376 IRTemp op2 = newTemp(Ity_I32);
3377
3378 assign(op1, get_gpr_w1(r1));
3379 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3380 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3381
3382 return "c";
3383}
3384
3385static HChar *
3386s390_irgen_CY(UChar r1, IRTemp op2addr)
3387{
3388 IRTemp op1 = newTemp(Ity_I32);
3389 IRTemp op2 = newTemp(Ity_I32);
3390
3391 assign(op1, get_gpr_w1(r1));
3392 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3393 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3394
3395 return "cy";
3396}
3397
3398static HChar *
3399s390_irgen_CG(UChar r1, IRTemp op2addr)
3400{
3401 IRTemp op1 = newTemp(Ity_I64);
3402 IRTemp op2 = newTemp(Ity_I64);
3403
3404 assign(op1, get_gpr_dw0(r1));
3405 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3406 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3407
3408 return "cg";
3409}
3410
3411static HChar *
3412s390_irgen_CGF(UChar r1, IRTemp op2addr)
3413{
3414 IRTemp op1 = newTemp(Ity_I64);
3415 IRTemp op2 = newTemp(Ity_I64);
3416
3417 assign(op1, get_gpr_dw0(r1));
3418 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3419 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3420
3421 return "cgf";
3422}
3423
3424static HChar *
3425s390_irgen_CFI(UChar r1, UInt i2)
3426{
3427 IRTemp op1 = newTemp(Ity_I32);
3428 Int op2;
3429
3430 assign(op1, get_gpr_w1(r1));
3431 op2 = (Int)i2;
3432 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3433 mkU32((UInt)op2)));
3434
3435 return "cfi";
3436}
3437
3438static HChar *
3439s390_irgen_CGFI(UChar r1, UInt i2)
3440{
3441 IRTemp op1 = newTemp(Ity_I64);
3442 Long op2;
3443
3444 assign(op1, get_gpr_dw0(r1));
3445 op2 = (Long)(Int)i2;
3446 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3447 mkU64((ULong)op2)));
3448
3449 return "cgfi";
3450}
3451
3452static HChar *
3453s390_irgen_CRL(UChar r1, UInt i2)
3454{
3455 IRTemp op1 = newTemp(Ity_I32);
3456 IRTemp op2 = newTemp(Ity_I32);
3457
3458 assign(op1, get_gpr_w1(r1));
3459 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3460 i2 << 1))));
3461 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3462
3463 return "crl";
3464}
3465
3466static HChar *
3467s390_irgen_CGRL(UChar r1, UInt i2)
3468{
3469 IRTemp op1 = newTemp(Ity_I64);
3470 IRTemp op2 = newTemp(Ity_I64);
3471
3472 assign(op1, get_gpr_dw0(r1));
3473 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3474 i2 << 1))));
3475 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3476
3477 return "cgrl";
3478}
3479
3480static HChar *
3481s390_irgen_CGFRL(UChar r1, UInt i2)
3482{
3483 IRTemp op1 = newTemp(Ity_I64);
3484 IRTemp op2 = newTemp(Ity_I64);
3485
3486 assign(op1, get_gpr_dw0(r1));
3487 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3488 ((ULong)(Long)(Int)i2 << 1)))));
3489 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3490
3491 return "cgfrl";
3492}
3493
3494static HChar *
3495s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3496{
3497 IRTemp op1 = newTemp(Ity_I32);
3498 IRTemp op2 = newTemp(Ity_I32);
3499 IRTemp icc = newTemp(Ity_I32);
3500 IRTemp cond = newTemp(Ity_I32);
3501
3502 if (m3 == 0) {
3503 } else {
3504 if (m3 == 14) {
3505 always_goto(mkexpr(op4addr));
3506 } else {
3507 assign(op1, get_gpr_w1(r1));
3508 assign(op2, get_gpr_w1(r2));
3509 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3510 op2));
3511 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3512 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3513 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3514 mkU32(0)), mkexpr(op4addr));
3515 }
3516 }
3517
3518 return "crb";
3519}
3520
3521static HChar *
3522s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3523{
3524 IRTemp op1 = newTemp(Ity_I64);
3525 IRTemp op2 = newTemp(Ity_I64);
3526 IRTemp icc = newTemp(Ity_I32);
3527 IRTemp cond = newTemp(Ity_I32);
3528
3529 if (m3 == 0) {
3530 } else {
3531 if (m3 == 14) {
3532 always_goto(mkexpr(op4addr));
3533 } else {
3534 assign(op1, get_gpr_dw0(r1));
3535 assign(op2, get_gpr_dw0(r2));
3536 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3537 op2));
3538 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3539 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3540 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3541 mkU32(0)), mkexpr(op4addr));
3542 }
3543 }
3544
3545 return "cgrb";
3546}
3547
3548static HChar *
3549s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3550{
3551 IRTemp op1 = newTemp(Ity_I32);
3552 IRTemp op2 = newTemp(Ity_I32);
3553 IRTemp icc = newTemp(Ity_I32);
3554 IRTemp cond = newTemp(Ity_I32);
3555
3556 if (m3 == 0) {
3557 } else {
3558 if (m3 == 14) {
3559 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3560 );
3561 } else {
3562 assign(op1, get_gpr_w1(r1));
3563 assign(op2, get_gpr_w1(r2));
3564 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3565 op2));
3566 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3567 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3568 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3569 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3570
3571 }
3572 }
3573
3574 return "crj";
3575}
3576
3577static HChar *
3578s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3579{
3580 IRTemp op1 = newTemp(Ity_I64);
3581 IRTemp op2 = newTemp(Ity_I64);
3582 IRTemp icc = newTemp(Ity_I32);
3583 IRTemp cond = newTemp(Ity_I32);
3584
3585 if (m3 == 0) {
3586 } else {
3587 if (m3 == 14) {
3588 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3589 );
3590 } else {
3591 assign(op1, get_gpr_dw0(r1));
3592 assign(op2, get_gpr_dw0(r2));
3593 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3594 op2));
3595 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3596 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3597 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3598 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3599
3600 }
3601 }
3602
3603 return "cgrj";
3604}
3605
3606static HChar *
3607s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3608{
3609 IRTemp op1 = newTemp(Ity_I32);
3610 Int op2;
3611 IRTemp icc = newTemp(Ity_I32);
3612 IRTemp cond = newTemp(Ity_I32);
3613
3614 if (m3 == 0) {
3615 } else {
3616 if (m3 == 14) {
3617 always_goto(mkexpr(op4addr));
3618 } else {
3619 assign(op1, get_gpr_w1(r1));
3620 op2 = (Int)(Char)i2;
3621 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3622 mktemp(Ity_I32, mkU32((UInt)op2))));
3623 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3624 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3625 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3626 mkU32(0)), mkexpr(op4addr));
3627 }
3628 }
3629
3630 return "cib";
3631}
3632
3633static HChar *
3634s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3635{
3636 IRTemp op1 = newTemp(Ity_I64);
3637 Long op2;
3638 IRTemp icc = newTemp(Ity_I32);
3639 IRTemp cond = newTemp(Ity_I32);
3640
3641 if (m3 == 0) {
3642 } else {
3643 if (m3 == 14) {
3644 always_goto(mkexpr(op4addr));
3645 } else {
3646 assign(op1, get_gpr_dw0(r1));
3647 op2 = (Long)(Char)i2;
3648 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3649 mktemp(Ity_I64, mkU64((ULong)op2))));
3650 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3651 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3652 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3653 mkU32(0)), mkexpr(op4addr));
3654 }
3655 }
3656
3657 return "cgib";
3658}
3659
3660static HChar *
3661s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3662{
3663 IRTemp op1 = newTemp(Ity_I32);
3664 Int op2;
3665 IRTemp icc = newTemp(Ity_I32);
3666 IRTemp cond = newTemp(Ity_I32);
3667
3668 if (m3 == 0) {
3669 } else {
3670 if (m3 == 14) {
3671 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3672 );
3673 } else {
3674 assign(op1, get_gpr_w1(r1));
3675 op2 = (Int)(Char)i2;
3676 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3677 mktemp(Ity_I32, mkU32((UInt)op2))));
3678 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3679 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3680 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3681 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3682
3683 }
3684 }
3685
3686 return "cij";
3687}
3688
3689static HChar *
3690s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3691{
3692 IRTemp op1 = newTemp(Ity_I64);
3693 Long op2;
3694 IRTemp icc = newTemp(Ity_I32);
3695 IRTemp cond = newTemp(Ity_I32);
3696
3697 if (m3 == 0) {
3698 } else {
3699 if (m3 == 14) {
3700 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3701 );
3702 } else {
3703 assign(op1, get_gpr_dw0(r1));
3704 op2 = (Long)(Char)i2;
3705 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3706 mktemp(Ity_I64, mkU64((ULong)op2))));
3707 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3708 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3709 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3710 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3711
3712 }
3713 }
3714
3715 return "cgij";
3716}
3717
3718static HChar *
3719s390_irgen_CH(UChar r1, IRTemp op2addr)
3720{
3721 IRTemp op1 = newTemp(Ity_I32);
3722 IRTemp op2 = newTemp(Ity_I32);
3723
3724 assign(op1, get_gpr_w1(r1));
3725 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3726 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3727
3728 return "ch";
3729}
3730
3731static HChar *
3732s390_irgen_CHY(UChar r1, IRTemp op2addr)
3733{
3734 IRTemp op1 = newTemp(Ity_I32);
3735 IRTemp op2 = newTemp(Ity_I32);
3736
3737 assign(op1, get_gpr_w1(r1));
3738 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3739 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3740
3741 return "chy";
3742}
3743
3744static HChar *
3745s390_irgen_CGH(UChar r1, IRTemp op2addr)
3746{
3747 IRTemp op1 = newTemp(Ity_I64);
3748 IRTemp op2 = newTemp(Ity_I64);
3749
3750 assign(op1, get_gpr_dw0(r1));
3751 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3752 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3753
3754 return "cgh";
3755}
3756
3757static HChar *
3758s390_irgen_CHI(UChar r1, UShort i2)
3759{
3760 IRTemp op1 = newTemp(Ity_I32);
3761 Int op2;
3762
3763 assign(op1, get_gpr_w1(r1));
3764 op2 = (Int)(Short)i2;
3765 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3766 mkU32((UInt)op2)));
3767
3768 return "chi";
3769}
3770
3771static HChar *
3772s390_irgen_CGHI(UChar r1, UShort i2)
3773{
3774 IRTemp op1 = newTemp(Ity_I64);
3775 Long op2;
3776
3777 assign(op1, get_gpr_dw0(r1));
3778 op2 = (Long)(Short)i2;
3779 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3780 mkU64((ULong)op2)));
3781
3782 return "cghi";
3783}
3784
3785static HChar *
3786s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3787{
3788 IRTemp op1 = newTemp(Ity_I16);
3789 Short op2;
3790
3791 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3792 op2 = (Short)i2;
3793 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3794 mkU16((UShort)op2)));
3795
3796 return "chhsi";
3797}
3798
3799static HChar *
3800s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3801{
3802 IRTemp op1 = newTemp(Ity_I32);
3803 Int op2;
3804
3805 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3806 op2 = (Int)(Short)i2;
3807 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3808 mkU32((UInt)op2)));
3809
3810 return "chsi";
3811}
3812
3813static HChar *
3814s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3815{
3816 IRTemp op1 = newTemp(Ity_I64);
3817 Long op2;
3818
3819 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3820 op2 = (Long)(Short)i2;
3821 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3822 mkU64((ULong)op2)));
3823
3824 return "cghsi";
3825}
3826
3827static HChar *
3828s390_irgen_CHRL(UChar r1, UInt i2)
3829{
3830 IRTemp op1 = newTemp(Ity_I32);
3831 IRTemp op2 = newTemp(Ity_I32);
3832
3833 assign(op1, get_gpr_w1(r1));
3834 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3835 ((ULong)(Long)(Int)i2 << 1)))));
3836 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3837
3838 return "chrl";
3839}
3840
3841static HChar *
3842s390_irgen_CGHRL(UChar r1, UInt i2)
3843{
3844 IRTemp op1 = newTemp(Ity_I64);
3845 IRTemp op2 = newTemp(Ity_I64);
3846
3847 assign(op1, get_gpr_dw0(r1));
3848 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3849 ((ULong)(Long)(Int)i2 << 1)))));
3850 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3851
3852 return "cghrl";
3853}
3854
3855static HChar *
3856s390_irgen_CHHR(UChar r1, UChar r2)
3857{
3858 IRTemp op1 = newTemp(Ity_I32);
3859 IRTemp op2 = newTemp(Ity_I32);
3860
3861 assign(op1, get_gpr_w0(r1));
3862 assign(op2, get_gpr_w0(r2));
3863 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3864
3865 return "chhr";
3866}
3867
3868static HChar *
3869s390_irgen_CHLR(UChar r1, UChar r2)
3870{
3871 IRTemp op1 = newTemp(Ity_I32);
3872 IRTemp op2 = newTemp(Ity_I32);
3873
3874 assign(op1, get_gpr_w0(r1));
3875 assign(op2, get_gpr_w1(r2));
3876 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3877
3878 return "chlr";
3879}
3880
3881static HChar *
3882s390_irgen_CHF(UChar r1, IRTemp op2addr)
3883{
3884 IRTemp op1 = newTemp(Ity_I32);
3885 IRTemp op2 = newTemp(Ity_I32);
3886
3887 assign(op1, get_gpr_w0(r1));
3888 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3889 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3890
3891 return "chf";
3892}
3893
3894static HChar *
3895s390_irgen_CIH(UChar r1, UInt i2)
3896{
3897 IRTemp op1 = newTemp(Ity_I32);
3898 Int op2;
3899
3900 assign(op1, get_gpr_w0(r1));
3901 op2 = (Int)i2;
3902 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3903 mkU32((UInt)op2)));
3904
3905 return "cih";
3906}
3907
3908static HChar *
3909s390_irgen_CLR(UChar r1, UChar r2)
3910{
3911 IRTemp op1 = newTemp(Ity_I32);
3912 IRTemp op2 = newTemp(Ity_I32);
3913
3914 assign(op1, get_gpr_w1(r1));
3915 assign(op2, get_gpr_w1(r2));
3916 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3917
3918 return "clr";
3919}
3920
3921static HChar *
3922s390_irgen_CLGR(UChar r1, UChar r2)
3923{
3924 IRTemp op1 = newTemp(Ity_I64);
3925 IRTemp op2 = newTemp(Ity_I64);
3926
3927 assign(op1, get_gpr_dw0(r1));
3928 assign(op2, get_gpr_dw0(r2));
3929 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3930
3931 return "clgr";
3932}
3933
3934static HChar *
3935s390_irgen_CLGFR(UChar r1, UChar r2)
3936{
3937 IRTemp op1 = newTemp(Ity_I64);
3938 IRTemp op2 = newTemp(Ity_I64);
3939
3940 assign(op1, get_gpr_dw0(r1));
3941 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3942 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3943
3944 return "clgfr";
3945}
3946
3947static HChar *
3948s390_irgen_CL(UChar r1, IRTemp op2addr)
3949{
3950 IRTemp op1 = newTemp(Ity_I32);
3951 IRTemp op2 = newTemp(Ity_I32);
3952
3953 assign(op1, get_gpr_w1(r1));
3954 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3955 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3956
3957 return "cl";
3958}
3959
3960static HChar *
3961s390_irgen_CLY(UChar r1, IRTemp op2addr)
3962{
3963 IRTemp op1 = newTemp(Ity_I32);
3964 IRTemp op2 = newTemp(Ity_I32);
3965
3966 assign(op1, get_gpr_w1(r1));
3967 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3968 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3969
3970 return "cly";
3971}
3972
3973static HChar *
3974s390_irgen_CLG(UChar r1, IRTemp op2addr)
3975{
3976 IRTemp op1 = newTemp(Ity_I64);
3977 IRTemp op2 = newTemp(Ity_I64);
3978
3979 assign(op1, get_gpr_dw0(r1));
3980 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3981 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3982
3983 return "clg";
3984}
3985
3986static HChar *
3987s390_irgen_CLGF(UChar r1, IRTemp op2addr)
3988{
3989 IRTemp op1 = newTemp(Ity_I64);
3990 IRTemp op2 = newTemp(Ity_I64);
3991
3992 assign(op1, get_gpr_dw0(r1));
3993 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
3994 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3995
3996 return "clgf";
3997}
3998
3999static HChar *
4000s390_irgen_CLFI(UChar r1, UInt i2)
4001{
4002 IRTemp op1 = newTemp(Ity_I32);
4003 UInt op2;
4004
4005 assign(op1, get_gpr_w1(r1));
4006 op2 = i2;
4007 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4008 mkU32(op2)));
4009
4010 return "clfi";
4011}
4012
4013static HChar *
4014s390_irgen_CLGFI(UChar r1, UInt i2)
4015{
4016 IRTemp op1 = newTemp(Ity_I64);
4017 ULong op2;
4018
4019 assign(op1, get_gpr_dw0(r1));
4020 op2 = (ULong)i2;
4021 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4022 mkU64(op2)));
4023
4024 return "clgfi";
4025}
4026
4027static HChar *
4028s390_irgen_CLI(UChar i2, IRTemp op1addr)
4029{
4030 IRTemp op1 = newTemp(Ity_I8);
4031 UChar op2;
4032
4033 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4034 op2 = i2;
4035 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4036 mkU8(op2)));
4037
4038 return "cli";
4039}
4040
4041static HChar *
4042s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4043{
4044 IRTemp op1 = newTemp(Ity_I8);
4045 UChar op2;
4046
4047 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4048 op2 = i2;
4049 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4050 mkU8(op2)));
4051
4052 return "cliy";
4053}
4054
4055static HChar *
4056s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4057{
4058 IRTemp op1 = newTemp(Ity_I32);
4059 UInt op2;
4060
4061 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4062 op2 = (UInt)i2;
4063 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4064 mkU32(op2)));
4065
4066 return "clfhsi";
4067}
4068
4069static HChar *
4070s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4071{
4072 IRTemp op1 = newTemp(Ity_I64);
4073 ULong op2;
4074
4075 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4076 op2 = (ULong)i2;
4077 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4078 mkU64(op2)));
4079
4080 return "clghsi";
4081}
4082
4083static HChar *
4084s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4085{
4086 IRTemp op1 = newTemp(Ity_I16);
4087 UShort op2;
4088
4089 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4090 op2 = i2;
4091 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4092 mkU16(op2)));
4093
4094 return "clhhsi";
4095}
4096
4097static HChar *
4098s390_irgen_CLRL(UChar r1, UInt i2)
4099{
4100 IRTemp op1 = newTemp(Ity_I32);
4101 IRTemp op2 = newTemp(Ity_I32);
4102
4103 assign(op1, get_gpr_w1(r1));
4104 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4105 i2 << 1))));
4106 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4107
4108 return "clrl";
4109}
4110
4111static HChar *
4112s390_irgen_CLGRL(UChar r1, UInt i2)
4113{
4114 IRTemp op1 = newTemp(Ity_I64);
4115 IRTemp op2 = newTemp(Ity_I64);
4116
4117 assign(op1, get_gpr_dw0(r1));
4118 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4119 i2 << 1))));
4120 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4121
4122 return "clgrl";
4123}
4124
4125static HChar *
4126s390_irgen_CLGFRL(UChar r1, UInt i2)
4127{
4128 IRTemp op1 = newTemp(Ity_I64);
4129 IRTemp op2 = newTemp(Ity_I64);
4130
4131 assign(op1, get_gpr_dw0(r1));
4132 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4133 ((ULong)(Long)(Int)i2 << 1)))));
4134 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4135
4136 return "clgfrl";
4137}
4138
4139static HChar *
4140s390_irgen_CLHRL(UChar r1, UInt i2)
4141{
4142 IRTemp op1 = newTemp(Ity_I32);
4143 IRTemp op2 = newTemp(Ity_I32);
4144
4145 assign(op1, get_gpr_w1(r1));
4146 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4147 ((ULong)(Long)(Int)i2 << 1)))));
4148 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4149
4150 return "clhrl";
4151}
4152
4153static HChar *
4154s390_irgen_CLGHRL(UChar r1, UInt i2)
4155{
4156 IRTemp op1 = newTemp(Ity_I64);
4157 IRTemp op2 = newTemp(Ity_I64);
4158
4159 assign(op1, get_gpr_dw0(r1));
4160 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4161 ((ULong)(Long)(Int)i2 << 1)))));
4162 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4163
4164 return "clghrl";
4165}
4166
4167static HChar *
4168s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4169{
4170 IRTemp op1 = newTemp(Ity_I32);
4171 IRTemp op2 = newTemp(Ity_I32);
4172 IRTemp icc = newTemp(Ity_I32);
4173 IRTemp cond = newTemp(Ity_I32);
4174
4175 if (m3 == 0) {
4176 } else {
4177 if (m3 == 14) {
4178 always_goto(mkexpr(op4addr));
4179 } else {
4180 assign(op1, get_gpr_w1(r1));
4181 assign(op2, get_gpr_w1(r2));
4182 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4183 op2));
4184 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4185 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4186 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4187 mkU32(0)), mkexpr(op4addr));
4188 }
4189 }
4190
4191 return "clrb";
4192}
4193
4194static HChar *
4195s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4196{
4197 IRTemp op1 = newTemp(Ity_I64);
4198 IRTemp op2 = newTemp(Ity_I64);
4199 IRTemp icc = newTemp(Ity_I32);
4200 IRTemp cond = newTemp(Ity_I32);
4201
4202 if (m3 == 0) {
4203 } else {
4204 if (m3 == 14) {
4205 always_goto(mkexpr(op4addr));
4206 } else {
4207 assign(op1, get_gpr_dw0(r1));
4208 assign(op2, get_gpr_dw0(r2));
4209 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4210 op2));
4211 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4212 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4213 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4214 mkU32(0)), mkexpr(op4addr));
4215 }
4216 }
4217
4218 return "clgrb";
4219}
4220
4221static HChar *
4222s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4223{
4224 IRTemp op1 = newTemp(Ity_I32);
4225 IRTemp op2 = newTemp(Ity_I32);
4226 IRTemp icc = newTemp(Ity_I32);
4227 IRTemp cond = newTemp(Ity_I32);
4228
4229 if (m3 == 0) {
4230 } else {
4231 if (m3 == 14) {
4232 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4233 );
4234 } else {
4235 assign(op1, get_gpr_w1(r1));
4236 assign(op2, get_gpr_w1(r2));
4237 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4238 op2));
4239 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4240 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4241 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4242 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4243
4244 }
4245 }
4246
4247 return "clrj";
4248}
4249
4250static HChar *
4251s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4252{
4253 IRTemp op1 = newTemp(Ity_I64);
4254 IRTemp op2 = newTemp(Ity_I64);
4255 IRTemp icc = newTemp(Ity_I32);
4256 IRTemp cond = newTemp(Ity_I32);
4257
4258 if (m3 == 0) {
4259 } else {
4260 if (m3 == 14) {
4261 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4262 );
4263 } else {
4264 assign(op1, get_gpr_dw0(r1));
4265 assign(op2, get_gpr_dw0(r2));
4266 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4267 op2));
4268 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4269 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4270 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4271 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4272
4273 }
4274 }
4275
4276 return "clgrj";
4277}
4278
4279static HChar *
4280s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4281{
4282 IRTemp op1 = newTemp(Ity_I32);
4283 UInt op2;
4284 IRTemp icc = newTemp(Ity_I32);
4285 IRTemp cond = newTemp(Ity_I32);
4286
4287 if (m3 == 0) {
4288 } else {
4289 if (m3 == 14) {
4290 always_goto(mkexpr(op4addr));
4291 } else {
4292 assign(op1, get_gpr_w1(r1));
4293 op2 = (UInt)i2;
4294 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4295 mktemp(Ity_I32, mkU32(op2))));
4296 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4297 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4298 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4299 mkU32(0)), mkexpr(op4addr));
4300 }
4301 }
4302
4303 return "clib";
4304}
4305
4306static HChar *
4307s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4308{
4309 IRTemp op1 = newTemp(Ity_I64);
4310 ULong op2;
4311 IRTemp icc = newTemp(Ity_I32);
4312 IRTemp cond = newTemp(Ity_I32);
4313
4314 if (m3 == 0) {
4315 } else {
4316 if (m3 == 14) {
4317 always_goto(mkexpr(op4addr));
4318 } else {
4319 assign(op1, get_gpr_dw0(r1));
4320 op2 = (ULong)i2;
4321 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4322 mktemp(Ity_I64, mkU64(op2))));
4323 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4324 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4325 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4326 mkU32(0)), mkexpr(op4addr));
4327 }
4328 }
4329
4330 return "clgib";
4331}
4332
4333static HChar *
4334s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4335{
4336 IRTemp op1 = newTemp(Ity_I32);
4337 UInt op2;
4338 IRTemp icc = newTemp(Ity_I32);
4339 IRTemp cond = newTemp(Ity_I32);
4340
4341 if (m3 == 0) {
4342 } else {
4343 if (m3 == 14) {
4344 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4345 );
4346 } else {
4347 assign(op1, get_gpr_w1(r1));
4348 op2 = (UInt)i2;
4349 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4350 mktemp(Ity_I32, mkU32(op2))));
4351 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4352 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4353 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4354 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4355
4356 }
4357 }
4358
4359 return "clij";
4360}
4361
4362static HChar *
4363s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4364{
4365 IRTemp op1 = newTemp(Ity_I64);
4366 ULong op2;
4367 IRTemp icc = newTemp(Ity_I32);
4368 IRTemp cond = newTemp(Ity_I32);
4369
4370 if (m3 == 0) {
4371 } else {
4372 if (m3 == 14) {
4373 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4374 );
4375 } else {
4376 assign(op1, get_gpr_dw0(r1));
4377 op2 = (ULong)i2;
4378 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4379 mktemp(Ity_I64, mkU64(op2))));
4380 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4381 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4382 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4383 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4384
4385 }
4386 }
4387
4388 return "clgij";
4389}
4390
4391static HChar *
4392s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4393{
4394 IRTemp op1 = newTemp(Ity_I32);
4395 IRTemp op2 = newTemp(Ity_I32);
4396 IRTemp b0 = newTemp(Ity_I32);
4397 IRTemp b1 = newTemp(Ity_I32);
4398 IRTemp b2 = newTemp(Ity_I32);
4399 IRTemp b3 = newTemp(Ity_I32);
4400 IRTemp c0 = newTemp(Ity_I32);
4401 IRTemp c1 = newTemp(Ity_I32);
4402 IRTemp c2 = newTemp(Ity_I32);
4403 IRTemp c3 = newTemp(Ity_I32);
4404 UChar n;
4405
4406 n = 0;
4407 if ((r3 & 8) != 0) {
4408 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4409 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4410 n = n + 1;
4411 } else {
4412 assign(b0, mkU32(0));
4413 assign(c0, mkU32(0));
4414 }
4415 if ((r3 & 4) != 0) {
4416 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4417 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4418 mkU64(n)))));
4419 n = n + 1;
4420 } else {
4421 assign(b1, mkU32(0));
4422 assign(c1, mkU32(0));
4423 }
4424 if ((r3 & 2) != 0) {
4425 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4426 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4427 mkU64(n)))));
4428 n = n + 1;
4429 } else {
4430 assign(b2, mkU32(0));
4431 assign(c2, mkU32(0));
4432 }
4433 if ((r3 & 1) != 0) {
4434 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4435 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4436 mkU64(n)))));
4437 n = n + 1;
4438 } else {
4439 assign(b3, mkU32(0));
4440 assign(c3, mkU32(0));
4441 }
4442 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4443 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4444 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4445 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4446 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4447 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4448 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4449
4450 return "clm";
4451}
4452
4453static HChar *
4454s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4455{
4456 IRTemp op1 = newTemp(Ity_I32);
4457 IRTemp op2 = newTemp(Ity_I32);
4458 IRTemp b0 = newTemp(Ity_I32);
4459 IRTemp b1 = newTemp(Ity_I32);
4460 IRTemp b2 = newTemp(Ity_I32);
4461 IRTemp b3 = newTemp(Ity_I32);
4462 IRTemp c0 = newTemp(Ity_I32);
4463 IRTemp c1 = newTemp(Ity_I32);
4464 IRTemp c2 = newTemp(Ity_I32);
4465 IRTemp c3 = newTemp(Ity_I32);
4466 UChar n;
4467
4468 n = 0;
4469 if ((r3 & 8) != 0) {
4470 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4471 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4472 n = n + 1;
4473 } else {
4474 assign(b0, mkU32(0));
4475 assign(c0, mkU32(0));
4476 }
4477 if ((r3 & 4) != 0) {
4478 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4479 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4480 mkU64(n)))));
4481 n = n + 1;
4482 } else {
4483 assign(b1, mkU32(0));
4484 assign(c1, mkU32(0));
4485 }
4486 if ((r3 & 2) != 0) {
4487 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4488 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4489 mkU64(n)))));
4490 n = n + 1;
4491 } else {
4492 assign(b2, mkU32(0));
4493 assign(c2, mkU32(0));
4494 }
4495 if ((r3 & 1) != 0) {
4496 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4497 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4498 mkU64(n)))));
4499 n = n + 1;
4500 } else {
4501 assign(b3, mkU32(0));
4502 assign(c3, mkU32(0));
4503 }
4504 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4505 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4506 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4507 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4508 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4509 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4510 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4511
4512 return "clmy";
4513}
4514
4515static HChar *
4516s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4517{
4518 IRTemp op1 = newTemp(Ity_I32);
4519 IRTemp op2 = newTemp(Ity_I32);
4520 IRTemp b0 = newTemp(Ity_I32);
4521 IRTemp b1 = newTemp(Ity_I32);
4522 IRTemp b2 = newTemp(Ity_I32);
4523 IRTemp b3 = newTemp(Ity_I32);
4524 IRTemp c0 = newTemp(Ity_I32);
4525 IRTemp c1 = newTemp(Ity_I32);
4526 IRTemp c2 = newTemp(Ity_I32);
4527 IRTemp c3 = newTemp(Ity_I32);
4528 UChar n;
4529
4530 n = 0;
4531 if ((r3 & 8) != 0) {
4532 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4533 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4534 n = n + 1;
4535 } else {
4536 assign(b0, mkU32(0));
4537 assign(c0, mkU32(0));
4538 }
4539 if ((r3 & 4) != 0) {
4540 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4541 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4542 mkU64(n)))));
4543 n = n + 1;
4544 } else {
4545 assign(b1, mkU32(0));
4546 assign(c1, mkU32(0));
4547 }
4548 if ((r3 & 2) != 0) {
4549 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4550 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4551 mkU64(n)))));
4552 n = n + 1;
4553 } else {
4554 assign(b2, mkU32(0));
4555 assign(c2, mkU32(0));
4556 }
4557 if ((r3 & 1) != 0) {
4558 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4559 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4560 mkU64(n)))));
4561 n = n + 1;
4562 } else {
4563 assign(b3, mkU32(0));
4564 assign(c3, mkU32(0));
4565 }
4566 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4567 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4568 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4569 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4570 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4571 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4572 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4573
4574 return "clmh";
4575}
4576
4577static HChar *
4578s390_irgen_CLHHR(UChar r1, UChar r2)
4579{
4580 IRTemp op1 = newTemp(Ity_I32);
4581 IRTemp op2 = newTemp(Ity_I32);
4582
4583 assign(op1, get_gpr_w0(r1));
4584 assign(op2, get_gpr_w0(r2));
4585 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4586
4587 return "clhhr";
4588}
4589
4590static HChar *
4591s390_irgen_CLHLR(UChar r1, UChar r2)
4592{
4593 IRTemp op1 = newTemp(Ity_I32);
4594 IRTemp op2 = newTemp(Ity_I32);
4595
4596 assign(op1, get_gpr_w0(r1));
4597 assign(op2, get_gpr_w1(r2));
4598 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4599
4600 return "clhlr";
4601}
4602
4603static HChar *
4604s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4605{
4606 IRTemp op1 = newTemp(Ity_I32);
4607 IRTemp op2 = newTemp(Ity_I32);
4608
4609 assign(op1, get_gpr_w0(r1));
4610 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4611 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4612
4613 return "clhf";
4614}
4615
4616static HChar *
4617s390_irgen_CLIH(UChar r1, UInt i2)
4618{
4619 IRTemp op1 = newTemp(Ity_I32);
4620 UInt op2;
4621
4622 assign(op1, get_gpr_w0(r1));
4623 op2 = i2;
4624 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4625 mkU32(op2)));
4626
4627 return "clih";
4628}
4629
4630static HChar *
4631s390_irgen_CPYA(UChar r1, UChar r2)
4632{
4633 put_ar_w0(r1, get_ar_w0(r2));
4634 if (unlikely(vex_traceflags & VEX_TRACE_FE))
4635 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4636
4637 return "cpya";
4638}
4639
4640static HChar *
4641s390_irgen_XR(UChar r1, UChar r2)
4642{
4643 IRTemp op1 = newTemp(Ity_I32);
4644 IRTemp op2 = newTemp(Ity_I32);
4645 IRTemp result = newTemp(Ity_I32);
4646
4647 if (r1 == r2) {
4648 assign(result, mkU32(0));
4649 } else {
4650 assign(op1, get_gpr_w1(r1));
4651 assign(op2, get_gpr_w1(r2));
4652 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4653 }
4654 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4655 put_gpr_w1(r1, mkexpr(result));
4656
4657 return "xr";
4658}
4659
4660static HChar *
4661s390_irgen_XGR(UChar r1, UChar r2)
4662{
4663 IRTemp op1 = newTemp(Ity_I64);
4664 IRTemp op2 = newTemp(Ity_I64);
4665 IRTemp result = newTemp(Ity_I64);
4666
4667 if (r1 == r2) {
4668 assign(result, mkU64(0));
4669 } else {
4670 assign(op1, get_gpr_dw0(r1));
4671 assign(op2, get_gpr_dw0(r2));
4672 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4673 }
4674 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4675 put_gpr_dw0(r1, mkexpr(result));
4676
4677 return "xgr";
4678}
4679
4680static HChar *
4681s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4682{
4683 IRTemp op2 = newTemp(Ity_I32);
4684 IRTemp op3 = newTemp(Ity_I32);
4685 IRTemp result = newTemp(Ity_I32);
4686
4687 assign(op2, get_gpr_w1(r2));
4688 assign(op3, get_gpr_w1(r3));
4689 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4690 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4691 put_gpr_w1(r1, mkexpr(result));
4692
4693 return "xrk";
4694}
4695
4696static HChar *
4697s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4698{
4699 IRTemp op2 = newTemp(Ity_I64);
4700 IRTemp op3 = newTemp(Ity_I64);
4701 IRTemp result = newTemp(Ity_I64);
4702
4703 assign(op2, get_gpr_dw0(r2));
4704 assign(op3, get_gpr_dw0(r3));
4705 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4706 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4707 put_gpr_dw0(r1, mkexpr(result));
4708
4709 return "xgrk";
4710}
4711
4712static HChar *
4713s390_irgen_X(UChar r1, IRTemp op2addr)
4714{
4715 IRTemp op1 = newTemp(Ity_I32);
4716 IRTemp op2 = newTemp(Ity_I32);
4717 IRTemp result = newTemp(Ity_I32);
4718
4719 assign(op1, get_gpr_w1(r1));
4720 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4721 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4722 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4723 put_gpr_w1(r1, mkexpr(result));
4724
4725 return "x";
4726}
4727
4728static HChar *
4729s390_irgen_XY(UChar r1, IRTemp op2addr)
4730{
4731 IRTemp op1 = newTemp(Ity_I32);
4732 IRTemp op2 = newTemp(Ity_I32);
4733 IRTemp result = newTemp(Ity_I32);
4734
4735 assign(op1, get_gpr_w1(r1));
4736 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4737 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4738 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4739 put_gpr_w1(r1, mkexpr(result));
4740
4741 return "xy";
4742}
4743
4744static HChar *
4745s390_irgen_XG(UChar r1, IRTemp op2addr)
4746{
4747 IRTemp op1 = newTemp(Ity_I64);
4748 IRTemp op2 = newTemp(Ity_I64);
4749 IRTemp result = newTemp(Ity_I64);
4750
4751 assign(op1, get_gpr_dw0(r1));
4752 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4753 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4754 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4755 put_gpr_dw0(r1, mkexpr(result));
4756
4757 return "xg";
4758}
4759
4760static HChar *
4761s390_irgen_XI(UChar i2, IRTemp op1addr)
4762{
4763 IRTemp op1 = newTemp(Ity_I8);
4764 UChar op2;
4765 IRTemp result = newTemp(Ity_I8);
4766
4767 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4768 op2 = i2;
4769 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4770 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4771 store(mkexpr(op1addr), mkexpr(result));
4772
4773 return "xi";
4774}
4775
4776static HChar *
4777s390_irgen_XIY(UChar i2, IRTemp op1addr)
4778{
4779 IRTemp op1 = newTemp(Ity_I8);
4780 UChar op2;
4781 IRTemp result = newTemp(Ity_I8);
4782
4783 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4784 op2 = i2;
4785 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4786 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4787 store(mkexpr(op1addr), mkexpr(result));
4788
4789 return "xiy";
4790}
4791
4792static HChar *
4793s390_irgen_XIHF(UChar r1, UInt i2)
4794{
4795 IRTemp op1 = newTemp(Ity_I32);
4796 UInt op2;
4797 IRTemp result = newTemp(Ity_I32);
4798
4799 assign(op1, get_gpr_w0(r1));
4800 op2 = i2;
4801 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4802 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4803 put_gpr_w0(r1, mkexpr(result));
4804
4805 return "xihf";
4806}
4807
4808static HChar *
4809s390_irgen_XILF(UChar r1, UInt i2)
4810{
4811 IRTemp op1 = newTemp(Ity_I32);
4812 UInt op2;
4813 IRTemp result = newTemp(Ity_I32);
4814
4815 assign(op1, get_gpr_w1(r1));
4816 op2 = i2;
4817 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4818 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4819 put_gpr_w1(r1, mkexpr(result));
4820
4821 return "xilf";
4822}
4823
4824static HChar *
4825s390_irgen_EAR(UChar r1, UChar r2)
4826{
4827 put_gpr_w1(r1, get_ar_w0(r2));
4828 if (unlikely(vex_traceflags & VEX_TRACE_FE))
4829 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4830
4831 return "ear";
4832}
4833
4834static HChar *
4835s390_irgen_IC(UChar r1, IRTemp op2addr)
4836{
4837 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4838
4839 return "ic";
4840}
4841
4842static HChar *
4843s390_irgen_ICY(UChar r1, IRTemp op2addr)
4844{
4845 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4846
4847 return "icy";
4848}
4849
4850static HChar *
4851s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4852{
4853 UChar n;
4854 IRTemp result = newTemp(Ity_I32);
4855 UInt mask;
4856
4857 n = 0;
4858 mask = (UInt)r3;
4859 if ((mask & 8) != 0) {
4860 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4861 n = n + 1;
4862 }
4863 if ((mask & 4) != 0) {
4864 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4865
4866 n = n + 1;
4867 }
4868 if ((mask & 2) != 0) {
4869 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4870
4871 n = n + 1;
4872 }
4873 if ((mask & 1) != 0) {
4874 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4875
4876 n = n + 1;
4877 }
4878 assign(result, get_gpr_w1(r1));
4879 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4880 mkU32(mask)));
4881
4882 return "icm";
4883}
4884
4885static HChar *
4886s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4887{
4888 UChar n;
4889 IRTemp result = newTemp(Ity_I32);
4890 UInt mask;
4891
4892 n = 0;
4893 mask = (UInt)r3;
4894 if ((mask & 8) != 0) {
4895 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4896 n = n + 1;
4897 }
4898 if ((mask & 4) != 0) {
4899 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4900
4901 n = n + 1;
4902 }
4903 if ((mask & 2) != 0) {
4904 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4905
4906 n = n + 1;
4907 }
4908 if ((mask & 1) != 0) {
4909 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4910
4911 n = n + 1;
4912 }
4913 assign(result, get_gpr_w1(r1));
4914 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4915 mkU32(mask)));
4916
4917 return "icmy";
4918}
4919
4920static HChar *
4921s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4922{
4923 UChar n;
4924 IRTemp result = newTemp(Ity_I32);
4925 UInt mask;
4926
4927 n = 0;
4928 mask = (UInt)r3;
4929 if ((mask & 8) != 0) {
4930 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4931 n = n + 1;
4932 }
4933 if ((mask & 4) != 0) {
4934 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4935
4936 n = n + 1;
4937 }
4938 if ((mask & 2) != 0) {
4939 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4940
4941 n = n + 1;
4942 }
4943 if ((mask & 1) != 0) {
4944 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4945
4946 n = n + 1;
4947 }
4948 assign(result, get_gpr_w0(r1));
4949 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4950 mkU32(mask)));
4951
4952 return "icmh";
4953}
4954
4955static HChar *
4956s390_irgen_IIHF(UChar r1, UInt i2)
4957{
4958 put_gpr_w0(r1, mkU32(i2));
4959
4960 return "iihf";
4961}
4962
4963static HChar *
4964s390_irgen_IIHH(UChar r1, UShort i2)
4965{
4966 put_gpr_hw0(r1, mkU16(i2));
4967
4968 return "iihh";
4969}
4970
4971static HChar *
4972s390_irgen_IIHL(UChar r1, UShort i2)
4973{
4974 put_gpr_hw1(r1, mkU16(i2));
4975
4976 return "iihl";
4977}
4978
4979static HChar *
4980s390_irgen_IILF(UChar r1, UInt i2)
4981{
4982 put_gpr_w1(r1, mkU32(i2));
4983
4984 return "iilf";
4985}
4986
4987static HChar *
4988s390_irgen_IILH(UChar r1, UShort i2)
4989{
4990 put_gpr_hw2(r1, mkU16(i2));
4991
4992 return "iilh";
4993}
4994
4995static HChar *
4996s390_irgen_IILL(UChar r1, UShort i2)
4997{
4998 put_gpr_hw3(r1, mkU16(i2));
4999
5000 return "iill";
5001}
5002
5003static HChar *
5004s390_irgen_LR(UChar r1, UChar r2)
5005{
5006 put_gpr_w1(r1, get_gpr_w1(r2));
5007
5008 return "lr";
5009}
5010
5011static HChar *
5012s390_irgen_LGR(UChar r1, UChar r2)
5013{
5014 put_gpr_dw0(r1, get_gpr_dw0(r2));
5015
5016 return "lgr";
5017}
5018
5019static HChar *
5020s390_irgen_LGFR(UChar r1, UChar r2)
5021{
5022 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5023
5024 return "lgfr";
5025}
5026
5027static HChar *
5028s390_irgen_L(UChar r1, IRTemp op2addr)
5029{
5030 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5031
5032 return "l";
5033}
5034
5035static HChar *
5036s390_irgen_LY(UChar r1, IRTemp op2addr)
5037{
5038 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5039
5040 return "ly";
5041}
5042
5043static HChar *
5044s390_irgen_LG(UChar r1, IRTemp op2addr)
5045{
5046 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5047
5048 return "lg";
5049}
5050
5051static HChar *
5052s390_irgen_LGF(UChar r1, IRTemp op2addr)
5053{
5054 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5055
5056 return "lgf";
5057}
5058
5059static HChar *
5060s390_irgen_LGFI(UChar r1, UInt i2)
5061{
5062 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5063
5064 return "lgfi";
5065}
5066
5067static HChar *
5068s390_irgen_LRL(UChar r1, UInt i2)
5069{
5070 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5071 i2 << 1))));
5072
5073 return "lrl";
5074}
5075
5076static HChar *
5077s390_irgen_LGRL(UChar r1, UInt i2)
5078{
5079 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5080 i2 << 1))));
5081
5082 return "lgrl";
5083}
5084
5085static HChar *
5086s390_irgen_LGFRL(UChar r1, UInt i2)
5087{
5088 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5089 ((ULong)(Long)(Int)i2 << 1)))));
5090
5091 return "lgfrl";
5092}
5093
5094static HChar *
5095s390_irgen_LA(UChar r1, IRTemp op2addr)
5096{
5097 put_gpr_dw0(r1, mkexpr(op2addr));
5098
5099 return "la";
5100}
5101
5102static HChar *
5103s390_irgen_LAY(UChar r1, IRTemp op2addr)
5104{
5105 put_gpr_dw0(r1, mkexpr(op2addr));
5106
5107 return "lay";
5108}
5109
5110static HChar *
5111s390_irgen_LAE(UChar r1, IRTemp op2addr)
5112{
5113 put_gpr_dw0(r1, mkexpr(op2addr));
5114
5115 return "lae";
5116}
5117
5118static HChar *
5119s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5120{
5121 put_gpr_dw0(r1, mkexpr(op2addr));
5122
5123 return "laey";
5124}
5125
5126static HChar *
5127s390_irgen_LARL(UChar r1, UInt i2)
5128{
5129 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5130
5131 return "larl";
5132}
5133
5134static HChar *
5135s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5136{
5137 IRTemp op2 = newTemp(Ity_I32);
5138 IRTemp op3 = newTemp(Ity_I32);
5139 IRTemp result = newTemp(Ity_I32);
5140
5141 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5142 assign(op3, get_gpr_w1(r3));
5143 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5144 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5145 store(mkexpr(op2addr), mkexpr(result));
5146 put_gpr_w1(r1, mkexpr(op2));
5147
5148 return "laa";
5149}
5150
5151static HChar *
5152s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5153{
5154 IRTemp op2 = newTemp(Ity_I64);
5155 IRTemp op3 = newTemp(Ity_I64);
5156 IRTemp result = newTemp(Ity_I64);
5157
5158 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5159 assign(op3, get_gpr_dw0(r3));
5160 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5161 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5162 store(mkexpr(op2addr), mkexpr(result));
5163 put_gpr_dw0(r1, mkexpr(op2));
5164
5165 return "laag";
5166}
5167
5168static HChar *
5169s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5170{
5171 IRTemp op2 = newTemp(Ity_I32);
5172 IRTemp op3 = newTemp(Ity_I32);
5173 IRTemp result = newTemp(Ity_I32);
5174
5175 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5176 assign(op3, get_gpr_w1(r3));
5177 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5178 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5179 store(mkexpr(op2addr), mkexpr(result));
5180 put_gpr_w1(r1, mkexpr(op2));
5181
5182 return "laal";
5183}
5184
5185static HChar *
5186s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5187{
5188 IRTemp op2 = newTemp(Ity_I64);
5189 IRTemp op3 = newTemp(Ity_I64);
5190 IRTemp result = newTemp(Ity_I64);
5191
5192 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5193 assign(op3, get_gpr_dw0(r3));
5194 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5195 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5196 store(mkexpr(op2addr), mkexpr(result));
5197 put_gpr_dw0(r1, mkexpr(op2));
5198
5199 return "laalg";
5200}
5201
5202static HChar *
5203s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5204{
5205 IRTemp op2 = newTemp(Ity_I32);
5206 IRTemp op3 = newTemp(Ity_I32);
5207 IRTemp result = newTemp(Ity_I32);
5208
5209 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5210 assign(op3, get_gpr_w1(r3));
5211 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5212 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5213 store(mkexpr(op2addr), mkexpr(result));
5214 put_gpr_w1(r1, mkexpr(op2));
5215
5216 return "lan";
5217}
5218
5219static HChar *
5220s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5221{
5222 IRTemp op2 = newTemp(Ity_I64);
5223 IRTemp op3 = newTemp(Ity_I64);
5224 IRTemp result = newTemp(Ity_I64);
5225
5226 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5227 assign(op3, get_gpr_dw0(r3));
5228 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5229 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5230 store(mkexpr(op2addr), mkexpr(result));
5231 put_gpr_dw0(r1, mkexpr(op2));
5232
5233 return "lang";
5234}
5235
5236static HChar *
5237s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5238{
5239 IRTemp op2 = newTemp(Ity_I32);
5240 IRTemp op3 = newTemp(Ity_I32);
5241 IRTemp result = newTemp(Ity_I32);
5242
5243 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5244 assign(op3, get_gpr_w1(r3));
5245 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5246 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5247 store(mkexpr(op2addr), mkexpr(result));
5248 put_gpr_w1(r1, mkexpr(op2));
5249
5250 return "lax";
5251}
5252
5253static HChar *
5254s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5255{
5256 IRTemp op2 = newTemp(Ity_I64);
5257 IRTemp op3 = newTemp(Ity_I64);
5258 IRTemp result = newTemp(Ity_I64);
5259
5260 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5261 assign(op3, get_gpr_dw0(r3));
5262 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5263 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5264 store(mkexpr(op2addr), mkexpr(result));
5265 put_gpr_dw0(r1, mkexpr(op2));
5266
5267 return "laxg";
5268}
5269
5270static HChar *
5271s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5272{
5273 IRTemp op2 = newTemp(Ity_I32);
5274 IRTemp op3 = newTemp(Ity_I32);
5275 IRTemp result = newTemp(Ity_I32);
5276
5277 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5278 assign(op3, get_gpr_w1(r3));
5279 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5280 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5281 store(mkexpr(op2addr), mkexpr(result));
5282 put_gpr_w1(r1, mkexpr(op2));
5283
5284 return "lao";
5285}
5286
5287static HChar *
5288s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5289{
5290 IRTemp op2 = newTemp(Ity_I64);
5291 IRTemp op3 = newTemp(Ity_I64);
5292 IRTemp result = newTemp(Ity_I64);
5293
5294 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5295 assign(op3, get_gpr_dw0(r3));
5296 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5297 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5298 store(mkexpr(op2addr), mkexpr(result));
5299 put_gpr_dw0(r1, mkexpr(op2));
5300
5301 return "laog";
5302}
5303
5304static HChar *
5305s390_irgen_LTR(UChar r1, UChar r2)
5306{
5307 IRTemp op2 = newTemp(Ity_I32);
5308
5309 assign(op2, get_gpr_w1(r2));
5310 put_gpr_w1(r1, mkexpr(op2));
5311 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5312
5313 return "ltr";
5314}
5315
5316static HChar *
5317s390_irgen_LTGR(UChar r1, UChar r2)
5318{
5319 IRTemp op2 = newTemp(Ity_I64);
5320
5321 assign(op2, get_gpr_dw0(r2));
5322 put_gpr_dw0(r1, mkexpr(op2));
5323 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5324
5325 return "ltgr";
5326}
5327
5328static HChar *
5329s390_irgen_LTGFR(UChar r1, UChar r2)
5330{
5331 IRTemp op2 = newTemp(Ity_I64);
5332
5333 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5334 put_gpr_dw0(r1, mkexpr(op2));
5335 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5336
5337 return "ltgfr";
5338}
5339
5340static HChar *
5341s390_irgen_LT(UChar r1, IRTemp op2addr)
5342{
5343 IRTemp op2 = newTemp(Ity_I32);
5344
5345 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5346 put_gpr_w1(r1, mkexpr(op2));
5347 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5348
5349 return "lt";
5350}
5351
5352static HChar *
5353s390_irgen_LTG(UChar r1, IRTemp op2addr)
5354{
5355 IRTemp op2 = newTemp(Ity_I64);
5356
5357 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5358 put_gpr_dw0(r1, mkexpr(op2));
5359 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5360
5361 return "ltg";
5362}
5363
5364static HChar *
5365s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5366{
5367 IRTemp op2 = newTemp(Ity_I64);
5368
5369 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5370 put_gpr_dw0(r1, mkexpr(op2));
5371 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5372
5373 return "ltgf";
5374}
5375
5376static HChar *
5377s390_irgen_LBR(UChar r1, UChar r2)
5378{
5379 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5380
5381 return "lbr";
5382}
5383
5384static HChar *
5385s390_irgen_LGBR(UChar r1, UChar r2)
5386{
5387 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5388
5389 return "lgbr";
5390}
5391
5392static HChar *
5393s390_irgen_LB(UChar r1, IRTemp op2addr)
5394{
5395 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5396
5397 return "lb";
5398}
5399
5400static HChar *
5401s390_irgen_LGB(UChar r1, IRTemp op2addr)
5402{
5403 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5404
5405 return "lgb";
5406}
5407
5408static HChar *
5409s390_irgen_LBH(UChar r1, IRTemp op2addr)
5410{
5411 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5412
5413 return "lbh";
5414}
5415
5416static HChar *
5417s390_irgen_LCR(UChar r1, UChar r2)
5418{
5419 Int op1;
5420 IRTemp op2 = newTemp(Ity_I32);
5421 IRTemp result = newTemp(Ity_I32);
5422
5423 op1 = 0;
5424 assign(op2, get_gpr_w1(r2));
5425 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5426 put_gpr_w1(r1, mkexpr(result));
5427 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5428 op1)), op2);
5429
5430 return "lcr";
5431}
5432
5433static HChar *
5434s390_irgen_LCGR(UChar r1, UChar r2)
5435{
5436 Long op1;
5437 IRTemp op2 = newTemp(Ity_I64);
5438 IRTemp result = newTemp(Ity_I64);
5439
5440 op1 = 0ULL;
5441 assign(op2, get_gpr_dw0(r2));
5442 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5443 put_gpr_dw0(r1, mkexpr(result));
5444 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5445 op1)), op2);
5446
5447 return "lcgr";
5448}
5449
5450static HChar *
5451s390_irgen_LCGFR(UChar r1, UChar r2)
5452{
5453 Long op1;
5454 IRTemp op2 = newTemp(Ity_I64);
5455 IRTemp result = newTemp(Ity_I64);
5456
5457 op1 = 0ULL;
5458 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5459 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5460 put_gpr_dw0(r1, mkexpr(result));
5461 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5462 op1)), op2);
5463
5464 return "lcgfr";
5465}
5466
5467static HChar *
5468s390_irgen_LHR(UChar r1, UChar r2)
5469{
5470 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5471
5472 return "lhr";
5473}
5474
5475static HChar *
5476s390_irgen_LGHR(UChar r1, UChar r2)
5477{
5478 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5479
5480 return "lghr";
5481}
5482
5483static HChar *
5484s390_irgen_LH(UChar r1, IRTemp op2addr)
5485{
5486 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5487
5488 return "lh";
5489}
5490
5491static HChar *
5492s390_irgen_LHY(UChar r1, IRTemp op2addr)
5493{
5494 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5495
5496 return "lhy";
5497}
5498
5499static HChar *
5500s390_irgen_LGH(UChar r1, IRTemp op2addr)
5501{
5502 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5503
5504 return "lgh";
5505}
5506
5507static HChar *
5508s390_irgen_LHI(UChar r1, UShort i2)
5509{
5510 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5511
5512 return "lhi";
5513}
5514
5515static HChar *
5516s390_irgen_LGHI(UChar r1, UShort i2)
5517{
5518 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5519
5520 return "lghi";
5521}
5522
5523static HChar *
5524s390_irgen_LHRL(UChar r1, UInt i2)
5525{
5526 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5527 ((ULong)(Long)(Int)i2 << 1)))));
5528
5529 return "lhrl";
5530}
5531
5532static HChar *
5533s390_irgen_LGHRL(UChar r1, UInt i2)
5534{
5535 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5536 ((ULong)(Long)(Int)i2 << 1)))));
5537
5538 return "lghrl";
5539}
5540
5541static HChar *
5542s390_irgen_LHH(UChar r1, IRTemp op2addr)
5543{
5544 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5545
5546 return "lhh";
5547}
5548
5549static HChar *
5550s390_irgen_LFH(UChar r1, IRTemp op2addr)
5551{
5552 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5553
5554 return "lfh";
5555}
5556
5557static HChar *
5558s390_irgen_LLGFR(UChar r1, UChar r2)
5559{
5560 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5561
5562 return "llgfr";
5563}
5564
5565static HChar *
5566s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5567{
5568 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5569
5570 return "llgf";
5571}
5572
5573static HChar *
5574s390_irgen_LLGFRL(UChar r1, UInt i2)
5575{
5576 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5577 ((ULong)(Long)(Int)i2 << 1)))));
5578
5579 return "llgfrl";
5580}
5581
5582static HChar *
5583s390_irgen_LLCR(UChar r1, UChar r2)
5584{
5585 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5586
5587 return "llcr";
5588}
5589
5590static HChar *
5591s390_irgen_LLGCR(UChar r1, UChar r2)
5592{
5593 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5594
5595 return "llgcr";
5596}
5597
5598static HChar *
5599s390_irgen_LLC(UChar r1, IRTemp op2addr)
5600{
5601 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5602
5603 return "llc";
5604}
5605
5606static HChar *
5607s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5608{
5609 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5610
5611 return "llgc";
5612}
5613
5614static HChar *
5615s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5616{
5617 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5618
5619 return "llch";
5620}
5621
5622static HChar *
5623s390_irgen_LLHR(UChar r1, UChar r2)
5624{
5625 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5626
5627 return "llhr";
5628}
5629
5630static HChar *
5631s390_irgen_LLGHR(UChar r1, UChar r2)
5632{
5633 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5634
5635 return "llghr";
5636}
5637
5638static HChar *
5639s390_irgen_LLH(UChar r1, IRTemp op2addr)
5640{
5641 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5642
5643 return "llh";
5644}
5645
5646static HChar *
5647s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5648{
5649 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5650
5651 return "llgh";
5652}
5653
5654static HChar *
5655s390_irgen_LLHRL(UChar r1, UInt i2)
5656{
5657 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5658 ((ULong)(Long)(Int)i2 << 1)))));
5659
5660 return "llhrl";
5661}
5662
5663static HChar *
5664s390_irgen_LLGHRL(UChar r1, UInt i2)
5665{
5666 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5667 ((ULong)(Long)(Int)i2 << 1)))));
5668
5669 return "llghrl";
5670}
5671
5672static HChar *
5673s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5674{
5675 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5676
5677 return "llhh";
5678}
5679
5680static HChar *
5681s390_irgen_LLIHF(UChar r1, UInt i2)
5682{
5683 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5684
5685 return "llihf";
5686}
5687
5688static HChar *
5689s390_irgen_LLIHH(UChar r1, UShort i2)
5690{
5691 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5692
5693 return "llihh";
5694}
5695
5696static HChar *
5697s390_irgen_LLIHL(UChar r1, UShort i2)
5698{
5699 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5700
5701 return "llihl";
5702}
5703
5704static HChar *
5705s390_irgen_LLILF(UChar r1, UInt i2)
5706{
5707 put_gpr_dw0(r1, mkU64(i2));
5708
5709 return "llilf";
5710}
5711
5712static HChar *
5713s390_irgen_LLILH(UChar r1, UShort i2)
5714{
5715 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5716
5717 return "llilh";
5718}
5719
5720static HChar *
5721s390_irgen_LLILL(UChar r1, UShort i2)
5722{
5723 put_gpr_dw0(r1, mkU64(i2));
5724
5725 return "llill";
5726}
5727
5728static HChar *
5729s390_irgen_LLGTR(UChar r1, UChar r2)
5730{
5731 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5732 mkU32(2147483647))));
5733
5734 return "llgtr";
5735}
5736
5737static HChar *
5738s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5739{
5740 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5741 mkexpr(op2addr)), mkU32(2147483647))));
5742
5743 return "llgt";
5744}
5745
5746static HChar *
5747s390_irgen_LNR(UChar r1, UChar r2)
5748{
5749 IRTemp op2 = newTemp(Ity_I32);
5750 IRTemp result = newTemp(Ity_I32);
5751
5752 assign(op2, get_gpr_w1(r2));
5753 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5754 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5755 put_gpr_w1(r1, mkexpr(result));
5756 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5757
5758 return "lnr";
5759}
5760
5761static HChar *
5762s390_irgen_LNGR(UChar r1, UChar r2)
5763{
5764 IRTemp op2 = newTemp(Ity_I64);
5765 IRTemp result = newTemp(Ity_I64);
5766
5767 assign(op2, get_gpr_dw0(r2));
5768 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5769 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5770 put_gpr_dw0(r1, mkexpr(result));
5771 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5772
5773 return "lngr";
5774}
5775
5776static HChar *
5777s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5778{
5779 IRTemp op2 = newTemp(Ity_I64);
5780 IRTemp result = newTemp(Ity_I64);
5781
5782 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5783 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5784 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5785 put_gpr_dw0(r1, mkexpr(result));
5786 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5787
5788 return "lngfr";
5789}
5790
5791static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005792s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5793{
5794 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5795 guest_IA_next_instr);
5796 put_gpr_w1(r1, get_gpr_w1(r2));
5797
5798 return "locr";
5799}
5800
5801static HChar *
5802s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5803{
5804 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5805 guest_IA_next_instr);
5806 put_gpr_dw0(r1, get_gpr_dw0(r2));
5807
5808 return "locgr";
5809}
5810
5811static HChar *
5812s390_irgen_LOC(UChar r1, IRTemp op2addr)
5813{
5814 /* condition is checked in format handler */
5815 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5816
5817 return "loc";
5818}
5819
5820static HChar *
5821s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5822{
5823 /* condition is checked in format handler */
5824 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5825
5826 return "locg";
5827}
5828
5829static HChar *
sewardj2019a972011-03-07 16:04:07 +00005830s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5831{
5832 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5833 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5834 ));
5835
5836 return "lpq";
5837}
5838
5839static HChar *
5840s390_irgen_LPR(UChar r1, UChar r2)
5841{
5842 IRTemp op2 = newTemp(Ity_I32);
5843 IRTemp result = newTemp(Ity_I32);
5844
5845 assign(op2, get_gpr_w1(r2));
5846 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5847 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5848 put_gpr_w1(r1, mkexpr(result));
5849 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5850
5851 return "lpr";
5852}
5853
5854static HChar *
5855s390_irgen_LPGR(UChar r1, UChar r2)
5856{
5857 IRTemp op2 = newTemp(Ity_I64);
5858 IRTemp result = newTemp(Ity_I64);
5859
5860 assign(op2, get_gpr_dw0(r2));
5861 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5862 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5863 put_gpr_dw0(r1, mkexpr(result));
5864 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5865
5866 return "lpgr";
5867}
5868
5869static HChar *
5870s390_irgen_LPGFR(UChar r1, UChar r2)
5871{
5872 IRTemp op2 = newTemp(Ity_I64);
5873 IRTemp result = newTemp(Ity_I64);
5874
5875 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5876 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5877 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5878 put_gpr_dw0(r1, mkexpr(result));
5879 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5880
5881 return "lpgfr";
5882}
5883
5884static HChar *
5885s390_irgen_LRVR(UChar r1, UChar r2)
5886{
5887 IRTemp b0 = newTemp(Ity_I8);
5888 IRTemp b1 = newTemp(Ity_I8);
5889 IRTemp b2 = newTemp(Ity_I8);
5890 IRTemp b3 = newTemp(Ity_I8);
5891
5892 assign(b3, get_gpr_b7(r2));
5893 assign(b2, get_gpr_b6(r2));
5894 assign(b1, get_gpr_b5(r2));
5895 assign(b0, get_gpr_b4(r2));
5896 put_gpr_b4(r1, mkexpr(b3));
5897 put_gpr_b5(r1, mkexpr(b2));
5898 put_gpr_b6(r1, mkexpr(b1));
5899 put_gpr_b7(r1, mkexpr(b0));
5900
5901 return "lrvr";
5902}
5903
5904static HChar *
5905s390_irgen_LRVGR(UChar r1, UChar r2)
5906{
5907 IRTemp b0 = newTemp(Ity_I8);
5908 IRTemp b1 = newTemp(Ity_I8);
5909 IRTemp b2 = newTemp(Ity_I8);
5910 IRTemp b3 = newTemp(Ity_I8);
5911 IRTemp b4 = newTemp(Ity_I8);
5912 IRTemp b5 = newTemp(Ity_I8);
5913 IRTemp b6 = newTemp(Ity_I8);
5914 IRTemp b7 = newTemp(Ity_I8);
5915
5916 assign(b7, get_gpr_b7(r2));
5917 assign(b6, get_gpr_b6(r2));
5918 assign(b5, get_gpr_b5(r2));
5919 assign(b4, get_gpr_b4(r2));
5920 assign(b3, get_gpr_b3(r2));
5921 assign(b2, get_gpr_b2(r2));
5922 assign(b1, get_gpr_b1(r2));
5923 assign(b0, get_gpr_b0(r2));
5924 put_gpr_b0(r1, mkexpr(b7));
5925 put_gpr_b1(r1, mkexpr(b6));
5926 put_gpr_b2(r1, mkexpr(b5));
5927 put_gpr_b3(r1, mkexpr(b4));
5928 put_gpr_b4(r1, mkexpr(b3));
5929 put_gpr_b5(r1, mkexpr(b2));
5930 put_gpr_b6(r1, mkexpr(b1));
5931 put_gpr_b7(r1, mkexpr(b0));
5932
5933 return "lrvgr";
5934}
5935
5936static HChar *
5937s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5938{
5939 IRTemp op2 = newTemp(Ity_I16);
5940
5941 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5942 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5943 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5944
5945 return "lrvh";
5946}
5947
5948static HChar *
5949s390_irgen_LRV(UChar r1, IRTemp op2addr)
5950{
5951 IRTemp op2 = newTemp(Ity_I32);
5952
5953 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5954 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
5955 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5956 mkU8(8)), mkU32(255))));
5957 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5958 mkU8(16)), mkU32(255))));
5959 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5960 mkU8(24)), mkU32(255))));
5961
5962 return "lrv";
5963}
5964
5965static HChar *
5966s390_irgen_LRVG(UChar r1, IRTemp op2addr)
5967{
5968 IRTemp op2 = newTemp(Ity_I64);
5969
5970 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5971 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
5972 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5973 mkU8(8)), mkU64(255))));
5974 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5975 mkU8(16)), mkU64(255))));
5976 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5977 mkU8(24)), mkU64(255))));
5978 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5979 mkU8(32)), mkU64(255))));
5980 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5981 mkU8(40)), mkU64(255))));
5982 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5983 mkU8(48)), mkU64(255))));
5984 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5985 mkU8(56)), mkU64(255))));
5986
5987 return "lrvg";
5988}
5989
5990static HChar *
5991s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
5992{
5993 store(mkexpr(op1addr), mkU16(i2));
5994
5995 return "mvhhi";
5996}
5997
5998static HChar *
5999s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6000{
6001 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6002
6003 return "mvhi";
6004}
6005
6006static HChar *
6007s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6008{
6009 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6010
6011 return "mvghi";
6012}
6013
6014static HChar *
6015s390_irgen_MVI(UChar i2, IRTemp op1addr)
6016{
6017 store(mkexpr(op1addr), mkU8(i2));
6018
6019 return "mvi";
6020}
6021
6022static HChar *
6023s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6024{
6025 store(mkexpr(op1addr), mkU8(i2));
6026
6027 return "mviy";
6028}
6029
6030static HChar *
6031s390_irgen_MR(UChar r1, UChar r2)
6032{
6033 IRTemp op1 = newTemp(Ity_I32);
6034 IRTemp op2 = newTemp(Ity_I32);
6035 IRTemp result = newTemp(Ity_I64);
6036
6037 assign(op1, get_gpr_w1(r1 + 1));
6038 assign(op2, get_gpr_w1(r2));
6039 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6040 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6041 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6042
6043 return "mr";
6044}
6045
6046static HChar *
6047s390_irgen_M(UChar r1, IRTemp op2addr)
6048{
6049 IRTemp op1 = newTemp(Ity_I32);
6050 IRTemp op2 = newTemp(Ity_I32);
6051 IRTemp result = newTemp(Ity_I64);
6052
6053 assign(op1, get_gpr_w1(r1 + 1));
6054 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6055 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6056 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6057 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6058
6059 return "m";
6060}
6061
6062static HChar *
6063s390_irgen_MFY(UChar r1, IRTemp op2addr)
6064{
6065 IRTemp op1 = newTemp(Ity_I32);
6066 IRTemp op2 = newTemp(Ity_I32);
6067 IRTemp result = newTemp(Ity_I64);
6068
6069 assign(op1, get_gpr_w1(r1 + 1));
6070 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6071 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6072 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6073 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6074
6075 return "mfy";
6076}
6077
6078static HChar *
6079s390_irgen_MH(UChar r1, IRTemp op2addr)
6080{
6081 IRTemp op1 = newTemp(Ity_I32);
6082 IRTemp op2 = newTemp(Ity_I16);
6083 IRTemp result = newTemp(Ity_I64);
6084
6085 assign(op1, get_gpr_w1(r1));
6086 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6087 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6088 ));
6089 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6090
6091 return "mh";
6092}
6093
6094static HChar *
6095s390_irgen_MHY(UChar r1, IRTemp op2addr)
6096{
6097 IRTemp op1 = newTemp(Ity_I32);
6098 IRTemp op2 = newTemp(Ity_I16);
6099 IRTemp result = newTemp(Ity_I64);
6100
6101 assign(op1, get_gpr_w1(r1));
6102 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6103 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6104 ));
6105 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6106
6107 return "mhy";
6108}
6109
6110static HChar *
6111s390_irgen_MHI(UChar r1, UShort i2)
6112{
6113 IRTemp op1 = newTemp(Ity_I32);
6114 Short op2;
6115 IRTemp result = newTemp(Ity_I64);
6116
6117 assign(op1, get_gpr_w1(r1));
6118 op2 = (Short)i2;
6119 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6120 mkU16((UShort)op2))));
6121 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6122
6123 return "mhi";
6124}
6125
6126static HChar *
6127s390_irgen_MGHI(UChar r1, UShort i2)
6128{
6129 IRTemp op1 = newTemp(Ity_I64);
6130 Short op2;
6131 IRTemp result = newTemp(Ity_I128);
6132
6133 assign(op1, get_gpr_dw0(r1));
6134 op2 = (Short)i2;
6135 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6136 mkU16((UShort)op2))));
6137 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6138
6139 return "mghi";
6140}
6141
6142static HChar *
6143s390_irgen_MLR(UChar r1, UChar r2)
6144{
6145 IRTemp op1 = newTemp(Ity_I32);
6146 IRTemp op2 = newTemp(Ity_I32);
6147 IRTemp result = newTemp(Ity_I64);
6148
6149 assign(op1, get_gpr_w1(r1 + 1));
6150 assign(op2, get_gpr_w1(r2));
6151 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6152 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6153 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6154
6155 return "mlr";
6156}
6157
6158static HChar *
6159s390_irgen_MLGR(UChar r1, UChar r2)
6160{
6161 IRTemp op1 = newTemp(Ity_I64);
6162 IRTemp op2 = newTemp(Ity_I64);
6163 IRTemp result = newTemp(Ity_I128);
6164
6165 assign(op1, get_gpr_dw0(r1 + 1));
6166 assign(op2, get_gpr_dw0(r2));
6167 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6168 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6169 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6170
6171 return "mlgr";
6172}
6173
6174static HChar *
6175s390_irgen_ML(UChar r1, IRTemp op2addr)
6176{
6177 IRTemp op1 = newTemp(Ity_I32);
6178 IRTemp op2 = newTemp(Ity_I32);
6179 IRTemp result = newTemp(Ity_I64);
6180
6181 assign(op1, get_gpr_w1(r1 + 1));
6182 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6183 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6184 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6185 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6186
6187 return "ml";
6188}
6189
6190static HChar *
6191s390_irgen_MLG(UChar r1, IRTemp op2addr)
6192{
6193 IRTemp op1 = newTemp(Ity_I64);
6194 IRTemp op2 = newTemp(Ity_I64);
6195 IRTemp result = newTemp(Ity_I128);
6196
6197 assign(op1, get_gpr_dw0(r1 + 1));
6198 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6199 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6200 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6201 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6202
6203 return "mlg";
6204}
6205
6206static HChar *
6207s390_irgen_MSR(UChar r1, UChar r2)
6208{
6209 IRTemp op1 = newTemp(Ity_I32);
6210 IRTemp op2 = newTemp(Ity_I32);
6211 IRTemp result = newTemp(Ity_I64);
6212
6213 assign(op1, get_gpr_w1(r1));
6214 assign(op2, get_gpr_w1(r2));
6215 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6216 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6217
6218 return "msr";
6219}
6220
6221static HChar *
6222s390_irgen_MSGR(UChar r1, UChar r2)
6223{
6224 IRTemp op1 = newTemp(Ity_I64);
6225 IRTemp op2 = newTemp(Ity_I64);
6226 IRTemp result = newTemp(Ity_I128);
6227
6228 assign(op1, get_gpr_dw0(r1));
6229 assign(op2, get_gpr_dw0(r2));
6230 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6231 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6232
6233 return "msgr";
6234}
6235
6236static HChar *
6237s390_irgen_MSGFR(UChar r1, UChar r2)
6238{
6239 IRTemp op1 = newTemp(Ity_I64);
6240 IRTemp op2 = newTemp(Ity_I32);
6241 IRTemp result = newTemp(Ity_I128);
6242
6243 assign(op1, get_gpr_dw0(r1));
6244 assign(op2, get_gpr_w1(r2));
6245 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6246 ));
6247 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6248
6249 return "msgfr";
6250}
6251
6252static HChar *
6253s390_irgen_MS(UChar r1, IRTemp op2addr)
6254{
6255 IRTemp op1 = newTemp(Ity_I32);
6256 IRTemp op2 = newTemp(Ity_I32);
6257 IRTemp result = newTemp(Ity_I64);
6258
6259 assign(op1, get_gpr_w1(r1));
6260 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6261 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6262 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6263
6264 return "ms";
6265}
6266
6267static HChar *
6268s390_irgen_MSY(UChar r1, IRTemp op2addr)
6269{
6270 IRTemp op1 = newTemp(Ity_I32);
6271 IRTemp op2 = newTemp(Ity_I32);
6272 IRTemp result = newTemp(Ity_I64);
6273
6274 assign(op1, get_gpr_w1(r1));
6275 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6276 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6277 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6278
6279 return "msy";
6280}
6281
6282static HChar *
6283s390_irgen_MSG(UChar r1, IRTemp op2addr)
6284{
6285 IRTemp op1 = newTemp(Ity_I64);
6286 IRTemp op2 = newTemp(Ity_I64);
6287 IRTemp result = newTemp(Ity_I128);
6288
6289 assign(op1, get_gpr_dw0(r1));
6290 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6291 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6292 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6293
6294 return "msg";
6295}
6296
6297static HChar *
6298s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6299{
6300 IRTemp op1 = newTemp(Ity_I64);
6301 IRTemp op2 = newTemp(Ity_I32);
6302 IRTemp result = newTemp(Ity_I128);
6303
6304 assign(op1, get_gpr_dw0(r1));
6305 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6306 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6307 ));
6308 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6309
6310 return "msgf";
6311}
6312
6313static HChar *
6314s390_irgen_MSFI(UChar r1, UInt i2)
6315{
6316 IRTemp op1 = newTemp(Ity_I32);
6317 Int op2;
6318 IRTemp result = newTemp(Ity_I64);
6319
6320 assign(op1, get_gpr_w1(r1));
6321 op2 = (Int)i2;
6322 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6323 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6324
6325 return "msfi";
6326}
6327
6328static HChar *
6329s390_irgen_MSGFI(UChar r1, UInt i2)
6330{
6331 IRTemp op1 = newTemp(Ity_I64);
6332 Int op2;
6333 IRTemp result = newTemp(Ity_I128);
6334
6335 assign(op1, get_gpr_dw0(r1));
6336 op2 = (Int)i2;
6337 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6338 op2))));
6339 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6340
6341 return "msgfi";
6342}
6343
6344static HChar *
6345s390_irgen_OR(UChar r1, UChar r2)
6346{
6347 IRTemp op1 = newTemp(Ity_I32);
6348 IRTemp op2 = newTemp(Ity_I32);
6349 IRTemp result = newTemp(Ity_I32);
6350
6351 assign(op1, get_gpr_w1(r1));
6352 assign(op2, get_gpr_w1(r2));
6353 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6354 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6355 put_gpr_w1(r1, mkexpr(result));
6356
6357 return "or";
6358}
6359
6360static HChar *
6361s390_irgen_OGR(UChar r1, UChar r2)
6362{
6363 IRTemp op1 = newTemp(Ity_I64);
6364 IRTemp op2 = newTemp(Ity_I64);
6365 IRTemp result = newTemp(Ity_I64);
6366
6367 assign(op1, get_gpr_dw0(r1));
6368 assign(op2, get_gpr_dw0(r2));
6369 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6370 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6371 put_gpr_dw0(r1, mkexpr(result));
6372
6373 return "ogr";
6374}
6375
6376static HChar *
6377s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6378{
6379 IRTemp op2 = newTemp(Ity_I32);
6380 IRTemp op3 = newTemp(Ity_I32);
6381 IRTemp result = newTemp(Ity_I32);
6382
6383 assign(op2, get_gpr_w1(r2));
6384 assign(op3, get_gpr_w1(r3));
6385 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6386 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6387 put_gpr_w1(r1, mkexpr(result));
6388
6389 return "ork";
6390}
6391
6392static HChar *
6393s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6394{
6395 IRTemp op2 = newTemp(Ity_I64);
6396 IRTemp op3 = newTemp(Ity_I64);
6397 IRTemp result = newTemp(Ity_I64);
6398
6399 assign(op2, get_gpr_dw0(r2));
6400 assign(op3, get_gpr_dw0(r3));
6401 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6402 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6403 put_gpr_dw0(r1, mkexpr(result));
6404
6405 return "ogrk";
6406}
6407
6408static HChar *
6409s390_irgen_O(UChar r1, IRTemp op2addr)
6410{
6411 IRTemp op1 = newTemp(Ity_I32);
6412 IRTemp op2 = newTemp(Ity_I32);
6413 IRTemp result = newTemp(Ity_I32);
6414
6415 assign(op1, get_gpr_w1(r1));
6416 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6417 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6418 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6419 put_gpr_w1(r1, mkexpr(result));
6420
6421 return "o";
6422}
6423
6424static HChar *
6425s390_irgen_OY(UChar r1, IRTemp op2addr)
6426{
6427 IRTemp op1 = newTemp(Ity_I32);
6428 IRTemp op2 = newTemp(Ity_I32);
6429 IRTemp result = newTemp(Ity_I32);
6430
6431 assign(op1, get_gpr_w1(r1));
6432 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6433 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6434 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6435 put_gpr_w1(r1, mkexpr(result));
6436
6437 return "oy";
6438}
6439
6440static HChar *
6441s390_irgen_OG(UChar r1, IRTemp op2addr)
6442{
6443 IRTemp op1 = newTemp(Ity_I64);
6444 IRTemp op2 = newTemp(Ity_I64);
6445 IRTemp result = newTemp(Ity_I64);
6446
6447 assign(op1, get_gpr_dw0(r1));
6448 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6449 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6450 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6451 put_gpr_dw0(r1, mkexpr(result));
6452
6453 return "og";
6454}
6455
6456static HChar *
6457s390_irgen_OI(UChar i2, IRTemp op1addr)
6458{
6459 IRTemp op1 = newTemp(Ity_I8);
6460 UChar op2;
6461 IRTemp result = newTemp(Ity_I8);
6462
6463 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6464 op2 = i2;
6465 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6466 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6467 store(mkexpr(op1addr), mkexpr(result));
6468
6469 return "oi";
6470}
6471
6472static HChar *
6473s390_irgen_OIY(UChar i2, IRTemp op1addr)
6474{
6475 IRTemp op1 = newTemp(Ity_I8);
6476 UChar op2;
6477 IRTemp result = newTemp(Ity_I8);
6478
6479 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6480 op2 = i2;
6481 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6482 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6483 store(mkexpr(op1addr), mkexpr(result));
6484
6485 return "oiy";
6486}
6487
6488static HChar *
6489s390_irgen_OIHF(UChar r1, UInt i2)
6490{
6491 IRTemp op1 = newTemp(Ity_I32);
6492 UInt op2;
6493 IRTemp result = newTemp(Ity_I32);
6494
6495 assign(op1, get_gpr_w0(r1));
6496 op2 = i2;
6497 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6498 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6499 put_gpr_w0(r1, mkexpr(result));
6500
6501 return "oihf";
6502}
6503
6504static HChar *
6505s390_irgen_OIHH(UChar r1, UShort i2)
6506{
6507 IRTemp op1 = newTemp(Ity_I16);
6508 UShort op2;
6509 IRTemp result = newTemp(Ity_I16);
6510
6511 assign(op1, get_gpr_hw0(r1));
6512 op2 = i2;
6513 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6514 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6515 put_gpr_hw0(r1, mkexpr(result));
6516
6517 return "oihh";
6518}
6519
6520static HChar *
6521s390_irgen_OIHL(UChar r1, UShort i2)
6522{
6523 IRTemp op1 = newTemp(Ity_I16);
6524 UShort op2;
6525 IRTemp result = newTemp(Ity_I16);
6526
6527 assign(op1, get_gpr_hw1(r1));
6528 op2 = i2;
6529 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6530 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6531 put_gpr_hw1(r1, mkexpr(result));
6532
6533 return "oihl";
6534}
6535
6536static HChar *
6537s390_irgen_OILF(UChar r1, UInt i2)
6538{
6539 IRTemp op1 = newTemp(Ity_I32);
6540 UInt op2;
6541 IRTemp result = newTemp(Ity_I32);
6542
6543 assign(op1, get_gpr_w1(r1));
6544 op2 = i2;
6545 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6546 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6547 put_gpr_w1(r1, mkexpr(result));
6548
6549 return "oilf";
6550}
6551
6552static HChar *
6553s390_irgen_OILH(UChar r1, UShort i2)
6554{
6555 IRTemp op1 = newTemp(Ity_I16);
6556 UShort op2;
6557 IRTemp result = newTemp(Ity_I16);
6558
6559 assign(op1, get_gpr_hw2(r1));
6560 op2 = i2;
6561 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6562 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6563 put_gpr_hw2(r1, mkexpr(result));
6564
6565 return "oilh";
6566}
6567
6568static HChar *
6569s390_irgen_OILL(UChar r1, UShort i2)
6570{
6571 IRTemp op1 = newTemp(Ity_I16);
6572 UShort op2;
6573 IRTemp result = newTemp(Ity_I16);
6574
6575 assign(op1, get_gpr_hw3(r1));
6576 op2 = i2;
6577 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6578 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6579 put_gpr_hw3(r1, mkexpr(result));
6580
6581 return "oill";
6582}
6583
6584static HChar *
6585s390_irgen_PFD(void)
6586{
6587
6588 return "pfd";
6589}
6590
6591static HChar *
6592s390_irgen_PFDRL(void)
6593{
6594
6595 return "pfdrl";
6596}
6597
6598static HChar *
6599s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6600{
6601 IRTemp amount = newTemp(Ity_I64);
6602 IRTemp op = newTemp(Ity_I32);
6603
6604 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6605 assign(op, get_gpr_w1(r3));
6606 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6607 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6608 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6609
6610 return "rll";
6611}
6612
6613static HChar *
6614s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6615{
6616 IRTemp amount = newTemp(Ity_I64);
6617 IRTemp op = newTemp(Ity_I64);
6618
6619 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6620 assign(op, get_gpr_dw0(r3));
6621 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6622 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6623 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6624
6625 return "rllg";
6626}
6627
6628static HChar *
6629s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6630{
6631 UChar from;
6632 UChar to;
6633 UChar rot;
6634 UChar t_bit;
6635 ULong mask;
6636 ULong maskc;
6637 IRTemp result = newTemp(Ity_I64);
6638 IRTemp op2 = newTemp(Ity_I64);
6639
6640 from = i3 & 63;
6641 to = i4 & 63;
6642 rot = i5 & 63;
6643 t_bit = i3 & 128;
6644 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6645 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6646 mkU8(64 - rot))));
6647 if (from <= to) {
6648 mask = ~0ULL;
6649 mask = (mask >> from) & (mask << (63 - to));
6650 maskc = ~mask;
6651 } else {
6652 maskc = ~0ULL;
6653 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6654 mask = ~maskc;
6655 }
6656 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6657 ), mkU64(mask)));
6658 if (t_bit == 0) {
6659 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6660 mkU64(maskc)), mkexpr(result)));
6661 }
6662 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6663
6664 return "rnsbg";
6665}
6666
6667static HChar *
6668s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6669{
6670 UChar from;
6671 UChar to;
6672 UChar rot;
6673 UChar t_bit;
6674 ULong mask;
6675 ULong maskc;
6676 IRTemp result = newTemp(Ity_I64);
6677 IRTemp op2 = newTemp(Ity_I64);
6678
6679 from = i3 & 63;
6680 to = i4 & 63;
6681 rot = i5 & 63;
6682 t_bit = i3 & 128;
6683 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6684 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6685 mkU8(64 - rot))));
6686 if (from <= to) {
6687 mask = ~0ULL;
6688 mask = (mask >> from) & (mask << (63 - to));
6689 maskc = ~mask;
6690 } else {
6691 maskc = ~0ULL;
6692 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6693 mask = ~maskc;
6694 }
6695 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6696 ), mkU64(mask)));
6697 if (t_bit == 0) {
6698 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6699 mkU64(maskc)), mkexpr(result)));
6700 }
6701 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6702
6703 return "rxsbg";
6704}
6705
6706static HChar *
6707s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6708{
6709 UChar from;
6710 UChar to;
6711 UChar rot;
6712 UChar t_bit;
6713 ULong mask;
6714 ULong maskc;
6715 IRTemp result = newTemp(Ity_I64);
6716 IRTemp op2 = newTemp(Ity_I64);
6717
6718 from = i3 & 63;
6719 to = i4 & 63;
6720 rot = i5 & 63;
6721 t_bit = i3 & 128;
6722 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6723 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6724 mkU8(64 - rot))));
6725 if (from <= to) {
6726 mask = ~0ULL;
6727 mask = (mask >> from) & (mask << (63 - to));
6728 maskc = ~mask;
6729 } else {
6730 maskc = ~0ULL;
6731 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6732 mask = ~maskc;
6733 }
6734 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6735 ), mkU64(mask)));
6736 if (t_bit == 0) {
6737 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6738 mkU64(maskc)), mkexpr(result)));
6739 }
6740 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6741
6742 return "rosbg";
6743}
6744
6745static HChar *
6746s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6747{
6748 UChar from;
6749 UChar to;
6750 UChar rot;
6751 UChar z_bit;
6752 ULong mask;
6753 ULong maskc;
6754 IRTemp op2 = newTemp(Ity_I64);
6755 IRTemp result = newTemp(Ity_I64);
6756
6757 from = i3 & 63;
6758 to = i4 & 63;
6759 rot = i5 & 63;
6760 z_bit = i4 & 128;
6761 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6762 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6763 mkU8(64 - rot))));
6764 if (from <= to) {
6765 mask = ~0ULL;
6766 mask = (mask >> from) & (mask << (63 - to));
6767 maskc = ~mask;
6768 } else {
6769 maskc = ~0ULL;
6770 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6771 mask = ~maskc;
6772 }
6773 if (z_bit == 0) {
6774 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6775 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6776 } else {
6777 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6778 }
6779 assign(result, get_gpr_dw0(r1));
6780 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6781
6782 return "risbg";
6783}
6784
6785static HChar *
6786s390_irgen_SAR(UChar r1, UChar r2)
6787{
6788 put_ar_w0(r1, get_gpr_w1(r2));
6789 if (unlikely(vex_traceflags & VEX_TRACE_FE))
6790 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6791
6792 return "sar";
6793}
6794
6795static HChar *
6796s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6797{
6798 IRTemp p1 = newTemp(Ity_I64);
6799 IRTemp p2 = newTemp(Ity_I64);
6800 IRTemp op = newTemp(Ity_I64);
6801 IRTemp result = newTemp(Ity_I64);
6802 Long sign_mask;
6803 IRTemp shift_amount = newTemp(Ity_I64);
6804
6805 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6806 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6807 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6808 ));
6809 sign_mask = 1ULL << 63;
6810 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6811 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6812 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6813 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6814 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6815 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6816 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6817
6818 return "slda";
6819}
6820
6821static HChar *
6822s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6823{
6824 IRTemp p1 = newTemp(Ity_I64);
6825 IRTemp p2 = newTemp(Ity_I64);
6826 IRTemp result = newTemp(Ity_I64);
6827
6828 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6829 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6830 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6831 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6832 mkexpr(op2addr), mkU64(63)))));
6833 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6834 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6835
6836 return "sldl";
6837}
6838
6839static HChar *
6840s390_irgen_SLA(UChar r1, IRTemp op2addr)
6841{
6842 IRTemp uop = newTemp(Ity_I32);
6843 IRTemp result = newTemp(Ity_I32);
6844 UInt sign_mask;
6845 IRTemp shift_amount = newTemp(Ity_I64);
6846 IRTemp op = newTemp(Ity_I32);
6847
6848 assign(op, get_gpr_w1(r1));
6849 assign(uop, get_gpr_w1(r1));
6850 sign_mask = 2147483648U;
6851 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6852 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6853 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6854 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6855 put_gpr_w1(r1, mkexpr(result));
6856 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6857
6858 return "sla";
6859}
6860
6861static HChar *
6862s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6863{
6864 IRTemp uop = newTemp(Ity_I32);
6865 IRTemp result = newTemp(Ity_I32);
6866 UInt sign_mask;
6867 IRTemp shift_amount = newTemp(Ity_I64);
6868 IRTemp op = newTemp(Ity_I32);
6869
6870 assign(op, get_gpr_w1(r3));
6871 assign(uop, get_gpr_w1(r3));
6872 sign_mask = 2147483648U;
6873 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6874 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6875 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6876 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6877 put_gpr_w1(r1, mkexpr(result));
6878 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6879
6880 return "slak";
6881}
6882
6883static HChar *
6884s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6885{
6886 IRTemp uop = newTemp(Ity_I64);
6887 IRTemp result = newTemp(Ity_I64);
6888 ULong sign_mask;
6889 IRTemp shift_amount = newTemp(Ity_I64);
6890 IRTemp op = newTemp(Ity_I64);
6891
6892 assign(op, get_gpr_dw0(r3));
6893 assign(uop, get_gpr_dw0(r3));
6894 sign_mask = 9223372036854775808ULL;
6895 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6896 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6897 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6898 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6899 put_gpr_dw0(r1, mkexpr(result));
6900 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6901
6902 return "slag";
6903}
6904
6905static HChar *
6906s390_irgen_SLL(UChar r1, IRTemp op2addr)
6907{
6908 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6909 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6910
6911 return "sll";
6912}
6913
6914static HChar *
6915s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6916{
6917 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6918 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6919
6920 return "sllk";
6921}
6922
6923static HChar *
6924s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6925{
6926 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6927 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6928
6929 return "sllg";
6930}
6931
6932static HChar *
6933s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6934{
6935 IRTemp p1 = newTemp(Ity_I64);
6936 IRTemp p2 = newTemp(Ity_I64);
6937 IRTemp result = newTemp(Ity_I64);
6938
6939 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6940 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6941 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6942 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6943 mkexpr(op2addr), mkU64(63)))));
6944 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6945 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6946 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6947
6948 return "srda";
6949}
6950
6951static HChar *
6952s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6953{
6954 IRTemp p1 = newTemp(Ity_I64);
6955 IRTemp p2 = newTemp(Ity_I64);
6956 IRTemp result = newTemp(Ity_I64);
6957
6958 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6959 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6960 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6961 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6962 mkexpr(op2addr), mkU64(63)))));
6963 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6964 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6965
6966 return "srdl";
6967}
6968
6969static HChar *
6970s390_irgen_SRA(UChar r1, IRTemp op2addr)
6971{
6972 IRTemp result = newTemp(Ity_I32);
6973 IRTemp op = newTemp(Ity_I32);
6974
6975 assign(op, get_gpr_w1(r1));
6976 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6977 mkexpr(op2addr), mkU64(63)))));
6978 put_gpr_w1(r1, mkexpr(result));
6979 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6980
6981 return "sra";
6982}
6983
6984static HChar *
6985s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
6986{
6987 IRTemp result = newTemp(Ity_I32);
6988 IRTemp op = newTemp(Ity_I32);
6989
6990 assign(op, get_gpr_w1(r3));
6991 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6992 mkexpr(op2addr), mkU64(63)))));
6993 put_gpr_w1(r1, mkexpr(result));
6994 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6995
6996 return "srak";
6997}
6998
6999static HChar *
7000s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7001{
7002 IRTemp result = newTemp(Ity_I64);
7003 IRTemp op = newTemp(Ity_I64);
7004
7005 assign(op, get_gpr_dw0(r3));
7006 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7007 mkexpr(op2addr), mkU64(63)))));
7008 put_gpr_dw0(r1, mkexpr(result));
7009 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7010
7011 return "srag";
7012}
7013
7014static HChar *
7015s390_irgen_SRL(UChar r1, IRTemp op2addr)
7016{
7017 IRTemp op = newTemp(Ity_I32);
7018
7019 assign(op, get_gpr_w1(r1));
7020 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7021 mkexpr(op2addr), mkU64(63)))));
7022
7023 return "srl";
7024}
7025
7026static HChar *
7027s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7028{
7029 IRTemp op = newTemp(Ity_I32);
7030
7031 assign(op, get_gpr_w1(r3));
7032 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7033 mkexpr(op2addr), mkU64(63)))));
7034
7035 return "srlk";
7036}
7037
7038static HChar *
7039s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7040{
7041 IRTemp op = newTemp(Ity_I64);
7042
7043 assign(op, get_gpr_dw0(r3));
7044 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7045 mkexpr(op2addr), mkU64(63)))));
7046
7047 return "srlg";
7048}
7049
7050static HChar *
7051s390_irgen_ST(UChar r1, IRTemp op2addr)
7052{
7053 store(mkexpr(op2addr), get_gpr_w1(r1));
7054
7055 return "st";
7056}
7057
7058static HChar *
7059s390_irgen_STY(UChar r1, IRTemp op2addr)
7060{
7061 store(mkexpr(op2addr), get_gpr_w1(r1));
7062
7063 return "sty";
7064}
7065
7066static HChar *
7067s390_irgen_STG(UChar r1, IRTemp op2addr)
7068{
7069 store(mkexpr(op2addr), get_gpr_dw0(r1));
7070
7071 return "stg";
7072}
7073
7074static HChar *
7075s390_irgen_STRL(UChar r1, UInt i2)
7076{
7077 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7078 get_gpr_w1(r1));
7079
7080 return "strl";
7081}
7082
7083static HChar *
7084s390_irgen_STGRL(UChar r1, UInt i2)
7085{
7086 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7087 get_gpr_dw0(r1));
7088
7089 return "stgrl";
7090}
7091
7092static HChar *
7093s390_irgen_STC(UChar r1, IRTemp op2addr)
7094{
7095 store(mkexpr(op2addr), get_gpr_b7(r1));
7096
7097 return "stc";
7098}
7099
7100static HChar *
7101s390_irgen_STCY(UChar r1, IRTemp op2addr)
7102{
7103 store(mkexpr(op2addr), get_gpr_b7(r1));
7104
7105 return "stcy";
7106}
7107
7108static HChar *
7109s390_irgen_STCH(UChar r1, IRTemp op2addr)
7110{
7111 store(mkexpr(op2addr), get_gpr_b3(r1));
7112
7113 return "stch";
7114}
7115
7116static HChar *
7117s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7118{
7119 UChar mask;
7120 UChar n;
7121
7122 mask = (UChar)r3;
7123 n = 0;
7124 if ((mask & 8) != 0) {
7125 store(mkexpr(op2addr), get_gpr_b4(r1));
7126 n = n + 1;
7127 }
7128 if ((mask & 4) != 0) {
7129 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7130 n = n + 1;
7131 }
7132 if ((mask & 2) != 0) {
7133 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7134 n = n + 1;
7135 }
7136 if ((mask & 1) != 0) {
7137 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7138 }
7139
7140 return "stcm";
7141}
7142
7143static HChar *
7144s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7145{
7146 UChar mask;
7147 UChar n;
7148
7149 mask = (UChar)r3;
7150 n = 0;
7151 if ((mask & 8) != 0) {
7152 store(mkexpr(op2addr), get_gpr_b4(r1));
7153 n = n + 1;
7154 }
7155 if ((mask & 4) != 0) {
7156 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7157 n = n + 1;
7158 }
7159 if ((mask & 2) != 0) {
7160 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7161 n = n + 1;
7162 }
7163 if ((mask & 1) != 0) {
7164 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7165 }
7166
7167 return "stcmy";
7168}
7169
7170static HChar *
7171s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7172{
7173 UChar mask;
7174 UChar n;
7175
7176 mask = (UChar)r3;
7177 n = 0;
7178 if ((mask & 8) != 0) {
7179 store(mkexpr(op2addr), get_gpr_b0(r1));
7180 n = n + 1;
7181 }
7182 if ((mask & 4) != 0) {
7183 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7184 n = n + 1;
7185 }
7186 if ((mask & 2) != 0) {
7187 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7188 n = n + 1;
7189 }
7190 if ((mask & 1) != 0) {
7191 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7192 }
7193
7194 return "stcmh";
7195}
7196
7197static HChar *
7198s390_irgen_STH(UChar r1, IRTemp op2addr)
7199{
7200 store(mkexpr(op2addr), get_gpr_hw3(r1));
7201
7202 return "sth";
7203}
7204
7205static HChar *
7206s390_irgen_STHY(UChar r1, IRTemp op2addr)
7207{
7208 store(mkexpr(op2addr), get_gpr_hw3(r1));
7209
7210 return "sthy";
7211}
7212
7213static HChar *
7214s390_irgen_STHRL(UChar r1, UInt i2)
7215{
7216 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7217 get_gpr_hw3(r1));
7218
7219 return "sthrl";
7220}
7221
7222static HChar *
7223s390_irgen_STHH(UChar r1, IRTemp op2addr)
7224{
7225 store(mkexpr(op2addr), get_gpr_hw1(r1));
7226
7227 return "sthh";
7228}
7229
7230static HChar *
7231s390_irgen_STFH(UChar r1, IRTemp op2addr)
7232{
7233 store(mkexpr(op2addr), get_gpr_w0(r1));
7234
7235 return "stfh";
7236}
7237
7238static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007239s390_irgen_STOC(UChar r1, IRTemp op2addr)
7240{
7241 /* condition is checked in format handler */
7242 store(mkexpr(op2addr), get_gpr_w1(r1));
7243
7244 return "stoc";
7245}
7246
7247static HChar *
7248s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7249{
7250 /* condition is checked in format handler */
7251 store(mkexpr(op2addr), get_gpr_dw0(r1));
7252
7253 return "stocg";
7254}
7255
7256static HChar *
sewardj2019a972011-03-07 16:04:07 +00007257s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7258{
7259 store(mkexpr(op2addr), get_gpr_dw0(r1));
7260 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7261
7262 return "stpq";
7263}
7264
7265static HChar *
7266s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7267{
7268 store(mkexpr(op2addr), get_gpr_b7(r1));
7269 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7270
7271 return "strvh";
7272}
7273
7274static HChar *
7275s390_irgen_STRV(UChar r1, IRTemp op2addr)
7276{
7277 store(mkexpr(op2addr), get_gpr_b7(r1));
7278 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7279 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7280 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7281
7282 return "strv";
7283}
7284
7285static HChar *
7286s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7287{
7288 store(mkexpr(op2addr), get_gpr_b7(r1));
7289 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7290 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7291 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7292 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7293 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7294 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7295 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7296
7297 return "strvg";
7298}
7299
7300static HChar *
7301s390_irgen_SR(UChar r1, UChar r2)
7302{
7303 IRTemp op1 = newTemp(Ity_I32);
7304 IRTemp op2 = newTemp(Ity_I32);
7305 IRTemp result = newTemp(Ity_I32);
7306
7307 assign(op1, get_gpr_w1(r1));
7308 assign(op2, get_gpr_w1(r2));
7309 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7310 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7311 put_gpr_w1(r1, mkexpr(result));
7312
7313 return "sr";
7314}
7315
7316static HChar *
7317s390_irgen_SGR(UChar r1, UChar r2)
7318{
7319 IRTemp op1 = newTemp(Ity_I64);
7320 IRTemp op2 = newTemp(Ity_I64);
7321 IRTemp result = newTemp(Ity_I64);
7322
7323 assign(op1, get_gpr_dw0(r1));
7324 assign(op2, get_gpr_dw0(r2));
7325 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7326 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7327 put_gpr_dw0(r1, mkexpr(result));
7328
7329 return "sgr";
7330}
7331
7332static HChar *
7333s390_irgen_SGFR(UChar r1, UChar r2)
7334{
7335 IRTemp op1 = newTemp(Ity_I64);
7336 IRTemp op2 = newTemp(Ity_I64);
7337 IRTemp result = newTemp(Ity_I64);
7338
7339 assign(op1, get_gpr_dw0(r1));
7340 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7341 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7342 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7343 put_gpr_dw0(r1, mkexpr(result));
7344
7345 return "sgfr";
7346}
7347
7348static HChar *
7349s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7350{
7351 IRTemp op2 = newTemp(Ity_I32);
7352 IRTemp op3 = newTemp(Ity_I32);
7353 IRTemp result = newTemp(Ity_I32);
7354
7355 assign(op2, get_gpr_w1(r2));
7356 assign(op3, get_gpr_w1(r3));
7357 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7358 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7359 put_gpr_w1(r1, mkexpr(result));
7360
7361 return "srk";
7362}
7363
7364static HChar *
7365s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7366{
7367 IRTemp op2 = newTemp(Ity_I64);
7368 IRTemp op3 = newTemp(Ity_I64);
7369 IRTemp result = newTemp(Ity_I64);
7370
7371 assign(op2, get_gpr_dw0(r2));
7372 assign(op3, get_gpr_dw0(r3));
7373 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7374 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7375 put_gpr_dw0(r1, mkexpr(result));
7376
7377 return "sgrk";
7378}
7379
7380static HChar *
7381s390_irgen_S(UChar r1, IRTemp op2addr)
7382{
7383 IRTemp op1 = newTemp(Ity_I32);
7384 IRTemp op2 = newTemp(Ity_I32);
7385 IRTemp result = newTemp(Ity_I32);
7386
7387 assign(op1, get_gpr_w1(r1));
7388 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7389 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7390 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7391 put_gpr_w1(r1, mkexpr(result));
7392
7393 return "s";
7394}
7395
7396static HChar *
7397s390_irgen_SY(UChar r1, IRTemp op2addr)
7398{
7399 IRTemp op1 = newTemp(Ity_I32);
7400 IRTemp op2 = newTemp(Ity_I32);
7401 IRTemp result = newTemp(Ity_I32);
7402
7403 assign(op1, get_gpr_w1(r1));
7404 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7405 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7406 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7407 put_gpr_w1(r1, mkexpr(result));
7408
7409 return "sy";
7410}
7411
7412static HChar *
7413s390_irgen_SG(UChar r1, IRTemp op2addr)
7414{
7415 IRTemp op1 = newTemp(Ity_I64);
7416 IRTemp op2 = newTemp(Ity_I64);
7417 IRTemp result = newTemp(Ity_I64);
7418
7419 assign(op1, get_gpr_dw0(r1));
7420 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7421 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7422 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7423 put_gpr_dw0(r1, mkexpr(result));
7424
7425 return "sg";
7426}
7427
7428static HChar *
7429s390_irgen_SGF(UChar r1, IRTemp op2addr)
7430{
7431 IRTemp op1 = newTemp(Ity_I64);
7432 IRTemp op2 = newTemp(Ity_I64);
7433 IRTemp result = newTemp(Ity_I64);
7434
7435 assign(op1, get_gpr_dw0(r1));
7436 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7437 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7438 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7439 put_gpr_dw0(r1, mkexpr(result));
7440
7441 return "sgf";
7442}
7443
7444static HChar *
7445s390_irgen_SH(UChar r1, IRTemp op2addr)
7446{
7447 IRTemp op1 = newTemp(Ity_I32);
7448 IRTemp op2 = newTemp(Ity_I32);
7449 IRTemp result = newTemp(Ity_I32);
7450
7451 assign(op1, get_gpr_w1(r1));
7452 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7453 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7454 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7455 put_gpr_w1(r1, mkexpr(result));
7456
7457 return "sh";
7458}
7459
7460static HChar *
7461s390_irgen_SHY(UChar r1, IRTemp op2addr)
7462{
7463 IRTemp op1 = newTemp(Ity_I32);
7464 IRTemp op2 = newTemp(Ity_I32);
7465 IRTemp result = newTemp(Ity_I32);
7466
7467 assign(op1, get_gpr_w1(r1));
7468 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7469 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7470 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7471 put_gpr_w1(r1, mkexpr(result));
7472
7473 return "shy";
7474}
7475
7476static HChar *
7477s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7478{
7479 IRTemp op2 = newTemp(Ity_I32);
7480 IRTemp op3 = newTemp(Ity_I32);
7481 IRTemp result = newTemp(Ity_I32);
7482
7483 assign(op2, get_gpr_w0(r1));
7484 assign(op3, get_gpr_w0(r2));
7485 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7486 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7487 put_gpr_w0(r1, mkexpr(result));
7488
7489 return "shhhr";
7490}
7491
7492static HChar *
7493s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7494{
7495 IRTemp op2 = newTemp(Ity_I32);
7496 IRTemp op3 = newTemp(Ity_I32);
7497 IRTemp result = newTemp(Ity_I32);
7498
7499 assign(op2, get_gpr_w0(r1));
7500 assign(op3, get_gpr_w1(r2));
7501 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7502 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7503 put_gpr_w0(r1, mkexpr(result));
7504
7505 return "shhlr";
7506}
7507
7508static HChar *
7509s390_irgen_SLR(UChar r1, UChar r2)
7510{
7511 IRTemp op1 = newTemp(Ity_I32);
7512 IRTemp op2 = newTemp(Ity_I32);
7513 IRTemp result = newTemp(Ity_I32);
7514
7515 assign(op1, get_gpr_w1(r1));
7516 assign(op2, get_gpr_w1(r2));
7517 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7518 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7519 put_gpr_w1(r1, mkexpr(result));
7520
7521 return "slr";
7522}
7523
7524static HChar *
7525s390_irgen_SLGR(UChar r1, UChar r2)
7526{
7527 IRTemp op1 = newTemp(Ity_I64);
7528 IRTemp op2 = newTemp(Ity_I64);
7529 IRTemp result = newTemp(Ity_I64);
7530
7531 assign(op1, get_gpr_dw0(r1));
7532 assign(op2, get_gpr_dw0(r2));
7533 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7534 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7535 put_gpr_dw0(r1, mkexpr(result));
7536
7537 return "slgr";
7538}
7539
7540static HChar *
7541s390_irgen_SLGFR(UChar r1, UChar r2)
7542{
7543 IRTemp op1 = newTemp(Ity_I64);
7544 IRTemp op2 = newTemp(Ity_I64);
7545 IRTemp result = newTemp(Ity_I64);
7546
7547 assign(op1, get_gpr_dw0(r1));
7548 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7549 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7550 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7551 put_gpr_dw0(r1, mkexpr(result));
7552
7553 return "slgfr";
7554}
7555
7556static HChar *
7557s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7558{
7559 IRTemp op2 = newTemp(Ity_I32);
7560 IRTemp op3 = newTemp(Ity_I32);
7561 IRTemp result = newTemp(Ity_I32);
7562
7563 assign(op2, get_gpr_w1(r2));
7564 assign(op3, get_gpr_w1(r3));
7565 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7566 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7567 put_gpr_w1(r1, mkexpr(result));
7568
7569 return "slrk";
7570}
7571
7572static HChar *
7573s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7574{
7575 IRTemp op2 = newTemp(Ity_I64);
7576 IRTemp op3 = newTemp(Ity_I64);
7577 IRTemp result = newTemp(Ity_I64);
7578
7579 assign(op2, get_gpr_dw0(r2));
7580 assign(op3, get_gpr_dw0(r3));
7581 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7582 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7583 put_gpr_dw0(r1, mkexpr(result));
7584
7585 return "slgrk";
7586}
7587
7588static HChar *
7589s390_irgen_SL(UChar r1, IRTemp op2addr)
7590{
7591 IRTemp op1 = newTemp(Ity_I32);
7592 IRTemp op2 = newTemp(Ity_I32);
7593 IRTemp result = newTemp(Ity_I32);
7594
7595 assign(op1, get_gpr_w1(r1));
7596 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7597 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7598 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7599 put_gpr_w1(r1, mkexpr(result));
7600
7601 return "sl";
7602}
7603
7604static HChar *
7605s390_irgen_SLY(UChar r1, IRTemp op2addr)
7606{
7607 IRTemp op1 = newTemp(Ity_I32);
7608 IRTemp op2 = newTemp(Ity_I32);
7609 IRTemp result = newTemp(Ity_I32);
7610
7611 assign(op1, get_gpr_w1(r1));
7612 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7613 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7614 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7615 put_gpr_w1(r1, mkexpr(result));
7616
7617 return "sly";
7618}
7619
7620static HChar *
7621s390_irgen_SLG(UChar r1, IRTemp op2addr)
7622{
7623 IRTemp op1 = newTemp(Ity_I64);
7624 IRTemp op2 = newTemp(Ity_I64);
7625 IRTemp result = newTemp(Ity_I64);
7626
7627 assign(op1, get_gpr_dw0(r1));
7628 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7629 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7630 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7631 put_gpr_dw0(r1, mkexpr(result));
7632
7633 return "slg";
7634}
7635
7636static HChar *
7637s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7638{
7639 IRTemp op1 = newTemp(Ity_I64);
7640 IRTemp op2 = newTemp(Ity_I64);
7641 IRTemp result = newTemp(Ity_I64);
7642
7643 assign(op1, get_gpr_dw0(r1));
7644 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7645 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7646 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7647 put_gpr_dw0(r1, mkexpr(result));
7648
7649 return "slgf";
7650}
7651
7652static HChar *
7653s390_irgen_SLFI(UChar r1, UInt i2)
7654{
7655 IRTemp op1 = newTemp(Ity_I32);
7656 UInt op2;
7657 IRTemp result = newTemp(Ity_I32);
7658
7659 assign(op1, get_gpr_w1(r1));
7660 op2 = i2;
7661 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7662 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7663 mkU32(op2)));
7664 put_gpr_w1(r1, mkexpr(result));
7665
7666 return "slfi";
7667}
7668
7669static HChar *
7670s390_irgen_SLGFI(UChar r1, UInt i2)
7671{
7672 IRTemp op1 = newTemp(Ity_I64);
7673 ULong op2;
7674 IRTemp result = newTemp(Ity_I64);
7675
7676 assign(op1, get_gpr_dw0(r1));
7677 op2 = (ULong)i2;
7678 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7679 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7680 mkU64(op2)));
7681 put_gpr_dw0(r1, mkexpr(result));
7682
7683 return "slgfi";
7684}
7685
7686static HChar *
7687s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7688{
7689 IRTemp op2 = newTemp(Ity_I32);
7690 IRTemp op3 = newTemp(Ity_I32);
7691 IRTemp result = newTemp(Ity_I32);
7692
7693 assign(op2, get_gpr_w0(r1));
7694 assign(op3, get_gpr_w0(r2));
7695 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7696 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7697 put_gpr_w0(r1, mkexpr(result));
7698
7699 return "slhhhr";
7700}
7701
7702static HChar *
7703s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7704{
7705 IRTemp op2 = newTemp(Ity_I32);
7706 IRTemp op3 = newTemp(Ity_I32);
7707 IRTemp result = newTemp(Ity_I32);
7708
7709 assign(op2, get_gpr_w0(r1));
7710 assign(op3, get_gpr_w1(r2));
7711 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7712 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7713 put_gpr_w0(r1, mkexpr(result));
7714
7715 return "slhhlr";
7716}
7717
7718static HChar *
7719s390_irgen_SLBR(UChar r1, UChar r2)
7720{
7721 IRTemp op1 = newTemp(Ity_I32);
7722 IRTemp op2 = newTemp(Ity_I32);
7723 IRTemp result = newTemp(Ity_I32);
7724 IRTemp borrow_in = newTemp(Ity_I32);
7725
7726 assign(op1, get_gpr_w1(r1));
7727 assign(op2, get_gpr_w1(r2));
7728 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7729 s390_call_calculate_cc(), mkU8(1))));
7730 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7731 mkexpr(borrow_in)));
7732 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7733 put_gpr_w1(r1, mkexpr(result));
7734
7735 return "slbr";
7736}
7737
7738static HChar *
7739s390_irgen_SLBGR(UChar r1, UChar r2)
7740{
7741 IRTemp op1 = newTemp(Ity_I64);
7742 IRTemp op2 = newTemp(Ity_I64);
7743 IRTemp result = newTemp(Ity_I64);
7744 IRTemp borrow_in = newTemp(Ity_I64);
7745
7746 assign(op1, get_gpr_dw0(r1));
7747 assign(op2, get_gpr_dw0(r2));
7748 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7749 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7750 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7751 mkexpr(borrow_in)));
7752 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7753 put_gpr_dw0(r1, mkexpr(result));
7754
7755 return "slbgr";
7756}
7757
7758static HChar *
7759s390_irgen_SLB(UChar r1, IRTemp op2addr)
7760{
7761 IRTemp op1 = newTemp(Ity_I32);
7762 IRTemp op2 = newTemp(Ity_I32);
7763 IRTemp result = newTemp(Ity_I32);
7764 IRTemp borrow_in = newTemp(Ity_I32);
7765
7766 assign(op1, get_gpr_w1(r1));
7767 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7768 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7769 s390_call_calculate_cc(), mkU8(1))));
7770 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7771 mkexpr(borrow_in)));
7772 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7773 put_gpr_w1(r1, mkexpr(result));
7774
7775 return "slb";
7776}
7777
7778static HChar *
7779s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7780{
7781 IRTemp op1 = newTemp(Ity_I64);
7782 IRTemp op2 = newTemp(Ity_I64);
7783 IRTemp result = newTemp(Ity_I64);
7784 IRTemp borrow_in = newTemp(Ity_I64);
7785
7786 assign(op1, get_gpr_dw0(r1));
7787 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7788 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7789 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7790 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7791 mkexpr(borrow_in)));
7792 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7793 put_gpr_dw0(r1, mkexpr(result));
7794
7795 return "slbg";
7796}
7797
7798static HChar *
7799s390_irgen_SVC(UChar i)
7800{
7801 IRTemp sysno = newTemp(Ity_I64);
7802
7803 if (i != 0) {
7804 assign(sysno, mkU64(i));
7805 } else {
7806 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7807 }
7808 system_call(mkexpr(sysno));
7809
7810 return "svc";
7811}
7812
7813static HChar *
7814s390_irgen_TS(IRTemp op2addr)
7815{
7816 IRTemp value = newTemp(Ity_I8);
7817
7818 assign(value, load(Ity_I8, mkexpr(op2addr)));
7819 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7820 store(mkexpr(op2addr), mkU8(255));
7821
7822 return "ts";
7823}
7824
7825static HChar *
7826s390_irgen_TM(UChar i2, IRTemp op1addr)
7827{
7828 UChar mask;
7829 IRTemp value = newTemp(Ity_I8);
7830
7831 mask = i2;
7832 assign(value, load(Ity_I8, mkexpr(op1addr)));
7833 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7834 mkU8(mask)));
7835
7836 return "tm";
7837}
7838
7839static HChar *
7840s390_irgen_TMY(UChar i2, IRTemp op1addr)
7841{
7842 UChar mask;
7843 IRTemp value = newTemp(Ity_I8);
7844
7845 mask = i2;
7846 assign(value, load(Ity_I8, mkexpr(op1addr)));
7847 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7848 mkU8(mask)));
7849
7850 return "tmy";
7851}
7852
7853static HChar *
7854s390_irgen_TMHH(UChar r1, UShort i2)
7855{
7856 UShort mask;
7857 IRTemp value = newTemp(Ity_I16);
7858
7859 mask = i2;
7860 assign(value, get_gpr_hw0(r1));
7861 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7862 mkU16(mask)));
7863
7864 return "tmhh";
7865}
7866
7867static HChar *
7868s390_irgen_TMHL(UChar r1, UShort i2)
7869{
7870 UShort mask;
7871 IRTemp value = newTemp(Ity_I16);
7872
7873 mask = i2;
7874 assign(value, get_gpr_hw1(r1));
7875 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7876 mkU16(mask)));
7877
7878 return "tmhl";
7879}
7880
7881static HChar *
7882s390_irgen_TMLH(UChar r1, UShort i2)
7883{
7884 UShort mask;
7885 IRTemp value = newTemp(Ity_I16);
7886
7887 mask = i2;
7888 assign(value, get_gpr_hw2(r1));
7889 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7890 mkU16(mask)));
7891
7892 return "tmlh";
7893}
7894
7895static HChar *
7896s390_irgen_TMLL(UChar r1, UShort i2)
7897{
7898 UShort mask;
7899 IRTemp value = newTemp(Ity_I16);
7900
7901 mask = i2;
7902 assign(value, get_gpr_hw3(r1));
7903 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7904 mkU16(mask)));
7905
7906 return "tmll";
7907}
7908
7909static HChar *
7910s390_irgen_EFPC(UChar r1)
7911{
7912 put_gpr_w1(r1, get_fpc_w0());
7913
7914 return "efpc";
7915}
7916
7917static HChar *
7918s390_irgen_LER(UChar r1, UChar r2)
7919{
7920 put_fpr_w0(r1, get_fpr_w0(r2));
7921
7922 return "ler";
7923}
7924
7925static HChar *
7926s390_irgen_LDR(UChar r1, UChar r2)
7927{
7928 put_fpr_dw0(r1, get_fpr_dw0(r2));
7929
7930 return "ldr";
7931}
7932
7933static HChar *
7934s390_irgen_LXR(UChar r1, UChar r2)
7935{
7936 put_fpr_dw0(r1, get_fpr_dw0(r2));
7937 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7938
7939 return "lxr";
7940}
7941
7942static HChar *
7943s390_irgen_LE(UChar r1, IRTemp op2addr)
7944{
7945 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7946
7947 return "le";
7948}
7949
7950static HChar *
7951s390_irgen_LD(UChar r1, IRTemp op2addr)
7952{
7953 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7954
7955 return "ld";
7956}
7957
7958static HChar *
7959s390_irgen_LEY(UChar r1, IRTemp op2addr)
7960{
7961 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7962
7963 return "ley";
7964}
7965
7966static HChar *
7967s390_irgen_LDY(UChar r1, IRTemp op2addr)
7968{
7969 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7970
7971 return "ldy";
7972}
7973
7974static HChar *
7975s390_irgen_LFPC(IRTemp op2addr)
7976{
7977 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
7978
7979 return "lfpc";
7980}
7981
7982static HChar *
7983s390_irgen_LZER(UChar r1)
7984{
7985 put_fpr_w0(r1, mkF32i(0x0));
7986
7987 return "lzer";
7988}
7989
7990static HChar *
7991s390_irgen_LZDR(UChar r1)
7992{
7993 put_fpr_dw0(r1, mkF64i(0x0));
7994
7995 return "lzdr";
7996}
7997
7998static HChar *
7999s390_irgen_LZXR(UChar r1)
8000{
8001 put_fpr_dw0(r1, mkF64i(0x0));
8002 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8003
8004 return "lzxr";
8005}
8006
8007static HChar *
8008s390_irgen_SRNM(IRTemp op2addr)
8009{
8010 UInt mask;
8011
8012 mask = 3;
8013 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8014 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8015 );
8016
8017 return "srnm";
8018}
8019
8020static HChar *
8021s390_irgen_SFPC(UChar r1)
8022{
8023 put_fpc_w0(get_gpr_w1(r1));
8024
8025 return "sfpc";
8026}
8027
8028static HChar *
8029s390_irgen_STE(UChar r1, IRTemp op2addr)
8030{
8031 store(mkexpr(op2addr), get_fpr_w0(r1));
8032
8033 return "ste";
8034}
8035
8036static HChar *
8037s390_irgen_STD(UChar r1, IRTemp op2addr)
8038{
8039 store(mkexpr(op2addr), get_fpr_dw0(r1));
8040
8041 return "std";
8042}
8043
8044static HChar *
8045s390_irgen_STEY(UChar r1, IRTemp op2addr)
8046{
8047 store(mkexpr(op2addr), get_fpr_w0(r1));
8048
8049 return "stey";
8050}
8051
8052static HChar *
8053s390_irgen_STDY(UChar r1, IRTemp op2addr)
8054{
8055 store(mkexpr(op2addr), get_fpr_dw0(r1));
8056
8057 return "stdy";
8058}
8059
8060static HChar *
8061s390_irgen_STFPC(IRTemp op2addr)
8062{
8063 store(mkexpr(op2addr), get_fpc_w0());
8064
8065 return "stfpc";
8066}
8067
8068static HChar *
8069s390_irgen_AEBR(UChar r1, UChar r2)
8070{
8071 IRTemp op1 = newTemp(Ity_F32);
8072 IRTemp op2 = newTemp(Ity_F32);
8073 IRTemp result = newTemp(Ity_F32);
8074
8075 assign(op1, get_fpr_w0(r1));
8076 assign(op2, get_fpr_w0(r2));
8077 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8078 mkexpr(op2)));
8079 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8080 put_fpr_w0(r1, mkexpr(result));
8081
8082 return "aebr";
8083}
8084
8085static HChar *
8086s390_irgen_ADBR(UChar r1, UChar r2)
8087{
8088 IRTemp op1 = newTemp(Ity_F64);
8089 IRTemp op2 = newTemp(Ity_F64);
8090 IRTemp result = newTemp(Ity_F64);
8091
8092 assign(op1, get_fpr_dw0(r1));
8093 assign(op2, get_fpr_dw0(r2));
8094 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8095 mkexpr(op2)));
8096 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8097 put_fpr_dw0(r1, mkexpr(result));
8098
8099 return "adbr";
8100}
8101
8102static HChar *
8103s390_irgen_AEB(UChar r1, IRTemp op2addr)
8104{
8105 IRTemp op1 = newTemp(Ity_F32);
8106 IRTemp op2 = newTemp(Ity_F32);
8107 IRTemp result = newTemp(Ity_F32);
8108
8109 assign(op1, get_fpr_w0(r1));
8110 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8111 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8112 mkexpr(op2)));
8113 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8114 put_fpr_w0(r1, mkexpr(result));
8115
8116 return "aeb";
8117}
8118
8119static HChar *
8120s390_irgen_ADB(UChar r1, IRTemp op2addr)
8121{
8122 IRTemp op1 = newTemp(Ity_F64);
8123 IRTemp op2 = newTemp(Ity_F64);
8124 IRTemp result = newTemp(Ity_F64);
8125
8126 assign(op1, get_fpr_dw0(r1));
8127 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8128 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8129 mkexpr(op2)));
8130 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8131 put_fpr_dw0(r1, mkexpr(result));
8132
8133 return "adb";
8134}
8135
8136static HChar *
8137s390_irgen_CEFBR(UChar r1, UChar r2)
8138{
8139 IRTemp op2 = newTemp(Ity_I32);
8140
8141 assign(op2, get_gpr_w1(r2));
8142 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8143
8144 return "cefbr";
8145}
8146
8147static HChar *
8148s390_irgen_CDFBR(UChar r1, UChar r2)
8149{
8150 IRTemp op2 = newTemp(Ity_I32);
8151
8152 assign(op2, get_gpr_w1(r2));
8153 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8154
8155 return "cdfbr";
8156}
8157
8158static HChar *
8159s390_irgen_CEGBR(UChar r1, UChar r2)
8160{
8161 IRTemp op2 = newTemp(Ity_I64);
8162
8163 assign(op2, get_gpr_dw0(r2));
8164 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8165
8166 return "cegbr";
8167}
8168
8169static HChar *
8170s390_irgen_CDGBR(UChar r1, UChar r2)
8171{
8172 IRTemp op2 = newTemp(Ity_I64);
8173
8174 assign(op2, get_gpr_dw0(r2));
8175 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8176
8177 return "cdgbr";
8178}
8179
8180static HChar *
8181s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8182{
8183 IRTemp op = newTemp(Ity_F32);
8184 IRTemp result = newTemp(Ity_I32);
8185
8186 assign(op, get_fpr_w0(r2));
8187 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8188 mkexpr(op)));
8189 put_gpr_w1(r1, mkexpr(result));
8190 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8191
8192 return "cfebr";
8193}
8194
8195static HChar *
8196s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8197{
8198 IRTemp op = newTemp(Ity_F64);
8199 IRTemp result = newTemp(Ity_I32);
8200
8201 assign(op, get_fpr_dw0(r2));
8202 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8203 mkexpr(op)));
8204 put_gpr_w1(r1, mkexpr(result));
8205 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8206
8207 return "cfdbr";
8208}
8209
8210static HChar *
8211s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8212{
8213 IRTemp op = newTemp(Ity_F32);
8214 IRTemp result = newTemp(Ity_I64);
8215
8216 assign(op, get_fpr_w0(r2));
8217 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8218 mkexpr(op)));
8219 put_gpr_dw0(r1, mkexpr(result));
8220 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8221
8222 return "cgebr";
8223}
8224
8225static HChar *
8226s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8227{
8228 IRTemp op = newTemp(Ity_F64);
8229 IRTemp result = newTemp(Ity_I64);
8230
8231 assign(op, get_fpr_dw0(r2));
8232 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8233 mkexpr(op)));
8234 put_gpr_dw0(r1, mkexpr(result));
8235 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8236
8237 return "cgdbr";
8238}
8239
8240static HChar *
8241s390_irgen_DEBR(UChar r1, UChar r2)
8242{
8243 IRTemp op1 = newTemp(Ity_F32);
8244 IRTemp op2 = newTemp(Ity_F32);
8245 IRTemp result = newTemp(Ity_F32);
8246
8247 assign(op1, get_fpr_w0(r1));
8248 assign(op2, get_fpr_w0(r2));
8249 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8250 mkexpr(op2)));
8251 put_fpr_w0(r1, mkexpr(result));
8252
8253 return "debr";
8254}
8255
8256static HChar *
8257s390_irgen_DDBR(UChar r1, UChar r2)
8258{
8259 IRTemp op1 = newTemp(Ity_F64);
8260 IRTemp op2 = newTemp(Ity_F64);
8261 IRTemp result = newTemp(Ity_F64);
8262
8263 assign(op1, get_fpr_dw0(r1));
8264 assign(op2, get_fpr_dw0(r2));
8265 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8266 mkexpr(op2)));
8267 put_fpr_dw0(r1, mkexpr(result));
8268
8269 return "ddbr";
8270}
8271
8272static HChar *
8273s390_irgen_DEB(UChar r1, IRTemp op2addr)
8274{
8275 IRTemp op1 = newTemp(Ity_F32);
8276 IRTemp op2 = newTemp(Ity_F32);
8277 IRTemp result = newTemp(Ity_F32);
8278
8279 assign(op1, get_fpr_w0(r1));
8280 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8281 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8282 mkexpr(op2)));
8283 put_fpr_w0(r1, mkexpr(result));
8284
8285 return "deb";
8286}
8287
8288static HChar *
8289s390_irgen_DDB(UChar r1, IRTemp op2addr)
8290{
8291 IRTemp op1 = newTemp(Ity_F64);
8292 IRTemp op2 = newTemp(Ity_F64);
8293 IRTemp result = newTemp(Ity_F64);
8294
8295 assign(op1, get_fpr_dw0(r1));
8296 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8297 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8298 mkexpr(op2)));
8299 put_fpr_dw0(r1, mkexpr(result));
8300
8301 return "ddb";
8302}
8303
8304static HChar *
8305s390_irgen_LTEBR(UChar r1, UChar r2)
8306{
8307 IRTemp result = newTemp(Ity_F32);
8308
8309 assign(result, get_fpr_w0(r2));
8310 put_fpr_w0(r1, mkexpr(result));
8311 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8312
8313 return "ltebr";
8314}
8315
8316static HChar *
8317s390_irgen_LTDBR(UChar r1, UChar r2)
8318{
8319 IRTemp result = newTemp(Ity_F64);
8320
8321 assign(result, get_fpr_dw0(r2));
8322 put_fpr_dw0(r1, mkexpr(result));
8323 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8324
8325 return "ltdbr";
8326}
8327
8328static HChar *
8329s390_irgen_LCEBR(UChar r1, UChar r2)
8330{
8331 IRTemp result = newTemp(Ity_F32);
8332
8333 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8334 put_fpr_w0(r1, mkexpr(result));
8335 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8336
8337 return "lcebr";
8338}
8339
8340static HChar *
8341s390_irgen_LCDBR(UChar r1, UChar r2)
8342{
8343 IRTemp result = newTemp(Ity_F64);
8344
8345 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8346 put_fpr_dw0(r1, mkexpr(result));
8347 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8348
8349 return "lcdbr";
8350}
8351
8352static HChar *
8353s390_irgen_LDEBR(UChar r1, UChar r2)
8354{
8355 IRTemp op = newTemp(Ity_F32);
8356
8357 assign(op, get_fpr_w0(r2));
8358 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8359
8360 return "ldebr";
8361}
8362
8363static HChar *
8364s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8365{
8366 IRTemp op = newTemp(Ity_F32);
8367
8368 assign(op, load(Ity_F32, mkexpr(op2addr)));
8369 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8370
8371 return "ldeb";
8372}
8373
8374static HChar *
8375s390_irgen_LEDBR(UChar r1, UChar r2)
8376{
8377 IRTemp op = newTemp(Ity_F64);
8378
8379 assign(op, get_fpr_dw0(r2));
8380 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8381
8382 return "ledbr";
8383}
8384
8385static HChar *
8386s390_irgen_MEEBR(UChar r1, UChar r2)
8387{
8388 IRTemp op1 = newTemp(Ity_F32);
8389 IRTemp op2 = newTemp(Ity_F32);
8390 IRTemp result = newTemp(Ity_F32);
8391
8392 assign(op1, get_fpr_w0(r1));
8393 assign(op2, get_fpr_w0(r2));
8394 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8395 mkexpr(op2)));
8396 put_fpr_w0(r1, mkexpr(result));
8397
8398 return "meebr";
8399}
8400
8401static HChar *
8402s390_irgen_MDBR(UChar r1, UChar r2)
8403{
8404 IRTemp op1 = newTemp(Ity_F64);
8405 IRTemp op2 = newTemp(Ity_F64);
8406 IRTemp result = newTemp(Ity_F64);
8407
8408 assign(op1, get_fpr_dw0(r1));
8409 assign(op2, get_fpr_dw0(r2));
8410 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8411 mkexpr(op2)));
8412 put_fpr_dw0(r1, mkexpr(result));
8413
8414 return "mdbr";
8415}
8416
8417static HChar *
8418s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8419{
8420 IRTemp op1 = newTemp(Ity_F32);
8421 IRTemp op2 = newTemp(Ity_F32);
8422 IRTemp result = newTemp(Ity_F32);
8423
8424 assign(op1, get_fpr_w0(r1));
8425 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8426 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8427 mkexpr(op2)));
8428 put_fpr_w0(r1, mkexpr(result));
8429
8430 return "meeb";
8431}
8432
8433static HChar *
8434s390_irgen_MDB(UChar r1, IRTemp op2addr)
8435{
8436 IRTemp op1 = newTemp(Ity_F64);
8437 IRTemp op2 = newTemp(Ity_F64);
8438 IRTemp result = newTemp(Ity_F64);
8439
8440 assign(op1, get_fpr_dw0(r1));
8441 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8442 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8443 mkexpr(op2)));
8444 put_fpr_dw0(r1, mkexpr(result));
8445
8446 return "mdb";
8447}
8448
8449static HChar *
8450s390_irgen_SEBR(UChar r1, UChar r2)
8451{
8452 IRTemp op1 = newTemp(Ity_F32);
8453 IRTemp op2 = newTemp(Ity_F32);
8454 IRTemp result = newTemp(Ity_F32);
8455
8456 assign(op1, get_fpr_w0(r1));
8457 assign(op2, get_fpr_w0(r2));
8458 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8459 mkexpr(op2)));
8460 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8461 put_fpr_w0(r1, mkexpr(result));
8462
8463 return "sebr";
8464}
8465
8466static HChar *
8467s390_irgen_SDBR(UChar r1, UChar r2)
8468{
8469 IRTemp op1 = newTemp(Ity_F64);
8470 IRTemp op2 = newTemp(Ity_F64);
8471 IRTemp result = newTemp(Ity_F64);
8472
8473 assign(op1, get_fpr_dw0(r1));
8474 assign(op2, get_fpr_dw0(r2));
8475 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8476 mkexpr(op2)));
8477 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8478 put_fpr_dw0(r1, mkexpr(result));
8479
8480 return "sdbr";
8481}
8482
8483static HChar *
8484s390_irgen_SEB(UChar r1, IRTemp op2addr)
8485{
8486 IRTemp op1 = newTemp(Ity_F32);
8487 IRTemp op2 = newTemp(Ity_F32);
8488 IRTemp result = newTemp(Ity_F32);
8489
8490 assign(op1, get_fpr_w0(r1));
8491 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8492 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8493 mkexpr(op2)));
8494 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8495 put_fpr_w0(r1, mkexpr(result));
8496
8497 return "seb";
8498}
8499
8500static HChar *
8501s390_irgen_SDB(UChar r1, IRTemp op2addr)
8502{
8503 IRTemp op1 = newTemp(Ity_F64);
8504 IRTemp op2 = newTemp(Ity_F64);
8505 IRTemp result = newTemp(Ity_F64);
8506
8507 assign(op1, get_fpr_dw0(r1));
8508 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8509 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8510 mkexpr(op2)));
8511 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8512 put_fpr_dw0(r1, mkexpr(result));
8513
8514 return "sdb";
8515}
8516
8517
8518static HChar *
8519s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8520{
8521 IRTemp current1 = newTemp(Ity_I8);
8522 IRTemp current2 = newTemp(Ity_I8);
8523 IRTemp counter = newTemp(Ity_I64);
8524
8525 assign(counter, get_counter_dw0());
8526 put_counter_dw0(mkU64(0));
8527
8528 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8529 mkexpr(counter))));
8530 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8531 mkexpr(counter))));
8532 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8533 False);
8534
8535 /* Both fields differ ? */
8536 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8537 guest_IA_next_instr);
8538
8539 /* Check for end of field */
8540 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8541 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8542 guest_IA_curr_instr);
8543 put_counter_dw0(mkU64(0));
8544
8545 return "clc";
8546}
8547
8548static HChar *
8549s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8550{
8551 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8552
8553 addr1 = newTemp(Ity_I64);
8554 addr3 = newTemp(Ity_I64);
8555 addr1_load = newTemp(Ity_I64);
8556 addr3_load = newTemp(Ity_I64);
8557 len1 = newTemp(Ity_I64);
8558 len3 = newTemp(Ity_I64);
8559 single1 = newTemp(Ity_I8);
8560 single3 = newTemp(Ity_I8);
8561
8562 assign(addr1, get_gpr_dw0(r1));
8563 assign(len1, get_gpr_dw0(r1 + 1));
8564 assign(addr3, get_gpr_dw0(r3));
8565 assign(len3, get_gpr_dw0(r3 + 1));
8566
8567 /* len1 == 0 and len3 == 0? Exit */
8568 s390_cc_set(0);
8569 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8570 mkexpr(len3)), mkU64(0)),
8571 guest_IA_next_instr);
8572
8573 /* A mux requires both ways to be possible. This is a way to prevent clcle
8574 from reading from addr1 if it should read from the pad. Since the pad
8575 has no address, just read from the instruction, we discard that anyway */
8576 assign(addr1_load,
8577 IRExpr_Mux0X(unop(Iop_1Uto8,
8578 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8579 mkexpr(addr1),
8580 mkU64(guest_IA_curr_instr)));
8581
8582 /* same for addr3 */
8583 assign(addr3_load,
8584 IRExpr_Mux0X(unop(Iop_1Uto8,
8585 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8586 mkexpr(addr3),
8587 mkU64(guest_IA_curr_instr)));
8588
8589 assign(single1,
8590 IRExpr_Mux0X(unop(Iop_1Uto8,
8591 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8592 load(Ity_I8, mkexpr(addr1_load)),
8593 unop(Iop_64to8, mkexpr(pad2))));
8594
8595 assign(single3,
8596 IRExpr_Mux0X(unop(Iop_1Uto8,
8597 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8598 load(Ity_I8, mkexpr(addr3_load)),
8599 unop(Iop_64to8, mkexpr(pad2))));
8600
8601 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8602 /* Both fields differ ? */
8603 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8604 guest_IA_next_instr);
8605
8606 /* If a length in 0 we must not change this length and the address */
8607 put_gpr_dw0(r1,
8608 IRExpr_Mux0X(unop(Iop_1Uto8,
8609 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8610 binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
8611 mkexpr(addr1)));
8612
8613 put_gpr_dw0(r1 + 1,
8614 IRExpr_Mux0X(unop(Iop_1Uto8,
8615 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8616 binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
8617 mkU64(0)));
8618
8619 put_gpr_dw0(r3,
8620 IRExpr_Mux0X(unop(Iop_1Uto8,
8621 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8622 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
8623 mkexpr(addr3)));
8624
8625 put_gpr_dw0(r3 + 1,
8626 IRExpr_Mux0X(unop(Iop_1Uto8,
8627 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8628 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
8629 mkU64(0)));
8630
8631 /* The architecture requires that we exit with CC3 after a machine specific
8632 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8633 s390_cc_set(3);
8634 if_condition_goto(binop(Iop_CmpEQ64,
8635 binop(Iop_And64,
8636 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8637 mkU64(0xfff)),
8638 mkU64(0)),
8639 guest_IA_next_instr);
8640
8641 always_goto(mkU64(guest_IA_curr_instr));
8642
8643 return "clcle";
8644}
8645static void
8646s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8647{
8648 IRTemp old1 = newTemp(Ity_I8);
8649 IRTemp old2 = newTemp(Ity_I8);
8650 IRTemp new1 = newTemp(Ity_I8);
8651 IRTemp counter = newTemp(Ity_I32);
8652 IRTemp addr1 = newTemp(Ity_I64);
8653
8654 assign(counter, get_counter_w0());
8655
8656 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8657 unop(Iop_32Uto64, mkexpr(counter))));
8658
8659 assign(old1, load(Ity_I8, mkexpr(addr1)));
8660 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8661 unop(Iop_32Uto64,mkexpr(counter)))));
8662 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8663
8664 store(mkexpr(addr1),
8665 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
8666 mkexpr(start2))),
8667 mkexpr(new1), mkU8(0)));
8668 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8669 get_counter_w1()));
8670
8671 /* Check for end of field */
8672 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8673 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8674 guest_IA_curr_instr);
8675 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8676 False);
8677 put_counter_dw0(mkU64(0));
8678}
8679
8680
8681static void
8682s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8683{
8684 IRTemp current1 = newTemp(Ity_I8);
8685 IRTemp current2 = newTemp(Ity_I8);
8686 IRTemp counter = newTemp(Ity_I64);
8687
8688 assign(counter, get_counter_dw0());
8689 put_counter_dw0(mkU64(0));
8690
8691 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8692 mkexpr(counter))));
8693 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8694 mkexpr(counter))));
8695 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8696 False);
8697
8698 /* Both fields differ ? */
8699 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8700 guest_IA_next_instr);
8701
8702 /* Check for end of field */
8703 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8704 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8705 guest_IA_curr_instr);
8706 put_counter_dw0(mkU64(0));
8707}
8708
8709static void
8710s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8711{
8712 IRTemp counter = newTemp(Ity_I64);
8713
8714 assign(counter, get_counter_dw0());
8715
8716 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8717 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8718
8719 /* Check for end of field */
8720 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8721 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8722 guest_IA_curr_instr);
8723 put_counter_dw0(mkU64(0));
8724}
8725
8726
8727
8728static void
8729s390_irgen_EX_SS(UChar r, IRTemp addr2,
8730void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8731{
8732 struct SS {
8733 unsigned int op : 8;
8734 unsigned int l : 8;
8735 unsigned int b1 : 4;
8736 unsigned int d1 : 12;
8737 unsigned int b2 : 4;
8738 unsigned int d2 : 12;
8739 };
8740 union {
8741 struct SS dec;
8742 unsigned long bytes;
8743 } ss;
8744 IRTemp cond;
8745 IRDirty *d;
8746 IRTemp torun;
8747
8748 IRTemp start1 = newTemp(Ity_I64);
8749 IRTemp start2 = newTemp(Ity_I64);
8750 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8751 cond = newTemp(Ity_I1);
8752 torun = newTemp(Ity_I64);
8753
8754 assign(torun, load(Ity_I64, mkexpr(addr2)));
8755 /* Start with a check that the saved code is still correct */
8756 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8757 /* If not, save the new value */
8758 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8759 mkIRExprVec_1(mkexpr(torun)));
8760 d->guard = mkexpr(cond);
8761 stmt(IRStmt_Dirty(d));
8762
8763 /* and restart */
8764 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8765 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8766 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8767 IRConst_U64(guest_IA_curr_instr)));
8768
8769 ss.bytes = last_execute_target;
8770 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8771 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8772 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8773 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8774 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8775 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8776 irgen(len, start1, start2);
8777 last_execute_target = 0;
8778}
8779
8780static HChar *
8781s390_irgen_EX(UChar r1, IRTemp addr2)
8782{
8783 switch(last_execute_target & 0xff00000000000000ULL) {
8784 case 0:
8785 {
8786 /* no code information yet */
8787 IRDirty *d;
8788
8789 /* so safe the code... */
8790 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8791 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8792 stmt(IRStmt_Dirty(d));
8793 /* and restart */
8794 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8795 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8796 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8797 IRConst_U64(guest_IA_curr_instr)));
8798 /* we know that this will be invalidated */
8799 irsb->next = mkU64(guest_IA_next_instr);
8800 dis_res->whatNext = Dis_StopHere;
8801 break;
8802 }
8803
8804 case 0xd200000000000000ULL:
8805 /* special case MVC */
8806 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8807 return "mvc via ex";
8808
8809 case 0xd500000000000000ULL:
8810 /* special case CLC */
8811 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8812 return "clc via ex";
8813
8814 case 0xd700000000000000ULL:
8815 /* special case XC */
8816 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8817 return "xc via ex";
8818
8819
8820 default:
8821 {
8822 /* everything else will get a self checking prefix that also checks the
8823 register content */
8824 IRDirty *d;
8825 UChar *bytes;
8826 IRTemp cond;
8827 IRTemp orperand;
8828 IRTemp torun;
8829
8830 cond = newTemp(Ity_I1);
8831 orperand = newTemp(Ity_I64);
8832 torun = newTemp(Ity_I64);
8833
8834 if (r1 == 0)
8835 assign(orperand, mkU64(0));
8836 else
8837 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8838 /* This code is going to be translated */
8839 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8840 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8841
8842 /* Start with a check that saved code is still correct */
8843 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8844 mkU64(last_execute_target)));
8845 /* If not, save the new value */
8846 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8847 mkIRExprVec_1(mkexpr(torun)));
8848 d->guard = mkexpr(cond);
8849 stmt(IRStmt_Dirty(d));
8850
8851 /* and restart */
8852 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8853 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8854 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8855 IRConst_U64(guest_IA_curr_instr)));
8856
8857 /* Now comes the actual translation */
8858 bytes = (UChar *) &last_execute_target;
8859 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8860 dis_res);
8861 if (unlikely(vex_traceflags & VEX_TRACE_FE))
8862 vex_printf(" which was executed by\n");
8863 /* dont make useless translations in the next execute */
8864 last_execute_target = 0;
8865 }
8866 }
8867 return "ex";
8868}
8869
8870static HChar *
8871s390_irgen_EXRL(UChar r1, UInt offset)
8872{
8873 IRTemp addr = newTemp(Ity_I64);
8874 /* we might save one round trip because we know the target */
8875 if (!last_execute_target)
8876 last_execute_target = *(ULong *)(HWord)
8877 (guest_IA_curr_instr + offset * 2UL);
8878 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8879 s390_irgen_EX(r1, addr);
8880 return "exrl";
8881}
8882
8883static HChar *
8884s390_irgen_IPM(UChar r1)
8885{
8886 // As long as we dont support SPM, lets just assume 0 as program mask
8887 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
8888 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
8889
8890 return "ipm";
8891}
8892
8893
8894static HChar *
8895s390_irgen_SRST(UChar r1, UChar r2)
8896{
8897 IRTemp address = newTemp(Ity_I64);
8898 IRTemp next = newTemp(Ity_I64);
8899 IRTemp delim = newTemp(Ity_I8);
8900 IRTemp counter = newTemp(Ity_I64);
8901 IRTemp byte = newTemp(Ity_I8);
8902
8903 assign(address, get_gpr_dw0(r2));
8904 assign(next, get_gpr_dw0(r1));
8905
8906 assign(counter, get_counter_dw0());
8907 put_counter_dw0(mkU64(0));
8908
8909 // start = next? CC=2 and out r1 and r2 unchanged
8910 s390_cc_set(2);
8911 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
8912 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
8913 guest_IA_next_instr);
8914
8915 assign(byte, load(Ity_I8, mkexpr(address)));
8916 assign(delim, get_gpr_b7(0));
8917
8918 // byte = delim? CC=1, R1=address
8919 s390_cc_set(1);
8920 put_gpr_dw0(r1, mkexpr(address));
8921 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
8922 guest_IA_next_instr);
8923
8924 // else: all equal, no end yet, loop
8925 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8926 put_gpr_dw0(r1, mkexpr(next));
8927 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
8928 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8929 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8930 // >= 256 bytes done CC=3
8931 s390_cc_set(3);
8932 put_counter_dw0(mkU64(0));
8933
8934 return "srst";
8935}
8936
8937static HChar *
8938s390_irgen_CLST(UChar r1, UChar r2)
8939{
8940 IRTemp address1 = newTemp(Ity_I64);
8941 IRTemp address2 = newTemp(Ity_I64);
8942 IRTemp end = newTemp(Ity_I8);
8943 IRTemp counter = newTemp(Ity_I64);
8944 IRTemp byte1 = newTemp(Ity_I8);
8945 IRTemp byte2 = newTemp(Ity_I8);
8946
8947 assign(address1, get_gpr_dw0(r1));
8948 assign(address2, get_gpr_dw0(r2));
8949 assign(end, get_gpr_b7(0));
8950 assign(counter, get_counter_dw0());
8951 put_counter_dw0(mkU64(0));
8952 assign(byte1, load(Ity_I8, mkexpr(address1)));
8953 assign(byte2, load(Ity_I8, mkexpr(address2)));
8954
8955 // end in both? all equal, reset r1 and r2 to start values
8956 s390_cc_set(0);
8957 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
8958 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
8959 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
8960 binop(Iop_Or8,
8961 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
8962 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
8963 guest_IA_next_instr);
8964
8965 put_gpr_dw0(r1, mkexpr(address1));
8966 put_gpr_dw0(r2, mkexpr(address2));
8967
8968 // End found in string1
8969 s390_cc_set(1);
8970 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
8971 guest_IA_next_instr);
8972
8973 // End found in string2
8974 s390_cc_set(2);
8975 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
8976 guest_IA_next_instr);
8977
8978 // string1 < string2
8979 s390_cc_set(1);
8980 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
8981 unop(Iop_8Uto32, mkexpr(byte2))),
8982 guest_IA_next_instr);
8983
8984 // string2 < string1
8985 s390_cc_set(2);
8986 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
8987 unop(Iop_8Uto32, mkexpr(byte1))),
8988 guest_IA_next_instr);
8989
8990 // else: all equal, no end yet, loop
8991 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8992 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
8993 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
8994 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8995 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8996 // >= 256 bytes done CC=3
8997 s390_cc_set(3);
8998 put_counter_dw0(mkU64(0));
8999
9000 return "clst";
9001}
9002
9003static void
9004s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9005{
9006 UChar reg;
9007 IRTemp addr = newTemp(Ity_I64);
9008
9009 assign(addr, mkexpr(op2addr));
9010 reg = r1;
9011 do {
9012 IRTemp old = addr;
9013
9014 reg %= 16;
9015 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9016 addr = newTemp(Ity_I64);
9017 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9018 reg++;
9019 } while (reg != (r3 + 1));
9020}
9021
9022static HChar *
9023s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9024{
9025 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9026
9027 return "lm";
9028}
9029
9030static HChar *
9031s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9032{
9033 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9034
9035 return "lmy";
9036}
9037
9038static HChar *
9039s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9040{
9041 UChar reg;
9042 IRTemp addr = newTemp(Ity_I64);
9043
9044 assign(addr, mkexpr(op2addr));
9045 reg = r1;
9046 do {
9047 IRTemp old = addr;
9048
9049 reg %= 16;
9050 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9051 addr = newTemp(Ity_I64);
9052 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9053 reg++;
9054 } while (reg != (r3 + 1));
9055
9056 return "lmh";
9057}
9058
9059static HChar *
9060s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9061{
9062 UChar reg;
9063 IRTemp addr = newTemp(Ity_I64);
9064
9065 assign(addr, mkexpr(op2addr));
9066 reg = r1;
9067 do {
9068 IRTemp old = addr;
9069
9070 reg %= 16;
9071 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9072 addr = newTemp(Ity_I64);
9073 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9074 reg++;
9075 } while (reg != (r3 + 1));
9076
9077 return "lmg";
9078}
9079
9080static void
9081s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9082{
9083 UChar reg;
9084 IRTemp addr = newTemp(Ity_I64);
9085
9086 assign(addr, mkexpr(op2addr));
9087 reg = r1;
9088 do {
9089 IRTemp old = addr;
9090
9091 reg %= 16;
9092 store(mkexpr(addr), get_gpr_w1(reg));
9093 addr = newTemp(Ity_I64);
9094 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9095 reg++;
9096 } while( reg != (r3 + 1));
9097}
9098
9099static HChar *
9100s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9101{
9102 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9103
9104 return "stm";
9105}
9106
9107static HChar *
9108s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9109{
9110 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9111
9112 return "stmy";
9113}
9114
9115static HChar *
9116s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9117{
9118 UChar reg;
9119 IRTemp addr = newTemp(Ity_I64);
9120
9121 assign(addr, mkexpr(op2addr));
9122 reg = r1;
9123 do {
9124 IRTemp old = addr;
9125
9126 reg %= 16;
9127 store(mkexpr(addr), get_gpr_w0(reg));
9128 addr = newTemp(Ity_I64);
9129 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9130 reg++;
9131 } while( reg != (r3 + 1));
9132
9133 return "stmh";
9134}
9135
9136static HChar *
9137s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9138{
9139 UChar reg;
9140 IRTemp addr = newTemp(Ity_I64);
9141
9142 assign(addr, mkexpr(op2addr));
9143 reg = r1;
9144 do {
9145 IRTemp old = addr;
9146
9147 reg %= 16;
9148 store(mkexpr(addr), get_gpr_dw0(reg));
9149 addr = newTemp(Ity_I64);
9150 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9151 reg++;
9152 } while( reg != (r3 + 1));
9153
9154 return "stmg";
9155}
9156
9157static void
9158s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9159{
9160 IRTemp old1 = newTemp(Ity_I8);
9161 IRTemp old2 = newTemp(Ity_I8);
9162 IRTemp new1 = newTemp(Ity_I8);
9163 IRTemp counter = newTemp(Ity_I32);
9164 IRTemp addr1 = newTemp(Ity_I64);
9165
9166 assign(counter, get_counter_w0());
9167
9168 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9169 unop(Iop_32Uto64, mkexpr(counter))));
9170
9171 assign(old1, load(Ity_I8, mkexpr(addr1)));
9172 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9173 unop(Iop_32Uto64,mkexpr(counter)))));
9174 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9175
9176 /* Special case: xc is used to zero memory */
9177 /* fixs390: we also want an instrumentation time shortcut */
9178 if (op == Iop_Xor8) {
9179 store(mkexpr(addr1),
9180 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
9181 mkexpr(start2))),
9182 mkexpr(new1), mkU8(0)));
9183 } else
9184 store(mkexpr(addr1), mkexpr(new1));
9185 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9186 get_counter_w1()));
9187
9188 /* Check for end of field */
9189 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9190 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9191 guest_IA_curr_instr);
9192 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9193 False);
9194 put_counter_dw0(mkU64(0));
9195}
9196
9197static HChar *
9198s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9199{
9200 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9201
9202 return "xc";
9203}
9204
sewardjb63967e2011-03-24 08:50:04 +00009205static void
9206s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9207{
9208 IRTemp counter = newTemp(Ity_I32);
9209 IRTemp start = newTemp(Ity_I64);
9210 IRTemp addr = newTemp(Ity_I64);
9211
9212 assign(start,
9213 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9214
9215 if (length < 8) {
9216 UInt i;
9217
9218 for (i = 0; i <= length; ++i) {
9219 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9220 }
9221 } else {
9222 assign(counter, get_counter_w0());
9223
9224 assign(addr, binop(Iop_Add64, mkexpr(start),
9225 unop(Iop_32Uto64, mkexpr(counter))));
9226
9227 store(mkexpr(addr), mkU8(0));
9228
9229 /* Check for end of field */
9230 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9231 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9232 guest_IA_curr_instr);
9233
9234 /* Reset counter */
9235 put_counter_dw0(mkU64(0));
9236 }
9237
9238 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9239
9240 if (unlikely(vex_traceflags & VEX_TRACE_FE))
9241 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9242}
9243
sewardj2019a972011-03-07 16:04:07 +00009244static HChar *
9245s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9246{
9247 s390_irgen_XONC(Iop_And8, length, start1, start2);
9248
9249 return "nc";
9250}
9251
9252static HChar *
9253s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9254{
9255 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9256
9257 return "oc";
9258}
9259
9260
9261static HChar *
9262s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9263{
9264 IRTemp counter = newTemp(Ity_I64);
9265
9266 assign(counter, get_counter_dw0());
9267
9268 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9269 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9270
9271 /* Check for end of field */
9272 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9273 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9274 guest_IA_curr_instr);
9275 put_counter_dw0(mkU64(0));
9276
9277 return "mvc";
9278}
9279
9280static HChar *
9281s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9282{
9283 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9284
9285 addr1 = newTemp(Ity_I64);
9286 addr3 = newTemp(Ity_I64);
9287 addr3_load = newTemp(Ity_I64);
9288 len1 = newTemp(Ity_I64);
9289 len3 = newTemp(Ity_I64);
9290 single = newTemp(Ity_I8);
9291
9292 assign(addr1, get_gpr_dw0(r1));
9293 assign(len1, get_gpr_dw0(r1 + 1));
9294 assign(addr3, get_gpr_dw0(r3));
9295 assign(len3, get_gpr_dw0(r3 + 1));
9296
9297 // len1 == 0 ?
9298 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9299 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9300 guest_IA_next_instr);
9301
9302 /* This is a hack to prevent mvcle from reading from addr3 if it
9303 should read from the pad. Since the pad has no address, just
9304 read from the instruction, we discard that anyway */
9305 assign(addr3_load,
9306 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9307 mkU64(0))),
9308 mkexpr(addr3),
9309 mkU64(guest_IA_curr_instr)));
9310
9311 assign(single,
9312 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9313 mkU64(0))),
9314 load(Ity_I8, mkexpr(addr3_load)),
9315 unop(Iop_64to8, mkexpr(pad2))));
9316 store(mkexpr(addr1), mkexpr(single));
9317
9318 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9319
9320 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9321
9322 put_gpr_dw0(r3,
9323 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9324 mkU64(0))),
9325 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
9326 mkexpr(addr3)));
9327
9328 put_gpr_dw0(r3 + 1,
9329 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9330 mkU64(0))),
9331 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
9332 mkU64(0)));
9333
9334 /* We should set CC=3 (faked by overflow add) and leave after
9335 a maximum of ~4096 bytes have been processed. This is simpler:
9336 we leave whenever (len1 % 4096) == 0 */
9337 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
9338
9339 mktemp(Ity_I64, mkU64(-1ULL)), False);
9340 if_condition_goto(binop(Iop_CmpEQ64,
9341 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9342 mkU64(0)),
9343 guest_IA_next_instr);
9344
9345 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9346 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9347 guest_IA_curr_instr);
9348
9349 return "mvcle";
9350}
9351
9352static HChar *
9353s390_irgen_MVST(UChar r1, UChar r2)
9354{
9355 IRTemp addr1 = newTemp(Ity_I64);
9356 IRTemp addr2 = newTemp(Ity_I64);
9357 IRTemp end = newTemp(Ity_I8);
9358 IRTemp byte = newTemp(Ity_I8);
9359 IRTemp counter = newTemp(Ity_I64);
9360
9361 assign(addr1, get_gpr_dw0(r1));
9362 assign(addr2, get_gpr_dw0(r2));
9363 assign(counter, get_counter_dw0());
9364 assign(end, get_gpr_b7(0));
9365 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9366 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9367
9368 // We use unlimited as cpu-determined number
9369 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9370 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9371 guest_IA_curr_instr);
9372
9373 // and always set cc=1 at the end + update r1
9374 s390_cc_set(1);
9375 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9376 put_counter_dw0(mkU64(0));
9377
9378 return "mvst";
9379}
9380
9381static void
9382s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9383{
9384 IRTemp op1 = newTemp(Ity_I64);
9385 IRTemp result = newTemp(Ity_I64);
9386
9387 assign(op1, binop(Iop_32HLto64,
9388 get_gpr_w1(r1), // high 32 bits
9389 get_gpr_w1(r1 + 1))); // low 32 bits
9390 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9391 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9392 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9393}
9394
9395static void
9396s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9397{
9398 IRTemp op1 = newTemp(Ity_I128);
9399 IRTemp result = newTemp(Ity_I128);
9400
9401 assign(op1, binop(Iop_64HLto128,
9402 get_gpr_dw0(r1), // high 64 bits
9403 get_gpr_dw0(r1 + 1))); // low 64 bits
9404 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9405 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9406 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9407}
9408
9409static void
9410s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9411{
9412 IRTemp op1 = newTemp(Ity_I64);
9413 IRTemp result = newTemp(Ity_I128);
9414
9415 assign(op1, get_gpr_dw0(r1 + 1));
9416 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9417 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9418 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9419}
9420
9421static HChar *
9422s390_irgen_DR(UChar r1, UChar r2)
9423{
9424 IRTemp op2 = newTemp(Ity_I32);
9425
9426 assign(op2, get_gpr_w1(r2));
9427
9428 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9429
9430 return "dr";
9431}
9432
9433static HChar *
9434s390_irgen_D(UChar r1, IRTemp op2addr)
9435{
9436 IRTemp op2 = newTemp(Ity_I32);
9437
9438 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9439
9440 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9441
9442 return "d";
9443}
9444
9445static HChar *
9446s390_irgen_DLR(UChar r1, UChar r2)
9447{
9448 IRTemp op2 = newTemp(Ity_I32);
9449
9450 assign(op2, get_gpr_w1(r2));
9451
9452 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9453
9454 return "dr";
9455}
9456
9457static HChar *
9458s390_irgen_DL(UChar r1, IRTemp op2addr)
9459{
9460 IRTemp op2 = newTemp(Ity_I32);
9461
9462 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9463
9464 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9465
9466 return "dl";
9467}
9468
9469static HChar *
9470s390_irgen_DLG(UChar r1, IRTemp op2addr)
9471{
9472 IRTemp op2 = newTemp(Ity_I64);
9473
9474 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9475
9476 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9477
9478 return "dlg";
9479}
9480
9481static HChar *
9482s390_irgen_DLGR(UChar r1, UChar r2)
9483{
9484 IRTemp op2 = newTemp(Ity_I64);
9485
9486 assign(op2, get_gpr_dw0(r2));
9487
9488 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9489
9490 return "dlgr";
9491}
9492
9493static HChar *
9494s390_irgen_DSGR(UChar r1, UChar r2)
9495{
9496 IRTemp op2 = newTemp(Ity_I64);
9497
9498 assign(op2, get_gpr_dw0(r2));
9499
9500 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9501
9502 return "dsgr";
9503}
9504
9505static HChar *
9506s390_irgen_DSG(UChar r1, IRTemp op2addr)
9507{
9508 IRTemp op2 = newTemp(Ity_I64);
9509
9510 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9511
9512 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9513
9514 return "dsg";
9515}
9516
9517static HChar *
9518s390_irgen_DSGFR(UChar r1, UChar r2)
9519{
9520 IRTemp op2 = newTemp(Ity_I64);
9521
9522 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9523
9524 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9525
9526 return "dsgfr";
9527}
9528
9529static HChar *
9530s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9531{
9532 IRTemp op2 = newTemp(Ity_I64);
9533
9534 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9535
9536 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9537
9538 return "dsgf";
9539}
9540
9541static void
9542s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9543{
9544 UChar reg;
9545 IRTemp addr = newTemp(Ity_I64);
9546
9547 assign(addr, mkexpr(op2addr));
9548 reg = r1;
9549 do {
9550 IRTemp old = addr;
9551
9552 reg %= 16;
9553 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9554 addr = newTemp(Ity_I64);
9555 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9556 reg++;
9557 } while (reg != (r3 + 1));
9558}
9559
9560static HChar *
9561s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9562{
9563 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9564
9565 return "lam";
9566}
9567
9568static HChar *
9569s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9570{
9571 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9572
9573 return "lamy";
9574}
9575
9576static void
9577s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9578{
9579 UChar reg;
9580 IRTemp addr = newTemp(Ity_I64);
9581
9582 assign(addr, mkexpr(op2addr));
9583 reg = r1;
9584 do {
9585 IRTemp old = addr;
9586
9587 reg %= 16;
9588 store(mkexpr(addr), get_ar_w0(reg));
9589 addr = newTemp(Ity_I64);
9590 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9591 reg++;
9592 } while (reg != (r3 + 1));
9593}
9594
9595static HChar *
9596s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9597{
9598 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9599
9600 return "stam";
9601}
9602
9603static HChar *
9604s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9605{
9606 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9607
9608 return "stamy";
9609}
9610
9611
9612/* Implementation for 32-bit compare-and-swap */
9613static void
9614s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9615{
9616 IRCAS *cas;
9617 IRTemp op1 = newTemp(Ity_I32);
9618 IRTemp old_mem = newTemp(Ity_I32);
9619 IRTemp op3 = newTemp(Ity_I32);
9620 IRTemp result = newTemp(Ity_I32);
9621 IRTemp nequal = newTemp(Ity_I1);
9622
9623 assign(op1, get_gpr_w1(r1));
9624 assign(op3, get_gpr_w1(r3));
9625
9626 /* The first and second operands are compared. If they are equal,
9627 the third operand is stored at the second- operand location. */
9628 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9629 Iend_BE, mkexpr(op2addr),
9630 NULL, mkexpr(op1), /* expected value */
9631 NULL, mkexpr(op3) /* new value */);
9632 stmt(IRStmt_CAS(cas));
9633
9634 /* Set CC. Operands compared equal -> 0, else 1. */
9635 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9636 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9637
9638 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9639 Otherwise, store the old_value from memory in r1 and yield. */
9640 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9641 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9642 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9643 IRConst_U64(guest_IA_next_instr)));
9644}
9645
9646static HChar *
9647s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9648{
9649 s390_irgen_cas_32(r1, r3, op2addr);
9650
9651 return "cs";
9652}
9653
9654static HChar *
9655s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9656{
9657 s390_irgen_cas_32(r1, r3, op2addr);
9658
9659 return "csy";
9660}
9661
9662static HChar *
9663s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9664{
9665 IRCAS *cas;
9666 IRTemp op1 = newTemp(Ity_I64);
9667 IRTemp old_mem = newTemp(Ity_I64);
9668 IRTemp op3 = newTemp(Ity_I64);
9669 IRTemp result = newTemp(Ity_I64);
9670 IRTemp nequal = newTemp(Ity_I1);
9671
9672 assign(op1, get_gpr_dw0(r1));
9673 assign(op3, get_gpr_dw0(r3));
9674
9675 /* The first and second operands are compared. If they are equal,
9676 the third operand is stored at the second- operand location. */
9677 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9678 Iend_BE, mkexpr(op2addr),
9679 NULL, mkexpr(op1), /* expected value */
9680 NULL, mkexpr(op3) /* new value */);
9681 stmt(IRStmt_CAS(cas));
9682
9683 /* Set CC. Operands compared equal -> 0, else 1. */
9684 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9685 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9686
9687 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9688 Otherwise, store the old_value from memory in r1 and yield. */
9689 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9690 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9691 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9692 IRConst_U64(guest_IA_next_instr)));
9693
9694 return "csg";
9695}
9696
9697
9698/* Binary floating point */
9699
9700static HChar *
9701s390_irgen_AXBR(UChar r1, UChar r2)
9702{
9703 IRTemp op1 = newTemp(Ity_F128);
9704 IRTemp op2 = newTemp(Ity_F128);
9705 IRTemp result = newTemp(Ity_F128);
9706
9707 assign(op1, get_fpr_pair(r1));
9708 assign(op2, get_fpr_pair(r2));
9709 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9710 mkexpr(op2)));
9711 put_fpr_pair(r1, mkexpr(result));
9712
9713 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9714
9715 return "axbr";
9716}
9717
9718/* The result of a Iop_CmdFxx operation is a condition code. It is
9719 encoded using the values defined in type IRCmpFxxResult.
9720 Before we can store the condition code into the guest state (or do
9721 anything else with it for that matter) we need to convert it to
9722 the encoding that s390 uses. This is what this function does.
9723
9724 s390 VEX b6 b2 b0 cc.1 cc.0
9725 0 0x40 EQ 1 0 0 0 0
9726 1 0x01 LT 0 0 1 0 1
9727 2 0x00 GT 0 0 0 1 0
9728 3 0x45 Unordered 1 1 1 1 1
9729
9730 The following bits from the VEX encoding are interesting:
9731 b0, b2, b6 with b0 being the LSB. We observe:
9732
9733 cc.0 = b0;
9734 cc.1 = b2 | (~b0 & ~b6)
9735
9736 with cc being the s390 condition code.
9737*/
9738static IRExpr *
9739convert_vex_fpcc_to_s390(IRTemp vex_cc)
9740{
9741 IRTemp cc0 = newTemp(Ity_I32);
9742 IRTemp cc1 = newTemp(Ity_I32);
9743 IRTemp b0 = newTemp(Ity_I32);
9744 IRTemp b2 = newTemp(Ity_I32);
9745 IRTemp b6 = newTemp(Ity_I32);
9746
9747 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9748 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9749 mkU32(1)));
9750 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9751 mkU32(1)));
9752
9753 assign(cc0, mkexpr(b0));
9754 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9755 binop(Iop_And32,
9756 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9757 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9758 )));
9759
9760 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9761}
9762
9763static HChar *
9764s390_irgen_CEBR(UChar r1, UChar r2)
9765{
9766 IRTemp op1 = newTemp(Ity_F32);
9767 IRTemp op2 = newTemp(Ity_F32);
9768 IRTemp cc_vex = newTemp(Ity_I32);
9769 IRTemp cc_s390 = newTemp(Ity_I32);
9770
9771 assign(op1, get_fpr_w0(r1));
9772 assign(op2, get_fpr_w0(r2));
9773 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9774
9775 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9776 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9777
9778 return "cebr";
9779}
9780
9781static HChar *
9782s390_irgen_CDBR(UChar r1, UChar r2)
9783{
9784 IRTemp op1 = newTemp(Ity_F64);
9785 IRTemp op2 = newTemp(Ity_F64);
9786 IRTemp cc_vex = newTemp(Ity_I32);
9787 IRTemp cc_s390 = newTemp(Ity_I32);
9788
9789 assign(op1, get_fpr_dw0(r1));
9790 assign(op2, get_fpr_dw0(r2));
9791 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9792
9793 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9794 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9795
9796 return "cdbr";
9797}
9798
9799static HChar *
9800s390_irgen_CXBR(UChar r1, UChar r2)
9801{
9802 IRTemp op1 = newTemp(Ity_F128);
9803 IRTemp op2 = newTemp(Ity_F128);
9804 IRTemp cc_vex = newTemp(Ity_I32);
9805 IRTemp cc_s390 = newTemp(Ity_I32);
9806
9807 assign(op1, get_fpr_pair(r1));
9808 assign(op2, get_fpr_pair(r2));
9809 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
9810
9811 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9812 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9813
9814 return "cxbr";
9815}
9816
9817static HChar *
9818s390_irgen_CEB(UChar r1, IRTemp op2addr)
9819{
9820 IRTemp op1 = newTemp(Ity_F32);
9821 IRTemp op2 = newTemp(Ity_F32);
9822 IRTemp cc_vex = newTemp(Ity_I32);
9823 IRTemp cc_s390 = newTemp(Ity_I32);
9824
9825 assign(op1, get_fpr_w0(r1));
9826 assign(op2, load(Ity_F32, mkexpr(op2addr)));
9827 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9828
9829 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9830 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9831
9832 return "ceb";
9833}
9834
9835static HChar *
9836s390_irgen_CDB(UChar r1, IRTemp op2addr)
9837{
9838 IRTemp op1 = newTemp(Ity_F64);
9839 IRTemp op2 = newTemp(Ity_F64);
9840 IRTemp cc_vex = newTemp(Ity_I32);
9841 IRTemp cc_s390 = newTemp(Ity_I32);
9842
9843 assign(op1, get_fpr_dw0(r1));
9844 assign(op2, load(Ity_F64, mkexpr(op2addr)));
9845 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9846
9847 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9848 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9849
9850 return "cdb";
9851}
9852
9853static HChar *
9854s390_irgen_CXFBR(UChar r1, UChar r2)
9855{
9856 IRTemp op2 = newTemp(Ity_I32);
9857
9858 assign(op2, get_gpr_w1(r2));
9859 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
9860
9861 return "cxfbr";
9862}
9863
9864static HChar *
9865s390_irgen_CXGBR(UChar r1, UChar r2)
9866{
9867 IRTemp op2 = newTemp(Ity_I64);
9868
9869 assign(op2, get_gpr_dw0(r2));
9870 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
9871
9872 return "cxgbr";
9873}
9874
9875static HChar *
9876s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
9877{
9878 IRTemp op = newTemp(Ity_F128);
9879 IRTemp result = newTemp(Ity_I32);
9880
9881 assign(op, get_fpr_pair(r2));
9882 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
9883 mkexpr(op)));
9884 put_gpr_w1(r1, mkexpr(result));
9885 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
9886
9887 return "cfxbr";
9888}
9889
9890static HChar *
9891s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
9892{
9893 IRTemp op = newTemp(Ity_F128);
9894 IRTemp result = newTemp(Ity_I64);
9895
9896 assign(op, get_fpr_pair(r2));
9897 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
9898 mkexpr(op)));
9899 put_gpr_dw0(r1, mkexpr(result));
9900 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
9901
9902 return "cgxbr";
9903}
9904
9905static HChar *
9906s390_irgen_DXBR(UChar r1, UChar r2)
9907{
9908 IRTemp op1 = newTemp(Ity_F128);
9909 IRTemp op2 = newTemp(Ity_F128);
9910 IRTemp result = newTemp(Ity_F128);
9911
9912 assign(op1, get_fpr_pair(r1));
9913 assign(op2, get_fpr_pair(r2));
9914 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9915 mkexpr(op2)));
9916 put_fpr_pair(r1, mkexpr(result));
9917
9918 return "dxbr";
9919}
9920
9921static HChar *
9922s390_irgen_LTXBR(UChar r1, UChar r2)
9923{
9924 IRTemp result = newTemp(Ity_F128);
9925
9926 assign(result, get_fpr_pair(r2));
9927 put_fpr_pair(r1, mkexpr(result));
9928 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9929
9930 return "ltxbr";
9931}
9932
9933static HChar *
9934s390_irgen_LCXBR(UChar r1, UChar r2)
9935{
9936 IRTemp result = newTemp(Ity_F128);
9937
9938 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
9939 put_fpr_pair(r1, mkexpr(result));
9940 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9941
9942 return "lcxbr";
9943}
9944
9945static HChar *
9946s390_irgen_LXDBR(UChar r1, UChar r2)
9947{
9948 IRTemp op = newTemp(Ity_F64);
9949
9950 assign(op, get_fpr_dw0(r2));
9951 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9952
9953 return "lxdbr";
9954}
9955
9956static HChar *
9957s390_irgen_LXEBR(UChar r1, UChar r2)
9958{
9959 IRTemp op = newTemp(Ity_F32);
9960
9961 assign(op, get_fpr_w0(r2));
9962 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9963
9964 return "lxebr";
9965}
9966
9967static HChar *
9968s390_irgen_LXDB(UChar r1, IRTemp op2addr)
9969{
9970 IRTemp op = newTemp(Ity_F64);
9971
9972 assign(op, load(Ity_F64, mkexpr(op2addr)));
9973 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9974
9975 return "lxdb";
9976}
9977
9978static HChar *
9979s390_irgen_LXEB(UChar r1, IRTemp op2addr)
9980{
9981 IRTemp op = newTemp(Ity_F32);
9982
9983 assign(op, load(Ity_F32, mkexpr(op2addr)));
9984 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9985
9986 return "lxeb";
9987}
9988
9989static HChar *
9990s390_irgen_LNEBR(UChar r1, UChar r2)
9991{
9992 IRTemp result = newTemp(Ity_F32);
9993
9994 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
9995 put_fpr_w0(r1, mkexpr(result));
9996 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
9997
9998 return "lnebr";
9999}
10000
10001static HChar *
10002s390_irgen_LNDBR(UChar r1, UChar r2)
10003{
10004 IRTemp result = newTemp(Ity_F64);
10005
10006 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10007 put_fpr_dw0(r1, mkexpr(result));
10008 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10009
10010 return "lndbr";
10011}
10012
10013static HChar *
10014s390_irgen_LNXBR(UChar r1, UChar r2)
10015{
10016 IRTemp result = newTemp(Ity_F128);
10017
10018 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10019 put_fpr_pair(r1, mkexpr(result));
10020 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10021
10022 return "lnxbr";
10023}
10024
10025static HChar *
10026s390_irgen_LPEBR(UChar r1, UChar r2)
10027{
10028 IRTemp result = newTemp(Ity_F32);
10029
10030 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10031 put_fpr_w0(r1, mkexpr(result));
10032 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10033
10034 return "lpebr";
10035}
10036
10037static HChar *
10038s390_irgen_LPDBR(UChar r1, UChar r2)
10039{
10040 IRTemp result = newTemp(Ity_F64);
10041
10042 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10043 put_fpr_dw0(r1, mkexpr(result));
10044 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10045
10046 return "lpdbr";
10047}
10048
10049static HChar *
10050s390_irgen_LPXBR(UChar r1, UChar r2)
10051{
10052 IRTemp result = newTemp(Ity_F128);
10053
10054 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10055 put_fpr_pair(r1, mkexpr(result));
10056 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10057
10058 return "lpxbr";
10059}
10060
10061static HChar *
10062s390_irgen_LDXBR(UChar r1, UChar r2)
10063{
10064 IRTemp result = newTemp(Ity_F64);
10065
10066 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10067 put_fpr_dw0(r1, mkexpr(result));
10068
10069 return "ldxbr";
10070}
10071
10072static HChar *
10073s390_irgen_LEXBR(UChar r1, UChar r2)
10074{
10075 IRTemp result = newTemp(Ity_F32);
10076
10077 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10078 put_fpr_w0(r1, mkexpr(result));
10079
10080 return "lexbr";
10081}
10082
10083static HChar *
10084s390_irgen_MXBR(UChar r1, UChar r2)
10085{
10086 IRTemp op1 = newTemp(Ity_F128);
10087 IRTemp op2 = newTemp(Ity_F128);
10088 IRTemp result = newTemp(Ity_F128);
10089
10090 assign(op1, get_fpr_pair(r1));
10091 assign(op2, get_fpr_pair(r2));
10092 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10093 mkexpr(op2)));
10094 put_fpr_pair(r1, mkexpr(result));
10095
10096 return "mxbr";
10097}
10098
10099static HChar *
10100s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10101{
10102 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10103 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10104
10105 return "maebr";
10106}
10107
10108static HChar *
10109s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10110{
10111 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10112 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10113
10114 return "madbr";
10115}
10116
10117static HChar *
10118s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10119{
10120 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10121
10122 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10123 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10124
10125 return "maeb";
10126}
10127
10128static HChar *
10129s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10130{
10131 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10132
10133 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10134 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10135
10136 return "madb";
10137}
10138
10139static HChar *
10140s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10141{
10142 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10143 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10144
10145 return "msebr";
10146}
10147
10148static HChar *
10149s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10150{
10151 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10152 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10153
10154 return "msdbr";
10155}
10156
10157static HChar *
10158s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10159{
10160 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10161
10162 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10163 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10164
10165 return "mseb";
10166}
10167
10168static HChar *
10169s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10170{
10171 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10172
10173 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10174 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10175
10176 return "msdb";
10177}
10178
10179static HChar *
10180s390_irgen_SQEBR(UChar r1, UChar r2)
10181{
10182 IRTemp result = newTemp(Ity_F32);
10183
10184 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10185 put_fpr_w0(r1, mkexpr(result));
10186
10187 return "sqebr";
10188}
10189
10190static HChar *
10191s390_irgen_SQDBR(UChar r1, UChar r2)
10192{
10193 IRTemp result = newTemp(Ity_F64);
10194
10195 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10196 put_fpr_dw0(r1, mkexpr(result));
10197
10198 return "sqdbr";
10199}
10200
10201static HChar *
10202s390_irgen_SQXBR(UChar r1, UChar r2)
10203{
10204 IRTemp result = newTemp(Ity_F128);
10205
10206 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10207 put_fpr_pair(r1, mkexpr(result));
10208
10209 return "sqxbr";
10210}
10211
10212static HChar *
10213s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10214{
10215 IRTemp op = newTemp(Ity_F32);
10216
10217 assign(op, load(Ity_F32, mkexpr(op2addr)));
10218 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10219
10220 return "sqeb";
10221}
10222
10223static HChar *
10224s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10225{
10226 IRTemp op = newTemp(Ity_F64);
10227
10228 assign(op, load(Ity_F64, mkexpr(op2addr)));
10229 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10230
10231 return "sqdb";
10232}
10233
10234static HChar *
10235s390_irgen_SXBR(UChar r1, UChar r2)
10236{
10237 IRTemp op1 = newTemp(Ity_F128);
10238 IRTemp op2 = newTemp(Ity_F128);
10239 IRTemp result = newTemp(Ity_F128);
10240
10241 assign(op1, get_fpr_pair(r1));
10242 assign(op2, get_fpr_pair(r2));
10243 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10244 mkexpr(op2)));
10245 put_fpr_pair(r1, mkexpr(result));
10246 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10247
10248 return "sxbr";
10249}
10250
10251static HChar *
10252s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10253{
10254 IRTemp value = newTemp(Ity_F32);
10255
10256 assign(value, get_fpr_w0(r1));
10257
10258 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10259
10260 return "tceb";
10261}
10262
10263static HChar *
10264s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10265{
10266 IRTemp value = newTemp(Ity_F64);
10267
10268 assign(value, get_fpr_dw0(r1));
10269
10270 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10271
10272 return "tcdb";
10273}
10274
10275static HChar *
10276s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10277{
10278 IRTemp value = newTemp(Ity_F128);
10279
10280 assign(value, get_fpr_pair(r1));
10281
10282 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10283
10284 return "tcxb";
10285}
10286
10287static HChar *
10288s390_irgen_LCDFR(UChar r1, UChar r2)
10289{
10290 IRTemp result = newTemp(Ity_F64);
10291
10292 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10293 put_fpr_dw0(r1, mkexpr(result));
10294
10295 return "lcdfr";
10296}
10297
10298static HChar *
10299s390_irgen_LNDFR(UChar r1, UChar r2)
10300{
10301 IRTemp result = newTemp(Ity_F64);
10302
10303 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10304 put_fpr_dw0(r1, mkexpr(result));
10305
10306 return "lndfr";
10307}
10308
10309static HChar *
10310s390_irgen_LPDFR(UChar r1, UChar r2)
10311{
10312 IRTemp result = newTemp(Ity_F64);
10313
10314 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10315 put_fpr_dw0(r1, mkexpr(result));
10316
10317 return "lpdfr";
10318}
10319
10320static HChar *
10321s390_irgen_LDGR(UChar r1, UChar r2)
10322{
10323 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10324
10325 return "ldgr";
10326}
10327
10328static HChar *
10329s390_irgen_LGDR(UChar r1, UChar r2)
10330{
10331 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10332
10333 return "lgdr";
10334}
10335
10336
10337static HChar *
10338s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10339{
10340 IRTemp sign = newTemp(Ity_I64);
10341 IRTemp value = newTemp(Ity_I64);
10342
10343 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10344 mkU64(1ULL << 63)));
10345 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10346 mkU64((1ULL << 63) - 1)));
10347 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10348 mkexpr(sign))));
10349
10350 return "cpsdr";
10351}
10352
10353
10354static UInt
10355s390_do_cvb(ULong decimal)
10356{
10357#if defined(VGA_s390x)
10358 UInt binary;
10359
10360 __asm__ volatile (
10361 "cvb %[result],%[input]\n\t"
10362 : [result] "=d"(binary)
10363 : [input] "m"(decimal)
10364 );
10365
10366 return binary;
10367#else
10368 return 0;
10369#endif
10370}
10371
10372static IRExpr *
10373s390_call_cvb(IRExpr *in)
10374{
10375 IRExpr **args, *call;
10376
10377 args = mkIRExprVec_1(in);
10378 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10379 "s390_do_cvb", &s390_do_cvb, args);
10380
10381 /* Nothing is excluded from definedness checking. */
10382 call->Iex.CCall.cee->mcx_mask = 0;
10383
10384 return call;
10385}
10386
10387static HChar *
10388s390_irgen_CVB(UChar r1, IRTemp op2addr)
10389{
10390 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10391
10392 return "cvb";
10393}
10394
10395static HChar *
10396s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10397{
10398 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10399
10400 return "cvby";
10401}
10402
10403
10404static ULong
10405s390_do_cvd(ULong binary_in)
10406{
10407#if defined(VGA_s390x)
10408 UInt binary = binary_in & 0xffffffffULL;
10409 ULong decimal;
10410
10411 __asm__ volatile (
10412 "cvd %[input],%[result]\n\t"
10413 : [result] "=m"(decimal)
10414 : [input] "d"(binary)
10415 );
10416
10417 return decimal;
10418#else
10419 return 0;
10420#endif
10421}
10422
10423static IRExpr *
10424s390_call_cvd(IRExpr *in)
10425{
10426 IRExpr **args, *call;
10427
10428 args = mkIRExprVec_1(in);
10429 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10430 "s390_do_cvd", &s390_do_cvd, args);
10431
10432 /* Nothing is excluded from definedness checking. */
10433 call->Iex.CCall.cee->mcx_mask = 0;
10434
10435 return call;
10436}
10437
10438static HChar *
10439s390_irgen_CVD(UChar r1, IRTemp op2addr)
10440{
10441 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10442
10443 return "cvd";
10444}
10445
10446static HChar *
10447s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10448{
10449 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10450
10451 return "cvdy";
10452}
10453
10454static HChar *
10455s390_irgen_FLOGR(UChar r1, UChar r2)
10456{
10457 IRTemp input = newTemp(Ity_I64);
10458 IRTemp not_zero = newTemp(Ity_I64);
10459 IRTemp tmpnum = newTemp(Ity_I64);
10460 IRTemp num = newTemp(Ity_I64);
10461 IRTemp shift_amount = newTemp(Ity_I8);
10462
10463 /* We use the "count leading zeroes" operator because the number of
10464 leading zeroes is identical with the bit position of the first '1' bit.
10465 However, that operator does not work when the input value is zero.
10466 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10467 the modified value. If input == 0, then the result is 64. Otherwise,
10468 the result of Clz64 is what we want. */
10469
10470 assign(input, get_gpr_dw0(r2));
10471 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10472 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10473
10474 /* num = (input == 0) ? 64 : tmpnum */
10475 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10476 /* == 0 */ mkU64(64),
10477 /* != 0 */ mkexpr(tmpnum)));
10478
10479 put_gpr_dw0(r1, mkexpr(num));
10480
10481 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10482 is to first shift the input value by NUM + 1 bits to the left which
10483 causes the leftmost '1' bit to disappear. Then we shift logically to
10484 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10485 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10486 the width of the value-to-be-shifted, we need to special case
10487 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10488 For both such INPUT values the result will be 0. */
10489
10490 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10491 mkU64(1))));
10492
10493 put_gpr_dw0(r1 + 1,
10494 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10495 /* == 0 || == 1*/ mkU64(0),
10496 /* otherwise */
10497 binop(Iop_Shr64,
10498 binop(Iop_Shl64, mkexpr(input),
10499 mkexpr(shift_amount)),
10500 mkexpr(shift_amount))));
10501
10502 /* Compare the original value as an unsigned integer with 0. */
10503 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10504 mktemp(Ity_I64, mkU64(0)), False);
10505
10506 return "flogr";
10507}
10508
10509/*------------------------------------------------------------*/
10510/*--- Build IR for special instructions ---*/
10511/*------------------------------------------------------------*/
10512
10513void
10514s390_irgen_client_request(void)
10515{
10516 if (0)
10517 vex_printf("%%R3 = client_request ( %%R2 )\n");
10518
10519 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10520 + S390_SPECIAL_OP_PREAMBLE_SIZE
10521 + S390_SPECIAL_OP_SIZE));
10522 irsb->jumpkind = Ijk_ClientReq;
10523
10524 dis_res->whatNext = Dis_StopHere;
10525}
10526
10527void
10528s390_irgen_guest_NRADDR(void)
10529{
10530 if (0)
10531 vex_printf("%%R3 = guest_NRADDR\n");
10532
10533 put_gpr_dw0(3, IRExpr_Get(S390_GUEST_OFFSET(guest_NRADDR), Ity_I64));
10534}
10535
10536void
10537s390_irgen_call_noredir(void)
10538{
10539 /* Continue after special op */
10540 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10541 + S390_SPECIAL_OP_PREAMBLE_SIZE
10542 + S390_SPECIAL_OP_SIZE));
10543
10544 /* The address is in REG1, all parameters are in the right (guest) places */
10545 irsb->next = get_gpr_dw0(1);
10546 irsb->jumpkind = Ijk_NoRedir;
10547
10548 dis_res->whatNext = Dis_StopHere;
10549}
10550
10551/* Force proper alignment for the structures below. */
10552#pragma pack(1)
10553
10554
10555static s390_decode_t
10556s390_decode_2byte_and_irgen(UChar *bytes)
10557{
10558 typedef union {
10559 struct {
10560 unsigned int op : 16;
10561 } E;
10562 struct {
10563 unsigned int op : 8;
10564 unsigned int i : 8;
10565 } I;
10566 struct {
10567 unsigned int op : 8;
10568 unsigned int r1 : 4;
10569 unsigned int r2 : 4;
10570 } RR;
10571 } formats;
10572 union {
10573 formats fmt;
10574 UShort value;
10575 } ovl;
10576
10577 vassert(sizeof(formats) == 2);
10578
10579 ((char *)(&ovl.value))[0] = bytes[0];
10580 ((char *)(&ovl.value))[1] = bytes[1];
10581
10582 switch (ovl.value & 0xffff) {
10583 case 0x0101: /* PR */ goto unimplemented;
10584 case 0x0102: /* UPT */ goto unimplemented;
10585 case 0x0104: /* PTFF */ goto unimplemented;
10586 case 0x0107: /* SCKPF */ goto unimplemented;
10587 case 0x010a: /* PFPO */ goto unimplemented;
10588 case 0x010b: /* TAM */ goto unimplemented;
10589 case 0x010c: /* SAM24 */ goto unimplemented;
10590 case 0x010d: /* SAM31 */ goto unimplemented;
10591 case 0x010e: /* SAM64 */ goto unimplemented;
10592 case 0x01ff: /* TRAP2 */ goto unimplemented;
10593 }
10594
10595 switch ((ovl.value & 0xff00) >> 8) {
10596 case 0x04: /* SPM */ goto unimplemented;
10597 case 0x05: /* BALR */ goto unimplemented;
10598 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10599 goto ok;
10600 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10601 goto ok;
10602 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
10603 case 0x0b: /* BSM */ goto unimplemented;
10604 case 0x0c: /* BASSM */ goto unimplemented;
10605 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10606 goto ok;
10607 case 0x0e: /* MVCL */ goto unimplemented;
10608 case 0x0f: /* CLCL */ goto unimplemented;
10609 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10610 goto ok;
10611 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10612 goto ok;
10613 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10614 goto ok;
10615 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10616 goto ok;
10617 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10618 goto ok;
10619 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10620 goto ok;
10621 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10622 goto ok;
10623 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10624 goto ok;
10625 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10626 goto ok;
10627 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10628 goto ok;
10629 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10630 goto ok;
10631 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10632 goto ok;
10633 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10634 goto ok;
10635 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10636 goto ok;
10637 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10638 goto ok;
10639 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10640 goto ok;
10641 case 0x20: /* LPDR */ goto unimplemented;
10642 case 0x21: /* LNDR */ goto unimplemented;
10643 case 0x22: /* LTDR */ goto unimplemented;
10644 case 0x23: /* LCDR */ goto unimplemented;
10645 case 0x24: /* HDR */ goto unimplemented;
10646 case 0x25: /* LDXR */ goto unimplemented;
10647 case 0x26: /* MXR */ goto unimplemented;
10648 case 0x27: /* MXDR */ goto unimplemented;
10649 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10650 goto ok;
10651 case 0x29: /* CDR */ goto unimplemented;
10652 case 0x2a: /* ADR */ goto unimplemented;
10653 case 0x2b: /* SDR */ goto unimplemented;
10654 case 0x2c: /* MDR */ goto unimplemented;
10655 case 0x2d: /* DDR */ goto unimplemented;
10656 case 0x2e: /* AWR */ goto unimplemented;
10657 case 0x2f: /* SWR */ goto unimplemented;
10658 case 0x30: /* LPER */ goto unimplemented;
10659 case 0x31: /* LNER */ goto unimplemented;
10660 case 0x32: /* LTER */ goto unimplemented;
10661 case 0x33: /* LCER */ goto unimplemented;
10662 case 0x34: /* HER */ goto unimplemented;
10663 case 0x35: /* LEDR */ goto unimplemented;
10664 case 0x36: /* AXR */ goto unimplemented;
10665 case 0x37: /* SXR */ goto unimplemented;
10666 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10667 goto ok;
10668 case 0x39: /* CER */ goto unimplemented;
10669 case 0x3a: /* AER */ goto unimplemented;
10670 case 0x3b: /* SER */ goto unimplemented;
10671 case 0x3c: /* MDER */ goto unimplemented;
10672 case 0x3d: /* DER */ goto unimplemented;
10673 case 0x3e: /* AUR */ goto unimplemented;
10674 case 0x3f: /* SUR */ goto unimplemented;
10675 }
10676
10677 return S390_DECODE_UNKNOWN_INSN;
10678
10679ok:
10680 return S390_DECODE_OK;
10681
10682unimplemented:
10683 return S390_DECODE_UNIMPLEMENTED_INSN;
10684}
10685
10686static s390_decode_t
10687s390_decode_4byte_and_irgen(UChar *bytes)
10688{
10689 typedef union {
10690 struct {
10691 unsigned int op1 : 8;
10692 unsigned int r1 : 4;
10693 unsigned int op2 : 4;
10694 unsigned int i2 : 16;
10695 } RI;
10696 struct {
10697 unsigned int op : 16;
10698 unsigned int : 8;
10699 unsigned int r1 : 4;
10700 unsigned int r2 : 4;
10701 } RRE;
10702 struct {
10703 unsigned int op : 16;
10704 unsigned int r1 : 4;
10705 unsigned int : 4;
10706 unsigned int r3 : 4;
10707 unsigned int r2 : 4;
10708 } RRF;
10709 struct {
10710 unsigned int op : 16;
10711 unsigned int r3 : 4;
10712 unsigned int m4 : 4;
10713 unsigned int r1 : 4;
10714 unsigned int r2 : 4;
10715 } RRF2;
10716 struct {
10717 unsigned int op : 16;
10718 unsigned int r3 : 4;
10719 unsigned int : 4;
10720 unsigned int r1 : 4;
10721 unsigned int r2 : 4;
10722 } RRF3;
10723 struct {
10724 unsigned int op : 16;
10725 unsigned int r3 : 4;
10726 unsigned int : 4;
10727 unsigned int r1 : 4;
10728 unsigned int r2 : 4;
10729 } RRR;
10730 struct {
10731 unsigned int op : 16;
10732 unsigned int r3 : 4;
10733 unsigned int : 4;
10734 unsigned int r1 : 4;
10735 unsigned int r2 : 4;
10736 } RRF4;
10737 struct {
10738 unsigned int op : 8;
10739 unsigned int r1 : 4;
10740 unsigned int r3 : 4;
10741 unsigned int b2 : 4;
10742 unsigned int d2 : 12;
10743 } RS;
10744 struct {
10745 unsigned int op : 8;
10746 unsigned int r1 : 4;
10747 unsigned int r3 : 4;
10748 unsigned int i2 : 16;
10749 } RSI;
10750 struct {
10751 unsigned int op : 8;
10752 unsigned int r1 : 4;
10753 unsigned int x2 : 4;
10754 unsigned int b2 : 4;
10755 unsigned int d2 : 12;
10756 } RX;
10757 struct {
10758 unsigned int op : 16;
10759 unsigned int b2 : 4;
10760 unsigned int d2 : 12;
10761 } S;
10762 struct {
10763 unsigned int op : 8;
10764 unsigned int i2 : 8;
10765 unsigned int b1 : 4;
10766 unsigned int d1 : 12;
10767 } SI;
10768 } formats;
10769 union {
10770 formats fmt;
10771 UInt value;
10772 } ovl;
10773
10774 vassert(sizeof(formats) == 4);
10775
10776 ((char *)(&ovl.value))[0] = bytes[0];
10777 ((char *)(&ovl.value))[1] = bytes[1];
10778 ((char *)(&ovl.value))[2] = bytes[2];
10779 ((char *)(&ovl.value))[3] = bytes[3];
10780
10781 switch ((ovl.value & 0xff0f0000) >> 16) {
10782 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
10783 ovl.fmt.RI.i2); goto ok;
10784 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
10785 ovl.fmt.RI.i2); goto ok;
10786 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
10787 ovl.fmt.RI.i2); goto ok;
10788 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
10789 ovl.fmt.RI.i2); goto ok;
10790 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
10791 ovl.fmt.RI.i2); goto ok;
10792 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
10793 ovl.fmt.RI.i2); goto ok;
10794 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
10795 ovl.fmt.RI.i2); goto ok;
10796 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
10797 ovl.fmt.RI.i2); goto ok;
10798 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
10799 ovl.fmt.RI.i2); goto ok;
10800 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
10801 ovl.fmt.RI.i2); goto ok;
10802 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
10803 ovl.fmt.RI.i2); goto ok;
10804 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
10805 ovl.fmt.RI.i2); goto ok;
10806 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
10807 ovl.fmt.RI.i2); goto ok;
10808 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
10809 ovl.fmt.RI.i2); goto ok;
10810 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
10811 ovl.fmt.RI.i2); goto ok;
10812 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
10813 ovl.fmt.RI.i2); goto ok;
10814 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
10815 ovl.fmt.RI.i2); goto ok;
10816 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
10817 ovl.fmt.RI.i2); goto ok;
10818 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
10819 ovl.fmt.RI.i2); goto ok;
10820 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
10821 ovl.fmt.RI.i2); goto ok;
10822 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10823 goto ok;
10824 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
10825 ovl.fmt.RI.i2); goto ok;
10826 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
10827 ovl.fmt.RI.i2); goto ok;
10828 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
10829 ovl.fmt.RI.i2); goto ok;
10830 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10831 goto ok;
10832 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
10833 ovl.fmt.RI.i2); goto ok;
10834 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10835 goto ok;
10836 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
10837 ovl.fmt.RI.i2); goto ok;
10838 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10839 goto ok;
10840 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
10841 ovl.fmt.RI.i2); goto ok;
10842 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10843 goto ok;
10844 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
10845 ovl.fmt.RI.i2); goto ok;
10846 }
10847
10848 switch ((ovl.value & 0xffff0000) >> 16) {
10849 case 0x8000: /* SSM */ goto unimplemented;
10850 case 0x8200: /* LPSW */ goto unimplemented;
10851 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
10852 goto ok;
10853 case 0xb202: /* STIDP */ goto unimplemented;
10854 case 0xb204: /* SCK */ goto unimplemented;
10855 case 0xb205: /* STCK */ goto unimplemented;
10856 case 0xb206: /* SCKC */ goto unimplemented;
10857 case 0xb207: /* STCKC */ goto unimplemented;
10858 case 0xb208: /* SPT */ goto unimplemented;
10859 case 0xb209: /* STPT */ goto unimplemented;
10860 case 0xb20a: /* SPKA */ goto unimplemented;
10861 case 0xb20b: /* IPK */ goto unimplemented;
10862 case 0xb20d: /* PTLB */ goto unimplemented;
10863 case 0xb210: /* SPX */ goto unimplemented;
10864 case 0xb211: /* STPX */ goto unimplemented;
10865 case 0xb212: /* STAP */ goto unimplemented;
10866 case 0xb214: /* SIE */ goto unimplemented;
10867 case 0xb218: /* PC */ goto unimplemented;
10868 case 0xb219: /* SAC */ goto unimplemented;
10869 case 0xb21a: /* CFC */ goto unimplemented;
10870 case 0xb221: /* IPTE */ goto unimplemented;
10871 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
10872 case 0xb223: /* IVSK */ goto unimplemented;
10873 case 0xb224: /* IAC */ goto unimplemented;
10874 case 0xb225: /* SSAR */ goto unimplemented;
10875 case 0xb226: /* EPAR */ goto unimplemented;
10876 case 0xb227: /* ESAR */ goto unimplemented;
10877 case 0xb228: /* PT */ goto unimplemented;
10878 case 0xb229: /* ISKE */ goto unimplemented;
10879 case 0xb22a: /* RRBE */ goto unimplemented;
10880 case 0xb22b: /* SSKE */ goto unimplemented;
10881 case 0xb22c: /* TB */ goto unimplemented;
10882 case 0xb22d: /* DXR */ goto unimplemented;
10883 case 0xb22e: /* PGIN */ goto unimplemented;
10884 case 0xb22f: /* PGOUT */ goto unimplemented;
10885 case 0xb230: /* CSCH */ goto unimplemented;
10886 case 0xb231: /* HSCH */ goto unimplemented;
10887 case 0xb232: /* MSCH */ goto unimplemented;
10888 case 0xb233: /* SSCH */ goto unimplemented;
10889 case 0xb234: /* STSCH */ goto unimplemented;
10890 case 0xb235: /* TSCH */ goto unimplemented;
10891 case 0xb236: /* TPI */ goto unimplemented;
10892 case 0xb237: /* SAL */ goto unimplemented;
10893 case 0xb238: /* RSCH */ goto unimplemented;
10894 case 0xb239: /* STCRW */ goto unimplemented;
10895 case 0xb23a: /* STCPS */ goto unimplemented;
10896 case 0xb23b: /* RCHP */ goto unimplemented;
10897 case 0xb23c: /* SCHM */ goto unimplemented;
10898 case 0xb240: /* BAKR */ goto unimplemented;
10899 case 0xb241: /* CKSM */ goto unimplemented;
10900 case 0xb244: /* SQDR */ goto unimplemented;
10901 case 0xb245: /* SQER */ goto unimplemented;
10902 case 0xb246: /* STURA */ goto unimplemented;
10903 case 0xb247: /* MSTA */ goto unimplemented;
10904 case 0xb248: /* PALB */ goto unimplemented;
10905 case 0xb249: /* EREG */ goto unimplemented;
10906 case 0xb24a: /* ESTA */ goto unimplemented;
10907 case 0xb24b: /* LURA */ goto unimplemented;
10908 case 0xb24c: /* TAR */ goto unimplemented;
10909 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
10910 ovl.fmt.RRE.r2); goto ok;
10911 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10912 goto ok;
10913 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10914 goto ok;
10915 case 0xb250: /* CSP */ goto unimplemented;
10916 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
10917 ovl.fmt.RRE.r2); goto ok;
10918 case 0xb254: /* MVPG */ goto unimplemented;
10919 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
10920 ovl.fmt.RRE.r2); goto ok;
10921 case 0xb257: /* CUSE */ goto unimplemented;
10922 case 0xb258: /* BSG */ goto unimplemented;
10923 case 0xb25a: /* BSA */ goto unimplemented;
10924 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
10925 ovl.fmt.RRE.r2); goto ok;
10926 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
10927 ovl.fmt.RRE.r2); goto ok;
10928 case 0xb263: /* CMPSC */ goto unimplemented;
10929 case 0xb274: /* SIGA */ goto unimplemented;
10930 case 0xb276: /* XSCH */ goto unimplemented;
10931 case 0xb277: /* RP */ goto unimplemented;
10932 case 0xb278: /* STCKE */ goto unimplemented;
10933 case 0xb279: /* SACF */ goto unimplemented;
10934 case 0xb27c: /* STCKF */ goto unimplemented;
10935 case 0xb27d: /* STSI */ goto unimplemented;
10936 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
10937 goto ok;
10938 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10939 goto ok;
10940 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10941 goto ok;
10942 case 0xb2a5: /* TRE */ goto unimplemented;
10943 case 0xb2a6: /* CU21 */ goto unimplemented;
10944 case 0xb2a7: /* CU12 */ goto unimplemented;
10945 case 0xb2b0: /* STFLE */ goto unimplemented;
10946 case 0xb2b1: /* STFL */ goto unimplemented;
10947 case 0xb2b2: /* LPSWE */ goto unimplemented;
10948 case 0xb2b8: /* SRNMB */ goto unimplemented;
10949 case 0xb2b9: /* SRNMT */ goto unimplemented;
10950 case 0xb2bd: /* LFAS */ goto unimplemented;
10951 case 0xb2ff: /* TRAP4 */ goto unimplemented;
10952 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
10953 ovl.fmt.RRE.r2); goto ok;
10954 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
10955 ovl.fmt.RRE.r2); goto ok;
10956 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
10957 ovl.fmt.RRE.r2); goto ok;
10958 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
10959 ovl.fmt.RRE.r2); goto ok;
10960 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
10961 ovl.fmt.RRE.r2); goto ok;
10962 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
10963 ovl.fmt.RRE.r2); goto ok;
10964 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
10965 ovl.fmt.RRE.r2); goto ok;
10966 case 0xb307: /* MXDBR */ goto unimplemented;
10967 case 0xb308: /* KEBR */ goto unimplemented;
10968 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
10969 ovl.fmt.RRE.r2); goto ok;
10970 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
10971 ovl.fmt.RRE.r2); goto ok;
10972 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
10973 ovl.fmt.RRE.r2); goto ok;
10974 case 0xb30c: /* MDEBR */ goto unimplemented;
10975 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
10976 ovl.fmt.RRE.r2); goto ok;
10977 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
10978 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10979 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
10980 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10981 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
10982 ovl.fmt.RRE.r2); goto ok;
10983 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
10984 ovl.fmt.RRE.r2); goto ok;
10985 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
10986 ovl.fmt.RRE.r2); goto ok;
10987 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
10988 ovl.fmt.RRE.r2); goto ok;
10989 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
10990 ovl.fmt.RRE.r2); goto ok;
10991 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
10992 ovl.fmt.RRE.r2); goto ok;
10993 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
10994 ovl.fmt.RRE.r2); goto ok;
10995 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
10996 ovl.fmt.RRE.r2); goto ok;
10997 case 0xb318: /* KDBR */ goto unimplemented;
10998 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
10999 ovl.fmt.RRE.r2); goto ok;
11000 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11001 ovl.fmt.RRE.r2); goto ok;
11002 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11003 ovl.fmt.RRE.r2); goto ok;
11004 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11005 ovl.fmt.RRE.r2); goto ok;
11006 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11007 ovl.fmt.RRE.r2); goto ok;
11008 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11009 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11010 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11011 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11012 case 0xb324: /* LDER */ goto unimplemented;
11013 case 0xb325: /* LXDR */ goto unimplemented;
11014 case 0xb326: /* LXER */ goto unimplemented;
11015 case 0xb32e: /* MAER */ goto unimplemented;
11016 case 0xb32f: /* MSER */ goto unimplemented;
11017 case 0xb336: /* SQXR */ goto unimplemented;
11018 case 0xb337: /* MEER */ goto unimplemented;
11019 case 0xb338: /* MAYLR */ goto unimplemented;
11020 case 0xb339: /* MYLR */ goto unimplemented;
11021 case 0xb33a: /* MAYR */ goto unimplemented;
11022 case 0xb33b: /* MYR */ goto unimplemented;
11023 case 0xb33c: /* MAYHR */ goto unimplemented;
11024 case 0xb33d: /* MYHR */ goto unimplemented;
11025 case 0xb33e: /* MADR */ goto unimplemented;
11026 case 0xb33f: /* MSDR */ goto unimplemented;
11027 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11028 ovl.fmt.RRE.r2); goto ok;
11029 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11030 ovl.fmt.RRE.r2); goto ok;
11031 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11032 ovl.fmt.RRE.r2); goto ok;
11033 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11034 ovl.fmt.RRE.r2); goto ok;
11035 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11036 ovl.fmt.RRE.r2); goto ok;
11037 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11038 ovl.fmt.RRE.r2); goto ok;
11039 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11040 ovl.fmt.RRE.r2); goto ok;
11041 case 0xb347: /* FIXBR */ goto unimplemented;
11042 case 0xb348: /* KXBR */ goto unimplemented;
11043 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11044 ovl.fmt.RRE.r2); goto ok;
11045 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11046 ovl.fmt.RRE.r2); goto ok;
11047 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11048 ovl.fmt.RRE.r2); goto ok;
11049 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11050 ovl.fmt.RRE.r2); goto ok;
11051 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11052 ovl.fmt.RRE.r2); goto ok;
11053 case 0xb350: /* TBEDR */ goto unimplemented;
11054 case 0xb351: /* TBDR */ goto unimplemented;
11055 case 0xb353: /* DIEBR */ goto unimplemented;
11056 case 0xb357: /* FIEBR */ goto unimplemented;
11057 case 0xb358: /* THDER */ goto unimplemented;
11058 case 0xb359: /* THDR */ goto unimplemented;
11059 case 0xb35b: /* DIDBR */ goto unimplemented;
11060 case 0xb35f: /* FIDBR */ goto unimplemented;
11061 case 0xb360: /* LPXR */ goto unimplemented;
11062 case 0xb361: /* LNXR */ goto unimplemented;
11063 case 0xb362: /* LTXR */ goto unimplemented;
11064 case 0xb363: /* LCXR */ goto unimplemented;
11065 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11066 ovl.fmt.RRE.r2); goto ok;
11067 case 0xb366: /* LEXR */ goto unimplemented;
11068 case 0xb367: /* FIXR */ goto unimplemented;
11069 case 0xb369: /* CXR */ goto unimplemented;
11070 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11071 ovl.fmt.RRE.r2); goto ok;
11072 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11073 ovl.fmt.RRE.r2); goto ok;
11074 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11075 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11076 goto ok;
11077 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11078 ovl.fmt.RRE.r2); goto ok;
11079 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11080 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11081 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11082 case 0xb377: /* FIER */ goto unimplemented;
11083 case 0xb37f: /* FIDR */ goto unimplemented;
11084 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11085 case 0xb385: /* SFASR */ goto unimplemented;
11086 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11087 case 0xb390: /* CELFBR */ goto unimplemented;
11088 case 0xb391: /* CDLFBR */ goto unimplemented;
11089 case 0xb392: /* CXLFBR */ goto unimplemented;
11090 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11091 ovl.fmt.RRE.r2); goto ok;
11092 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11093 ovl.fmt.RRE.r2); goto ok;
11094 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11095 ovl.fmt.RRE.r2); goto ok;
11096 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11097 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11098 goto ok;
11099 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11100 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11101 goto ok;
11102 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11103 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11104 goto ok;
11105 case 0xb3a0: /* CELGBR */ goto unimplemented;
11106 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11107 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11108 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11109 ovl.fmt.RRE.r2); goto ok;
11110 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11111 ovl.fmt.RRE.r2); goto ok;
11112 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11113 ovl.fmt.RRE.r2); goto ok;
11114 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11115 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11116 goto ok;
11117 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11118 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11119 goto ok;
11120 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11121 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11122 goto ok;
11123 case 0xb3b4: /* CEFR */ goto unimplemented;
11124 case 0xb3b5: /* CDFR */ goto unimplemented;
11125 case 0xb3b6: /* CXFR */ goto unimplemented;
11126 case 0xb3b8: /* CFER */ goto unimplemented;
11127 case 0xb3b9: /* CFDR */ goto unimplemented;
11128 case 0xb3ba: /* CFXR */ goto unimplemented;
11129 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11130 ovl.fmt.RRE.r2); goto ok;
11131 case 0xb3c4: /* CEGR */ goto unimplemented;
11132 case 0xb3c5: /* CDGR */ goto unimplemented;
11133 case 0xb3c6: /* CXGR */ goto unimplemented;
11134 case 0xb3c8: /* CGER */ goto unimplemented;
11135 case 0xb3c9: /* CGDR */ goto unimplemented;
11136 case 0xb3ca: /* CGXR */ goto unimplemented;
11137 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11138 ovl.fmt.RRE.r2); goto ok;
11139 case 0xb3d0: /* MDTR */ goto unimplemented;
11140 case 0xb3d1: /* DDTR */ goto unimplemented;
11141 case 0xb3d2: /* ADTR */ goto unimplemented;
11142 case 0xb3d3: /* SDTR */ goto unimplemented;
11143 case 0xb3d4: /* LDETR */ goto unimplemented;
11144 case 0xb3d5: /* LEDTR */ goto unimplemented;
11145 case 0xb3d6: /* LTDTR */ goto unimplemented;
11146 case 0xb3d7: /* FIDTR */ goto unimplemented;
11147 case 0xb3d8: /* MXTR */ goto unimplemented;
11148 case 0xb3d9: /* DXTR */ goto unimplemented;
11149 case 0xb3da: /* AXTR */ goto unimplemented;
11150 case 0xb3db: /* SXTR */ goto unimplemented;
11151 case 0xb3dc: /* LXDTR */ goto unimplemented;
11152 case 0xb3dd: /* LDXTR */ goto unimplemented;
11153 case 0xb3de: /* LTXTR */ goto unimplemented;
11154 case 0xb3df: /* FIXTR */ goto unimplemented;
11155 case 0xb3e0: /* KDTR */ goto unimplemented;
11156 case 0xb3e1: /* CGDTR */ goto unimplemented;
11157 case 0xb3e2: /* CUDTR */ goto unimplemented;
11158 case 0xb3e3: /* CSDTR */ goto unimplemented;
11159 case 0xb3e4: /* CDTR */ goto unimplemented;
11160 case 0xb3e5: /* EEDTR */ goto unimplemented;
11161 case 0xb3e7: /* ESDTR */ goto unimplemented;
11162 case 0xb3e8: /* KXTR */ goto unimplemented;
11163 case 0xb3e9: /* CGXTR */ goto unimplemented;
11164 case 0xb3ea: /* CUXTR */ goto unimplemented;
11165 case 0xb3eb: /* CSXTR */ goto unimplemented;
11166 case 0xb3ec: /* CXTR */ goto unimplemented;
11167 case 0xb3ed: /* EEXTR */ goto unimplemented;
11168 case 0xb3ef: /* ESXTR */ goto unimplemented;
11169 case 0xb3f1: /* CDGTR */ goto unimplemented;
11170 case 0xb3f2: /* CDUTR */ goto unimplemented;
11171 case 0xb3f3: /* CDSTR */ goto unimplemented;
11172 case 0xb3f4: /* CEDTR */ goto unimplemented;
11173 case 0xb3f5: /* QADTR */ goto unimplemented;
11174 case 0xb3f6: /* IEDTR */ goto unimplemented;
11175 case 0xb3f7: /* RRDTR */ goto unimplemented;
11176 case 0xb3f9: /* CXGTR */ goto unimplemented;
11177 case 0xb3fa: /* CXUTR */ goto unimplemented;
11178 case 0xb3fb: /* CXSTR */ goto unimplemented;
11179 case 0xb3fc: /* CEXTR */ goto unimplemented;
11180 case 0xb3fd: /* QAXTR */ goto unimplemented;
11181 case 0xb3fe: /* IEXTR */ goto unimplemented;
11182 case 0xb3ff: /* RRXTR */ goto unimplemented;
11183 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11184 ovl.fmt.RRE.r2); goto ok;
11185 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11186 ovl.fmt.RRE.r2); goto ok;
11187 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11188 ovl.fmt.RRE.r2); goto ok;
11189 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11190 ovl.fmt.RRE.r2); goto ok;
11191 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11192 ovl.fmt.RRE.r2); goto ok;
11193 case 0xb905: /* LURAG */ goto unimplemented;
11194 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11195 ovl.fmt.RRE.r2); goto ok;
11196 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11197 ovl.fmt.RRE.r2); goto ok;
11198 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11199 ovl.fmt.RRE.r2); goto ok;
11200 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11201 ovl.fmt.RRE.r2); goto ok;
11202 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11203 ovl.fmt.RRE.r2); goto ok;
11204 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11205 ovl.fmt.RRE.r2); goto ok;
11206 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11207 ovl.fmt.RRE.r2); goto ok;
11208 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11209 ovl.fmt.RRE.r2); goto ok;
11210 case 0xb90e: /* EREGG */ goto unimplemented;
11211 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11212 ovl.fmt.RRE.r2); goto ok;
11213 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11214 ovl.fmt.RRE.r2); goto ok;
11215 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11216 ovl.fmt.RRE.r2); goto ok;
11217 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11218 ovl.fmt.RRE.r2); goto ok;
11219 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11220 ovl.fmt.RRE.r2); goto ok;
11221 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11222 ovl.fmt.RRE.r2); goto ok;
11223 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11224 ovl.fmt.RRE.r2); goto ok;
11225 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11226 ovl.fmt.RRE.r2); goto ok;
11227 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11228 ovl.fmt.RRE.r2); goto ok;
11229 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11230 ovl.fmt.RRE.r2); goto ok;
11231 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11232 ovl.fmt.RRE.r2); goto ok;
11233 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11234 ovl.fmt.RRE.r2); goto ok;
11235 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11236 ovl.fmt.RRE.r2); goto ok;
11237 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11238 ovl.fmt.RRE.r2); goto ok;
11239 case 0xb91e: /* KMAC */ goto unimplemented;
11240 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11241 ovl.fmt.RRE.r2); goto ok;
11242 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11243 ovl.fmt.RRE.r2); goto ok;
11244 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11245 ovl.fmt.RRE.r2); goto ok;
11246 case 0xb925: /* STURG */ goto unimplemented;
11247 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11248 ovl.fmt.RRE.r2); goto ok;
11249 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11250 ovl.fmt.RRE.r2); goto ok;
11251 case 0xb928: /* PCKMO */ goto unimplemented;
11252 case 0xb92b: /* KMO */ goto unimplemented;
11253 case 0xb92c: /* PCC */ goto unimplemented;
11254 case 0xb92d: /* KMCTR */ goto unimplemented;
11255 case 0xb92e: /* KM */ goto unimplemented;
11256 case 0xb92f: /* KMC */ goto unimplemented;
11257 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11258 ovl.fmt.RRE.r2); goto ok;
11259 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11260 ovl.fmt.RRE.r2); goto ok;
11261 case 0xb93e: /* KIMD */ goto unimplemented;
11262 case 0xb93f: /* KLMD */ goto unimplemented;
11263 case 0xb941: /* CFDTR */ goto unimplemented;
11264 case 0xb942: /* CLGDTR */ goto unimplemented;
11265 case 0xb943: /* CLFDTR */ goto unimplemented;
11266 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11267 ovl.fmt.RRE.r2); goto ok;
11268 case 0xb949: /* CFXTR */ goto unimplemented;
11269 case 0xb94a: /* CLGXTR */ goto unimplemented;
11270 case 0xb94b: /* CLFXTR */ goto unimplemented;
11271 case 0xb951: /* CDFTR */ goto unimplemented;
11272 case 0xb952: /* CDLGTR */ goto unimplemented;
11273 case 0xb953: /* CDLFTR */ goto unimplemented;
11274 case 0xb959: /* CXFTR */ goto unimplemented;
11275 case 0xb95a: /* CXLGTR */ goto unimplemented;
11276 case 0xb95b: /* CXLFTR */ goto unimplemented;
11277 case 0xb960: /* CGRT */ goto unimplemented;
11278 case 0xb961: /* CLGRT */ goto unimplemented;
11279 case 0xb972: /* CRT */ goto unimplemented;
11280 case 0xb973: /* CLRT */ goto unimplemented;
11281 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11282 ovl.fmt.RRE.r2); goto ok;
11283 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11284 ovl.fmt.RRE.r2); goto ok;
11285 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11286 ovl.fmt.RRE.r2); goto ok;
11287 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11288 ovl.fmt.RRE.r2); goto ok;
11289 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11290 ovl.fmt.RRE.r2); goto ok;
11291 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11292 ovl.fmt.RRE.r2); goto ok;
11293 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11294 ovl.fmt.RRE.r2); goto ok;
11295 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11296 ovl.fmt.RRE.r2); goto ok;
11297 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11298 ovl.fmt.RRE.r2); goto ok;
11299 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11300 ovl.fmt.RRE.r2); goto ok;
11301 case 0xb98a: /* CSPG */ goto unimplemented;
11302 case 0xb98d: /* EPSW */ goto unimplemented;
11303 case 0xb98e: /* IDTE */ goto unimplemented;
11304 case 0xb990: /* TRTT */ goto unimplemented;
11305 case 0xb991: /* TRTO */ goto unimplemented;
11306 case 0xb992: /* TROT */ goto unimplemented;
11307 case 0xb993: /* TROO */ goto unimplemented;
11308 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11309 ovl.fmt.RRE.r2); goto ok;
11310 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11311 ovl.fmt.RRE.r2); goto ok;
11312 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11313 ovl.fmt.RRE.r2); goto ok;
11314 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11315 ovl.fmt.RRE.r2); goto ok;
11316 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11317 ovl.fmt.RRE.r2); goto ok;
11318 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11319 ovl.fmt.RRE.r2); goto ok;
11320 case 0xb99a: /* EPAIR */ goto unimplemented;
11321 case 0xb99b: /* ESAIR */ goto unimplemented;
11322 case 0xb99d: /* ESEA */ goto unimplemented;
11323 case 0xb99e: /* PTI */ goto unimplemented;
11324 case 0xb99f: /* SSAIR */ goto unimplemented;
11325 case 0xb9a2: /* PTF */ goto unimplemented;
11326 case 0xb9aa: /* LPTEA */ goto unimplemented;
11327 case 0xb9ae: /* RRBM */ goto unimplemented;
11328 case 0xb9af: /* PFMF */ goto unimplemented;
11329 case 0xb9b0: /* CU14 */ goto unimplemented;
11330 case 0xb9b1: /* CU24 */ goto unimplemented;
11331 case 0xb9b2: /* CU41 */ goto unimplemented;
11332 case 0xb9b3: /* CU42 */ goto unimplemented;
11333 case 0xb9bd: /* TRTRE */ goto unimplemented;
11334 case 0xb9be: /* SRSTU */ goto unimplemented;
11335 case 0xb9bf: /* TRTE */ goto unimplemented;
11336 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11337 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11338 goto ok;
11339 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11340 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11341 goto ok;
11342 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11343 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11344 goto ok;
11345 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11346 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11347 goto ok;
11348 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11349 ovl.fmt.RRE.r2); goto ok;
11350 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11351 ovl.fmt.RRE.r2); goto ok;
11352 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11353 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11354 goto ok;
11355 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11356 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11357 goto ok;
11358 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11359 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11360 goto ok;
11361 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11362 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11363 goto ok;
11364 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11365 ovl.fmt.RRE.r2); goto ok;
11366 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11367 ovl.fmt.RRE.r2); goto ok;
11368 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011369 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11370 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11371 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011372 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11373 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11374 goto ok;
11375 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11376 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11377 goto ok;
11378 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11379 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11380 goto ok;
11381 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11382 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11383 goto ok;
11384 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11385 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11386 goto ok;
11387 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11388 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11389 goto ok;
11390 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11391 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11392 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000011393 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
11394 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11395 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011396 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11397 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11398 goto ok;
11399 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11400 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11401 goto ok;
11402 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11403 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11404 goto ok;
11405 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11406 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11407 goto ok;
11408 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11409 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11410 goto ok;
11411 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11412 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11413 goto ok;
11414 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11415 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11416 goto ok;
11417 }
11418
11419 switch ((ovl.value & 0xff000000) >> 24) {
11420 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11421 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11422 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11423 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11424 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11425 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11426 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11427 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11428 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11429 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11430 case 0x45: /* BAL */ goto unimplemented;
11431 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11432 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11433 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11434 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11435 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11436 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11437 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11438 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11439 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11440 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11441 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11442 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11443 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11444 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11445 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11446 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11447 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11448 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11449 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11450 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11451 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11452 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11453 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11454 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11455 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11456 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11457 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11458 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11459 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11460 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11461 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11462 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11463 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11464 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11465 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11466 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11467 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11468 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11469 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11470 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11471 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11472 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11473 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11474 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11475 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11476 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11477 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11478 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11479 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11480 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11481 case 0x67: /* MXD */ goto unimplemented;
11482 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11483 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11484 case 0x69: /* CD */ goto unimplemented;
11485 case 0x6a: /* AD */ goto unimplemented;
11486 case 0x6b: /* SD */ goto unimplemented;
11487 case 0x6c: /* MD */ goto unimplemented;
11488 case 0x6d: /* DD */ goto unimplemented;
11489 case 0x6e: /* AW */ goto unimplemented;
11490 case 0x6f: /* SW */ goto unimplemented;
11491 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11492 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11493 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11494 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11495 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11496 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11497 case 0x79: /* CE */ goto unimplemented;
11498 case 0x7a: /* AE */ goto unimplemented;
11499 case 0x7b: /* SE */ goto unimplemented;
11500 case 0x7c: /* MDE */ goto unimplemented;
11501 case 0x7d: /* DE */ goto unimplemented;
11502 case 0x7e: /* AU */ goto unimplemented;
11503 case 0x7f: /* SU */ goto unimplemented;
11504 case 0x83: /* DIAG */ goto unimplemented;
11505 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11506 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11507 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11508 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11509 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11510 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11511 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11512 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11513 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11514 ovl.fmt.RS.d2); goto ok;
11515 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11516 ovl.fmt.RS.d2); goto ok;
11517 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11518 ovl.fmt.RS.d2); goto ok;
11519 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11520 ovl.fmt.RS.d2); goto ok;
11521 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11522 ovl.fmt.RS.d2); goto ok;
11523 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11524 ovl.fmt.RS.d2); goto ok;
11525 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11526 ovl.fmt.RS.d2); goto ok;
11527 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11528 ovl.fmt.RS.d2); goto ok;
11529 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11530 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11531 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11532 ovl.fmt.SI.d1); goto ok;
11533 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11534 ovl.fmt.SI.d1); goto ok;
11535 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11536 ovl.fmt.SI.d1); goto ok;
11537 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11538 ovl.fmt.SI.d1); goto ok;
11539 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11540 ovl.fmt.SI.d1); goto ok;
11541 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11542 ovl.fmt.SI.d1); goto ok;
11543 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11544 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11545 case 0x99: /* TRACE */ goto unimplemented;
11546 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11547 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11548 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11549 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11550 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11551 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11552 goto ok;
11553 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11554 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11555 goto ok;
11556 case 0xac: /* STNSM */ goto unimplemented;
11557 case 0xad: /* STOSM */ goto unimplemented;
11558 case 0xae: /* SIGP */ goto unimplemented;
11559 case 0xaf: /* MC */ goto unimplemented;
11560 case 0xb1: /* LRA */ goto unimplemented;
11561 case 0xb6: /* STCTL */ goto unimplemented;
11562 case 0xb7: /* LCTL */ goto unimplemented;
11563 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11564 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11565 case 0xbb: /* CDS */ goto unimplemented;
11566 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11567 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11568 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11569 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11570 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11571 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11572 }
11573
11574 return S390_DECODE_UNKNOWN_INSN;
11575
11576ok:
11577 return S390_DECODE_OK;
11578
11579unimplemented:
11580 return S390_DECODE_UNIMPLEMENTED_INSN;
11581}
11582
11583static s390_decode_t
11584s390_decode_6byte_and_irgen(UChar *bytes)
11585{
11586 typedef union {
11587 struct {
11588 unsigned int op1 : 8;
11589 unsigned int r1 : 4;
11590 unsigned int r3 : 4;
11591 unsigned int i2 : 16;
11592 unsigned int : 8;
11593 unsigned int op2 : 8;
11594 } RIE;
11595 struct {
11596 unsigned int op1 : 8;
11597 unsigned int r1 : 4;
11598 unsigned int r2 : 4;
11599 unsigned int i3 : 8;
11600 unsigned int i4 : 8;
11601 unsigned int i5 : 8;
11602 unsigned int op2 : 8;
11603 } RIE_RRUUU;
11604 struct {
11605 unsigned int op1 : 8;
11606 unsigned int r1 : 4;
11607 unsigned int : 4;
11608 unsigned int i2 : 16;
11609 unsigned int m3 : 4;
11610 unsigned int : 4;
11611 unsigned int op2 : 8;
11612 } RIEv1;
11613 struct {
11614 unsigned int op1 : 8;
11615 unsigned int r1 : 4;
11616 unsigned int r2 : 4;
11617 unsigned int i4 : 16;
11618 unsigned int m3 : 4;
11619 unsigned int : 4;
11620 unsigned int op2 : 8;
11621 } RIE_RRPU;
11622 struct {
11623 unsigned int op1 : 8;
11624 unsigned int r1 : 4;
11625 unsigned int m3 : 4;
11626 unsigned int i4 : 16;
11627 unsigned int i2 : 8;
11628 unsigned int op2 : 8;
11629 } RIEv3;
11630 struct {
11631 unsigned int op1 : 8;
11632 unsigned int r1 : 4;
11633 unsigned int op2 : 4;
11634 unsigned int i2 : 32;
11635 } RIL;
11636 struct {
11637 unsigned int op1 : 8;
11638 unsigned int r1 : 4;
11639 unsigned int m3 : 4;
11640 unsigned int b4 : 4;
11641 unsigned int d4 : 12;
11642 unsigned int i2 : 8;
11643 unsigned int op2 : 8;
11644 } RIS;
11645 struct {
11646 unsigned int op1 : 8;
11647 unsigned int r1 : 4;
11648 unsigned int r2 : 4;
11649 unsigned int b4 : 4;
11650 unsigned int d4 : 12;
11651 unsigned int m3 : 4;
11652 unsigned int : 4;
11653 unsigned int op2 : 8;
11654 } RRS;
11655 struct {
11656 unsigned int op1 : 8;
11657 unsigned int l1 : 4;
11658 unsigned int : 4;
11659 unsigned int b1 : 4;
11660 unsigned int d1 : 12;
11661 unsigned int : 8;
11662 unsigned int op2 : 8;
11663 } RSL;
11664 struct {
11665 unsigned int op1 : 8;
11666 unsigned int r1 : 4;
11667 unsigned int r3 : 4;
11668 unsigned int b2 : 4;
11669 unsigned int dl2 : 12;
11670 unsigned int dh2 : 8;
11671 unsigned int op2 : 8;
11672 } RSY;
11673 struct {
11674 unsigned int op1 : 8;
11675 unsigned int r1 : 4;
11676 unsigned int x2 : 4;
11677 unsigned int b2 : 4;
11678 unsigned int d2 : 12;
11679 unsigned int : 8;
11680 unsigned int op2 : 8;
11681 } RXE;
11682 struct {
11683 unsigned int op1 : 8;
11684 unsigned int r3 : 4;
11685 unsigned int x2 : 4;
11686 unsigned int b2 : 4;
11687 unsigned int d2 : 12;
11688 unsigned int r1 : 4;
11689 unsigned int : 4;
11690 unsigned int op2 : 8;
11691 } RXF;
11692 struct {
11693 unsigned int op1 : 8;
11694 unsigned int r1 : 4;
11695 unsigned int x2 : 4;
11696 unsigned int b2 : 4;
11697 unsigned int dl2 : 12;
11698 unsigned int dh2 : 8;
11699 unsigned int op2 : 8;
11700 } RXY;
11701 struct {
11702 unsigned int op1 : 8;
11703 unsigned int i2 : 8;
11704 unsigned int b1 : 4;
11705 unsigned int dl1 : 12;
11706 unsigned int dh1 : 8;
11707 unsigned int op2 : 8;
11708 } SIY;
11709 struct {
11710 unsigned int op : 8;
11711 unsigned int l : 8;
11712 unsigned int b1 : 4;
11713 unsigned int d1 : 12;
11714 unsigned int b2 : 4;
11715 unsigned int d2 : 12;
11716 } SS;
11717 struct {
11718 unsigned int op : 8;
11719 unsigned int l1 : 4;
11720 unsigned int l2 : 4;
11721 unsigned int b1 : 4;
11722 unsigned int d1 : 12;
11723 unsigned int b2 : 4;
11724 unsigned int d2 : 12;
11725 } SS_LLRDRD;
11726 struct {
11727 unsigned int op : 8;
11728 unsigned int r1 : 4;
11729 unsigned int r3 : 4;
11730 unsigned int b2 : 4;
11731 unsigned int d2 : 12;
11732 unsigned int b4 : 4;
11733 unsigned int d4 : 12;
11734 } SS_RRRDRD2;
11735 struct {
11736 unsigned int op : 16;
11737 unsigned int b1 : 4;
11738 unsigned int d1 : 12;
11739 unsigned int b2 : 4;
11740 unsigned int d2 : 12;
11741 } SSE;
11742 struct {
11743 unsigned int op1 : 8;
11744 unsigned int r3 : 4;
11745 unsigned int op2 : 4;
11746 unsigned int b1 : 4;
11747 unsigned int d1 : 12;
11748 unsigned int b2 : 4;
11749 unsigned int d2 : 12;
11750 } SSF;
11751 struct {
11752 unsigned int op : 16;
11753 unsigned int b1 : 4;
11754 unsigned int d1 : 12;
11755 unsigned int i2 : 16;
11756 } SIL;
11757 } formats;
11758 union {
11759 formats fmt;
11760 ULong value;
11761 } ovl;
11762
11763 vassert(sizeof(formats) == 6);
11764
11765 ((char *)(&ovl.value))[0] = bytes[0];
11766 ((char *)(&ovl.value))[1] = bytes[1];
11767 ((char *)(&ovl.value))[2] = bytes[2];
11768 ((char *)(&ovl.value))[3] = bytes[3];
11769 ((char *)(&ovl.value))[4] = bytes[4];
11770 ((char *)(&ovl.value))[5] = bytes[5];
11771 ((char *)(&ovl.value))[6] = 0x0;
11772 ((char *)(&ovl.value))[7] = 0x0;
11773
11774 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
11775 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
11776 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11777 ovl.fmt.RXY.dl2,
11778 ovl.fmt.RXY.dh2); goto ok;
11779 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
11780 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
11781 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11782 ovl.fmt.RXY.dl2,
11783 ovl.fmt.RXY.dh2); goto ok;
11784 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
11785 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11786 ovl.fmt.RXY.dl2,
11787 ovl.fmt.RXY.dh2); goto ok;
11788 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
11789 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11790 ovl.fmt.RXY.dl2,
11791 ovl.fmt.RXY.dh2); goto ok;
11792 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
11793 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11794 ovl.fmt.RXY.dl2,
11795 ovl.fmt.RXY.dh2); goto ok;
11796 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
11797 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11798 ovl.fmt.RXY.dl2,
11799 ovl.fmt.RXY.dh2); goto ok;
11800 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
11801 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11802 ovl.fmt.RXY.dl2,
11803 ovl.fmt.RXY.dh2); goto ok;
11804 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
11805 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11806 ovl.fmt.RXY.dl2,
11807 ovl.fmt.RXY.dh2); goto ok;
11808 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
11809 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11810 ovl.fmt.RXY.dl2,
11811 ovl.fmt.RXY.dh2); goto ok;
11812 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
11813 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
11814 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11815 ovl.fmt.RXY.dl2,
11816 ovl.fmt.RXY.dh2); goto ok;
11817 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
11818 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11819 ovl.fmt.RXY.dl2,
11820 ovl.fmt.RXY.dh2); goto ok;
11821 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
11822 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
11823 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11824 ovl.fmt.RXY.dl2,
11825 ovl.fmt.RXY.dh2); goto ok;
11826 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
11827 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11828 ovl.fmt.RXY.dl2,
11829 ovl.fmt.RXY.dh2); goto ok;
11830 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
11831 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11832 ovl.fmt.RXY.dl2,
11833 ovl.fmt.RXY.dh2); goto ok;
11834 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
11835 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11836 ovl.fmt.RXY.dl2,
11837 ovl.fmt.RXY.dh2); goto ok;
11838 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
11839 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11840 ovl.fmt.RXY.dl2,
11841 ovl.fmt.RXY.dh2); goto ok;
11842 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
11843 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11844 ovl.fmt.RXY.dl2,
11845 ovl.fmt.RXY.dh2); goto ok;
11846 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
11847 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11848 ovl.fmt.RXY.dl2,
11849 ovl.fmt.RXY.dh2); goto ok;
11850 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
11851 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11852 ovl.fmt.RXY.dl2,
11853 ovl.fmt.RXY.dh2); goto ok;
11854 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
11855 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11856 ovl.fmt.RXY.dl2,
11857 ovl.fmt.RXY.dh2); goto ok;
11858 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
11859 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11860 ovl.fmt.RXY.dl2,
11861 ovl.fmt.RXY.dh2); goto ok;
11862 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
11863 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11864 ovl.fmt.RXY.dl2,
11865 ovl.fmt.RXY.dh2); goto ok;
11866 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
11867 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11868 ovl.fmt.RXY.dl2,
11869 ovl.fmt.RXY.dh2); goto ok;
11870 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
11871 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11872 ovl.fmt.RXY.dl2,
11873 ovl.fmt.RXY.dh2); goto ok;
11874 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
11875 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11876 ovl.fmt.RXY.dl2,
11877 ovl.fmt.RXY.dh2); goto ok;
11878 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
11879 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11880 ovl.fmt.RXY.dl2,
11881 ovl.fmt.RXY.dh2); goto ok;
11882 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
11883 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11884 ovl.fmt.RXY.dl2,
11885 ovl.fmt.RXY.dh2); goto ok;
11886 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
11887 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
11888 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11889 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11890 ovl.fmt.RXY.dh2); goto ok;
11891 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
11892 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11893 ovl.fmt.RXY.dl2,
11894 ovl.fmt.RXY.dh2); goto ok;
11895 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
11896 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11897 ovl.fmt.RXY.dl2,
11898 ovl.fmt.RXY.dh2); goto ok;
11899 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
11900 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11901 ovl.fmt.RXY.dl2,
11902 ovl.fmt.RXY.dh2); goto ok;
11903 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
11904 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11905 ovl.fmt.RXY.dl2,
11906 ovl.fmt.RXY.dh2); goto ok;
11907 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
11908 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11909 ovl.fmt.RXY.dl2,
11910 ovl.fmt.RXY.dh2); goto ok;
11911 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
11912 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11913 ovl.fmt.RXY.dl2,
11914 ovl.fmt.RXY.dh2); goto ok;
11915 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
11916 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11917 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11918 ovl.fmt.RXY.dh2); goto ok;
11919 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
11920 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11921 ovl.fmt.RXY.dl2,
11922 ovl.fmt.RXY.dh2); goto ok;
11923 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
11924 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11925 ovl.fmt.RXY.dl2,
11926 ovl.fmt.RXY.dh2); goto ok;
11927 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
11928 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11929 ovl.fmt.RXY.dl2,
11930 ovl.fmt.RXY.dh2); goto ok;
11931 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
11932 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11933 ovl.fmt.RXY.dl2,
11934 ovl.fmt.RXY.dh2); goto ok;
11935 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
11936 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11937 ovl.fmt.RXY.dl2,
11938 ovl.fmt.RXY.dh2); goto ok;
11939 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
11940 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11941 ovl.fmt.RXY.dl2,
11942 ovl.fmt.RXY.dh2); goto ok;
11943 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
11944 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11945 ovl.fmt.RXY.dl2,
11946 ovl.fmt.RXY.dh2); goto ok;
11947 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
11948 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11949 ovl.fmt.RXY.dl2,
11950 ovl.fmt.RXY.dh2); goto ok;
11951 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
11952 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11953 ovl.fmt.RXY.dl2,
11954 ovl.fmt.RXY.dh2); goto ok;
11955 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
11956 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11957 ovl.fmt.RXY.dl2,
11958 ovl.fmt.RXY.dh2); goto ok;
11959 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
11960 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11961 ovl.fmt.RXY.dl2,
11962 ovl.fmt.RXY.dh2); goto ok;
11963 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
11964 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11965 ovl.fmt.RXY.dl2,
11966 ovl.fmt.RXY.dh2); goto ok;
11967 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
11968 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11969 ovl.fmt.RXY.dl2,
11970 ovl.fmt.RXY.dh2); goto ok;
11971 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
11972 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11973 ovl.fmt.RXY.dl2,
11974 ovl.fmt.RXY.dh2); goto ok;
11975 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
11976 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11977 ovl.fmt.RXY.dl2,
11978 ovl.fmt.RXY.dh2); goto ok;
11979 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
11980 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11981 ovl.fmt.RXY.dl2,
11982 ovl.fmt.RXY.dh2); goto ok;
11983 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
11984 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11985 ovl.fmt.RXY.dl2,
11986 ovl.fmt.RXY.dh2); goto ok;
11987 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
11988 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11989 ovl.fmt.RXY.dl2,
11990 ovl.fmt.RXY.dh2); goto ok;
11991 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
11992 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11993 ovl.fmt.RXY.dl2,
11994 ovl.fmt.RXY.dh2); goto ok;
11995 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
11996 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11997 ovl.fmt.RXY.dl2,
11998 ovl.fmt.RXY.dh2); goto ok;
11999 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12000 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12001 ovl.fmt.RXY.dl2,
12002 ovl.fmt.RXY.dh2); goto ok;
12003 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12004 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12005 ovl.fmt.RXY.dl2,
12006 ovl.fmt.RXY.dh2); goto ok;
12007 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12008 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12009 ovl.fmt.RXY.dl2,
12010 ovl.fmt.RXY.dh2); goto ok;
12011 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12012 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12013 ovl.fmt.RXY.dl2,
12014 ovl.fmt.RXY.dh2); goto ok;
12015 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12016 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12017 ovl.fmt.RXY.dl2,
12018 ovl.fmt.RXY.dh2); goto ok;
12019 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12020 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12021 ovl.fmt.RXY.dl2,
12022 ovl.fmt.RXY.dh2); goto ok;
12023 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12024 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12025 ovl.fmt.RXY.dl2,
12026 ovl.fmt.RXY.dh2); goto ok;
12027 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12028 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12029 ovl.fmt.RXY.dl2,
12030 ovl.fmt.RXY.dh2); goto ok;
12031 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12032 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12033 ovl.fmt.RXY.dl2,
12034 ovl.fmt.RXY.dh2); goto ok;
12035 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12036 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12037 ovl.fmt.RXY.dl2,
12038 ovl.fmt.RXY.dh2); goto ok;
12039 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12040 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12041 ovl.fmt.RXY.dl2,
12042 ovl.fmt.RXY.dh2); goto ok;
12043 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12044 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12045 ovl.fmt.RXY.dl2,
12046 ovl.fmt.RXY.dh2); goto ok;
12047 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12048 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12049 ovl.fmt.RXY.dl2,
12050 ovl.fmt.RXY.dh2); goto ok;
12051 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12052 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12053 ovl.fmt.RXY.dl2,
12054 ovl.fmt.RXY.dh2); goto ok;
12055 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12056 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12057 ovl.fmt.RXY.dl2,
12058 ovl.fmt.RXY.dh2); goto ok;
12059 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12060 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12061 ovl.fmt.RXY.dl2,
12062 ovl.fmt.RXY.dh2); goto ok;
12063 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12064 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12065 ovl.fmt.RXY.dl2,
12066 ovl.fmt.RXY.dh2); goto ok;
12067 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12068 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12069 ovl.fmt.RXY.dl2,
12070 ovl.fmt.RXY.dh2); goto ok;
12071 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12072 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12073 ovl.fmt.RXY.dl2,
12074 ovl.fmt.RXY.dh2); goto ok;
12075 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12076 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12077 ovl.fmt.RXY.dl2,
12078 ovl.fmt.RXY.dh2); goto ok;
12079 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12080 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12081 ovl.fmt.RXY.dl2,
12082 ovl.fmt.RXY.dh2); goto ok;
12083 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12084 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12085 ovl.fmt.RXY.dl2,
12086 ovl.fmt.RXY.dh2); goto ok;
12087 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12088 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12089 ovl.fmt.RXY.dl2,
12090 ovl.fmt.RXY.dh2); goto ok;
12091 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12092 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12093 ovl.fmt.RXY.dl2,
12094 ovl.fmt.RXY.dh2); goto ok;
12095 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12096 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12097 ovl.fmt.RXY.dl2,
12098 ovl.fmt.RXY.dh2); goto ok;
12099 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12100 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12101 ovl.fmt.RXY.dl2,
12102 ovl.fmt.RXY.dh2); goto ok;
12103 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12104 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12105 ovl.fmt.RXY.dl2,
12106 ovl.fmt.RXY.dh2); goto ok;
12107 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12108 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12109 ovl.fmt.RXY.dl2,
12110 ovl.fmt.RXY.dh2); goto ok;
12111 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12112 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12113 ovl.fmt.RXY.dl2,
12114 ovl.fmt.RXY.dh2); goto ok;
12115 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12116 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12117 ovl.fmt.RXY.dl2,
12118 ovl.fmt.RXY.dh2); goto ok;
12119 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12120 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12121 ovl.fmt.RXY.dl2,
12122 ovl.fmt.RXY.dh2); goto ok;
12123 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12124 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12125 ovl.fmt.RXY.dl2,
12126 ovl.fmt.RXY.dh2); goto ok;
12127 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12128 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12129 ovl.fmt.RXY.dl2,
12130 ovl.fmt.RXY.dh2); goto ok;
12131 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12132 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12133 ovl.fmt.RSY.dl2,
12134 ovl.fmt.RSY.dh2); goto ok;
12135 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12136 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12137 ovl.fmt.RSY.dl2,
12138 ovl.fmt.RSY.dh2); goto ok;
12139 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12140 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12141 ovl.fmt.RSY.dl2,
12142 ovl.fmt.RSY.dh2); goto ok;
12143 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12144 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12145 ovl.fmt.RSY.dl2,
12146 ovl.fmt.RSY.dh2); goto ok;
12147 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12148 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12149 ovl.fmt.RSY.dl2,
12150 ovl.fmt.RSY.dh2); goto ok;
12151 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12152 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12153 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12154 ovl.fmt.RSY.dl2,
12155 ovl.fmt.RSY.dh2); goto ok;
12156 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12157 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12158 ovl.fmt.RSY.dl2,
12159 ovl.fmt.RSY.dh2); goto ok;
12160 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12161 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12162 ovl.fmt.RSY.dl2,
12163 ovl.fmt.RSY.dh2); goto ok;
12164 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12165 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12166 ovl.fmt.RSY.dl2,
12167 ovl.fmt.RSY.dh2); goto ok;
12168 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12169 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12170 ovl.fmt.RSY.dl2,
12171 ovl.fmt.RSY.dh2); goto ok;
12172 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12173 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12174 ovl.fmt.RSY.dl2,
12175 ovl.fmt.RSY.dh2); goto ok;
12176 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12177 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12178 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12179 ovl.fmt.RSY.dl2,
12180 ovl.fmt.RSY.dh2); goto ok;
12181 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12182 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12183 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12184 ovl.fmt.RSY.dh2); goto ok;
12185 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12186 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12187 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12188 ovl.fmt.RSY.dh2); goto ok;
12189 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12190 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12191 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12192 ovl.fmt.RSY.dl2,
12193 ovl.fmt.RSY.dh2); goto ok;
12194 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12195 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12196 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12197 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12198 ovl.fmt.RSY.dl2,
12199 ovl.fmt.RSY.dh2); goto ok;
12200 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12201 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12202 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12203 ovl.fmt.RSY.dh2); goto ok;
12204 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12205 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12206 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12207 ovl.fmt.SIY.dh1); goto ok;
12208 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12209 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12210 ovl.fmt.SIY.dh1); goto ok;
12211 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12212 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12213 ovl.fmt.SIY.dh1); goto ok;
12214 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12215 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12216 ovl.fmt.SIY.dh1); goto ok;
12217 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12218 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12219 ovl.fmt.SIY.dh1); goto ok;
12220 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12221 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12222 ovl.fmt.SIY.dh1); goto ok;
12223 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12224 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12225 ovl.fmt.SIY.dh1); goto ok;
12226 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12227 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12228 ovl.fmt.SIY.dh1); goto ok;
12229 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12230 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12231 ovl.fmt.SIY.dh1); goto ok;
12232 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12233 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12234 ovl.fmt.SIY.dh1); goto ok;
12235 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12236 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12237 ovl.fmt.RSY.dl2,
12238 ovl.fmt.RSY.dh2); goto ok;
12239 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12240 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12241 ovl.fmt.RSY.dl2,
12242 ovl.fmt.RSY.dh2); goto ok;
12243 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12244 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12245 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12246 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12247 ovl.fmt.RSY.dl2,
12248 ovl.fmt.RSY.dh2); goto ok;
12249 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12250 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12251 ovl.fmt.RSY.dl2,
12252 ovl.fmt.RSY.dh2); goto ok;
12253 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12254 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12255 ovl.fmt.RSY.dl2,
12256 ovl.fmt.RSY.dh2); goto ok;
12257 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12258 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12259 ovl.fmt.RSY.dl2,
12260 ovl.fmt.RSY.dh2); goto ok;
12261 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12262 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12263 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12264 ovl.fmt.RSY.dh2); goto ok;
12265 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12266 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12267 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12268 ovl.fmt.RSY.dl2,
12269 ovl.fmt.RSY.dh2); goto ok;
12270 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12271 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12272 ovl.fmt.RSY.dl2,
12273 ovl.fmt.RSY.dh2); goto ok;
12274 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12275 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12276 ovl.fmt.RSY.dl2,
12277 ovl.fmt.RSY.dh2); goto ok;
12278 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12279 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12280 ovl.fmt.RSY.dl2,
12281 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012282 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12283 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12284 ovl.fmt.RSY.dl2,
12285 ovl.fmt.RSY.dh2,
12286 S390_XMNM_LOCG); goto ok;
12287 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12288 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12289 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12290 ovl.fmt.RSY.dh2,
12291 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012292 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12293 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12294 ovl.fmt.RSY.dl2,
12295 ovl.fmt.RSY.dh2); goto ok;
12296 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12297 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12298 ovl.fmt.RSY.dl2,
12299 ovl.fmt.RSY.dh2); goto ok;
12300 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12301 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12302 ovl.fmt.RSY.dl2,
12303 ovl.fmt.RSY.dh2); goto ok;
12304 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12305 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12306 ovl.fmt.RSY.dl2,
12307 ovl.fmt.RSY.dh2); goto ok;
12308 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12309 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12310 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12311 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012312 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12313 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12314 ovl.fmt.RSY.dl2,
12315 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12316 goto ok;
12317 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12318 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12319 ovl.fmt.RSY.dl2,
12320 ovl.fmt.RSY.dh2,
12321 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012322 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12323 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12324 ovl.fmt.RSY.dl2,
12325 ovl.fmt.RSY.dh2); goto ok;
12326 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12327 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12328 ovl.fmt.RSY.dl2,
12329 ovl.fmt.RSY.dh2); goto ok;
12330 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12331 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12332 ovl.fmt.RSY.dl2,
12333 ovl.fmt.RSY.dh2); goto ok;
12334 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12335 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12336 ovl.fmt.RSY.dl2,
12337 ovl.fmt.RSY.dh2); goto ok;
12338 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12339 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12340 ovl.fmt.RSY.dl2,
12341 ovl.fmt.RSY.dh2); goto ok;
12342 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12343 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12344 goto ok;
12345 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12346 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12347 goto ok;
12348 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12349 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12350 ovl.fmt.RIE_RRUUU.r1,
12351 ovl.fmt.RIE_RRUUU.r2,
12352 ovl.fmt.RIE_RRUUU.i3,
12353 ovl.fmt.RIE_RRUUU.i4,
12354 ovl.fmt.RIE_RRUUU.i5);
12355 goto ok;
12356 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12357 ovl.fmt.RIE_RRUUU.r1,
12358 ovl.fmt.RIE_RRUUU.r2,
12359 ovl.fmt.RIE_RRUUU.i3,
12360 ovl.fmt.RIE_RRUUU.i4,
12361 ovl.fmt.RIE_RRUUU.i5);
12362 goto ok;
12363 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12364 ovl.fmt.RIE_RRUUU.r1,
12365 ovl.fmt.RIE_RRUUU.r2,
12366 ovl.fmt.RIE_RRUUU.i3,
12367 ovl.fmt.RIE_RRUUU.i4,
12368 ovl.fmt.RIE_RRUUU.i5);
12369 goto ok;
12370 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12371 ovl.fmt.RIE_RRUUU.r1,
12372 ovl.fmt.RIE_RRUUU.r2,
12373 ovl.fmt.RIE_RRUUU.i3,
12374 ovl.fmt.RIE_RRUUU.i4,
12375 ovl.fmt.RIE_RRUUU.i5);
12376 goto ok;
12377 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12378 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12379 ovl.fmt.RIE_RRPU.r1,
12380 ovl.fmt.RIE_RRPU.r2,
12381 ovl.fmt.RIE_RRPU.i4,
12382 ovl.fmt.RIE_RRPU.m3); goto ok;
12383 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12384 ovl.fmt.RIE_RRPU.r1,
12385 ovl.fmt.RIE_RRPU.r2,
12386 ovl.fmt.RIE_RRPU.i4,
12387 ovl.fmt.RIE_RRPU.m3); goto ok;
12388 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12389 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12390 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12391 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12392 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12393 ovl.fmt.RIE_RRPU.r1,
12394 ovl.fmt.RIE_RRPU.r2,
12395 ovl.fmt.RIE_RRPU.i4,
12396 ovl.fmt.RIE_RRPU.m3); goto ok;
12397 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12398 ovl.fmt.RIE_RRPU.r1,
12399 ovl.fmt.RIE_RRPU.r2,
12400 ovl.fmt.RIE_RRPU.i4,
12401 ovl.fmt.RIE_RRPU.m3); goto ok;
12402 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12403 ovl.fmt.RIEv3.r1,
12404 ovl.fmt.RIEv3.m3,
12405 ovl.fmt.RIEv3.i4,
12406 ovl.fmt.RIEv3.i2); goto ok;
12407 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12408 ovl.fmt.RIEv3.r1,
12409 ovl.fmt.RIEv3.m3,
12410 ovl.fmt.RIEv3.i4,
12411 ovl.fmt.RIEv3.i2); goto ok;
12412 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12413 ovl.fmt.RIEv3.r1,
12414 ovl.fmt.RIEv3.m3,
12415 ovl.fmt.RIEv3.i4,
12416 ovl.fmt.RIEv3.i2); goto ok;
12417 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12418 ovl.fmt.RIEv3.r1,
12419 ovl.fmt.RIEv3.m3,
12420 ovl.fmt.RIEv3.i4,
12421 ovl.fmt.RIEv3.i2); goto ok;
12422 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12423 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12424 goto ok;
12425 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12426 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12427 ovl.fmt.RIE.i2); goto ok;
12428 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12429 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12430 ovl.fmt.RIE.i2); goto ok;
12431 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12432 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12433 ovl.fmt.RIE.i2); goto ok;
12434 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12435 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12436 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12437 goto ok;
12438 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12439 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12440 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12441 goto ok;
12442 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12443 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12444 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12445 goto ok;
12446 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12447 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12448 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12449 goto ok;
12450 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12451 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12452 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12453 ovl.fmt.RIS.i2); goto ok;
12454 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12455 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12456 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12457 ovl.fmt.RIS.i2); goto ok;
12458 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12459 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12460 ovl.fmt.RIS.d4,
12461 ovl.fmt.RIS.i2); goto ok;
12462 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12463 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12464 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12465 ovl.fmt.RIS.i2); goto ok;
12466 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12467 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12468 ovl.fmt.RXE.d2); goto ok;
12469 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12470 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12471 ovl.fmt.RXE.d2); goto ok;
12472 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12473 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12474 ovl.fmt.RXE.d2); goto ok;
12475 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12476 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12477 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12478 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12479 ovl.fmt.RXE.d2); goto ok;
12480 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12481 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12482 ovl.fmt.RXE.d2); goto ok;
12483 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12484 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12485 ovl.fmt.RXE.d2); goto ok;
12486 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12487 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12488 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12489 ovl.fmt.RXE.d2); goto ok;
12490 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12491 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12492 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12493 ovl.fmt.RXF.r1); goto ok;
12494 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12495 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12496 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12497 ovl.fmt.RXF.r1); goto ok;
12498 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12499 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12500 ovl.fmt.RXE.d2); goto ok;
12501 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12502 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12503 ovl.fmt.RXE.d2); goto ok;
12504 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12505 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12506 ovl.fmt.RXE.d2); goto ok;
12507 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12508 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12509 ovl.fmt.RXE.d2); goto ok;
12510 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12511 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12512 ovl.fmt.RXE.d2); goto ok;
12513 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12514 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12515 ovl.fmt.RXE.d2); goto ok;
12516 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12517 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12518 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12519 ovl.fmt.RXE.d2); goto ok;
12520 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12521 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12522 ovl.fmt.RXE.d2); goto ok;
12523 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12524 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12525 ovl.fmt.RXE.d2); goto ok;
12526 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12527 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12528 ovl.fmt.RXE.d2); goto ok;
12529 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12530 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12531 ovl.fmt.RXE.d2); goto ok;
12532 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12533 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12534 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12535 ovl.fmt.RXF.r1); goto ok;
12536 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12537 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12538 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12539 ovl.fmt.RXF.r1); goto ok;
12540 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12541 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12542 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12543 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12544 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12545 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12546 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12547 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12548 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12549 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12550 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12551 case 0xed000000003bULL: /* MY */ goto unimplemented;
12552 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12553 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12554 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12555 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12556 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12557 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12558 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12559 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12560 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12561 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12562 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12563 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12564 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12565 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12566 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12567 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12568 ovl.fmt.RXY.dl2,
12569 ovl.fmt.RXY.dh2); goto ok;
12570 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12571 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12572 ovl.fmt.RXY.dl2,
12573 ovl.fmt.RXY.dh2); goto ok;
12574 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12575 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12576 ovl.fmt.RXY.dl2,
12577 ovl.fmt.RXY.dh2); goto ok;
12578 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12579 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12580 ovl.fmt.RXY.dl2,
12581 ovl.fmt.RXY.dh2); goto ok;
12582 }
12583
12584 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12585 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12586 ovl.fmt.RIL.i2); goto ok;
12587 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12588 ovl.fmt.RIL.i2); goto ok;
12589 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12590 ovl.fmt.RIL.i2); goto ok;
12591 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
12592 ovl.fmt.RIL.i2); goto ok;
12593 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
12594 ovl.fmt.RIL.i2); goto ok;
12595 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
12596 ovl.fmt.RIL.i2); goto ok;
12597 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
12598 ovl.fmt.RIL.i2); goto ok;
12599 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
12600 ovl.fmt.RIL.i2); goto ok;
12601 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
12602 ovl.fmt.RIL.i2); goto ok;
12603 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
12604 ovl.fmt.RIL.i2); goto ok;
12605 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
12606 ovl.fmt.RIL.i2); goto ok;
12607 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
12608 ovl.fmt.RIL.i2); goto ok;
12609 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
12610 ovl.fmt.RIL.i2); goto ok;
12611 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
12612 ovl.fmt.RIL.i2); goto ok;
12613 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
12614 ovl.fmt.RIL.i2); goto ok;
12615 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
12616 ovl.fmt.RIL.i2); goto ok;
12617 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
12618 ovl.fmt.RIL.i2); goto ok;
12619 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
12620 ovl.fmt.RIL.i2); goto ok;
12621 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
12622 ovl.fmt.RIL.i2); goto ok;
12623 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
12624 ovl.fmt.RIL.i2); goto ok;
12625 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
12626 ovl.fmt.RIL.i2); goto ok;
12627 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
12628 ovl.fmt.RIL.i2); goto ok;
12629 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
12630 ovl.fmt.RIL.i2); goto ok;
12631 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
12632 ovl.fmt.RIL.i2); goto ok;
12633 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
12634 ovl.fmt.RIL.i2); goto ok;
12635 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
12636 ovl.fmt.RIL.i2); goto ok;
12637 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
12638 ovl.fmt.RIL.i2); goto ok;
12639 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
12640 ovl.fmt.RIL.i2); goto ok;
12641 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
12642 ovl.fmt.RIL.i2); goto ok;
12643 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
12644 ovl.fmt.RIL.i2); goto ok;
12645 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
12646 ovl.fmt.RIL.i2); goto ok;
12647 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
12648 ovl.fmt.RIL.i2); goto ok;
12649 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
12650 ovl.fmt.RIL.i2); goto ok;
12651 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
12652 ovl.fmt.RIL.i2); goto ok;
12653 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
12654 ovl.fmt.RIL.i2); goto ok;
12655 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
12656 ovl.fmt.RIL.i2); goto ok;
12657 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
12658 ovl.fmt.RIL.i2); goto ok;
12659 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
12660 ovl.fmt.RIL.i2); goto ok;
12661 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
12662 ovl.fmt.RIL.i2); goto ok;
12663 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
12664 ovl.fmt.RIL.i2); goto ok;
12665 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
12666 ovl.fmt.RIL.i2); goto ok;
12667 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
12668 ovl.fmt.RIL.i2); goto ok;
12669 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
12670 ovl.fmt.RIL.i2); goto ok;
12671 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
12672 ovl.fmt.RIL.i2); goto ok;
12673 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
12674 ovl.fmt.RIL.i2); goto ok;
12675 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
12676 ovl.fmt.RIL.i2); goto ok;
12677 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
12678 ovl.fmt.RIL.i2); goto ok;
12679 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
12680 ovl.fmt.RIL.i2); goto ok;
12681 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
12682 ovl.fmt.RIL.i2); goto ok;
12683 case 0xc800ULL: /* MVCOS */ goto unimplemented;
12684 case 0xc801ULL: /* ECTG */ goto unimplemented;
12685 case 0xc802ULL: /* CSST */ goto unimplemented;
12686 case 0xc804ULL: /* LPD */ goto unimplemented;
12687 case 0xc805ULL: /* LPDG */ goto unimplemented;
12688 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
12689 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
12690 ovl.fmt.RIL.i2); goto ok;
12691 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
12692 ovl.fmt.RIL.i2); goto ok;
12693 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
12694 ovl.fmt.RIL.i2); goto ok;
12695 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
12696 ovl.fmt.RIL.i2); goto ok;
12697 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
12698 ovl.fmt.RIL.i2); goto ok;
12699 }
12700
12701 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
12702 case 0xd0ULL: /* TRTR */ goto unimplemented;
12703 case 0xd1ULL: /* MVN */ goto unimplemented;
12704 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
12705 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12706 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12707 case 0xd3ULL: /* MVZ */ goto unimplemented;
12708 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
12709 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12710 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12711 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
12712 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12713 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12714 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
12715 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12716 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000012717 case 0xd7ULL:
12718 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
12719 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
12720 else
12721 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
12722 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12723 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
12724 goto ok;
sewardj2019a972011-03-07 16:04:07 +000012725 case 0xd9ULL: /* MVCK */ goto unimplemented;
12726 case 0xdaULL: /* MVCP */ goto unimplemented;
12727 case 0xdbULL: /* MVCS */ goto unimplemented;
12728 case 0xdcULL: /* TR */ goto unimplemented;
12729 case 0xddULL: /* TRT */ goto unimplemented;
12730 case 0xdeULL: /* ED */ goto unimplemented;
12731 case 0xdfULL: /* EDMK */ goto unimplemented;
12732 case 0xe1ULL: /* PKU */ goto unimplemented;
12733 case 0xe2ULL: /* UNPKU */ goto unimplemented;
12734 case 0xe8ULL: /* MVCIN */ goto unimplemented;
12735 case 0xe9ULL: /* PKA */ goto unimplemented;
12736 case 0xeaULL: /* UNPKA */ goto unimplemented;
12737 case 0xeeULL: /* PLO */ goto unimplemented;
12738 case 0xefULL: /* LMD */ goto unimplemented;
12739 case 0xf0ULL: /* SRP */ goto unimplemented;
12740 case 0xf1ULL: /* MVO */ goto unimplemented;
12741 case 0xf2ULL: /* PACK */ goto unimplemented;
12742 case 0xf3ULL: /* UNPK */ goto unimplemented;
12743 case 0xf8ULL: /* ZAP */ goto unimplemented;
12744 case 0xf9ULL: /* CP */ goto unimplemented;
12745 case 0xfaULL: /* AP */ goto unimplemented;
12746 case 0xfbULL: /* SP */ goto unimplemented;
12747 case 0xfcULL: /* MP */ goto unimplemented;
12748 case 0xfdULL: /* DP */ goto unimplemented;
12749 }
12750
12751 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
12752 case 0xe500ULL: /* LASP */ goto unimplemented;
12753 case 0xe501ULL: /* TPROT */ goto unimplemented;
12754 case 0xe502ULL: /* STRAG */ goto unimplemented;
12755 case 0xe50eULL: /* MVCSK */ goto unimplemented;
12756 case 0xe50fULL: /* MVCDK */ goto unimplemented;
12757 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
12758 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12759 goto ok;
12760 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
12761 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12762 goto ok;
12763 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
12764 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12765 goto ok;
12766 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
12767 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12768 goto ok;
12769 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
12770 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12771 goto ok;
12772 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
12773 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12774 goto ok;
12775 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
12776 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12777 goto ok;
12778 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
12779 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12780 goto ok;
12781 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
12782 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12783 goto ok;
12784 }
12785
12786 return S390_DECODE_UNKNOWN_INSN;
12787
12788ok:
12789 return S390_DECODE_OK;
12790
12791unimplemented:
12792 return S390_DECODE_UNIMPLEMENTED_INSN;
12793}
12794
12795/* Handle "special" instructions. */
12796static s390_decode_t
12797s390_decode_special_and_irgen(UChar *bytes)
12798{
12799 s390_decode_t status = S390_DECODE_OK;
12800
12801 /* Got a "Special" instruction preamble. Which one is it? */
12802 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
12803 s390_irgen_client_request();
12804 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
12805 s390_irgen_guest_NRADDR();
12806 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
12807 s390_irgen_call_noredir();
12808 } else {
12809 /* We don't know what it is. */
12810 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
12811 }
12812
12813 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
12814
12815 return status;
12816}
12817
12818
12819/* Function returns # bytes that were decoded or 0 in case of failure */
12820UInt
12821s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
12822{
12823 s390_decode_t status;
12824
12825 dis_res = dres;
12826
12827 /* Spot the 8-byte preamble: 18ff lr r15,r15
12828 1811 lr r1,r1
12829 1822 lr r2,r2
12830 1833 lr r3,r3 */
12831 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
12832 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
12833 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
12834
12835 /* Handle special instruction that follows that preamble. */
12836 if (0) vex_printf("special function handling...\n");
12837 bytes += S390_SPECIAL_OP_PREAMBLE_SIZE;
12838 status = s390_decode_special_and_irgen(bytes);
12839 insn_length = S390_SPECIAL_OP_SIZE;
12840 } else {
12841 /* Handle normal instructions. */
12842 switch (insn_length) {
12843 case 2:
12844 status = s390_decode_2byte_and_irgen(bytes);
12845 break;
12846
12847 case 4:
12848 status = s390_decode_4byte_and_irgen(bytes);
12849 break;
12850
12851 case 6:
12852 status = s390_decode_6byte_and_irgen(bytes);
12853 break;
12854
12855 default:
12856 status = S390_DECODE_ERROR;
12857 break;
12858 }
12859 }
12860 /* next instruction is execute, stop here */
12861 if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) {
12862 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
12863 dis_res->whatNext = Dis_StopHere;
12864 }
12865
12866 if (status == S390_DECODE_OK) return insn_length; /* OK */
12867
12868 /* Decoding failed somehow */
12869 vex_printf("vex s390->IR: ");
12870 switch (status) {
12871 case S390_DECODE_UNKNOWN_INSN:
12872 vex_printf("unknown insn: ");
12873 break;
12874
12875 case S390_DECODE_UNIMPLEMENTED_INSN:
12876 vex_printf("unimplemented insn: ");
12877 break;
12878
12879 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
12880 vex_printf("unimplemented special insn: ");
12881 break;
12882
12883 default:
12884 case S390_DECODE_ERROR:
12885 vex_printf("decoding error: ");
12886 break;
12887 }
12888
12889 vex_printf("%02x%02x", bytes[0], bytes[1]);
12890 if (insn_length > 2) {
12891 vex_printf(" %02x%02x", bytes[2], bytes[3]);
12892 }
12893 if (insn_length > 4) {
12894 vex_printf(" %02x%02x", bytes[4], bytes[5]);
12895 }
12896 vex_printf("\n");
12897
12898 return 0; /* Failed */
12899}
12900
12901
12902/* Generate an IRExpr for an address. */
12903static __inline__ IRExpr *
12904mkaddr_expr(Addr64 addr)
12905{
12906 return IRExpr_Const(IRConst_U64(addr));
12907}
12908
12909
12910/* Disassemble a single instruction INSN into IR. */
12911static DisResult
12912disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64),
12913 void *callback_data)
12914{
12915 UChar byte;
12916 UInt insn_length;
12917 DisResult dres;
12918
12919 /* ---------------------------------------------------- */
12920 /* --- Compute instruction length -- */
12921 /* ---------------------------------------------------- */
12922
12923 /* Get the first byte of the insn. */
12924 byte = insn[0];
12925
12926 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
12927 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
12928 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
12929
12930 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
12931
12932 /* ---------------------------------------------------- */
12933 /* --- Initialise the DisResult data -- */
12934 /* ---------------------------------------------------- */
12935 dres.whatNext = Dis_Continue;
12936 dres.len = insn_length;
12937 dres.continueAt = 0;
12938
12939 /* fixs390: we should probably pass the resteer-function and the callback
12940 data. It's not needed for correctness but improves performance. */
12941
12942 /* Normal and special instruction handling starts here. */
12943 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
12944 /* All decode failures end up here. The decoder has already issued an
12945 error message.
12946 Tell the dispatcher that this insn cannot be decoded, and so has
12947 not been executed, and (is currently) the next to be executed.
12948 IA should be up-to-date since it made so at the start of each
12949 insn, but nevertheless be paranoid and update it again right
12950 now. */
12951 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
12952 mkaddr_expr(guest_IA_curr_instr)));
12953
sewardj15469da2011-04-13 15:10:16 +000012954 irsb->next = mkaddr_expr(guest_IA_next_instr);
sewardj2019a972011-03-07 16:04:07 +000012955 irsb->jumpkind = Ijk_NoDecode;
12956 dres.whatNext = Dis_StopHere;
12957 dres.len = 0;
12958
12959 return dres;
12960 }
12961
12962 return dres;
12963}
12964
12965
12966/*------------------------------------------------------------*/
12967/*--- Top-level fn ---*/
12968/*------------------------------------------------------------*/
12969
12970/* Disassemble a single instruction into IR. The instruction
12971 is located in host memory at &guest_code[delta]. */
12972
12973DisResult
12974disInstr_S390(IRSB *irsb_IN,
12975 Bool put_IP,
12976 Bool (*resteerOkFn)(void *, Addr64),
12977 Bool resteerCisOk,
12978 void *callback_opaque,
12979 UChar *guest_code,
12980 Long delta,
12981 Addr64 guest_IP,
12982 VexArch guest_arch,
12983 VexArchInfo *archinfo,
12984 VexAbiInfo *abiinfo,
12985 Bool host_bigendian)
12986{
12987 vassert(guest_arch == VexArchS390X);
12988
12989 /* The instruction decoder requires a big-endian machine. */
12990 vassert(host_bigendian == True);
12991
12992 /* Set globals (see top of this file) */
12993 guest_IA_curr_instr = guest_IP;
12994
12995 irsb = irsb_IN;
12996
12997 vassert(guest_arch == VexArchS390X);
12998
12999 /* We may be asked to update the guest IA before going further. */
13000 if (put_IP)
13001 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
13002 mkaddr_expr(guest_IA_curr_instr)));
13003
13004 return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque);
13005}
13006
13007/*---------------------------------------------------------------*/
13008/*--- end guest_s390_toIR.c ---*/
13009/*---------------------------------------------------------------*/