bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 1 | /* |
bart | 86562bd | 2009-02-16 19:43:56 +0000 | [diff] [blame] | 2 | This file is part of drd, a thread error detector. |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 3 | |
Elliott Hughes | ed39800 | 2017-06-21 14:41:24 -0700 | [diff] [blame^] | 4 | Copyright (C) 2006-2017 Bart Van Assche <bvanassche@acm.org>. |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 5 | |
| 6 | This program is free software; you can redistribute it and/or |
| 7 | modify it under the terms of the GNU General Public License as |
| 8 | published by the Free Software Foundation; either version 2 of the |
| 9 | License, or (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, but |
| 12 | WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 19 | 02111-1307, USA. |
| 20 | |
| 21 | The GNU General Public License is contained in the file COPYING. |
| 22 | */ |
| 23 | |
| 24 | |
| 25 | #include "drd_bitmap.h" |
| 26 | #include "drd_thread_bitmap.h" |
bart | 41b226c | 2009-02-14 16:55:19 +0000 | [diff] [blame] | 27 | #include "drd_vc.h" /* DRD_(vc_snprint)() */ |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 28 | |
| 29 | /* Include several source files here in order to allow the compiler to */ |
| 30 | /* do more inlining. */ |
| 31 | #include "drd_bitmap.c" |
| 32 | #include "drd_load_store.h" |
| 33 | #include "drd_segment.c" |
| 34 | #include "drd_thread.c" |
| 35 | #include "drd_vc.c" |
| 36 | #include "libvex_guest_offsets.h" |
| 37 | |
| 38 | |
| 39 | /* STACK_POINTER_OFFSET: VEX register offset for the stack pointer register. */ |
| 40 | #if defined(VGA_x86) |
| 41 | #define STACK_POINTER_OFFSET OFFSET_x86_ESP |
| 42 | #elif defined(VGA_amd64) |
| 43 | #define STACK_POINTER_OFFSET OFFSET_amd64_RSP |
| 44 | #elif defined(VGA_ppc32) |
sewardj | 4cb6bf7 | 2010-01-01 18:31:41 +0000 | [diff] [blame] | 45 | #define STACK_POINTER_OFFSET OFFSET_ppc32_GPR1 |
carll | cae0cc2 | 2014-08-07 23:17:29 +0000 | [diff] [blame] | 46 | #elif defined(VGA_ppc64be) || defined(VGA_ppc64le) |
sewardj | 4cb6bf7 | 2010-01-01 18:31:41 +0000 | [diff] [blame] | 47 | #define STACK_POINTER_OFFSET OFFSET_ppc64_GPR1 |
| 48 | #elif defined(VGA_arm) |
| 49 | #define STACK_POINTER_OFFSET OFFSET_arm_R13 |
sewardj | f0c1250 | 2014-01-12 12:54:00 +0000 | [diff] [blame] | 50 | #elif defined(VGA_arm64) |
sewardj | 0345188 | 2014-01-15 10:25:55 +0000 | [diff] [blame] | 51 | #define STACK_POINTER_OFFSET OFFSET_arm64_XSP |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 52 | #elif defined(VGA_s390x) |
| 53 | #define STACK_POINTER_OFFSET OFFSET_s390x_r15 |
sewardj | 5db1540 | 2012-06-07 09:13:21 +0000 | [diff] [blame] | 54 | #elif defined(VGA_mips32) |
| 55 | #define STACK_POINTER_OFFSET OFFSET_mips32_r29 |
petarj | 4df0bfc | 2013-02-27 23:17:33 +0000 | [diff] [blame] | 56 | #elif defined(VGA_mips64) |
| 57 | #define STACK_POINTER_OFFSET OFFSET_mips64_r29 |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 58 | #else |
| 59 | #error Unknown architecture. |
| 60 | #endif |
| 61 | |
| 62 | |
| 63 | /* Local variables. */ |
| 64 | |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 65 | static Bool s_check_stack_accesses = False; |
| 66 | static Bool s_first_race_only = False; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 67 | |
| 68 | |
| 69 | /* Function definitions. */ |
| 70 | |
| 71 | Bool DRD_(get_check_stack_accesses)() |
| 72 | { |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 73 | return s_check_stack_accesses; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | void DRD_(set_check_stack_accesses)(const Bool c) |
| 77 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 78 | tl_assert(c == False || c == True); |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 79 | s_check_stack_accesses = c; |
| 80 | } |
| 81 | |
| 82 | Bool DRD_(get_first_race_only)() |
| 83 | { |
| 84 | return s_first_race_only; |
| 85 | } |
| 86 | |
| 87 | void DRD_(set_first_race_only)(const Bool fro) |
| 88 | { |
| 89 | tl_assert(fro == False || fro == True); |
| 90 | s_first_race_only = fro; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 91 | } |
| 92 | |
bart | 1335ecc | 2009-02-14 16:10:53 +0000 | [diff] [blame] | 93 | void DRD_(trace_mem_access)(const Addr addr, const SizeT size, |
bart | 7826acb | 2011-12-11 18:49:39 +0000 | [diff] [blame] | 94 | const BmAccessTypeT access_type, |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 95 | const HWord stored_value_hi, |
| 96 | const HWord stored_value_lo) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 97 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 98 | if (DRD_(is_any_traced)(addr, addr + size)) |
| 99 | { |
florian | 19f91bb | 2012-11-10 22:29:54 +0000 | [diff] [blame] | 100 | HChar* vc; |
bart | 8f822af | 2009-06-08 18:20:42 +0000 | [diff] [blame] | 101 | |
| 102 | vc = DRD_(vc_aprint)(DRD_(thread_get_vc)(DRD_(thread_get_running_tid)())); |
bart | 7826acb | 2011-12-11 18:49:39 +0000 | [diff] [blame] | 103 | if (access_type == eStore && size <= sizeof(HWord)) { |
florian | ea71ffb | 2015-08-05 14:38:57 +0000 | [diff] [blame] | 104 | DRD_(trace_msg_w_bt)("store 0x%lx size %lu val %lu/0x%lx (thread %u /" |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 105 | " vc %s)", addr, size, stored_value_lo, |
| 106 | stored_value_lo, DRD_(thread_get_running_tid)(), |
| 107 | vc); |
| 108 | } else if (access_type == eStore && size > sizeof(HWord)) { |
| 109 | ULong sv; |
| 110 | |
| 111 | tl_assert(sizeof(HWord) == 4); |
| 112 | sv = ((ULong)stored_value_hi << 32) | stored_value_lo; |
florian | ea71ffb | 2015-08-05 14:38:57 +0000 | [diff] [blame] | 113 | DRD_(trace_msg_w_bt)("store 0x%lx size %lu val %llu/0x%llx (thread %u" |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 114 | " / vc %s)", addr, size, sv, sv, |
bart | 7826acb | 2011-12-11 18:49:39 +0000 | [diff] [blame] | 115 | DRD_(thread_get_running_tid)(), vc); |
| 116 | } else { |
florian | ea71ffb | 2015-08-05 14:38:57 +0000 | [diff] [blame] | 117 | DRD_(trace_msg_w_bt)("%s 0x%lx size %lu (thread %u / vc %s)", |
bart | 7826acb | 2011-12-11 18:49:39 +0000 | [diff] [blame] | 118 | access_type == eLoad ? "load " |
| 119 | : access_type == eStore ? "store" |
| 120 | : access_type == eStart ? "start" |
| 121 | : access_type == eEnd ? "end " : "????", |
| 122 | addr, size, DRD_(thread_get_running_tid)(), vc); |
| 123 | } |
bart | 8f822af | 2009-06-08 18:20:42 +0000 | [diff] [blame] | 124 | VG_(free)(vc); |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 125 | tl_assert(DRD_(DrdThreadIdToVgThreadId)(DRD_(thread_get_running_tid)()) |
| 126 | == VG_(get_running_tid)()); |
| 127 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 128 | } |
| 129 | |
bart | 0759503 | 2010-08-29 09:51:06 +0000 | [diff] [blame] | 130 | static VG_REGPARM(2) void drd_trace_mem_load(const Addr addr, const SizeT size) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 131 | { |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 132 | return DRD_(trace_mem_access)(addr, size, eLoad, 0, 0); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 133 | } |
| 134 | |
bart | 7826acb | 2011-12-11 18:49:39 +0000 | [diff] [blame] | 135 | static VG_REGPARM(3) void drd_trace_mem_store(const Addr addr,const SizeT size, |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 136 | const HWord stored_value_hi, |
| 137 | const HWord stored_value_lo) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 138 | { |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 139 | return DRD_(trace_mem_access)(addr, size, eStore, stored_value_hi, |
| 140 | stored_value_lo); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 141 | } |
| 142 | |
| 143 | static void drd_report_race(const Addr addr, const SizeT size, |
| 144 | const BmAccessTypeT access_type) |
| 145 | { |
bart | 7a9db0f | 2012-04-01 14:40:16 +0000 | [diff] [blame] | 146 | ThreadId vg_tid; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 147 | |
bart | 7a9db0f | 2012-04-01 14:40:16 +0000 | [diff] [blame] | 148 | vg_tid = VG_(get_running_tid)(); |
bart | 7886dd3 | 2012-04-01 15:06:57 +0000 | [diff] [blame] | 149 | if (!DRD_(get_check_stack_accesses)() |
| 150 | && DRD_(thread_address_on_any_stack)(addr)) { |
bart | 7a9db0f | 2012-04-01 14:40:16 +0000 | [diff] [blame] | 151 | #if 0 |
| 152 | GenericErrInfo GEI = { |
| 153 | .tid = DRD_(thread_get_running_tid)(), |
| 154 | .addr = addr, |
| 155 | }; |
| 156 | VG_(maybe_record_error)(vg_tid, GenericErr, VG_(get_IP)(vg_tid), |
| 157 | "--check-stack-var=no skips checking stack" |
| 158 | " variables shared over threads", |
| 159 | &GEI); |
| 160 | #endif |
| 161 | } else { |
| 162 | DataRaceErrInfo drei = { |
| 163 | .tid = DRD_(thread_get_running_tid)(), |
| 164 | .addr = addr, |
| 165 | .size = size, |
| 166 | .access_type = access_type, |
| 167 | }; |
| 168 | VG_(maybe_record_error)(vg_tid, DataRaceErr, VG_(get_IP)(vg_tid), |
| 169 | "Conflicting access", &drei); |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 170 | |
bart | 7a9db0f | 2012-04-01 14:40:16 +0000 | [diff] [blame] | 171 | if (s_first_race_only) |
| 172 | DRD_(start_suppression)(addr, addr + size, "first race only"); |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 173 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 174 | } |
| 175 | |
bart | 99edb29 | 2009-02-15 15:59:20 +0000 | [diff] [blame] | 176 | VG_REGPARM(2) void DRD_(trace_load)(Addr addr, SizeT size) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 177 | { |
| 178 | #ifdef ENABLE_DRD_CONSISTENCY_CHECKS |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 179 | /* The assert below has been commented out because of performance reasons.*/ |
bart | d5bbc61 | 2010-09-02 14:44:17 +0000 | [diff] [blame] | 180 | tl_assert(DRD_(thread_get_running_tid)() |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame] | 181 | == DRD_(VgThreadIdToDrdThreadId)(VG_(get_running_tid)())); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 182 | #endif |
| 183 | |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 184 | if (DRD_(running_thread_is_recording_loads)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 185 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 186 | || ! DRD_(thread_address_on_stack)(addr)) |
| 187 | && bm_access_load_triggers_conflict(addr, addr + size) |
| 188 | && ! DRD_(is_suppressed)(addr, addr + size)) |
| 189 | { |
| 190 | drd_report_race(addr, size, eLoad); |
| 191 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | static VG_REGPARM(1) void drd_trace_load_1(Addr addr) |
| 195 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 196 | if (DRD_(running_thread_is_recording_loads)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 197 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 198 | || ! DRD_(thread_address_on_stack)(addr)) |
| 199 | && bm_access_load_1_triggers_conflict(addr) |
| 200 | && ! DRD_(is_suppressed)(addr, addr + 1)) |
| 201 | { |
| 202 | drd_report_race(addr, 1, eLoad); |
| 203 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 204 | } |
| 205 | |
| 206 | static VG_REGPARM(1) void drd_trace_load_2(Addr addr) |
| 207 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 208 | if (DRD_(running_thread_is_recording_loads)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 209 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 210 | || ! DRD_(thread_address_on_stack)(addr)) |
| 211 | && bm_access_load_2_triggers_conflict(addr) |
| 212 | && ! DRD_(is_suppressed)(addr, addr + 2)) |
| 213 | { |
| 214 | drd_report_race(addr, 2, eLoad); |
| 215 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | static VG_REGPARM(1) void drd_trace_load_4(Addr addr) |
| 219 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 220 | if (DRD_(running_thread_is_recording_loads)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 221 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 222 | || ! DRD_(thread_address_on_stack)(addr)) |
| 223 | && bm_access_load_4_triggers_conflict(addr) |
| 224 | && ! DRD_(is_suppressed)(addr, addr + 4)) |
| 225 | { |
| 226 | drd_report_race(addr, 4, eLoad); |
| 227 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 228 | } |
| 229 | |
| 230 | static VG_REGPARM(1) void drd_trace_load_8(Addr addr) |
| 231 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 232 | if (DRD_(running_thread_is_recording_loads)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 233 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 234 | || ! DRD_(thread_address_on_stack)(addr)) |
| 235 | && bm_access_load_8_triggers_conflict(addr) |
| 236 | && ! DRD_(is_suppressed)(addr, addr + 8)) |
| 237 | { |
| 238 | drd_report_race(addr, 8, eLoad); |
| 239 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 240 | } |
| 241 | |
bart | 99edb29 | 2009-02-15 15:59:20 +0000 | [diff] [blame] | 242 | VG_REGPARM(2) void DRD_(trace_store)(Addr addr, SizeT size) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 243 | { |
| 244 | #ifdef ENABLE_DRD_CONSISTENCY_CHECKS |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 245 | /* The assert below has been commented out because of performance reasons.*/ |
bart | d5bbc61 | 2010-09-02 14:44:17 +0000 | [diff] [blame] | 246 | tl_assert(DRD_(thread_get_running_tid)() |
Elliott Hughes | a0664b9 | 2017-04-18 17:46:52 -0700 | [diff] [blame] | 247 | == DRD_(VgThreadIdToDrdThreadId)(VG_(get_running_tid)())); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 248 | #endif |
| 249 | |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 250 | if (DRD_(running_thread_is_recording_stores)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 251 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 252 | || ! DRD_(thread_address_on_stack)(addr)) |
| 253 | && bm_access_store_triggers_conflict(addr, addr + size) |
| 254 | && ! DRD_(is_suppressed)(addr, addr + size)) |
| 255 | { |
| 256 | drd_report_race(addr, size, eStore); |
| 257 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 258 | } |
| 259 | |
| 260 | static VG_REGPARM(1) void drd_trace_store_1(Addr addr) |
| 261 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 262 | if (DRD_(running_thread_is_recording_stores)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 263 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 264 | || ! DRD_(thread_address_on_stack)(addr)) |
| 265 | && bm_access_store_1_triggers_conflict(addr) |
| 266 | && ! DRD_(is_suppressed)(addr, addr + 1)) |
| 267 | { |
| 268 | drd_report_race(addr, 1, eStore); |
| 269 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 270 | } |
| 271 | |
| 272 | static VG_REGPARM(1) void drd_trace_store_2(Addr addr) |
| 273 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 274 | if (DRD_(running_thread_is_recording_stores)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 275 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 276 | || ! DRD_(thread_address_on_stack)(addr)) |
| 277 | && bm_access_store_2_triggers_conflict(addr) |
| 278 | && ! DRD_(is_suppressed)(addr, addr + 2)) |
| 279 | { |
| 280 | drd_report_race(addr, 2, eStore); |
| 281 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 282 | } |
| 283 | |
| 284 | static VG_REGPARM(1) void drd_trace_store_4(Addr addr) |
| 285 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 286 | if (DRD_(running_thread_is_recording_stores)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 287 | && (s_check_stack_accesses |
bart | 71ce132 | 2011-12-11 17:54:17 +0000 | [diff] [blame] | 288 | || !DRD_(thread_address_on_stack)(addr)) |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 289 | && bm_access_store_4_triggers_conflict(addr) |
bart | 71ce132 | 2011-12-11 17:54:17 +0000 | [diff] [blame] | 290 | && !DRD_(is_suppressed)(addr, addr + 4)) |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 291 | { |
| 292 | drd_report_race(addr, 4, eStore); |
| 293 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 294 | } |
| 295 | |
| 296 | static VG_REGPARM(1) void drd_trace_store_8(Addr addr) |
| 297 | { |
bart | d45d995 | 2009-05-31 18:53:54 +0000 | [diff] [blame] | 298 | if (DRD_(running_thread_is_recording_stores)() |
bart | f98a569 | 2009-05-03 17:17:37 +0000 | [diff] [blame] | 299 | && (s_check_stack_accesses |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 300 | || ! DRD_(thread_address_on_stack)(addr)) |
| 301 | && bm_access_store_8_triggers_conflict(addr) |
| 302 | && ! DRD_(is_suppressed)(addr, addr + 8)) |
| 303 | { |
| 304 | drd_report_race(addr, 8, eStore); |
| 305 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 306 | } |
| 307 | |
| 308 | /** |
| 309 | * Return true if and only if addr_expr matches the pattern (SP) or |
| 310 | * <offset>(SP). |
| 311 | */ |
| 312 | static Bool is_stack_access(IRSB* const bb, IRExpr* const addr_expr) |
| 313 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 314 | Bool result = False; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 315 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 316 | if (addr_expr->tag == Iex_RdTmp) |
| 317 | { |
| 318 | int i; |
sewardj | 528b350 | 2012-12-27 17:46:10 +0000 | [diff] [blame] | 319 | for (i = 0; i < bb->stmts_used; i++) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 320 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 321 | if (bb->stmts[i] |
| 322 | && bb->stmts[i]->tag == Ist_WrTmp |
| 323 | && bb->stmts[i]->Ist.WrTmp.tmp == addr_expr->Iex.RdTmp.tmp) |
| 324 | { |
| 325 | IRExpr* e = bb->stmts[i]->Ist.WrTmp.data; |
| 326 | if (e->tag == Iex_Get && e->Iex.Get.offset == STACK_POINTER_OFFSET) |
| 327 | { |
| 328 | result = True; |
| 329 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 330 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 331 | //ppIRExpr(e); |
| 332 | //VG_(printf)(" (%s)\n", result ? "True" : "False"); |
| 333 | break; |
| 334 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 335 | } |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 336 | } |
| 337 | return result; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 338 | } |
| 339 | |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 340 | static const IROp u_widen_irop[5][9] = { |
bart | 9ad8d80 | 2011-12-12 19:54:32 +0000 | [diff] [blame] | 341 | [Ity_I1 - Ity_I1] = { [4] = Iop_1Uto32, [8] = Iop_1Uto64 }, |
| 342 | [Ity_I8 - Ity_I1] = { [4] = Iop_8Uto32, [8] = Iop_8Uto64 }, |
| 343 | [Ity_I16 - Ity_I1] = { [4] = Iop_16Uto32, [8] = Iop_16Uto64 }, |
| 344 | [Ity_I32 - Ity_I1] = { [8] = Iop_32Uto64 }, |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 345 | }; |
| 346 | |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 347 | /** |
| 348 | * Instrument the client code to trace a memory load (--trace-addr). |
| 349 | */ |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 350 | static IRExpr* instr_trace_mem_load(IRSB* const bb, IRExpr* addr_expr, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 351 | const HWord size, |
| 352 | IRExpr* const guard/* NULL => True */) |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 353 | { |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 354 | IRTemp tmp; |
| 355 | |
| 356 | tmp = newIRTemp(bb->tyenv, typeOfIRExpr(bb->tyenv, addr_expr)); |
| 357 | addStmtToIRSB(bb, IRStmt_WrTmp(tmp, addr_expr)); |
| 358 | addr_expr = IRExpr_RdTmp(tmp); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 359 | IRDirty* di |
| 360 | = unsafeIRDirty_0_N(/*regparms*/2, |
| 361 | "drd_trace_mem_load", |
| 362 | VG_(fnptr_to_fnentry) |
| 363 | (drd_trace_mem_load), |
| 364 | mkIRExprVec_2(addr_expr, mkIRExpr_HWord(size))); |
| 365 | if (guard) di->guard = guard; |
| 366 | addStmtToIRSB(bb, IRStmt_Dirty(di)); |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 367 | |
| 368 | return addr_expr; |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 369 | } |
| 370 | |
| 371 | /** |
| 372 | * Instrument the client code to trace a memory store (--trace-addr). |
| 373 | */ |
| 374 | static void instr_trace_mem_store(IRSB* const bb, IRExpr* const addr_expr, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 375 | IRExpr* data_expr_hi, IRExpr* data_expr_lo, |
| 376 | IRExpr* const guard/* NULL => True */) |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 377 | { |
| 378 | IRType ty_data_expr; |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 379 | HWord size; |
| 380 | |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 381 | tl_assert(sizeof(HWord) == 4 || sizeof(HWord) == 8); |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 382 | tl_assert(!data_expr_hi || typeOfIRExpr(bb->tyenv, data_expr_hi) == Ity_I32); |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 383 | |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 384 | ty_data_expr = typeOfIRExpr(bb->tyenv, data_expr_lo); |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 385 | size = sizeofIRType(ty_data_expr); |
| 386 | |
bart | 7ca75ed | 2011-12-13 08:53:23 +0000 | [diff] [blame] | 387 | #if 0 |
| 388 | // Test code |
| 389 | if (ty_data_expr == Ity_I32) { |
| 390 | IRTemp tmp = newIRTemp(bb->tyenv, Ity_F32); |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 391 | data_expr_lo = IRExpr_Unop(Iop_ReinterpI32asF32, data_expr_lo); |
| 392 | addStmtToIRSB(bb, IRStmt_WrTmp(tmp, data_expr_lo)); |
| 393 | data_expr_lo = IRExpr_RdTmp(tmp); |
bart | 7ca75ed | 2011-12-13 08:53:23 +0000 | [diff] [blame] | 394 | ty_data_expr = Ity_F32; |
| 395 | } else if (ty_data_expr == Ity_I64) { |
| 396 | IRTemp tmp = newIRTemp(bb->tyenv, Ity_F64); |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 397 | data_expr_lo = IRExpr_Unop(Iop_ReinterpI64asF64, data_expr_lo); |
| 398 | addStmtToIRSB(bb, IRStmt_WrTmp(tmp, data_expr_lo)); |
| 399 | data_expr_lo = IRExpr_RdTmp(tmp); |
bart | 7ca75ed | 2011-12-13 08:53:23 +0000 | [diff] [blame] | 400 | ty_data_expr = Ity_F64; |
| 401 | } |
| 402 | #endif |
| 403 | |
| 404 | if (ty_data_expr == Ity_F32) { |
| 405 | IRTemp tmp = newIRTemp(bb->tyenv, Ity_I32); |
| 406 | addStmtToIRSB(bb, IRStmt_WrTmp(tmp, IRExpr_Unop(Iop_ReinterpF32asI32, |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 407 | data_expr_lo))); |
| 408 | data_expr_lo = IRExpr_RdTmp(tmp); |
bart | 7ca75ed | 2011-12-13 08:53:23 +0000 | [diff] [blame] | 409 | ty_data_expr = Ity_I32; |
| 410 | } else if (ty_data_expr == Ity_F64) { |
| 411 | IRTemp tmp = newIRTemp(bb->tyenv, Ity_I64); |
| 412 | addStmtToIRSB(bb, IRStmt_WrTmp(tmp, IRExpr_Unop(Iop_ReinterpF64asI64, |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 413 | data_expr_lo))); |
| 414 | data_expr_lo = IRExpr_RdTmp(tmp); |
bart | 7ca75ed | 2011-12-13 08:53:23 +0000 | [diff] [blame] | 415 | ty_data_expr = Ity_I64; |
| 416 | } |
| 417 | |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 418 | if (size == sizeof(HWord) |
| 419 | && (ty_data_expr == Ity_I32 || ty_data_expr == Ity_I64)) |
| 420 | { |
| 421 | /* No conversion necessary */ |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 422 | } else { |
| 423 | IROp widen_op; |
| 424 | |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 425 | if (Ity_I1 <= ty_data_expr |
| 426 | && ty_data_expr |
| 427 | < Ity_I1 + sizeof(u_widen_irop)/sizeof(u_widen_irop[0])) |
| 428 | { |
| 429 | widen_op = u_widen_irop[ty_data_expr - Ity_I1][sizeof(HWord)]; |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 430 | if (!widen_op) |
| 431 | widen_op = Iop_INVALID; |
| 432 | } else { |
| 433 | widen_op = Iop_INVALID; |
| 434 | } |
| 435 | if (widen_op != Iop_INVALID) { |
| 436 | IRTemp tmp; |
| 437 | |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 438 | /* Widen the integer expression to a HWord */ |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 439 | tmp = newIRTemp(bb->tyenv, sizeof(HWord) == 4 ? Ity_I32 : Ity_I64); |
| 440 | addStmtToIRSB(bb, |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 441 | IRStmt_WrTmp(tmp, IRExpr_Unop(widen_op, data_expr_lo))); |
| 442 | data_expr_lo = IRExpr_RdTmp(tmp); |
| 443 | } else if (size > sizeof(HWord) && !data_expr_hi |
| 444 | && ty_data_expr == Ity_I64) { |
| 445 | IRTemp tmp; |
| 446 | |
| 447 | tl_assert(sizeof(HWord) == 4); |
| 448 | tl_assert(size == 8); |
| 449 | tmp = newIRTemp(bb->tyenv, Ity_I32); |
| 450 | addStmtToIRSB(bb, |
| 451 | IRStmt_WrTmp(tmp, |
| 452 | IRExpr_Unop(Iop_64HIto32, data_expr_lo))); |
| 453 | data_expr_hi = IRExpr_RdTmp(tmp); |
| 454 | tmp = newIRTemp(bb->tyenv, Ity_I32); |
| 455 | addStmtToIRSB(bb, IRStmt_WrTmp(tmp, |
| 456 | IRExpr_Unop(Iop_64to32, data_expr_lo))); |
| 457 | data_expr_lo = IRExpr_RdTmp(tmp); |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 458 | } else { |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 459 | data_expr_lo = mkIRExpr_HWord(0); |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 460 | } |
| 461 | } |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 462 | IRDirty* di |
| 463 | = unsafeIRDirty_0_N(/*regparms*/3, |
| 464 | "drd_trace_mem_store", |
| 465 | VG_(fnptr_to_fnentry)(drd_trace_mem_store), |
| 466 | mkIRExprVec_4(addr_expr, mkIRExpr_HWord(size), |
| 467 | data_expr_hi ? data_expr_hi |
| 468 | : mkIRExpr_HWord(0), data_expr_lo)); |
| 469 | if (guard) di->guard = guard; |
| 470 | addStmtToIRSB(bb, IRStmt_Dirty(di) ); |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 471 | } |
| 472 | |
| 473 | static void instrument_load(IRSB* const bb, IRExpr* const addr_expr, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 474 | const HWord size, |
| 475 | IRExpr* const guard/* NULL => True */) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 476 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 477 | IRExpr* size_expr; |
| 478 | IRExpr** argv; |
| 479 | IRDirty* di; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 480 | |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 481 | if (!s_check_stack_accesses && is_stack_access(bb, addr_expr)) |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 482 | return; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 483 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 484 | switch (size) |
| 485 | { |
| 486 | case 1: |
| 487 | argv = mkIRExprVec_1(addr_expr); |
| 488 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 489 | "drd_trace_load_1", |
| 490 | VG_(fnptr_to_fnentry)(drd_trace_load_1), |
| 491 | argv); |
| 492 | break; |
| 493 | case 2: |
| 494 | argv = mkIRExprVec_1(addr_expr); |
| 495 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 496 | "drd_trace_load_2", |
| 497 | VG_(fnptr_to_fnentry)(drd_trace_load_2), |
| 498 | argv); |
| 499 | break; |
| 500 | case 4: |
| 501 | argv = mkIRExprVec_1(addr_expr); |
| 502 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 503 | "drd_trace_load_4", |
| 504 | VG_(fnptr_to_fnentry)(drd_trace_load_4), |
| 505 | argv); |
| 506 | break; |
| 507 | case 8: |
| 508 | argv = mkIRExprVec_1(addr_expr); |
| 509 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 510 | "drd_trace_load_8", |
| 511 | VG_(fnptr_to_fnentry)(drd_trace_load_8), |
| 512 | argv); |
| 513 | break; |
| 514 | default: |
| 515 | size_expr = mkIRExpr_HWord(size); |
| 516 | argv = mkIRExprVec_2(addr_expr, size_expr); |
| 517 | di = unsafeIRDirty_0_N(/*regparms*/2, |
| 518 | "drd_trace_load", |
| 519 | VG_(fnptr_to_fnentry)(DRD_(trace_load)), |
| 520 | argv); |
| 521 | break; |
| 522 | } |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 523 | if (guard) di->guard = guard; |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 524 | addStmtToIRSB(bb, IRStmt_Dirty(di)); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 525 | } |
| 526 | |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 527 | static void instrument_store(IRSB* const bb, IRExpr* addr_expr, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 528 | IRExpr* const data_expr, |
| 529 | IRExpr* const guard_expr/* NULL => True */) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 530 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 531 | IRExpr* size_expr; |
| 532 | IRExpr** argv; |
| 533 | IRDirty* di; |
bart | 7826acb | 2011-12-11 18:49:39 +0000 | [diff] [blame] | 534 | HWord size; |
| 535 | |
| 536 | size = sizeofIRType(typeOfIRExpr(bb->tyenv, data_expr)); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 537 | |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 538 | if (UNLIKELY(DRD_(any_address_is_traced)())) { |
| 539 | IRTemp tmp = newIRTemp(bb->tyenv, typeOfIRExpr(bb->tyenv, addr_expr)); |
| 540 | addStmtToIRSB(bb, IRStmt_WrTmp(tmp, addr_expr)); |
| 541 | addr_expr = IRExpr_RdTmp(tmp); |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 542 | instr_trace_mem_store(bb, addr_expr, NULL, data_expr, guard_expr); |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 543 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 544 | |
bart | 71ce132 | 2011-12-11 17:54:17 +0000 | [diff] [blame] | 545 | if (!s_check_stack_accesses && is_stack_access(bb, addr_expr)) |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 546 | return; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 547 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 548 | switch (size) |
| 549 | { |
| 550 | case 1: |
| 551 | argv = mkIRExprVec_1(addr_expr); |
| 552 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 553 | "drd_trace_store_1", |
| 554 | VG_(fnptr_to_fnentry)(drd_trace_store_1), |
| 555 | argv); |
| 556 | break; |
| 557 | case 2: |
| 558 | argv = mkIRExprVec_1(addr_expr); |
| 559 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 560 | "drd_trace_store_2", |
| 561 | VG_(fnptr_to_fnentry)(drd_trace_store_2), |
| 562 | argv); |
| 563 | break; |
| 564 | case 4: |
| 565 | argv = mkIRExprVec_1(addr_expr); |
| 566 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 567 | "drd_trace_store_4", |
| 568 | VG_(fnptr_to_fnentry)(drd_trace_store_4), |
| 569 | argv); |
| 570 | break; |
| 571 | case 8: |
| 572 | argv = mkIRExprVec_1(addr_expr); |
| 573 | di = unsafeIRDirty_0_N(/*regparms*/1, |
| 574 | "drd_trace_store_8", |
| 575 | VG_(fnptr_to_fnentry)(drd_trace_store_8), |
| 576 | argv); |
| 577 | break; |
| 578 | default: |
| 579 | size_expr = mkIRExpr_HWord(size); |
| 580 | argv = mkIRExprVec_2(addr_expr, size_expr); |
| 581 | di = unsafeIRDirty_0_N(/*regparms*/2, |
| 582 | "drd_trace_store", |
| 583 | VG_(fnptr_to_fnentry)(DRD_(trace_store)), |
| 584 | argv); |
| 585 | break; |
| 586 | } |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 587 | if (guard_expr) di->guard = guard_expr; |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 588 | addStmtToIRSB(bb, IRStmt_Dirty(di)); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 589 | } |
| 590 | |
bart | 1335ecc | 2009-02-14 16:10:53 +0000 | [diff] [blame] | 591 | IRSB* DRD_(instrument)(VgCallbackClosure* const closure, |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 592 | IRSB* const bb_in, |
florian | 3c0c947 | 2014-09-24 12:06:55 +0000 | [diff] [blame] | 593 | const VexGuestLayout* const layout, |
| 594 | const VexGuestExtents* const vge, |
| 595 | const VexArchInfo* archinfo_host, |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 596 | IRType const gWordTy, |
| 597 | IRType const hWordTy) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 598 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 599 | IRDirty* di; |
| 600 | Int i; |
| 601 | IRSB* bb; |
| 602 | IRExpr** argv; |
| 603 | Bool instrument = True; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 604 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 605 | /* Set up BB */ |
| 606 | bb = emptyIRSB(); |
| 607 | bb->tyenv = deepCopyIRTypeEnv(bb_in->tyenv); |
| 608 | bb->next = deepCopyIRExpr(bb_in->next); |
| 609 | bb->jumpkind = bb_in->jumpkind; |
sewardj | 291849f | 2012-04-20 23:58:55 +0000 | [diff] [blame] | 610 | bb->offsIP = bb_in->offsIP; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 611 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 612 | for (i = 0; i < bb_in->stmts_used; i++) |
| 613 | { |
| 614 | IRStmt* const st = bb_in->stmts[i]; |
| 615 | tl_assert(st); |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 616 | tl_assert(isFlatIRStmt(st)); |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 617 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 618 | switch (st->tag) |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 619 | { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 620 | /* Note: the code for not instrumenting the code in .plt */ |
| 621 | /* sections is only necessary on CentOS 3.0 x86 (kernel 2.4.21 */ |
| 622 | /* + glibc 2.3.2 + NPTL 0.60 + binutils 2.14.90.0.4). */ |
| 623 | /* This is because on this platform dynamic library symbols are */ |
| 624 | /* relocated in another way than by later binutils versions. The */ |
| 625 | /* linker e.g. does not generate .got.plt sections on CentOS 3.0. */ |
| 626 | case Ist_IMark: |
florian | e08950b | 2014-11-13 21:41:28 +0000 | [diff] [blame] | 627 | instrument = VG_(DebugInfo_sect_kind)(NULL, st->Ist.IMark.addr) |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 628 | != Vg_SectPLT; |
| 629 | addStmtToIRSB(bb, st); |
| 630 | break; |
| 631 | |
| 632 | case Ist_MBE: |
| 633 | switch (st->Ist.MBE.event) |
| 634 | { |
| 635 | case Imbe_Fence: |
bart | b68c947 | 2014-09-18 07:11:24 +0000 | [diff] [blame] | 636 | break; /* not interesting to DRD */ |
| 637 | case Imbe_CancelReservation: |
| 638 | break; /* not interesting to DRD */ |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 639 | default: |
| 640 | tl_assert(0); |
| 641 | } |
| 642 | addStmtToIRSB(bb, st); |
| 643 | break; |
| 644 | |
| 645 | case Ist_Store: |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 646 | if (instrument) |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 647 | instrument_store(bb, st->Ist.Store.addr, st->Ist.Store.data, |
| 648 | NULL/* no guard */); |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 649 | addStmtToIRSB(bb, st); |
| 650 | break; |
| 651 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 652 | case Ist_StoreG: { |
| 653 | IRStoreG* sg = st->Ist.StoreG.details; |
| 654 | IRExpr* data = sg->data; |
| 655 | IRExpr* addr = sg->addr; |
| 656 | if (instrument) |
| 657 | instrument_store(bb, addr, data, sg->guard); |
| 658 | addStmtToIRSB(bb, st); |
| 659 | break; |
| 660 | } |
| 661 | |
| 662 | case Ist_LoadG: { |
| 663 | IRLoadG* lg = st->Ist.LoadG.details; |
| 664 | IRType type = Ity_INVALID; /* loaded type */ |
| 665 | IRType typeWide = Ity_INVALID; /* after implicit widening */ |
| 666 | IRExpr* addr_expr = lg->addr; |
| 667 | typeOfIRLoadGOp(lg->cvt, &typeWide, &type); |
| 668 | tl_assert(type != Ity_INVALID); |
| 669 | if (UNLIKELY(DRD_(any_address_is_traced)())) { |
| 670 | addr_expr = instr_trace_mem_load(bb, addr_expr, |
| 671 | sizeofIRType(type), lg->guard); |
| 672 | } |
| 673 | instrument_load(bb, lg->addr, |
| 674 | sizeofIRType(type), lg->guard); |
| 675 | addStmtToIRSB(bb, st); |
| 676 | break; |
| 677 | } |
| 678 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 679 | case Ist_WrTmp: |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 680 | if (instrument) { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 681 | const IRExpr* const data = st->Ist.WrTmp.data; |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 682 | IRExpr* addr_expr = data->Iex.Load.addr; |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 683 | if (data->tag == Iex_Load) { |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 684 | if (UNLIKELY(DRD_(any_address_is_traced)())) { |
| 685 | addr_expr = instr_trace_mem_load(bb, addr_expr, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 686 | sizeofIRType(data->Iex.Load.ty), |
| 687 | NULL/* no guard */); |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 688 | } |
bart | 19fb8d7 | 2013-01-27 10:58:47 +0000 | [diff] [blame] | 689 | instrument_load(bb, addr_expr, sizeofIRType(data->Iex.Load.ty), |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 690 | NULL/* no guard */); |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 691 | } |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 692 | } |
| 693 | addStmtToIRSB(bb, st); |
| 694 | break; |
| 695 | |
| 696 | case Ist_Dirty: |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 697 | if (instrument) { |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 698 | IRDirty* d = st->Ist.Dirty.details; |
| 699 | IREffect const mFx = d->mFx; |
| 700 | switch (mFx) { |
| 701 | case Ifx_None: |
| 702 | break; |
| 703 | case Ifx_Read: |
| 704 | case Ifx_Write: |
| 705 | case Ifx_Modify: |
| 706 | tl_assert(d->mAddr); |
| 707 | tl_assert(d->mSize > 0); |
| 708 | argv = mkIRExprVec_2(d->mAddr, mkIRExpr_HWord(d->mSize)); |
| 709 | if (mFx == Ifx_Read || mFx == Ifx_Modify) { |
| 710 | di = unsafeIRDirty_0_N( |
| 711 | /*regparms*/2, |
| 712 | "drd_trace_load", |
| 713 | VG_(fnptr_to_fnentry)(DRD_(trace_load)), |
| 714 | argv); |
| 715 | addStmtToIRSB(bb, IRStmt_Dirty(di)); |
| 716 | } |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 717 | if (mFx == Ifx_Write || mFx == Ifx_Modify) |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 718 | { |
| 719 | di = unsafeIRDirty_0_N( |
| 720 | /*regparms*/2, |
| 721 | "drd_trace_store", |
| 722 | VG_(fnptr_to_fnentry)(DRD_(trace_store)), |
| 723 | argv); |
| 724 | addStmtToIRSB(bb, IRStmt_Dirty(di)); |
| 725 | } |
| 726 | break; |
| 727 | default: |
| 728 | tl_assert(0); |
| 729 | } |
| 730 | } |
| 731 | addStmtToIRSB(bb, st); |
| 732 | break; |
| 733 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 734 | case Ist_CAS: |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 735 | if (instrument) { |
bart | a14e328 | 2009-07-11 14:35:59 +0000 | [diff] [blame] | 736 | /* |
| 737 | * Treat compare-and-swap as a read. By handling atomic |
| 738 | * instructions as read instructions no data races are reported |
| 739 | * between conflicting atomic operations nor between atomic |
| 740 | * operations and non-atomic reads. Conflicts between atomic |
| 741 | * operations and non-atomic write operations are still reported |
| 742 | * however. |
| 743 | */ |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 744 | Int dataSize; |
| 745 | IRCAS* cas = st->Ist.CAS.details; |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 746 | |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 747 | tl_assert(cas->addr != NULL); |
| 748 | tl_assert(cas->dataLo != NULL); |
| 749 | dataSize = sizeofIRType(typeOfIRExpr(bb->tyenv, cas->dataLo)); |
| 750 | if (cas->dataHi != NULL) |
| 751 | dataSize *= 2; /* since it's a doubleword-CAS */ |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 752 | |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 753 | if (UNLIKELY(DRD_(any_address_is_traced)())) |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 754 | instr_trace_mem_store(bb, cas->addr, cas->dataHi, cas->dataLo, |
| 755 | NULL/* no guard */); |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 756 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 757 | instrument_load(bb, cas->addr, dataSize, NULL/*no guard*/); |
sewardj | 1c0ce7a | 2009-07-01 08:10:49 +0000 | [diff] [blame] | 758 | } |
| 759 | addStmtToIRSB(bb, st); |
| 760 | break; |
| 761 | |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 762 | case Ist_LLSC: { |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 763 | /* |
| 764 | * Ignore store-conditionals (except for tracing), and handle |
| 765 | * load-linked's exactly like normal loads. |
| 766 | */ |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 767 | IRType dataTy; |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 768 | |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 769 | if (st->Ist.LLSC.storedata == NULL) { |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 770 | /* LL */ |
| 771 | dataTy = typeOfIRTemp(bb_in->tyenv, st->Ist.LLSC.result); |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 772 | if (instrument) { |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 773 | IRExpr* addr_expr = st->Ist.LLSC.addr; |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 774 | if (UNLIKELY(DRD_(any_address_is_traced)())) |
bart | 25026ef | 2011-12-17 12:59:45 +0000 | [diff] [blame] | 775 | addr_expr = instr_trace_mem_load(bb, addr_expr, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 776 | sizeofIRType(dataTy), |
| 777 | NULL /* no guard */); |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 778 | |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 779 | instrument_load(bb, addr_expr, sizeofIRType(dataTy), |
| 780 | NULL/*no guard*/); |
bart | b63dc78 | 2011-12-12 19:18:26 +0000 | [diff] [blame] | 781 | } |
bart | ea69215 | 2011-12-11 20:17:57 +0000 | [diff] [blame] | 782 | } else { |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 783 | /* SC */ |
bart | 42f3263 | 2011-12-13 11:12:05 +0000 | [diff] [blame] | 784 | instr_trace_mem_store(bb, st->Ist.LLSC.addr, NULL, |
sewardj | cafe505 | 2013-01-17 14:24:35 +0000 | [diff] [blame] | 785 | st->Ist.LLSC.storedata, |
| 786 | NULL/* no guard */); |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 787 | } |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 788 | addStmtToIRSB(bb, st); |
| 789 | break; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 790 | } |
sewardj | db5907d | 2009-11-26 17:20:21 +0000 | [diff] [blame] | 791 | |
| 792 | case Ist_NoOp: |
| 793 | case Ist_AbiHint: |
| 794 | case Ist_Put: |
| 795 | case Ist_PutI: |
| 796 | case Ist_Exit: |
| 797 | /* None of these can contain any memory references. */ |
| 798 | addStmtToIRSB(bb, st); |
| 799 | break; |
| 800 | |
| 801 | default: |
| 802 | ppIRStmt(st); |
| 803 | tl_assert(0); |
| 804 | } |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 805 | } |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 806 | |
bart | bedfd23 | 2009-03-26 19:07:15 +0000 | [diff] [blame] | 807 | return bb; |
bart | 09dc13f | 2009-02-14 15:13:31 +0000 | [diff] [blame] | 808 | } |
| 809 | |