sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 1 | |
| 2 | /*---------------------------------------------------------------*/ |
| 3 | /*--- ---*/ |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 4 | /*--- This file (vex_main.c) is ---*/ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 5 | /*--- Copyright (c) 2004 OpenWorks LLP. All rights reserved. ---*/ |
| 6 | /*--- ---*/ |
| 7 | /*---------------------------------------------------------------*/ |
| 8 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 9 | #include "libvex.h" |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 10 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 11 | #include "vex_globals.h" |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 12 | #include "vex_util.h" |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 13 | #include "host_regs.h" |
| 14 | #include "x86h_defs.h" |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 15 | #include "x86guest_defs.h" |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 16 | |
| 17 | |
| 18 | /* This file contains the top level interface to the library. */ |
| 19 | |
| 20 | /* --------- Initialise the library. --------- */ |
| 21 | |
| 22 | /* Exported to library client. */ |
| 23 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 24 | void LibVEX_Init ( |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 25 | /* failure exit function */ |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 26 | __attribute__ ((noreturn)) |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 27 | void (*failure_exit) ( void ), |
| 28 | /* logging output function */ |
| 29 | void (*log_bytes) ( Char*, Int nbytes ), |
| 30 | /* debug paranoia level */ |
| 31 | Int debuglevel, |
| 32 | /* verbosity level */ |
| 33 | Int verbosity, |
| 34 | /* Are we supporting valgrind checking? */ |
| 35 | Bool valgrind_support, |
| 36 | /* Max # guest insns per bb */ |
| 37 | Int guest_insns_per_bb |
| 38 | ) |
| 39 | { |
| 40 | vassert(!vex_initdone); |
| 41 | vassert(failure_exit); |
| 42 | vex_failure_exit = failure_exit; |
| 43 | vassert(log_bytes); |
| 44 | vex_log_bytes = log_bytes; |
| 45 | vassert(debuglevel >= 0); |
| 46 | vex_debuglevel = debuglevel; |
| 47 | vassert(verbosity >= 0); |
| 48 | vex_verbosity = verbosity; |
| 49 | vex_valgrind_support = valgrind_support; |
| 50 | vassert(guest_insns_per_bb >= 1 && guest_insns_per_bb <= 100); |
| 51 | vex_guest_insns_per_bb = guest_insns_per_bb; |
| 52 | vex_initdone = True; |
| 53 | } |
| 54 | |
| 55 | |
| 56 | /* --------- Make a translation. --------- */ |
| 57 | |
| 58 | /* Exported to library client. */ |
| 59 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 60 | TranslateResult LibVEX_Translate ( |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 61 | /* The instruction sets we are translating from and to. */ |
| 62 | InsnSet iset_guest, |
| 63 | InsnSet iset_host, |
| 64 | /* IN: the block to translate, and its guest address. */ |
| 65 | Char* guest_bytes, |
| 66 | Addr64 guest_bytes_addr, |
| 67 | /* OUT: the number of bytes actually read */ |
| 68 | Int* guest_bytes_read, |
| 69 | /* IN: a place to put the resulting code, and its size */ |
| 70 | Char* host_bytes, |
| 71 | Int host_bytes_size, |
| 72 | /* OUT: how much of the output area is used. */ |
| 73 | Int* host_bytes_used, |
| 74 | /* IN: optionally, an instrumentation function. */ |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 75 | IRBB* (*instrument) ( IRBB* ), |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 76 | /* IN: optionally, an access check function for guest code. */ |
| 77 | Bool (*byte_accessible) ( Addr64 ) |
| 78 | ) |
| 79 | { |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 80 | /* Stuff we need to know for reg-alloc. */ |
| 81 | HReg* available_real_regs; |
| 82 | Int n_available_real_regs; |
| 83 | Bool (*isMove) (HInstr*, HReg*, HReg*); |
| 84 | void (*getRegUsage) (HRegUsage*, HInstr*); |
| 85 | void (*mapRegs) (HRegRemap*, HInstr*); |
| 86 | HInstr* (*genSpill) ( HReg, Int ); |
| 87 | HInstr* (*genReload) ( HReg, Int ); |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 88 | void (*ppInstr) ( HInstr* ); |
| 89 | void (*ppReg) ( HReg ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 90 | HInstrArray* (*iselBB) ( IRBB* ); |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 91 | IRBB* (*bbToIR) ( Char*, Addr64, Int*, Bool(*)(Addr64), Bool ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 92 | |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 93 | Bool host_is_bigendian = False; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 94 | IRBB* irbb; |
| 95 | HInstrArray* vcode; |
| 96 | HInstrArray* rcode; |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame^] | 97 | Int i; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 98 | |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 99 | vassert(vex_initdone); |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 100 | LibVEX_Clear(False); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 101 | |
| 102 | /* First off, check that the guest and host insn sets |
| 103 | are supported. */ |
| 104 | switch (iset_host) { |
| 105 | case InsnSetX86: |
| 106 | getAllocableRegs_X86 ( &n_available_real_regs, |
| 107 | &available_real_regs ); |
| 108 | isMove = (Bool(*)(HInstr*,HReg*,HReg*)) isMove_X86Instr; |
| 109 | getRegUsage = (void(*)(HRegUsage*,HInstr*)) getRegUsage_X86Instr; |
| 110 | mapRegs = (void(*)(HRegRemap*,HInstr*)) mapRegs_X86Instr; |
| 111 | genSpill = (HInstr*(*)(HReg,Int)) genSpill_X86; |
| 112 | genReload = (HInstr*(*)(HReg,Int)) genReload_X86; |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 113 | ppInstr = (void(*)(HInstr*)) ppX86Instr; |
| 114 | ppReg = (void(*)(HReg)) ppHRegX86; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 115 | iselBB = iselBB_X86; |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 116 | host_is_bigendian = False; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 117 | break; |
| 118 | default: |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 119 | vpanic("LibVEX_Translate: unsupported target insn set"); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | switch (iset_guest) { |
| 123 | case InsnSetX86: |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 124 | bbToIR = bbToIR_X86Instr; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 125 | break; |
| 126 | default: |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 127 | vpanic("LibVEX_Translate: unsupported guest insn set"); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | irbb = bbToIR ( guest_bytes, |
| 131 | guest_bytes_addr, |
| 132 | guest_bytes_read, |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 133 | byte_accessible, |
| 134 | host_is_bigendian ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 135 | |
| 136 | if (irbb == NULL) { |
| 137 | /* Access failure. */ |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 138 | LibVEX_Clear(False); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 139 | return TransAccessFail; |
| 140 | } |
| 141 | |
| 142 | /* Get the thing instrumented. */ |
| 143 | if (instrument) |
| 144 | irbb = (*instrument)(irbb); |
| 145 | |
| 146 | /* Turn it into virtual-registerised code. */ |
| 147 | vcode = iselBB ( irbb ); |
| 148 | |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame^] | 149 | vex_printf("\n-------- Virtual registerised code --------\n"); |
| 150 | for (i = 0; i < vcode->arr_used; i++) { |
| 151 | ppInstr(vcode->arr[i]); |
| 152 | vex_printf("\n"); |
| 153 | } |
| 154 | vex_printf("\n"); |
| 155 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 156 | /* Register allocate. */ |
| 157 | rcode = doRegisterAllocation ( vcode, available_real_regs, |
| 158 | n_available_real_regs, |
| 159 | isMove, getRegUsage, mapRegs, |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 160 | genSpill, genReload, |
| 161 | ppInstr, ppReg ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 162 | |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame^] | 163 | vex_printf("\n-------- Post-regalloc code --------\n"); |
| 164 | for (i = 0; i < rcode->arr_used; i++) { |
| 165 | ppInstr(rcode->arr[i]); |
| 166 | vex_printf("\n"); |
| 167 | } |
| 168 | vex_printf("\n"); |
| 169 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 170 | /* Assemble, etc. */ |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 171 | LibVEX_Clear(True); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 172 | |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 173 | return TransOK; |
| 174 | } |
| 175 | |
| 176 | |
| 177 | |
| 178 | /*---------------------------------------------------------------*/ |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 179 | /*--- end vex_main.c ---*/ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 180 | /*---------------------------------------------------------------*/ |