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gerrit-public.fairphone.software / platform / external / valgrind / b3940763c0b8b934b9d16ab38f47a3749e3e078f / pub
  1. b394076 Fix the guest state definition for s390x and introduce dummy members by florian · 13 years ago
  2. ad2c9ea VEX side fixes to match r12190, which is a fix for #279698 (incorrect by sewardj · 13 years ago
  3. d881562 Implement the SSE4.1 insn PCMPEQQ. n-i-bz. (VEX side changes) by sewardj · 13 years ago
  4. 6d615ba Support ARM and Thumb "CLREX" instructions since Dalvik generates by sewardj · 13 years ago
  5. 1b2768a Add another slot on the stack frame used in the dispatcher. by florian · 13 years ago
  6. 2eeeb9b Document and assert that needs_self_check of VexTranslateArgs must not be NULL. by florian · 13 years ago
  7. e71e56a Add support for IBM Power ISA 2.06 -- stage 3. by sewardj · 13 years ago
  8. 87b48b6 Add support for s390x model z114. by florian · 13 years ago
  9. 4aa412a Add support for IBM Power ISA 2.06 -- stage 2. Bug 276784. by sewardj · 13 years ago
  10. 933065d Support the STFLE instruction via a dirty helper. by florian · 13 years ago
  11. 5f438dd Rename and rationalise the vector narrowing and widening primops, so by sewardj · 13 years ago
  12. 2260b99 Implement PACKUSDW (SSE4.1). Fixes #274776. by sewardj · 13 years ago
  13. c9bff7d Partially fix underspecification of saturating narrowing primops that by sewardj · 13 years ago
  14. bc161a4 Change the interface to LibVEX_Translate slightly, so as to make the by sewardj · 13 years ago
  15. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  16. 1ceb75b Comment-only change. by sewardj · 13 years ago
  17. 2f10aa6 Add a field 'UChar delta' to IRStmt_IMark, and use it to carry around by sewardj · 13 years ago
  18. d07b856 s390x: fpr - gpr transfer facility by sewardj · 13 years ago
  19. 66d5ef2 Add support for IBM Power ISA 2.06 -- stage 1. Bug #267630 and by sewardj · 13 years ago
  20. 652b56a s390x: reconsider "long displacement" requirement. We currently by sewardj · 13 years ago
  21. 216ac96 Add missing VG_REGPARM definition for ppc32-linux following r2108. by sewardj · 14 years ago
  22. 6312e80 Don't apply function attributes to a functional parameter when by sewardj · 14 years ago
  23. 03d9114 Wrap up "__attribute__((regparm(n)))" inside a macro so it is only by sewardj · 14 years ago
  24. 2019a97 Add a port to IBM z/Architecture (s390x) running Linux -- VEX by sewardj · 14 years ago
  25. 310d6b2 Add support for SMSAD{X}, SMLSD{X}, USAD{A}8. by sewardj · 14 years ago
  26. eee3960 Comment-only change. by sewardj · 14 years ago
  27. 5e120aa Track (but ignore) the state of %RFLAGS.ACFLAG, since that is by sewardj · 14 years ago
  28. e2ea176 by sewardj · 14 years ago
  29. e971c6a Support the DCBZL instruction. Also, query the host CPU at startup by sewardj · 14 years ago
  30. 1f139f5 Add support for v6 media instructions in both ARM and Thumb modes. by sewardj · 14 years ago
  31. 2fdd416 Merge from branches/THUMB: new IR primops and associated by sewardj · 14 years ago
  32. ec0d9a0 Merge from branches/THUMB: hwcaps for ARM. May get simplified since by sewardj · 14 years ago
  33. d266447 Merge from branches/THUMB: front end changes to support: by sewardj · 14 years ago
  34. acfbd7d Add a moderately comprehensive implementation of the SSE4.2 string by sewardj · 14 years ago
  35. 0b2d3fe Add partial support for the SSE 4.2 PCMPISTRI instruction, at least by sewardj · 14 years ago
  36. 536fbab Only decode LZCNT if the host supports it, since otherwise we risk by sewardj · 14 years ago
  37. d15b597 Implement ROUNDSS (partial implementation, in the case where by sewardj · 14 years ago
  38. 69d98e3 Implement SSE4 instructions: PCMPGTQ PMAXUD PMINUD PMAXSB PMINSB PMULLD by sewardj · 14 years ago
  39. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  40. 984d9b1 by sewardj · 15 years ago
  41. 6c299f3 Merge r1925:1948 from branches/ARM. This temporarily breaks all other by sewardj · 15 years ago
  42. e768e92 by sewardj · 15 years ago
  43. 3187dc7 Get rid of LibVEX_Version(). by sewardj · 15 years ago
  44. 1fb8c92 Add new integer comparison primitives Iop_CasCmp{EQ,NE}{8,16,32,64}, by sewardj · 15 years ago
  45. cef7d3e by sewardj · 15 years ago
  46. d652012 Double the size of the spill area. Fixes #195838. by sewardj · 15 years ago
  47. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  48. 90472eb Make VexGuestAMD64State have a 16-aligned size once again, following r1886. by sewardj · 16 years ago
  49. e86310f In order to make it possible for Valgrind to restart client syscalls by sewardj · 16 years ago
  50. 2e28ac4 by sewardj · 16 years ago
  51. d660d41 Initial VEX-end support for Darwin (x86 and amd64). by sewardj · 16 years ago
  52. a203330 Add a description of the FP offset/size to type VexGuestLayout. by sewardj · 16 years ago
  53. 0f1ef86 Handle frin, frim, frip, friz, in 64-bit mode only, for now. by sewardj · 16 years ago
  54. c07349e Add support needed for exp-ptrcheck on ppc32/64. by sewardj · 16 years ago
  55. 019f406 Add Imbe_SnoopedStoreBegin and Imbe_SnoopedStoreEnd, to be used for by sewardj · 16 years ago
  56. 478646f Merge branches/OTRACK_BY_INSTRUMENTATION into the trunk. This by sewardj · 16 years ago
  57. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 17 years ago
  58. d166e28 by sewardj · 17 years ago
  59. c4356f0 by sewardj · 17 years ago
  60. 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
  61. be1b6ff by sewardj · 17 years ago
  62. eb17e49 Merge from CGTUNE branch: by sewardj · 17 years ago
  63. 3465e75 Stop gcc-4.2 producing hundreds of complaints of the form "warning: by sewardj · 17 years ago
  64. f6c8ebf More IRBB -> IRSB renaming. by sewardj · 18 years ago
  65. fc1b541 Add 'missing' primop Iop_ReinterpF32asI32 and code generation support by sewardj · 18 years ago
  66. e744153 Update copyright dates. by sewardj · 18 years ago
  67. 78ec32b Add mkIRExprVec_6/7. by sewardj · 18 years ago
  68. d71ba83 x86 front end: Implement MASKMOVQ (MMX class insn, introduced in SSE1) by sewardj · 18 years ago
  69. dd40fdf by sewardj · 18 years ago
  70. 6f2f283 New function dopyIRBBExceptStmts which makes it a bit easier to write tools. by sewardj · 18 years ago
  71. 57c10c8 Add many extra comments describing the IR. by sewardj · 18 years ago
  72. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  73. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  74. f32d5a5 Add a function to set/clear the x86 carry flag. (untested) by sewardj · 19 years ago
  75. 21bd7c7 upmerge r1597 (ppc32 needs a lot of spill slots sometimes) by sewardj · 19 years ago
  76. 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 19 years ago
  77. 334870d ppc32/64: handle twi/tdi (conditional trap) instructions by sewardj · 19 years ago
  78. f1b5b1a Followup to r1562: fixes for x86 by sewardj · 19 years ago
  79. b183b85 by sewardj · 19 years ago
  80. 5117ce1 Change the way Vex represents architecture variants into something by sewardj · 19 years ago
  81. baf971a Handle ppc32/64 fres, frsqrte. by sewardj · 19 years ago
  82. aa60ddf The ppc32 port ran itself out of spill slots on some heavy duty FP code. by sewardj · 19 years ago
  83. 5ff11dd More ppc64-only function wrapping hacks: by sewardj · 19 years ago
  84. 9dd9cf1 Add Ijk_EmFail, a new kind of IR block exit: an emulation failure by sewardj · 19 years ago
  85. c716aea Two different sets of changes (hard to disentangle): by sewardj · 19 years ago
  86. be482ae Give the ppc64 guest state a 16-entry pseudo-register array, by sewardj · 19 years ago
  87. ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
  88. 7594920 Comment only changes - misc refs to ppc32 changed to ppc. by cerion · 19 years ago
  89. 5b2325f Changed naming convention from 'PPC32' to 'PPC' for all VEX code common to both PPC32 and PPC64. by cerion · 19 years ago
  90. 17c7f95 - x86 back end: change code generation convention, so that instead of by sewardj · 19 years ago
  91. f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
  92. 7a3e39c fix padding for VexGuestPPC64State by cerion · 19 years ago
  93. 2831b00 Fixed a couple of mode32 bugs introduced by mode64 by cerion · 19 years ago
  94. dd56a48 Missed this in commit of vex: r1475 (ppc64 first pass) by cerion · 19 years ago
  95. d953ebb First pass at VEX support of ppc64. by cerion · 19 years ago
  96. 2d6b14a Use a very fast in-line allocator. This improves its performance by by sewardj · 19 years ago
  97. f294eb3 Yet more irops, for fp vector conversion/rounding. by cerion · 19 years ago
  98. bc5948e delete unused multiply primops by sewardj · 19 years ago
  99. 206c364 New irops: Iop_CmpGT32Fx4, Iop_CmpGE32Fx4 by cerion · 19 years ago
  100. 059601a Revise the PPC32 subarchitecture kinds, so as to facilitated by sewardj · 19 years ago