blob: db2493590eb65f89798888597f1942e368cf7904 [file] [log] [blame]
Chia-I Wu9737a102014-08-07 07:59:51 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu9737a102014-08-07 07:59:51 +080026 */
27
Chia-I Wu9737a102014-08-07 07:59:51 +080028#include "dev.h"
29#include "mem.h"
30#include "event.h"
31
32static XGL_RESULT event_map(struct intel_event *event, uint32_t **ptr_ret)
33{
34 void *ptr;
35
36 if (!event->obj.mem)
37 return XGL_ERROR_MEMORY_NOT_BOUND;
38
39 /*
40 * This is an unsynchronous mapping. It doesn't look like we want a
41 * synchronous mapping. But it is also unclear what would happen when GPU
42 * writes to it at the same time. We need atomicy here.
43 */
44 ptr = intel_mem_map(event->obj.mem, 0);
45 if (!ptr)
46 return XGL_ERROR_MEMORY_MAP_FAILED;
47
48 *ptr_ret = (uint32_t *) ((uint8_t *) ptr + event->obj.offset);
49
50 return XGL_SUCCESS;
51}
52
53static void event_unmap(struct intel_event *event)
54{
55 intel_mem_unmap(event->obj.mem);
56}
57
58static XGL_RESULT event_write(struct intel_event *event, uint32_t val)
59{
60 XGL_RESULT ret;
61 uint32_t *ptr;
62
63 ret = event_map(event, &ptr);
64 if (ret == XGL_SUCCESS) {
65 *ptr = val;
66 event_unmap(event);
67 }
68
69 return ret;
70}
71
72static XGL_RESULT event_read(struct intel_event *event, uint32_t *val)
73{
74 XGL_RESULT ret;
75 uint32_t *ptr;
76
77 ret = event_map(event, &ptr);
78 if (ret == XGL_SUCCESS) {
79 *val = *ptr;
80 event_unmap(event);
81 }
82
83 return ret;
84}
85
Chia-I Wu26f0bd02014-08-07 10:38:40 +080086static void event_destroy(struct intel_obj *obj)
Chia-I Wu9737a102014-08-07 07:59:51 +080087{
88 struct intel_event *event = intel_event_from_obj(obj);
89
90 intel_event_destroy(event);
91}
92
Chia-I Wu26f0bd02014-08-07 10:38:40 +080093static XGL_RESULT event_get_info(struct intel_base *base, int type,
94 XGL_SIZE *size, XGL_VOID *data)
95{
96 XGL_RESULT ret = XGL_SUCCESS;
97
98 switch (type) {
99 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
100 {
101 XGL_MEMORY_REQUIREMENTS *mem_req = data;
102
103 /* use dword aligned to 64-byte boundaries */
104 mem_req->size = 4;
105 mem_req->alignment = 64;
106 mem_req->heapCount = 1;
107 mem_req->heaps[0] = 0;
108
109 *size = sizeof(*mem_req);
110 }
111 break;
112 default:
113 ret = intel_base_get_info(base, type, size, data);
114 break;
115 }
116
117 return ret;
118}
119
Chia-I Wu9737a102014-08-07 07:59:51 +0800120XGL_RESULT intel_event_create(struct intel_dev *dev,
121 const XGL_EVENT_CREATE_INFO *info,
122 struct intel_event **event_ret)
123{
124 struct intel_event *event;
Chia-I Wu9737a102014-08-07 07:59:51 +0800125
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600126 event = (struct intel_event *) intel_base_create(dev, sizeof(*event),
Chia-I Wubbf2c932014-08-07 12:20:08 +0800127 dev->base.dbg, XGL_DBG_OBJECT_EVENT, info, 0);
Chia-I Wu9737a102014-08-07 07:59:51 +0800128 if (!event)
129 return XGL_ERROR_OUT_OF_MEMORY;
130
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800131 event->obj.base.get_info = event_get_info;
Chia-I Wubbf2c932014-08-07 12:20:08 +0800132 event->obj.destroy = event_destroy;
Chia-I Wu9737a102014-08-07 07:59:51 +0800133
134 *event_ret = event;
135
136 return XGL_SUCCESS;
137}
138
139void intel_event_destroy(struct intel_event *event)
140{
Chia-I Wubbf2c932014-08-07 12:20:08 +0800141 intel_base_destroy(&event->obj.base);
Chia-I Wu9737a102014-08-07 07:59:51 +0800142}
143
144XGL_RESULT intel_event_set(struct intel_event *event)
145{
146 return event_write(event, 1);
147}
148
149XGL_RESULT intel_event_reset(struct intel_event *event)
150{
151 return event_write(event, 0);
152}
153
154XGL_RESULT intel_event_get_status(struct intel_event *event)
155{
156 XGL_RESULT ret;
157 uint32_t val;
158
159 ret = event_read(event, &val);
160 if (ret != XGL_SUCCESS)
161 return ret;
162
163 return (val) ? XGL_EVENT_SET : XGL_EVENT_RESET;
164}
165
166XGL_RESULT XGLAPI intelCreateEvent(
167 XGL_DEVICE device,
168 const XGL_EVENT_CREATE_INFO* pCreateInfo,
169 XGL_EVENT* pEvent)
170{
171 struct intel_dev *dev = intel_dev(device);
172
173 return intel_event_create(dev, pCreateInfo,
174 (struct intel_event **) pEvent);
175}
176
177XGL_RESULT XGLAPI intelGetEventStatus(
178 XGL_EVENT event_)
179{
180 struct intel_event *event = intel_event(event_);
181
182 return intel_event_get_status(event);
183}
184
185XGL_RESULT XGLAPI intelSetEvent(
186 XGL_EVENT event_)
187{
188 struct intel_event *event = intel_event(event_);
189
190 return intel_event_set(event);
191}
192
193XGL_RESULT XGLAPI intelResetEvent(
194 XGL_EVENT event_)
195{
196 struct intel_event *event = intel_event(event_);
197
198 return intel_event_reset(event);
199}