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Chia-I Wuf9911eb2014-08-06 13:50:31 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wuf9911eb2014-08-06 13:50:31 +080026 */
27
28#ifndef MEM_H
29#define MEM_H
30
Chia-I Wu37fe8412014-08-07 13:34:57 +080031#include "kmd/winsys.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080032#include "intel.h"
Chia-I Wu3ada4cb2014-08-30 18:55:54 +080033#include "obj.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080034
Chia-I Wuf9911eb2014-08-06 13:50:31 +080035struct intel_mem {
36 struct intel_base base;
37
38 struct intel_bo *bo;
Chia-I Wu000747d2014-08-20 15:39:36 +080039 XGL_GPU_SIZE size;
Chia-I Wuf9911eb2014-08-06 13:50:31 +080040};
41
42XGL_RESULT intel_mem_alloc(struct intel_dev *dev,
43 const XGL_MEMORY_ALLOC_INFO *info,
44 struct intel_mem **mem_ret);
45void intel_mem_free(struct intel_mem *mem);
46
47XGL_RESULT intel_mem_set_priority(struct intel_mem *mem,
48 XGL_MEMORY_PRIORITY priority);
49
Chia-I Wu37fe8412014-08-07 13:34:57 +080050static inline void *intel_mem_map(struct intel_mem *mem, XGL_FLAGS flags)
51{
Chia-I Wu32a22462014-08-26 14:13:46 +080052 return intel_bo_map_gtt_async(mem->bo);
Chia-I Wu37fe8412014-08-07 13:34:57 +080053}
54
55static inline void *intel_mem_map_sync(struct intel_mem *mem, bool rw)
56{
57 return intel_bo_map(mem->bo, rw);
58}
59
60static inline void intel_mem_unmap(struct intel_mem *mem)
61{
62 intel_bo_unmap(mem->bo);
63}
64
65static inline bool intel_mem_is_busy(struct intel_mem *mem)
66{
67 return intel_bo_is_busy(mem->bo);
68}
Chia-I Wuf9911eb2014-08-06 13:50:31 +080069
70static inline struct intel_mem *intel_mem(XGL_GPU_MEMORY mem)
71{
72 return (struct intel_mem *) mem;
73}
74
75XGL_RESULT XGLAPI intelAllocMemory(
76 XGL_DEVICE device,
77 const XGL_MEMORY_ALLOC_INFO* pAllocInfo,
78 XGL_GPU_MEMORY* pMem);
79
80XGL_RESULT XGLAPI intelFreeMemory(
81 XGL_GPU_MEMORY mem);
82
83XGL_RESULT XGLAPI intelSetMemoryPriority(
84 XGL_GPU_MEMORY mem,
85 XGL_MEMORY_PRIORITY priority);
86
87XGL_RESULT XGLAPI intelMapMemory(
88 XGL_GPU_MEMORY mem,
89 XGL_FLAGS flags,
90 XGL_VOID** ppData);
91
92XGL_RESULT XGLAPI intelUnmapMemory(
93 XGL_GPU_MEMORY mem);
94
Chia-I Wu251e7d92014-08-19 13:35:42 +080095XGL_RESULT XGLAPI intelPinSystemMemory(
96 XGL_DEVICE device,
97 const XGL_VOID* pSysMem,
98 XGL_SIZE memSize,
99 XGL_GPU_MEMORY* pMem);
100
101XGL_RESULT XGLAPI intelRemapVirtualMemoryPages(
102 XGL_DEVICE device,
103 XGL_UINT rangeCount,
104 const XGL_VIRTUAL_MEMORY_REMAP_RANGE* pRanges,
105 XGL_UINT preWaitSemaphoreCount,
106 const XGL_QUEUE_SEMAPHORE* pPreWaitSemaphores,
107 XGL_UINT postSignalSemaphoreCount,
108 const XGL_QUEUE_SEMAPHORE* pPostSignalSemaphores);
109
110XGL_RESULT XGLAPI intelOpenSharedMemory(
111 XGL_DEVICE device,
112 const XGL_MEMORY_OPEN_INFO* pOpenInfo,
113 XGL_GPU_MEMORY* pMem);
114
115XGL_RESULT XGLAPI intelOpenPeerMemory(
116 XGL_DEVICE device,
117 const XGL_PEER_MEMORY_OPEN_INFO* pOpenInfo,
118 XGL_GPU_MEMORY* pMem);
119
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800120#endif /* MEM_H */