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Chia-I Wu09142132014-08-11 15:42:55 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
Chia-I Wu730e5362014-08-19 12:15:09 +080025#include "genhw/genhw.h"
26#include "kmd/winsys.h"
27#include "dev.h"
Chia-I Wu343b1372014-08-20 16:39:20 +080028#include "mem.h"
Chia-I Wu730e5362014-08-19 12:15:09 +080029#include "obj.h"
Chia-I Wu00a23b22014-08-20 15:28:08 +080030#include "cmd_priv.h"
Chia-I Wu09142132014-08-11 15:42:55 +080031
Chia-I Wue24c3292014-08-21 14:05:23 +080032static XGL_RESULT cmd_writer_alloc_and_map(struct intel_cmd *cmd,
33 struct intel_cmd_writer *writer,
34 XGL_UINT size)
Chia-I Wu730e5362014-08-19 12:15:09 +080035{
36 struct intel_winsys *winsys = cmd->dev->winsys;
Chia-I Wue24c3292014-08-21 14:05:23 +080037 const XGL_GPU_SIZE bo_size = sizeof(uint32_t) * size;
Chia-I Wu730e5362014-08-19 12:15:09 +080038 struct intel_bo *bo;
39 void *ptr;
40
41 bo = intel_winsys_alloc_buffer(winsys,
42 "batch buffer", bo_size, INTEL_DOMAIN_CPU);
43 if (!bo)
44 return XGL_ERROR_OUT_OF_GPU_MEMORY;
45
46 ptr = intel_bo_map(bo, true);
47 if (!bo) {
48 intel_bo_unreference(bo);
49 return XGL_ERROR_MEMORY_MAP_FAILED;
50 }
51
Chia-I Wue24c3292014-08-21 14:05:23 +080052 writer->bo = bo;
53 writer->ptr_opaque = ptr;
54 writer->size = size;
55 writer->used = 0;
Chia-I Wu730e5362014-08-19 12:15:09 +080056
57 return XGL_SUCCESS;
58}
59
Chia-I Wu5e25c272014-08-21 20:19:12 +080060static void cmd_writer_copy(struct intel_cmd *cmd,
61 struct intel_cmd_writer *writer,
62 const uint32_t *vals, XGL_UINT len)
63{
64 assert(writer->used + len <= writer->size);
65 memcpy((uint32_t *) writer->ptr_opaque + writer->used,
66 vals, sizeof(uint32_t) * len);
67 writer->used += len;
68}
69
70static void cmd_writer_patch(struct intel_cmd *cmd,
71 struct intel_cmd_writer *writer,
72 XGL_UINT pos, uint32_t val)
73{
74 assert(pos < writer->used);
75 ((uint32_t *) writer->ptr_opaque)[pos] = val;
76}
77
Chia-I Wue24c3292014-08-21 14:05:23 +080078void cmd_writer_grow(struct intel_cmd *cmd,
79 struct intel_cmd_writer *writer)
Chia-I Wu730e5362014-08-19 12:15:09 +080080{
Chia-I Wue24c3292014-08-21 14:05:23 +080081 const XGL_UINT size = writer->size << 1;
82 const XGL_UINT old_used = writer->used;
83 struct intel_bo *old_bo = writer->bo;
84 void *old_ptr = writer->ptr_opaque;
85
86 if (size >= writer->size &&
87 cmd_writer_alloc_and_map(cmd, writer, size) == XGL_SUCCESS) {
88 cmd_writer_copy(cmd, writer, (const uint32_t *) old_ptr, old_used);
89
90 intel_bo_unmap(old_bo);
91 intel_bo_unreference(old_bo);
92 } else {
93 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
94 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
95 "failed to grow command buffer of size %u", writer->size);
96
97 /* wrap it and fail silently */
98 writer->used = 0;
99 cmd->result = XGL_ERROR_OUT_OF_GPU_MEMORY;
100 }
Chia-I Wu730e5362014-08-19 12:15:09 +0800101}
102
Chia-I Wue24c3292014-08-21 14:05:23 +0800103static void cmd_writer_unmap(struct intel_cmd *cmd,
104 struct intel_cmd_writer *writer)
Chia-I Wu730e5362014-08-19 12:15:09 +0800105{
Chia-I Wue24c3292014-08-21 14:05:23 +0800106 intel_bo_unmap(writer->bo);
107 writer->ptr_opaque = NULL;
108}
109
110static void cmd_writer_free(struct intel_cmd *cmd,
111 struct intel_cmd_writer *writer)
112{
113 intel_bo_unreference(writer->bo);
114 writer->bo = NULL;
115}
116
117static void cmd_writer_reset(struct intel_cmd *cmd,
118 struct intel_cmd_writer *writer)
119{
120 /* do not reset writer->size as we want to know how big it has grown to */
121 writer->used = 0;
122
123 if (writer->ptr_opaque)
124 cmd_writer_unmap(cmd, writer);
125 if (writer->bo)
126 cmd_writer_free(cmd, writer);
127}
128
129static void cmd_unmap(struct intel_cmd *cmd)
130{
131 cmd_writer_unmap(cmd, &cmd->batch);
Chia-I Wu24565ee2014-08-21 20:24:31 +0800132 cmd_writer_unmap(cmd, &cmd->state);
Chia-I Wu730e5362014-08-19 12:15:09 +0800133}
134
135static void cmd_reset(struct intel_cmd *cmd)
136{
Chia-I Wue24c3292014-08-21 14:05:23 +0800137 cmd_writer_reset(cmd, &cmd->batch);
Chia-I Wu24565ee2014-08-21 20:24:31 +0800138 cmd_writer_reset(cmd, &cmd->state);
Chia-I Wu343b1372014-08-20 16:39:20 +0800139 cmd->reloc_used = 0;
Chia-I Wu04966702014-08-20 15:05:03 +0800140 cmd->result = XGL_SUCCESS;
Chia-I Wu730e5362014-08-19 12:15:09 +0800141}
142
143static void cmd_destroy(struct intel_obj *obj)
144{
145 struct intel_cmd *cmd = intel_cmd_from_obj(obj);
146
147 intel_cmd_destroy(cmd);
148}
149
150XGL_RESULT intel_cmd_create(struct intel_dev *dev,
151 const XGL_CMD_BUFFER_CREATE_INFO *info,
152 struct intel_cmd **cmd_ret)
153{
154 struct intel_cmd *cmd;
155
156 cmd = (struct intel_cmd *) intel_base_create(dev, sizeof(*cmd),
157 dev->base.dbg, XGL_DBG_OBJECT_CMD_BUFFER, info, 0);
158 if (!cmd)
159 return XGL_ERROR_OUT_OF_MEMORY;
160
161 cmd->obj.destroy = cmd_destroy;
162
163 cmd->dev = dev;
Chia-I Wue24c3292014-08-21 14:05:23 +0800164
Chia-I Wu343b1372014-08-20 16:39:20 +0800165 cmd->reloc_count = dev->gpu->batch_buffer_reloc_count;
166 cmd->relocs = icd_alloc(sizeof(cmd->relocs[0]) * cmd->reloc_count,
167 4096, XGL_SYSTEM_ALLOC_INTERNAL);
168 if (!cmd->relocs) {
169 intel_cmd_destroy(cmd);
170 return XGL_ERROR_OUT_OF_MEMORY;
171 }
Chia-I Wu730e5362014-08-19 12:15:09 +0800172
173 *cmd_ret = cmd;
174
175 return XGL_SUCCESS;
176}
177
178void intel_cmd_destroy(struct intel_cmd *cmd)
179{
180 cmd_reset(cmd);
Chia-I Wue24c3292014-08-21 14:05:23 +0800181
182 icd_free(cmd->relocs);
Chia-I Wu730e5362014-08-19 12:15:09 +0800183 intel_base_destroy(&cmd->obj.base);
184}
185
186XGL_RESULT intel_cmd_begin(struct intel_cmd *cmd, XGL_FLAGS flags)
187{
Chia-I Wu24565ee2014-08-21 20:24:31 +0800188 XGL_RESULT ret;
Chia-I Wu730e5362014-08-19 12:15:09 +0800189
190 cmd_reset(cmd);
191
Chia-I Wu24565ee2014-08-21 20:24:31 +0800192 if (cmd->flags != flags) {
Chia-I Wue24c3292014-08-21 14:05:23 +0800193 cmd->flags = flags;
Chia-I Wu24565ee2014-08-21 20:24:31 +0800194 cmd->batch.size = 0;
Chia-I Wu730e5362014-08-19 12:15:09 +0800195 }
196
Chia-I Wu24565ee2014-08-21 20:24:31 +0800197 if (!cmd->batch.size) {
198 XGL_UINT divider = sizeof(uint32_t) * 2;
199
200 if (flags & XGL_CMD_BUFFER_OPTIMIZE_GPU_SMALL_BATCH_BIT)
201 divider *= 4;
202
203 cmd->batch.size = cmd->dev->gpu->max_batch_buffer_size / divider;
204 cmd->state.size = cmd->dev->gpu->max_batch_buffer_size / divider;
205 }
206
207 ret = cmd_writer_alloc_and_map(cmd, &cmd->batch, cmd->batch.size);
208 if (ret)
209 return ret;
210
211 ret = cmd_writer_alloc_and_map(cmd, &cmd->state, cmd->state.size);
212 if (ret) {
213 cmd_writer_reset(cmd, &cmd->batch);
214 return ret;
215 }
216
217 return XGL_SUCCESS;
Chia-I Wu730e5362014-08-19 12:15:09 +0800218}
219
220XGL_RESULT intel_cmd_end(struct intel_cmd *cmd)
221{
222 struct intel_winsys *winsys = cmd->dev->winsys;
Chia-I Wu343b1372014-08-20 16:39:20 +0800223 XGL_UINT i;
Chia-I Wu730e5362014-08-19 12:15:09 +0800224
Chia-I Wue24c3292014-08-21 14:05:23 +0800225 cmd_batch_end(cmd);
Chia-I Wu730e5362014-08-19 12:15:09 +0800226
Chia-I Wu343b1372014-08-20 16:39:20 +0800227 /* TODO we need a more "explicit" winsys */
Chia-I Wufdfb8ed2014-08-21 15:40:07 +0800228 for (i = 0; i < cmd->reloc_used; i++) {
Chia-I Wu343b1372014-08-20 16:39:20 +0800229 const struct intel_cmd_reloc *reloc = &cmd->relocs[i];
230 uint64_t presumed_offset;
231 int err;
232
Chia-I Wue24c3292014-08-21 14:05:23 +0800233 err = intel_bo_add_reloc(reloc->writer->bo,
234 sizeof(uint32_t) * reloc->pos, reloc->mem->bo, reloc->val,
235 reloc->read_domains, reloc->write_domain, &presumed_offset);
Chia-I Wu343b1372014-08-20 16:39:20 +0800236 if (err) {
237 cmd->result = XGL_ERROR_UNKNOWN;
238 break;
239 }
240
241 assert(presumed_offset == (uint64_t) (uint32_t) presumed_offset);
Chia-I Wue24c3292014-08-21 14:05:23 +0800242 cmd_writer_patch(cmd, reloc->writer, reloc->pos,
243 (uint32_t) presumed_offset);
Chia-I Wu343b1372014-08-20 16:39:20 +0800244 }
245
Chia-I Wu730e5362014-08-19 12:15:09 +0800246 cmd_unmap(cmd);
247
Chia-I Wu04966702014-08-20 15:05:03 +0800248 if (cmd->result != XGL_SUCCESS)
249 return cmd->result;
Chia-I Wue24c3292014-08-21 14:05:23 +0800250
251 if (intel_winsys_can_submit_bo(winsys, &cmd->batch.bo, 1))
Chia-I Wu730e5362014-08-19 12:15:09 +0800252 return XGL_SUCCESS;
253 else
254 return XGL_ERROR_TOO_MANY_MEMORY_REFERENCES;
255}
256
Chia-I Wu09142132014-08-11 15:42:55 +0800257XGL_RESULT XGLAPI intelCreateCommandBuffer(
258 XGL_DEVICE device,
259 const XGL_CMD_BUFFER_CREATE_INFO* pCreateInfo,
260 XGL_CMD_BUFFER* pCmdBuffer)
261{
Chia-I Wu730e5362014-08-19 12:15:09 +0800262 struct intel_dev *dev = intel_dev(device);
263
264 return intel_cmd_create(dev, pCreateInfo,
265 (struct intel_cmd **) pCmdBuffer);
Chia-I Wu09142132014-08-11 15:42:55 +0800266}
267
268XGL_RESULT XGLAPI intelBeginCommandBuffer(
269 XGL_CMD_BUFFER cmdBuffer,
270 XGL_FLAGS flags)
271{
Chia-I Wu730e5362014-08-19 12:15:09 +0800272 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
273
274 return intel_cmd_begin(cmd, flags);
Chia-I Wu09142132014-08-11 15:42:55 +0800275}
276
277XGL_RESULT XGLAPI intelEndCommandBuffer(
278 XGL_CMD_BUFFER cmdBuffer)
279{
Chia-I Wu730e5362014-08-19 12:15:09 +0800280 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
281
282 return intel_cmd_end(cmd);
Chia-I Wu09142132014-08-11 15:42:55 +0800283}
284
285XGL_RESULT XGLAPI intelResetCommandBuffer(
286 XGL_CMD_BUFFER cmdBuffer)
287{
Chia-I Wu730e5362014-08-19 12:15:09 +0800288 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
289
290 cmd_reset(cmd);
291
292 return XGL_SUCCESS;
Chia-I Wu09142132014-08-11 15:42:55 +0800293}
294
Chia-I Wu09142132014-08-11 15:42:55 +0800295XGL_VOID XGLAPI intelCmdPrepareMemoryRegions(
296 XGL_CMD_BUFFER cmdBuffer,
297 XGL_UINT transitionCount,
298 const XGL_MEMORY_STATE_TRANSITION* pStateTransitions)
299{
300}
301
302XGL_VOID XGLAPI intelCmdPrepareImages(
303 XGL_CMD_BUFFER cmdBuffer,
304 XGL_UINT transitionCount,
305 const XGL_IMAGE_STATE_TRANSITION* pStateTransitions)
306{
307}
308
Chia-I Wu09142132014-08-11 15:42:55 +0800309XGL_VOID XGLAPI intelCmdCopyMemory(
310 XGL_CMD_BUFFER cmdBuffer,
311 XGL_GPU_MEMORY srcMem,
312 XGL_GPU_MEMORY destMem,
313 XGL_UINT regionCount,
314 const XGL_MEMORY_COPY* pRegions)
315{
316}
317
318XGL_VOID XGLAPI intelCmdCopyImage(
319 XGL_CMD_BUFFER cmdBuffer,
320 XGL_IMAGE srcImage,
321 XGL_IMAGE destImage,
322 XGL_UINT regionCount,
323 const XGL_IMAGE_COPY* pRegions)
324{
325}
326
327XGL_VOID XGLAPI intelCmdCopyMemoryToImage(
328 XGL_CMD_BUFFER cmdBuffer,
329 XGL_GPU_MEMORY srcMem,
330 XGL_IMAGE destImage,
331 XGL_UINT regionCount,
332 const XGL_MEMORY_IMAGE_COPY* pRegions)
333{
334}
335
336XGL_VOID XGLAPI intelCmdCopyImageToMemory(
337 XGL_CMD_BUFFER cmdBuffer,
338 XGL_IMAGE srcImage,
339 XGL_GPU_MEMORY destMem,
340 XGL_UINT regionCount,
341 const XGL_MEMORY_IMAGE_COPY* pRegions)
342{
343}
344
345XGL_VOID XGLAPI intelCmdCloneImageData(
346 XGL_CMD_BUFFER cmdBuffer,
347 XGL_IMAGE srcImage,
348 XGL_IMAGE_STATE srcImageState,
349 XGL_IMAGE destImage,
350 XGL_IMAGE_STATE destImageState)
351{
352}
353
354XGL_VOID XGLAPI intelCmdUpdateMemory(
355 XGL_CMD_BUFFER cmdBuffer,
356 XGL_GPU_MEMORY destMem,
357 XGL_GPU_SIZE destOffset,
358 XGL_GPU_SIZE dataSize,
359 const XGL_UINT32* pData)
360{
361}
362
363XGL_VOID XGLAPI intelCmdFillMemory(
364 XGL_CMD_BUFFER cmdBuffer,
365 XGL_GPU_MEMORY destMem,
366 XGL_GPU_SIZE destOffset,
367 XGL_GPU_SIZE fillSize,
368 XGL_UINT32 data)
369{
370}
371
372XGL_VOID XGLAPI intelCmdClearColorImage(
373 XGL_CMD_BUFFER cmdBuffer,
374 XGL_IMAGE image,
375 const XGL_FLOAT color[4],
376 XGL_UINT rangeCount,
377 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
378{
379}
380
381XGL_VOID XGLAPI intelCmdClearColorImageRaw(
382 XGL_CMD_BUFFER cmdBuffer,
383 XGL_IMAGE image,
384 const XGL_UINT32 color[4],
385 XGL_UINT rangeCount,
386 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
387{
388}
389
390XGL_VOID XGLAPI intelCmdClearDepthStencil(
391 XGL_CMD_BUFFER cmdBuffer,
392 XGL_IMAGE image,
393 XGL_FLOAT depth,
394 XGL_UINT32 stencil,
395 XGL_UINT rangeCount,
396 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
397{
398}
399
400XGL_VOID XGLAPI intelCmdResolveImage(
401 XGL_CMD_BUFFER cmdBuffer,
402 XGL_IMAGE srcImage,
403 XGL_IMAGE destImage,
404 XGL_UINT rectCount,
405 const XGL_IMAGE_RESOLVE* pRects)
406{
407}
408
409XGL_VOID XGLAPI intelCmdSetEvent(
410 XGL_CMD_BUFFER cmdBuffer,
411 XGL_EVENT event)
412{
413}
414
415XGL_VOID XGLAPI intelCmdResetEvent(
416 XGL_CMD_BUFFER cmdBuffer,
417 XGL_EVENT event)
418{
419}
420
421XGL_VOID XGLAPI intelCmdMemoryAtomic(
422 XGL_CMD_BUFFER cmdBuffer,
423 XGL_GPU_MEMORY destMem,
424 XGL_GPU_SIZE destOffset,
425 XGL_UINT64 srcData,
426 XGL_ATOMIC_OP atomicOp)
427{
428}
429
430XGL_VOID XGLAPI intelCmdBeginQuery(
431 XGL_CMD_BUFFER cmdBuffer,
432 XGL_QUERY_POOL queryPool,
433 XGL_UINT slot,
434 XGL_FLAGS flags)
435{
436}
437
438XGL_VOID XGLAPI intelCmdEndQuery(
439 XGL_CMD_BUFFER cmdBuffer,
440 XGL_QUERY_POOL queryPool,
441 XGL_UINT slot)
442{
443}
444
445XGL_VOID XGLAPI intelCmdResetQueryPool(
446 XGL_CMD_BUFFER cmdBuffer,
447 XGL_QUERY_POOL queryPool,
448 XGL_UINT startQuery,
449 XGL_UINT queryCount)
450{
451}
452
453XGL_VOID XGLAPI intelCmdWriteTimestamp(
454 XGL_CMD_BUFFER cmdBuffer,
455 XGL_TIMESTAMP_TYPE timestampType,
456 XGL_GPU_MEMORY destMem,
457 XGL_GPU_SIZE destOffset)
458{
459}
460
461XGL_VOID XGLAPI intelCmdInitAtomicCounters(
462 XGL_CMD_BUFFER cmdBuffer,
463 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
464 XGL_UINT startCounter,
465 XGL_UINT counterCount,
466 const XGL_UINT32* pData)
467{
468}
469
470XGL_VOID XGLAPI intelCmdLoadAtomicCounters(
471 XGL_CMD_BUFFER cmdBuffer,
472 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
473 XGL_UINT startCounter,
474 XGL_UINT counterCount,
475 XGL_GPU_MEMORY srcMem,
476 XGL_GPU_SIZE srcOffset)
477{
478}
479
480XGL_VOID XGLAPI intelCmdSaveAtomicCounters(
481 XGL_CMD_BUFFER cmdBuffer,
482 XGL_PIPELINE_BIND_POINT pipelineBindPoint,
483 XGL_UINT startCounter,
484 XGL_UINT counterCount,
485 XGL_GPU_MEMORY destMem,
486 XGL_GPU_SIZE destOffset)
487{
488}
489
490XGL_VOID XGLAPI intelCmdDbgMarkerBegin(
491 XGL_CMD_BUFFER cmdBuffer,
492 const XGL_CHAR* pMarker)
493{
494}
495
496XGL_VOID XGLAPI intelCmdDbgMarkerEnd(
497 XGL_CMD_BUFFER cmdBuffer)
498{
499}