blob: 057912223d1e13c05d205e987f23dce2efd69dc6 [file] [log] [blame]
Chia-I Wu4ea339e2014-08-08 21:56:26 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu4ea339e2014-08-08 21:56:26 +080026 */
27
Chia-I Wu1db76e02014-09-15 14:21:14 +080028#include <unistd.h>
Chia-I Wue46da3e2014-08-08 21:52:48 +080029#include "kmd/winsys.h"
30#include "dev.h"
31#include "gpu.h"
Chia-I Wu1db76e02014-09-15 14:21:14 +080032#include "mem.h"
Chia-I Wue46da3e2014-08-08 21:52:48 +080033#include "img.h"
Chia-I Wu4ea339e2014-08-08 21:56:26 +080034
Chia-I Wu4ea339e2014-08-08 21:56:26 +080035/*
36 * From the Ivy Bridge PRM, volume 1 part 1, page 105:
37 *
38 * "In addition to restrictions on maximum height, width, and depth,
39 * surfaces are also restricted to a maximum size in bytes. This
40 * maximum is 2 GB for all products and all surface types."
41 */
Chia-I Wue46da3e2014-08-08 21:52:48 +080042static const size_t intel_max_resource_size = 1u << 31;
Chia-I Wu4ea339e2014-08-08 21:56:26 +080043
Chia-I Wufeb441f2014-08-08 21:27:38 +080044static void img_destroy(struct intel_obj *obj)
45{
46 struct intel_img *img = intel_img_from_obj(obj);
47
48 intel_img_destroy(img);
49}
50
51static XGL_RESULT img_get_info(struct intel_base *base, int type,
52 XGL_SIZE *size, XGL_VOID *data)
53{
54 struct intel_img *img = intel_img_from_base(base);
55 XGL_RESULT ret = XGL_SUCCESS;
56
57 switch (type) {
58 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
59 {
60 XGL_MEMORY_REQUIREMENTS *mem_req = data;
61
Jon Ashburn408daec2014-12-05 09:23:52 -070062 *size = sizeof(XGL_MEMORY_REQUIREMENTS);
63 if (data == NULL)
64 return ret;
Chia-I Wu9b752e12014-08-15 16:21:44 +080065 mem_req->size = img->total_size;
Chia-I Wufeb441f2014-08-08 21:27:38 +080066 mem_req->alignment = 4096;
Jon Ashburnd8031332015-01-22 10:52:13 -070067 mem_req->memType = XGL_MEMORY_TYPE_IMAGE;
Chia-I Wufeb441f2014-08-08 21:27:38 +080068 }
69 break;
Jon Ashburnc6ae13d2015-01-19 15:00:26 -070070 case XGL_INFO_TYPE_IMAGE_MEMORY_REQUIREMENTS:
71 {
72 XGL_IMAGE_MEMORY_REQUIREMENTS *img_req = data;
73
74 *size = sizeof(XGL_IMAGE_MEMORY_REQUIREMENTS);
75 if (data == NULL)
76 return ret;
77 img_req->usage = img->usage;
78 img_req->formatClass = img->format_class;
79 img_req->samples = img->samples;
80 }
81 break;
82 case XGL_INFO_TYPE_BUFFER_MEMORY_REQUIREMENTS:
83 {
84 XGL_BUFFER_MEMORY_REQUIREMENTS *buf_req = data;
85
86 *size = sizeof(XGL_IMAGE_MEMORY_REQUIREMENTS);
87 if (data == NULL)
88 return ret;
89 buf_req->usage = img->usage;
90 }
91 break;
Chia-I Wufeb441f2014-08-08 21:27:38 +080092 default:
93 ret = intel_base_get_info(base, type, size, data);
94 break;
95 }
96
97 return ret;
98}
99
100XGL_RESULT intel_img_create(struct intel_dev *dev,
101 const XGL_IMAGE_CREATE_INFO *info,
Chia-I Wu794d12a2014-09-15 14:55:25 +0800102 bool scanout,
Chia-I Wufeb441f2014-08-08 21:27:38 +0800103 struct intel_img **img_ret)
104{
Chia-I Wufeb441f2014-08-08 21:27:38 +0800105 struct intel_img *img;
Chia-I Wu37cba152014-08-15 16:03:10 +0800106 struct intel_layout *layout;
Chia-I Wufeb441f2014-08-08 21:27:38 +0800107
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600108 img = (struct intel_img *) intel_base_create(dev, sizeof(*img),
Chia-I Wufeb441f2014-08-08 21:27:38 +0800109 dev->base.dbg, XGL_DBG_OBJECT_IMAGE, info, 0);
110 if (!img)
111 return XGL_ERROR_OUT_OF_MEMORY;
112
Chia-I Wu37cba152014-08-15 16:03:10 +0800113 layout = &img->layout;
114
Chia-I Wueb2da592014-08-16 14:19:39 +0800115 img->type = info->imageType;
Chia-I Wu73e326f2014-08-21 11:07:57 +0800116 img->depth = info->extent.depth;
Chia-I Wuaa759372014-10-18 12:47:35 +0800117 img->mip_levels = info->mipLevels;
Chia-I Wueb2da592014-08-16 14:19:39 +0800118 img->array_size = info->arraySize;
Jon Ashburnc6ae13d2015-01-19 15:00:26 -0700119 img->usage = info->usage;
Jon Ashburn3cda13b2015-01-20 17:22:07 -0700120 if (info->tiling == XGL_LINEAR_TILING)
121 img->format_class = XGL_IMAGE_FORMAT_CLASS_LINEAR;
122 else
123 img->format_class = icd_format_get_class(info->format);
Chia-I Wueb2da592014-08-16 14:19:39 +0800124 img->samples = info->samples;
Chia-I Wu794d12a2014-09-15 14:55:25 +0800125 intel_layout_init(layout, dev, info, scanout);
Chia-I Wu37cba152014-08-15 16:03:10 +0800126
127 if (layout->bo_stride > intel_max_resource_size / layout->bo_height) {
128 intel_dev_log(dev, XGL_DBG_MSG_ERROR, XGL_VALIDATION_LEVEL_0,
129 XGL_NULL_HANDLE, 0, 0, "image too big");
130 intel_img_destroy(img);
131 return XGL_ERROR_INVALID_MEMORY_SIZE;
132 }
Chia-I Wufeb441f2014-08-08 21:27:38 +0800133
Chia-I Wu9b752e12014-08-15 16:21:44 +0800134 img->total_size = img->layout.bo_stride * img->layout.bo_height;
135
Chia-I Wu457d0a62014-08-18 13:02:26 +0800136 if (layout->aux != INTEL_LAYOUT_AUX_NONE) {
Chia-I Wu9b752e12014-08-15 16:21:44 +0800137 img->aux_offset = u_align(img->total_size, 4096);
138 img->total_size = img->aux_offset +
139 layout->aux_stride * layout->aux_height;
140 }
141
142 if (layout->separate_stencil) {
143 XGL_IMAGE_CREATE_INFO s8_info;
144
145 img->s8_layout = icd_alloc(sizeof(*img->s8_layout), 0,
146 XGL_SYSTEM_ALLOC_INTERNAL);
147 if (!img->s8_layout) {
148 intel_img_destroy(img);
149 return XGL_ERROR_OUT_OF_MEMORY;
150 }
151
152 s8_info = *info;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700153 s8_info.format = XGL_FMT_S8_UINT;
154 assert(icd_format_is_ds(info->format));
Chia-I Wu9b752e12014-08-15 16:21:44 +0800155
Chia-I Wu794d12a2014-09-15 14:55:25 +0800156 intel_layout_init(img->s8_layout, dev, &s8_info, scanout);
Chia-I Wu9b752e12014-08-15 16:21:44 +0800157
158 img->s8_offset = u_align(img->total_size, 4096);
159 img->total_size = img->s8_offset +
160 img->s8_layout->bo_stride * img->s8_layout->bo_height;
Chia-I Wufeb441f2014-08-08 21:27:38 +0800161 }
162
Chia-I Wufeb441f2014-08-08 21:27:38 +0800163 img->obj.destroy = img_destroy;
164 img->obj.base.get_info = img_get_info;
165
Chia-I Wu1db76e02014-09-15 14:21:14 +0800166#ifdef ENABLE_WSI_X11
167 img->x11_prime_fd = -1;
168#endif
169
Chia-I Wufeb441f2014-08-08 21:27:38 +0800170 *img_ret = img;
171
172 return XGL_SUCCESS;
173}
174
175void intel_img_destroy(struct intel_img *img)
176{
Chia-I Wu1db76e02014-09-15 14:21:14 +0800177#ifdef ENABLE_WSI_X11
178 if (img->x11_prime_fd >= 0) {
179 close(img->x11_prime_fd);
180 intel_mem_free(img->obj.mem);
181 }
182#endif
183
Chia-I Wu9b752e12014-08-15 16:21:44 +0800184 if (img->s8_layout)
185 icd_free(img->s8_layout);
186
Chia-I Wufeb441f2014-08-08 21:27:38 +0800187 intel_base_destroy(&img->obj.base);
188}
189
Chia-I Wu96177272015-01-03 15:27:41 +0800190ICD_EXPORT XGL_RESULT XGLAPI xglOpenPeerImage(
Chia-I Wu251e7d92014-08-19 13:35:42 +0800191 XGL_DEVICE device,
192 const XGL_PEER_IMAGE_OPEN_INFO* pOpenInfo,
193 XGL_IMAGE* pImage,
194 XGL_GPU_MEMORY* pMem)
195{
196 return XGL_ERROR_UNAVAILABLE;
197}
198
Chia-I Wu96177272015-01-03 15:27:41 +0800199ICD_EXPORT XGL_RESULT XGLAPI xglCreateImage(
Chia-I Wufeb441f2014-08-08 21:27:38 +0800200 XGL_DEVICE device,
201 const XGL_IMAGE_CREATE_INFO* pCreateInfo,
202 XGL_IMAGE* pImage)
203{
204 struct intel_dev *dev = intel_dev(device);
205
Chia-I Wu794d12a2014-09-15 14:55:25 +0800206 return intel_img_create(dev, pCreateInfo, false,
207 (struct intel_img **) pImage);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800208}
209
Chia-I Wu96177272015-01-03 15:27:41 +0800210ICD_EXPORT XGL_RESULT XGLAPI xglGetImageSubresourceInfo(
Chia-I Wufeb441f2014-08-08 21:27:38 +0800211 XGL_IMAGE image,
212 const XGL_IMAGE_SUBRESOURCE* pSubresource,
213 XGL_SUBRESOURCE_INFO_TYPE infoType,
214 XGL_SIZE* pDataSize,
215 XGL_VOID* pData)
216{
217 const struct intel_img *img = intel_img(image);
218 XGL_RESULT ret = XGL_SUCCESS;
219
220 switch (infoType) {
221 case XGL_INFO_TYPE_SUBRESOURCE_LAYOUT:
222 {
223 XGL_SUBRESOURCE_LAYOUT *layout = (XGL_SUBRESOURCE_LAYOUT *) pData;
Chia-I Wu2b685d72014-08-14 13:45:37 +0800224 unsigned x, y;
225
226 intel_layout_get_slice_pos(&img->layout, pSubresource->mipLevel,
227 pSubresource->arraySlice, &x, &y);
228 intel_layout_pos_to_mem(&img->layout, x, y, &x, &y);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800229
230 *pDataSize = sizeof(XGL_SUBRESOURCE_LAYOUT);
231
Jon Ashburnbf4182c2014-12-04 15:22:01 -0700232 if (pData == NULL)
233 return ret;
Chia-I Wu457d0a62014-08-18 13:02:26 +0800234 layout->offset = intel_layout_mem_to_linear(&img->layout, x, y);
Chia-I Wu2b685d72014-08-14 13:45:37 +0800235 layout->size = intel_layout_get_slice_size(&img->layout,
236 pSubresource->mipLevel);
237 layout->rowPitch = img->layout.bo_stride;
238 layout->depthPitch = intel_layout_get_slice_stride(&img->layout,
239 pSubresource->mipLevel);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800240 }
241 break;
242 default:
243 ret = XGL_ERROR_INVALID_VALUE;
244 break;
245 }
246
247 return ret;
248}