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Chia-I Wu214dac62014-08-05 11:07:40 +08001/*
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -06002 * Vulkan
Chia-I Wu214dac62014-08-05 11:07:40 +08003 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu214dac62014-08-05 11:07:40 +080026 */
27
28#include <stdio.h>
29#include <sys/types.h>
30#include <sys/stat.h>
31#include <fcntl.h>
32#include <unistd.h>
33
34#include "genhw/genhw.h"
Chia-I Wud8965932014-10-13 13:32:37 +080035#include "kmd/winsys.h"
Chia-I Wuec841722014-08-25 22:36:01 +080036#include "queue.h"
Chia-I Wu214dac62014-08-05 11:07:40 +080037#include "gpu.h"
Chia-I Wu032a2e32015-01-19 11:14:00 +080038#include "instance.h"
Chia-I Wu41858c82015-04-04 16:39:25 +080039#include "wsi.h"
Chia-I Wu1db76e02014-09-15 14:21:14 +080040
Chia-I Wu1076a872015-01-18 16:02:55 +080041static const char * const intel_gpu_exts[INTEL_EXT_COUNT] = {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -060042 [INTEL_EXT_WSI_X11] = "VK_WSI_X11",
Chia-I Wu1db76e02014-09-15 14:21:14 +080043};
Chia-I Wu214dac62014-08-05 11:07:40 +080044
Chia-I Wuf07865e2014-09-15 13:52:21 +080045static int gpu_open_primary_node(struct intel_gpu *gpu)
46{
Chia-I Wu41858c82015-04-04 16:39:25 +080047 if (gpu->primary_fd_internal < 0)
48 gpu->primary_fd_internal = open(gpu->primary_node, O_RDWR);
49
Chia-I Wuf07865e2014-09-15 13:52:21 +080050 return gpu->primary_fd_internal;
51}
52
53static void gpu_close_primary_node(struct intel_gpu *gpu)
54{
Chia-I Wu41858c82015-04-04 16:39:25 +080055 if (gpu->primary_fd_internal >= 0) {
56 close(gpu->primary_fd_internal);
Chia-I Wuf07865e2014-09-15 13:52:21 +080057 gpu->primary_fd_internal = -1;
Chia-I Wu41858c82015-04-04 16:39:25 +080058 }
Chia-I Wuf07865e2014-09-15 13:52:21 +080059}
60
61static int gpu_open_render_node(struct intel_gpu *gpu)
62{
63 if (gpu->render_fd_internal < 0 && gpu->render_node) {
64 gpu->render_fd_internal = open(gpu->render_node, O_RDWR);
65 if (gpu->render_fd_internal < 0) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -060066 intel_log(gpu, VK_DBG_MSG_ERROR, VK_VALIDATION_LEVEL_0, NULL, 0,
Chia-I Wuf07865e2014-09-15 13:52:21 +080067 0, "failed to open %s", gpu->render_node);
68 }
69 }
70
71 return gpu->render_fd_internal;
72}
73
74static void gpu_close_render_node(struct intel_gpu *gpu)
75{
76 if (gpu->render_fd_internal >= 0) {
77 close(gpu->render_fd_internal);
78 gpu->render_fd_internal = -1;
79 }
80}
81
Chia-I Wu214dac62014-08-05 11:07:40 +080082static const char *gpu_get_name(const struct intel_gpu *gpu)
83{
84 const char *name = NULL;
85
86 if (gen_is_hsw(gpu->devid)) {
87 if (gen_is_desktop(gpu->devid))
88 name = "Intel(R) Haswell Desktop";
89 else if (gen_is_mobile(gpu->devid))
90 name = "Intel(R) Haswell Mobile";
91 else if (gen_is_server(gpu->devid))
92 name = "Intel(R) Haswell Server";
93 }
94 else if (gen_is_ivb(gpu->devid)) {
95 if (gen_is_desktop(gpu->devid))
96 name = "Intel(R) Ivybridge Desktop";
97 else if (gen_is_mobile(gpu->devid))
98 name = "Intel(R) Ivybridge Mobile";
99 else if (gen_is_server(gpu->devid))
100 name = "Intel(R) Ivybridge Server";
101 }
102 else if (gen_is_snb(gpu->devid)) {
103 if (gen_is_desktop(gpu->devid))
104 name = "Intel(R) Sandybridge Desktop";
105 else if (gen_is_mobile(gpu->devid))
106 name = "Intel(R) Sandybridge Mobile";
107 else if (gen_is_server(gpu->devid))
108 name = "Intel(R) Sandybridge Server";
109 }
110
111 if (!name)
112 name = "Unknown Intel Chipset";
113
114 return name;
115}
116
Chia-I Wud71ff552015-02-20 12:50:12 -0700117void intel_gpu_destroy(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800118{
Chia-I Wu8635e912015-04-09 14:13:57 +0800119 intel_wsi_gpu_cleanup(gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700120
Chia-I Wu41858c82015-04-04 16:39:25 +0800121 intel_gpu_cleanup_winsys(gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700122
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800123 intel_free(gpu, gpu->primary_node);
124 intel_free(gpu, gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700125}
126
127static int devid_to_gen(int devid)
128{
129 int gen;
130
131 if (gen_is_hsw(devid))
132 gen = INTEL_GEN(7.5);
133 else if (gen_is_ivb(devid))
134 gen = INTEL_GEN(7);
135 else if (gen_is_snb(devid))
136 gen = INTEL_GEN(6);
137 else
138 gen = -1;
139
140#ifdef INTEL_GEN_SPECIALIZED
141 if (gen != INTEL_GEN(INTEL_GEN_SPECIALIZED))
142 gen = -1;
143#endif
144
145 return gen;
146}
147
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600148VkResult intel_gpu_create(const struct intel_instance *instance, int devid,
Chia-I Wud71ff552015-02-20 12:50:12 -0700149 const char *primary_node, const char *render_node,
150 struct intel_gpu **gpu_ret)
151{
152 const int gen = devid_to_gen(devid);
Chia-I Wuf07865e2014-09-15 13:52:21 +0800153 size_t primary_len, render_len;
Chia-I Wud71ff552015-02-20 12:50:12 -0700154 struct intel_gpu *gpu;
155
156 if (gen < 0) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600157 intel_log(instance, VK_DBG_MSG_WARNING, VK_VALIDATION_LEVEL_0,
158 VK_NULL_HANDLE, 0, 0, "unsupported device id 0x%04x", devid);
159 return VK_ERROR_INITIALIZATION_FAILED;
Chia-I Wud71ff552015-02-20 12:50:12 -0700160 }
Chia-I Wu214dac62014-08-05 11:07:40 +0800161
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600162 gpu = intel_alloc(instance, sizeof(*gpu), 0, VK_SYSTEM_ALLOC_API_OBJECT);
Chia-I Wu214dac62014-08-05 11:07:40 +0800163 if (!gpu)
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600164 return VK_ERROR_OUT_OF_MEMORY;
Chia-I Wu214dac62014-08-05 11:07:40 +0800165
166 memset(gpu, 0, sizeof(*gpu));
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600167 /* there is no VK_DBG_OBJECT_GPU */
168 intel_handle_init(&gpu->handle, VK_DBG_OBJECT_UNKNOWN, instance->icd);
Chia-I Wu214dac62014-08-05 11:07:40 +0800169
Chia-I Wu214dac62014-08-05 11:07:40 +0800170 gpu->devid = devid;
171
Chia-I Wuf07865e2014-09-15 13:52:21 +0800172 primary_len = strlen(primary_node);
173 render_len = (render_node) ? strlen(render_node) : 0;
174
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800175 gpu->primary_node = intel_alloc(gpu, primary_len + 1 +
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600176 ((render_len) ? (render_len + 1) : 0), 0, VK_SYSTEM_ALLOC_INTERNAL);
Chia-I Wuf07865e2014-09-15 13:52:21 +0800177 if (!gpu->primary_node) {
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800178 intel_free(instance, gpu);
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600179 return VK_ERROR_OUT_OF_MEMORY;
Chia-I Wu214dac62014-08-05 11:07:40 +0800180 }
Chia-I Wuf07865e2014-09-15 13:52:21 +0800181
182 memcpy(gpu->primary_node, primary_node, primary_len + 1);
183
184 if (render_node) {
185 gpu->render_node = gpu->primary_node + primary_len + 1;
186 memcpy(gpu->render_node, render_node, render_len + 1);
187 }
Chia-I Wu214dac62014-08-05 11:07:40 +0800188
189 gpu->gen_opaque = gen;
190
Chia-I Wu960f1952014-08-28 23:27:10 +0800191 switch (intel_gpu_gen(gpu)) {
192 case INTEL_GEN(7.5):
193 gpu->gt = gen_get_hsw_gt(devid);
194 break;
195 case INTEL_GEN(7):
196 gpu->gt = gen_get_ivb_gt(devid);
197 break;
198 case INTEL_GEN(6):
199 gpu->gt = gen_get_snb_gt(devid);
200 break;
201 }
202
Mike Stroyan9fca7122015-02-09 13:08:26 -0700203 /* 150K dwords */
204 gpu->max_batch_buffer_size = sizeof(uint32_t) * 150*1024;
Chia-I Wud6109bb2014-08-21 09:12:19 +0800205
206 /* the winsys is prepared for one reloc every two dwords, then minus 2 */
207 gpu->batch_buffer_reloc_count =
208 gpu->max_batch_buffer_size / sizeof(uint32_t) / 2 - 2;
Chia-I Wu214dac62014-08-05 11:07:40 +0800209
Chia-I Wuf07865e2014-09-15 13:52:21 +0800210 gpu->primary_fd_internal = -1;
211 gpu->render_fd_internal = -1;
212
Chia-I Wu214dac62014-08-05 11:07:40 +0800213 *gpu_ret = gpu;
214
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600215 return VK_SUCCESS;
Chia-I Wu214dac62014-08-05 11:07:40 +0800216}
217
Chia-I Wu214dac62014-08-05 11:07:40 +0800218void intel_gpu_get_props(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600219 VkPhysicalGpuProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800220{
221 const char *name;
222 size_t name_len;
223
Chia-I Wu214dac62014-08-05 11:07:40 +0800224 props->apiVersion = INTEL_API_VERSION;
225 props->driverVersion = INTEL_DRIVER_VERSION;
226
227 props->vendorId = 0x8086;
228 props->deviceId = gpu->devid;
229
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600230 props->gpuType = VK_GPU_TYPE_INTEGRATED;
Chia-I Wu214dac62014-08-05 11:07:40 +0800231
232 /* copy GPU name */
233 name = gpu_get_name(gpu);
234 name_len = strlen(name);
235 if (name_len > sizeof(props->gpuName) - 1)
236 name_len = sizeof(props->gpuName) - 1;
237 memcpy(props->gpuName, name, name_len);
238 props->gpuName[name_len] = '\0';
239
Chia-I Wu214dac62014-08-05 11:07:40 +0800240
Chia-I Wu214dac62014-08-05 11:07:40 +0800241 /* no size limit, but no bounded buffer could exceed 2GB */
242 props->maxInlineMemoryUpdateSize = 2u << 30;
Chia-I Wu214dac62014-08-05 11:07:40 +0800243 props->maxBoundDescriptorSets = 1;
244 props->maxThreadGroupSize = 512;
245
246 /* incremented every 80ns */
247 props->timestampFrequency = 1000 * 1000 * 1000 / 80;
248
249 props->multiColorAttachmentClears = false;
250}
251
252void intel_gpu_get_perf(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600253 VkPhysicalGpuPerformance *perf)
Chia-I Wu214dac62014-08-05 11:07:40 +0800254{
255 /* TODO */
256 perf->maxGpuClock = 1.0f;
257 perf->aluPerClock = 1.0f;
258 perf->texPerClock = 1.0f;
259 perf->primsPerClock = 1.0f;
260 perf->pixelsPerClock = 1.0f;
261}
262
263void intel_gpu_get_queue_props(const struct intel_gpu *gpu,
264 enum intel_gpu_engine_type engine,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600265 VkPhysicalGpuQueueProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800266{
Chia-I Wu214dac62014-08-05 11:07:40 +0800267 switch (engine) {
268 case INTEL_GPU_ENGINE_3D:
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600269 props->queueFlags = VK_QUEUE_GRAPHICS_BIT | VK_QUEUE_COMPUTE_BIT;
Chia-I Wu214dac62014-08-05 11:07:40 +0800270 props->queueCount = 1;
Chia-I Wuec841722014-08-25 22:36:01 +0800271 props->maxAtomicCounters = INTEL_QUEUE_ATOMIC_COUNTER_COUNT;
Chia-I Wu214dac62014-08-05 11:07:40 +0800272 props->supportsTimestamps = true;
Courtney Goeltzenleuchtere16aa8e2015-04-02 14:22:12 -0600273 props->maxMemReferences = gpu->batch_buffer_reloc_count;
Chia-I Wu214dac62014-08-05 11:07:40 +0800274 break;
275 default:
276 assert(!"unknown engine type");
277 return;
278 }
279}
280
281void intel_gpu_get_memory_props(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600282 VkPhysicalGpuMemoryProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800283{
Chia-I Wu214dac62014-08-05 11:07:40 +0800284 props->supportsMigration = false;
Chia-I Wu2cd1e072015-03-06 12:10:13 -0700285 props->supportsPinning = true;
Chia-I Wu214dac62014-08-05 11:07:40 +0800286}
287
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800288int intel_gpu_get_max_threads(const struct intel_gpu *gpu,
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600289 VkPipelineShaderStage stage)
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800290{
291 switch (intel_gpu_gen(gpu)) {
292 case INTEL_GEN(7.5):
293 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600294 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800295 return (gpu->gt >= 2) ? 280 : 70;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600296 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800297 return (gpu->gt == 3) ? 408 :
298 (gpu->gt == 2) ? 204 : 102;
299 default:
300 break;
301 }
302 break;
303 case INTEL_GEN(7):
304 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600305 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800306 return (gpu->gt == 2) ? 128 : 36;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600307 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800308 return (gpu->gt == 2) ? 172 : 48;
309 default:
310 break;
311 }
312 break;
313 case INTEL_GEN(6):
314 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600315 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800316 return (gpu->gt == 2) ? 60 : 24;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600317 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800318 return (gpu->gt == 2) ? 80 : 40;
319 default:
320 break;
321 }
322 break;
323 default:
324 break;
325 }
326
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600327 intel_log(gpu, VK_DBG_MSG_ERROR, VK_VALIDATION_LEVEL_0, VK_NULL_HANDLE,
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800328 0, 0, "unknown Gen or shader stage");
329
330 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600331 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800332 return 1;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600333 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800334 return 4;
335 default:
336 return 1;
337 }
338}
339
Chia-I Wu41858c82015-04-04 16:39:25 +0800340int intel_gpu_get_primary_fd(struct intel_gpu *gpu)
Chia-I Wu1db76e02014-09-15 14:21:14 +0800341{
Chia-I Wu41858c82015-04-04 16:39:25 +0800342 return gpu_open_primary_node(gpu);
Chia-I Wu1db76e02014-09-15 14:21:14 +0800343}
344
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600345VkResult intel_gpu_init_winsys(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800346{
Chia-I Wud8965932014-10-13 13:32:37 +0800347 int fd;
Chia-I Wu214dac62014-08-05 11:07:40 +0800348
Chia-I Wud8965932014-10-13 13:32:37 +0800349 assert(!gpu->winsys);
350
Chia-I Wu41858c82015-04-04 16:39:25 +0800351 fd = gpu_open_render_node(gpu);
Chia-I Wud8965932014-10-13 13:32:37 +0800352 if (fd < 0)
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600353 return VK_ERROR_UNKNOWN;
Chia-I Wud8965932014-10-13 13:32:37 +0800354
Chia-I Wuf13ed3c2015-02-22 14:09:00 +0800355 gpu->winsys = intel_winsys_create_for_fd(gpu->handle.icd, fd);
Chia-I Wud8965932014-10-13 13:32:37 +0800356 if (!gpu->winsys) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600357 intel_log(gpu, VK_DBG_MSG_ERROR, VK_VALIDATION_LEVEL_0,
358 VK_NULL_HANDLE, 0, 0, "failed to create GPU winsys");
Chia-I Wu41858c82015-04-04 16:39:25 +0800359 gpu_close_render_node(gpu);
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600360 return VK_ERROR_UNKNOWN;
Chia-I Wud8965932014-10-13 13:32:37 +0800361 }
362
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600363 return VK_SUCCESS;
Chia-I Wu214dac62014-08-05 11:07:40 +0800364}
365
Chia-I Wu41858c82015-04-04 16:39:25 +0800366void intel_gpu_cleanup_winsys(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800367{
Chia-I Wud8965932014-10-13 13:32:37 +0800368 if (gpu->winsys) {
369 intel_winsys_destroy(gpu->winsys);
370 gpu->winsys = NULL;
371 }
372
Chia-I Wuf07865e2014-09-15 13:52:21 +0800373 gpu_close_primary_node(gpu);
374 gpu_close_render_node(gpu);
Chia-I Wu214dac62014-08-05 11:07:40 +0800375}
376
Chia-I Wu1db76e02014-09-15 14:21:14 +0800377enum intel_ext_type intel_gpu_lookup_extension(const struct intel_gpu *gpu,
378 const char *ext)
Chia-I Wu214dac62014-08-05 11:07:40 +0800379{
Chia-I Wu1db76e02014-09-15 14:21:14 +0800380 enum intel_ext_type type;
381
382 for (type = 0; type < ARRAY_SIZE(intel_gpu_exts); type++) {
383 if (intel_gpu_exts[type] && strcmp(intel_gpu_exts[type], ext) == 0)
384 break;
385 }
386
387 assert(type < INTEL_EXT_COUNT || type == INTEL_EXT_INVALID);
388
389 return type;
Chia-I Wu214dac62014-08-05 11:07:40 +0800390}
Chia-I Wubec90a02014-08-06 12:33:03 +0800391
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600392ICD_EXPORT VkResult VKAPI vkEnumerateLayers(
393 VkPhysicalGpu gpu,
Chia-I Wu1d713212015-02-20 15:07:57 -0700394 size_t maxLayerCount,
395 size_t maxStringSize,
396 size_t* pOutLayerCount,
397 char* const* pOutLayers,
398 void* pReserved)
399{
400 if (!pOutLayerCount)
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600401 return VK_ERROR_INVALID_POINTER;
Chia-I Wu1d713212015-02-20 15:07:57 -0700402
403 *pOutLayerCount = 0;
404
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600405 return VK_SUCCESS;
Chia-I Wu1d713212015-02-20 15:07:57 -0700406}
407
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600408ICD_EXPORT VkResult VKAPI vkGetGpuInfo(
409 VkPhysicalGpu gpu_,
410 VkPhysicalGpuInfoType infoType,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600411 size_t* pDataSize,
412 void* pData)
Chia-I Wubec90a02014-08-06 12:33:03 +0800413{
Chia-I Wu41858c82015-04-04 16:39:25 +0800414 struct intel_gpu *gpu = intel_gpu(gpu_);
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600415 VkResult ret = VK_SUCCESS;
Chia-I Wubec90a02014-08-06 12:33:03 +0800416
417 switch (infoType) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600418 case VK_INFO_TYPE_PHYSICAL_GPU_PROPERTIES:
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600419 *pDataSize = sizeof(VkPhysicalGpuProperties);
Jon Ashburn408daec2014-12-05 09:23:52 -0700420 if (pData == NULL) {
421 return ret;
422 }
Chia-I Wubec90a02014-08-06 12:33:03 +0800423 intel_gpu_get_props(gpu, pData);
424 break;
425
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600426 case VK_INFO_TYPE_PHYSICAL_GPU_PERFORMANCE:
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600427 *pDataSize = sizeof(VkPhysicalGpuPerformance);
Jon Ashburn408daec2014-12-05 09:23:52 -0700428 if (pData == NULL) {
429 return ret;
430 }
Chia-I Wubec90a02014-08-06 12:33:03 +0800431 intel_gpu_get_perf(gpu, pData);
432 break;
433
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600434 case VK_INFO_TYPE_PHYSICAL_GPU_QUEUE_PROPERTIES:
Chia-I Wubec90a02014-08-06 12:33:03 +0800435 /*
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600436 * Vulkan Programmers guide, page 33:
Chia-I Wubec90a02014-08-06 12:33:03 +0800437 * to determine the data size an application calls
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600438 * vkGetGpuInfo() with a NULL data pointer. The
Chia-I Wubec90a02014-08-06 12:33:03 +0800439 * expected data size for all queue property structures
440 * is returned in pDataSize
441 */
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600442 *pDataSize = sizeof(VkPhysicalGpuQueueProperties) *
Chia-I Wubec90a02014-08-06 12:33:03 +0800443 INTEL_GPU_ENGINE_COUNT;
444 if (pData != NULL) {
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600445 VkPhysicalGpuQueueProperties *dst = pData;
Chia-I Wubec90a02014-08-06 12:33:03 +0800446 int engine;
447
448 for (engine = 0; engine < INTEL_GPU_ENGINE_COUNT; engine++) {
449 intel_gpu_get_queue_props(gpu, engine, dst);
450 dst++;
451 }
452 }
453 break;
454
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600455 case VK_INFO_TYPE_PHYSICAL_GPU_MEMORY_PROPERTIES:
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600456 *pDataSize = sizeof(VkPhysicalGpuMemoryProperties);
Jon Ashburn408daec2014-12-05 09:23:52 -0700457 if (pData == NULL) {
458 return ret;
459 }
Chia-I Wubec90a02014-08-06 12:33:03 +0800460 intel_gpu_get_memory_props(gpu, pData);
461 break;
462
463 default:
Chia-I Wu41858c82015-04-04 16:39:25 +0800464 ret = intel_wsi_gpu_get_info(gpu, infoType, pDataSize, pData);
465 break;
Chia-I Wubec90a02014-08-06 12:33:03 +0800466 }
467
468 return ret;
469}
470
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600471ICD_EXPORT VkResult VKAPI vkGetExtensionSupport(
472 VkPhysicalGpu gpu_,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600473 const char* pExtName)
Chia-I Wubec90a02014-08-06 12:33:03 +0800474{
475 struct intel_gpu *gpu = intel_gpu(gpu_);
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800476 const enum intel_ext_type ext = intel_gpu_lookup_extension(gpu, pExtName);
Chia-I Wubec90a02014-08-06 12:33:03 +0800477
Chia-I Wu1db76e02014-09-15 14:21:14 +0800478 return (ext != INTEL_EXT_INVALID) ?
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600479 VK_SUCCESS : VK_ERROR_INVALID_EXTENSION;
Chia-I Wubec90a02014-08-06 12:33:03 +0800480}
Chia-I Wu251e7d92014-08-19 13:35:42 +0800481
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600482ICD_EXPORT VkResult VKAPI vkGetMultiGpuCompatibility(
483 VkPhysicalGpu gpu0_,
484 VkPhysicalGpu gpu1_,
485 VkGpuCompatibilityInfo* pInfo)
Chia-I Wu251e7d92014-08-19 13:35:42 +0800486{
Chia-I Wu452f5e82014-08-31 12:39:05 +0800487 const struct intel_gpu *gpu0 = intel_gpu(gpu0_);
488 const struct intel_gpu *gpu1 = intel_gpu(gpu1_);
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600489 VkFlags compat = VK_GPU_COMPAT_IQ_MATCH_BIT |
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600490 VK_GPU_COMPAT_PEER_TRANSFER_BIT |
491 VK_GPU_COMPAT_SHARED_MEMORY_BIT |
492 VK_GPU_COMPAT_SHARED_GPU0_DISPLAY_BIT |
493 VK_GPU_COMPAT_SHARED_GPU1_DISPLAY_BIT;
Chia-I Wu452f5e82014-08-31 12:39:05 +0800494
495 if (intel_gpu_gen(gpu0) == intel_gpu_gen(gpu1))
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600496 compat |= VK_GPU_COMPAT_ASIC_FEATURES_BIT;
Chia-I Wu452f5e82014-08-31 12:39:05 +0800497
498 pInfo->compatibilityFlags = compat;
499
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600500 return VK_SUCCESS;
Chia-I Wu251e7d92014-08-19 13:35:42 +0800501}