blob: 91b0cefd068e531ddeb1ec0025674bd4ab196103 [file] [log] [blame]
Chia-I Wuf9911eb2014-08-06 13:50:31 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wuf9911eb2014-08-06 13:50:31 +080026 */
27
Chia-I Wuf9911eb2014-08-06 13:50:31 +080028#include "dev.h"
29#include "mem.h"
30
31XGL_RESULT intel_mem_alloc(struct intel_dev *dev,
32 const XGL_MEMORY_ALLOC_INFO *info,
33 struct intel_mem **mem_ret)
34{
35 struct intel_mem *mem;
36
Jon Ashburnc6ae13d2015-01-19 15:00:26 -070037 /* ignore any IMAGE_INFO and BUFFER_INFO usage: they don't alter allocations */
Chia-I Wuf9911eb2014-08-06 13:50:31 +080038
Chia-I Wu545c2e12015-02-22 13:19:54 +080039 mem = (struct intel_mem *) intel_base_create(&dev->base.handle,
40 sizeof(*mem), dev->base.dbg, XGL_DBG_OBJECT_GPU_MEMORY, info, 0);
Chia-I Wuf9911eb2014-08-06 13:50:31 +080041 if (!mem)
42 return XGL_ERROR_OUT_OF_MEMORY;
43
Chia-I Wucb2dc0d2015-03-05 16:19:42 -070044 mem->bo = intel_winsys_alloc_bo(dev->winsys,
Chia-I Wuf9911eb2014-08-06 13:50:31 +080045 "xgl-gpu-memory", info->allocationSize, 0);
46 if (!mem->bo) {
47 intel_mem_free(mem);
48 return XGL_ERROR_UNKNOWN;
49 }
50
Chia-I Wu000747d2014-08-20 15:39:36 +080051 mem->size = info->allocationSize;
52
Courtney Goeltzenleuchterc35ab462014-08-06 17:10:04 -060053 *mem_ret = mem;
54
Chia-I Wuf9911eb2014-08-06 13:50:31 +080055 return XGL_SUCCESS;
56}
57
58void intel_mem_free(struct intel_mem *mem)
59{
Chia-I Wucb2dc0d2015-03-05 16:19:42 -070060 intel_bo_unref(mem->bo);
Chia-I Wuf9911eb2014-08-06 13:50:31 +080061
Chia-I Wubbf2c932014-08-07 12:20:08 +080062 intel_base_destroy(&mem->base);
Chia-I Wuf9911eb2014-08-06 13:50:31 +080063}
64
65XGL_RESULT intel_mem_set_priority(struct intel_mem *mem,
66 XGL_MEMORY_PRIORITY priority)
67{
68 /* pin the bo when XGL_MEMORY_PRIORITY_VERY_HIGH? */
69 return XGL_SUCCESS;
70}
71
Chia-I Wu96177272015-01-03 15:27:41 +080072ICD_EXPORT XGL_RESULT XGLAPI xglAllocMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +080073 XGL_DEVICE device,
74 const XGL_MEMORY_ALLOC_INFO* pAllocInfo,
75 XGL_GPU_MEMORY* pMem)
76{
77 struct intel_dev *dev = intel_dev(device);
78
79 return intel_mem_alloc(dev, pAllocInfo, (struct intel_mem **) pMem);
80}
81
Chia-I Wu96177272015-01-03 15:27:41 +080082ICD_EXPORT XGL_RESULT XGLAPI xglFreeMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +080083 XGL_GPU_MEMORY mem_)
84{
85 struct intel_mem *mem = intel_mem(mem_);
86
87 intel_mem_free(mem);
88
89 return XGL_SUCCESS;
90}
91
Chia-I Wu96177272015-01-03 15:27:41 +080092ICD_EXPORT XGL_RESULT XGLAPI xglSetMemoryPriority(
Chia-I Wuf9911eb2014-08-06 13:50:31 +080093 XGL_GPU_MEMORY mem_,
94 XGL_MEMORY_PRIORITY priority)
95{
96 struct intel_mem *mem = intel_mem(mem_);
97
98 return intel_mem_set_priority(mem, priority);
99}
100
Chia-I Wu96177272015-01-03 15:27:41 +0800101ICD_EXPORT XGL_RESULT XGLAPI xglMapMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800102 XGL_GPU_MEMORY mem_,
103 XGL_FLAGS flags,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600104 void** ppData)
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800105{
106 struct intel_mem *mem = intel_mem(mem_);
107 void *ptr = intel_mem_map(mem, flags);
108
109 *ppData = ptr;
110
111 return (ptr) ? XGL_SUCCESS : XGL_ERROR_UNKNOWN;
112}
113
Chia-I Wu96177272015-01-03 15:27:41 +0800114ICD_EXPORT XGL_RESULT XGLAPI xglUnmapMemory(
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800115 XGL_GPU_MEMORY mem_)
116{
117 struct intel_mem *mem = intel_mem(mem_);
118
119 intel_mem_unmap(mem);
120
121 return XGL_SUCCESS;
122}
Chia-I Wu251e7d92014-08-19 13:35:42 +0800123
Chia-I Wu96177272015-01-03 15:27:41 +0800124ICD_EXPORT XGL_RESULT XGLAPI xglPinSystemMemory(
Chia-I Wu251e7d92014-08-19 13:35:42 +0800125 XGL_DEVICE device,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600126 const void* pSysMem,
127 size_t memSize,
Chia-I Wu251e7d92014-08-19 13:35:42 +0800128 XGL_GPU_MEMORY* pMem)
129{
130 /* add DRM_I915_GEM_USERPTR to wisys first */
131 return XGL_ERROR_UNAVAILABLE;
132}
133
Chia-I Wu96177272015-01-03 15:27:41 +0800134ICD_EXPORT XGL_RESULT XGLAPI xglOpenSharedMemory(
Chia-I Wu251e7d92014-08-19 13:35:42 +0800135 XGL_DEVICE device,
136 const XGL_MEMORY_OPEN_INFO* pOpenInfo,
137 XGL_GPU_MEMORY* pMem)
138{
139 return XGL_ERROR_UNAVAILABLE;
140}
141
Chia-I Wu96177272015-01-03 15:27:41 +0800142ICD_EXPORT XGL_RESULT XGLAPI xglOpenPeerMemory(
Chia-I Wu251e7d92014-08-19 13:35:42 +0800143 XGL_DEVICE device,
144 const XGL_PEER_MEMORY_OPEN_INFO* pOpenInfo,
145 XGL_GPU_MEMORY* pMem)
146{
147 return XGL_ERROR_UNAVAILABLE;
148}